1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef _QED_MCP_H 34 #define _QED_MCP_H 35 36 #include <linux/types.h> 37 #include <linux/delay.h> 38 #include <linux/slab.h> 39 #include <linux/spinlock.h> 40 #include <linux/qed/qed_fcoe_if.h> 41 #include "qed_hsi.h" 42 #include "qed_dev_api.h" 43 44 struct qed_mcp_link_speed_params { 45 bool autoneg; 46 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ 47 u32 forced_speed; /* In Mb/s */ 48 }; 49 50 struct qed_mcp_link_pause_params { 51 bool autoneg; 52 bool forced_rx; 53 bool forced_tx; 54 }; 55 56 enum qed_mcp_eee_mode { 57 QED_MCP_EEE_DISABLED, 58 QED_MCP_EEE_ENABLED, 59 QED_MCP_EEE_UNSUPPORTED 60 }; 61 62 struct qed_mcp_link_params { 63 struct qed_mcp_link_speed_params speed; 64 struct qed_mcp_link_pause_params pause; 65 u32 loopback_mode; 66 struct qed_link_eee_params eee; 67 }; 68 69 struct qed_mcp_link_capabilities { 70 u32 speed_capabilities; 71 bool default_speed_autoneg; 72 enum qed_mcp_eee_mode default_eee; 73 u32 eee_lpi_timer; 74 u8 eee_speed_caps; 75 }; 76 77 struct qed_mcp_link_state { 78 bool link_up; 79 80 u32 min_pf_rate; 81 82 /* Actual link speed in Mb/s */ 83 u32 line_speed; 84 85 /* PF max speed in Mb/s, deduced from line_speed 86 * according to PF max bandwidth configuration. 87 */ 88 u32 speed; 89 bool full_duplex; 90 91 bool an; 92 bool an_complete; 93 bool parallel_detection; 94 bool pfc_enabled; 95 96 #define QED_LINK_PARTNER_SPEED_1G_HD BIT(0) 97 #define QED_LINK_PARTNER_SPEED_1G_FD BIT(1) 98 #define QED_LINK_PARTNER_SPEED_10G BIT(2) 99 #define QED_LINK_PARTNER_SPEED_20G BIT(3) 100 #define QED_LINK_PARTNER_SPEED_25G BIT(4) 101 #define QED_LINK_PARTNER_SPEED_40G BIT(5) 102 #define QED_LINK_PARTNER_SPEED_50G BIT(6) 103 #define QED_LINK_PARTNER_SPEED_100G BIT(7) 104 u32 partner_adv_speed; 105 106 bool partner_tx_flow_ctrl_en; 107 bool partner_rx_flow_ctrl_en; 108 109 #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1) 110 #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2) 111 #define QED_LINK_PARTNER_BOTH_PAUSE (3) 112 u8 partner_adv_pause; 113 114 bool sfp_tx_fault; 115 bool eee_active; 116 u8 eee_adv_caps; 117 u8 eee_lp_adv_caps; 118 }; 119 120 struct qed_mcp_function_info { 121 u8 pause_on_host; 122 123 enum qed_pci_personality protocol; 124 125 u8 bandwidth_min; 126 u8 bandwidth_max; 127 128 u8 mac[ETH_ALEN]; 129 130 u64 wwn_port; 131 u64 wwn_node; 132 133 #define QED_MCP_VLAN_UNSET (0xffff) 134 u16 ovlan; 135 136 u16 mtu; 137 }; 138 139 struct qed_mcp_nvm_common { 140 u32 offset; 141 u32 param; 142 u32 resp; 143 u32 cmd; 144 }; 145 146 struct qed_mcp_drv_version { 147 u32 version; 148 u8 name[MCP_DRV_VER_STR_SIZE - 4]; 149 }; 150 151 struct qed_mcp_lan_stats { 152 u64 ucast_rx_pkts; 153 u64 ucast_tx_pkts; 154 u32 fcs_err; 155 }; 156 157 struct qed_mcp_fcoe_stats { 158 u64 rx_pkts; 159 u64 tx_pkts; 160 u32 fcs_err; 161 u32 login_failure; 162 }; 163 164 struct qed_mcp_iscsi_stats { 165 u64 rx_pdus; 166 u64 tx_pdus; 167 u64 rx_bytes; 168 u64 tx_bytes; 169 }; 170 171 struct qed_mcp_rdma_stats { 172 u64 rx_pkts; 173 u64 tx_pkts; 174 u64 rx_bytes; 175 u64 tx_byts; 176 }; 177 178 enum qed_mcp_protocol_type { 179 QED_MCP_LAN_STATS, 180 QED_MCP_FCOE_STATS, 181 QED_MCP_ISCSI_STATS, 182 QED_MCP_RDMA_STATS 183 }; 184 185 union qed_mcp_protocol_stats { 186 struct qed_mcp_lan_stats lan_stats; 187 struct qed_mcp_fcoe_stats fcoe_stats; 188 struct qed_mcp_iscsi_stats iscsi_stats; 189 struct qed_mcp_rdma_stats rdma_stats; 190 }; 191 192 enum qed_ov_eswitch { 193 QED_OV_ESWITCH_NONE, 194 QED_OV_ESWITCH_VEB, 195 QED_OV_ESWITCH_VEPA 196 }; 197 198 enum qed_ov_client { 199 QED_OV_CLIENT_DRV, 200 QED_OV_CLIENT_USER, 201 QED_OV_CLIENT_VENDOR_SPEC 202 }; 203 204 enum qed_ov_driver_state { 205 QED_OV_DRIVER_STATE_NOT_LOADED, 206 QED_OV_DRIVER_STATE_DISABLED, 207 QED_OV_DRIVER_STATE_ACTIVE 208 }; 209 210 enum qed_ov_wol { 211 QED_OV_WOL_DEFAULT, 212 QED_OV_WOL_DISABLED, 213 QED_OV_WOL_ENABLED 214 }; 215 216 enum qed_mfw_tlv_type { 217 QED_MFW_TLV_GENERIC = 0x1, /* Core driver TLVs */ 218 QED_MFW_TLV_ETH = 0x2, /* L2 driver TLVs */ 219 QED_MFW_TLV_FCOE = 0x4, /* FCoE protocol TLVs */ 220 QED_MFW_TLV_ISCSI = 0x8, /* SCSI protocol TLVs */ 221 QED_MFW_TLV_MAX = 0x16, 222 }; 223 224 struct qed_mfw_tlv_generic { 225 #define QED_MFW_TLV_FLAGS_SIZE 2 226 struct { 227 u8 ipv4_csum_offload; 228 u8 lso_supported; 229 bool b_set; 230 } flags; 231 232 #define QED_MFW_TLV_MAC_COUNT 3 233 /* First entry for primary MAC, 2 secondary MACs possible */ 234 u8 mac[QED_MFW_TLV_MAC_COUNT][6]; 235 bool mac_set[QED_MFW_TLV_MAC_COUNT]; 236 237 u64 rx_frames; 238 bool rx_frames_set; 239 u64 rx_bytes; 240 bool rx_bytes_set; 241 u64 tx_frames; 242 bool tx_frames_set; 243 u64 tx_bytes; 244 bool tx_bytes_set; 245 }; 246 247 union qed_mfw_tlv_data { 248 struct qed_mfw_tlv_generic generic; 249 struct qed_mfw_tlv_eth eth; 250 struct qed_mfw_tlv_fcoe fcoe; 251 struct qed_mfw_tlv_iscsi iscsi; 252 }; 253 254 /** 255 * @brief - returns the link params of the hw function 256 * 257 * @param p_hwfn 258 * 259 * @returns pointer to link params 260 */ 261 struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *); 262 263 /** 264 * @brief - return the link state of the hw function 265 * 266 * @param p_hwfn 267 * 268 * @returns pointer to link state 269 */ 270 struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *); 271 272 /** 273 * @brief - return the link capabilities of the hw function 274 * 275 * @param p_hwfn 276 * 277 * @returns pointer to link capabilities 278 */ 279 struct qed_mcp_link_capabilities 280 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn); 281 282 /** 283 * @brief Request the MFW to set the the link according to 'link_input'. 284 * 285 * @param p_hwfn 286 * @param p_ptt 287 * @param b_up - raise link if `true'. Reset link if `false'. 288 * 289 * @return int 290 */ 291 int qed_mcp_set_link(struct qed_hwfn *p_hwfn, 292 struct qed_ptt *p_ptt, 293 bool b_up); 294 295 /** 296 * @brief Get the management firmware version value 297 * 298 * @param p_hwfn 299 * @param p_ptt 300 * @param p_mfw_ver - mfw version value 301 * @param p_running_bundle_id - image id in nvram; Optional. 302 * 303 * @return int - 0 - operation was successful. 304 */ 305 int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, 306 struct qed_ptt *p_ptt, 307 u32 *p_mfw_ver, u32 *p_running_bundle_id); 308 309 /** 310 * @brief Get the MBI version value 311 * 312 * @param p_hwfn 313 * @param p_ptt 314 * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version. 315 * 316 * @return int - 0 - operation was successful. 317 */ 318 int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn, 319 struct qed_ptt *p_ptt, u32 *p_mbi_ver); 320 321 /** 322 * @brief Get media type value of the port. 323 * 324 * @param cdev - qed dev pointer 325 * @param p_ptt 326 * @param mfw_ver - media type value 327 * 328 * @return int - 329 * 0 - Operation was successul. 330 * -EBUSY - Operation failed 331 */ 332 int qed_mcp_get_media_type(struct qed_hwfn *p_hwfn, 333 struct qed_ptt *p_ptt, u32 *media_type); 334 335 /** 336 * @brief Get transceiver data of the port. 337 * 338 * @param cdev - qed dev pointer 339 * @param p_ptt 340 * @param p_transceiver_state - transceiver state. 341 * @param p_transceiver_type - media type value 342 * 343 * @return int - 344 * 0 - Operation was successful. 345 * -EBUSY - Operation failed 346 */ 347 int qed_mcp_get_transceiver_data(struct qed_hwfn *p_hwfn, 348 struct qed_ptt *p_ptt, 349 u32 *p_transceiver_state, 350 u32 *p_tranceiver_type); 351 352 /** 353 * @brief Get transceiver supported speed mask. 354 * 355 * @param cdev - qed dev pointer 356 * @param p_ptt 357 * @param p_speed_mask - Bit mask of all supported speeds. 358 * 359 * @return int - 360 * 0 - Operation was successful. 361 * -EBUSY - Operation failed 362 */ 363 364 int qed_mcp_trans_speed_mask(struct qed_hwfn *p_hwfn, 365 struct qed_ptt *p_ptt, u32 *p_speed_mask); 366 367 /** 368 * @brief Get board configuration. 369 * 370 * @param cdev - qed dev pointer 371 * @param p_ptt 372 * @param p_board_config - Board config. 373 * 374 * @return int - 375 * 0 - Operation was successful. 376 * -EBUSY - Operation failed 377 */ 378 int qed_mcp_get_board_config(struct qed_hwfn *p_hwfn, 379 struct qed_ptt *p_ptt, u32 *p_board_config); 380 381 /** 382 * @brief General function for sending commands to the MCP 383 * mailbox. It acquire mutex lock for the entire 384 * operation, from sending the request until the MCP 385 * response. Waiting for MCP response will be checked up 386 * to 5 seconds every 5ms. 387 * 388 * @param p_hwfn - hw function 389 * @param p_ptt - PTT required for register access 390 * @param cmd - command to be sent to the MCP. 391 * @param param - Optional param 392 * @param o_mcp_resp - The MCP response code (exclude sequence). 393 * @param o_mcp_param- Optional parameter provided by the MCP 394 * response 395 * @return int - 0 - operation 396 * was successul. 397 */ 398 int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 399 struct qed_ptt *p_ptt, 400 u32 cmd, 401 u32 param, 402 u32 *o_mcp_resp, 403 u32 *o_mcp_param); 404 405 /** 406 * @brief - drains the nig, allowing completion to pass in case of pauses. 407 * (Should be called only from sleepable context) 408 * 409 * @param p_hwfn 410 * @param p_ptt 411 */ 412 int qed_mcp_drain(struct qed_hwfn *p_hwfn, 413 struct qed_ptt *p_ptt); 414 415 /** 416 * @brief Get the flash size value 417 * 418 * @param p_hwfn 419 * @param p_ptt 420 * @param p_flash_size - flash size in bytes to be filled. 421 * 422 * @return int - 0 - operation was successul. 423 */ 424 int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 425 struct qed_ptt *p_ptt, 426 u32 *p_flash_size); 427 428 /** 429 * @brief Send driver version to MFW 430 * 431 * @param p_hwfn 432 * @param p_ptt 433 * @param version - Version value 434 * @param name - Protocol driver name 435 * 436 * @return int - 0 - operation was successul. 437 */ 438 int 439 qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 440 struct qed_ptt *p_ptt, 441 struct qed_mcp_drv_version *p_ver); 442 443 /** 444 * @brief Notify MFW about the change in base device properties 445 * 446 * @param p_hwfn 447 * @param p_ptt 448 * @param client - qed client type 449 * 450 * @return int - 0 - operation was successful. 451 */ 452 int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn, 453 struct qed_ptt *p_ptt, 454 enum qed_ov_client client); 455 456 /** 457 * @brief Notify MFW about the driver state 458 * 459 * @param p_hwfn 460 * @param p_ptt 461 * @param drv_state - Driver state 462 * 463 * @return int - 0 - operation was successful. 464 */ 465 int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn, 466 struct qed_ptt *p_ptt, 467 enum qed_ov_driver_state drv_state); 468 469 /** 470 * @brief Send MTU size to MFW 471 * 472 * @param p_hwfn 473 * @param p_ptt 474 * @param mtu - MTU size 475 * 476 * @return int - 0 - operation was successful. 477 */ 478 int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn, 479 struct qed_ptt *p_ptt, u16 mtu); 480 481 /** 482 * @brief Send MAC address to MFW 483 * 484 * @param p_hwfn 485 * @param p_ptt 486 * @param mac - MAC address 487 * 488 * @return int - 0 - operation was successful. 489 */ 490 int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn, 491 struct qed_ptt *p_ptt, u8 *mac); 492 493 /** 494 * @brief Send WOL mode to MFW 495 * 496 * @param p_hwfn 497 * @param p_ptt 498 * @param wol - WOL mode 499 * 500 * @return int - 0 - operation was successful. 501 */ 502 int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn, 503 struct qed_ptt *p_ptt, 504 enum qed_ov_wol wol); 505 506 /** 507 * @brief Set LED status 508 * 509 * @param p_hwfn 510 * @param p_ptt 511 * @param mode - LED mode 512 * 513 * @return int - 0 - operation was successful. 514 */ 515 int qed_mcp_set_led(struct qed_hwfn *p_hwfn, 516 struct qed_ptt *p_ptt, 517 enum qed_led_mode mode); 518 519 /** 520 * @brief Read from nvm 521 * 522 * @param cdev 523 * @param addr - nvm offset 524 * @param p_buf - nvm read buffer 525 * @param len - buffer len 526 * 527 * @return int - 0 - operation was successful. 528 */ 529 int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len); 530 531 /** 532 * @brief Write to nvm 533 * 534 * @param cdev 535 * @param addr - nvm offset 536 * @param cmd - nvm command 537 * @param p_buf - nvm write buffer 538 * @param len - buffer len 539 * 540 * @return int - 0 - operation was successful. 541 */ 542 int qed_mcp_nvm_write(struct qed_dev *cdev, 543 u32 cmd, u32 addr, u8 *p_buf, u32 len); 544 545 /** 546 * @brief Check latest response 547 * 548 * @param cdev 549 * @param p_buf - nvm write buffer 550 * 551 * @return int - 0 - operation was successful. 552 */ 553 int qed_mcp_nvm_resp(struct qed_dev *cdev, u8 *p_buf); 554 555 struct qed_nvm_image_att { 556 u32 start_addr; 557 u32 length; 558 }; 559 560 /** 561 * @brief Allows reading a whole nvram image 562 * 563 * @param p_hwfn 564 * @param image_id - image to get attributes for 565 * @param p_image_att - image attributes structure into which to fill data 566 * 567 * @return int - 0 - operation was successful. 568 */ 569 int 570 qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn, 571 enum qed_nvm_images image_id, 572 struct qed_nvm_image_att *p_image_att); 573 574 /** 575 * @brief Allows reading a whole nvram image 576 * 577 * @param p_hwfn 578 * @param image_id - image requested for reading 579 * @param p_buffer - allocated buffer into which to fill data 580 * @param buffer_len - length of the allocated buffer. 581 * 582 * @return 0 iff p_buffer now contains the nvram image. 583 */ 584 int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn, 585 enum qed_nvm_images image_id, 586 u8 *p_buffer, u32 buffer_len); 587 588 /** 589 * @brief Bist register test 590 * 591 * @param p_hwfn - hw function 592 * @param p_ptt - PTT required for register access 593 * 594 * @return int - 0 - operation was successful. 595 */ 596 int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, 597 struct qed_ptt *p_ptt); 598 599 /** 600 * @brief Bist clock test 601 * 602 * @param p_hwfn - hw function 603 * @param p_ptt - PTT required for register access 604 * 605 * @return int - 0 - operation was successful. 606 */ 607 int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, 608 struct qed_ptt *p_ptt); 609 610 /** 611 * @brief Bist nvm test - get number of images 612 * 613 * @param p_hwfn - hw function 614 * @param p_ptt - PTT required for register access 615 * @param num_images - number of images if operation was 616 * successful. 0 if not. 617 * 618 * @return int - 0 - operation was successful. 619 */ 620 int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn, 621 struct qed_ptt *p_ptt, 622 u32 *num_images); 623 624 /** 625 * @brief Bist nvm test - get image attributes by index 626 * 627 * @param p_hwfn - hw function 628 * @param p_ptt - PTT required for register access 629 * @param p_image_att - Attributes of image 630 * @param image_index - Index of image to get information for 631 * 632 * @return int - 0 - operation was successful. 633 */ 634 int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn, 635 struct qed_ptt *p_ptt, 636 struct bist_nvm_image_att *p_image_att, 637 u32 image_index); 638 639 /** 640 * @brief - Processes the TLV request from MFW i.e., get the required TLV info 641 * from the qed client and send it to the MFW. 642 * 643 * @param p_hwfn 644 * @param p_ptt 645 * 646 * @param return 0 upon success. 647 */ 648 int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 649 650 /* Using hwfn number (and not pf_num) is required since in CMT mode, 651 * same pf_num may be used by two different hwfn 652 * TODO - this shouldn't really be in .h file, but until all fields 653 * required during hw-init will be placed in their correct place in shmem 654 * we need it in qed_dev.c [for readin the nvram reflection in shmem]. 655 */ 656 #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \ 657 ((rel_pfid) | \ 658 ((p_hwfn)->abs_pf_id & 1) << 3) : \ 659 rel_pfid) 660 #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id) 661 662 #define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \ 663 ((_p_hwfn)->cdev->num_ports_in_engine * \ 664 qed_device_num_engines((_p_hwfn)->cdev))) 665 666 struct qed_mcp_info { 667 /* List for mailbox commands which were sent and wait for a response */ 668 struct list_head cmd_list; 669 670 /* Spinlock used for protecting the access to the mailbox commands list 671 * and the sending of the commands. 672 */ 673 spinlock_t cmd_lock; 674 675 /* Flag to indicate whether sending a MFW mailbox command is blocked */ 676 bool b_block_cmd; 677 678 /* Spinlock used for syncing SW link-changes and link-changes 679 * originating from attention context. 680 */ 681 spinlock_t link_lock; 682 683 u32 public_base; 684 u32 drv_mb_addr; 685 u32 mfw_mb_addr; 686 u32 port_addr; 687 u16 drv_mb_seq; 688 u16 drv_pulse_seq; 689 struct qed_mcp_link_params link_input; 690 struct qed_mcp_link_state link_output; 691 struct qed_mcp_link_capabilities link_capabilities; 692 struct qed_mcp_function_info func_info; 693 u8 *mfw_mb_cur; 694 u8 *mfw_mb_shadow; 695 u16 mfw_mb_length; 696 u32 mcp_hist; 697 698 /* Capabilties negotiated with the MFW */ 699 u32 capabilities; 700 }; 701 702 struct qed_mcp_mb_params { 703 u32 cmd; 704 u32 param; 705 void *p_data_src; 706 void *p_data_dst; 707 u8 data_src_size; 708 u8 data_dst_size; 709 u32 mcp_resp; 710 u32 mcp_param; 711 u32 flags; 712 #define QED_MB_FLAG_CAN_SLEEP (0x1 << 0) 713 #define QED_MB_FLAG_AVOID_BLOCK (0x1 << 1) 714 #define QED_MB_FLAGS_IS_SET(params, flag) \ 715 ({ typeof(params) __params = (params); \ 716 (__params && (__params->flags & QED_MB_FLAG_ ## flag)); }) 717 }; 718 719 struct qed_drv_tlv_hdr { 720 u8 tlv_type; 721 u8 tlv_length; /* In dwords - not including this header */ 722 u8 tlv_reserved; 723 #define QED_DRV_TLV_FLAGS_CHANGED 0x01 724 u8 tlv_flags; 725 }; 726 727 /** 728 * @brief Initialize the interface with the MCP 729 * 730 * @param p_hwfn - HW func 731 * @param p_ptt - PTT required for register access 732 * 733 * @return int 734 */ 735 int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, 736 struct qed_ptt *p_ptt); 737 738 /** 739 * @brief Initialize the port interface with the MCP 740 * 741 * @param p_hwfn 742 * @param p_ptt 743 * Can only be called after `num_ports_in_engines' is set 744 */ 745 void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, 746 struct qed_ptt *p_ptt); 747 /** 748 * @brief Releases resources allocated during the init process. 749 * 750 * @param p_hwfn - HW func 751 * @param p_ptt - PTT required for register access 752 * 753 * @return int 754 */ 755 756 int qed_mcp_free(struct qed_hwfn *p_hwfn); 757 758 /** 759 * @brief This function is called from the DPC context. After 760 * pointing PTT to the mfw mb, check for events sent by the MCP 761 * to the driver and ack them. In case a critical event 762 * detected, it will be handled here, otherwise the work will be 763 * queued to a sleepable work-queue. 764 * 765 * @param p_hwfn - HW function 766 * @param p_ptt - PTT required for register access 767 * @return int - 0 - operation 768 * was successul. 769 */ 770 int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 771 struct qed_ptt *p_ptt); 772 773 enum qed_drv_role { 774 QED_DRV_ROLE_OS, 775 QED_DRV_ROLE_KDUMP, 776 }; 777 778 struct qed_load_req_params { 779 /* Input params */ 780 enum qed_drv_role drv_role; 781 u8 timeout_val; 782 bool avoid_eng_reset; 783 enum qed_override_force_load override_force_load; 784 785 /* Output params */ 786 u32 load_code; 787 }; 788 789 /** 790 * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds, 791 * returns whether this PF is the first on the engine/port or function. 792 * 793 * @param p_hwfn 794 * @param p_ptt 795 * @param p_params 796 * 797 * @return int - 0 - Operation was successful. 798 */ 799 int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 800 struct qed_ptt *p_ptt, 801 struct qed_load_req_params *p_params); 802 803 /** 804 * @brief Sends a UNLOAD_REQ message to the MFW 805 * 806 * @param p_hwfn 807 * @param p_ptt 808 * 809 * @return int - 0 - Operation was successful. 810 */ 811 int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 812 813 /** 814 * @brief Sends a UNLOAD_DONE message to the MFW 815 * 816 * @param p_hwfn 817 * @param p_ptt 818 * 819 * @return int - 0 - Operation was successful. 820 */ 821 int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 822 823 /** 824 * @brief Read the MFW mailbox into Current buffer. 825 * 826 * @param p_hwfn 827 * @param p_ptt 828 */ 829 void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, 830 struct qed_ptt *p_ptt); 831 832 /** 833 * @brief Ack to mfw that driver finished FLR process for VFs 834 * 835 * @param p_hwfn 836 * @param p_ptt 837 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks. 838 * 839 * @param return int - 0 upon success. 840 */ 841 int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn, 842 struct qed_ptt *p_ptt, u32 *vfs_to_ack); 843 844 /** 845 * @brief - calls during init to read shmem of all function-related info. 846 * 847 * @param p_hwfn 848 * 849 * @param return 0 upon success. 850 */ 851 int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 852 struct qed_ptt *p_ptt); 853 854 /** 855 * @brief - Reset the MCP using mailbox command. 856 * 857 * @param p_hwfn 858 * @param p_ptt 859 * 860 * @param return 0 upon success. 861 */ 862 int qed_mcp_reset(struct qed_hwfn *p_hwfn, 863 struct qed_ptt *p_ptt); 864 865 /** 866 * @brief - Sends an NVM read command request to the MFW to get 867 * a buffer. 868 * 869 * @param p_hwfn 870 * @param p_ptt 871 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or 872 * DRV_MSG_CODE_NVM_READ_NVRAM commands 873 * @param param - [0:23] - Offset [24:31] - Size 874 * @param o_mcp_resp - MCP response 875 * @param o_mcp_param - MCP response param 876 * @param o_txn_size - Buffer size output 877 * @param o_buf - Pointer to the buffer returned by the MFW. 878 * 879 * @param return 0 upon success. 880 */ 881 int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn, 882 struct qed_ptt *p_ptt, 883 u32 cmd, 884 u32 param, 885 u32 *o_mcp_resp, 886 u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf); 887 888 /** 889 * @brief Read from sfp 890 * 891 * @param p_hwfn - hw function 892 * @param p_ptt - PTT required for register access 893 * @param port - transceiver port 894 * @param addr - I2C address 895 * @param offset - offset in sfp 896 * @param len - buffer length 897 * @param p_buf - buffer to read into 898 * 899 * @return int - 0 - operation was successful. 900 */ 901 int qed_mcp_phy_sfp_read(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 902 u32 port, u32 addr, u32 offset, u32 len, u8 *p_buf); 903 904 /** 905 * @brief indicates whether the MFW objects [under mcp_info] are accessible 906 * 907 * @param p_hwfn 908 * 909 * @return true iff MFW is running and mcp_info is initialized 910 */ 911 bool qed_mcp_is_init(struct qed_hwfn *p_hwfn); 912 913 /** 914 * @brief request MFW to configure MSI-X for a VF 915 * 916 * @param p_hwfn 917 * @param p_ptt 918 * @param vf_id - absolute inside engine 919 * @param num_sbs - number of entries to request 920 * 921 * @return int 922 */ 923 int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, 924 struct qed_ptt *p_ptt, u8 vf_id, u8 num); 925 926 /** 927 * @brief - Halt the MCP. 928 * 929 * @param p_hwfn 930 * @param p_ptt 931 * 932 * @param return 0 upon success. 933 */ 934 int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 935 936 /** 937 * @brief - Wake up the MCP. 938 * 939 * @param p_hwfn 940 * @param p_ptt 941 * 942 * @param return 0 upon success. 943 */ 944 int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 945 946 int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw); 947 int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw); 948 int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn, 949 struct qed_ptt *p_ptt, 950 struct qed_mcp_link_state *p_link, 951 u8 max_bw); 952 int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn, 953 struct qed_ptt *p_ptt, 954 struct qed_mcp_link_state *p_link, 955 u8 min_bw); 956 957 int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn, 958 struct qed_ptt *p_ptt, u32 mask_parities); 959 960 /** 961 * @brief - Sets the MFW's max value for the given resource 962 * 963 * @param p_hwfn 964 * @param p_ptt 965 * @param res_id 966 * @param resc_max_val 967 * @param p_mcp_resp 968 * 969 * @return int - 0 - operation was successful. 970 */ 971 int 972 qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn, 973 struct qed_ptt *p_ptt, 974 enum qed_resources res_id, 975 u32 resc_max_val, u32 *p_mcp_resp); 976 977 /** 978 * @brief - Gets the MFW allocation info for the given resource 979 * 980 * @param p_hwfn 981 * @param p_ptt 982 * @param res_id 983 * @param p_mcp_resp 984 * @param p_resc_num 985 * @param p_resc_start 986 * 987 * @return int - 0 - operation was successful. 988 */ 989 int 990 qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn, 991 struct qed_ptt *p_ptt, 992 enum qed_resources res_id, 993 u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start); 994 995 /** 996 * @brief Send eswitch mode to MFW 997 * 998 * @param p_hwfn 999 * @param p_ptt 1000 * @param eswitch - eswitch mode 1001 * 1002 * @return int - 0 - operation was successful. 1003 */ 1004 int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn, 1005 struct qed_ptt *p_ptt, 1006 enum qed_ov_eswitch eswitch); 1007 1008 #define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP 1009 #define QED_MCP_RESC_LOCK_MAX_VAL 31 1010 1011 enum qed_resc_lock { 1012 QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL, 1013 QED_RESC_LOCK_PTP_PORT0, 1014 QED_RESC_LOCK_PTP_PORT1, 1015 QED_RESC_LOCK_PTP_PORT2, 1016 QED_RESC_LOCK_PTP_PORT3, 1017 QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL, 1018 QED_RESC_LOCK_RESC_INVALID 1019 }; 1020 1021 /** 1022 * @brief - Initiates PF FLR 1023 * 1024 * @param p_hwfn 1025 * @param p_ptt 1026 * 1027 * @return int - 0 - operation was successful. 1028 */ 1029 int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1030 struct qed_resc_lock_params { 1031 /* Resource number [valid values are 0..31] */ 1032 u8 resource; 1033 1034 /* Lock timeout value in seconds [default, none or 1..254] */ 1035 u8 timeout; 1036 #define QED_MCP_RESC_LOCK_TO_DEFAULT 0 1037 #define QED_MCP_RESC_LOCK_TO_NONE 255 1038 1039 /* Number of times to retry locking */ 1040 u8 retry_num; 1041 #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10 1042 1043 /* The interval in usec between retries */ 1044 u16 retry_interval; 1045 #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000 1046 1047 /* Use sleep or delay between retries */ 1048 bool sleep_b4_retry; 1049 1050 /* Will be set as true if the resource is free and granted */ 1051 bool b_granted; 1052 1053 /* Will be filled with the resource owner. 1054 * [0..15 = PF0-15, 16 = MFW] 1055 */ 1056 u8 owner; 1057 }; 1058 1059 /** 1060 * @brief Acquires MFW generic resource lock 1061 * 1062 * @param p_hwfn 1063 * @param p_ptt 1064 * @param p_params 1065 * 1066 * @return int - 0 - operation was successful. 1067 */ 1068 int 1069 qed_mcp_resc_lock(struct qed_hwfn *p_hwfn, 1070 struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params); 1071 1072 struct qed_resc_unlock_params { 1073 /* Resource number [valid values are 0..31] */ 1074 u8 resource; 1075 1076 /* Allow to release a resource even if belongs to another PF */ 1077 bool b_force; 1078 1079 /* Will be set as true if the resource is released */ 1080 bool b_released; 1081 }; 1082 1083 /** 1084 * @brief Releases MFW generic resource lock 1085 * 1086 * @param p_hwfn 1087 * @param p_ptt 1088 * @param p_params 1089 * 1090 * @return int - 0 - operation was successful. 1091 */ 1092 int 1093 qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn, 1094 struct qed_ptt *p_ptt, 1095 struct qed_resc_unlock_params *p_params); 1096 1097 /** 1098 * @brief - default initialization for lock/unlock resource structs 1099 * 1100 * @param p_lock - lock params struct to be initialized; Can be NULL 1101 * @param p_unlock - unlock params struct to be initialized; Can be NULL 1102 * @param resource - the requested resource 1103 * @paral b_is_permanent - disable retries & aging when set 1104 */ 1105 void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock, 1106 struct qed_resc_unlock_params *p_unlock, 1107 enum qed_resc_lock 1108 resource, bool b_is_permanent); 1109 /** 1110 * @brief Learn of supported MFW features; To be done during early init 1111 * 1112 * @param p_hwfn 1113 * @param p_ptt 1114 */ 1115 int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1116 1117 /** 1118 * @brief Inform MFW of set of features supported by driver. Should be done 1119 * inside the content of the LOAD_REQ. 1120 * 1121 * @param p_hwfn 1122 * @param p_ptt 1123 */ 1124 int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1125 1126 /** 1127 * @brief Read ufp config from the shared memory. 1128 * 1129 * @param p_hwfn 1130 * @param p_ptt 1131 */ 1132 void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1133 1134 /** 1135 * @brief Populate the nvm info shadow in the given hardware function 1136 * 1137 * @param p_hwfn 1138 */ 1139 int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn); 1140 1141 #endif 1142