1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef _QED_MCP_H 34 #define _QED_MCP_H 35 36 #include <linux/types.h> 37 #include <linux/delay.h> 38 #include <linux/slab.h> 39 #include <linux/spinlock.h> 40 #include <linux/qed/qed_fcoe_if.h> 41 #include "qed_hsi.h" 42 #include "qed_dev_api.h" 43 44 struct qed_mcp_link_speed_params { 45 bool autoneg; 46 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ 47 u32 forced_speed; /* In Mb/s */ 48 }; 49 50 struct qed_mcp_link_pause_params { 51 bool autoneg; 52 bool forced_rx; 53 bool forced_tx; 54 }; 55 56 enum qed_mcp_eee_mode { 57 QED_MCP_EEE_DISABLED, 58 QED_MCP_EEE_ENABLED, 59 QED_MCP_EEE_UNSUPPORTED 60 }; 61 62 struct qed_mcp_link_params { 63 struct qed_mcp_link_speed_params speed; 64 struct qed_mcp_link_pause_params pause; 65 u32 loopback_mode; 66 struct qed_link_eee_params eee; 67 }; 68 69 struct qed_mcp_link_capabilities { 70 u32 speed_capabilities; 71 bool default_speed_autoneg; 72 enum qed_mcp_eee_mode default_eee; 73 u32 eee_lpi_timer; 74 u8 eee_speed_caps; 75 }; 76 77 struct qed_mcp_link_state { 78 bool link_up; 79 80 u32 min_pf_rate; 81 82 /* Actual link speed in Mb/s */ 83 u32 line_speed; 84 85 /* PF max speed in Mb/s, deduced from line_speed 86 * according to PF max bandwidth configuration. 87 */ 88 u32 speed; 89 bool full_duplex; 90 91 bool an; 92 bool an_complete; 93 bool parallel_detection; 94 bool pfc_enabled; 95 96 #define QED_LINK_PARTNER_SPEED_1G_HD BIT(0) 97 #define QED_LINK_PARTNER_SPEED_1G_FD BIT(1) 98 #define QED_LINK_PARTNER_SPEED_10G BIT(2) 99 #define QED_LINK_PARTNER_SPEED_20G BIT(3) 100 #define QED_LINK_PARTNER_SPEED_25G BIT(4) 101 #define QED_LINK_PARTNER_SPEED_40G BIT(5) 102 #define QED_LINK_PARTNER_SPEED_50G BIT(6) 103 #define QED_LINK_PARTNER_SPEED_100G BIT(7) 104 u32 partner_adv_speed; 105 106 bool partner_tx_flow_ctrl_en; 107 bool partner_rx_flow_ctrl_en; 108 109 #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1) 110 #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2) 111 #define QED_LINK_PARTNER_BOTH_PAUSE (3) 112 u8 partner_adv_pause; 113 114 bool sfp_tx_fault; 115 bool eee_active; 116 u8 eee_adv_caps; 117 u8 eee_lp_adv_caps; 118 }; 119 120 struct qed_mcp_function_info { 121 u8 pause_on_host; 122 123 enum qed_pci_personality protocol; 124 125 u8 bandwidth_min; 126 u8 bandwidth_max; 127 128 u8 mac[ETH_ALEN]; 129 130 u64 wwn_port; 131 u64 wwn_node; 132 133 #define QED_MCP_VLAN_UNSET (0xffff) 134 u16 ovlan; 135 136 u16 mtu; 137 }; 138 139 struct qed_mcp_nvm_common { 140 u32 offset; 141 u32 param; 142 u32 resp; 143 u32 cmd; 144 }; 145 146 struct qed_mcp_drv_version { 147 u32 version; 148 u8 name[MCP_DRV_VER_STR_SIZE - 4]; 149 }; 150 151 struct qed_mcp_lan_stats { 152 u64 ucast_rx_pkts; 153 u64 ucast_tx_pkts; 154 u32 fcs_err; 155 }; 156 157 struct qed_mcp_fcoe_stats { 158 u64 rx_pkts; 159 u64 tx_pkts; 160 u32 fcs_err; 161 u32 login_failure; 162 }; 163 164 struct qed_mcp_iscsi_stats { 165 u64 rx_pdus; 166 u64 tx_pdus; 167 u64 rx_bytes; 168 u64 tx_bytes; 169 }; 170 171 struct qed_mcp_rdma_stats { 172 u64 rx_pkts; 173 u64 tx_pkts; 174 u64 rx_bytes; 175 u64 tx_byts; 176 }; 177 178 enum qed_mcp_protocol_type { 179 QED_MCP_LAN_STATS, 180 QED_MCP_FCOE_STATS, 181 QED_MCP_ISCSI_STATS, 182 QED_MCP_RDMA_STATS 183 }; 184 185 union qed_mcp_protocol_stats { 186 struct qed_mcp_lan_stats lan_stats; 187 struct qed_mcp_fcoe_stats fcoe_stats; 188 struct qed_mcp_iscsi_stats iscsi_stats; 189 struct qed_mcp_rdma_stats rdma_stats; 190 }; 191 192 enum qed_ov_eswitch { 193 QED_OV_ESWITCH_NONE, 194 QED_OV_ESWITCH_VEB, 195 QED_OV_ESWITCH_VEPA 196 }; 197 198 enum qed_ov_client { 199 QED_OV_CLIENT_DRV, 200 QED_OV_CLIENT_USER, 201 QED_OV_CLIENT_VENDOR_SPEC 202 }; 203 204 enum qed_ov_driver_state { 205 QED_OV_DRIVER_STATE_NOT_LOADED, 206 QED_OV_DRIVER_STATE_DISABLED, 207 QED_OV_DRIVER_STATE_ACTIVE 208 }; 209 210 enum qed_ov_wol { 211 QED_OV_WOL_DEFAULT, 212 QED_OV_WOL_DISABLED, 213 QED_OV_WOL_ENABLED 214 }; 215 216 enum qed_mfw_tlv_type { 217 QED_MFW_TLV_GENERIC = 0x1, /* Core driver TLVs */ 218 QED_MFW_TLV_ETH = 0x2, /* L2 driver TLVs */ 219 QED_MFW_TLV_FCOE = 0x4, /* FCoE protocol TLVs */ 220 QED_MFW_TLV_ISCSI = 0x8, /* SCSI protocol TLVs */ 221 QED_MFW_TLV_MAX = 0x16, 222 }; 223 224 struct qed_mfw_tlv_generic { 225 #define QED_MFW_TLV_FLAGS_SIZE 2 226 struct { 227 u8 ipv4_csum_offload; 228 u8 lso_supported; 229 bool b_set; 230 } flags; 231 232 #define QED_MFW_TLV_MAC_COUNT 3 233 /* First entry for primary MAC, 2 secondary MACs possible */ 234 u8 mac[QED_MFW_TLV_MAC_COUNT][6]; 235 bool mac_set[QED_MFW_TLV_MAC_COUNT]; 236 237 u64 rx_frames; 238 bool rx_frames_set; 239 u64 rx_bytes; 240 bool rx_bytes_set; 241 u64 tx_frames; 242 bool tx_frames_set; 243 u64 tx_bytes; 244 bool tx_bytes_set; 245 }; 246 247 union qed_mfw_tlv_data { 248 struct qed_mfw_tlv_generic generic; 249 struct qed_mfw_tlv_eth eth; 250 struct qed_mfw_tlv_fcoe fcoe; 251 struct qed_mfw_tlv_iscsi iscsi; 252 }; 253 254 /** 255 * @brief - returns the link params of the hw function 256 * 257 * @param p_hwfn 258 * 259 * @returns pointer to link params 260 */ 261 struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *); 262 263 /** 264 * @brief - return the link state of the hw function 265 * 266 * @param p_hwfn 267 * 268 * @returns pointer to link state 269 */ 270 struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *); 271 272 /** 273 * @brief - return the link capabilities of the hw function 274 * 275 * @param p_hwfn 276 * 277 * @returns pointer to link capabilities 278 */ 279 struct qed_mcp_link_capabilities 280 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn); 281 282 /** 283 * @brief Request the MFW to set the the link according to 'link_input'. 284 * 285 * @param p_hwfn 286 * @param p_ptt 287 * @param b_up - raise link if `true'. Reset link if `false'. 288 * 289 * @return int 290 */ 291 int qed_mcp_set_link(struct qed_hwfn *p_hwfn, 292 struct qed_ptt *p_ptt, 293 bool b_up); 294 295 /** 296 * @brief Get the management firmware version value 297 * 298 * @param p_hwfn 299 * @param p_ptt 300 * @param p_mfw_ver - mfw version value 301 * @param p_running_bundle_id - image id in nvram; Optional. 302 * 303 * @return int - 0 - operation was successful. 304 */ 305 int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, 306 struct qed_ptt *p_ptt, 307 u32 *p_mfw_ver, u32 *p_running_bundle_id); 308 309 /** 310 * @brief Get the MBI version value 311 * 312 * @param p_hwfn 313 * @param p_ptt 314 * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version. 315 * 316 * @return int - 0 - operation was successful. 317 */ 318 int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn, 319 struct qed_ptt *p_ptt, u32 *p_mbi_ver); 320 321 /** 322 * @brief Get media type value of the port. 323 * 324 * @param cdev - qed dev pointer 325 * @param mfw_ver - media type value 326 * 327 * @return int - 328 * 0 - Operation was successul. 329 * -EBUSY - Operation failed 330 */ 331 int qed_mcp_get_media_type(struct qed_dev *cdev, 332 u32 *media_type); 333 334 /** 335 * @brief General function for sending commands to the MCP 336 * mailbox. It acquire mutex lock for the entire 337 * operation, from sending the request until the MCP 338 * response. Waiting for MCP response will be checked up 339 * to 5 seconds every 5ms. 340 * 341 * @param p_hwfn - hw function 342 * @param p_ptt - PTT required for register access 343 * @param cmd - command to be sent to the MCP. 344 * @param param - Optional param 345 * @param o_mcp_resp - The MCP response code (exclude sequence). 346 * @param o_mcp_param- Optional parameter provided by the MCP 347 * response 348 * @return int - 0 - operation 349 * was successul. 350 */ 351 int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 352 struct qed_ptt *p_ptt, 353 u32 cmd, 354 u32 param, 355 u32 *o_mcp_resp, 356 u32 *o_mcp_param); 357 358 /** 359 * @brief - drains the nig, allowing completion to pass in case of pauses. 360 * (Should be called only from sleepable context) 361 * 362 * @param p_hwfn 363 * @param p_ptt 364 */ 365 int qed_mcp_drain(struct qed_hwfn *p_hwfn, 366 struct qed_ptt *p_ptt); 367 368 /** 369 * @brief Get the flash size value 370 * 371 * @param p_hwfn 372 * @param p_ptt 373 * @param p_flash_size - flash size in bytes to be filled. 374 * 375 * @return int - 0 - operation was successul. 376 */ 377 int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 378 struct qed_ptt *p_ptt, 379 u32 *p_flash_size); 380 381 /** 382 * @brief Send driver version to MFW 383 * 384 * @param p_hwfn 385 * @param p_ptt 386 * @param version - Version value 387 * @param name - Protocol driver name 388 * 389 * @return int - 0 - operation was successul. 390 */ 391 int 392 qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 393 struct qed_ptt *p_ptt, 394 struct qed_mcp_drv_version *p_ver); 395 396 /** 397 * @brief Notify MFW about the change in base device properties 398 * 399 * @param p_hwfn 400 * @param p_ptt 401 * @param client - qed client type 402 * 403 * @return int - 0 - operation was successful. 404 */ 405 int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn, 406 struct qed_ptt *p_ptt, 407 enum qed_ov_client client); 408 409 /** 410 * @brief Notify MFW about the driver state 411 * 412 * @param p_hwfn 413 * @param p_ptt 414 * @param drv_state - Driver state 415 * 416 * @return int - 0 - operation was successful. 417 */ 418 int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn, 419 struct qed_ptt *p_ptt, 420 enum qed_ov_driver_state drv_state); 421 422 /** 423 * @brief Send MTU size to MFW 424 * 425 * @param p_hwfn 426 * @param p_ptt 427 * @param mtu - MTU size 428 * 429 * @return int - 0 - operation was successful. 430 */ 431 int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn, 432 struct qed_ptt *p_ptt, u16 mtu); 433 434 /** 435 * @brief Send MAC address to MFW 436 * 437 * @param p_hwfn 438 * @param p_ptt 439 * @param mac - MAC address 440 * 441 * @return int - 0 - operation was successful. 442 */ 443 int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn, 444 struct qed_ptt *p_ptt, u8 *mac); 445 446 /** 447 * @brief Send WOL mode to MFW 448 * 449 * @param p_hwfn 450 * @param p_ptt 451 * @param wol - WOL mode 452 * 453 * @return int - 0 - operation was successful. 454 */ 455 int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn, 456 struct qed_ptt *p_ptt, 457 enum qed_ov_wol wol); 458 459 /** 460 * @brief Set LED status 461 * 462 * @param p_hwfn 463 * @param p_ptt 464 * @param mode - LED mode 465 * 466 * @return int - 0 - operation was successful. 467 */ 468 int qed_mcp_set_led(struct qed_hwfn *p_hwfn, 469 struct qed_ptt *p_ptt, 470 enum qed_led_mode mode); 471 472 /** 473 * @brief Read from nvm 474 * 475 * @param cdev 476 * @param addr - nvm offset 477 * @param p_buf - nvm read buffer 478 * @param len - buffer len 479 * 480 * @return int - 0 - operation was successful. 481 */ 482 int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len); 483 484 /** 485 * @brief Write to nvm 486 * 487 * @param cdev 488 * @param addr - nvm offset 489 * @param cmd - nvm command 490 * @param p_buf - nvm write buffer 491 * @param len - buffer len 492 * 493 * @return int - 0 - operation was successful. 494 */ 495 int qed_mcp_nvm_write(struct qed_dev *cdev, 496 u32 cmd, u32 addr, u8 *p_buf, u32 len); 497 498 /** 499 * @brief Put file begin 500 * 501 * @param cdev 502 * @param addr - nvm offset 503 * 504 * @return int - 0 - operation was successful. 505 */ 506 int qed_mcp_nvm_put_file_begin(struct qed_dev *cdev, u32 addr); 507 508 /** 509 * @brief Check latest response 510 * 511 * @param cdev 512 * @param p_buf - nvm write buffer 513 * 514 * @return int - 0 - operation was successful. 515 */ 516 int qed_mcp_nvm_resp(struct qed_dev *cdev, u8 *p_buf); 517 518 struct qed_nvm_image_att { 519 u32 start_addr; 520 u32 length; 521 }; 522 523 /** 524 * @brief Allows reading a whole nvram image 525 * 526 * @param p_hwfn 527 * @param image_id - image to get attributes for 528 * @param p_image_att - image attributes structure into which to fill data 529 * 530 * @return int - 0 - operation was successful. 531 */ 532 int 533 qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn, 534 enum qed_nvm_images image_id, 535 struct qed_nvm_image_att *p_image_att); 536 537 /** 538 * @brief Allows reading a whole nvram image 539 * 540 * @param p_hwfn 541 * @param image_id - image requested for reading 542 * @param p_buffer - allocated buffer into which to fill data 543 * @param buffer_len - length of the allocated buffer. 544 * 545 * @return 0 iff p_buffer now contains the nvram image. 546 */ 547 int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn, 548 enum qed_nvm_images image_id, 549 u8 *p_buffer, u32 buffer_len); 550 551 /** 552 * @brief Bist register test 553 * 554 * @param p_hwfn - hw function 555 * @param p_ptt - PTT required for register access 556 * 557 * @return int - 0 - operation was successful. 558 */ 559 int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, 560 struct qed_ptt *p_ptt); 561 562 /** 563 * @brief Bist clock test 564 * 565 * @param p_hwfn - hw function 566 * @param p_ptt - PTT required for register access 567 * 568 * @return int - 0 - operation was successful. 569 */ 570 int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, 571 struct qed_ptt *p_ptt); 572 573 /** 574 * @brief Bist nvm test - get number of images 575 * 576 * @param p_hwfn - hw function 577 * @param p_ptt - PTT required for register access 578 * @param num_images - number of images if operation was 579 * successful. 0 if not. 580 * 581 * @return int - 0 - operation was successful. 582 */ 583 int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn, 584 struct qed_ptt *p_ptt, 585 u32 *num_images); 586 587 /** 588 * @brief Bist nvm test - get image attributes by index 589 * 590 * @param p_hwfn - hw function 591 * @param p_ptt - PTT required for register access 592 * @param p_image_att - Attributes of image 593 * @param image_index - Index of image to get information for 594 * 595 * @return int - 0 - operation was successful. 596 */ 597 int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn, 598 struct qed_ptt *p_ptt, 599 struct bist_nvm_image_att *p_image_att, 600 u32 image_index); 601 602 /** 603 * @brief - Processes the TLV request from MFW i.e., get the required TLV info 604 * from the qed client and send it to the MFW. 605 * 606 * @param p_hwfn 607 * @param p_ptt 608 * 609 * @param return 0 upon success. 610 */ 611 int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 612 613 /* Using hwfn number (and not pf_num) is required since in CMT mode, 614 * same pf_num may be used by two different hwfn 615 * TODO - this shouldn't really be in .h file, but until all fields 616 * required during hw-init will be placed in their correct place in shmem 617 * we need it in qed_dev.c [for readin the nvram reflection in shmem]. 618 */ 619 #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \ 620 ((rel_pfid) | \ 621 ((p_hwfn)->abs_pf_id & 1) << 3) : \ 622 rel_pfid) 623 #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id) 624 625 #define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \ 626 ((_p_hwfn)->cdev->num_ports_in_engine * \ 627 qed_device_num_engines((_p_hwfn)->cdev))) 628 629 struct qed_mcp_info { 630 /* List for mailbox commands which were sent and wait for a response */ 631 struct list_head cmd_list; 632 633 /* Spinlock used for protecting the access to the mailbox commands list 634 * and the sending of the commands. 635 */ 636 spinlock_t cmd_lock; 637 638 /* Spinlock used for syncing SW link-changes and link-changes 639 * originating from attention context. 640 */ 641 spinlock_t link_lock; 642 bool block_mb_sending; 643 u32 public_base; 644 u32 drv_mb_addr; 645 u32 mfw_mb_addr; 646 u32 port_addr; 647 u16 drv_mb_seq; 648 u16 drv_pulse_seq; 649 struct qed_mcp_link_params link_input; 650 struct qed_mcp_link_state link_output; 651 struct qed_mcp_link_capabilities link_capabilities; 652 struct qed_mcp_function_info func_info; 653 u8 *mfw_mb_cur; 654 u8 *mfw_mb_shadow; 655 u16 mfw_mb_length; 656 u32 mcp_hist; 657 658 /* Capabilties negotiated with the MFW */ 659 u32 capabilities; 660 }; 661 662 struct qed_mcp_mb_params { 663 u32 cmd; 664 u32 param; 665 void *p_data_src; 666 u8 data_src_size; 667 void *p_data_dst; 668 u8 data_dst_size; 669 u32 mcp_resp; 670 u32 mcp_param; 671 }; 672 673 struct qed_drv_tlv_hdr { 674 u8 tlv_type; 675 u8 tlv_length; /* In dwords - not including this header */ 676 u8 tlv_reserved; 677 #define QED_DRV_TLV_FLAGS_CHANGED 0x01 678 u8 tlv_flags; 679 }; 680 681 /** 682 * @brief Initialize the interface with the MCP 683 * 684 * @param p_hwfn - HW func 685 * @param p_ptt - PTT required for register access 686 * 687 * @return int 688 */ 689 int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, 690 struct qed_ptt *p_ptt); 691 692 /** 693 * @brief Initialize the port interface with the MCP 694 * 695 * @param p_hwfn 696 * @param p_ptt 697 * Can only be called after `num_ports_in_engines' is set 698 */ 699 void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, 700 struct qed_ptt *p_ptt); 701 /** 702 * @brief Releases resources allocated during the init process. 703 * 704 * @param p_hwfn - HW func 705 * @param p_ptt - PTT required for register access 706 * 707 * @return int 708 */ 709 710 int qed_mcp_free(struct qed_hwfn *p_hwfn); 711 712 /** 713 * @brief This function is called from the DPC context. After 714 * pointing PTT to the mfw mb, check for events sent by the MCP 715 * to the driver and ack them. In case a critical event 716 * detected, it will be handled here, otherwise the work will be 717 * queued to a sleepable work-queue. 718 * 719 * @param p_hwfn - HW function 720 * @param p_ptt - PTT required for register access 721 * @return int - 0 - operation 722 * was successul. 723 */ 724 int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 725 struct qed_ptt *p_ptt); 726 727 enum qed_drv_role { 728 QED_DRV_ROLE_OS, 729 QED_DRV_ROLE_KDUMP, 730 }; 731 732 struct qed_load_req_params { 733 /* Input params */ 734 enum qed_drv_role drv_role; 735 u8 timeout_val; 736 bool avoid_eng_reset; 737 enum qed_override_force_load override_force_load; 738 739 /* Output params */ 740 u32 load_code; 741 }; 742 743 /** 744 * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds, 745 * returns whether this PF is the first on the engine/port or function. 746 * 747 * @param p_hwfn 748 * @param p_ptt 749 * @param p_params 750 * 751 * @return int - 0 - Operation was successful. 752 */ 753 int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 754 struct qed_ptt *p_ptt, 755 struct qed_load_req_params *p_params); 756 757 /** 758 * @brief Sends a UNLOAD_REQ message to the MFW 759 * 760 * @param p_hwfn 761 * @param p_ptt 762 * 763 * @return int - 0 - Operation was successful. 764 */ 765 int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 766 767 /** 768 * @brief Sends a UNLOAD_DONE message to the MFW 769 * 770 * @param p_hwfn 771 * @param p_ptt 772 * 773 * @return int - 0 - Operation was successful. 774 */ 775 int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 776 777 /** 778 * @brief Read the MFW mailbox into Current buffer. 779 * 780 * @param p_hwfn 781 * @param p_ptt 782 */ 783 void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, 784 struct qed_ptt *p_ptt); 785 786 /** 787 * @brief Ack to mfw that driver finished FLR process for VFs 788 * 789 * @param p_hwfn 790 * @param p_ptt 791 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks. 792 * 793 * @param return int - 0 upon success. 794 */ 795 int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn, 796 struct qed_ptt *p_ptt, u32 *vfs_to_ack); 797 798 /** 799 * @brief - calls during init to read shmem of all function-related info. 800 * 801 * @param p_hwfn 802 * 803 * @param return 0 upon success. 804 */ 805 int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 806 struct qed_ptt *p_ptt); 807 808 /** 809 * @brief - Reset the MCP using mailbox command. 810 * 811 * @param p_hwfn 812 * @param p_ptt 813 * 814 * @param return 0 upon success. 815 */ 816 int qed_mcp_reset(struct qed_hwfn *p_hwfn, 817 struct qed_ptt *p_ptt); 818 819 /** 820 * @brief - Sends an NVM read command request to the MFW to get 821 * a buffer. 822 * 823 * @param p_hwfn 824 * @param p_ptt 825 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or 826 * DRV_MSG_CODE_NVM_READ_NVRAM commands 827 * @param param - [0:23] - Offset [24:31] - Size 828 * @param o_mcp_resp - MCP response 829 * @param o_mcp_param - MCP response param 830 * @param o_txn_size - Buffer size output 831 * @param o_buf - Pointer to the buffer returned by the MFW. 832 * 833 * @param return 0 upon success. 834 */ 835 int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn, 836 struct qed_ptt *p_ptt, 837 u32 cmd, 838 u32 param, 839 u32 *o_mcp_resp, 840 u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf); 841 842 /** 843 * @brief indicates whether the MFW objects [under mcp_info] are accessible 844 * 845 * @param p_hwfn 846 * 847 * @return true iff MFW is running and mcp_info is initialized 848 */ 849 bool qed_mcp_is_init(struct qed_hwfn *p_hwfn); 850 851 /** 852 * @brief request MFW to configure MSI-X for a VF 853 * 854 * @param p_hwfn 855 * @param p_ptt 856 * @param vf_id - absolute inside engine 857 * @param num_sbs - number of entries to request 858 * 859 * @return int 860 */ 861 int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, 862 struct qed_ptt *p_ptt, u8 vf_id, u8 num); 863 864 /** 865 * @brief - Halt the MCP. 866 * 867 * @param p_hwfn 868 * @param p_ptt 869 * 870 * @param return 0 upon success. 871 */ 872 int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 873 874 /** 875 * @brief - Wake up the MCP. 876 * 877 * @param p_hwfn 878 * @param p_ptt 879 * 880 * @param return 0 upon success. 881 */ 882 int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 883 884 int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw); 885 int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw); 886 int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn, 887 struct qed_ptt *p_ptt, 888 struct qed_mcp_link_state *p_link, 889 u8 max_bw); 890 int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn, 891 struct qed_ptt *p_ptt, 892 struct qed_mcp_link_state *p_link, 893 u8 min_bw); 894 895 int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn, 896 struct qed_ptt *p_ptt, u32 mask_parities); 897 898 /** 899 * @brief - Sets the MFW's max value for the given resource 900 * 901 * @param p_hwfn 902 * @param p_ptt 903 * @param res_id 904 * @param resc_max_val 905 * @param p_mcp_resp 906 * 907 * @return int - 0 - operation was successful. 908 */ 909 int 910 qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn, 911 struct qed_ptt *p_ptt, 912 enum qed_resources res_id, 913 u32 resc_max_val, u32 *p_mcp_resp); 914 915 /** 916 * @brief - Gets the MFW allocation info for the given resource 917 * 918 * @param p_hwfn 919 * @param p_ptt 920 * @param res_id 921 * @param p_mcp_resp 922 * @param p_resc_num 923 * @param p_resc_start 924 * 925 * @return int - 0 - operation was successful. 926 */ 927 int 928 qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn, 929 struct qed_ptt *p_ptt, 930 enum qed_resources res_id, 931 u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start); 932 933 /** 934 * @brief Send eswitch mode to MFW 935 * 936 * @param p_hwfn 937 * @param p_ptt 938 * @param eswitch - eswitch mode 939 * 940 * @return int - 0 - operation was successful. 941 */ 942 int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn, 943 struct qed_ptt *p_ptt, 944 enum qed_ov_eswitch eswitch); 945 946 #define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP 947 #define QED_MCP_RESC_LOCK_MAX_VAL 31 948 949 enum qed_resc_lock { 950 QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL, 951 QED_RESC_LOCK_PTP_PORT0, 952 QED_RESC_LOCK_PTP_PORT1, 953 QED_RESC_LOCK_PTP_PORT2, 954 QED_RESC_LOCK_PTP_PORT3, 955 QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL, 956 QED_RESC_LOCK_RESC_INVALID 957 }; 958 959 /** 960 * @brief - Initiates PF FLR 961 * 962 * @param p_hwfn 963 * @param p_ptt 964 * 965 * @return int - 0 - operation was successful. 966 */ 967 int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 968 struct qed_resc_lock_params { 969 /* Resource number [valid values are 0..31] */ 970 u8 resource; 971 972 /* Lock timeout value in seconds [default, none or 1..254] */ 973 u8 timeout; 974 #define QED_MCP_RESC_LOCK_TO_DEFAULT 0 975 #define QED_MCP_RESC_LOCK_TO_NONE 255 976 977 /* Number of times to retry locking */ 978 u8 retry_num; 979 #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10 980 981 /* The interval in usec between retries */ 982 u16 retry_interval; 983 #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000 984 985 /* Use sleep or delay between retries */ 986 bool sleep_b4_retry; 987 988 /* Will be set as true if the resource is free and granted */ 989 bool b_granted; 990 991 /* Will be filled with the resource owner. 992 * [0..15 = PF0-15, 16 = MFW] 993 */ 994 u8 owner; 995 }; 996 997 /** 998 * @brief Acquires MFW generic resource lock 999 * 1000 * @param p_hwfn 1001 * @param p_ptt 1002 * @param p_params 1003 * 1004 * @return int - 0 - operation was successful. 1005 */ 1006 int 1007 qed_mcp_resc_lock(struct qed_hwfn *p_hwfn, 1008 struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params); 1009 1010 struct qed_resc_unlock_params { 1011 /* Resource number [valid values are 0..31] */ 1012 u8 resource; 1013 1014 /* Allow to release a resource even if belongs to another PF */ 1015 bool b_force; 1016 1017 /* Will be set as true if the resource is released */ 1018 bool b_released; 1019 }; 1020 1021 /** 1022 * @brief Releases MFW generic resource lock 1023 * 1024 * @param p_hwfn 1025 * @param p_ptt 1026 * @param p_params 1027 * 1028 * @return int - 0 - operation was successful. 1029 */ 1030 int 1031 qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn, 1032 struct qed_ptt *p_ptt, 1033 struct qed_resc_unlock_params *p_params); 1034 1035 /** 1036 * @brief - default initialization for lock/unlock resource structs 1037 * 1038 * @param p_lock - lock params struct to be initialized; Can be NULL 1039 * @param p_unlock - unlock params struct to be initialized; Can be NULL 1040 * @param resource - the requested resource 1041 * @paral b_is_permanent - disable retries & aging when set 1042 */ 1043 void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock, 1044 struct qed_resc_unlock_params *p_unlock, 1045 enum qed_resc_lock 1046 resource, bool b_is_permanent); 1047 /** 1048 * @brief Learn of supported MFW features; To be done during early init 1049 * 1050 * @param p_hwfn 1051 * @param p_ptt 1052 */ 1053 int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1054 1055 /** 1056 * @brief Inform MFW of set of features supported by driver. Should be done 1057 * inside the content of the LOAD_REQ. 1058 * 1059 * @param p_hwfn 1060 * @param p_ptt 1061 */ 1062 int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1063 1064 /** 1065 * @brief Read ufp config from the shared memory. 1066 * 1067 * @param p_hwfn 1068 * @param p_ptt 1069 */ 1070 void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1071 1072 /** 1073 * @brief Populate the nvm info shadow in the given hardware function 1074 * 1075 * @param p_hwfn 1076 */ 1077 int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn); 1078 1079 #endif 1080