1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef _QED_MCP_H 34 #define _QED_MCP_H 35 36 #include <linux/types.h> 37 #include <linux/delay.h> 38 #include <linux/slab.h> 39 #include <linux/spinlock.h> 40 #include <linux/qed/qed_fcoe_if.h> 41 #include "qed_hsi.h" 42 #include "qed_dev_api.h" 43 44 struct qed_mcp_link_speed_params { 45 bool autoneg; 46 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ 47 u32 forced_speed; /* In Mb/s */ 48 }; 49 50 struct qed_mcp_link_pause_params { 51 bool autoneg; 52 bool forced_rx; 53 bool forced_tx; 54 }; 55 56 enum qed_mcp_eee_mode { 57 QED_MCP_EEE_DISABLED, 58 QED_MCP_EEE_ENABLED, 59 QED_MCP_EEE_UNSUPPORTED 60 }; 61 62 struct qed_mcp_link_params { 63 struct qed_mcp_link_speed_params speed; 64 struct qed_mcp_link_pause_params pause; 65 u32 loopback_mode; 66 struct qed_link_eee_params eee; 67 }; 68 69 struct qed_mcp_link_capabilities { 70 u32 speed_capabilities; 71 bool default_speed_autoneg; 72 enum qed_mcp_eee_mode default_eee; 73 u32 eee_lpi_timer; 74 u8 eee_speed_caps; 75 }; 76 77 struct qed_mcp_link_state { 78 bool link_up; 79 80 u32 min_pf_rate; 81 82 /* Actual link speed in Mb/s */ 83 u32 line_speed; 84 85 /* PF max speed in Mb/s, deduced from line_speed 86 * according to PF max bandwidth configuration. 87 */ 88 u32 speed; 89 bool full_duplex; 90 91 bool an; 92 bool an_complete; 93 bool parallel_detection; 94 bool pfc_enabled; 95 96 #define QED_LINK_PARTNER_SPEED_1G_HD BIT(0) 97 #define QED_LINK_PARTNER_SPEED_1G_FD BIT(1) 98 #define QED_LINK_PARTNER_SPEED_10G BIT(2) 99 #define QED_LINK_PARTNER_SPEED_20G BIT(3) 100 #define QED_LINK_PARTNER_SPEED_25G BIT(4) 101 #define QED_LINK_PARTNER_SPEED_40G BIT(5) 102 #define QED_LINK_PARTNER_SPEED_50G BIT(6) 103 #define QED_LINK_PARTNER_SPEED_100G BIT(7) 104 u32 partner_adv_speed; 105 106 bool partner_tx_flow_ctrl_en; 107 bool partner_rx_flow_ctrl_en; 108 109 #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1) 110 #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2) 111 #define QED_LINK_PARTNER_BOTH_PAUSE (3) 112 u8 partner_adv_pause; 113 114 bool sfp_tx_fault; 115 bool eee_active; 116 u8 eee_adv_caps; 117 u8 eee_lp_adv_caps; 118 }; 119 120 struct qed_mcp_function_info { 121 u8 pause_on_host; 122 123 enum qed_pci_personality protocol; 124 125 u8 bandwidth_min; 126 u8 bandwidth_max; 127 128 u8 mac[ETH_ALEN]; 129 130 u64 wwn_port; 131 u64 wwn_node; 132 133 #define QED_MCP_VLAN_UNSET (0xffff) 134 u16 ovlan; 135 136 u16 mtu; 137 }; 138 139 struct qed_mcp_nvm_common { 140 u32 offset; 141 u32 param; 142 u32 resp; 143 u32 cmd; 144 }; 145 146 struct qed_mcp_drv_version { 147 u32 version; 148 u8 name[MCP_DRV_VER_STR_SIZE - 4]; 149 }; 150 151 struct qed_mcp_lan_stats { 152 u64 ucast_rx_pkts; 153 u64 ucast_tx_pkts; 154 u32 fcs_err; 155 }; 156 157 struct qed_mcp_fcoe_stats { 158 u64 rx_pkts; 159 u64 tx_pkts; 160 u32 fcs_err; 161 u32 login_failure; 162 }; 163 164 struct qed_mcp_iscsi_stats { 165 u64 rx_pdus; 166 u64 tx_pdus; 167 u64 rx_bytes; 168 u64 tx_bytes; 169 }; 170 171 struct qed_mcp_rdma_stats { 172 u64 rx_pkts; 173 u64 tx_pkts; 174 u64 rx_bytes; 175 u64 tx_byts; 176 }; 177 178 enum qed_mcp_protocol_type { 179 QED_MCP_LAN_STATS, 180 QED_MCP_FCOE_STATS, 181 QED_MCP_ISCSI_STATS, 182 QED_MCP_RDMA_STATS 183 }; 184 185 union qed_mcp_protocol_stats { 186 struct qed_mcp_lan_stats lan_stats; 187 struct qed_mcp_fcoe_stats fcoe_stats; 188 struct qed_mcp_iscsi_stats iscsi_stats; 189 struct qed_mcp_rdma_stats rdma_stats; 190 }; 191 192 enum qed_ov_eswitch { 193 QED_OV_ESWITCH_NONE, 194 QED_OV_ESWITCH_VEB, 195 QED_OV_ESWITCH_VEPA 196 }; 197 198 enum qed_ov_client { 199 QED_OV_CLIENT_DRV, 200 QED_OV_CLIENT_USER, 201 QED_OV_CLIENT_VENDOR_SPEC 202 }; 203 204 enum qed_ov_driver_state { 205 QED_OV_DRIVER_STATE_NOT_LOADED, 206 QED_OV_DRIVER_STATE_DISABLED, 207 QED_OV_DRIVER_STATE_ACTIVE 208 }; 209 210 enum qed_ov_wol { 211 QED_OV_WOL_DEFAULT, 212 QED_OV_WOL_DISABLED, 213 QED_OV_WOL_ENABLED 214 }; 215 216 enum qed_mfw_tlv_type { 217 QED_MFW_TLV_GENERIC = 0x1, /* Core driver TLVs */ 218 QED_MFW_TLV_ETH = 0x2, /* L2 driver TLVs */ 219 QED_MFW_TLV_FCOE = 0x4, /* FCoE protocol TLVs */ 220 QED_MFW_TLV_ISCSI = 0x8, /* SCSI protocol TLVs */ 221 QED_MFW_TLV_MAX = 0x16, 222 }; 223 224 struct qed_mfw_tlv_generic { 225 #define QED_MFW_TLV_FLAGS_SIZE 2 226 struct { 227 u8 ipv4_csum_offload; 228 u8 lso_supported; 229 bool b_set; 230 } flags; 231 232 #define QED_MFW_TLV_MAC_COUNT 3 233 /* First entry for primary MAC, 2 secondary MACs possible */ 234 u8 mac[QED_MFW_TLV_MAC_COUNT][6]; 235 bool mac_set[QED_MFW_TLV_MAC_COUNT]; 236 237 u64 rx_frames; 238 bool rx_frames_set; 239 u64 rx_bytes; 240 bool rx_bytes_set; 241 u64 tx_frames; 242 bool tx_frames_set; 243 u64 tx_bytes; 244 bool tx_bytes_set; 245 }; 246 247 union qed_mfw_tlv_data { 248 struct qed_mfw_tlv_generic generic; 249 struct qed_mfw_tlv_eth eth; 250 struct qed_mfw_tlv_fcoe fcoe; 251 struct qed_mfw_tlv_iscsi iscsi; 252 }; 253 254 /** 255 * @brief - returns the link params of the hw function 256 * 257 * @param p_hwfn 258 * 259 * @returns pointer to link params 260 */ 261 struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *); 262 263 /** 264 * @brief - return the link state of the hw function 265 * 266 * @param p_hwfn 267 * 268 * @returns pointer to link state 269 */ 270 struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *); 271 272 /** 273 * @brief - return the link capabilities of the hw function 274 * 275 * @param p_hwfn 276 * 277 * @returns pointer to link capabilities 278 */ 279 struct qed_mcp_link_capabilities 280 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn); 281 282 /** 283 * @brief Request the MFW to set the the link according to 'link_input'. 284 * 285 * @param p_hwfn 286 * @param p_ptt 287 * @param b_up - raise link if `true'. Reset link if `false'. 288 * 289 * @return int 290 */ 291 int qed_mcp_set_link(struct qed_hwfn *p_hwfn, 292 struct qed_ptt *p_ptt, 293 bool b_up); 294 295 /** 296 * @brief Get the management firmware version value 297 * 298 * @param p_hwfn 299 * @param p_ptt 300 * @param p_mfw_ver - mfw version value 301 * @param p_running_bundle_id - image id in nvram; Optional. 302 * 303 * @return int - 0 - operation was successful. 304 */ 305 int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, 306 struct qed_ptt *p_ptt, 307 u32 *p_mfw_ver, u32 *p_running_bundle_id); 308 309 /** 310 * @brief Get the MBI version value 311 * 312 * @param p_hwfn 313 * @param p_ptt 314 * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version. 315 * 316 * @return int - 0 - operation was successful. 317 */ 318 int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn, 319 struct qed_ptt *p_ptt, u32 *p_mbi_ver); 320 321 /** 322 * @brief Get media type value of the port. 323 * 324 * @param cdev - qed dev pointer 325 * @param p_ptt 326 * @param mfw_ver - media type value 327 * 328 * @return int - 329 * 0 - Operation was successul. 330 * -EBUSY - Operation failed 331 */ 332 int qed_mcp_get_media_type(struct qed_hwfn *p_hwfn, 333 struct qed_ptt *p_ptt, u32 *media_type); 334 335 /** 336 * @brief Get transceiver data of the port. 337 * 338 * @param cdev - qed dev pointer 339 * @param p_ptt 340 * @param p_transceiver_state - transceiver state. 341 * @param p_transceiver_type - media type value 342 * 343 * @return int - 344 * 0 - Operation was successful. 345 * -EBUSY - Operation failed 346 */ 347 int qed_mcp_get_transceiver_data(struct qed_hwfn *p_hwfn, 348 struct qed_ptt *p_ptt, 349 u32 *p_transceiver_state, 350 u32 *p_tranceiver_type); 351 352 /** 353 * @brief Get transceiver supported speed mask. 354 * 355 * @param cdev - qed dev pointer 356 * @param p_ptt 357 * @param p_speed_mask - Bit mask of all supported speeds. 358 * 359 * @return int - 360 * 0 - Operation was successful. 361 * -EBUSY - Operation failed 362 */ 363 364 int qed_mcp_trans_speed_mask(struct qed_hwfn *p_hwfn, 365 struct qed_ptt *p_ptt, u32 *p_speed_mask); 366 367 /** 368 * @brief Get board configuration. 369 * 370 * @param cdev - qed dev pointer 371 * @param p_ptt 372 * @param p_board_config - Board config. 373 * 374 * @return int - 375 * 0 - Operation was successful. 376 * -EBUSY - Operation failed 377 */ 378 int qed_mcp_get_board_config(struct qed_hwfn *p_hwfn, 379 struct qed_ptt *p_ptt, u32 *p_board_config); 380 381 /** 382 * @brief General function for sending commands to the MCP 383 * mailbox. It acquire mutex lock for the entire 384 * operation, from sending the request until the MCP 385 * response. Waiting for MCP response will be checked up 386 * to 5 seconds every 5ms. 387 * 388 * @param p_hwfn - hw function 389 * @param p_ptt - PTT required for register access 390 * @param cmd - command to be sent to the MCP. 391 * @param param - Optional param 392 * @param o_mcp_resp - The MCP response code (exclude sequence). 393 * @param o_mcp_param- Optional parameter provided by the MCP 394 * response 395 * @return int - 0 - operation 396 * was successul. 397 */ 398 int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 399 struct qed_ptt *p_ptt, 400 u32 cmd, 401 u32 param, 402 u32 *o_mcp_resp, 403 u32 *o_mcp_param); 404 405 /** 406 * @brief - drains the nig, allowing completion to pass in case of pauses. 407 * (Should be called only from sleepable context) 408 * 409 * @param p_hwfn 410 * @param p_ptt 411 */ 412 int qed_mcp_drain(struct qed_hwfn *p_hwfn, 413 struct qed_ptt *p_ptt); 414 415 /** 416 * @brief Get the flash size value 417 * 418 * @param p_hwfn 419 * @param p_ptt 420 * @param p_flash_size - flash size in bytes to be filled. 421 * 422 * @return int - 0 - operation was successul. 423 */ 424 int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 425 struct qed_ptt *p_ptt, 426 u32 *p_flash_size); 427 428 /** 429 * @brief Send driver version to MFW 430 * 431 * @param p_hwfn 432 * @param p_ptt 433 * @param version - Version value 434 * @param name - Protocol driver name 435 * 436 * @return int - 0 - operation was successul. 437 */ 438 int 439 qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 440 struct qed_ptt *p_ptt, 441 struct qed_mcp_drv_version *p_ver); 442 443 /** 444 * @brief Read the MFW process kill counter 445 * 446 * @param p_hwfn 447 * @param p_ptt 448 * 449 * @return u32 450 */ 451 u32 qed_get_process_kill_counter(struct qed_hwfn *p_hwfn, 452 struct qed_ptt *p_ptt); 453 454 /** 455 * @brief Trigger a recovery process 456 * 457 * @param p_hwfn 458 * @param p_ptt 459 * 460 * @return int 461 */ 462 int qed_start_recovery_process(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 463 464 /** 465 * @brief A recovery handler must call this function as its first step. 466 * It is assumed that the handler is not run from an interrupt context. 467 * 468 * @param cdev 469 * @param p_ptt 470 * 471 * @return int 472 */ 473 int qed_recovery_prolog(struct qed_dev *cdev); 474 475 /** 476 * @brief Notify MFW about the change in base device properties 477 * 478 * @param p_hwfn 479 * @param p_ptt 480 * @param client - qed client type 481 * 482 * @return int - 0 - operation was successful. 483 */ 484 int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn, 485 struct qed_ptt *p_ptt, 486 enum qed_ov_client client); 487 488 /** 489 * @brief Notify MFW about the driver state 490 * 491 * @param p_hwfn 492 * @param p_ptt 493 * @param drv_state - Driver state 494 * 495 * @return int - 0 - operation was successful. 496 */ 497 int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn, 498 struct qed_ptt *p_ptt, 499 enum qed_ov_driver_state drv_state); 500 501 /** 502 * @brief Send MTU size to MFW 503 * 504 * @param p_hwfn 505 * @param p_ptt 506 * @param mtu - MTU size 507 * 508 * @return int - 0 - operation was successful. 509 */ 510 int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn, 511 struct qed_ptt *p_ptt, u16 mtu); 512 513 /** 514 * @brief Send MAC address to MFW 515 * 516 * @param p_hwfn 517 * @param p_ptt 518 * @param mac - MAC address 519 * 520 * @return int - 0 - operation was successful. 521 */ 522 int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn, 523 struct qed_ptt *p_ptt, u8 *mac); 524 525 /** 526 * @brief Send WOL mode to MFW 527 * 528 * @param p_hwfn 529 * @param p_ptt 530 * @param wol - WOL mode 531 * 532 * @return int - 0 - operation was successful. 533 */ 534 int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn, 535 struct qed_ptt *p_ptt, 536 enum qed_ov_wol wol); 537 538 /** 539 * @brief Set LED status 540 * 541 * @param p_hwfn 542 * @param p_ptt 543 * @param mode - LED mode 544 * 545 * @return int - 0 - operation was successful. 546 */ 547 int qed_mcp_set_led(struct qed_hwfn *p_hwfn, 548 struct qed_ptt *p_ptt, 549 enum qed_led_mode mode); 550 551 /** 552 * @brief Read from nvm 553 * 554 * @param cdev 555 * @param addr - nvm offset 556 * @param p_buf - nvm read buffer 557 * @param len - buffer len 558 * 559 * @return int - 0 - operation was successful. 560 */ 561 int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len); 562 563 /** 564 * @brief Write to nvm 565 * 566 * @param cdev 567 * @param addr - nvm offset 568 * @param cmd - nvm command 569 * @param p_buf - nvm write buffer 570 * @param len - buffer len 571 * 572 * @return int - 0 - operation was successful. 573 */ 574 int qed_mcp_nvm_write(struct qed_dev *cdev, 575 u32 cmd, u32 addr, u8 *p_buf, u32 len); 576 577 /** 578 * @brief Check latest response 579 * 580 * @param cdev 581 * @param p_buf - nvm write buffer 582 * 583 * @return int - 0 - operation was successful. 584 */ 585 int qed_mcp_nvm_resp(struct qed_dev *cdev, u8 *p_buf); 586 587 struct qed_nvm_image_att { 588 u32 start_addr; 589 u32 length; 590 }; 591 592 /** 593 * @brief Allows reading a whole nvram image 594 * 595 * @param p_hwfn 596 * @param image_id - image to get attributes for 597 * @param p_image_att - image attributes structure into which to fill data 598 * 599 * @return int - 0 - operation was successful. 600 */ 601 int 602 qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn, 603 enum qed_nvm_images image_id, 604 struct qed_nvm_image_att *p_image_att); 605 606 /** 607 * @brief Allows reading a whole nvram image 608 * 609 * @param p_hwfn 610 * @param image_id - image requested for reading 611 * @param p_buffer - allocated buffer into which to fill data 612 * @param buffer_len - length of the allocated buffer. 613 * 614 * @return 0 iff p_buffer now contains the nvram image. 615 */ 616 int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn, 617 enum qed_nvm_images image_id, 618 u8 *p_buffer, u32 buffer_len); 619 620 /** 621 * @brief Bist register test 622 * 623 * @param p_hwfn - hw function 624 * @param p_ptt - PTT required for register access 625 * 626 * @return int - 0 - operation was successful. 627 */ 628 int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, 629 struct qed_ptt *p_ptt); 630 631 /** 632 * @brief Bist clock test 633 * 634 * @param p_hwfn - hw function 635 * @param p_ptt - PTT required for register access 636 * 637 * @return int - 0 - operation was successful. 638 */ 639 int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, 640 struct qed_ptt *p_ptt); 641 642 /** 643 * @brief Bist nvm test - get number of images 644 * 645 * @param p_hwfn - hw function 646 * @param p_ptt - PTT required for register access 647 * @param num_images - number of images if operation was 648 * successful. 0 if not. 649 * 650 * @return int - 0 - operation was successful. 651 */ 652 int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn, 653 struct qed_ptt *p_ptt, 654 u32 *num_images); 655 656 /** 657 * @brief Bist nvm test - get image attributes by index 658 * 659 * @param p_hwfn - hw function 660 * @param p_ptt - PTT required for register access 661 * @param p_image_att - Attributes of image 662 * @param image_index - Index of image to get information for 663 * 664 * @return int - 0 - operation was successful. 665 */ 666 int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn, 667 struct qed_ptt *p_ptt, 668 struct bist_nvm_image_att *p_image_att, 669 u32 image_index); 670 671 /** 672 * @brief - Processes the TLV request from MFW i.e., get the required TLV info 673 * from the qed client and send it to the MFW. 674 * 675 * @param p_hwfn 676 * @param p_ptt 677 * 678 * @param return 0 upon success. 679 */ 680 int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 681 682 /* Using hwfn number (and not pf_num) is required since in CMT mode, 683 * same pf_num may be used by two different hwfn 684 * TODO - this shouldn't really be in .h file, but until all fields 685 * required during hw-init will be placed in their correct place in shmem 686 * we need it in qed_dev.c [for readin the nvram reflection in shmem]. 687 */ 688 #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \ 689 ((rel_pfid) | \ 690 ((p_hwfn)->abs_pf_id & 1) << 3) : \ 691 rel_pfid) 692 #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id) 693 694 #define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \ 695 ((_p_hwfn)->cdev->num_ports_in_engine * \ 696 qed_device_num_engines((_p_hwfn)->cdev))) 697 698 struct qed_mcp_info { 699 /* List for mailbox commands which were sent and wait for a response */ 700 struct list_head cmd_list; 701 702 /* Spinlock used for protecting the access to the mailbox commands list 703 * and the sending of the commands. 704 */ 705 spinlock_t cmd_lock; 706 707 /* Flag to indicate whether sending a MFW mailbox command is blocked */ 708 bool b_block_cmd; 709 710 /* Spinlock used for syncing SW link-changes and link-changes 711 * originating from attention context. 712 */ 713 spinlock_t link_lock; 714 715 u32 public_base; 716 u32 drv_mb_addr; 717 u32 mfw_mb_addr; 718 u32 port_addr; 719 u16 drv_mb_seq; 720 u16 drv_pulse_seq; 721 struct qed_mcp_link_params link_input; 722 struct qed_mcp_link_state link_output; 723 struct qed_mcp_link_capabilities link_capabilities; 724 struct qed_mcp_function_info func_info; 725 u8 *mfw_mb_cur; 726 u8 *mfw_mb_shadow; 727 u16 mfw_mb_length; 728 u32 mcp_hist; 729 730 /* Capabilties negotiated with the MFW */ 731 u32 capabilities; 732 }; 733 734 struct qed_mcp_mb_params { 735 u32 cmd; 736 u32 param; 737 void *p_data_src; 738 void *p_data_dst; 739 u8 data_src_size; 740 u8 data_dst_size; 741 u32 mcp_resp; 742 u32 mcp_param; 743 u32 flags; 744 #define QED_MB_FLAG_CAN_SLEEP (0x1 << 0) 745 #define QED_MB_FLAG_AVOID_BLOCK (0x1 << 1) 746 #define QED_MB_FLAGS_IS_SET(params, flag) \ 747 ({ typeof(params) __params = (params); \ 748 (__params && (__params->flags & QED_MB_FLAG_ ## flag)); }) 749 }; 750 751 struct qed_drv_tlv_hdr { 752 u8 tlv_type; 753 u8 tlv_length; /* In dwords - not including this header */ 754 u8 tlv_reserved; 755 #define QED_DRV_TLV_FLAGS_CHANGED 0x01 756 u8 tlv_flags; 757 }; 758 759 /** 760 * @brief Initialize the interface with the MCP 761 * 762 * @param p_hwfn - HW func 763 * @param p_ptt - PTT required for register access 764 * 765 * @return int 766 */ 767 int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, 768 struct qed_ptt *p_ptt); 769 770 /** 771 * @brief Initialize the port interface with the MCP 772 * 773 * @param p_hwfn 774 * @param p_ptt 775 * Can only be called after `num_ports_in_engines' is set 776 */ 777 void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, 778 struct qed_ptt *p_ptt); 779 /** 780 * @brief Releases resources allocated during the init process. 781 * 782 * @param p_hwfn - HW func 783 * @param p_ptt - PTT required for register access 784 * 785 * @return int 786 */ 787 788 int qed_mcp_free(struct qed_hwfn *p_hwfn); 789 790 /** 791 * @brief This function is called from the DPC context. After 792 * pointing PTT to the mfw mb, check for events sent by the MCP 793 * to the driver and ack them. In case a critical event 794 * detected, it will be handled here, otherwise the work will be 795 * queued to a sleepable work-queue. 796 * 797 * @param p_hwfn - HW function 798 * @param p_ptt - PTT required for register access 799 * @return int - 0 - operation 800 * was successul. 801 */ 802 int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 803 struct qed_ptt *p_ptt); 804 805 enum qed_drv_role { 806 QED_DRV_ROLE_OS, 807 QED_DRV_ROLE_KDUMP, 808 }; 809 810 struct qed_load_req_params { 811 /* Input params */ 812 enum qed_drv_role drv_role; 813 u8 timeout_val; 814 bool avoid_eng_reset; 815 enum qed_override_force_load override_force_load; 816 817 /* Output params */ 818 u32 load_code; 819 }; 820 821 /** 822 * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds, 823 * returns whether this PF is the first on the engine/port or function. 824 * 825 * @param p_hwfn 826 * @param p_ptt 827 * @param p_params 828 * 829 * @return int - 0 - Operation was successful. 830 */ 831 int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 832 struct qed_ptt *p_ptt, 833 struct qed_load_req_params *p_params); 834 835 /** 836 * @brief Sends a LOAD_DONE message to the MFW 837 * 838 * @param p_hwfn 839 * @param p_ptt 840 * 841 * @return int - 0 - Operation was successful. 842 */ 843 int qed_mcp_load_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 844 845 /** 846 * @brief Sends a UNLOAD_REQ message to the MFW 847 * 848 * @param p_hwfn 849 * @param p_ptt 850 * 851 * @return int - 0 - Operation was successful. 852 */ 853 int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 854 855 /** 856 * @brief Sends a UNLOAD_DONE message to the MFW 857 * 858 * @param p_hwfn 859 * @param p_ptt 860 * 861 * @return int - 0 - Operation was successful. 862 */ 863 int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 864 865 /** 866 * @brief Read the MFW mailbox into Current buffer. 867 * 868 * @param p_hwfn 869 * @param p_ptt 870 */ 871 void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, 872 struct qed_ptt *p_ptt); 873 874 /** 875 * @brief Ack to mfw that driver finished FLR process for VFs 876 * 877 * @param p_hwfn 878 * @param p_ptt 879 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks. 880 * 881 * @param return int - 0 upon success. 882 */ 883 int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn, 884 struct qed_ptt *p_ptt, u32 *vfs_to_ack); 885 886 /** 887 * @brief - calls during init to read shmem of all function-related info. 888 * 889 * @param p_hwfn 890 * 891 * @param return 0 upon success. 892 */ 893 int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 894 struct qed_ptt *p_ptt); 895 896 /** 897 * @brief - Reset the MCP using mailbox command. 898 * 899 * @param p_hwfn 900 * @param p_ptt 901 * 902 * @param return 0 upon success. 903 */ 904 int qed_mcp_reset(struct qed_hwfn *p_hwfn, 905 struct qed_ptt *p_ptt); 906 907 /** 908 * @brief - Sends an NVM read command request to the MFW to get 909 * a buffer. 910 * 911 * @param p_hwfn 912 * @param p_ptt 913 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or 914 * DRV_MSG_CODE_NVM_READ_NVRAM commands 915 * @param param - [0:23] - Offset [24:31] - Size 916 * @param o_mcp_resp - MCP response 917 * @param o_mcp_param - MCP response param 918 * @param o_txn_size - Buffer size output 919 * @param o_buf - Pointer to the buffer returned by the MFW. 920 * 921 * @param return 0 upon success. 922 */ 923 int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn, 924 struct qed_ptt *p_ptt, 925 u32 cmd, 926 u32 param, 927 u32 *o_mcp_resp, 928 u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf); 929 930 /** 931 * @brief Read from sfp 932 * 933 * @param p_hwfn - hw function 934 * @param p_ptt - PTT required for register access 935 * @param port - transceiver port 936 * @param addr - I2C address 937 * @param offset - offset in sfp 938 * @param len - buffer length 939 * @param p_buf - buffer to read into 940 * 941 * @return int - 0 - operation was successful. 942 */ 943 int qed_mcp_phy_sfp_read(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 944 u32 port, u32 addr, u32 offset, u32 len, u8 *p_buf); 945 946 /** 947 * @brief indicates whether the MFW objects [under mcp_info] are accessible 948 * 949 * @param p_hwfn 950 * 951 * @return true iff MFW is running and mcp_info is initialized 952 */ 953 bool qed_mcp_is_init(struct qed_hwfn *p_hwfn); 954 955 /** 956 * @brief request MFW to configure MSI-X for a VF 957 * 958 * @param p_hwfn 959 * @param p_ptt 960 * @param vf_id - absolute inside engine 961 * @param num_sbs - number of entries to request 962 * 963 * @return int 964 */ 965 int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, 966 struct qed_ptt *p_ptt, u8 vf_id, u8 num); 967 968 /** 969 * @brief - Halt the MCP. 970 * 971 * @param p_hwfn 972 * @param p_ptt 973 * 974 * @param return 0 upon success. 975 */ 976 int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 977 978 /** 979 * @brief - Wake up the MCP. 980 * 981 * @param p_hwfn 982 * @param p_ptt 983 * 984 * @param return 0 upon success. 985 */ 986 int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 987 988 int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw); 989 int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw); 990 int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn, 991 struct qed_ptt *p_ptt, 992 struct qed_mcp_link_state *p_link, 993 u8 max_bw); 994 int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn, 995 struct qed_ptt *p_ptt, 996 struct qed_mcp_link_state *p_link, 997 u8 min_bw); 998 999 int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn, 1000 struct qed_ptt *p_ptt, u32 mask_parities); 1001 1002 /** 1003 * @brief - Sets the MFW's max value for the given resource 1004 * 1005 * @param p_hwfn 1006 * @param p_ptt 1007 * @param res_id 1008 * @param resc_max_val 1009 * @param p_mcp_resp 1010 * 1011 * @return int - 0 - operation was successful. 1012 */ 1013 int 1014 qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn, 1015 struct qed_ptt *p_ptt, 1016 enum qed_resources res_id, 1017 u32 resc_max_val, u32 *p_mcp_resp); 1018 1019 /** 1020 * @brief - Gets the MFW allocation info for the given resource 1021 * 1022 * @param p_hwfn 1023 * @param p_ptt 1024 * @param res_id 1025 * @param p_mcp_resp 1026 * @param p_resc_num 1027 * @param p_resc_start 1028 * 1029 * @return int - 0 - operation was successful. 1030 */ 1031 int 1032 qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn, 1033 struct qed_ptt *p_ptt, 1034 enum qed_resources res_id, 1035 u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start); 1036 1037 /** 1038 * @brief Send eswitch mode to MFW 1039 * 1040 * @param p_hwfn 1041 * @param p_ptt 1042 * @param eswitch - eswitch mode 1043 * 1044 * @return int - 0 - operation was successful. 1045 */ 1046 int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn, 1047 struct qed_ptt *p_ptt, 1048 enum qed_ov_eswitch eswitch); 1049 1050 #define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP 1051 #define QED_MCP_RESC_LOCK_MAX_VAL 31 1052 1053 enum qed_resc_lock { 1054 QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL, 1055 QED_RESC_LOCK_PTP_PORT0, 1056 QED_RESC_LOCK_PTP_PORT1, 1057 QED_RESC_LOCK_PTP_PORT2, 1058 QED_RESC_LOCK_PTP_PORT3, 1059 QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL, 1060 QED_RESC_LOCK_RESC_INVALID 1061 }; 1062 1063 /** 1064 * @brief - Initiates PF FLR 1065 * 1066 * @param p_hwfn 1067 * @param p_ptt 1068 * 1069 * @return int - 0 - operation was successful. 1070 */ 1071 int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1072 struct qed_resc_lock_params { 1073 /* Resource number [valid values are 0..31] */ 1074 u8 resource; 1075 1076 /* Lock timeout value in seconds [default, none or 1..254] */ 1077 u8 timeout; 1078 #define QED_MCP_RESC_LOCK_TO_DEFAULT 0 1079 #define QED_MCP_RESC_LOCK_TO_NONE 255 1080 1081 /* Number of times to retry locking */ 1082 u8 retry_num; 1083 #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10 1084 1085 /* The interval in usec between retries */ 1086 u16 retry_interval; 1087 #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000 1088 1089 /* Use sleep or delay between retries */ 1090 bool sleep_b4_retry; 1091 1092 /* Will be set as true if the resource is free and granted */ 1093 bool b_granted; 1094 1095 /* Will be filled with the resource owner. 1096 * [0..15 = PF0-15, 16 = MFW] 1097 */ 1098 u8 owner; 1099 }; 1100 1101 /** 1102 * @brief Acquires MFW generic resource lock 1103 * 1104 * @param p_hwfn 1105 * @param p_ptt 1106 * @param p_params 1107 * 1108 * @return int - 0 - operation was successful. 1109 */ 1110 int 1111 qed_mcp_resc_lock(struct qed_hwfn *p_hwfn, 1112 struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params); 1113 1114 struct qed_resc_unlock_params { 1115 /* Resource number [valid values are 0..31] */ 1116 u8 resource; 1117 1118 /* Allow to release a resource even if belongs to another PF */ 1119 bool b_force; 1120 1121 /* Will be set as true if the resource is released */ 1122 bool b_released; 1123 }; 1124 1125 /** 1126 * @brief Releases MFW generic resource lock 1127 * 1128 * @param p_hwfn 1129 * @param p_ptt 1130 * @param p_params 1131 * 1132 * @return int - 0 - operation was successful. 1133 */ 1134 int 1135 qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn, 1136 struct qed_ptt *p_ptt, 1137 struct qed_resc_unlock_params *p_params); 1138 1139 /** 1140 * @brief - default initialization for lock/unlock resource structs 1141 * 1142 * @param p_lock - lock params struct to be initialized; Can be NULL 1143 * @param p_unlock - unlock params struct to be initialized; Can be NULL 1144 * @param resource - the requested resource 1145 * @paral b_is_permanent - disable retries & aging when set 1146 */ 1147 void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock, 1148 struct qed_resc_unlock_params *p_unlock, 1149 enum qed_resc_lock 1150 resource, bool b_is_permanent); 1151 /** 1152 * @brief Learn of supported MFW features; To be done during early init 1153 * 1154 * @param p_hwfn 1155 * @param p_ptt 1156 */ 1157 int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1158 1159 /** 1160 * @brief Inform MFW of set of features supported by driver. Should be done 1161 * inside the content of the LOAD_REQ. 1162 * 1163 * @param p_hwfn 1164 * @param p_ptt 1165 */ 1166 int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1167 1168 /** 1169 * @brief Read ufp config from the shared memory. 1170 * 1171 * @param p_hwfn 1172 * @param p_ptt 1173 */ 1174 void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1175 1176 /** 1177 * @brief Populate the nvm info shadow in the given hardware function 1178 * 1179 * @param p_hwfn 1180 */ 1181 int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn); 1182 1183 #endif 1184