1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef _QED_MCP_H 34 #define _QED_MCP_H 35 36 #include <linux/types.h> 37 #include <linux/delay.h> 38 #include <linux/slab.h> 39 #include <linux/spinlock.h> 40 #include <linux/qed/qed_fcoe_if.h> 41 #include "qed_hsi.h" 42 #include "qed_dev_api.h" 43 44 struct qed_mcp_link_speed_params { 45 bool autoneg; 46 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ 47 u32 forced_speed; /* In Mb/s */ 48 }; 49 50 struct qed_mcp_link_pause_params { 51 bool autoneg; 52 bool forced_rx; 53 bool forced_tx; 54 }; 55 56 enum qed_mcp_eee_mode { 57 QED_MCP_EEE_DISABLED, 58 QED_MCP_EEE_ENABLED, 59 QED_MCP_EEE_UNSUPPORTED 60 }; 61 62 struct qed_mcp_link_params { 63 struct qed_mcp_link_speed_params speed; 64 struct qed_mcp_link_pause_params pause; 65 u32 loopback_mode; 66 struct qed_link_eee_params eee; 67 }; 68 69 struct qed_mcp_link_capabilities { 70 u32 speed_capabilities; 71 bool default_speed_autoneg; 72 enum qed_mcp_eee_mode default_eee; 73 u32 eee_lpi_timer; 74 u8 eee_speed_caps; 75 }; 76 77 struct qed_mcp_link_state { 78 bool link_up; 79 80 u32 min_pf_rate; 81 82 /* Actual link speed in Mb/s */ 83 u32 line_speed; 84 85 /* PF max speed in Mb/s, deduced from line_speed 86 * according to PF max bandwidth configuration. 87 */ 88 u32 speed; 89 bool full_duplex; 90 91 bool an; 92 bool an_complete; 93 bool parallel_detection; 94 bool pfc_enabled; 95 96 #define QED_LINK_PARTNER_SPEED_1G_HD BIT(0) 97 #define QED_LINK_PARTNER_SPEED_1G_FD BIT(1) 98 #define QED_LINK_PARTNER_SPEED_10G BIT(2) 99 #define QED_LINK_PARTNER_SPEED_20G BIT(3) 100 #define QED_LINK_PARTNER_SPEED_25G BIT(4) 101 #define QED_LINK_PARTNER_SPEED_40G BIT(5) 102 #define QED_LINK_PARTNER_SPEED_50G BIT(6) 103 #define QED_LINK_PARTNER_SPEED_100G BIT(7) 104 u32 partner_adv_speed; 105 106 bool partner_tx_flow_ctrl_en; 107 bool partner_rx_flow_ctrl_en; 108 109 #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1) 110 #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2) 111 #define QED_LINK_PARTNER_BOTH_PAUSE (3) 112 u8 partner_adv_pause; 113 114 bool sfp_tx_fault; 115 bool eee_active; 116 u8 eee_adv_caps; 117 u8 eee_lp_adv_caps; 118 }; 119 120 struct qed_mcp_function_info { 121 u8 pause_on_host; 122 123 enum qed_pci_personality protocol; 124 125 u8 bandwidth_min; 126 u8 bandwidth_max; 127 128 u8 mac[ETH_ALEN]; 129 130 u64 wwn_port; 131 u64 wwn_node; 132 133 #define QED_MCP_VLAN_UNSET (0xffff) 134 u16 ovlan; 135 136 u16 mtu; 137 }; 138 139 struct qed_mcp_nvm_common { 140 u32 offset; 141 u32 param; 142 u32 resp; 143 u32 cmd; 144 }; 145 146 struct qed_mcp_drv_version { 147 u32 version; 148 u8 name[MCP_DRV_VER_STR_SIZE - 4]; 149 }; 150 151 struct qed_mcp_lan_stats { 152 u64 ucast_rx_pkts; 153 u64 ucast_tx_pkts; 154 u32 fcs_err; 155 }; 156 157 struct qed_mcp_fcoe_stats { 158 u64 rx_pkts; 159 u64 tx_pkts; 160 u32 fcs_err; 161 u32 login_failure; 162 }; 163 164 struct qed_mcp_iscsi_stats { 165 u64 rx_pdus; 166 u64 tx_pdus; 167 u64 rx_bytes; 168 u64 tx_bytes; 169 }; 170 171 struct qed_mcp_rdma_stats { 172 u64 rx_pkts; 173 u64 tx_pkts; 174 u64 rx_bytes; 175 u64 tx_byts; 176 }; 177 178 enum qed_mcp_protocol_type { 179 QED_MCP_LAN_STATS, 180 QED_MCP_FCOE_STATS, 181 QED_MCP_ISCSI_STATS, 182 QED_MCP_RDMA_STATS 183 }; 184 185 union qed_mcp_protocol_stats { 186 struct qed_mcp_lan_stats lan_stats; 187 struct qed_mcp_fcoe_stats fcoe_stats; 188 struct qed_mcp_iscsi_stats iscsi_stats; 189 struct qed_mcp_rdma_stats rdma_stats; 190 }; 191 192 enum qed_ov_eswitch { 193 QED_OV_ESWITCH_NONE, 194 QED_OV_ESWITCH_VEB, 195 QED_OV_ESWITCH_VEPA 196 }; 197 198 enum qed_ov_client { 199 QED_OV_CLIENT_DRV, 200 QED_OV_CLIENT_USER, 201 QED_OV_CLIENT_VENDOR_SPEC 202 }; 203 204 enum qed_ov_driver_state { 205 QED_OV_DRIVER_STATE_NOT_LOADED, 206 QED_OV_DRIVER_STATE_DISABLED, 207 QED_OV_DRIVER_STATE_ACTIVE 208 }; 209 210 enum qed_ov_wol { 211 QED_OV_WOL_DEFAULT, 212 QED_OV_WOL_DISABLED, 213 QED_OV_WOL_ENABLED 214 }; 215 216 enum qed_mfw_tlv_type { 217 QED_MFW_TLV_GENERIC = 0x1, /* Core driver TLVs */ 218 QED_MFW_TLV_ETH = 0x2, /* L2 driver TLVs */ 219 QED_MFW_TLV_FCOE = 0x4, /* FCoE protocol TLVs */ 220 QED_MFW_TLV_ISCSI = 0x8, /* SCSI protocol TLVs */ 221 QED_MFW_TLV_MAX = 0x16, 222 }; 223 224 struct qed_mfw_tlv_generic { 225 #define QED_MFW_TLV_FLAGS_SIZE 2 226 struct { 227 u8 ipv4_csum_offload; 228 u8 lso_supported; 229 bool b_set; 230 } flags; 231 232 #define QED_MFW_TLV_MAC_COUNT 3 233 /* First entry for primary MAC, 2 secondary MACs possible */ 234 u8 mac[QED_MFW_TLV_MAC_COUNT][6]; 235 bool mac_set[QED_MFW_TLV_MAC_COUNT]; 236 237 u64 rx_frames; 238 bool rx_frames_set; 239 u64 rx_bytes; 240 bool rx_bytes_set; 241 u64 tx_frames; 242 bool tx_frames_set; 243 u64 tx_bytes; 244 bool tx_bytes_set; 245 }; 246 247 union qed_mfw_tlv_data { 248 struct qed_mfw_tlv_generic generic; 249 struct qed_mfw_tlv_eth eth; 250 struct qed_mfw_tlv_fcoe fcoe; 251 struct qed_mfw_tlv_iscsi iscsi; 252 }; 253 254 #define QED_NVM_CFG_OPTION_ALL BIT(0) 255 #define QED_NVM_CFG_OPTION_INIT BIT(1) 256 #define QED_NVM_CFG_OPTION_COMMIT BIT(2) 257 #define QED_NVM_CFG_OPTION_FREE BIT(3) 258 #define QED_NVM_CFG_OPTION_ENTITY_SEL BIT(4) 259 260 /** 261 * @brief - returns the link params of the hw function 262 * 263 * @param p_hwfn 264 * 265 * @returns pointer to link params 266 */ 267 struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *); 268 269 /** 270 * @brief - return the link state of the hw function 271 * 272 * @param p_hwfn 273 * 274 * @returns pointer to link state 275 */ 276 struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *); 277 278 /** 279 * @brief - return the link capabilities of the hw function 280 * 281 * @param p_hwfn 282 * 283 * @returns pointer to link capabilities 284 */ 285 struct qed_mcp_link_capabilities 286 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn); 287 288 /** 289 * @brief Request the MFW to set the the link according to 'link_input'. 290 * 291 * @param p_hwfn 292 * @param p_ptt 293 * @param b_up - raise link if `true'. Reset link if `false'. 294 * 295 * @return int 296 */ 297 int qed_mcp_set_link(struct qed_hwfn *p_hwfn, 298 struct qed_ptt *p_ptt, 299 bool b_up); 300 301 /** 302 * @brief Get the management firmware version value 303 * 304 * @param p_hwfn 305 * @param p_ptt 306 * @param p_mfw_ver - mfw version value 307 * @param p_running_bundle_id - image id in nvram; Optional. 308 * 309 * @return int - 0 - operation was successful. 310 */ 311 int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, 312 struct qed_ptt *p_ptt, 313 u32 *p_mfw_ver, u32 *p_running_bundle_id); 314 315 /** 316 * @brief Get the MBI version value 317 * 318 * @param p_hwfn 319 * @param p_ptt 320 * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version. 321 * 322 * @return int - 0 - operation was successful. 323 */ 324 int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn, 325 struct qed_ptt *p_ptt, u32 *p_mbi_ver); 326 327 /** 328 * @brief Get media type value of the port. 329 * 330 * @param cdev - qed dev pointer 331 * @param p_ptt 332 * @param mfw_ver - media type value 333 * 334 * @return int - 335 * 0 - Operation was successul. 336 * -EBUSY - Operation failed 337 */ 338 int qed_mcp_get_media_type(struct qed_hwfn *p_hwfn, 339 struct qed_ptt *p_ptt, u32 *media_type); 340 341 /** 342 * @brief Get transceiver data of the port. 343 * 344 * @param cdev - qed dev pointer 345 * @param p_ptt 346 * @param p_transceiver_state - transceiver state. 347 * @param p_transceiver_type - media type value 348 * 349 * @return int - 350 * 0 - Operation was successful. 351 * -EBUSY - Operation failed 352 */ 353 int qed_mcp_get_transceiver_data(struct qed_hwfn *p_hwfn, 354 struct qed_ptt *p_ptt, 355 u32 *p_transceiver_state, 356 u32 *p_tranceiver_type); 357 358 /** 359 * @brief Get transceiver supported speed mask. 360 * 361 * @param cdev - qed dev pointer 362 * @param p_ptt 363 * @param p_speed_mask - Bit mask of all supported speeds. 364 * 365 * @return int - 366 * 0 - Operation was successful. 367 * -EBUSY - Operation failed 368 */ 369 370 int qed_mcp_trans_speed_mask(struct qed_hwfn *p_hwfn, 371 struct qed_ptt *p_ptt, u32 *p_speed_mask); 372 373 /** 374 * @brief Get board configuration. 375 * 376 * @param cdev - qed dev pointer 377 * @param p_ptt 378 * @param p_board_config - Board config. 379 * 380 * @return int - 381 * 0 - Operation was successful. 382 * -EBUSY - Operation failed 383 */ 384 int qed_mcp_get_board_config(struct qed_hwfn *p_hwfn, 385 struct qed_ptt *p_ptt, u32 *p_board_config); 386 387 /** 388 * @brief General function for sending commands to the MCP 389 * mailbox. It acquire mutex lock for the entire 390 * operation, from sending the request until the MCP 391 * response. Waiting for MCP response will be checked up 392 * to 5 seconds every 5ms. 393 * 394 * @param p_hwfn - hw function 395 * @param p_ptt - PTT required for register access 396 * @param cmd - command to be sent to the MCP. 397 * @param param - Optional param 398 * @param o_mcp_resp - The MCP response code (exclude sequence). 399 * @param o_mcp_param- Optional parameter provided by the MCP 400 * response 401 * @return int - 0 - operation 402 * was successul. 403 */ 404 int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 405 struct qed_ptt *p_ptt, 406 u32 cmd, 407 u32 param, 408 u32 *o_mcp_resp, 409 u32 *o_mcp_param); 410 411 /** 412 * @brief - drains the nig, allowing completion to pass in case of pauses. 413 * (Should be called only from sleepable context) 414 * 415 * @param p_hwfn 416 * @param p_ptt 417 */ 418 int qed_mcp_drain(struct qed_hwfn *p_hwfn, 419 struct qed_ptt *p_ptt); 420 421 /** 422 * @brief Get the flash size value 423 * 424 * @param p_hwfn 425 * @param p_ptt 426 * @param p_flash_size - flash size in bytes to be filled. 427 * 428 * @return int - 0 - operation was successul. 429 */ 430 int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 431 struct qed_ptt *p_ptt, 432 u32 *p_flash_size); 433 434 /** 435 * @brief Send driver version to MFW 436 * 437 * @param p_hwfn 438 * @param p_ptt 439 * @param version - Version value 440 * @param name - Protocol driver name 441 * 442 * @return int - 0 - operation was successul. 443 */ 444 int 445 qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 446 struct qed_ptt *p_ptt, 447 struct qed_mcp_drv_version *p_ver); 448 449 /** 450 * @brief Read the MFW process kill counter 451 * 452 * @param p_hwfn 453 * @param p_ptt 454 * 455 * @return u32 456 */ 457 u32 qed_get_process_kill_counter(struct qed_hwfn *p_hwfn, 458 struct qed_ptt *p_ptt); 459 460 /** 461 * @brief Trigger a recovery process 462 * 463 * @param p_hwfn 464 * @param p_ptt 465 * 466 * @return int 467 */ 468 int qed_start_recovery_process(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 469 470 /** 471 * @brief A recovery handler must call this function as its first step. 472 * It is assumed that the handler is not run from an interrupt context. 473 * 474 * @param cdev 475 * @param p_ptt 476 * 477 * @return int 478 */ 479 int qed_recovery_prolog(struct qed_dev *cdev); 480 481 /** 482 * @brief Notify MFW about the change in base device properties 483 * 484 * @param p_hwfn 485 * @param p_ptt 486 * @param client - qed client type 487 * 488 * @return int - 0 - operation was successful. 489 */ 490 int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn, 491 struct qed_ptt *p_ptt, 492 enum qed_ov_client client); 493 494 /** 495 * @brief Notify MFW about the driver state 496 * 497 * @param p_hwfn 498 * @param p_ptt 499 * @param drv_state - Driver state 500 * 501 * @return int - 0 - operation was successful. 502 */ 503 int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn, 504 struct qed_ptt *p_ptt, 505 enum qed_ov_driver_state drv_state); 506 507 /** 508 * @brief Send MTU size to MFW 509 * 510 * @param p_hwfn 511 * @param p_ptt 512 * @param mtu - MTU size 513 * 514 * @return int - 0 - operation was successful. 515 */ 516 int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn, 517 struct qed_ptt *p_ptt, u16 mtu); 518 519 /** 520 * @brief Send MAC address to MFW 521 * 522 * @param p_hwfn 523 * @param p_ptt 524 * @param mac - MAC address 525 * 526 * @return int - 0 - operation was successful. 527 */ 528 int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn, 529 struct qed_ptt *p_ptt, u8 *mac); 530 531 /** 532 * @brief Send WOL mode to MFW 533 * 534 * @param p_hwfn 535 * @param p_ptt 536 * @param wol - WOL mode 537 * 538 * @return int - 0 - operation was successful. 539 */ 540 int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn, 541 struct qed_ptt *p_ptt, 542 enum qed_ov_wol wol); 543 544 /** 545 * @brief Set LED status 546 * 547 * @param p_hwfn 548 * @param p_ptt 549 * @param mode - LED mode 550 * 551 * @return int - 0 - operation was successful. 552 */ 553 int qed_mcp_set_led(struct qed_hwfn *p_hwfn, 554 struct qed_ptt *p_ptt, 555 enum qed_led_mode mode); 556 557 /** 558 * @brief Read from nvm 559 * 560 * @param cdev 561 * @param addr - nvm offset 562 * @param p_buf - nvm read buffer 563 * @param len - buffer len 564 * 565 * @return int - 0 - operation was successful. 566 */ 567 int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len); 568 569 /** 570 * @brief Write to nvm 571 * 572 * @param cdev 573 * @param addr - nvm offset 574 * @param cmd - nvm command 575 * @param p_buf - nvm write buffer 576 * @param len - buffer len 577 * 578 * @return int - 0 - operation was successful. 579 */ 580 int qed_mcp_nvm_write(struct qed_dev *cdev, 581 u32 cmd, u32 addr, u8 *p_buf, u32 len); 582 583 /** 584 * @brief Check latest response 585 * 586 * @param cdev 587 * @param p_buf - nvm write buffer 588 * 589 * @return int - 0 - operation was successful. 590 */ 591 int qed_mcp_nvm_resp(struct qed_dev *cdev, u8 *p_buf); 592 593 struct qed_nvm_image_att { 594 u32 start_addr; 595 u32 length; 596 }; 597 598 /** 599 * @brief Allows reading a whole nvram image 600 * 601 * @param p_hwfn 602 * @param image_id - image to get attributes for 603 * @param p_image_att - image attributes structure into which to fill data 604 * 605 * @return int - 0 - operation was successful. 606 */ 607 int 608 qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn, 609 enum qed_nvm_images image_id, 610 struct qed_nvm_image_att *p_image_att); 611 612 /** 613 * @brief Allows reading a whole nvram image 614 * 615 * @param p_hwfn 616 * @param image_id - image requested for reading 617 * @param p_buffer - allocated buffer into which to fill data 618 * @param buffer_len - length of the allocated buffer. 619 * 620 * @return 0 iff p_buffer now contains the nvram image. 621 */ 622 int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn, 623 enum qed_nvm_images image_id, 624 u8 *p_buffer, u32 buffer_len); 625 626 /** 627 * @brief Bist register test 628 * 629 * @param p_hwfn - hw function 630 * @param p_ptt - PTT required for register access 631 * 632 * @return int - 0 - operation was successful. 633 */ 634 int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, 635 struct qed_ptt *p_ptt); 636 637 /** 638 * @brief Bist clock test 639 * 640 * @param p_hwfn - hw function 641 * @param p_ptt - PTT required for register access 642 * 643 * @return int - 0 - operation was successful. 644 */ 645 int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, 646 struct qed_ptt *p_ptt); 647 648 /** 649 * @brief Bist nvm test - get number of images 650 * 651 * @param p_hwfn - hw function 652 * @param p_ptt - PTT required for register access 653 * @param num_images - number of images if operation was 654 * successful. 0 if not. 655 * 656 * @return int - 0 - operation was successful. 657 */ 658 int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn, 659 struct qed_ptt *p_ptt, 660 u32 *num_images); 661 662 /** 663 * @brief Bist nvm test - get image attributes by index 664 * 665 * @param p_hwfn - hw function 666 * @param p_ptt - PTT required for register access 667 * @param p_image_att - Attributes of image 668 * @param image_index - Index of image to get information for 669 * 670 * @return int - 0 - operation was successful. 671 */ 672 int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn, 673 struct qed_ptt *p_ptt, 674 struct bist_nvm_image_att *p_image_att, 675 u32 image_index); 676 677 /** 678 * @brief - Processes the TLV request from MFW i.e., get the required TLV info 679 * from the qed client and send it to the MFW. 680 * 681 * @param p_hwfn 682 * @param p_ptt 683 * 684 * @param return 0 upon success. 685 */ 686 int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 687 688 /** 689 * @brief Send raw debug data to the MFW 690 * 691 * @param p_hwfn 692 * @param p_ptt 693 * @param p_buf - raw debug data buffer 694 * @param size - buffer size 695 */ 696 int 697 qed_mcp_send_raw_debug_data(struct qed_hwfn *p_hwfn, 698 struct qed_ptt *p_ptt, u8 *p_buf, u32 size); 699 700 /* Using hwfn number (and not pf_num) is required since in CMT mode, 701 * same pf_num may be used by two different hwfn 702 * TODO - this shouldn't really be in .h file, but until all fields 703 * required during hw-init will be placed in their correct place in shmem 704 * we need it in qed_dev.c [for readin the nvram reflection in shmem]. 705 */ 706 #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \ 707 ((rel_pfid) | \ 708 ((p_hwfn)->abs_pf_id & 1) << 3) : \ 709 rel_pfid) 710 #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id) 711 712 struct qed_mcp_info { 713 /* List for mailbox commands which were sent and wait for a response */ 714 struct list_head cmd_list; 715 716 /* Spinlock used for protecting the access to the mailbox commands list 717 * and the sending of the commands. 718 */ 719 spinlock_t cmd_lock; 720 721 /* Flag to indicate whether sending a MFW mailbox command is blocked */ 722 bool b_block_cmd; 723 724 /* Spinlock used for syncing SW link-changes and link-changes 725 * originating from attention context. 726 */ 727 spinlock_t link_lock; 728 729 u32 public_base; 730 u32 drv_mb_addr; 731 u32 mfw_mb_addr; 732 u32 port_addr; 733 u16 drv_mb_seq; 734 u16 drv_pulse_seq; 735 struct qed_mcp_link_params link_input; 736 struct qed_mcp_link_state link_output; 737 struct qed_mcp_link_capabilities link_capabilities; 738 struct qed_mcp_function_info func_info; 739 u8 *mfw_mb_cur; 740 u8 *mfw_mb_shadow; 741 u16 mfw_mb_length; 742 u32 mcp_hist; 743 744 /* Capabilties negotiated with the MFW */ 745 u32 capabilities; 746 747 /* S/N for debug data mailbox commands */ 748 atomic_t dbg_data_seq; 749 }; 750 751 struct qed_mcp_mb_params { 752 u32 cmd; 753 u32 param; 754 void *p_data_src; 755 void *p_data_dst; 756 u8 data_src_size; 757 u8 data_dst_size; 758 u32 mcp_resp; 759 u32 mcp_param; 760 u32 flags; 761 #define QED_MB_FLAG_CAN_SLEEP (0x1 << 0) 762 #define QED_MB_FLAG_AVOID_BLOCK (0x1 << 1) 763 #define QED_MB_FLAGS_IS_SET(params, flag) \ 764 ({ typeof(params) __params = (params); \ 765 (__params && (__params->flags & QED_MB_FLAG_ ## flag)); }) 766 }; 767 768 struct qed_drv_tlv_hdr { 769 u8 tlv_type; 770 u8 tlv_length; /* In dwords - not including this header */ 771 u8 tlv_reserved; 772 #define QED_DRV_TLV_FLAGS_CHANGED 0x01 773 u8 tlv_flags; 774 }; 775 776 /** 777 * @brief Initialize the interface with the MCP 778 * 779 * @param p_hwfn - HW func 780 * @param p_ptt - PTT required for register access 781 * 782 * @return int 783 */ 784 int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, 785 struct qed_ptt *p_ptt); 786 787 /** 788 * @brief Initialize the port interface with the MCP 789 * 790 * @param p_hwfn 791 * @param p_ptt 792 * Can only be called after `num_ports_in_engines' is set 793 */ 794 void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, 795 struct qed_ptt *p_ptt); 796 /** 797 * @brief Releases resources allocated during the init process. 798 * 799 * @param p_hwfn - HW func 800 * @param p_ptt - PTT required for register access 801 * 802 * @return int 803 */ 804 805 int qed_mcp_free(struct qed_hwfn *p_hwfn); 806 807 /** 808 * @brief This function is called from the DPC context. After 809 * pointing PTT to the mfw mb, check for events sent by the MCP 810 * to the driver and ack them. In case a critical event 811 * detected, it will be handled here, otherwise the work will be 812 * queued to a sleepable work-queue. 813 * 814 * @param p_hwfn - HW function 815 * @param p_ptt - PTT required for register access 816 * @return int - 0 - operation 817 * was successul. 818 */ 819 int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 820 struct qed_ptt *p_ptt); 821 822 enum qed_drv_role { 823 QED_DRV_ROLE_OS, 824 QED_DRV_ROLE_KDUMP, 825 }; 826 827 struct qed_load_req_params { 828 /* Input params */ 829 enum qed_drv_role drv_role; 830 u8 timeout_val; 831 bool avoid_eng_reset; 832 enum qed_override_force_load override_force_load; 833 834 /* Output params */ 835 u32 load_code; 836 }; 837 838 /** 839 * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds, 840 * returns whether this PF is the first on the engine/port or function. 841 * 842 * @param p_hwfn 843 * @param p_ptt 844 * @param p_params 845 * 846 * @return int - 0 - Operation was successful. 847 */ 848 int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 849 struct qed_ptt *p_ptt, 850 struct qed_load_req_params *p_params); 851 852 /** 853 * @brief Sends a LOAD_DONE message to the MFW 854 * 855 * @param p_hwfn 856 * @param p_ptt 857 * 858 * @return int - 0 - Operation was successful. 859 */ 860 int qed_mcp_load_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 861 862 /** 863 * @brief Sends a UNLOAD_REQ message to the MFW 864 * 865 * @param p_hwfn 866 * @param p_ptt 867 * 868 * @return int - 0 - Operation was successful. 869 */ 870 int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 871 872 /** 873 * @brief Sends a UNLOAD_DONE message to the MFW 874 * 875 * @param p_hwfn 876 * @param p_ptt 877 * 878 * @return int - 0 - Operation was successful. 879 */ 880 int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 881 882 /** 883 * @brief Read the MFW mailbox into Current buffer. 884 * 885 * @param p_hwfn 886 * @param p_ptt 887 */ 888 void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, 889 struct qed_ptt *p_ptt); 890 891 /** 892 * @brief Ack to mfw that driver finished FLR process for VFs 893 * 894 * @param p_hwfn 895 * @param p_ptt 896 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks. 897 * 898 * @param return int - 0 upon success. 899 */ 900 int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn, 901 struct qed_ptt *p_ptt, u32 *vfs_to_ack); 902 903 /** 904 * @brief - calls during init to read shmem of all function-related info. 905 * 906 * @param p_hwfn 907 * 908 * @param return 0 upon success. 909 */ 910 int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 911 struct qed_ptt *p_ptt); 912 913 /** 914 * @brief - Reset the MCP using mailbox command. 915 * 916 * @param p_hwfn 917 * @param p_ptt 918 * 919 * @param return 0 upon success. 920 */ 921 int qed_mcp_reset(struct qed_hwfn *p_hwfn, 922 struct qed_ptt *p_ptt); 923 924 /** 925 * @brief - Sends an NVM read command request to the MFW to get 926 * a buffer. 927 * 928 * @param p_hwfn 929 * @param p_ptt 930 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or 931 * DRV_MSG_CODE_NVM_READ_NVRAM commands 932 * @param param - [0:23] - Offset [24:31] - Size 933 * @param o_mcp_resp - MCP response 934 * @param o_mcp_param - MCP response param 935 * @param o_txn_size - Buffer size output 936 * @param o_buf - Pointer to the buffer returned by the MFW. 937 * 938 * @param return 0 upon success. 939 */ 940 int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn, 941 struct qed_ptt *p_ptt, 942 u32 cmd, 943 u32 param, 944 u32 *o_mcp_resp, 945 u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf); 946 947 /** 948 * @brief Read from sfp 949 * 950 * @param p_hwfn - hw function 951 * @param p_ptt - PTT required for register access 952 * @param port - transceiver port 953 * @param addr - I2C address 954 * @param offset - offset in sfp 955 * @param len - buffer length 956 * @param p_buf - buffer to read into 957 * 958 * @return int - 0 - operation was successful. 959 */ 960 int qed_mcp_phy_sfp_read(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 961 u32 port, u32 addr, u32 offset, u32 len, u8 *p_buf); 962 963 /** 964 * @brief indicates whether the MFW objects [under mcp_info] are accessible 965 * 966 * @param p_hwfn 967 * 968 * @return true iff MFW is running and mcp_info is initialized 969 */ 970 bool qed_mcp_is_init(struct qed_hwfn *p_hwfn); 971 972 /** 973 * @brief request MFW to configure MSI-X for a VF 974 * 975 * @param p_hwfn 976 * @param p_ptt 977 * @param vf_id - absolute inside engine 978 * @param num_sbs - number of entries to request 979 * 980 * @return int 981 */ 982 int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, 983 struct qed_ptt *p_ptt, u8 vf_id, u8 num); 984 985 /** 986 * @brief - Halt the MCP. 987 * 988 * @param p_hwfn 989 * @param p_ptt 990 * 991 * @param return 0 upon success. 992 */ 993 int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 994 995 /** 996 * @brief - Wake up the MCP. 997 * 998 * @param p_hwfn 999 * @param p_ptt 1000 * 1001 * @param return 0 upon success. 1002 */ 1003 int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1004 1005 int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw); 1006 int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw); 1007 int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn, 1008 struct qed_ptt *p_ptt, 1009 struct qed_mcp_link_state *p_link, 1010 u8 max_bw); 1011 int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn, 1012 struct qed_ptt *p_ptt, 1013 struct qed_mcp_link_state *p_link, 1014 u8 min_bw); 1015 1016 int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn, 1017 struct qed_ptt *p_ptt, u32 mask_parities); 1018 1019 /* @brief - Gets the mdump retained data from the MFW. 1020 * 1021 * @param p_hwfn 1022 * @param p_ptt 1023 * @param p_mdump_retain 1024 * 1025 * @param return 0 upon success. 1026 */ 1027 int 1028 qed_mcp_mdump_get_retain(struct qed_hwfn *p_hwfn, 1029 struct qed_ptt *p_ptt, 1030 struct mdump_retain_data_stc *p_mdump_retain); 1031 1032 /** 1033 * @brief - Sets the MFW's max value for the given resource 1034 * 1035 * @param p_hwfn 1036 * @param p_ptt 1037 * @param res_id 1038 * @param resc_max_val 1039 * @param p_mcp_resp 1040 * 1041 * @return int - 0 - operation was successful. 1042 */ 1043 int 1044 qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn, 1045 struct qed_ptt *p_ptt, 1046 enum qed_resources res_id, 1047 u32 resc_max_val, u32 *p_mcp_resp); 1048 1049 /** 1050 * @brief - Gets the MFW allocation info for the given resource 1051 * 1052 * @param p_hwfn 1053 * @param p_ptt 1054 * @param res_id 1055 * @param p_mcp_resp 1056 * @param p_resc_num 1057 * @param p_resc_start 1058 * 1059 * @return int - 0 - operation was successful. 1060 */ 1061 int 1062 qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn, 1063 struct qed_ptt *p_ptt, 1064 enum qed_resources res_id, 1065 u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start); 1066 1067 /** 1068 * @brief Send eswitch mode to MFW 1069 * 1070 * @param p_hwfn 1071 * @param p_ptt 1072 * @param eswitch - eswitch mode 1073 * 1074 * @return int - 0 - operation was successful. 1075 */ 1076 int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn, 1077 struct qed_ptt *p_ptt, 1078 enum qed_ov_eswitch eswitch); 1079 1080 #define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP 1081 #define QED_MCP_RESC_LOCK_MAX_VAL 31 1082 1083 enum qed_resc_lock { 1084 QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL, 1085 QED_RESC_LOCK_PTP_PORT0, 1086 QED_RESC_LOCK_PTP_PORT1, 1087 QED_RESC_LOCK_PTP_PORT2, 1088 QED_RESC_LOCK_PTP_PORT3, 1089 QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL, 1090 QED_RESC_LOCK_RESC_INVALID 1091 }; 1092 1093 /** 1094 * @brief - Initiates PF FLR 1095 * 1096 * @param p_hwfn 1097 * @param p_ptt 1098 * 1099 * @return int - 0 - operation was successful. 1100 */ 1101 int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1102 struct qed_resc_lock_params { 1103 /* Resource number [valid values are 0..31] */ 1104 u8 resource; 1105 1106 /* Lock timeout value in seconds [default, none or 1..254] */ 1107 u8 timeout; 1108 #define QED_MCP_RESC_LOCK_TO_DEFAULT 0 1109 #define QED_MCP_RESC_LOCK_TO_NONE 255 1110 1111 /* Number of times to retry locking */ 1112 u8 retry_num; 1113 #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10 1114 1115 /* The interval in usec between retries */ 1116 u16 retry_interval; 1117 #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000 1118 1119 /* Use sleep or delay between retries */ 1120 bool sleep_b4_retry; 1121 1122 /* Will be set as true if the resource is free and granted */ 1123 bool b_granted; 1124 1125 /* Will be filled with the resource owner. 1126 * [0..15 = PF0-15, 16 = MFW] 1127 */ 1128 u8 owner; 1129 }; 1130 1131 /** 1132 * @brief Acquires MFW generic resource lock 1133 * 1134 * @param p_hwfn 1135 * @param p_ptt 1136 * @param p_params 1137 * 1138 * @return int - 0 - operation was successful. 1139 */ 1140 int 1141 qed_mcp_resc_lock(struct qed_hwfn *p_hwfn, 1142 struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params); 1143 1144 struct qed_resc_unlock_params { 1145 /* Resource number [valid values are 0..31] */ 1146 u8 resource; 1147 1148 /* Allow to release a resource even if belongs to another PF */ 1149 bool b_force; 1150 1151 /* Will be set as true if the resource is released */ 1152 bool b_released; 1153 }; 1154 1155 /** 1156 * @brief Releases MFW generic resource lock 1157 * 1158 * @param p_hwfn 1159 * @param p_ptt 1160 * @param p_params 1161 * 1162 * @return int - 0 - operation was successful. 1163 */ 1164 int 1165 qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn, 1166 struct qed_ptt *p_ptt, 1167 struct qed_resc_unlock_params *p_params); 1168 1169 /** 1170 * @brief - default initialization for lock/unlock resource structs 1171 * 1172 * @param p_lock - lock params struct to be initialized; Can be NULL 1173 * @param p_unlock - unlock params struct to be initialized; Can be NULL 1174 * @param resource - the requested resource 1175 * @paral b_is_permanent - disable retries & aging when set 1176 */ 1177 void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock, 1178 struct qed_resc_unlock_params *p_unlock, 1179 enum qed_resc_lock 1180 resource, bool b_is_permanent); 1181 1182 /** 1183 * @brief - Return whether management firmware support smart AN 1184 * 1185 * @param p_hwfn 1186 * 1187 * @return bool - true if feature is supported. 1188 */ 1189 bool qed_mcp_is_smart_an_supported(struct qed_hwfn *p_hwfn); 1190 1191 /** 1192 * @brief Learn of supported MFW features; To be done during early init 1193 * 1194 * @param p_hwfn 1195 * @param p_ptt 1196 */ 1197 int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1198 1199 /** 1200 * @brief Inform MFW of set of features supported by driver. Should be done 1201 * inside the content of the LOAD_REQ. 1202 * 1203 * @param p_hwfn 1204 * @param p_ptt 1205 */ 1206 int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1207 1208 /** 1209 * @brief Read ufp config from the shared memory. 1210 * 1211 * @param p_hwfn 1212 * @param p_ptt 1213 */ 1214 void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1215 1216 /** 1217 * @brief Populate the nvm info shadow in the given hardware function 1218 * 1219 * @param p_hwfn 1220 */ 1221 int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn); 1222 1223 /** 1224 * @brief Get the engine affinity configuration. 1225 * 1226 * @param p_hwfn 1227 * @param p_ptt 1228 */ 1229 int qed_mcp_get_engine_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1230 1231 /** 1232 * @brief Get the PPFID bitmap. 1233 * 1234 * @param p_hwfn 1235 * @param p_ptt 1236 */ 1237 int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 1238 1239 /** 1240 * @brief Get NVM config attribute value. 1241 * 1242 * @param p_hwfn 1243 * @param p_ptt 1244 * @param option_id 1245 * @param entity_id 1246 * @param flags 1247 * @param p_buf 1248 * @param p_len 1249 */ 1250 int qed_mcp_nvm_get_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1251 u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, 1252 u32 *p_len); 1253 1254 /** 1255 * @brief Set NVM config attribute value. 1256 * 1257 * @param p_hwfn 1258 * @param p_ptt 1259 * @param option_id 1260 * @param entity_id 1261 * @param flags 1262 * @param p_buf 1263 * @param len 1264 */ 1265 int qed_mcp_nvm_set_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1266 u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, 1267 u32 len); 1268 #endif 1269