1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
2e8f1cb50SMintz, Yuval  * Copyright (c) 2015-2017  QLogic Corporation
3fe56b9e6SYuval Mintz  *
4e8f1cb50SMintz, Yuval  * This software is available to you under a choice of one of two
5e8f1cb50SMintz, Yuval  * licenses.  You may choose to be licensed under the terms of the GNU
6e8f1cb50SMintz, Yuval  * General Public License (GPL) Version 2, available from the file
7e8f1cb50SMintz, Yuval  * COPYING in the main directory of this source tree, or the
8e8f1cb50SMintz, Yuval  * OpenIB.org BSD license below:
9e8f1cb50SMintz, Yuval  *
10e8f1cb50SMintz, Yuval  *     Redistribution and use in source and binary forms, with or
11e8f1cb50SMintz, Yuval  *     without modification, are permitted provided that the following
12e8f1cb50SMintz, Yuval  *     conditions are met:
13e8f1cb50SMintz, Yuval  *
14e8f1cb50SMintz, Yuval  *      - Redistributions of source code must retain the above
15e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
16e8f1cb50SMintz, Yuval  *        disclaimer.
17e8f1cb50SMintz, Yuval  *
18e8f1cb50SMintz, Yuval  *      - Redistributions in binary form must reproduce the above
19e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
20e8f1cb50SMintz, Yuval  *        disclaimer in the documentation and /or other materials
21e8f1cb50SMintz, Yuval  *        provided with the distribution.
22e8f1cb50SMintz, Yuval  *
23e8f1cb50SMintz, Yuval  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24e8f1cb50SMintz, Yuval  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25e8f1cb50SMintz, Yuval  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26e8f1cb50SMintz, Yuval  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27e8f1cb50SMintz, Yuval  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28e8f1cb50SMintz, Yuval  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29e8f1cb50SMintz, Yuval  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30e8f1cb50SMintz, Yuval  * SOFTWARE.
31fe56b9e6SYuval Mintz  */
32fe56b9e6SYuval Mintz 
33fe56b9e6SYuval Mintz #ifndef _QED_MCP_H
34fe56b9e6SYuval Mintz #define _QED_MCP_H
35fe56b9e6SYuval Mintz 
36fe56b9e6SYuval Mintz #include <linux/types.h>
37fe56b9e6SYuval Mintz #include <linux/delay.h>
38fe56b9e6SYuval Mintz #include <linux/slab.h>
395529bad9STomer Tayar #include <linux/spinlock.h>
401e128c81SArun Easi #include <linux/qed/qed_fcoe_if.h>
41fe56b9e6SYuval Mintz #include "qed_hsi.h"
425d24bcf1STomer Tayar #include "qed_dev_api.h"
43fe56b9e6SYuval Mintz 
44cc875c2eSYuval Mintz struct qed_mcp_link_speed_params {
45cc875c2eSYuval Mintz 	bool    autoneg;
46cc875c2eSYuval Mintz 	u32     advertised_speeds;      /* bitmask of DRV_SPEED_CAPABILITY */
47cc875c2eSYuval Mintz 	u32     forced_speed;	   /* In Mb/s */
48cc875c2eSYuval Mintz };
49cc875c2eSYuval Mintz 
50cc875c2eSYuval Mintz struct qed_mcp_link_pause_params {
51cc875c2eSYuval Mintz 	bool    autoneg;
52cc875c2eSYuval Mintz 	bool    forced_rx;
53cc875c2eSYuval Mintz 	bool    forced_tx;
54cc875c2eSYuval Mintz };
55cc875c2eSYuval Mintz 
56cc875c2eSYuval Mintz struct qed_mcp_link_params {
57cc875c2eSYuval Mintz 	struct qed_mcp_link_speed_params	speed;
58cc875c2eSYuval Mintz 	struct qed_mcp_link_pause_params	pause;
59cc875c2eSYuval Mintz 	u32				     loopback_mode;
60cc875c2eSYuval Mintz };
61cc875c2eSYuval Mintz 
62cc875c2eSYuval Mintz struct qed_mcp_link_capabilities {
63cc875c2eSYuval Mintz 	u32 speed_capabilities;
6434f9199cSsudarsana.kalluru@cavium.com 	bool default_speed_autoneg;
65cc875c2eSYuval Mintz };
66cc875c2eSYuval Mintz 
67cc875c2eSYuval Mintz struct qed_mcp_link_state {
68cc875c2eSYuval Mintz 	bool    link_up;
69cc875c2eSYuval Mintz 
70a64b02d5SManish Chopra 	u32	min_pf_rate;
71a64b02d5SManish Chopra 
724b01e519SManish Chopra 	/* Actual link speed in Mb/s */
734b01e519SManish Chopra 	u32	line_speed;
744b01e519SManish Chopra 
754b01e519SManish Chopra 	/* PF max speed in Mb/s, deduced from line_speed
764b01e519SManish Chopra 	 * according to PF max bandwidth configuration.
774b01e519SManish Chopra 	 */
784b01e519SManish Chopra 	u32     speed;
79cc875c2eSYuval Mintz 	bool    full_duplex;
80cc875c2eSYuval Mintz 
81cc875c2eSYuval Mintz 	bool    an;
82cc875c2eSYuval Mintz 	bool    an_complete;
83cc875c2eSYuval Mintz 	bool    parallel_detection;
84cc875c2eSYuval Mintz 	bool    pfc_enabled;
85cc875c2eSYuval Mintz 
86cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_HD    BIT(0)
87cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_1G_FD    BIT(1)
88cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_10G      BIT(2)
89cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SPEED_20G      BIT(3)
90054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_25G      BIT(4)
91054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_40G      BIT(5)
92054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_50G      BIT(6)
93054c67d1SSudarsana Reddy Kalluru #define QED_LINK_PARTNER_SPEED_100G     BIT(7)
94cc875c2eSYuval Mintz 	u32     partner_adv_speed;
95cc875c2eSYuval Mintz 
96cc875c2eSYuval Mintz 	bool    partner_tx_flow_ctrl_en;
97cc875c2eSYuval Mintz 	bool    partner_rx_flow_ctrl_en;
98cc875c2eSYuval Mintz 
99cc875c2eSYuval Mintz #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
100cc875c2eSYuval Mintz #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
101cc875c2eSYuval Mintz #define QED_LINK_PARTNER_BOTH_PAUSE (3)
102cc875c2eSYuval Mintz 	u8      partner_adv_pause;
103cc875c2eSYuval Mintz 
104cc875c2eSYuval Mintz 	bool    sfp_tx_fault;
105cc875c2eSYuval Mintz };
106cc875c2eSYuval Mintz 
107fe56b9e6SYuval Mintz struct qed_mcp_function_info {
108fe56b9e6SYuval Mintz 	u8				pause_on_host;
109fe56b9e6SYuval Mintz 
110fe56b9e6SYuval Mintz 	enum qed_pci_personality	protocol;
111fe56b9e6SYuval Mintz 
112fe56b9e6SYuval Mintz 	u8				bandwidth_min;
113fe56b9e6SYuval Mintz 	u8				bandwidth_max;
114fe56b9e6SYuval Mintz 
115fe56b9e6SYuval Mintz 	u8				mac[ETH_ALEN];
116fe56b9e6SYuval Mintz 
117fe56b9e6SYuval Mintz 	u64				wwn_port;
118fe56b9e6SYuval Mintz 	u64				wwn_node;
119fe56b9e6SYuval Mintz 
120fe56b9e6SYuval Mintz #define QED_MCP_VLAN_UNSET              (0xffff)
121fe56b9e6SYuval Mintz 	u16				ovlan;
1220fefbfbaSSudarsana Kalluru 
1230fefbfbaSSudarsana Kalluru 	u16				mtu;
124fe56b9e6SYuval Mintz };
125fe56b9e6SYuval Mintz 
126fe56b9e6SYuval Mintz struct qed_mcp_nvm_common {
127fe56b9e6SYuval Mintz 	u32	offset;
128fe56b9e6SYuval Mintz 	u32	param;
129fe56b9e6SYuval Mintz 	u32	resp;
130fe56b9e6SYuval Mintz 	u32	cmd;
131fe56b9e6SYuval Mintz };
132fe56b9e6SYuval Mintz 
133fe56b9e6SYuval Mintz struct qed_mcp_drv_version {
134fe56b9e6SYuval Mintz 	u32	version;
135fe56b9e6SYuval Mintz 	u8	name[MCP_DRV_VER_STR_SIZE - 4];
136fe56b9e6SYuval Mintz };
137fe56b9e6SYuval Mintz 
1386c754246SSudarsana Reddy Kalluru struct qed_mcp_lan_stats {
1396c754246SSudarsana Reddy Kalluru 	u64 ucast_rx_pkts;
1406c754246SSudarsana Reddy Kalluru 	u64 ucast_tx_pkts;
1416c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1426c754246SSudarsana Reddy Kalluru };
1436c754246SSudarsana Reddy Kalluru 
1446c754246SSudarsana Reddy Kalluru struct qed_mcp_fcoe_stats {
1456c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1466c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1476c754246SSudarsana Reddy Kalluru 	u32 fcs_err;
1486c754246SSudarsana Reddy Kalluru 	u32 login_failure;
1496c754246SSudarsana Reddy Kalluru };
1506c754246SSudarsana Reddy Kalluru 
1516c754246SSudarsana Reddy Kalluru struct qed_mcp_iscsi_stats {
1526c754246SSudarsana Reddy Kalluru 	u64 rx_pdus;
1536c754246SSudarsana Reddy Kalluru 	u64 tx_pdus;
1546c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1556c754246SSudarsana Reddy Kalluru 	u64 tx_bytes;
1566c754246SSudarsana Reddy Kalluru };
1576c754246SSudarsana Reddy Kalluru 
1586c754246SSudarsana Reddy Kalluru struct qed_mcp_rdma_stats {
1596c754246SSudarsana Reddy Kalluru 	u64 rx_pkts;
1606c754246SSudarsana Reddy Kalluru 	u64 tx_pkts;
1616c754246SSudarsana Reddy Kalluru 	u64 rx_bytes;
1626c754246SSudarsana Reddy Kalluru 	u64 tx_byts;
1636c754246SSudarsana Reddy Kalluru };
1646c754246SSudarsana Reddy Kalluru 
1656c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type {
1666c754246SSudarsana Reddy Kalluru 	QED_MCP_LAN_STATS,
1676c754246SSudarsana Reddy Kalluru 	QED_MCP_FCOE_STATS,
1686c754246SSudarsana Reddy Kalluru 	QED_MCP_ISCSI_STATS,
1696c754246SSudarsana Reddy Kalluru 	QED_MCP_RDMA_STATS
1706c754246SSudarsana Reddy Kalluru };
1716c754246SSudarsana Reddy Kalluru 
1726c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats {
1736c754246SSudarsana Reddy Kalluru 	struct qed_mcp_lan_stats lan_stats;
1746c754246SSudarsana Reddy Kalluru 	struct qed_mcp_fcoe_stats fcoe_stats;
1756c754246SSudarsana Reddy Kalluru 	struct qed_mcp_iscsi_stats iscsi_stats;
1766c754246SSudarsana Reddy Kalluru 	struct qed_mcp_rdma_stats rdma_stats;
1776c754246SSudarsana Reddy Kalluru };
1786c754246SSudarsana Reddy Kalluru 
1790fefbfbaSSudarsana Kalluru enum qed_ov_eswitch {
1800fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_NONE,
1810fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEB,
1820fefbfbaSSudarsana Kalluru 	QED_OV_ESWITCH_VEPA
1830fefbfbaSSudarsana Kalluru };
1840fefbfbaSSudarsana Kalluru 
1850fefbfbaSSudarsana Kalluru enum qed_ov_client {
1860fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_DRV,
1870fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_USER,
1880fefbfbaSSudarsana Kalluru 	QED_OV_CLIENT_VENDOR_SPEC
1890fefbfbaSSudarsana Kalluru };
1900fefbfbaSSudarsana Kalluru 
1910fefbfbaSSudarsana Kalluru enum qed_ov_driver_state {
1920fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_NOT_LOADED,
1930fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_DISABLED,
1940fefbfbaSSudarsana Kalluru 	QED_OV_DRIVER_STATE_ACTIVE
1950fefbfbaSSudarsana Kalluru };
1960fefbfbaSSudarsana Kalluru 
1970fefbfbaSSudarsana Kalluru enum qed_ov_wol {
1980fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DEFAULT,
1990fefbfbaSSudarsana Kalluru 	QED_OV_WOL_DISABLED,
2000fefbfbaSSudarsana Kalluru 	QED_OV_WOL_ENABLED
2010fefbfbaSSudarsana Kalluru };
2020fefbfbaSSudarsana Kalluru 
203fe56b9e6SYuval Mintz /**
204cc875c2eSYuval Mintz  * @brief - returns the link params of the hw function
205cc875c2eSYuval Mintz  *
206cc875c2eSYuval Mintz  * @param p_hwfn
207cc875c2eSYuval Mintz  *
208cc875c2eSYuval Mintz  * @returns pointer to link params
209cc875c2eSYuval Mintz  */
210cc875c2eSYuval Mintz struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
211cc875c2eSYuval Mintz 
212cc875c2eSYuval Mintz /**
213cc875c2eSYuval Mintz  * @brief - return the link state of the hw function
214cc875c2eSYuval Mintz  *
215cc875c2eSYuval Mintz  * @param p_hwfn
216cc875c2eSYuval Mintz  *
217cc875c2eSYuval Mintz  * @returns pointer to link state
218cc875c2eSYuval Mintz  */
219cc875c2eSYuval Mintz struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
220cc875c2eSYuval Mintz 
221cc875c2eSYuval Mintz /**
222cc875c2eSYuval Mintz  * @brief - return the link capabilities of the hw function
223cc875c2eSYuval Mintz  *
224cc875c2eSYuval Mintz  * @param p_hwfn
225cc875c2eSYuval Mintz  *
226cc875c2eSYuval Mintz  * @returns pointer to link capabilities
227cc875c2eSYuval Mintz  */
228cc875c2eSYuval Mintz struct qed_mcp_link_capabilities
229cc875c2eSYuval Mintz 	*qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
230cc875c2eSYuval Mintz 
231cc875c2eSYuval Mintz /**
232cc875c2eSYuval Mintz  * @brief Request the MFW to set the the link according to 'link_input'.
233cc875c2eSYuval Mintz  *
234cc875c2eSYuval Mintz  * @param p_hwfn
235cc875c2eSYuval Mintz  * @param p_ptt
236cc875c2eSYuval Mintz  * @param b_up - raise link if `true'. Reset link if `false'.
237cc875c2eSYuval Mintz  *
238cc875c2eSYuval Mintz  * @return int
239cc875c2eSYuval Mintz  */
240cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn   *p_hwfn,
241cc875c2eSYuval Mintz 		     struct qed_ptt     *p_ptt,
242cc875c2eSYuval Mintz 		     bool               b_up);
243cc875c2eSYuval Mintz 
244cc875c2eSYuval Mintz /**
245fe56b9e6SYuval Mintz  * @brief Get the management firmware version value
246fe56b9e6SYuval Mintz  *
2471408cc1fSYuval Mintz  * @param p_hwfn
2481408cc1fSYuval Mintz  * @param p_ptt
2491408cc1fSYuval Mintz  * @param p_mfw_ver    - mfw version value
2501408cc1fSYuval Mintz  * @param p_running_bundle_id	- image id in nvram; Optional.
251fe56b9e6SYuval Mintz  *
2521408cc1fSYuval Mintz  * @return int - 0 - operation was successful.
253fe56b9e6SYuval Mintz  */
2541408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
2551408cc1fSYuval Mintz 			struct qed_ptt *p_ptt,
2561408cc1fSYuval Mintz 			u32 *p_mfw_ver, u32 *p_running_bundle_id);
257fe56b9e6SYuval Mintz 
258fe56b9e6SYuval Mintz /**
259cc875c2eSYuval Mintz  * @brief Get media type value of the port.
260cc875c2eSYuval Mintz  *
261cc875c2eSYuval Mintz  * @param cdev      - qed dev pointer
262cc875c2eSYuval Mintz  * @param mfw_ver    - media type value
263cc875c2eSYuval Mintz  *
264cc875c2eSYuval Mintz  * @return int -
265cc875c2eSYuval Mintz  *      0 - Operation was successul.
266cc875c2eSYuval Mintz  *      -EBUSY - Operation failed
267cc875c2eSYuval Mintz  */
268cc875c2eSYuval Mintz int qed_mcp_get_media_type(struct qed_dev      *cdev,
269cc875c2eSYuval Mintz 			   u32                  *media_type);
270cc875c2eSYuval Mintz 
271cc875c2eSYuval Mintz /**
272fe56b9e6SYuval Mintz  * @brief General function for sending commands to the MCP
273fe56b9e6SYuval Mintz  *        mailbox. It acquire mutex lock for the entire
274fe56b9e6SYuval Mintz  *        operation, from sending the request until the MCP
275fe56b9e6SYuval Mintz  *        response. Waiting for MCP response will be checked up
276fe56b9e6SYuval Mintz  *        to 5 seconds every 5ms.
277fe56b9e6SYuval Mintz  *
278fe56b9e6SYuval Mintz  * @param p_hwfn     - hw function
279fe56b9e6SYuval Mintz  * @param p_ptt      - PTT required for register access
280fe56b9e6SYuval Mintz  * @param cmd        - command to be sent to the MCP.
281fe56b9e6SYuval Mintz  * @param param      - Optional param
282fe56b9e6SYuval Mintz  * @param o_mcp_resp - The MCP response code (exclude sequence).
283fe56b9e6SYuval Mintz  * @param o_mcp_param- Optional parameter provided by the MCP
284fe56b9e6SYuval Mintz  *                     response
285fe56b9e6SYuval Mintz  * @return int - 0 - operation
286fe56b9e6SYuval Mintz  * was successul.
287fe56b9e6SYuval Mintz  */
288fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
289fe56b9e6SYuval Mintz 		struct qed_ptt *p_ptt,
290fe56b9e6SYuval Mintz 		u32 cmd,
291fe56b9e6SYuval Mintz 		u32 param,
292fe56b9e6SYuval Mintz 		u32 *o_mcp_resp,
293fe56b9e6SYuval Mintz 		u32 *o_mcp_param);
294fe56b9e6SYuval Mintz 
295fe56b9e6SYuval Mintz /**
296fe56b9e6SYuval Mintz  * @brief - drains the nig, allowing completion to pass in case of pauses.
297fe56b9e6SYuval Mintz  *          (Should be called only from sleepable context)
298fe56b9e6SYuval Mintz  *
299fe56b9e6SYuval Mintz  * @param p_hwfn
300fe56b9e6SYuval Mintz  * @param p_ptt
301fe56b9e6SYuval Mintz  */
302fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn,
303fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
304fe56b9e6SYuval Mintz 
305fe56b9e6SYuval Mintz /**
306cee4d264SManish Chopra  * @brief Get the flash size value
307cee4d264SManish Chopra  *
308cee4d264SManish Chopra  * @param p_hwfn
309cee4d264SManish Chopra  * @param p_ptt
310cee4d264SManish Chopra  * @param p_flash_size  - flash size in bytes to be filled.
311cee4d264SManish Chopra  *
312cee4d264SManish Chopra  * @return int - 0 - operation was successul.
313cee4d264SManish Chopra  */
314cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn     *p_hwfn,
315cee4d264SManish Chopra 			   struct qed_ptt       *p_ptt,
316cee4d264SManish Chopra 			   u32 *p_flash_size);
317cee4d264SManish Chopra 
318cee4d264SManish Chopra /**
319fe56b9e6SYuval Mintz  * @brief Send driver version to MFW
320fe56b9e6SYuval Mintz  *
321fe56b9e6SYuval Mintz  * @param p_hwfn
322fe56b9e6SYuval Mintz  * @param p_ptt
323fe56b9e6SYuval Mintz  * @param version - Version value
324fe56b9e6SYuval Mintz  * @param name - Protocol driver name
325fe56b9e6SYuval Mintz  *
326fe56b9e6SYuval Mintz  * @return int - 0 - operation was successul.
327fe56b9e6SYuval Mintz  */
328fe56b9e6SYuval Mintz int
329fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
330fe56b9e6SYuval Mintz 			 struct qed_ptt *p_ptt,
331fe56b9e6SYuval Mintz 			 struct qed_mcp_drv_version *p_ver);
332fe56b9e6SYuval Mintz 
33391420b83SSudarsana Kalluru /**
3340fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the change in base device properties
3350fefbfbaSSudarsana Kalluru  *
3360fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3370fefbfbaSSudarsana Kalluru  *  @param p_ptt
3380fefbfbaSSudarsana Kalluru  *  @param client - qed client type
3390fefbfbaSSudarsana Kalluru  *
3400fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3410fefbfbaSSudarsana Kalluru  */
3420fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
3430fefbfbaSSudarsana Kalluru 				     struct qed_ptt *p_ptt,
3440fefbfbaSSudarsana Kalluru 				     enum qed_ov_client client);
3450fefbfbaSSudarsana Kalluru 
3460fefbfbaSSudarsana Kalluru /**
3470fefbfbaSSudarsana Kalluru  * @brief Notify MFW about the driver state
3480fefbfbaSSudarsana Kalluru  *
3490fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3500fefbfbaSSudarsana Kalluru  *  @param p_ptt
3510fefbfbaSSudarsana Kalluru  *  @param drv_state - Driver state
3520fefbfbaSSudarsana Kalluru  *
3530fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3540fefbfbaSSudarsana Kalluru  */
3550fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
3560fefbfbaSSudarsana Kalluru 				   struct qed_ptt *p_ptt,
3570fefbfbaSSudarsana Kalluru 				   enum qed_ov_driver_state drv_state);
3580fefbfbaSSudarsana Kalluru 
3590fefbfbaSSudarsana Kalluru /**
3600fefbfbaSSudarsana Kalluru  * @brief Send MTU size to MFW
3610fefbfbaSSudarsana Kalluru  *
3620fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3630fefbfbaSSudarsana Kalluru  *  @param p_ptt
3640fefbfbaSSudarsana Kalluru  *  @param mtu - MTU size
3650fefbfbaSSudarsana Kalluru  *
3660fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3670fefbfbaSSudarsana Kalluru  */
3680fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
3690fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u16 mtu);
3700fefbfbaSSudarsana Kalluru 
3710fefbfbaSSudarsana Kalluru /**
3720fefbfbaSSudarsana Kalluru  * @brief Send MAC address to MFW
3730fefbfbaSSudarsana Kalluru  *
3740fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3750fefbfbaSSudarsana Kalluru  *  @param p_ptt
3760fefbfbaSSudarsana Kalluru  *  @param mac - MAC address
3770fefbfbaSSudarsana Kalluru  *
3780fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3790fefbfbaSSudarsana Kalluru  */
3800fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
3810fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt, u8 *mac);
3820fefbfbaSSudarsana Kalluru 
3830fefbfbaSSudarsana Kalluru /**
3840fefbfbaSSudarsana Kalluru  * @brief Send WOL mode to MFW
3850fefbfbaSSudarsana Kalluru  *
3860fefbfbaSSudarsana Kalluru  *  @param p_hwfn
3870fefbfbaSSudarsana Kalluru  *  @param p_ptt
3880fefbfbaSSudarsana Kalluru  *  @param wol - WOL mode
3890fefbfbaSSudarsana Kalluru  *
3900fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
3910fefbfbaSSudarsana Kalluru  */
3920fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
3930fefbfbaSSudarsana Kalluru 			  struct qed_ptt *p_ptt,
3940fefbfbaSSudarsana Kalluru 			  enum qed_ov_wol wol);
3950fefbfbaSSudarsana Kalluru 
3960fefbfbaSSudarsana Kalluru /**
39791420b83SSudarsana Kalluru  * @brief Set LED status
39891420b83SSudarsana Kalluru  *
39991420b83SSudarsana Kalluru  *  @param p_hwfn
40091420b83SSudarsana Kalluru  *  @param p_ptt
40191420b83SSudarsana Kalluru  *  @param mode - LED mode
40291420b83SSudarsana Kalluru  *
40391420b83SSudarsana Kalluru  * @return int - 0 - operation was successful.
40491420b83SSudarsana Kalluru  */
40591420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
40691420b83SSudarsana Kalluru 		    struct qed_ptt *p_ptt,
40791420b83SSudarsana Kalluru 		    enum qed_led_mode mode);
40891420b83SSudarsana Kalluru 
40903dc76caSSudarsana Reddy Kalluru /**
4107a4b21b7SMintz, Yuval  * @brief Read from nvm
4117a4b21b7SMintz, Yuval  *
4127a4b21b7SMintz, Yuval  *  @param cdev
4137a4b21b7SMintz, Yuval  *  @param addr - nvm offset
4147a4b21b7SMintz, Yuval  *  @param p_buf - nvm read buffer
4157a4b21b7SMintz, Yuval  *  @param len - buffer len
4167a4b21b7SMintz, Yuval  *
4177a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4187a4b21b7SMintz, Yuval  */
4197a4b21b7SMintz, Yuval int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
4207a4b21b7SMintz, Yuval 
4217a4b21b7SMintz, Yuval /**
42203dc76caSSudarsana Reddy Kalluru  * @brief Bist register test
42303dc76caSSudarsana Reddy Kalluru  *
42403dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
42503dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
42603dc76caSSudarsana Reddy Kalluru  *
42703dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
42803dc76caSSudarsana Reddy Kalluru  */
42903dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
43003dc76caSSudarsana Reddy Kalluru 			       struct qed_ptt *p_ptt);
43103dc76caSSudarsana Reddy Kalluru 
43203dc76caSSudarsana Reddy Kalluru /**
43303dc76caSSudarsana Reddy Kalluru  * @brief Bist clock test
43403dc76caSSudarsana Reddy Kalluru  *
43503dc76caSSudarsana Reddy Kalluru  *  @param p_hwfn    - hw function
43603dc76caSSudarsana Reddy Kalluru  *  @param p_ptt     - PTT required for register access
43703dc76caSSudarsana Reddy Kalluru  *
43803dc76caSSudarsana Reddy Kalluru  * @return int - 0 - operation was successful.
43903dc76caSSudarsana Reddy Kalluru  */
44003dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
44103dc76caSSudarsana Reddy Kalluru 			    struct qed_ptt *p_ptt);
44203dc76caSSudarsana Reddy Kalluru 
4437a4b21b7SMintz, Yuval /**
4447a4b21b7SMintz, Yuval  * @brief Bist nvm test - get number of images
4457a4b21b7SMintz, Yuval  *
4467a4b21b7SMintz, Yuval  *  @param p_hwfn       - hw function
4477a4b21b7SMintz, Yuval  *  @param p_ptt        - PTT required for register access
4487a4b21b7SMintz, Yuval  *  @param num_images   - number of images if operation was
4497a4b21b7SMintz, Yuval  *			  successful. 0 if not.
4507a4b21b7SMintz, Yuval  *
4517a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4527a4b21b7SMintz, Yuval  */
4537a4b21b7SMintz, Yuval int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn,
4547a4b21b7SMintz, Yuval 					 struct qed_ptt *p_ptt,
4557a4b21b7SMintz, Yuval 					 u32 *num_images);
4567a4b21b7SMintz, Yuval 
4577a4b21b7SMintz, Yuval /**
4587a4b21b7SMintz, Yuval  * @brief Bist nvm test - get image attributes by index
4597a4b21b7SMintz, Yuval  *
4607a4b21b7SMintz, Yuval  *  @param p_hwfn      - hw function
4617a4b21b7SMintz, Yuval  *  @param p_ptt       - PTT required for register access
4627a4b21b7SMintz, Yuval  *  @param p_image_att - Attributes of image
4637a4b21b7SMintz, Yuval  *  @param image_index - Index of image to get information for
4647a4b21b7SMintz, Yuval  *
4657a4b21b7SMintz, Yuval  * @return int - 0 - operation was successful.
4667a4b21b7SMintz, Yuval  */
4677a4b21b7SMintz, Yuval int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
4687a4b21b7SMintz, Yuval 					struct qed_ptt *p_ptt,
4697a4b21b7SMintz, Yuval 					struct bist_nvm_image_att *p_image_att,
4707a4b21b7SMintz, Yuval 					u32 image_index);
4717a4b21b7SMintz, Yuval 
472fe56b9e6SYuval Mintz /* Using hwfn number (and not pf_num) is required since in CMT mode,
473fe56b9e6SYuval Mintz  * same pf_num may be used by two different hwfn
474fe56b9e6SYuval Mintz  * TODO - this shouldn't really be in .h file, but until all fields
475fe56b9e6SYuval Mintz  * required during hw-init will be placed in their correct place in shmem
476fe56b9e6SYuval Mintz  * we need it in qed_dev.c [for readin the nvram reflection in shmem].
477fe56b9e6SYuval Mintz  */
478fe56b9e6SYuval Mintz #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ?	       \
479fe56b9e6SYuval Mintz 					    ((rel_pfid) |		       \
480fe56b9e6SYuval Mintz 					     ((p_hwfn)->abs_pf_id & 1) << 3) : \
481fe56b9e6SYuval Mintz 					    rel_pfid)
482fe56b9e6SYuval Mintz #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
483fe56b9e6SYuval Mintz 
484fe56b9e6SYuval Mintz #define MFW_PORT(_p_hwfn)       ((_p_hwfn)->abs_pf_id %			  \
4859c79ddaaSMintz, Yuval 				 ((_p_hwfn)->cdev->num_ports_in_engines * \
4869c79ddaaSMintz, Yuval 				  qed_device_num_engines((_p_hwfn)->cdev)))
4879c79ddaaSMintz, Yuval 
488fe56b9e6SYuval Mintz struct qed_mcp_info {
4894ed1eea8STomer Tayar 	/* List for mailbox commands which were sent and wait for a response */
4904ed1eea8STomer Tayar 	struct list_head			cmd_list;
4914ed1eea8STomer Tayar 
4924ed1eea8STomer Tayar 	/* Spinlock used for protecting the access to the mailbox commands list
4934ed1eea8STomer Tayar 	 * and the sending of the commands.
4944ed1eea8STomer Tayar 	 */
4954ed1eea8STomer Tayar 	spinlock_t				cmd_lock;
49665ed2ffdSMintz, Yuval 
49765ed2ffdSMintz, Yuval 	/* Spinlock used for syncing SW link-changes and link-changes
49865ed2ffdSMintz, Yuval 	 * originating from attention context.
49965ed2ffdSMintz, Yuval 	 */
50065ed2ffdSMintz, Yuval 	spinlock_t				link_lock;
5015529bad9STomer Tayar 	bool					block_mb_sending;
502fe56b9e6SYuval Mintz 	u32					public_base;
503fe56b9e6SYuval Mintz 	u32					drv_mb_addr;
504fe56b9e6SYuval Mintz 	u32					mfw_mb_addr;
505fe56b9e6SYuval Mintz 	u32					port_addr;
506fe56b9e6SYuval Mintz 	u16					drv_mb_seq;
507fe56b9e6SYuval Mintz 	u16					drv_pulse_seq;
508cc875c2eSYuval Mintz 	struct qed_mcp_link_params		link_input;
509cc875c2eSYuval Mintz 	struct qed_mcp_link_state		link_output;
510cc875c2eSYuval Mintz 	struct qed_mcp_link_capabilities	link_capabilities;
511fe56b9e6SYuval Mintz 	struct qed_mcp_function_info		func_info;
512fe56b9e6SYuval Mintz 	u8					*mfw_mb_cur;
513fe56b9e6SYuval Mintz 	u8					*mfw_mb_shadow;
514fe56b9e6SYuval Mintz 	u16					mfw_mb_length;
5154ed1eea8STomer Tayar 	u32					mcp_hist;
516fe56b9e6SYuval Mintz };
517fe56b9e6SYuval Mintz 
5185529bad9STomer Tayar struct qed_mcp_mb_params {
5195529bad9STomer Tayar 	u32			cmd;
5205529bad9STomer Tayar 	u32			param;
5212f67af8cSTomer Tayar 	void			*p_data_src;
5222f67af8cSTomer Tayar 	u8			data_src_size;
5232f67af8cSTomer Tayar 	void			*p_data_dst;
5242f67af8cSTomer Tayar 	u8			data_dst_size;
5255529bad9STomer Tayar 	u32			mcp_resp;
5265529bad9STomer Tayar 	u32			mcp_param;
5275529bad9STomer Tayar };
5285529bad9STomer Tayar 
529fe56b9e6SYuval Mintz /**
530fe56b9e6SYuval Mintz  * @brief Initialize the interface with the MCP
531fe56b9e6SYuval Mintz  *
532fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
533fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
534fe56b9e6SYuval Mintz  *
535fe56b9e6SYuval Mintz  * @return int
536fe56b9e6SYuval Mintz  */
537fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
538fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
539fe56b9e6SYuval Mintz 
540fe56b9e6SYuval Mintz /**
541fe56b9e6SYuval Mintz  * @brief Initialize the port interface with the MCP
542fe56b9e6SYuval Mintz  *
543fe56b9e6SYuval Mintz  * @param p_hwfn
544fe56b9e6SYuval Mintz  * @param p_ptt
545fe56b9e6SYuval Mintz  * Can only be called after `num_ports_in_engines' is set
546fe56b9e6SYuval Mintz  */
547fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
548fe56b9e6SYuval Mintz 			   struct qed_ptt *p_ptt);
549fe56b9e6SYuval Mintz /**
550fe56b9e6SYuval Mintz  * @brief Releases resources allocated during the init process.
551fe56b9e6SYuval Mintz  *
552fe56b9e6SYuval Mintz  * @param p_hwfn - HW func
553fe56b9e6SYuval Mintz  * @param p_ptt - PTT required for register access
554fe56b9e6SYuval Mintz  *
555fe56b9e6SYuval Mintz  * @return int
556fe56b9e6SYuval Mintz  */
557fe56b9e6SYuval Mintz 
558fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn);
559fe56b9e6SYuval Mintz 
560fe56b9e6SYuval Mintz /**
561cc875c2eSYuval Mintz  * @brief This function is called from the DPC context. After
562cc875c2eSYuval Mintz  * pointing PTT to the mfw mb, check for events sent by the MCP
563cc875c2eSYuval Mintz  * to the driver and ack them. In case a critical event
564cc875c2eSYuval Mintz  * detected, it will be handled here, otherwise the work will be
565cc875c2eSYuval Mintz  * queued to a sleepable work-queue.
566cc875c2eSYuval Mintz  *
567cc875c2eSYuval Mintz  * @param p_hwfn - HW function
568cc875c2eSYuval Mintz  * @param p_ptt - PTT required for register access
569cc875c2eSYuval Mintz  * @return int - 0 - operation
570cc875c2eSYuval Mintz  * was successul.
571cc875c2eSYuval Mintz  */
572cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
573cc875c2eSYuval Mintz 			  struct qed_ptt *p_ptt);
574cc875c2eSYuval Mintz 
5755d24bcf1STomer Tayar enum qed_drv_role {
5765d24bcf1STomer Tayar 	QED_DRV_ROLE_OS,
5775d24bcf1STomer Tayar 	QED_DRV_ROLE_KDUMP,
5785d24bcf1STomer Tayar };
5795d24bcf1STomer Tayar 
5805d24bcf1STomer Tayar struct qed_load_req_params {
5815d24bcf1STomer Tayar 	/* Input params */
5825d24bcf1STomer Tayar 	enum qed_drv_role drv_role;
5835d24bcf1STomer Tayar 	u8 timeout_val;
5845d24bcf1STomer Tayar 	bool avoid_eng_reset;
5855d24bcf1STomer Tayar 	enum qed_override_force_load override_force_load;
5865d24bcf1STomer Tayar 
5875d24bcf1STomer Tayar 	/* Output params */
5885d24bcf1STomer Tayar 	u32 load_code;
5895d24bcf1STomer Tayar };
5905d24bcf1STomer Tayar 
591cc875c2eSYuval Mintz /**
5925d24bcf1STomer Tayar  * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds,
5935d24bcf1STomer Tayar  *        returns whether this PF is the first on the engine/port or function.
594fe56b9e6SYuval Mintz  *
5955d24bcf1STomer Tayar  * @param p_hwfn
5965d24bcf1STomer Tayar  * @param p_ptt
5975d24bcf1STomer Tayar  * @param p_params
5985d24bcf1STomer Tayar  *
5995d24bcf1STomer Tayar  * @return int - 0 - Operation was successful.
600fe56b9e6SYuval Mintz  */
601fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
602fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt,
6035d24bcf1STomer Tayar 		     struct qed_load_req_params *p_params);
604fe56b9e6SYuval Mintz 
605fe56b9e6SYuval Mintz /**
6061226337aSTomer Tayar  * @brief Sends a UNLOAD_REQ message to the MFW
6071226337aSTomer Tayar  *
6081226337aSTomer Tayar  * @param p_hwfn
6091226337aSTomer Tayar  * @param p_ptt
6101226337aSTomer Tayar  *
6111226337aSTomer Tayar  * @return int - 0 - Operation was successful.
6121226337aSTomer Tayar  */
6131226337aSTomer Tayar int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6141226337aSTomer Tayar 
6151226337aSTomer Tayar /**
6161226337aSTomer Tayar  * @brief Sends a UNLOAD_DONE message to the MFW
6171226337aSTomer Tayar  *
6181226337aSTomer Tayar  * @param p_hwfn
6191226337aSTomer Tayar  * @param p_ptt
6201226337aSTomer Tayar  *
6211226337aSTomer Tayar  * @return int - 0 - Operation was successful.
6221226337aSTomer Tayar  */
6231226337aSTomer Tayar int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
6241226337aSTomer Tayar 
6251226337aSTomer Tayar /**
626fe56b9e6SYuval Mintz  * @brief Read the MFW mailbox into Current buffer.
627fe56b9e6SYuval Mintz  *
628fe56b9e6SYuval Mintz  * @param p_hwfn
629fe56b9e6SYuval Mintz  * @param p_ptt
630fe56b9e6SYuval Mintz  */
631fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
632fe56b9e6SYuval Mintz 		     struct qed_ptt *p_ptt);
633fe56b9e6SYuval Mintz 
634fe56b9e6SYuval Mintz /**
6350b55e27dSYuval Mintz  * @brief Ack to mfw that driver finished FLR process for VFs
6360b55e27dSYuval Mintz  *
6370b55e27dSYuval Mintz  * @param p_hwfn
6380b55e27dSYuval Mintz  * @param p_ptt
6390b55e27dSYuval Mintz  * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
6400b55e27dSYuval Mintz  *
6410b55e27dSYuval Mintz  * @param return int - 0 upon success.
6420b55e27dSYuval Mintz  */
6430b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
6440b55e27dSYuval Mintz 		       struct qed_ptt *p_ptt, u32 *vfs_to_ack);
6450b55e27dSYuval Mintz 
6460b55e27dSYuval Mintz /**
647fe56b9e6SYuval Mintz  * @brief - calls during init to read shmem of all function-related info.
648fe56b9e6SYuval Mintz  *
649fe56b9e6SYuval Mintz  * @param p_hwfn
650fe56b9e6SYuval Mintz  *
651fe56b9e6SYuval Mintz  * @param return 0 upon success.
652fe56b9e6SYuval Mintz  */
653fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
654fe56b9e6SYuval Mintz 				 struct qed_ptt *p_ptt);
655fe56b9e6SYuval Mintz 
656fe56b9e6SYuval Mintz /**
657fe56b9e6SYuval Mintz  * @brief - Reset the MCP using mailbox command.
658fe56b9e6SYuval Mintz  *
659fe56b9e6SYuval Mintz  * @param p_hwfn
660fe56b9e6SYuval Mintz  * @param p_ptt
661fe56b9e6SYuval Mintz  *
662fe56b9e6SYuval Mintz  * @param return 0 upon success.
663fe56b9e6SYuval Mintz  */
664fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn,
665fe56b9e6SYuval Mintz 		  struct qed_ptt *p_ptt);
666fe56b9e6SYuval Mintz 
667fe56b9e6SYuval Mintz /**
6684102426fSTomer Tayar  * @brief - Sends an NVM read command request to the MFW to get
6694102426fSTomer Tayar  *        a buffer.
6704102426fSTomer Tayar  *
6714102426fSTomer Tayar  * @param p_hwfn
6724102426fSTomer Tayar  * @param p_ptt
6734102426fSTomer Tayar  * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
6744102426fSTomer Tayar  *            DRV_MSG_CODE_NVM_READ_NVRAM commands
6754102426fSTomer Tayar  * @param param - [0:23] - Offset [24:31] - Size
6764102426fSTomer Tayar  * @param o_mcp_resp - MCP response
6774102426fSTomer Tayar  * @param o_mcp_param - MCP response param
6784102426fSTomer Tayar  * @param o_txn_size -  Buffer size output
6794102426fSTomer Tayar  * @param o_buf - Pointer to the buffer returned by the MFW.
6804102426fSTomer Tayar  *
6814102426fSTomer Tayar  * @param return 0 upon success.
6824102426fSTomer Tayar  */
6834102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
6844102426fSTomer Tayar 		       struct qed_ptt *p_ptt,
6854102426fSTomer Tayar 		       u32 cmd,
6864102426fSTomer Tayar 		       u32 param,
6874102426fSTomer Tayar 		       u32 *o_mcp_resp,
6884102426fSTomer Tayar 		       u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
6894102426fSTomer Tayar 
6904102426fSTomer Tayar /**
691fe56b9e6SYuval Mintz  * @brief indicates whether the MFW objects [under mcp_info] are accessible
692fe56b9e6SYuval Mintz  *
693fe56b9e6SYuval Mintz  * @param p_hwfn
694fe56b9e6SYuval Mintz  *
695fe56b9e6SYuval Mintz  * @return true iff MFW is running and mcp_info is initialized
696fe56b9e6SYuval Mintz  */
697fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
6981408cc1fSYuval Mintz 
6991408cc1fSYuval Mintz /**
7001408cc1fSYuval Mintz  * @brief request MFW to configure MSI-X for a VF
7011408cc1fSYuval Mintz  *
7021408cc1fSYuval Mintz  * @param p_hwfn
7031408cc1fSYuval Mintz  * @param p_ptt
7041408cc1fSYuval Mintz  * @param vf_id - absolute inside engine
7051408cc1fSYuval Mintz  * @param num_sbs - number of entries to request
7061408cc1fSYuval Mintz  *
7071408cc1fSYuval Mintz  * @return int
7081408cc1fSYuval Mintz  */
7091408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
7101408cc1fSYuval Mintz 			   struct qed_ptt *p_ptt, u8 vf_id, u8 num);
7111408cc1fSYuval Mintz 
7124102426fSTomer Tayar /**
7134102426fSTomer Tayar  * @brief - Halt the MCP.
7144102426fSTomer Tayar  *
7154102426fSTomer Tayar  * @param p_hwfn
7164102426fSTomer Tayar  * @param p_ptt
7174102426fSTomer Tayar  *
7184102426fSTomer Tayar  * @param return 0 upon success.
7194102426fSTomer Tayar  */
7204102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
7214102426fSTomer Tayar 
7224102426fSTomer Tayar /**
7234102426fSTomer Tayar  * @brief - Wake up the MCP.
7244102426fSTomer Tayar  *
7254102426fSTomer Tayar  * @param p_hwfn
7264102426fSTomer Tayar  * @param p_ptt
7274102426fSTomer Tayar  *
7284102426fSTomer Tayar  * @param return 0 upon success.
7294102426fSTomer Tayar  */
7304102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
7314102426fSTomer Tayar 
732a64b02d5SManish Chopra int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
7334b01e519SManish Chopra int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
7344b01e519SManish Chopra int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
7354b01e519SManish Chopra 				     struct qed_ptt *p_ptt,
7364b01e519SManish Chopra 				     struct qed_mcp_link_state *p_link,
7374b01e519SManish Chopra 				     u8 max_bw);
738a64b02d5SManish Chopra int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
739a64b02d5SManish Chopra 				     struct qed_ptt *p_ptt,
740a64b02d5SManish Chopra 				     struct qed_mcp_link_state *p_link,
741a64b02d5SManish Chopra 				     u8 min_bw);
742351a4dedSYuval Mintz 
7434102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
7444102426fSTomer Tayar 			  struct qed_ptt *p_ptt, u32 mask_parities);
7454102426fSTomer Tayar 
7460fefbfbaSSudarsana Kalluru /**
7479c8517c4STomer Tayar  * @brief - Sets the MFW's max value for the given resource
7489c8517c4STomer Tayar  *
7499c8517c4STomer Tayar  *  @param p_hwfn
7509c8517c4STomer Tayar  *  @param p_ptt
7519c8517c4STomer Tayar  *  @param res_id
7529c8517c4STomer Tayar  *  @param resc_max_val
7539c8517c4STomer Tayar  *  @param p_mcp_resp
7549c8517c4STomer Tayar  *
7559c8517c4STomer Tayar  * @return int - 0 - operation was successful.
7569c8517c4STomer Tayar  */
7579c8517c4STomer Tayar int
7589c8517c4STomer Tayar qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn,
7599c8517c4STomer Tayar 			 struct qed_ptt *p_ptt,
7609c8517c4STomer Tayar 			 enum qed_resources res_id,
7619c8517c4STomer Tayar 			 u32 resc_max_val, u32 *p_mcp_resp);
7629c8517c4STomer Tayar 
7639c8517c4STomer Tayar /**
7649c8517c4STomer Tayar  * @brief - Gets the MFW allocation info for the given resource
7659c8517c4STomer Tayar  *
7669c8517c4STomer Tayar  *  @param p_hwfn
7679c8517c4STomer Tayar  *  @param p_ptt
7689c8517c4STomer Tayar  *  @param res_id
7699c8517c4STomer Tayar  *  @param p_mcp_resp
7709c8517c4STomer Tayar  *  @param p_resc_num
7719c8517c4STomer Tayar  *  @param p_resc_start
7729c8517c4STomer Tayar  *
7739c8517c4STomer Tayar  * @return int - 0 - operation was successful.
7749c8517c4STomer Tayar  */
7759c8517c4STomer Tayar int
7769c8517c4STomer Tayar qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
7779c8517c4STomer Tayar 		      struct qed_ptt *p_ptt,
7789c8517c4STomer Tayar 		      enum qed_resources res_id,
7799c8517c4STomer Tayar 		      u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start);
7809c8517c4STomer Tayar 
7819c8517c4STomer Tayar /**
7820fefbfbaSSudarsana Kalluru  * @brief Send eswitch mode to MFW
7830fefbfbaSSudarsana Kalluru  *
7840fefbfbaSSudarsana Kalluru  *  @param p_hwfn
7850fefbfbaSSudarsana Kalluru  *  @param p_ptt
7860fefbfbaSSudarsana Kalluru  *  @param eswitch - eswitch mode
7870fefbfbaSSudarsana Kalluru  *
7880fefbfbaSSudarsana Kalluru  * @return int - 0 - operation was successful.
7890fefbfbaSSudarsana Kalluru  */
7900fefbfbaSSudarsana Kalluru int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
7910fefbfbaSSudarsana Kalluru 			      struct qed_ptt *p_ptt,
7920fefbfbaSSudarsana Kalluru 			      enum qed_ov_eswitch eswitch);
7930fefbfbaSSudarsana Kalluru 
7949c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MIN_VAL       RESOURCE_DUMP
7959c8517c4STomer Tayar #define QED_MCP_RESC_LOCK_MAX_VAL       31
7969c8517c4STomer Tayar 
7979c8517c4STomer Tayar enum qed_resc_lock {
7989c8517c4STomer Tayar 	QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL,
799db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT0,
800db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT1,
801db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT2,
802db82f70eSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_PTP_PORT3,
803f470f22cSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL,
804f470f22cSsudarsana.kalluru@cavium.com 	QED_RESC_LOCK_RESC_INVALID
8059c8517c4STomer Tayar };
80618a69e36SMintz, Yuval 
80718a69e36SMintz, Yuval /**
80818a69e36SMintz, Yuval  * @brief - Initiates PF FLR
80918a69e36SMintz, Yuval  *
81018a69e36SMintz, Yuval  *  @param p_hwfn
81118a69e36SMintz, Yuval  *  @param p_ptt
81218a69e36SMintz, Yuval  *
81318a69e36SMintz, Yuval  * @return int - 0 - operation was successful.
81418a69e36SMintz, Yuval  */
81518a69e36SMintz, Yuval int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
81695691c9cSTomer Tayar struct qed_resc_lock_params {
81795691c9cSTomer Tayar 	/* Resource number [valid values are 0..31] */
81895691c9cSTomer Tayar 	u8 resource;
81995691c9cSTomer Tayar 
82095691c9cSTomer Tayar 	/* Lock timeout value in seconds [default, none or 1..254] */
82195691c9cSTomer Tayar 	u8 timeout;
82295691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_DEFAULT    0
82395691c9cSTomer Tayar #define QED_MCP_RESC_LOCK_TO_NONE       255
82495691c9cSTomer Tayar 
82595691c9cSTomer Tayar 	/* Number of times to retry locking */
82695691c9cSTomer Tayar 	u8 retry_num;
827f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT        10
82895691c9cSTomer Tayar 
82995691c9cSTomer Tayar 	/* The interval in usec between retries */
83095691c9cSTomer Tayar 	u16 retry_interval;
831f470f22cSsudarsana.kalluru@cavium.com #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT        10000
83295691c9cSTomer Tayar 
83395691c9cSTomer Tayar 	/* Use sleep or delay between retries */
83495691c9cSTomer Tayar 	bool sleep_b4_retry;
83595691c9cSTomer Tayar 
83695691c9cSTomer Tayar 	/* Will be set as true if the resource is free and granted */
83795691c9cSTomer Tayar 	bool b_granted;
83895691c9cSTomer Tayar 
83995691c9cSTomer Tayar 	/* Will be filled with the resource owner.
84095691c9cSTomer Tayar 	 * [0..15 = PF0-15, 16 = MFW]
84195691c9cSTomer Tayar 	 */
84295691c9cSTomer Tayar 	u8 owner;
84395691c9cSTomer Tayar };
84495691c9cSTomer Tayar 
84595691c9cSTomer Tayar /**
84695691c9cSTomer Tayar  * @brief Acquires MFW generic resource lock
84795691c9cSTomer Tayar  *
84895691c9cSTomer Tayar  *  @param p_hwfn
84995691c9cSTomer Tayar  *  @param p_ptt
85095691c9cSTomer Tayar  *  @param p_params
85195691c9cSTomer Tayar  *
85295691c9cSTomer Tayar  * @return int - 0 - operation was successful.
85395691c9cSTomer Tayar  */
85495691c9cSTomer Tayar int
85595691c9cSTomer Tayar qed_mcp_resc_lock(struct qed_hwfn *p_hwfn,
85695691c9cSTomer Tayar 		  struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params);
85795691c9cSTomer Tayar 
85895691c9cSTomer Tayar struct qed_resc_unlock_params {
85995691c9cSTomer Tayar 	/* Resource number [valid values are 0..31] */
86095691c9cSTomer Tayar 	u8 resource;
86195691c9cSTomer Tayar 
86295691c9cSTomer Tayar 	/* Allow to release a resource even if belongs to another PF */
86395691c9cSTomer Tayar 	bool b_force;
86495691c9cSTomer Tayar 
86595691c9cSTomer Tayar 	/* Will be set as true if the resource is released */
86695691c9cSTomer Tayar 	bool b_released;
86795691c9cSTomer Tayar };
86895691c9cSTomer Tayar 
86995691c9cSTomer Tayar /**
87095691c9cSTomer Tayar  * @brief Releases MFW generic resource lock
87195691c9cSTomer Tayar  *
87295691c9cSTomer Tayar  *  @param p_hwfn
87395691c9cSTomer Tayar  *  @param p_ptt
87495691c9cSTomer Tayar  *  @param p_params
87595691c9cSTomer Tayar  *
87695691c9cSTomer Tayar  * @return int - 0 - operation was successful.
87795691c9cSTomer Tayar  */
87895691c9cSTomer Tayar int
87995691c9cSTomer Tayar qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn,
88095691c9cSTomer Tayar 		    struct qed_ptt *p_ptt,
88195691c9cSTomer Tayar 		    struct qed_resc_unlock_params *p_params);
88295691c9cSTomer Tayar 
883f470f22cSsudarsana.kalluru@cavium.com /**
884f470f22cSsudarsana.kalluru@cavium.com  * @brief - default initialization for lock/unlock resource structs
885f470f22cSsudarsana.kalluru@cavium.com  *
886f470f22cSsudarsana.kalluru@cavium.com  * @param p_lock - lock params struct to be initialized; Can be NULL
887f470f22cSsudarsana.kalluru@cavium.com  * @param p_unlock - unlock params struct to be initialized; Can be NULL
888f470f22cSsudarsana.kalluru@cavium.com  * @param resource - the requested resource
889f470f22cSsudarsana.kalluru@cavium.com  * @paral b_is_permanent - disable retries & aging when set
890f470f22cSsudarsana.kalluru@cavium.com  */
891f470f22cSsudarsana.kalluru@cavium.com void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock,
892f470f22cSsudarsana.kalluru@cavium.com 				    struct qed_resc_unlock_params *p_unlock,
893f470f22cSsudarsana.kalluru@cavium.com 				    enum qed_resc_lock
894f470f22cSsudarsana.kalluru@cavium.com 				    resource, bool b_is_permanent);
895f470f22cSsudarsana.kalluru@cavium.com 
896fe56b9e6SYuval Mintz #endif
897