1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 2fe56b9e6SYuval Mintz * Copyright (c) 2015 QLogic Corporation 3fe56b9e6SYuval Mintz * 4fe56b9e6SYuval Mintz * This software is available under the terms of the GNU General Public License 5fe56b9e6SYuval Mintz * (GPL) Version 2, available from the file COPYING in the main directory of 6fe56b9e6SYuval Mintz * this source tree. 7fe56b9e6SYuval Mintz */ 8fe56b9e6SYuval Mintz 9fe56b9e6SYuval Mintz #include <linux/types.h> 10fe56b9e6SYuval Mintz #include <asm/byteorder.h> 11fe56b9e6SYuval Mintz #include <linux/delay.h> 12fe56b9e6SYuval Mintz #include <linux/errno.h> 13fe56b9e6SYuval Mintz #include <linux/kernel.h> 14fe56b9e6SYuval Mintz #include <linux/mutex.h> 15fe56b9e6SYuval Mintz #include <linux/slab.h> 16fe56b9e6SYuval Mintz #include <linux/string.h> 17fe56b9e6SYuval Mintz #include "qed.h" 18fe56b9e6SYuval Mintz #include "qed_hsi.h" 19fe56b9e6SYuval Mintz #include "qed_hw.h" 20fe56b9e6SYuval Mintz #include "qed_mcp.h" 21fe56b9e6SYuval Mintz #include "qed_reg_addr.h" 22fe56b9e6SYuval Mintz #define CHIP_MCP_RESP_ITER_US 10 23fe56b9e6SYuval Mintz 24fe56b9e6SYuval Mintz #define QED_DRV_MB_MAX_RETRIES (500 * 1000) /* Account for 5 sec */ 25fe56b9e6SYuval Mintz #define QED_MCP_RESET_RETRIES (50 * 1000) /* Account for 500 msec */ 26fe56b9e6SYuval Mintz 27fe56b9e6SYuval Mintz #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val) \ 28fe56b9e6SYuval Mintz qed_wr(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset), \ 29fe56b9e6SYuval Mintz _val) 30fe56b9e6SYuval Mintz 31fe56b9e6SYuval Mintz #define DRV_INNER_RD(_p_hwfn, _p_ptt, _ptr, _offset) \ 32fe56b9e6SYuval Mintz qed_rd(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset)) 33fe56b9e6SYuval Mintz 34fe56b9e6SYuval Mintz #define DRV_MB_WR(_p_hwfn, _p_ptt, _field, _val) \ 35fe56b9e6SYuval Mintz DRV_INNER_WR(p_hwfn, _p_ptt, drv_mb_addr, \ 36fe56b9e6SYuval Mintz offsetof(struct public_drv_mb, _field), _val) 37fe56b9e6SYuval Mintz 38fe56b9e6SYuval Mintz #define DRV_MB_RD(_p_hwfn, _p_ptt, _field) \ 39fe56b9e6SYuval Mintz DRV_INNER_RD(_p_hwfn, _p_ptt, drv_mb_addr, \ 40fe56b9e6SYuval Mintz offsetof(struct public_drv_mb, _field)) 41fe56b9e6SYuval Mintz 42fe56b9e6SYuval Mintz #define PDA_COMP (((FW_MAJOR_VERSION) + (FW_MINOR_VERSION << 8)) << \ 43fe56b9e6SYuval Mintz DRV_ID_PDA_COMP_VER_SHIFT) 44fe56b9e6SYuval Mintz 45fe56b9e6SYuval Mintz #define MCP_BYTES_PER_MBIT_SHIFT 17 46fe56b9e6SYuval Mintz 47fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn) 48fe56b9e6SYuval Mintz { 49fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info || !p_hwfn->mcp_info->public_base) 50fe56b9e6SYuval Mintz return false; 51fe56b9e6SYuval Mintz return true; 52fe56b9e6SYuval Mintz } 53fe56b9e6SYuval Mintz 54fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, 55fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 56fe56b9e6SYuval Mintz { 57fe56b9e6SYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 58fe56b9e6SYuval Mintz PUBLIC_PORT); 59fe56b9e6SYuval Mintz u32 mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, addr); 60fe56b9e6SYuval Mintz 61fe56b9e6SYuval Mintz p_hwfn->mcp_info->port_addr = SECTION_ADDR(mfw_mb_offsize, 62fe56b9e6SYuval Mintz MFW_PORT(p_hwfn)); 63fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 64fe56b9e6SYuval Mintz "port_addr = 0x%x, port_id 0x%02x\n", 65fe56b9e6SYuval Mintz p_hwfn->mcp_info->port_addr, MFW_PORT(p_hwfn)); 66fe56b9e6SYuval Mintz } 67fe56b9e6SYuval Mintz 68fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, 69fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 70fe56b9e6SYuval Mintz { 71fe56b9e6SYuval Mintz u32 length = MFW_DRV_MSG_MAX_DWORDS(p_hwfn->mcp_info->mfw_mb_length); 72fe56b9e6SYuval Mintz u32 tmp, i; 73fe56b9e6SYuval Mintz 74fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info->public_base) 75fe56b9e6SYuval Mintz return; 76fe56b9e6SYuval Mintz 77fe56b9e6SYuval Mintz for (i = 0; i < length; i++) { 78fe56b9e6SYuval Mintz tmp = qed_rd(p_hwfn, p_ptt, 79fe56b9e6SYuval Mintz p_hwfn->mcp_info->mfw_mb_addr + 80fe56b9e6SYuval Mintz (i << 2) + sizeof(u32)); 81fe56b9e6SYuval Mintz 82fe56b9e6SYuval Mintz /* The MB data is actually BE; Need to force it to cpu */ 83fe56b9e6SYuval Mintz ((u32 *)p_hwfn->mcp_info->mfw_mb_cur)[i] = 84fe56b9e6SYuval Mintz be32_to_cpu((__force __be32)tmp); 85fe56b9e6SYuval Mintz } 86fe56b9e6SYuval Mintz } 87fe56b9e6SYuval Mintz 88fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn) 89fe56b9e6SYuval Mintz { 90fe56b9e6SYuval Mintz if (p_hwfn->mcp_info) { 91fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info->mfw_mb_cur); 92fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info->mfw_mb_shadow); 93fe56b9e6SYuval Mintz } 94fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info); 95fe56b9e6SYuval Mintz 96fe56b9e6SYuval Mintz return 0; 97fe56b9e6SYuval Mintz } 98fe56b9e6SYuval Mintz 99fe56b9e6SYuval Mintz static int qed_load_mcp_offsets(struct qed_hwfn *p_hwfn, 100fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 101fe56b9e6SYuval Mintz { 102fe56b9e6SYuval Mintz struct qed_mcp_info *p_info = p_hwfn->mcp_info; 103fe56b9e6SYuval Mintz u32 drv_mb_offsize, mfw_mb_offsize; 104fe56b9e6SYuval Mintz u32 mcp_pf_id = MCP_PF_ID(p_hwfn); 105fe56b9e6SYuval Mintz 106fe56b9e6SYuval Mintz p_info->public_base = qed_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR); 107fe56b9e6SYuval Mintz if (!p_info->public_base) 108fe56b9e6SYuval Mintz return 0; 109fe56b9e6SYuval Mintz 110fe56b9e6SYuval Mintz p_info->public_base |= GRCBASE_MCP; 111fe56b9e6SYuval Mintz 112fe56b9e6SYuval Mintz /* Calculate the driver and MFW mailbox address */ 113fe56b9e6SYuval Mintz drv_mb_offsize = qed_rd(p_hwfn, p_ptt, 114fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_info->public_base, 115fe56b9e6SYuval Mintz PUBLIC_DRV_MB)); 116fe56b9e6SYuval Mintz p_info->drv_mb_addr = SECTION_ADDR(drv_mb_offsize, mcp_pf_id); 117fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 118fe56b9e6SYuval Mintz "drv_mb_offsiz = 0x%x, drv_mb_addr = 0x%x mcp_pf_id = 0x%x\n", 119fe56b9e6SYuval Mintz drv_mb_offsize, p_info->drv_mb_addr, mcp_pf_id); 120fe56b9e6SYuval Mintz 121fe56b9e6SYuval Mintz /* Set the MFW MB address */ 122fe56b9e6SYuval Mintz mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, 123fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_info->public_base, 124fe56b9e6SYuval Mintz PUBLIC_MFW_MB)); 125fe56b9e6SYuval Mintz p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id); 126fe56b9e6SYuval Mintz p_info->mfw_mb_length = (u16)qed_rd(p_hwfn, p_ptt, p_info->mfw_mb_addr); 127fe56b9e6SYuval Mintz 128fe56b9e6SYuval Mintz /* Get the current driver mailbox sequence before sending 129fe56b9e6SYuval Mintz * the first command 130fe56b9e6SYuval Mintz */ 131fe56b9e6SYuval Mintz p_info->drv_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & 132fe56b9e6SYuval Mintz DRV_MSG_SEQ_NUMBER_MASK; 133fe56b9e6SYuval Mintz 134fe56b9e6SYuval Mintz /* Get current FW pulse sequence */ 135fe56b9e6SYuval Mintz p_info->drv_pulse_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_pulse_mb) & 136fe56b9e6SYuval Mintz DRV_PULSE_SEQ_MASK; 137fe56b9e6SYuval Mintz 138fe56b9e6SYuval Mintz p_info->mcp_hist = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); 139fe56b9e6SYuval Mintz 140fe56b9e6SYuval Mintz return 0; 141fe56b9e6SYuval Mintz } 142fe56b9e6SYuval Mintz 143fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, 144fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 145fe56b9e6SYuval Mintz { 146fe56b9e6SYuval Mintz struct qed_mcp_info *p_info; 147fe56b9e6SYuval Mintz u32 size; 148fe56b9e6SYuval Mintz 149fe56b9e6SYuval Mintz /* Allocate mcp_info structure */ 150fe56b9e6SYuval Mintz p_hwfn->mcp_info = kzalloc(sizeof(*p_hwfn->mcp_info), GFP_ATOMIC); 151fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info) 152fe56b9e6SYuval Mintz goto err; 153fe56b9e6SYuval Mintz p_info = p_hwfn->mcp_info; 154fe56b9e6SYuval Mintz 155fe56b9e6SYuval Mintz if (qed_load_mcp_offsets(p_hwfn, p_ptt) != 0) { 156fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MCP is not initialized\n"); 157fe56b9e6SYuval Mintz /* Do not free mcp_info here, since public_base indicate that 158fe56b9e6SYuval Mintz * the MCP is not initialized 159fe56b9e6SYuval Mintz */ 160fe56b9e6SYuval Mintz return 0; 161fe56b9e6SYuval Mintz } 162fe56b9e6SYuval Mintz 163fe56b9e6SYuval Mintz size = MFW_DRV_MSG_MAX_DWORDS(p_info->mfw_mb_length) * sizeof(u32); 164fe56b9e6SYuval Mintz p_info->mfw_mb_cur = kzalloc(size, GFP_ATOMIC); 165fe56b9e6SYuval Mintz p_info->mfw_mb_shadow = 166fe56b9e6SYuval Mintz kzalloc(sizeof(u32) * MFW_DRV_MSG_MAX_DWORDS( 167fe56b9e6SYuval Mintz p_info->mfw_mb_length), GFP_ATOMIC); 168fe56b9e6SYuval Mintz if (!p_info->mfw_mb_shadow || !p_info->mfw_mb_addr) 169fe56b9e6SYuval Mintz goto err; 170fe56b9e6SYuval Mintz 171fe56b9e6SYuval Mintz /* Initialize the MFW mutex */ 172fe56b9e6SYuval Mintz mutex_init(&p_info->mutex); 173fe56b9e6SYuval Mintz 174fe56b9e6SYuval Mintz return 0; 175fe56b9e6SYuval Mintz 176fe56b9e6SYuval Mintz err: 177fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Failed to allocate mcp memory\n"); 178fe56b9e6SYuval Mintz qed_mcp_free(p_hwfn); 179fe56b9e6SYuval Mintz return -ENOMEM; 180fe56b9e6SYuval Mintz } 181fe56b9e6SYuval Mintz 182fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn, 183fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 184fe56b9e6SYuval Mintz { 185fe56b9e6SYuval Mintz u32 seq = ++p_hwfn->mcp_info->drv_mb_seq; 186fe56b9e6SYuval Mintz u8 delay = CHIP_MCP_RESP_ITER_US; 187fe56b9e6SYuval Mintz u32 org_mcp_reset_seq, cnt = 0; 188fe56b9e6SYuval Mintz int rc = 0; 189fe56b9e6SYuval Mintz 190fe56b9e6SYuval Mintz /* Set drv command along with the updated sequence */ 191fe56b9e6SYuval Mintz org_mcp_reset_seq = qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); 192fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, 193fe56b9e6SYuval Mintz (DRV_MSG_CODE_MCP_RESET | seq)); 194fe56b9e6SYuval Mintz 195fe56b9e6SYuval Mintz do { 196fe56b9e6SYuval Mintz /* Wait for MFW response */ 197fe56b9e6SYuval Mintz udelay(delay); 198fe56b9e6SYuval Mintz /* Give the FW up to 500 second (50*1000*10usec) */ 199fe56b9e6SYuval Mintz } while ((org_mcp_reset_seq == qed_rd(p_hwfn, p_ptt, 200fe56b9e6SYuval Mintz MISCS_REG_GENERIC_POR_0)) && 201fe56b9e6SYuval Mintz (cnt++ < QED_MCP_RESET_RETRIES)); 202fe56b9e6SYuval Mintz 203fe56b9e6SYuval Mintz if (org_mcp_reset_seq != 204fe56b9e6SYuval Mintz qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { 205fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 206fe56b9e6SYuval Mintz "MCP was reset after %d usec\n", cnt * delay); 207fe56b9e6SYuval Mintz } else { 208fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Failed to reset MCP\n"); 209fe56b9e6SYuval Mintz rc = -EAGAIN; 210fe56b9e6SYuval Mintz } 211fe56b9e6SYuval Mintz 212fe56b9e6SYuval Mintz return rc; 213fe56b9e6SYuval Mintz } 214fe56b9e6SYuval Mintz 215fe56b9e6SYuval Mintz static int qed_do_mcp_cmd(struct qed_hwfn *p_hwfn, 216fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 217fe56b9e6SYuval Mintz u32 cmd, 218fe56b9e6SYuval Mintz u32 param, 219fe56b9e6SYuval Mintz u32 *o_mcp_resp, 220fe56b9e6SYuval Mintz u32 *o_mcp_param) 221fe56b9e6SYuval Mintz { 222fe56b9e6SYuval Mintz u8 delay = CHIP_MCP_RESP_ITER_US; 223fe56b9e6SYuval Mintz u32 seq, cnt = 1, actual_mb_seq; 224fe56b9e6SYuval Mintz int rc = 0; 225fe56b9e6SYuval Mintz 226fe56b9e6SYuval Mintz /* Get actual driver mailbox sequence */ 227fe56b9e6SYuval Mintz actual_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & 228fe56b9e6SYuval Mintz DRV_MSG_SEQ_NUMBER_MASK; 229fe56b9e6SYuval Mintz 230fe56b9e6SYuval Mintz /* Use MCP history register to check if MCP reset occurred between 231fe56b9e6SYuval Mintz * init time and now. 232fe56b9e6SYuval Mintz */ 233fe56b9e6SYuval Mintz if (p_hwfn->mcp_info->mcp_hist != 234fe56b9e6SYuval Mintz qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { 235fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, "Rereading MCP offsets\n"); 236fe56b9e6SYuval Mintz qed_load_mcp_offsets(p_hwfn, p_ptt); 237fe56b9e6SYuval Mintz qed_mcp_cmd_port_init(p_hwfn, p_ptt); 238fe56b9e6SYuval Mintz } 239fe56b9e6SYuval Mintz seq = ++p_hwfn->mcp_info->drv_mb_seq; 240fe56b9e6SYuval Mintz 241fe56b9e6SYuval Mintz /* Set drv param */ 242fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_param, param); 243fe56b9e6SYuval Mintz 244fe56b9e6SYuval Mintz /* Set drv command along with the updated sequence */ 245fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, (cmd | seq)); 246fe56b9e6SYuval Mintz 247fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 248fe56b9e6SYuval Mintz "wrote command (%x) to MFW MB param 0x%08x\n", 249fe56b9e6SYuval Mintz (cmd | seq), param); 250fe56b9e6SYuval Mintz 251fe56b9e6SYuval Mintz do { 252fe56b9e6SYuval Mintz /* Wait for MFW response */ 253fe56b9e6SYuval Mintz udelay(delay); 254fe56b9e6SYuval Mintz *o_mcp_resp = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_header); 255fe56b9e6SYuval Mintz 256fe56b9e6SYuval Mintz /* Give the FW up to 5 second (500*10ms) */ 257fe56b9e6SYuval Mintz } while ((seq != (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) && 258fe56b9e6SYuval Mintz (cnt++ < QED_DRV_MB_MAX_RETRIES)); 259fe56b9e6SYuval Mintz 260fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 261fe56b9e6SYuval Mintz "[after %d ms] read (%x) seq is (%x) from FW MB\n", 262fe56b9e6SYuval Mintz cnt * delay, *o_mcp_resp, seq); 263fe56b9e6SYuval Mintz 264fe56b9e6SYuval Mintz /* Is this a reply to our command? */ 265fe56b9e6SYuval Mintz if (seq == (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) { 266fe56b9e6SYuval Mintz *o_mcp_resp &= FW_MSG_CODE_MASK; 267fe56b9e6SYuval Mintz /* Get the MCP param */ 268fe56b9e6SYuval Mintz *o_mcp_param = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_param); 269fe56b9e6SYuval Mintz } else { 270fe56b9e6SYuval Mintz /* FW BUG! */ 271fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MFW failed to respond!\n"); 272fe56b9e6SYuval Mintz *o_mcp_resp = 0; 273fe56b9e6SYuval Mintz rc = -EAGAIN; 274fe56b9e6SYuval Mintz } 275fe56b9e6SYuval Mintz return rc; 276fe56b9e6SYuval Mintz } 277fe56b9e6SYuval Mintz 278fe56b9e6SYuval Mintz int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 279fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 280fe56b9e6SYuval Mintz u32 cmd, 281fe56b9e6SYuval Mintz u32 param, 282fe56b9e6SYuval Mintz u32 *o_mcp_resp, 283fe56b9e6SYuval Mintz u32 *o_mcp_param) 284fe56b9e6SYuval Mintz { 285fe56b9e6SYuval Mintz int rc = 0; 286fe56b9e6SYuval Mintz 287fe56b9e6SYuval Mintz /* MCP not initialized */ 288fe56b9e6SYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 289fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized !\n"); 290fe56b9e6SYuval Mintz return -EBUSY; 291fe56b9e6SYuval Mintz } 292fe56b9e6SYuval Mintz 293fe56b9e6SYuval Mintz /* Lock Mutex to ensure only single thread is 294fe56b9e6SYuval Mintz * accessing the MCP at one time 295fe56b9e6SYuval Mintz */ 296fe56b9e6SYuval Mintz mutex_lock(&p_hwfn->mcp_info->mutex); 297fe56b9e6SYuval Mintz rc = qed_do_mcp_cmd(p_hwfn, p_ptt, cmd, param, 298fe56b9e6SYuval Mintz o_mcp_resp, o_mcp_param); 299fe56b9e6SYuval Mintz /* Release Mutex */ 300fe56b9e6SYuval Mintz mutex_unlock(&p_hwfn->mcp_info->mutex); 301fe56b9e6SYuval Mintz 302fe56b9e6SYuval Mintz return rc; 303fe56b9e6SYuval Mintz } 304fe56b9e6SYuval Mintz 305fe56b9e6SYuval Mintz static void qed_mcp_set_drv_ver(struct qed_dev *cdev, 306fe56b9e6SYuval Mintz struct qed_hwfn *p_hwfn, 307fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 308fe56b9e6SYuval Mintz { 309fe56b9e6SYuval Mintz u32 i; 310fe56b9e6SYuval Mintz 311fe56b9e6SYuval Mintz /* Copy version string to MCP */ 312fe56b9e6SYuval Mintz for (i = 0; i < MCP_DRV_VER_STR_SIZE_DWORD; i++) 313fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, union_data.ver_str[i], 314fe56b9e6SYuval Mintz *(u32 *)&cdev->ver_str[i * sizeof(u32)]); 315fe56b9e6SYuval Mintz } 316fe56b9e6SYuval Mintz 317fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 318fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 319fe56b9e6SYuval Mintz u32 *p_load_code) 320fe56b9e6SYuval Mintz { 321fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 322fe56b9e6SYuval Mintz u32 param; 323fe56b9e6SYuval Mintz int rc; 324fe56b9e6SYuval Mintz 325fe56b9e6SYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 326fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized !\n"); 327fe56b9e6SYuval Mintz return -EBUSY; 328fe56b9e6SYuval Mintz } 329fe56b9e6SYuval Mintz 330fe56b9e6SYuval Mintz /* Save driver's version to shmem */ 331fe56b9e6SYuval Mintz qed_mcp_set_drv_ver(cdev, p_hwfn, p_ptt); 332fe56b9e6SYuval Mintz 333fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, "fw_seq 0x%08x, drv_pulse 0x%x\n", 334fe56b9e6SYuval Mintz p_hwfn->mcp_info->drv_mb_seq, 335fe56b9e6SYuval Mintz p_hwfn->mcp_info->drv_pulse_seq); 336fe56b9e6SYuval Mintz 337fe56b9e6SYuval Mintz /* Load Request */ 338fe56b9e6SYuval Mintz rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_LOAD_REQ, 339fe56b9e6SYuval Mintz (PDA_COMP | DRV_ID_MCP_HSI_VER_CURRENT | 340fe56b9e6SYuval Mintz cdev->drv_type), 341fe56b9e6SYuval Mintz p_load_code, ¶m); 342fe56b9e6SYuval Mintz 343fe56b9e6SYuval Mintz /* if mcp fails to respond we must abort */ 344fe56b9e6SYuval Mintz if (rc) { 345fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 346fe56b9e6SYuval Mintz return rc; 347fe56b9e6SYuval Mintz } 348fe56b9e6SYuval Mintz 349fe56b9e6SYuval Mintz /* If MFW refused (e.g. other port is in diagnostic mode) we 350fe56b9e6SYuval Mintz * must abort. This can happen in the following cases: 351fe56b9e6SYuval Mintz * - Other port is in diagnostic mode 352fe56b9e6SYuval Mintz * - Previously loaded function on the engine is not compliant with 353fe56b9e6SYuval Mintz * the requester. 354fe56b9e6SYuval Mintz * - MFW cannot cope with the requester's DRV_MFW_HSI_VERSION. 355fe56b9e6SYuval Mintz * - 356fe56b9e6SYuval Mintz */ 357fe56b9e6SYuval Mintz if (!(*p_load_code) || 358fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_HSI) || 359fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_PDA) || 360fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_DIAG)) { 361fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP refused load request, aborting\n"); 362fe56b9e6SYuval Mintz return -EBUSY; 363fe56b9e6SYuval Mintz } 364fe56b9e6SYuval Mintz 365fe56b9e6SYuval Mintz return 0; 366fe56b9e6SYuval Mintz } 367fe56b9e6SYuval Mintz 368fe56b9e6SYuval Mintz int qed_mcp_get_mfw_ver(struct qed_dev *cdev, 369fe56b9e6SYuval Mintz u32 *p_mfw_ver) 370fe56b9e6SYuval Mintz { 371fe56b9e6SYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[0]; 372fe56b9e6SYuval Mintz struct qed_ptt *p_ptt; 373fe56b9e6SYuval Mintz u32 global_offsize; 374fe56b9e6SYuval Mintz 375fe56b9e6SYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn); 376fe56b9e6SYuval Mintz if (!p_ptt) 377fe56b9e6SYuval Mintz return -EBUSY; 378fe56b9e6SYuval Mintz 379fe56b9e6SYuval Mintz global_offsize = qed_rd(p_hwfn, p_ptt, 380fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info-> 381fe56b9e6SYuval Mintz public_base, 382fe56b9e6SYuval Mintz PUBLIC_GLOBAL)); 383fe56b9e6SYuval Mintz *p_mfw_ver = qed_rd(p_hwfn, p_ptt, 384fe56b9e6SYuval Mintz SECTION_ADDR(global_offsize, 0) + 385fe56b9e6SYuval Mintz offsetof(struct public_global, mfw_ver)); 386fe56b9e6SYuval Mintz 387fe56b9e6SYuval Mintz qed_ptt_release(p_hwfn, p_ptt); 388fe56b9e6SYuval Mintz 389fe56b9e6SYuval Mintz return 0; 390fe56b9e6SYuval Mintz } 391fe56b9e6SYuval Mintz 392fe56b9e6SYuval Mintz static u32 qed_mcp_get_shmem_func(struct qed_hwfn *p_hwfn, 393fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 394fe56b9e6SYuval Mintz struct public_func *p_data, 395fe56b9e6SYuval Mintz int pfid) 396fe56b9e6SYuval Mintz { 397fe56b9e6SYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 398fe56b9e6SYuval Mintz PUBLIC_FUNC); 399fe56b9e6SYuval Mintz u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr); 400fe56b9e6SYuval Mintz u32 func_addr = SECTION_ADDR(mfw_path_offsize, pfid); 401fe56b9e6SYuval Mintz u32 i, size; 402fe56b9e6SYuval Mintz 403fe56b9e6SYuval Mintz memset(p_data, 0, sizeof(*p_data)); 404fe56b9e6SYuval Mintz 405fe56b9e6SYuval Mintz size = min_t(u32, sizeof(*p_data), 406fe56b9e6SYuval Mintz QED_SECTION_SIZE(mfw_path_offsize)); 407fe56b9e6SYuval Mintz for (i = 0; i < size / sizeof(u32); i++) 408fe56b9e6SYuval Mintz ((u32 *)p_data)[i] = qed_rd(p_hwfn, p_ptt, 409fe56b9e6SYuval Mintz func_addr + (i << 2)); 410fe56b9e6SYuval Mintz 411fe56b9e6SYuval Mintz return size; 412fe56b9e6SYuval Mintz } 413fe56b9e6SYuval Mintz 414fe56b9e6SYuval Mintz static int 415fe56b9e6SYuval Mintz qed_mcp_get_shmem_proto(struct qed_hwfn *p_hwfn, 416fe56b9e6SYuval Mintz struct public_func *p_info, 417fe56b9e6SYuval Mintz enum qed_pci_personality *p_proto) 418fe56b9e6SYuval Mintz { 419fe56b9e6SYuval Mintz int rc = 0; 420fe56b9e6SYuval Mintz 421fe56b9e6SYuval Mintz switch (p_info->config & FUNC_MF_CFG_PROTOCOL_MASK) { 422fe56b9e6SYuval Mintz case FUNC_MF_CFG_PROTOCOL_ETHERNET: 423fe56b9e6SYuval Mintz *p_proto = QED_PCI_ETH; 424fe56b9e6SYuval Mintz break; 425fe56b9e6SYuval Mintz default: 426fe56b9e6SYuval Mintz rc = -EINVAL; 427fe56b9e6SYuval Mintz } 428fe56b9e6SYuval Mintz 429fe56b9e6SYuval Mintz return rc; 430fe56b9e6SYuval Mintz } 431fe56b9e6SYuval Mintz 432fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 433fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 434fe56b9e6SYuval Mintz { 435fe56b9e6SYuval Mintz struct qed_mcp_function_info *info; 436fe56b9e6SYuval Mintz struct public_func shmem_info; 437fe56b9e6SYuval Mintz 438fe56b9e6SYuval Mintz qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, 439fe56b9e6SYuval Mintz MCP_PF_ID(p_hwfn)); 440fe56b9e6SYuval Mintz info = &p_hwfn->mcp_info->func_info; 441fe56b9e6SYuval Mintz 442fe56b9e6SYuval Mintz info->pause_on_host = (shmem_info.config & 443fe56b9e6SYuval Mintz FUNC_MF_CFG_PAUSE_ON_HOST_RING) ? 1 : 0; 444fe56b9e6SYuval Mintz 445fe56b9e6SYuval Mintz if (qed_mcp_get_shmem_proto(p_hwfn, &shmem_info, 446fe56b9e6SYuval Mintz &info->protocol)) { 447fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Unknown personality %08x\n", 448fe56b9e6SYuval Mintz (u32)(shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK)); 449fe56b9e6SYuval Mintz return -EINVAL; 450fe56b9e6SYuval Mintz } 451fe56b9e6SYuval Mintz 452fe56b9e6SYuval Mintz if (p_hwfn->cdev->mf_mode != SF) { 453fe56b9e6SYuval Mintz info->bandwidth_min = (shmem_info.config & 454fe56b9e6SYuval Mintz FUNC_MF_CFG_MIN_BW_MASK) >> 455fe56b9e6SYuval Mintz FUNC_MF_CFG_MIN_BW_SHIFT; 456fe56b9e6SYuval Mintz if (info->bandwidth_min < 1 || info->bandwidth_min > 100) { 457fe56b9e6SYuval Mintz DP_INFO(p_hwfn, 458fe56b9e6SYuval Mintz "bandwidth minimum out of bounds [%02x]. Set to 1\n", 459fe56b9e6SYuval Mintz info->bandwidth_min); 460fe56b9e6SYuval Mintz info->bandwidth_min = 1; 461fe56b9e6SYuval Mintz } 462fe56b9e6SYuval Mintz 463fe56b9e6SYuval Mintz info->bandwidth_max = (shmem_info.config & 464fe56b9e6SYuval Mintz FUNC_MF_CFG_MAX_BW_MASK) >> 465fe56b9e6SYuval Mintz FUNC_MF_CFG_MAX_BW_SHIFT; 466fe56b9e6SYuval Mintz if (info->bandwidth_max < 1 || info->bandwidth_max > 100) { 467fe56b9e6SYuval Mintz DP_INFO(p_hwfn, 468fe56b9e6SYuval Mintz "bandwidth maximum out of bounds [%02x]. Set to 100\n", 469fe56b9e6SYuval Mintz info->bandwidth_max); 470fe56b9e6SYuval Mintz info->bandwidth_max = 100; 471fe56b9e6SYuval Mintz } 472fe56b9e6SYuval Mintz } 473fe56b9e6SYuval Mintz 474fe56b9e6SYuval Mintz if (shmem_info.mac_upper || shmem_info.mac_lower) { 475fe56b9e6SYuval Mintz info->mac[0] = (u8)(shmem_info.mac_upper >> 8); 476fe56b9e6SYuval Mintz info->mac[1] = (u8)(shmem_info.mac_upper); 477fe56b9e6SYuval Mintz info->mac[2] = (u8)(shmem_info.mac_lower >> 24); 478fe56b9e6SYuval Mintz info->mac[3] = (u8)(shmem_info.mac_lower >> 16); 479fe56b9e6SYuval Mintz info->mac[4] = (u8)(shmem_info.mac_lower >> 8); 480fe56b9e6SYuval Mintz info->mac[5] = (u8)(shmem_info.mac_lower); 481fe56b9e6SYuval Mintz } else { 482fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MAC is 0 in shmem\n"); 483fe56b9e6SYuval Mintz } 484fe56b9e6SYuval Mintz 485fe56b9e6SYuval Mintz info->wwn_port = (u64)shmem_info.fcoe_wwn_port_name_upper | 486fe56b9e6SYuval Mintz (((u64)shmem_info.fcoe_wwn_port_name_lower) << 32); 487fe56b9e6SYuval Mintz info->wwn_node = (u64)shmem_info.fcoe_wwn_node_name_upper | 488fe56b9e6SYuval Mintz (((u64)shmem_info.fcoe_wwn_node_name_lower) << 32); 489fe56b9e6SYuval Mintz 490fe56b9e6SYuval Mintz info->ovlan = (u16)(shmem_info.ovlan_stag & FUNC_MF_CFG_OV_STAG_MASK); 491fe56b9e6SYuval Mintz 492fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_SP | NETIF_MSG_IFUP), 493fe56b9e6SYuval Mintz "Read configuration from shmem: pause_on_host %02x protocol %02x BW [%02x - %02x] MAC %02x:%02x:%02x:%02x:%02x:%02x wwn port %llx node %llx ovlan %04x\n", 494fe56b9e6SYuval Mintz info->pause_on_host, info->protocol, 495fe56b9e6SYuval Mintz info->bandwidth_min, info->bandwidth_max, 496fe56b9e6SYuval Mintz info->mac[0], info->mac[1], info->mac[2], 497fe56b9e6SYuval Mintz info->mac[3], info->mac[4], info->mac[5], 498fe56b9e6SYuval Mintz info->wwn_port, info->wwn_node, info->ovlan); 499fe56b9e6SYuval Mintz 500fe56b9e6SYuval Mintz return 0; 501fe56b9e6SYuval Mintz } 502fe56b9e6SYuval Mintz 503fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn, 504fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 505fe56b9e6SYuval Mintz { 506fe56b9e6SYuval Mintz u32 resp = 0, param = 0; 507fe56b9e6SYuval Mintz int rc; 508fe56b9e6SYuval Mintz 509fe56b9e6SYuval Mintz rc = qed_mcp_cmd(p_hwfn, p_ptt, 510fe56b9e6SYuval Mintz DRV_MSG_CODE_NIG_DRAIN, 100, 511fe56b9e6SYuval Mintz &resp, ¶m); 512fe56b9e6SYuval Mintz 513fe56b9e6SYuval Mintz /* Wait for the drain to complete before returning */ 514fe56b9e6SYuval Mintz msleep(120); 515fe56b9e6SYuval Mintz 516fe56b9e6SYuval Mintz return rc; 517fe56b9e6SYuval Mintz } 518fe56b9e6SYuval Mintz 519cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 520cee4d264SManish Chopra struct qed_ptt *p_ptt, 521cee4d264SManish Chopra u32 *p_flash_size) 522cee4d264SManish Chopra { 523cee4d264SManish Chopra u32 flash_size; 524cee4d264SManish Chopra 525cee4d264SManish Chopra flash_size = qed_rd(p_hwfn, p_ptt, MCP_REG_NVM_CFG4); 526cee4d264SManish Chopra flash_size = (flash_size & MCP_REG_NVM_CFG4_FLASH_SIZE) >> 527cee4d264SManish Chopra MCP_REG_NVM_CFG4_FLASH_SIZE_SHIFT; 528cee4d264SManish Chopra flash_size = (1 << (flash_size + MCP_BYTES_PER_MBIT_SHIFT)); 529cee4d264SManish Chopra 530cee4d264SManish Chopra *p_flash_size = flash_size; 531cee4d264SManish Chopra 532cee4d264SManish Chopra return 0; 533cee4d264SManish Chopra } 534cee4d264SManish Chopra 535fe56b9e6SYuval Mintz int 536fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 537fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 538fe56b9e6SYuval Mintz struct qed_mcp_drv_version *p_ver) 539fe56b9e6SYuval Mintz { 540fe56b9e6SYuval Mintz int rc = 0; 541fe56b9e6SYuval Mintz u32 param = 0, reply = 0, i; 542fe56b9e6SYuval Mintz 543fe56b9e6SYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 544fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized !\n"); 545fe56b9e6SYuval Mintz return -EBUSY; 546fe56b9e6SYuval Mintz } 547fe56b9e6SYuval Mintz 548fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, union_data.drv_version.version, 549fe56b9e6SYuval Mintz p_ver->version); 550fe56b9e6SYuval Mintz /* Copy version string to shmem */ 551fe56b9e6SYuval Mintz for (i = 0; i < (MCP_DRV_VER_STR_SIZE - 4) / 4; i++) { 552fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, 553fe56b9e6SYuval Mintz union_data.drv_version.name[i * sizeof(u32)], 554fe56b9e6SYuval Mintz *(u32 *)&p_ver->name[i * sizeof(u32)]); 555fe56b9e6SYuval Mintz } 556fe56b9e6SYuval Mintz 557fe56b9e6SYuval Mintz rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_VERSION, 0, &reply, 558fe56b9e6SYuval Mintz ¶m); 559fe56b9e6SYuval Mintz if (rc) { 560fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 561fe56b9e6SYuval Mintz return rc; 562fe56b9e6SYuval Mintz } 563fe56b9e6SYuval Mintz 564fe56b9e6SYuval Mintz return 0; 565fe56b9e6SYuval Mintz } 566