1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 2fe56b9e6SYuval Mintz * Copyright (c) 2015 QLogic Corporation 3fe56b9e6SYuval Mintz * 4fe56b9e6SYuval Mintz * This software is available under the terms of the GNU General Public License 5fe56b9e6SYuval Mintz * (GPL) Version 2, available from the file COPYING in the main directory of 6fe56b9e6SYuval Mintz * this source tree. 7fe56b9e6SYuval Mintz */ 8fe56b9e6SYuval Mintz 9fe56b9e6SYuval Mintz #include <linux/types.h> 10fe56b9e6SYuval Mintz #include <asm/byteorder.h> 11fe56b9e6SYuval Mintz #include <linux/delay.h> 12fe56b9e6SYuval Mintz #include <linux/errno.h> 13fe56b9e6SYuval Mintz #include <linux/kernel.h> 14fe56b9e6SYuval Mintz #include <linux/slab.h> 155529bad9STomer Tayar #include <linux/spinlock.h> 16fe56b9e6SYuval Mintz #include <linux/string.h> 17fe56b9e6SYuval Mintz #include "qed.h" 1839651abdSSudarsana Reddy Kalluru #include "qed_dcbx.h" 19fe56b9e6SYuval Mintz #include "qed_hsi.h" 20fe56b9e6SYuval Mintz #include "qed_hw.h" 21fe56b9e6SYuval Mintz #include "qed_mcp.h" 22fe56b9e6SYuval Mintz #include "qed_reg_addr.h" 231408cc1fSYuval Mintz #include "qed_sriov.h" 241408cc1fSYuval Mintz 25fe56b9e6SYuval Mintz #define CHIP_MCP_RESP_ITER_US 10 26fe56b9e6SYuval Mintz 27fe56b9e6SYuval Mintz #define QED_DRV_MB_MAX_RETRIES (500 * 1000) /* Account for 5 sec */ 28fe56b9e6SYuval Mintz #define QED_MCP_RESET_RETRIES (50 * 1000) /* Account for 500 msec */ 29fe56b9e6SYuval Mintz 30fe56b9e6SYuval Mintz #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val) \ 31fe56b9e6SYuval Mintz qed_wr(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset), \ 32fe56b9e6SYuval Mintz _val) 33fe56b9e6SYuval Mintz 34fe56b9e6SYuval Mintz #define DRV_INNER_RD(_p_hwfn, _p_ptt, _ptr, _offset) \ 35fe56b9e6SYuval Mintz qed_rd(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset)) 36fe56b9e6SYuval Mintz 37fe56b9e6SYuval Mintz #define DRV_MB_WR(_p_hwfn, _p_ptt, _field, _val) \ 38fe56b9e6SYuval Mintz DRV_INNER_WR(p_hwfn, _p_ptt, drv_mb_addr, \ 39fe56b9e6SYuval Mintz offsetof(struct public_drv_mb, _field), _val) 40fe56b9e6SYuval Mintz 41fe56b9e6SYuval Mintz #define DRV_MB_RD(_p_hwfn, _p_ptt, _field) \ 42fe56b9e6SYuval Mintz DRV_INNER_RD(_p_hwfn, _p_ptt, drv_mb_addr, \ 43fe56b9e6SYuval Mintz offsetof(struct public_drv_mb, _field)) 44fe56b9e6SYuval Mintz 45fe56b9e6SYuval Mintz #define PDA_COMP (((FW_MAJOR_VERSION) + (FW_MINOR_VERSION << 8)) << \ 46fe56b9e6SYuval Mintz DRV_ID_PDA_COMP_VER_SHIFT) 47fe56b9e6SYuval Mintz 48fe56b9e6SYuval Mintz #define MCP_BYTES_PER_MBIT_SHIFT 17 49fe56b9e6SYuval Mintz 50fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn) 51fe56b9e6SYuval Mintz { 52fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info || !p_hwfn->mcp_info->public_base) 53fe56b9e6SYuval Mintz return false; 54fe56b9e6SYuval Mintz return true; 55fe56b9e6SYuval Mintz } 56fe56b9e6SYuval Mintz 571a635e48SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 58fe56b9e6SYuval Mintz { 59fe56b9e6SYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 60fe56b9e6SYuval Mintz PUBLIC_PORT); 61fe56b9e6SYuval Mintz u32 mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, addr); 62fe56b9e6SYuval Mintz 63fe56b9e6SYuval Mintz p_hwfn->mcp_info->port_addr = SECTION_ADDR(mfw_mb_offsize, 64fe56b9e6SYuval Mintz MFW_PORT(p_hwfn)); 65fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 66fe56b9e6SYuval Mintz "port_addr = 0x%x, port_id 0x%02x\n", 67fe56b9e6SYuval Mintz p_hwfn->mcp_info->port_addr, MFW_PORT(p_hwfn)); 68fe56b9e6SYuval Mintz } 69fe56b9e6SYuval Mintz 701a635e48SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 71fe56b9e6SYuval Mintz { 72fe56b9e6SYuval Mintz u32 length = MFW_DRV_MSG_MAX_DWORDS(p_hwfn->mcp_info->mfw_mb_length); 73fe56b9e6SYuval Mintz u32 tmp, i; 74fe56b9e6SYuval Mintz 75fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info->public_base) 76fe56b9e6SYuval Mintz return; 77fe56b9e6SYuval Mintz 78fe56b9e6SYuval Mintz for (i = 0; i < length; i++) { 79fe56b9e6SYuval Mintz tmp = qed_rd(p_hwfn, p_ptt, 80fe56b9e6SYuval Mintz p_hwfn->mcp_info->mfw_mb_addr + 81fe56b9e6SYuval Mintz (i << 2) + sizeof(u32)); 82fe56b9e6SYuval Mintz 83fe56b9e6SYuval Mintz /* The MB data is actually BE; Need to force it to cpu */ 84fe56b9e6SYuval Mintz ((u32 *)p_hwfn->mcp_info->mfw_mb_cur)[i] = 85fe56b9e6SYuval Mintz be32_to_cpu((__force __be32)tmp); 86fe56b9e6SYuval Mintz } 87fe56b9e6SYuval Mintz } 88fe56b9e6SYuval Mintz 89fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn) 90fe56b9e6SYuval Mintz { 91fe56b9e6SYuval Mintz if (p_hwfn->mcp_info) { 92fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info->mfw_mb_cur); 93fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info->mfw_mb_shadow); 94fe56b9e6SYuval Mintz } 95fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info); 96fe56b9e6SYuval Mintz 97fe56b9e6SYuval Mintz return 0; 98fe56b9e6SYuval Mintz } 99fe56b9e6SYuval Mintz 1001a635e48SYuval Mintz static int qed_load_mcp_offsets(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 101fe56b9e6SYuval Mintz { 102fe56b9e6SYuval Mintz struct qed_mcp_info *p_info = p_hwfn->mcp_info; 103fe56b9e6SYuval Mintz u32 drv_mb_offsize, mfw_mb_offsize; 104fe56b9e6SYuval Mintz u32 mcp_pf_id = MCP_PF_ID(p_hwfn); 105fe56b9e6SYuval Mintz 106fe56b9e6SYuval Mintz p_info->public_base = qed_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR); 107fe56b9e6SYuval Mintz if (!p_info->public_base) 108fe56b9e6SYuval Mintz return 0; 109fe56b9e6SYuval Mintz 110fe56b9e6SYuval Mintz p_info->public_base |= GRCBASE_MCP; 111fe56b9e6SYuval Mintz 112fe56b9e6SYuval Mintz /* Calculate the driver and MFW mailbox address */ 113fe56b9e6SYuval Mintz drv_mb_offsize = qed_rd(p_hwfn, p_ptt, 114fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_info->public_base, 115fe56b9e6SYuval Mintz PUBLIC_DRV_MB)); 116fe56b9e6SYuval Mintz p_info->drv_mb_addr = SECTION_ADDR(drv_mb_offsize, mcp_pf_id); 117fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 118fe56b9e6SYuval Mintz "drv_mb_offsiz = 0x%x, drv_mb_addr = 0x%x mcp_pf_id = 0x%x\n", 119fe56b9e6SYuval Mintz drv_mb_offsize, p_info->drv_mb_addr, mcp_pf_id); 120fe56b9e6SYuval Mintz 121fe56b9e6SYuval Mintz /* Set the MFW MB address */ 122fe56b9e6SYuval Mintz mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, 123fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_info->public_base, 124fe56b9e6SYuval Mintz PUBLIC_MFW_MB)); 125fe56b9e6SYuval Mintz p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id); 126fe56b9e6SYuval Mintz p_info->mfw_mb_length = (u16)qed_rd(p_hwfn, p_ptt, p_info->mfw_mb_addr); 127fe56b9e6SYuval Mintz 128fe56b9e6SYuval Mintz /* Get the current driver mailbox sequence before sending 129fe56b9e6SYuval Mintz * the first command 130fe56b9e6SYuval Mintz */ 131fe56b9e6SYuval Mintz p_info->drv_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & 132fe56b9e6SYuval Mintz DRV_MSG_SEQ_NUMBER_MASK; 133fe56b9e6SYuval Mintz 134fe56b9e6SYuval Mintz /* Get current FW pulse sequence */ 135fe56b9e6SYuval Mintz p_info->drv_pulse_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_pulse_mb) & 136fe56b9e6SYuval Mintz DRV_PULSE_SEQ_MASK; 137fe56b9e6SYuval Mintz 138fe56b9e6SYuval Mintz p_info->mcp_hist = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); 139fe56b9e6SYuval Mintz 140fe56b9e6SYuval Mintz return 0; 141fe56b9e6SYuval Mintz } 142fe56b9e6SYuval Mintz 1431a635e48SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 144fe56b9e6SYuval Mintz { 145fe56b9e6SYuval Mintz struct qed_mcp_info *p_info; 146fe56b9e6SYuval Mintz u32 size; 147fe56b9e6SYuval Mintz 148fe56b9e6SYuval Mintz /* Allocate mcp_info structure */ 14960fffb3bSYuval Mintz p_hwfn->mcp_info = kzalloc(sizeof(*p_hwfn->mcp_info), GFP_KERNEL); 150fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info) 151fe56b9e6SYuval Mintz goto err; 152fe56b9e6SYuval Mintz p_info = p_hwfn->mcp_info; 153fe56b9e6SYuval Mintz 154fe56b9e6SYuval Mintz if (qed_load_mcp_offsets(p_hwfn, p_ptt) != 0) { 155fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MCP is not initialized\n"); 156fe56b9e6SYuval Mintz /* Do not free mcp_info here, since public_base indicate that 157fe56b9e6SYuval Mintz * the MCP is not initialized 158fe56b9e6SYuval Mintz */ 159fe56b9e6SYuval Mintz return 0; 160fe56b9e6SYuval Mintz } 161fe56b9e6SYuval Mintz 162fe56b9e6SYuval Mintz size = MFW_DRV_MSG_MAX_DWORDS(p_info->mfw_mb_length) * sizeof(u32); 16360fffb3bSYuval Mintz p_info->mfw_mb_cur = kzalloc(size, GFP_KERNEL); 16483aeb933SYuval Mintz p_info->mfw_mb_shadow = kzalloc(size, GFP_KERNEL); 165fe56b9e6SYuval Mintz if (!p_info->mfw_mb_shadow || !p_info->mfw_mb_addr) 166fe56b9e6SYuval Mintz goto err; 167fe56b9e6SYuval Mintz 1685529bad9STomer Tayar /* Initialize the MFW spinlock */ 1695529bad9STomer Tayar spin_lock_init(&p_info->lock); 170fe56b9e6SYuval Mintz 171fe56b9e6SYuval Mintz return 0; 172fe56b9e6SYuval Mintz 173fe56b9e6SYuval Mintz err: 174fe56b9e6SYuval Mintz qed_mcp_free(p_hwfn); 175fe56b9e6SYuval Mintz return -ENOMEM; 176fe56b9e6SYuval Mintz } 177fe56b9e6SYuval Mintz 1785529bad9STomer Tayar /* Locks the MFW mailbox of a PF to ensure a single access. 1795529bad9STomer Tayar * The lock is achieved in most cases by holding a spinlock, causing other 1805529bad9STomer Tayar * threads to wait till a previous access is done. 1815529bad9STomer Tayar * In some cases (currently when a [UN]LOAD_REQ commands are sent), the single 1825529bad9STomer Tayar * access is achieved by setting a blocking flag, which will fail other 1835529bad9STomer Tayar * competing contexts to send their mailboxes. 1845529bad9STomer Tayar */ 1851a635e48SYuval Mintz static int qed_mcp_mb_lock(struct qed_hwfn *p_hwfn, u32 cmd) 1865529bad9STomer Tayar { 1875529bad9STomer Tayar spin_lock_bh(&p_hwfn->mcp_info->lock); 1885529bad9STomer Tayar 1895529bad9STomer Tayar /* The spinlock shouldn't be acquired when the mailbox command is 1905529bad9STomer Tayar * [UN]LOAD_REQ, since the engine is locked by the MFW, and a parallel 1915529bad9STomer Tayar * pending [UN]LOAD_REQ command of another PF together with a spinlock 1925529bad9STomer Tayar * (i.e. interrupts are disabled) - can lead to a deadlock. 1935529bad9STomer Tayar * It is assumed that for a single PF, no other mailbox commands can be 1945529bad9STomer Tayar * sent from another context while sending LOAD_REQ, and that any 1955529bad9STomer Tayar * parallel commands to UNLOAD_REQ can be cancelled. 1965529bad9STomer Tayar */ 1975529bad9STomer Tayar if (cmd == DRV_MSG_CODE_LOAD_DONE || cmd == DRV_MSG_CODE_UNLOAD_DONE) 1985529bad9STomer Tayar p_hwfn->mcp_info->block_mb_sending = false; 1995529bad9STomer Tayar 2005529bad9STomer Tayar if (p_hwfn->mcp_info->block_mb_sending) { 2015529bad9STomer Tayar DP_NOTICE(p_hwfn, 2025529bad9STomer Tayar "Trying to send a MFW mailbox command [0x%x] in parallel to [UN]LOAD_REQ. Aborting.\n", 2035529bad9STomer Tayar cmd); 2045529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2055529bad9STomer Tayar return -EBUSY; 2065529bad9STomer Tayar } 2075529bad9STomer Tayar 2085529bad9STomer Tayar if (cmd == DRV_MSG_CODE_LOAD_REQ || cmd == DRV_MSG_CODE_UNLOAD_REQ) { 2095529bad9STomer Tayar p_hwfn->mcp_info->block_mb_sending = true; 2105529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2115529bad9STomer Tayar } 2125529bad9STomer Tayar 2135529bad9STomer Tayar return 0; 2145529bad9STomer Tayar } 2155529bad9STomer Tayar 2161a635e48SYuval Mintz static void qed_mcp_mb_unlock(struct qed_hwfn *p_hwfn, u32 cmd) 2175529bad9STomer Tayar { 2185529bad9STomer Tayar if (cmd != DRV_MSG_CODE_LOAD_REQ && cmd != DRV_MSG_CODE_UNLOAD_REQ) 2195529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2205529bad9STomer Tayar } 2215529bad9STomer Tayar 2221a635e48SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 223fe56b9e6SYuval Mintz { 224fe56b9e6SYuval Mintz u32 seq = ++p_hwfn->mcp_info->drv_mb_seq; 225fe56b9e6SYuval Mintz u8 delay = CHIP_MCP_RESP_ITER_US; 226fe56b9e6SYuval Mintz u32 org_mcp_reset_seq, cnt = 0; 227fe56b9e6SYuval Mintz int rc = 0; 228fe56b9e6SYuval Mintz 2295529bad9STomer Tayar /* Ensure that only a single thread is accessing the mailbox at a 2305529bad9STomer Tayar * certain time. 2315529bad9STomer Tayar */ 2325529bad9STomer Tayar rc = qed_mcp_mb_lock(p_hwfn, DRV_MSG_CODE_MCP_RESET); 2335529bad9STomer Tayar if (rc != 0) 2345529bad9STomer Tayar return rc; 2355529bad9STomer Tayar 236fe56b9e6SYuval Mintz /* Set drv command along with the updated sequence */ 237fe56b9e6SYuval Mintz org_mcp_reset_seq = qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); 238fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, 239fe56b9e6SYuval Mintz (DRV_MSG_CODE_MCP_RESET | seq)); 240fe56b9e6SYuval Mintz 241fe56b9e6SYuval Mintz do { 242fe56b9e6SYuval Mintz /* Wait for MFW response */ 243fe56b9e6SYuval Mintz udelay(delay); 244fe56b9e6SYuval Mintz /* Give the FW up to 500 second (50*1000*10usec) */ 245fe56b9e6SYuval Mintz } while ((org_mcp_reset_seq == qed_rd(p_hwfn, p_ptt, 246fe56b9e6SYuval Mintz MISCS_REG_GENERIC_POR_0)) && 247fe56b9e6SYuval Mintz (cnt++ < QED_MCP_RESET_RETRIES)); 248fe56b9e6SYuval Mintz 249fe56b9e6SYuval Mintz if (org_mcp_reset_seq != 250fe56b9e6SYuval Mintz qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { 251fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 252fe56b9e6SYuval Mintz "MCP was reset after %d usec\n", cnt * delay); 253fe56b9e6SYuval Mintz } else { 254fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Failed to reset MCP\n"); 255fe56b9e6SYuval Mintz rc = -EAGAIN; 256fe56b9e6SYuval Mintz } 257fe56b9e6SYuval Mintz 2585529bad9STomer Tayar qed_mcp_mb_unlock(p_hwfn, DRV_MSG_CODE_MCP_RESET); 2595529bad9STomer Tayar 260fe56b9e6SYuval Mintz return rc; 261fe56b9e6SYuval Mintz } 262fe56b9e6SYuval Mintz 263fe56b9e6SYuval Mintz static int qed_do_mcp_cmd(struct qed_hwfn *p_hwfn, 264fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 265fe56b9e6SYuval Mintz u32 cmd, 266fe56b9e6SYuval Mintz u32 param, 267fe56b9e6SYuval Mintz u32 *o_mcp_resp, 268fe56b9e6SYuval Mintz u32 *o_mcp_param) 269fe56b9e6SYuval Mintz { 270fe56b9e6SYuval Mintz u8 delay = CHIP_MCP_RESP_ITER_US; 271fe56b9e6SYuval Mintz u32 seq, cnt = 1, actual_mb_seq; 272fe56b9e6SYuval Mintz int rc = 0; 273fe56b9e6SYuval Mintz 274fe56b9e6SYuval Mintz /* Get actual driver mailbox sequence */ 275fe56b9e6SYuval Mintz actual_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & 276fe56b9e6SYuval Mintz DRV_MSG_SEQ_NUMBER_MASK; 277fe56b9e6SYuval Mintz 278fe56b9e6SYuval Mintz /* Use MCP history register to check if MCP reset occurred between 279fe56b9e6SYuval Mintz * init time and now. 280fe56b9e6SYuval Mintz */ 281fe56b9e6SYuval Mintz if (p_hwfn->mcp_info->mcp_hist != 282fe56b9e6SYuval Mintz qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { 283fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, "Rereading MCP offsets\n"); 284fe56b9e6SYuval Mintz qed_load_mcp_offsets(p_hwfn, p_ptt); 285fe56b9e6SYuval Mintz qed_mcp_cmd_port_init(p_hwfn, p_ptt); 286fe56b9e6SYuval Mintz } 287fe56b9e6SYuval Mintz seq = ++p_hwfn->mcp_info->drv_mb_seq; 288fe56b9e6SYuval Mintz 289fe56b9e6SYuval Mintz /* Set drv param */ 290fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_param, param); 291fe56b9e6SYuval Mintz 292fe56b9e6SYuval Mintz /* Set drv command along with the updated sequence */ 293fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, (cmd | seq)); 294fe56b9e6SYuval Mintz 295fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 296fe56b9e6SYuval Mintz "wrote command (%x) to MFW MB param 0x%08x\n", 297fe56b9e6SYuval Mintz (cmd | seq), param); 298fe56b9e6SYuval Mintz 299fe56b9e6SYuval Mintz do { 300fe56b9e6SYuval Mintz /* Wait for MFW response */ 301fe56b9e6SYuval Mintz udelay(delay); 302fe56b9e6SYuval Mintz *o_mcp_resp = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_header); 303fe56b9e6SYuval Mintz 304fe56b9e6SYuval Mintz /* Give the FW up to 5 second (500*10ms) */ 305fe56b9e6SYuval Mintz } while ((seq != (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) && 306fe56b9e6SYuval Mintz (cnt++ < QED_DRV_MB_MAX_RETRIES)); 307fe56b9e6SYuval Mintz 308fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 309fe56b9e6SYuval Mintz "[after %d ms] read (%x) seq is (%x) from FW MB\n", 310fe56b9e6SYuval Mintz cnt * delay, *o_mcp_resp, seq); 311fe56b9e6SYuval Mintz 312fe56b9e6SYuval Mintz /* Is this a reply to our command? */ 313fe56b9e6SYuval Mintz if (seq == (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) { 314fe56b9e6SYuval Mintz *o_mcp_resp &= FW_MSG_CODE_MASK; 315fe56b9e6SYuval Mintz /* Get the MCP param */ 316fe56b9e6SYuval Mintz *o_mcp_param = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_param); 317fe56b9e6SYuval Mintz } else { 318fe56b9e6SYuval Mintz /* FW BUG! */ 319525ef5c0SYuval Mintz DP_ERR(p_hwfn, "MFW failed to respond [cmd 0x%x param 0x%x]\n", 320525ef5c0SYuval Mintz cmd, param); 321fe56b9e6SYuval Mintz *o_mcp_resp = 0; 322fe56b9e6SYuval Mintz rc = -EAGAIN; 323fe56b9e6SYuval Mintz } 324fe56b9e6SYuval Mintz return rc; 325fe56b9e6SYuval Mintz } 326fe56b9e6SYuval Mintz 3275529bad9STomer Tayar static int qed_mcp_cmd_and_union(struct qed_hwfn *p_hwfn, 328fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 3295529bad9STomer Tayar struct qed_mcp_mb_params *p_mb_params) 330fe56b9e6SYuval Mintz { 3315529bad9STomer Tayar u32 union_data_addr; 3325529bad9STomer Tayar int rc; 333fe56b9e6SYuval Mintz 334fe56b9e6SYuval Mintz /* MCP not initialized */ 335fe56b9e6SYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 336fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized!\n"); 337fe56b9e6SYuval Mintz return -EBUSY; 338fe56b9e6SYuval Mintz } 339fe56b9e6SYuval Mintz 3405529bad9STomer Tayar union_data_addr = p_hwfn->mcp_info->drv_mb_addr + 3415529bad9STomer Tayar offsetof(struct public_drv_mb, union_data); 3425529bad9STomer Tayar 3435529bad9STomer Tayar /* Ensure that only a single thread is accessing the mailbox at a 3445529bad9STomer Tayar * certain time. 345fe56b9e6SYuval Mintz */ 3465529bad9STomer Tayar rc = qed_mcp_mb_lock(p_hwfn, p_mb_params->cmd); 3475529bad9STomer Tayar if (rc) 3485529bad9STomer Tayar return rc; 3495529bad9STomer Tayar 3505529bad9STomer Tayar if (p_mb_params->p_data_src != NULL) 3515529bad9STomer Tayar qed_memcpy_to(p_hwfn, p_ptt, union_data_addr, 3525529bad9STomer Tayar p_mb_params->p_data_src, 3535529bad9STomer Tayar sizeof(*p_mb_params->p_data_src)); 3545529bad9STomer Tayar 3555529bad9STomer Tayar rc = qed_do_mcp_cmd(p_hwfn, p_ptt, p_mb_params->cmd, 3565529bad9STomer Tayar p_mb_params->param, &p_mb_params->mcp_resp, 3575529bad9STomer Tayar &p_mb_params->mcp_param); 3585529bad9STomer Tayar 3595529bad9STomer Tayar if (p_mb_params->p_data_dst != NULL) 3605529bad9STomer Tayar qed_memcpy_from(p_hwfn, p_ptt, p_mb_params->p_data_dst, 3615529bad9STomer Tayar union_data_addr, 3625529bad9STomer Tayar sizeof(*p_mb_params->p_data_dst)); 3635529bad9STomer Tayar 3645529bad9STomer Tayar qed_mcp_mb_unlock(p_hwfn, p_mb_params->cmd); 365fe56b9e6SYuval Mintz 366fe56b9e6SYuval Mintz return rc; 367fe56b9e6SYuval Mintz } 368fe56b9e6SYuval Mintz 3695529bad9STomer Tayar int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 3705529bad9STomer Tayar struct qed_ptt *p_ptt, 3715529bad9STomer Tayar u32 cmd, 3725529bad9STomer Tayar u32 param, 3735529bad9STomer Tayar u32 *o_mcp_resp, 3745529bad9STomer Tayar u32 *o_mcp_param) 375fe56b9e6SYuval Mintz { 3765529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 3775529bad9STomer Tayar int rc; 378fe56b9e6SYuval Mintz 3795529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 3805529bad9STomer Tayar mb_params.cmd = cmd; 3815529bad9STomer Tayar mb_params.param = param; 3825529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 3835529bad9STomer Tayar if (rc) 3845529bad9STomer Tayar return rc; 3855529bad9STomer Tayar 3865529bad9STomer Tayar *o_mcp_resp = mb_params.mcp_resp; 3875529bad9STomer Tayar *o_mcp_param = mb_params.mcp_param; 3885529bad9STomer Tayar 3895529bad9STomer Tayar return 0; 390fe56b9e6SYuval Mintz } 391fe56b9e6SYuval Mintz 3924102426fSTomer Tayar int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn, 3934102426fSTomer Tayar struct qed_ptt *p_ptt, 3944102426fSTomer Tayar u32 cmd, 3954102426fSTomer Tayar u32 param, 3964102426fSTomer Tayar u32 *o_mcp_resp, 3974102426fSTomer Tayar u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf) 3984102426fSTomer Tayar { 3994102426fSTomer Tayar struct qed_mcp_mb_params mb_params; 4004102426fSTomer Tayar union drv_union_data union_data; 4014102426fSTomer Tayar int rc; 4024102426fSTomer Tayar 4034102426fSTomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 4044102426fSTomer Tayar mb_params.cmd = cmd; 4054102426fSTomer Tayar mb_params.param = param; 4064102426fSTomer Tayar mb_params.p_data_dst = &union_data; 4074102426fSTomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 4084102426fSTomer Tayar if (rc) 4094102426fSTomer Tayar return rc; 4104102426fSTomer Tayar 4114102426fSTomer Tayar *o_mcp_resp = mb_params.mcp_resp; 4124102426fSTomer Tayar *o_mcp_param = mb_params.mcp_param; 4134102426fSTomer Tayar 4144102426fSTomer Tayar *o_txn_size = *o_mcp_param; 4154102426fSTomer Tayar memcpy(o_buf, &union_data.raw_data, *o_txn_size); 4164102426fSTomer Tayar 4174102426fSTomer Tayar return 0; 4184102426fSTomer Tayar } 4194102426fSTomer Tayar 420fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 4211a635e48SYuval Mintz struct qed_ptt *p_ptt, u32 *p_load_code) 422fe56b9e6SYuval Mintz { 423fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 4245529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 4255529bad9STomer Tayar union drv_union_data union_data; 426fe56b9e6SYuval Mintz int rc; 427fe56b9e6SYuval Mintz 4285529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 429fe56b9e6SYuval Mintz /* Load Request */ 4305529bad9STomer Tayar mb_params.cmd = DRV_MSG_CODE_LOAD_REQ; 4315529bad9STomer Tayar mb_params.param = PDA_COMP | DRV_ID_MCP_HSI_VER_CURRENT | 4325529bad9STomer Tayar cdev->drv_type; 4335529bad9STomer Tayar memcpy(&union_data.ver_str, cdev->ver_str, MCP_DRV_VER_STR_SIZE); 4345529bad9STomer Tayar mb_params.p_data_src = &union_data; 4355529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 436fe56b9e6SYuval Mintz 437fe56b9e6SYuval Mintz /* if mcp fails to respond we must abort */ 438fe56b9e6SYuval Mintz if (rc) { 439fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 440fe56b9e6SYuval Mintz return rc; 441fe56b9e6SYuval Mintz } 442fe56b9e6SYuval Mintz 4435529bad9STomer Tayar *p_load_code = mb_params.mcp_resp; 4445529bad9STomer Tayar 445fe56b9e6SYuval Mintz /* If MFW refused (e.g. other port is in diagnostic mode) we 446fe56b9e6SYuval Mintz * must abort. This can happen in the following cases: 447fe56b9e6SYuval Mintz * - Other port is in diagnostic mode 448fe56b9e6SYuval Mintz * - Previously loaded function on the engine is not compliant with 449fe56b9e6SYuval Mintz * the requester. 450fe56b9e6SYuval Mintz * - MFW cannot cope with the requester's DRV_MFW_HSI_VERSION. 451fe56b9e6SYuval Mintz * - 452fe56b9e6SYuval Mintz */ 453fe56b9e6SYuval Mintz if (!(*p_load_code) || 454fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_HSI) || 455fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_PDA) || 456fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_DIAG)) { 457fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP refused load request, aborting\n"); 458fe56b9e6SYuval Mintz return -EBUSY; 459fe56b9e6SYuval Mintz } 460fe56b9e6SYuval Mintz 461fe56b9e6SYuval Mintz return 0; 462fe56b9e6SYuval Mintz } 463fe56b9e6SYuval Mintz 4640b55e27dSYuval Mintz static void qed_mcp_handle_vf_flr(struct qed_hwfn *p_hwfn, 4650b55e27dSYuval Mintz struct qed_ptt *p_ptt) 4660b55e27dSYuval Mintz { 4670b55e27dSYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 4680b55e27dSYuval Mintz PUBLIC_PATH); 4690b55e27dSYuval Mintz u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr); 4700b55e27dSYuval Mintz u32 path_addr = SECTION_ADDR(mfw_path_offsize, 4710b55e27dSYuval Mintz QED_PATH_ID(p_hwfn)); 4720b55e27dSYuval Mintz u32 disabled_vfs[VF_MAX_STATIC / 32]; 4730b55e27dSYuval Mintz int i; 4740b55e27dSYuval Mintz 4750b55e27dSYuval Mintz DP_VERBOSE(p_hwfn, 4760b55e27dSYuval Mintz QED_MSG_SP, 4770b55e27dSYuval Mintz "Reading Disabled VF information from [offset %08x], path_addr %08x\n", 4780b55e27dSYuval Mintz mfw_path_offsize, path_addr); 4790b55e27dSYuval Mintz 4800b55e27dSYuval Mintz for (i = 0; i < (VF_MAX_STATIC / 32); i++) { 4810b55e27dSYuval Mintz disabled_vfs[i] = qed_rd(p_hwfn, p_ptt, 4820b55e27dSYuval Mintz path_addr + 4830b55e27dSYuval Mintz offsetof(struct public_path, 4840b55e27dSYuval Mintz mcp_vf_disabled) + 4850b55e27dSYuval Mintz sizeof(u32) * i); 4860b55e27dSYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_SP | QED_MSG_IOV), 4870b55e27dSYuval Mintz "FLR-ed VFs [%08x,...,%08x] - %08x\n", 4880b55e27dSYuval Mintz i * 32, (i + 1) * 32 - 1, disabled_vfs[i]); 4890b55e27dSYuval Mintz } 4900b55e27dSYuval Mintz 4910b55e27dSYuval Mintz if (qed_iov_mark_vf_flr(p_hwfn, disabled_vfs)) 4920b55e27dSYuval Mintz qed_schedule_iov(p_hwfn, QED_IOV_WQ_FLR_FLAG); 4930b55e27dSYuval Mintz } 4940b55e27dSYuval Mintz 4950b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn, 4960b55e27dSYuval Mintz struct qed_ptt *p_ptt, u32 *vfs_to_ack) 4970b55e27dSYuval Mintz { 4980b55e27dSYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 4990b55e27dSYuval Mintz PUBLIC_FUNC); 5000b55e27dSYuval Mintz u32 mfw_func_offsize = qed_rd(p_hwfn, p_ptt, addr); 5010b55e27dSYuval Mintz u32 func_addr = SECTION_ADDR(mfw_func_offsize, 5020b55e27dSYuval Mintz MCP_PF_ID(p_hwfn)); 5030b55e27dSYuval Mintz struct qed_mcp_mb_params mb_params; 5040b55e27dSYuval Mintz union drv_union_data union_data; 5050b55e27dSYuval Mintz int rc; 5060b55e27dSYuval Mintz int i; 5070b55e27dSYuval Mintz 5080b55e27dSYuval Mintz for (i = 0; i < (VF_MAX_STATIC / 32); i++) 5090b55e27dSYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_SP | QED_MSG_IOV), 5100b55e27dSYuval Mintz "Acking VFs [%08x,...,%08x] - %08x\n", 5110b55e27dSYuval Mintz i * 32, (i + 1) * 32 - 1, vfs_to_ack[i]); 5120b55e27dSYuval Mintz 5130b55e27dSYuval Mintz memset(&mb_params, 0, sizeof(mb_params)); 5140b55e27dSYuval Mintz mb_params.cmd = DRV_MSG_CODE_VF_DISABLED_DONE; 5150b55e27dSYuval Mintz memcpy(&union_data.ack_vf_disabled, vfs_to_ack, VF_MAX_STATIC / 8); 5160b55e27dSYuval Mintz mb_params.p_data_src = &union_data; 5170b55e27dSYuval Mintz rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 5180b55e27dSYuval Mintz if (rc) { 5190b55e27dSYuval Mintz DP_NOTICE(p_hwfn, "Failed to pass ACK for VF flr to MFW\n"); 5200b55e27dSYuval Mintz return -EBUSY; 5210b55e27dSYuval Mintz } 5220b55e27dSYuval Mintz 5230b55e27dSYuval Mintz /* Clear the ACK bits */ 5240b55e27dSYuval Mintz for (i = 0; i < (VF_MAX_STATIC / 32); i++) 5250b55e27dSYuval Mintz qed_wr(p_hwfn, p_ptt, 5260b55e27dSYuval Mintz func_addr + 5270b55e27dSYuval Mintz offsetof(struct public_func, drv_ack_vf_disabled) + 5280b55e27dSYuval Mintz i * sizeof(u32), 0); 5290b55e27dSYuval Mintz 5300b55e27dSYuval Mintz return rc; 5310b55e27dSYuval Mintz } 5320b55e27dSYuval Mintz 533334c03b5SZvi Nachmani static void qed_mcp_handle_transceiver_change(struct qed_hwfn *p_hwfn, 534334c03b5SZvi Nachmani struct qed_ptt *p_ptt) 535334c03b5SZvi Nachmani { 536334c03b5SZvi Nachmani u32 transceiver_state; 537334c03b5SZvi Nachmani 538334c03b5SZvi Nachmani transceiver_state = qed_rd(p_hwfn, p_ptt, 539334c03b5SZvi Nachmani p_hwfn->mcp_info->port_addr + 540334c03b5SZvi Nachmani offsetof(struct public_port, 541334c03b5SZvi Nachmani transceiver_data)); 542334c03b5SZvi Nachmani 543334c03b5SZvi Nachmani DP_VERBOSE(p_hwfn, 544334c03b5SZvi Nachmani (NETIF_MSG_HW | QED_MSG_SP), 545334c03b5SZvi Nachmani "Received transceiver state update [0x%08x] from mfw [Addr 0x%x]\n", 546334c03b5SZvi Nachmani transceiver_state, 547334c03b5SZvi Nachmani (u32)(p_hwfn->mcp_info->port_addr + 5481a635e48SYuval Mintz offsetof(struct public_port, transceiver_data))); 549334c03b5SZvi Nachmani 550334c03b5SZvi Nachmani transceiver_state = GET_FIELD(transceiver_state, 551351a4dedSYuval Mintz ETH_TRANSCEIVER_STATE); 552334c03b5SZvi Nachmani 553351a4dedSYuval Mintz if (transceiver_state == ETH_TRANSCEIVER_STATE_PRESENT) 554334c03b5SZvi Nachmani DP_NOTICE(p_hwfn, "Transceiver is present.\n"); 555334c03b5SZvi Nachmani else 556334c03b5SZvi Nachmani DP_NOTICE(p_hwfn, "Transceiver is unplugged.\n"); 557334c03b5SZvi Nachmani } 558334c03b5SZvi Nachmani 559cc875c2eSYuval Mintz static void qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn, 5601a635e48SYuval Mintz struct qed_ptt *p_ptt, bool b_reset) 561cc875c2eSYuval Mintz { 562cc875c2eSYuval Mintz struct qed_mcp_link_state *p_link; 563a64b02d5SManish Chopra u8 max_bw, min_bw; 564cc875c2eSYuval Mintz u32 status = 0; 565cc875c2eSYuval Mintz 566cc875c2eSYuval Mintz p_link = &p_hwfn->mcp_info->link_output; 567cc875c2eSYuval Mintz memset(p_link, 0, sizeof(*p_link)); 568cc875c2eSYuval Mintz if (!b_reset) { 569cc875c2eSYuval Mintz status = qed_rd(p_hwfn, p_ptt, 570cc875c2eSYuval Mintz p_hwfn->mcp_info->port_addr + 571cc875c2eSYuval Mintz offsetof(struct public_port, link_status)); 572cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, (NETIF_MSG_LINK | QED_MSG_SP), 573cc875c2eSYuval Mintz "Received link update [0x%08x] from mfw [Addr 0x%x]\n", 574cc875c2eSYuval Mintz status, 575cc875c2eSYuval Mintz (u32)(p_hwfn->mcp_info->port_addr + 5761a635e48SYuval Mintz offsetof(struct public_port, link_status))); 577cc875c2eSYuval Mintz } else { 578cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 579cc875c2eSYuval Mintz "Resetting link indications\n"); 580cc875c2eSYuval Mintz return; 581cc875c2eSYuval Mintz } 582cc875c2eSYuval Mintz 583fc916ff2SSudarsana Reddy Kalluru if (p_hwfn->b_drv_link_init) 584cc875c2eSYuval Mintz p_link->link_up = !!(status & LINK_STATUS_LINK_UP); 585fc916ff2SSudarsana Reddy Kalluru else 586fc916ff2SSudarsana Reddy Kalluru p_link->link_up = false; 587cc875c2eSYuval Mintz 588cc875c2eSYuval Mintz p_link->full_duplex = true; 589cc875c2eSYuval Mintz switch ((status & LINK_STATUS_SPEED_AND_DUPLEX_MASK)) { 590cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_100G: 591cc875c2eSYuval Mintz p_link->speed = 100000; 592cc875c2eSYuval Mintz break; 593cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_50G: 594cc875c2eSYuval Mintz p_link->speed = 50000; 595cc875c2eSYuval Mintz break; 596cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_40G: 597cc875c2eSYuval Mintz p_link->speed = 40000; 598cc875c2eSYuval Mintz break; 599cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_25G: 600cc875c2eSYuval Mintz p_link->speed = 25000; 601cc875c2eSYuval Mintz break; 602cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_20G: 603cc875c2eSYuval Mintz p_link->speed = 20000; 604cc875c2eSYuval Mintz break; 605cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_10G: 606cc875c2eSYuval Mintz p_link->speed = 10000; 607cc875c2eSYuval Mintz break; 608cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_1000THD: 609cc875c2eSYuval Mintz p_link->full_duplex = false; 610cc875c2eSYuval Mintz /* Fall-through */ 611cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_1000TFD: 612cc875c2eSYuval Mintz p_link->speed = 1000; 613cc875c2eSYuval Mintz break; 614cc875c2eSYuval Mintz default: 615cc875c2eSYuval Mintz p_link->speed = 0; 616cc875c2eSYuval Mintz } 617cc875c2eSYuval Mintz 6184b01e519SManish Chopra if (p_link->link_up && p_link->speed) 6194b01e519SManish Chopra p_link->line_speed = p_link->speed; 6204b01e519SManish Chopra else 6214b01e519SManish Chopra p_link->line_speed = 0; 6224b01e519SManish Chopra 6234b01e519SManish Chopra max_bw = p_hwfn->mcp_info->func_info.bandwidth_max; 624a64b02d5SManish Chopra min_bw = p_hwfn->mcp_info->func_info.bandwidth_min; 6254b01e519SManish Chopra 626a64b02d5SManish Chopra /* Max bandwidth configuration */ 6274b01e519SManish Chopra __qed_configure_pf_max_bandwidth(p_hwfn, p_ptt, p_link, max_bw); 628cc875c2eSYuval Mintz 629a64b02d5SManish Chopra /* Min bandwidth configuration */ 630a64b02d5SManish Chopra __qed_configure_pf_min_bandwidth(p_hwfn, p_ptt, p_link, min_bw); 631a64b02d5SManish Chopra qed_configure_vp_wfq_on_link_change(p_hwfn->cdev, p_link->min_pf_rate); 632a64b02d5SManish Chopra 633cc875c2eSYuval Mintz p_link->an = !!(status & LINK_STATUS_AUTO_NEGOTIATE_ENABLED); 634cc875c2eSYuval Mintz p_link->an_complete = !!(status & 635cc875c2eSYuval Mintz LINK_STATUS_AUTO_NEGOTIATE_COMPLETE); 636cc875c2eSYuval Mintz p_link->parallel_detection = !!(status & 637cc875c2eSYuval Mintz LINK_STATUS_PARALLEL_DETECTION_USED); 638cc875c2eSYuval Mintz p_link->pfc_enabled = !!(status & LINK_STATUS_PFC_ENABLED); 639cc875c2eSYuval Mintz 640cc875c2eSYuval Mintz p_link->partner_adv_speed |= 641cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE) ? 642cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_1G_FD : 0; 643cc875c2eSYuval Mintz p_link->partner_adv_speed |= 644cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE) ? 645cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_1G_HD : 0; 646cc875c2eSYuval Mintz p_link->partner_adv_speed |= 647cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_10G_CAPABLE) ? 648cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_10G : 0; 649cc875c2eSYuval Mintz p_link->partner_adv_speed |= 650cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_20G_CAPABLE) ? 651cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_20G : 0; 652cc875c2eSYuval Mintz p_link->partner_adv_speed |= 653054c67d1SSudarsana Reddy Kalluru (status & LINK_STATUS_LINK_PARTNER_25G_CAPABLE) ? 654054c67d1SSudarsana Reddy Kalluru QED_LINK_PARTNER_SPEED_25G : 0; 655054c67d1SSudarsana Reddy Kalluru p_link->partner_adv_speed |= 656cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_40G_CAPABLE) ? 657cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_40G : 0; 658cc875c2eSYuval Mintz p_link->partner_adv_speed |= 659cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_50G_CAPABLE) ? 660cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_50G : 0; 661cc875c2eSYuval Mintz p_link->partner_adv_speed |= 662cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_100G_CAPABLE) ? 663cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_100G : 0; 664cc875c2eSYuval Mintz 665cc875c2eSYuval Mintz p_link->partner_tx_flow_ctrl_en = 666cc875c2eSYuval Mintz !!(status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED); 667cc875c2eSYuval Mintz p_link->partner_rx_flow_ctrl_en = 668cc875c2eSYuval Mintz !!(status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED); 669cc875c2eSYuval Mintz 670cc875c2eSYuval Mintz switch (status & LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK) { 671cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE: 672cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_SYMMETRIC_PAUSE; 673cc875c2eSYuval Mintz break; 674cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE: 675cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_ASYMMETRIC_PAUSE; 676cc875c2eSYuval Mintz break; 677cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_BOTH_PAUSE: 678cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_BOTH_PAUSE; 679cc875c2eSYuval Mintz break; 680cc875c2eSYuval Mintz default: 681cc875c2eSYuval Mintz p_link->partner_adv_pause = 0; 682cc875c2eSYuval Mintz } 683cc875c2eSYuval Mintz 684cc875c2eSYuval Mintz p_link->sfp_tx_fault = !!(status & LINK_STATUS_SFP_TX_FAULT); 685cc875c2eSYuval Mintz 686cc875c2eSYuval Mintz qed_link_update(p_hwfn); 687cc875c2eSYuval Mintz } 688cc875c2eSYuval Mintz 689351a4dedSYuval Mintz int qed_mcp_set_link(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool b_up) 690cc875c2eSYuval Mintz { 691cc875c2eSYuval Mintz struct qed_mcp_link_params *params = &p_hwfn->mcp_info->link_input; 6925529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 6935529bad9STomer Tayar union drv_union_data union_data; 694351a4dedSYuval Mintz struct eth_phy_cfg *phy_cfg; 695cc875c2eSYuval Mintz int rc = 0; 6965529bad9STomer Tayar u32 cmd; 697cc875c2eSYuval Mintz 698cc875c2eSYuval Mintz /* Set the shmem configuration according to params */ 6995529bad9STomer Tayar phy_cfg = &union_data.drv_phy_cfg; 7005529bad9STomer Tayar memset(phy_cfg, 0, sizeof(*phy_cfg)); 701cc875c2eSYuval Mintz cmd = b_up ? DRV_MSG_CODE_INIT_PHY : DRV_MSG_CODE_LINK_RESET; 702cc875c2eSYuval Mintz if (!params->speed.autoneg) 7035529bad9STomer Tayar phy_cfg->speed = params->speed.forced_speed; 704351a4dedSYuval Mintz phy_cfg->pause |= (params->pause.autoneg) ? ETH_PAUSE_AUTONEG : 0; 705351a4dedSYuval Mintz phy_cfg->pause |= (params->pause.forced_rx) ? ETH_PAUSE_RX : 0; 706351a4dedSYuval Mintz phy_cfg->pause |= (params->pause.forced_tx) ? ETH_PAUSE_TX : 0; 7075529bad9STomer Tayar phy_cfg->adv_speed = params->speed.advertised_speeds; 7085529bad9STomer Tayar phy_cfg->loopback_mode = params->loopback_mode; 709cc875c2eSYuval Mintz 710fc916ff2SSudarsana Reddy Kalluru p_hwfn->b_drv_link_init = b_up; 711fc916ff2SSudarsana Reddy Kalluru 712cc875c2eSYuval Mintz if (b_up) { 713cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 714cc875c2eSYuval Mintz "Configuring Link: Speed 0x%08x, Pause 0x%08x, adv_speed 0x%08x, loopback 0x%08x, features 0x%08x\n", 7155529bad9STomer Tayar phy_cfg->speed, 7165529bad9STomer Tayar phy_cfg->pause, 7175529bad9STomer Tayar phy_cfg->adv_speed, 7185529bad9STomer Tayar phy_cfg->loopback_mode, 7195529bad9STomer Tayar phy_cfg->feature_config_flags); 720cc875c2eSYuval Mintz } else { 721cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 722cc875c2eSYuval Mintz "Resetting link\n"); 723cc875c2eSYuval Mintz } 724cc875c2eSYuval Mintz 7255529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 7265529bad9STomer Tayar mb_params.cmd = cmd; 7275529bad9STomer Tayar mb_params.p_data_src = &union_data; 7285529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 729cc875c2eSYuval Mintz 730cc875c2eSYuval Mintz /* if mcp fails to respond we must abort */ 731cc875c2eSYuval Mintz if (rc) { 732cc875c2eSYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 733cc875c2eSYuval Mintz return rc; 734cc875c2eSYuval Mintz } 735cc875c2eSYuval Mintz 736cc875c2eSYuval Mintz /* Reset the link status if needed */ 737cc875c2eSYuval Mintz if (!b_up) 738cc875c2eSYuval Mintz qed_mcp_handle_link_change(p_hwfn, p_ptt, true); 739cc875c2eSYuval Mintz 740cc875c2eSYuval Mintz return 0; 741cc875c2eSYuval Mintz } 742cc875c2eSYuval Mintz 7436c754246SSudarsana Reddy Kalluru static void qed_mcp_send_protocol_stats(struct qed_hwfn *p_hwfn, 7446c754246SSudarsana Reddy Kalluru struct qed_ptt *p_ptt, 7456c754246SSudarsana Reddy Kalluru enum MFW_DRV_MSG_TYPE type) 7466c754246SSudarsana Reddy Kalluru { 7476c754246SSudarsana Reddy Kalluru enum qed_mcp_protocol_type stats_type; 7486c754246SSudarsana Reddy Kalluru union qed_mcp_protocol_stats stats; 7496c754246SSudarsana Reddy Kalluru struct qed_mcp_mb_params mb_params; 7506c754246SSudarsana Reddy Kalluru union drv_union_data union_data; 7516c754246SSudarsana Reddy Kalluru u32 hsi_param; 7526c754246SSudarsana Reddy Kalluru 7536c754246SSudarsana Reddy Kalluru switch (type) { 7546c754246SSudarsana Reddy Kalluru case MFW_DRV_MSG_GET_LAN_STATS: 7556c754246SSudarsana Reddy Kalluru stats_type = QED_MCP_LAN_STATS; 7566c754246SSudarsana Reddy Kalluru hsi_param = DRV_MSG_CODE_STATS_TYPE_LAN; 7576c754246SSudarsana Reddy Kalluru break; 7586c754246SSudarsana Reddy Kalluru case MFW_DRV_MSG_GET_FCOE_STATS: 7596c754246SSudarsana Reddy Kalluru stats_type = QED_MCP_FCOE_STATS; 7606c754246SSudarsana Reddy Kalluru hsi_param = DRV_MSG_CODE_STATS_TYPE_FCOE; 7616c754246SSudarsana Reddy Kalluru break; 7626c754246SSudarsana Reddy Kalluru case MFW_DRV_MSG_GET_ISCSI_STATS: 7636c754246SSudarsana Reddy Kalluru stats_type = QED_MCP_ISCSI_STATS; 7646c754246SSudarsana Reddy Kalluru hsi_param = DRV_MSG_CODE_STATS_TYPE_ISCSI; 7656c754246SSudarsana Reddy Kalluru break; 7666c754246SSudarsana Reddy Kalluru case MFW_DRV_MSG_GET_RDMA_STATS: 7676c754246SSudarsana Reddy Kalluru stats_type = QED_MCP_RDMA_STATS; 7686c754246SSudarsana Reddy Kalluru hsi_param = DRV_MSG_CODE_STATS_TYPE_RDMA; 7696c754246SSudarsana Reddy Kalluru break; 7706c754246SSudarsana Reddy Kalluru default: 7716c754246SSudarsana Reddy Kalluru DP_NOTICE(p_hwfn, "Invalid protocol type %d\n", type); 7726c754246SSudarsana Reddy Kalluru return; 7736c754246SSudarsana Reddy Kalluru } 7746c754246SSudarsana Reddy Kalluru 7756c754246SSudarsana Reddy Kalluru qed_get_protocol_stats(p_hwfn->cdev, stats_type, &stats); 7766c754246SSudarsana Reddy Kalluru 7776c754246SSudarsana Reddy Kalluru memset(&mb_params, 0, sizeof(mb_params)); 7786c754246SSudarsana Reddy Kalluru mb_params.cmd = DRV_MSG_CODE_GET_STATS; 7796c754246SSudarsana Reddy Kalluru mb_params.param = hsi_param; 7806c754246SSudarsana Reddy Kalluru memcpy(&union_data, &stats, sizeof(stats)); 7816c754246SSudarsana Reddy Kalluru mb_params.p_data_src = &union_data; 7826c754246SSudarsana Reddy Kalluru qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 7836c754246SSudarsana Reddy Kalluru } 7846c754246SSudarsana Reddy Kalluru 7854b01e519SManish Chopra static void qed_read_pf_bandwidth(struct qed_hwfn *p_hwfn, 7864b01e519SManish Chopra struct public_func *p_shmem_info) 7874b01e519SManish Chopra { 7884b01e519SManish Chopra struct qed_mcp_function_info *p_info; 7894b01e519SManish Chopra 7904b01e519SManish Chopra p_info = &p_hwfn->mcp_info->func_info; 7914b01e519SManish Chopra 7924b01e519SManish Chopra p_info->bandwidth_min = (p_shmem_info->config & 7934b01e519SManish Chopra FUNC_MF_CFG_MIN_BW_MASK) >> 7944b01e519SManish Chopra FUNC_MF_CFG_MIN_BW_SHIFT; 7954b01e519SManish Chopra if (p_info->bandwidth_min < 1 || p_info->bandwidth_min > 100) { 7964b01e519SManish Chopra DP_INFO(p_hwfn, 7974b01e519SManish Chopra "bandwidth minimum out of bounds [%02x]. Set to 1\n", 7984b01e519SManish Chopra p_info->bandwidth_min); 7994b01e519SManish Chopra p_info->bandwidth_min = 1; 8004b01e519SManish Chopra } 8014b01e519SManish Chopra 8024b01e519SManish Chopra p_info->bandwidth_max = (p_shmem_info->config & 8034b01e519SManish Chopra FUNC_MF_CFG_MAX_BW_MASK) >> 8044b01e519SManish Chopra FUNC_MF_CFG_MAX_BW_SHIFT; 8054b01e519SManish Chopra if (p_info->bandwidth_max < 1 || p_info->bandwidth_max > 100) { 8064b01e519SManish Chopra DP_INFO(p_hwfn, 8074b01e519SManish Chopra "bandwidth maximum out of bounds [%02x]. Set to 100\n", 8084b01e519SManish Chopra p_info->bandwidth_max); 8094b01e519SManish Chopra p_info->bandwidth_max = 100; 8104b01e519SManish Chopra } 8114b01e519SManish Chopra } 8124b01e519SManish Chopra 8134b01e519SManish Chopra static u32 qed_mcp_get_shmem_func(struct qed_hwfn *p_hwfn, 8144b01e519SManish Chopra struct qed_ptt *p_ptt, 8151a635e48SYuval Mintz struct public_func *p_data, int pfid) 8164b01e519SManish Chopra { 8174b01e519SManish Chopra u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 8184b01e519SManish Chopra PUBLIC_FUNC); 8194b01e519SManish Chopra u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr); 8204b01e519SManish Chopra u32 func_addr = SECTION_ADDR(mfw_path_offsize, pfid); 8214b01e519SManish Chopra u32 i, size; 8224b01e519SManish Chopra 8234b01e519SManish Chopra memset(p_data, 0, sizeof(*p_data)); 8244b01e519SManish Chopra 8251a635e48SYuval Mintz size = min_t(u32, sizeof(*p_data), QED_SECTION_SIZE(mfw_path_offsize)); 8264b01e519SManish Chopra for (i = 0; i < size / sizeof(u32); i++) 8274b01e519SManish Chopra ((u32 *)p_data)[i] = qed_rd(p_hwfn, p_ptt, 8284b01e519SManish Chopra func_addr + (i << 2)); 8294b01e519SManish Chopra return size; 8304b01e519SManish Chopra } 8314b01e519SManish Chopra 8321a635e48SYuval Mintz static void qed_mcp_update_bw(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 8334b01e519SManish Chopra { 8344b01e519SManish Chopra struct qed_mcp_function_info *p_info; 8354b01e519SManish Chopra struct public_func shmem_info; 8364b01e519SManish Chopra u32 resp = 0, param = 0; 8374b01e519SManish Chopra 8381a635e48SYuval Mintz qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, MCP_PF_ID(p_hwfn)); 8394b01e519SManish Chopra 8404b01e519SManish Chopra qed_read_pf_bandwidth(p_hwfn, &shmem_info); 8414b01e519SManish Chopra 8424b01e519SManish Chopra p_info = &p_hwfn->mcp_info->func_info; 8434b01e519SManish Chopra 844a64b02d5SManish Chopra qed_configure_pf_min_bandwidth(p_hwfn->cdev, p_info->bandwidth_min); 8454b01e519SManish Chopra qed_configure_pf_max_bandwidth(p_hwfn->cdev, p_info->bandwidth_max); 8464b01e519SManish Chopra 8474b01e519SManish Chopra /* Acknowledge the MFW */ 8484b01e519SManish Chopra qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BW_UPDATE_ACK, 0, &resp, 8494b01e519SManish Chopra ¶m); 8504b01e519SManish Chopra } 8514b01e519SManish Chopra 852cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 853cc875c2eSYuval Mintz struct qed_ptt *p_ptt) 854cc875c2eSYuval Mintz { 855cc875c2eSYuval Mintz struct qed_mcp_info *info = p_hwfn->mcp_info; 856cc875c2eSYuval Mintz int rc = 0; 857cc875c2eSYuval Mintz bool found = false; 858cc875c2eSYuval Mintz u16 i; 859cc875c2eSYuval Mintz 860cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, "Received message from MFW\n"); 861cc875c2eSYuval Mintz 862cc875c2eSYuval Mintz /* Read Messages from MFW */ 863cc875c2eSYuval Mintz qed_mcp_read_mb(p_hwfn, p_ptt); 864cc875c2eSYuval Mintz 865cc875c2eSYuval Mintz /* Compare current messages to old ones */ 866cc875c2eSYuval Mintz for (i = 0; i < info->mfw_mb_length; i++) { 867cc875c2eSYuval Mintz if (info->mfw_mb_cur[i] == info->mfw_mb_shadow[i]) 868cc875c2eSYuval Mintz continue; 869cc875c2eSYuval Mintz 870cc875c2eSYuval Mintz found = true; 871cc875c2eSYuval Mintz 872cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 873cc875c2eSYuval Mintz "Msg [%d] - old CMD 0x%02x, new CMD 0x%02x\n", 874cc875c2eSYuval Mintz i, info->mfw_mb_shadow[i], info->mfw_mb_cur[i]); 875cc875c2eSYuval Mintz 876cc875c2eSYuval Mintz switch (i) { 877cc875c2eSYuval Mintz case MFW_DRV_MSG_LINK_CHANGE: 878cc875c2eSYuval Mintz qed_mcp_handle_link_change(p_hwfn, p_ptt, false); 879cc875c2eSYuval Mintz break; 8800b55e27dSYuval Mintz case MFW_DRV_MSG_VF_DISABLED: 8810b55e27dSYuval Mintz qed_mcp_handle_vf_flr(p_hwfn, p_ptt); 8820b55e27dSYuval Mintz break; 88339651abdSSudarsana Reddy Kalluru case MFW_DRV_MSG_LLDP_DATA_UPDATED: 88439651abdSSudarsana Reddy Kalluru qed_dcbx_mib_update_event(p_hwfn, p_ptt, 88539651abdSSudarsana Reddy Kalluru QED_DCBX_REMOTE_LLDP_MIB); 88639651abdSSudarsana Reddy Kalluru break; 88739651abdSSudarsana Reddy Kalluru case MFW_DRV_MSG_DCBX_REMOTE_MIB_UPDATED: 88839651abdSSudarsana Reddy Kalluru qed_dcbx_mib_update_event(p_hwfn, p_ptt, 88939651abdSSudarsana Reddy Kalluru QED_DCBX_REMOTE_MIB); 89039651abdSSudarsana Reddy Kalluru break; 89139651abdSSudarsana Reddy Kalluru case MFW_DRV_MSG_DCBX_OPERATIONAL_MIB_UPDATED: 89239651abdSSudarsana Reddy Kalluru qed_dcbx_mib_update_event(p_hwfn, p_ptt, 89339651abdSSudarsana Reddy Kalluru QED_DCBX_OPERATIONAL_MIB); 89439651abdSSudarsana Reddy Kalluru break; 895334c03b5SZvi Nachmani case MFW_DRV_MSG_TRANSCEIVER_STATE_CHANGE: 896334c03b5SZvi Nachmani qed_mcp_handle_transceiver_change(p_hwfn, p_ptt); 897334c03b5SZvi Nachmani break; 8986c754246SSudarsana Reddy Kalluru case MFW_DRV_MSG_GET_LAN_STATS: 8996c754246SSudarsana Reddy Kalluru case MFW_DRV_MSG_GET_FCOE_STATS: 9006c754246SSudarsana Reddy Kalluru case MFW_DRV_MSG_GET_ISCSI_STATS: 9016c754246SSudarsana Reddy Kalluru case MFW_DRV_MSG_GET_RDMA_STATS: 9026c754246SSudarsana Reddy Kalluru qed_mcp_send_protocol_stats(p_hwfn, p_ptt, i); 9036c754246SSudarsana Reddy Kalluru break; 9044b01e519SManish Chopra case MFW_DRV_MSG_BW_UPDATE: 9054b01e519SManish Chopra qed_mcp_update_bw(p_hwfn, p_ptt); 9064b01e519SManish Chopra break; 907cc875c2eSYuval Mintz default: 908cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, "Unimplemented MFW message %d\n", i); 909cc875c2eSYuval Mintz rc = -EINVAL; 910cc875c2eSYuval Mintz } 911cc875c2eSYuval Mintz } 912cc875c2eSYuval Mintz 913cc875c2eSYuval Mintz /* ACK everything */ 914cc875c2eSYuval Mintz for (i = 0; i < MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length); i++) { 915cc875c2eSYuval Mintz __be32 val = cpu_to_be32(((u32 *)info->mfw_mb_cur)[i]); 916cc875c2eSYuval Mintz 917cc875c2eSYuval Mintz /* MFW expect answer in BE, so we force write in that format */ 918cc875c2eSYuval Mintz qed_wr(p_hwfn, p_ptt, 919cc875c2eSYuval Mintz info->mfw_mb_addr + sizeof(u32) + 920cc875c2eSYuval Mintz MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length) * 921cc875c2eSYuval Mintz sizeof(u32) + i * sizeof(u32), 922cc875c2eSYuval Mintz (__force u32)val); 923cc875c2eSYuval Mintz } 924cc875c2eSYuval Mintz 925cc875c2eSYuval Mintz if (!found) { 926cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, 927cc875c2eSYuval Mintz "Received an MFW message indication but no new message!\n"); 928cc875c2eSYuval Mintz rc = -EINVAL; 929cc875c2eSYuval Mintz } 930cc875c2eSYuval Mintz 931cc875c2eSYuval Mintz /* Copy the new mfw messages into the shadow */ 932cc875c2eSYuval Mintz memcpy(info->mfw_mb_shadow, info->mfw_mb_cur, info->mfw_mb_length); 933cc875c2eSYuval Mintz 934cc875c2eSYuval Mintz return rc; 935cc875c2eSYuval Mintz } 936cc875c2eSYuval Mintz 9371408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, 9381408cc1fSYuval Mintz struct qed_ptt *p_ptt, 9391408cc1fSYuval Mintz u32 *p_mfw_ver, u32 *p_running_bundle_id) 940fe56b9e6SYuval Mintz { 941fe56b9e6SYuval Mintz u32 global_offsize; 942fe56b9e6SYuval Mintz 9431408cc1fSYuval Mintz if (IS_VF(p_hwfn->cdev)) { 9441408cc1fSYuval Mintz if (p_hwfn->vf_iov_info) { 9451408cc1fSYuval Mintz struct pfvf_acquire_resp_tlv *p_resp; 9461408cc1fSYuval Mintz 9471408cc1fSYuval Mintz p_resp = &p_hwfn->vf_iov_info->acquire_resp; 9481408cc1fSYuval Mintz *p_mfw_ver = p_resp->pfdev_info.mfw_ver; 9491408cc1fSYuval Mintz return 0; 9501408cc1fSYuval Mintz } else { 9511408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, 9521408cc1fSYuval Mintz QED_MSG_IOV, 9531408cc1fSYuval Mintz "VF requested MFW version prior to ACQUIRE\n"); 9541408cc1fSYuval Mintz return -EINVAL; 9551408cc1fSYuval Mintz } 9561408cc1fSYuval Mintz } 957fe56b9e6SYuval Mintz 958fe56b9e6SYuval Mintz global_offsize = qed_rd(p_hwfn, p_ptt, 9591408cc1fSYuval Mintz SECTION_OFFSIZE_ADDR(p_hwfn-> 9601408cc1fSYuval Mintz mcp_info->public_base, 961fe56b9e6SYuval Mintz PUBLIC_GLOBAL)); 9621408cc1fSYuval Mintz *p_mfw_ver = 9631408cc1fSYuval Mintz qed_rd(p_hwfn, p_ptt, 9641408cc1fSYuval Mintz SECTION_ADDR(global_offsize, 9651408cc1fSYuval Mintz 0) + offsetof(struct public_global, mfw_ver)); 966fe56b9e6SYuval Mintz 9671408cc1fSYuval Mintz if (p_running_bundle_id != NULL) { 9681408cc1fSYuval Mintz *p_running_bundle_id = qed_rd(p_hwfn, p_ptt, 9691408cc1fSYuval Mintz SECTION_ADDR(global_offsize, 0) + 9701408cc1fSYuval Mintz offsetof(struct public_global, 9711408cc1fSYuval Mintz running_bundle_id)); 9721408cc1fSYuval Mintz } 973fe56b9e6SYuval Mintz 974fe56b9e6SYuval Mintz return 0; 975fe56b9e6SYuval Mintz } 976fe56b9e6SYuval Mintz 9771a635e48SYuval Mintz int qed_mcp_get_media_type(struct qed_dev *cdev, u32 *p_media_type) 978cc875c2eSYuval Mintz { 979cc875c2eSYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[0]; 980cc875c2eSYuval Mintz struct qed_ptt *p_ptt; 981cc875c2eSYuval Mintz 9821408cc1fSYuval Mintz if (IS_VF(cdev)) 9831408cc1fSYuval Mintz return -EINVAL; 9841408cc1fSYuval Mintz 985cc875c2eSYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 986cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized!\n"); 987cc875c2eSYuval Mintz return -EBUSY; 988cc875c2eSYuval Mintz } 989cc875c2eSYuval Mintz 990cc875c2eSYuval Mintz *p_media_type = MEDIA_UNSPECIFIED; 991cc875c2eSYuval Mintz 992cc875c2eSYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn); 993cc875c2eSYuval Mintz if (!p_ptt) 994cc875c2eSYuval Mintz return -EBUSY; 995cc875c2eSYuval Mintz 996cc875c2eSYuval Mintz *p_media_type = qed_rd(p_hwfn, p_ptt, p_hwfn->mcp_info->port_addr + 997cc875c2eSYuval Mintz offsetof(struct public_port, media_type)); 998cc875c2eSYuval Mintz 999cc875c2eSYuval Mintz qed_ptt_release(p_hwfn, p_ptt); 1000cc875c2eSYuval Mintz 1001cc875c2eSYuval Mintz return 0; 1002cc875c2eSYuval Mintz } 1003cc875c2eSYuval Mintz 1004fe56b9e6SYuval Mintz static int 1005fe56b9e6SYuval Mintz qed_mcp_get_shmem_proto(struct qed_hwfn *p_hwfn, 1006fe56b9e6SYuval Mintz struct public_func *p_info, 1007fe56b9e6SYuval Mintz enum qed_pci_personality *p_proto) 1008fe56b9e6SYuval Mintz { 1009fe56b9e6SYuval Mintz int rc = 0; 1010fe56b9e6SYuval Mintz 1011fe56b9e6SYuval Mintz switch (p_info->config & FUNC_MF_CFG_PROTOCOL_MASK) { 1012fe56b9e6SYuval Mintz case FUNC_MF_CFG_PROTOCOL_ETHERNET: 1013c5ac9319SYuval Mintz if (test_bit(QED_DEV_CAP_ROCE, 1014c5ac9319SYuval Mintz &p_hwfn->hw_info.device_capabilities)) 1015c5ac9319SYuval Mintz *p_proto = QED_PCI_ETH_ROCE; 1016c5ac9319SYuval Mintz else 1017fe56b9e6SYuval Mintz *p_proto = QED_PCI_ETH; 1018fe56b9e6SYuval Mintz break; 1019c5ac9319SYuval Mintz case FUNC_MF_CFG_PROTOCOL_ISCSI: 1020c5ac9319SYuval Mintz *p_proto = QED_PCI_ISCSI; 1021c5ac9319SYuval Mintz break; 1022c5ac9319SYuval Mintz case FUNC_MF_CFG_PROTOCOL_ROCE: 1023c5ac9319SYuval Mintz DP_NOTICE(p_hwfn, "RoCE personality is not a valid value!\n"); 1024c5ac9319SYuval Mintz rc = -EINVAL; 1025c5ac9319SYuval Mintz break; 1026fe56b9e6SYuval Mintz default: 1027fe56b9e6SYuval Mintz rc = -EINVAL; 1028fe56b9e6SYuval Mintz } 1029fe56b9e6SYuval Mintz 1030fe56b9e6SYuval Mintz return rc; 1031fe56b9e6SYuval Mintz } 1032fe56b9e6SYuval Mintz 1033fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 1034fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 1035fe56b9e6SYuval Mintz { 1036fe56b9e6SYuval Mintz struct qed_mcp_function_info *info; 1037fe56b9e6SYuval Mintz struct public_func shmem_info; 1038fe56b9e6SYuval Mintz 10391a635e48SYuval Mintz qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, MCP_PF_ID(p_hwfn)); 1040fe56b9e6SYuval Mintz info = &p_hwfn->mcp_info->func_info; 1041fe56b9e6SYuval Mintz 1042fe56b9e6SYuval Mintz info->pause_on_host = (shmem_info.config & 1043fe56b9e6SYuval Mintz FUNC_MF_CFG_PAUSE_ON_HOST_RING) ? 1 : 0; 1044fe56b9e6SYuval Mintz 10451a635e48SYuval Mintz if (qed_mcp_get_shmem_proto(p_hwfn, &shmem_info, &info->protocol)) { 1046fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Unknown personality %08x\n", 1047fe56b9e6SYuval Mintz (u32)(shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK)); 1048fe56b9e6SYuval Mintz return -EINVAL; 1049fe56b9e6SYuval Mintz } 1050fe56b9e6SYuval Mintz 10514b01e519SManish Chopra qed_read_pf_bandwidth(p_hwfn, &shmem_info); 1052fe56b9e6SYuval Mintz 1053fe56b9e6SYuval Mintz if (shmem_info.mac_upper || shmem_info.mac_lower) { 1054fe56b9e6SYuval Mintz info->mac[0] = (u8)(shmem_info.mac_upper >> 8); 1055fe56b9e6SYuval Mintz info->mac[1] = (u8)(shmem_info.mac_upper); 1056fe56b9e6SYuval Mintz info->mac[2] = (u8)(shmem_info.mac_lower >> 24); 1057fe56b9e6SYuval Mintz info->mac[3] = (u8)(shmem_info.mac_lower >> 16); 1058fe56b9e6SYuval Mintz info->mac[4] = (u8)(shmem_info.mac_lower >> 8); 1059fe56b9e6SYuval Mintz info->mac[5] = (u8)(shmem_info.mac_lower); 1060fe56b9e6SYuval Mintz } else { 1061fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MAC is 0 in shmem\n"); 1062fe56b9e6SYuval Mintz } 1063fe56b9e6SYuval Mintz 1064fe56b9e6SYuval Mintz info->wwn_port = (u64)shmem_info.fcoe_wwn_port_name_upper | 1065fe56b9e6SYuval Mintz (((u64)shmem_info.fcoe_wwn_port_name_lower) << 32); 1066fe56b9e6SYuval Mintz info->wwn_node = (u64)shmem_info.fcoe_wwn_node_name_upper | 1067fe56b9e6SYuval Mintz (((u64)shmem_info.fcoe_wwn_node_name_lower) << 32); 1068fe56b9e6SYuval Mintz 1069fe56b9e6SYuval Mintz info->ovlan = (u16)(shmem_info.ovlan_stag & FUNC_MF_CFG_OV_STAG_MASK); 1070fe56b9e6SYuval Mintz 1071fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_SP | NETIF_MSG_IFUP), 1072fe56b9e6SYuval Mintz "Read configuration from shmem: pause_on_host %02x protocol %02x BW [%02x - %02x] MAC %02x:%02x:%02x:%02x:%02x:%02x wwn port %llx node %llx ovlan %04x\n", 1073fe56b9e6SYuval Mintz info->pause_on_host, info->protocol, 1074fe56b9e6SYuval Mintz info->bandwidth_min, info->bandwidth_max, 1075fe56b9e6SYuval Mintz info->mac[0], info->mac[1], info->mac[2], 1076fe56b9e6SYuval Mintz info->mac[3], info->mac[4], info->mac[5], 1077fe56b9e6SYuval Mintz info->wwn_port, info->wwn_node, info->ovlan); 1078fe56b9e6SYuval Mintz 1079fe56b9e6SYuval Mintz return 0; 1080fe56b9e6SYuval Mintz } 1081fe56b9e6SYuval Mintz 1082cc875c2eSYuval Mintz struct qed_mcp_link_params 1083cc875c2eSYuval Mintz *qed_mcp_get_link_params(struct qed_hwfn *p_hwfn) 1084cc875c2eSYuval Mintz { 1085cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 1086cc875c2eSYuval Mintz return NULL; 1087cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_input; 1088cc875c2eSYuval Mintz } 1089cc875c2eSYuval Mintz 1090cc875c2eSYuval Mintz struct qed_mcp_link_state 1091cc875c2eSYuval Mintz *qed_mcp_get_link_state(struct qed_hwfn *p_hwfn) 1092cc875c2eSYuval Mintz { 1093cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 1094cc875c2eSYuval Mintz return NULL; 1095cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_output; 1096cc875c2eSYuval Mintz } 1097cc875c2eSYuval Mintz 1098cc875c2eSYuval Mintz struct qed_mcp_link_capabilities 1099cc875c2eSYuval Mintz *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn) 1100cc875c2eSYuval Mintz { 1101cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 1102cc875c2eSYuval Mintz return NULL; 1103cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_capabilities; 1104cc875c2eSYuval Mintz } 1105cc875c2eSYuval Mintz 11061a635e48SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 1107fe56b9e6SYuval Mintz { 1108fe56b9e6SYuval Mintz u32 resp = 0, param = 0; 1109fe56b9e6SYuval Mintz int rc; 1110fe56b9e6SYuval Mintz 1111fe56b9e6SYuval Mintz rc = qed_mcp_cmd(p_hwfn, p_ptt, 11121a635e48SYuval Mintz DRV_MSG_CODE_NIG_DRAIN, 1000, &resp, ¶m); 1113fe56b9e6SYuval Mintz 1114fe56b9e6SYuval Mintz /* Wait for the drain to complete before returning */ 11158f60bafeSYuval Mintz msleep(1020); 1116fe56b9e6SYuval Mintz 1117fe56b9e6SYuval Mintz return rc; 1118fe56b9e6SYuval Mintz } 1119fe56b9e6SYuval Mintz 1120cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 11211a635e48SYuval Mintz struct qed_ptt *p_ptt, u32 *p_flash_size) 1122cee4d264SManish Chopra { 1123cee4d264SManish Chopra u32 flash_size; 1124cee4d264SManish Chopra 11251408cc1fSYuval Mintz if (IS_VF(p_hwfn->cdev)) 11261408cc1fSYuval Mintz return -EINVAL; 11271408cc1fSYuval Mintz 1128cee4d264SManish Chopra flash_size = qed_rd(p_hwfn, p_ptt, MCP_REG_NVM_CFG4); 1129cee4d264SManish Chopra flash_size = (flash_size & MCP_REG_NVM_CFG4_FLASH_SIZE) >> 1130cee4d264SManish Chopra MCP_REG_NVM_CFG4_FLASH_SIZE_SHIFT; 1131cee4d264SManish Chopra flash_size = (1 << (flash_size + MCP_BYTES_PER_MBIT_SHIFT)); 1132cee4d264SManish Chopra 1133cee4d264SManish Chopra *p_flash_size = flash_size; 1134cee4d264SManish Chopra 1135cee4d264SManish Chopra return 0; 1136cee4d264SManish Chopra } 1137cee4d264SManish Chopra 11381408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, 11391408cc1fSYuval Mintz struct qed_ptt *p_ptt, u8 vf_id, u8 num) 11401408cc1fSYuval Mintz { 11411408cc1fSYuval Mintz u32 resp = 0, param = 0, rc_param = 0; 11421408cc1fSYuval Mintz int rc; 11431408cc1fSYuval Mintz 11441408cc1fSYuval Mintz /* Only Leader can configure MSIX, and need to take CMT into account */ 11451408cc1fSYuval Mintz if (!IS_LEAD_HWFN(p_hwfn)) 11461408cc1fSYuval Mintz return 0; 11471408cc1fSYuval Mintz num *= p_hwfn->cdev->num_hwfns; 11481408cc1fSYuval Mintz 11491408cc1fSYuval Mintz param |= (vf_id << DRV_MB_PARAM_CFG_VF_MSIX_VF_ID_SHIFT) & 11501408cc1fSYuval Mintz DRV_MB_PARAM_CFG_VF_MSIX_VF_ID_MASK; 11511408cc1fSYuval Mintz param |= (num << DRV_MB_PARAM_CFG_VF_MSIX_SB_NUM_SHIFT) & 11521408cc1fSYuval Mintz DRV_MB_PARAM_CFG_VF_MSIX_SB_NUM_MASK; 11531408cc1fSYuval Mintz 11541408cc1fSYuval Mintz rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_CFG_VF_MSIX, param, 11551408cc1fSYuval Mintz &resp, &rc_param); 11561408cc1fSYuval Mintz 11571408cc1fSYuval Mintz if (resp != FW_MSG_CODE_DRV_CFG_VF_MSIX_DONE) { 11581408cc1fSYuval Mintz DP_NOTICE(p_hwfn, "VF[%d]: MFW failed to set MSI-X\n", vf_id); 11591408cc1fSYuval Mintz rc = -EINVAL; 11601408cc1fSYuval Mintz } else { 11611408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 11621408cc1fSYuval Mintz "Requested 0x%02x MSI-x interrupts from VF 0x%02x\n", 11631408cc1fSYuval Mintz num, vf_id); 11641408cc1fSYuval Mintz } 11651408cc1fSYuval Mintz 11661408cc1fSYuval Mintz return rc; 11671408cc1fSYuval Mintz } 11681408cc1fSYuval Mintz 1169fe56b9e6SYuval Mintz int 1170fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 1171fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 1172fe56b9e6SYuval Mintz struct qed_mcp_drv_version *p_ver) 1173fe56b9e6SYuval Mintz { 11745529bad9STomer Tayar struct drv_version_stc *p_drv_version; 11755529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 11765529bad9STomer Tayar union drv_union_data union_data; 11775529bad9STomer Tayar __be32 val; 11785529bad9STomer Tayar u32 i; 11795529bad9STomer Tayar int rc; 1180fe56b9e6SYuval Mintz 11815529bad9STomer Tayar p_drv_version = &union_data.drv_version; 11825529bad9STomer Tayar p_drv_version->version = p_ver->version; 11834b01e519SManish Chopra 11845529bad9STomer Tayar for (i = 0; i < MCP_DRV_VER_STR_SIZE - 1; i += 4) { 11855529bad9STomer Tayar val = cpu_to_be32(p_ver->name[i]); 11864b01e519SManish Chopra *(__be32 *)&p_drv_version->name[i * sizeof(u32)] = val; 1187fe56b9e6SYuval Mintz } 1188fe56b9e6SYuval Mintz 11895529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 11905529bad9STomer Tayar mb_params.cmd = DRV_MSG_CODE_SET_VERSION; 11915529bad9STomer Tayar mb_params.p_data_src = &union_data; 11925529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 11935529bad9STomer Tayar if (rc) 1194fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 1195fe56b9e6SYuval Mintz 11965529bad9STomer Tayar return rc; 1197fe56b9e6SYuval Mintz } 119891420b83SSudarsana Kalluru 11994102426fSTomer Tayar int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 12004102426fSTomer Tayar { 12014102426fSTomer Tayar u32 resp = 0, param = 0; 12024102426fSTomer Tayar int rc; 12034102426fSTomer Tayar 12044102426fSTomer Tayar rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_MCP_HALT, 0, &resp, 12054102426fSTomer Tayar ¶m); 12064102426fSTomer Tayar if (rc) 12074102426fSTomer Tayar DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 12084102426fSTomer Tayar 12094102426fSTomer Tayar return rc; 12104102426fSTomer Tayar } 12114102426fSTomer Tayar 12124102426fSTomer Tayar int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 12134102426fSTomer Tayar { 12144102426fSTomer Tayar u32 value, cpu_mode; 12154102426fSTomer Tayar 12164102426fSTomer Tayar qed_wr(p_hwfn, p_ptt, MCP_REG_CPU_STATE, 0xffffffff); 12174102426fSTomer Tayar 12184102426fSTomer Tayar value = qed_rd(p_hwfn, p_ptt, MCP_REG_CPU_MODE); 12194102426fSTomer Tayar value &= ~MCP_REG_CPU_MODE_SOFT_HALT; 12204102426fSTomer Tayar qed_wr(p_hwfn, p_ptt, MCP_REG_CPU_MODE, value); 12214102426fSTomer Tayar cpu_mode = qed_rd(p_hwfn, p_ptt, MCP_REG_CPU_MODE); 12224102426fSTomer Tayar 12234102426fSTomer Tayar return (cpu_mode & MCP_REG_CPU_MODE_SOFT_HALT) ? -EAGAIN : 0; 12244102426fSTomer Tayar } 12254102426fSTomer Tayar 12261a635e48SYuval Mintz int qed_mcp_set_led(struct qed_hwfn *p_hwfn, 12271a635e48SYuval Mintz struct qed_ptt *p_ptt, enum qed_led_mode mode) 122891420b83SSudarsana Kalluru { 122991420b83SSudarsana Kalluru u32 resp = 0, param = 0, drv_mb_param; 123091420b83SSudarsana Kalluru int rc; 123191420b83SSudarsana Kalluru 123291420b83SSudarsana Kalluru switch (mode) { 123391420b83SSudarsana Kalluru case QED_LED_MODE_ON: 123491420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_ON; 123591420b83SSudarsana Kalluru break; 123691420b83SSudarsana Kalluru case QED_LED_MODE_OFF: 123791420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_OFF; 123891420b83SSudarsana Kalluru break; 123991420b83SSudarsana Kalluru case QED_LED_MODE_RESTORE: 124091420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_OPER; 124191420b83SSudarsana Kalluru break; 124291420b83SSudarsana Kalluru default: 124391420b83SSudarsana Kalluru DP_NOTICE(p_hwfn, "Invalid LED mode %d\n", mode); 124491420b83SSudarsana Kalluru return -EINVAL; 124591420b83SSudarsana Kalluru } 124691420b83SSudarsana Kalluru 124791420b83SSudarsana Kalluru rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LED_MODE, 124891420b83SSudarsana Kalluru drv_mb_param, &resp, ¶m); 124991420b83SSudarsana Kalluru 125091420b83SSudarsana Kalluru return rc; 125191420b83SSudarsana Kalluru } 125203dc76caSSudarsana Reddy Kalluru 12534102426fSTomer Tayar int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn, 12544102426fSTomer Tayar struct qed_ptt *p_ptt, u32 mask_parities) 12554102426fSTomer Tayar { 12564102426fSTomer Tayar u32 resp = 0, param = 0; 12574102426fSTomer Tayar int rc; 12584102426fSTomer Tayar 12594102426fSTomer Tayar rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_MASK_PARITIES, 12604102426fSTomer Tayar mask_parities, &resp, ¶m); 12614102426fSTomer Tayar 12624102426fSTomer Tayar if (rc) { 12634102426fSTomer Tayar DP_ERR(p_hwfn, 12644102426fSTomer Tayar "MCP response failure for mask parities, aborting\n"); 12654102426fSTomer Tayar } else if (resp != FW_MSG_CODE_OK) { 12664102426fSTomer Tayar DP_ERR(p_hwfn, 12674102426fSTomer Tayar "MCP did not acknowledge mask parity request. Old MFW?\n"); 12684102426fSTomer Tayar rc = -EINVAL; 12694102426fSTomer Tayar } 12704102426fSTomer Tayar 12714102426fSTomer Tayar return rc; 12724102426fSTomer Tayar } 12734102426fSTomer Tayar 127403dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 127503dc76caSSudarsana Reddy Kalluru { 127603dc76caSSudarsana Reddy Kalluru u32 drv_mb_param = 0, rsp, param; 127703dc76caSSudarsana Reddy Kalluru int rc = 0; 127803dc76caSSudarsana Reddy Kalluru 127903dc76caSSudarsana Reddy Kalluru drv_mb_param = (DRV_MB_PARAM_BIST_REGISTER_TEST << 128003dc76caSSudarsana Reddy Kalluru DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT); 128103dc76caSSudarsana Reddy Kalluru 128203dc76caSSudarsana Reddy Kalluru rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST, 128303dc76caSSudarsana Reddy Kalluru drv_mb_param, &rsp, ¶m); 128403dc76caSSudarsana Reddy Kalluru 128503dc76caSSudarsana Reddy Kalluru if (rc) 128603dc76caSSudarsana Reddy Kalluru return rc; 128703dc76caSSudarsana Reddy Kalluru 128803dc76caSSudarsana Reddy Kalluru if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) || 128903dc76caSSudarsana Reddy Kalluru (param != DRV_MB_PARAM_BIST_RC_PASSED)) 129003dc76caSSudarsana Reddy Kalluru rc = -EAGAIN; 129103dc76caSSudarsana Reddy Kalluru 129203dc76caSSudarsana Reddy Kalluru return rc; 129303dc76caSSudarsana Reddy Kalluru } 129403dc76caSSudarsana Reddy Kalluru 129503dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 129603dc76caSSudarsana Reddy Kalluru { 129703dc76caSSudarsana Reddy Kalluru u32 drv_mb_param, rsp, param; 129803dc76caSSudarsana Reddy Kalluru int rc = 0; 129903dc76caSSudarsana Reddy Kalluru 130003dc76caSSudarsana Reddy Kalluru drv_mb_param = (DRV_MB_PARAM_BIST_CLOCK_TEST << 130103dc76caSSudarsana Reddy Kalluru DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT); 130203dc76caSSudarsana Reddy Kalluru 130303dc76caSSudarsana Reddy Kalluru rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST, 130403dc76caSSudarsana Reddy Kalluru drv_mb_param, &rsp, ¶m); 130503dc76caSSudarsana Reddy Kalluru 130603dc76caSSudarsana Reddy Kalluru if (rc) 130703dc76caSSudarsana Reddy Kalluru return rc; 130803dc76caSSudarsana Reddy Kalluru 130903dc76caSSudarsana Reddy Kalluru if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) || 131003dc76caSSudarsana Reddy Kalluru (param != DRV_MB_PARAM_BIST_RC_PASSED)) 131103dc76caSSudarsana Reddy Kalluru rc = -EAGAIN; 131203dc76caSSudarsana Reddy Kalluru 131303dc76caSSudarsana Reddy Kalluru return rc; 131403dc76caSSudarsana Reddy Kalluru } 1315