1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 2fe56b9e6SYuval Mintz * Copyright (c) 2015 QLogic Corporation 3fe56b9e6SYuval Mintz * 4fe56b9e6SYuval Mintz * This software is available under the terms of the GNU General Public License 5fe56b9e6SYuval Mintz * (GPL) Version 2, available from the file COPYING in the main directory of 6fe56b9e6SYuval Mintz * this source tree. 7fe56b9e6SYuval Mintz */ 8fe56b9e6SYuval Mintz 9fe56b9e6SYuval Mintz #include <linux/types.h> 10fe56b9e6SYuval Mintz #include <asm/byteorder.h> 11fe56b9e6SYuval Mintz #include <linux/delay.h> 12fe56b9e6SYuval Mintz #include <linux/errno.h> 13fe56b9e6SYuval Mintz #include <linux/kernel.h> 14fe56b9e6SYuval Mintz #include <linux/slab.h> 155529bad9STomer Tayar #include <linux/spinlock.h> 16fe56b9e6SYuval Mintz #include <linux/string.h> 17fe56b9e6SYuval Mintz #include "qed.h" 18fe56b9e6SYuval Mintz #include "qed_hsi.h" 19fe56b9e6SYuval Mintz #include "qed_hw.h" 20fe56b9e6SYuval Mintz #include "qed_mcp.h" 21fe56b9e6SYuval Mintz #include "qed_reg_addr.h" 22fe56b9e6SYuval Mintz #define CHIP_MCP_RESP_ITER_US 10 23fe56b9e6SYuval Mintz 24fe56b9e6SYuval Mintz #define QED_DRV_MB_MAX_RETRIES (500 * 1000) /* Account for 5 sec */ 25fe56b9e6SYuval Mintz #define QED_MCP_RESET_RETRIES (50 * 1000) /* Account for 500 msec */ 26fe56b9e6SYuval Mintz 27fe56b9e6SYuval Mintz #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val) \ 28fe56b9e6SYuval Mintz qed_wr(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset), \ 29fe56b9e6SYuval Mintz _val) 30fe56b9e6SYuval Mintz 31fe56b9e6SYuval Mintz #define DRV_INNER_RD(_p_hwfn, _p_ptt, _ptr, _offset) \ 32fe56b9e6SYuval Mintz qed_rd(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset)) 33fe56b9e6SYuval Mintz 34fe56b9e6SYuval Mintz #define DRV_MB_WR(_p_hwfn, _p_ptt, _field, _val) \ 35fe56b9e6SYuval Mintz DRV_INNER_WR(p_hwfn, _p_ptt, drv_mb_addr, \ 36fe56b9e6SYuval Mintz offsetof(struct public_drv_mb, _field), _val) 37fe56b9e6SYuval Mintz 38fe56b9e6SYuval Mintz #define DRV_MB_RD(_p_hwfn, _p_ptt, _field) \ 39fe56b9e6SYuval Mintz DRV_INNER_RD(_p_hwfn, _p_ptt, drv_mb_addr, \ 40fe56b9e6SYuval Mintz offsetof(struct public_drv_mb, _field)) 41fe56b9e6SYuval Mintz 42fe56b9e6SYuval Mintz #define PDA_COMP (((FW_MAJOR_VERSION) + (FW_MINOR_VERSION << 8)) << \ 43fe56b9e6SYuval Mintz DRV_ID_PDA_COMP_VER_SHIFT) 44fe56b9e6SYuval Mintz 45fe56b9e6SYuval Mintz #define MCP_BYTES_PER_MBIT_SHIFT 17 46fe56b9e6SYuval Mintz 47fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn) 48fe56b9e6SYuval Mintz { 49fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info || !p_hwfn->mcp_info->public_base) 50fe56b9e6SYuval Mintz return false; 51fe56b9e6SYuval Mintz return true; 52fe56b9e6SYuval Mintz } 53fe56b9e6SYuval Mintz 54fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, 55fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 56fe56b9e6SYuval Mintz { 57fe56b9e6SYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 58fe56b9e6SYuval Mintz PUBLIC_PORT); 59fe56b9e6SYuval Mintz u32 mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, addr); 60fe56b9e6SYuval Mintz 61fe56b9e6SYuval Mintz p_hwfn->mcp_info->port_addr = SECTION_ADDR(mfw_mb_offsize, 62fe56b9e6SYuval Mintz MFW_PORT(p_hwfn)); 63fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 64fe56b9e6SYuval Mintz "port_addr = 0x%x, port_id 0x%02x\n", 65fe56b9e6SYuval Mintz p_hwfn->mcp_info->port_addr, MFW_PORT(p_hwfn)); 66fe56b9e6SYuval Mintz } 67fe56b9e6SYuval Mintz 68fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, 69fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 70fe56b9e6SYuval Mintz { 71fe56b9e6SYuval Mintz u32 length = MFW_DRV_MSG_MAX_DWORDS(p_hwfn->mcp_info->mfw_mb_length); 72fe56b9e6SYuval Mintz u32 tmp, i; 73fe56b9e6SYuval Mintz 74fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info->public_base) 75fe56b9e6SYuval Mintz return; 76fe56b9e6SYuval Mintz 77fe56b9e6SYuval Mintz for (i = 0; i < length; i++) { 78fe56b9e6SYuval Mintz tmp = qed_rd(p_hwfn, p_ptt, 79fe56b9e6SYuval Mintz p_hwfn->mcp_info->mfw_mb_addr + 80fe56b9e6SYuval Mintz (i << 2) + sizeof(u32)); 81fe56b9e6SYuval Mintz 82fe56b9e6SYuval Mintz /* The MB data is actually BE; Need to force it to cpu */ 83fe56b9e6SYuval Mintz ((u32 *)p_hwfn->mcp_info->mfw_mb_cur)[i] = 84fe56b9e6SYuval Mintz be32_to_cpu((__force __be32)tmp); 85fe56b9e6SYuval Mintz } 86fe56b9e6SYuval Mintz } 87fe56b9e6SYuval Mintz 88fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn) 89fe56b9e6SYuval Mintz { 90fe56b9e6SYuval Mintz if (p_hwfn->mcp_info) { 91fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info->mfw_mb_cur); 92fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info->mfw_mb_shadow); 93fe56b9e6SYuval Mintz } 94fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info); 95fe56b9e6SYuval Mintz 96fe56b9e6SYuval Mintz return 0; 97fe56b9e6SYuval Mintz } 98fe56b9e6SYuval Mintz 99fe56b9e6SYuval Mintz static int qed_load_mcp_offsets(struct qed_hwfn *p_hwfn, 100fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 101fe56b9e6SYuval Mintz { 102fe56b9e6SYuval Mintz struct qed_mcp_info *p_info = p_hwfn->mcp_info; 103fe56b9e6SYuval Mintz u32 drv_mb_offsize, mfw_mb_offsize; 104fe56b9e6SYuval Mintz u32 mcp_pf_id = MCP_PF_ID(p_hwfn); 105fe56b9e6SYuval Mintz 106fe56b9e6SYuval Mintz p_info->public_base = qed_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR); 107fe56b9e6SYuval Mintz if (!p_info->public_base) 108fe56b9e6SYuval Mintz return 0; 109fe56b9e6SYuval Mintz 110fe56b9e6SYuval Mintz p_info->public_base |= GRCBASE_MCP; 111fe56b9e6SYuval Mintz 112fe56b9e6SYuval Mintz /* Calculate the driver and MFW mailbox address */ 113fe56b9e6SYuval Mintz drv_mb_offsize = qed_rd(p_hwfn, p_ptt, 114fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_info->public_base, 115fe56b9e6SYuval Mintz PUBLIC_DRV_MB)); 116fe56b9e6SYuval Mintz p_info->drv_mb_addr = SECTION_ADDR(drv_mb_offsize, mcp_pf_id); 117fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 118fe56b9e6SYuval Mintz "drv_mb_offsiz = 0x%x, drv_mb_addr = 0x%x mcp_pf_id = 0x%x\n", 119fe56b9e6SYuval Mintz drv_mb_offsize, p_info->drv_mb_addr, mcp_pf_id); 120fe56b9e6SYuval Mintz 121fe56b9e6SYuval Mintz /* Set the MFW MB address */ 122fe56b9e6SYuval Mintz mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, 123fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_info->public_base, 124fe56b9e6SYuval Mintz PUBLIC_MFW_MB)); 125fe56b9e6SYuval Mintz p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id); 126fe56b9e6SYuval Mintz p_info->mfw_mb_length = (u16)qed_rd(p_hwfn, p_ptt, p_info->mfw_mb_addr); 127fe56b9e6SYuval Mintz 128fe56b9e6SYuval Mintz /* Get the current driver mailbox sequence before sending 129fe56b9e6SYuval Mintz * the first command 130fe56b9e6SYuval Mintz */ 131fe56b9e6SYuval Mintz p_info->drv_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & 132fe56b9e6SYuval Mintz DRV_MSG_SEQ_NUMBER_MASK; 133fe56b9e6SYuval Mintz 134fe56b9e6SYuval Mintz /* Get current FW pulse sequence */ 135fe56b9e6SYuval Mintz p_info->drv_pulse_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_pulse_mb) & 136fe56b9e6SYuval Mintz DRV_PULSE_SEQ_MASK; 137fe56b9e6SYuval Mintz 138fe56b9e6SYuval Mintz p_info->mcp_hist = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); 139fe56b9e6SYuval Mintz 140fe56b9e6SYuval Mintz return 0; 141fe56b9e6SYuval Mintz } 142fe56b9e6SYuval Mintz 143fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, 144fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 145fe56b9e6SYuval Mintz { 146fe56b9e6SYuval Mintz struct qed_mcp_info *p_info; 147fe56b9e6SYuval Mintz u32 size; 148fe56b9e6SYuval Mintz 149fe56b9e6SYuval Mintz /* Allocate mcp_info structure */ 15060fffb3bSYuval Mintz p_hwfn->mcp_info = kzalloc(sizeof(*p_hwfn->mcp_info), GFP_KERNEL); 151fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info) 152fe56b9e6SYuval Mintz goto err; 153fe56b9e6SYuval Mintz p_info = p_hwfn->mcp_info; 154fe56b9e6SYuval Mintz 155fe56b9e6SYuval Mintz if (qed_load_mcp_offsets(p_hwfn, p_ptt) != 0) { 156fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MCP is not initialized\n"); 157fe56b9e6SYuval Mintz /* Do not free mcp_info here, since public_base indicate that 158fe56b9e6SYuval Mintz * the MCP is not initialized 159fe56b9e6SYuval Mintz */ 160fe56b9e6SYuval Mintz return 0; 161fe56b9e6SYuval Mintz } 162fe56b9e6SYuval Mintz 163fe56b9e6SYuval Mintz size = MFW_DRV_MSG_MAX_DWORDS(p_info->mfw_mb_length) * sizeof(u32); 16460fffb3bSYuval Mintz p_info->mfw_mb_cur = kzalloc(size, GFP_KERNEL); 165fe56b9e6SYuval Mintz p_info->mfw_mb_shadow = 166fe56b9e6SYuval Mintz kzalloc(sizeof(u32) * MFW_DRV_MSG_MAX_DWORDS( 16760fffb3bSYuval Mintz p_info->mfw_mb_length), GFP_KERNEL); 168fe56b9e6SYuval Mintz if (!p_info->mfw_mb_shadow || !p_info->mfw_mb_addr) 169fe56b9e6SYuval Mintz goto err; 170fe56b9e6SYuval Mintz 1715529bad9STomer Tayar /* Initialize the MFW spinlock */ 1725529bad9STomer Tayar spin_lock_init(&p_info->lock); 173fe56b9e6SYuval Mintz 174fe56b9e6SYuval Mintz return 0; 175fe56b9e6SYuval Mintz 176fe56b9e6SYuval Mintz err: 177fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Failed to allocate mcp memory\n"); 178fe56b9e6SYuval Mintz qed_mcp_free(p_hwfn); 179fe56b9e6SYuval Mintz return -ENOMEM; 180fe56b9e6SYuval Mintz } 181fe56b9e6SYuval Mintz 1825529bad9STomer Tayar /* Locks the MFW mailbox of a PF to ensure a single access. 1835529bad9STomer Tayar * The lock is achieved in most cases by holding a spinlock, causing other 1845529bad9STomer Tayar * threads to wait till a previous access is done. 1855529bad9STomer Tayar * In some cases (currently when a [UN]LOAD_REQ commands are sent), the single 1865529bad9STomer Tayar * access is achieved by setting a blocking flag, which will fail other 1875529bad9STomer Tayar * competing contexts to send their mailboxes. 1885529bad9STomer Tayar */ 1895529bad9STomer Tayar static int qed_mcp_mb_lock(struct qed_hwfn *p_hwfn, 1905529bad9STomer Tayar u32 cmd) 1915529bad9STomer Tayar { 1925529bad9STomer Tayar spin_lock_bh(&p_hwfn->mcp_info->lock); 1935529bad9STomer Tayar 1945529bad9STomer Tayar /* The spinlock shouldn't be acquired when the mailbox command is 1955529bad9STomer Tayar * [UN]LOAD_REQ, since the engine is locked by the MFW, and a parallel 1965529bad9STomer Tayar * pending [UN]LOAD_REQ command of another PF together with a spinlock 1975529bad9STomer Tayar * (i.e. interrupts are disabled) - can lead to a deadlock. 1985529bad9STomer Tayar * It is assumed that for a single PF, no other mailbox commands can be 1995529bad9STomer Tayar * sent from another context while sending LOAD_REQ, and that any 2005529bad9STomer Tayar * parallel commands to UNLOAD_REQ can be cancelled. 2015529bad9STomer Tayar */ 2025529bad9STomer Tayar if (cmd == DRV_MSG_CODE_LOAD_DONE || cmd == DRV_MSG_CODE_UNLOAD_DONE) 2035529bad9STomer Tayar p_hwfn->mcp_info->block_mb_sending = false; 2045529bad9STomer Tayar 2055529bad9STomer Tayar if (p_hwfn->mcp_info->block_mb_sending) { 2065529bad9STomer Tayar DP_NOTICE(p_hwfn, 2075529bad9STomer Tayar "Trying to send a MFW mailbox command [0x%x] in parallel to [UN]LOAD_REQ. Aborting.\n", 2085529bad9STomer Tayar cmd); 2095529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2105529bad9STomer Tayar return -EBUSY; 2115529bad9STomer Tayar } 2125529bad9STomer Tayar 2135529bad9STomer Tayar if (cmd == DRV_MSG_CODE_LOAD_REQ || cmd == DRV_MSG_CODE_UNLOAD_REQ) { 2145529bad9STomer Tayar p_hwfn->mcp_info->block_mb_sending = true; 2155529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2165529bad9STomer Tayar } 2175529bad9STomer Tayar 2185529bad9STomer Tayar return 0; 2195529bad9STomer Tayar } 2205529bad9STomer Tayar 2215529bad9STomer Tayar static void qed_mcp_mb_unlock(struct qed_hwfn *p_hwfn, 2225529bad9STomer Tayar u32 cmd) 2235529bad9STomer Tayar { 2245529bad9STomer Tayar if (cmd != DRV_MSG_CODE_LOAD_REQ && cmd != DRV_MSG_CODE_UNLOAD_REQ) 2255529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2265529bad9STomer Tayar } 2275529bad9STomer Tayar 228fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn, 229fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 230fe56b9e6SYuval Mintz { 231fe56b9e6SYuval Mintz u32 seq = ++p_hwfn->mcp_info->drv_mb_seq; 232fe56b9e6SYuval Mintz u8 delay = CHIP_MCP_RESP_ITER_US; 233fe56b9e6SYuval Mintz u32 org_mcp_reset_seq, cnt = 0; 234fe56b9e6SYuval Mintz int rc = 0; 235fe56b9e6SYuval Mintz 2365529bad9STomer Tayar /* Ensure that only a single thread is accessing the mailbox at a 2375529bad9STomer Tayar * certain time. 2385529bad9STomer Tayar */ 2395529bad9STomer Tayar rc = qed_mcp_mb_lock(p_hwfn, DRV_MSG_CODE_MCP_RESET); 2405529bad9STomer Tayar if (rc != 0) 2415529bad9STomer Tayar return rc; 2425529bad9STomer Tayar 243fe56b9e6SYuval Mintz /* Set drv command along with the updated sequence */ 244fe56b9e6SYuval Mintz org_mcp_reset_seq = qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); 245fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, 246fe56b9e6SYuval Mintz (DRV_MSG_CODE_MCP_RESET | seq)); 247fe56b9e6SYuval Mintz 248fe56b9e6SYuval Mintz do { 249fe56b9e6SYuval Mintz /* Wait for MFW response */ 250fe56b9e6SYuval Mintz udelay(delay); 251fe56b9e6SYuval Mintz /* Give the FW up to 500 second (50*1000*10usec) */ 252fe56b9e6SYuval Mintz } while ((org_mcp_reset_seq == qed_rd(p_hwfn, p_ptt, 253fe56b9e6SYuval Mintz MISCS_REG_GENERIC_POR_0)) && 254fe56b9e6SYuval Mintz (cnt++ < QED_MCP_RESET_RETRIES)); 255fe56b9e6SYuval Mintz 256fe56b9e6SYuval Mintz if (org_mcp_reset_seq != 257fe56b9e6SYuval Mintz qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { 258fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 259fe56b9e6SYuval Mintz "MCP was reset after %d usec\n", cnt * delay); 260fe56b9e6SYuval Mintz } else { 261fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Failed to reset MCP\n"); 262fe56b9e6SYuval Mintz rc = -EAGAIN; 263fe56b9e6SYuval Mintz } 264fe56b9e6SYuval Mintz 2655529bad9STomer Tayar qed_mcp_mb_unlock(p_hwfn, DRV_MSG_CODE_MCP_RESET); 2665529bad9STomer Tayar 267fe56b9e6SYuval Mintz return rc; 268fe56b9e6SYuval Mintz } 269fe56b9e6SYuval Mintz 270fe56b9e6SYuval Mintz static int qed_do_mcp_cmd(struct qed_hwfn *p_hwfn, 271fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 272fe56b9e6SYuval Mintz u32 cmd, 273fe56b9e6SYuval Mintz u32 param, 274fe56b9e6SYuval Mintz u32 *o_mcp_resp, 275fe56b9e6SYuval Mintz u32 *o_mcp_param) 276fe56b9e6SYuval Mintz { 277fe56b9e6SYuval Mintz u8 delay = CHIP_MCP_RESP_ITER_US; 278fe56b9e6SYuval Mintz u32 seq, cnt = 1, actual_mb_seq; 279fe56b9e6SYuval Mintz int rc = 0; 280fe56b9e6SYuval Mintz 281fe56b9e6SYuval Mintz /* Get actual driver mailbox sequence */ 282fe56b9e6SYuval Mintz actual_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & 283fe56b9e6SYuval Mintz DRV_MSG_SEQ_NUMBER_MASK; 284fe56b9e6SYuval Mintz 285fe56b9e6SYuval Mintz /* Use MCP history register to check if MCP reset occurred between 286fe56b9e6SYuval Mintz * init time and now. 287fe56b9e6SYuval Mintz */ 288fe56b9e6SYuval Mintz if (p_hwfn->mcp_info->mcp_hist != 289fe56b9e6SYuval Mintz qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { 290fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, "Rereading MCP offsets\n"); 291fe56b9e6SYuval Mintz qed_load_mcp_offsets(p_hwfn, p_ptt); 292fe56b9e6SYuval Mintz qed_mcp_cmd_port_init(p_hwfn, p_ptt); 293fe56b9e6SYuval Mintz } 294fe56b9e6SYuval Mintz seq = ++p_hwfn->mcp_info->drv_mb_seq; 295fe56b9e6SYuval Mintz 296fe56b9e6SYuval Mintz /* Set drv param */ 297fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_param, param); 298fe56b9e6SYuval Mintz 299fe56b9e6SYuval Mintz /* Set drv command along with the updated sequence */ 300fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, (cmd | seq)); 301fe56b9e6SYuval Mintz 302fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 303fe56b9e6SYuval Mintz "wrote command (%x) to MFW MB param 0x%08x\n", 304fe56b9e6SYuval Mintz (cmd | seq), param); 305fe56b9e6SYuval Mintz 306fe56b9e6SYuval Mintz do { 307fe56b9e6SYuval Mintz /* Wait for MFW response */ 308fe56b9e6SYuval Mintz udelay(delay); 309fe56b9e6SYuval Mintz *o_mcp_resp = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_header); 310fe56b9e6SYuval Mintz 311fe56b9e6SYuval Mintz /* Give the FW up to 5 second (500*10ms) */ 312fe56b9e6SYuval Mintz } while ((seq != (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) && 313fe56b9e6SYuval Mintz (cnt++ < QED_DRV_MB_MAX_RETRIES)); 314fe56b9e6SYuval Mintz 315fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 316fe56b9e6SYuval Mintz "[after %d ms] read (%x) seq is (%x) from FW MB\n", 317fe56b9e6SYuval Mintz cnt * delay, *o_mcp_resp, seq); 318fe56b9e6SYuval Mintz 319fe56b9e6SYuval Mintz /* Is this a reply to our command? */ 320fe56b9e6SYuval Mintz if (seq == (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) { 321fe56b9e6SYuval Mintz *o_mcp_resp &= FW_MSG_CODE_MASK; 322fe56b9e6SYuval Mintz /* Get the MCP param */ 323fe56b9e6SYuval Mintz *o_mcp_param = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_param); 324fe56b9e6SYuval Mintz } else { 325fe56b9e6SYuval Mintz /* FW BUG! */ 326fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MFW failed to respond!\n"); 327fe56b9e6SYuval Mintz *o_mcp_resp = 0; 328fe56b9e6SYuval Mintz rc = -EAGAIN; 329fe56b9e6SYuval Mintz } 330fe56b9e6SYuval Mintz return rc; 331fe56b9e6SYuval Mintz } 332fe56b9e6SYuval Mintz 3335529bad9STomer Tayar static int qed_mcp_cmd_and_union(struct qed_hwfn *p_hwfn, 334fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 3355529bad9STomer Tayar struct qed_mcp_mb_params *p_mb_params) 336fe56b9e6SYuval Mintz { 3375529bad9STomer Tayar u32 union_data_addr; 3385529bad9STomer Tayar int rc; 339fe56b9e6SYuval Mintz 340fe56b9e6SYuval Mintz /* MCP not initialized */ 341fe56b9e6SYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 342fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized !\n"); 343fe56b9e6SYuval Mintz return -EBUSY; 344fe56b9e6SYuval Mintz } 345fe56b9e6SYuval Mintz 3465529bad9STomer Tayar union_data_addr = p_hwfn->mcp_info->drv_mb_addr + 3475529bad9STomer Tayar offsetof(struct public_drv_mb, union_data); 3485529bad9STomer Tayar 3495529bad9STomer Tayar /* Ensure that only a single thread is accessing the mailbox at a 3505529bad9STomer Tayar * certain time. 351fe56b9e6SYuval Mintz */ 3525529bad9STomer Tayar rc = qed_mcp_mb_lock(p_hwfn, p_mb_params->cmd); 3535529bad9STomer Tayar if (rc) 3545529bad9STomer Tayar return rc; 3555529bad9STomer Tayar 3565529bad9STomer Tayar if (p_mb_params->p_data_src != NULL) 3575529bad9STomer Tayar qed_memcpy_to(p_hwfn, p_ptt, union_data_addr, 3585529bad9STomer Tayar p_mb_params->p_data_src, 3595529bad9STomer Tayar sizeof(*p_mb_params->p_data_src)); 3605529bad9STomer Tayar 3615529bad9STomer Tayar rc = qed_do_mcp_cmd(p_hwfn, p_ptt, p_mb_params->cmd, 3625529bad9STomer Tayar p_mb_params->param, &p_mb_params->mcp_resp, 3635529bad9STomer Tayar &p_mb_params->mcp_param); 3645529bad9STomer Tayar 3655529bad9STomer Tayar if (p_mb_params->p_data_dst != NULL) 3665529bad9STomer Tayar qed_memcpy_from(p_hwfn, p_ptt, p_mb_params->p_data_dst, 3675529bad9STomer Tayar union_data_addr, 3685529bad9STomer Tayar sizeof(*p_mb_params->p_data_dst)); 3695529bad9STomer Tayar 3705529bad9STomer Tayar qed_mcp_mb_unlock(p_hwfn, p_mb_params->cmd); 371fe56b9e6SYuval Mintz 372fe56b9e6SYuval Mintz return rc; 373fe56b9e6SYuval Mintz } 374fe56b9e6SYuval Mintz 3755529bad9STomer Tayar int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 3765529bad9STomer Tayar struct qed_ptt *p_ptt, 3775529bad9STomer Tayar u32 cmd, 3785529bad9STomer Tayar u32 param, 3795529bad9STomer Tayar u32 *o_mcp_resp, 3805529bad9STomer Tayar u32 *o_mcp_param) 381fe56b9e6SYuval Mintz { 3825529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 3835529bad9STomer Tayar int rc; 384fe56b9e6SYuval Mintz 3855529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 3865529bad9STomer Tayar mb_params.cmd = cmd; 3875529bad9STomer Tayar mb_params.param = param; 3885529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 3895529bad9STomer Tayar if (rc) 3905529bad9STomer Tayar return rc; 3915529bad9STomer Tayar 3925529bad9STomer Tayar *o_mcp_resp = mb_params.mcp_resp; 3935529bad9STomer Tayar *o_mcp_param = mb_params.mcp_param; 3945529bad9STomer Tayar 3955529bad9STomer Tayar return 0; 396fe56b9e6SYuval Mintz } 397fe56b9e6SYuval Mintz 398fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 399fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 400fe56b9e6SYuval Mintz u32 *p_load_code) 401fe56b9e6SYuval Mintz { 402fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 4035529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 4045529bad9STomer Tayar union drv_union_data union_data; 405fe56b9e6SYuval Mintz int rc; 406fe56b9e6SYuval Mintz 4075529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 408fe56b9e6SYuval Mintz /* Load Request */ 4095529bad9STomer Tayar mb_params.cmd = DRV_MSG_CODE_LOAD_REQ; 4105529bad9STomer Tayar mb_params.param = PDA_COMP | DRV_ID_MCP_HSI_VER_CURRENT | 4115529bad9STomer Tayar cdev->drv_type; 4125529bad9STomer Tayar memcpy(&union_data.ver_str, cdev->ver_str, MCP_DRV_VER_STR_SIZE); 4135529bad9STomer Tayar mb_params.p_data_src = &union_data; 4145529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 415fe56b9e6SYuval Mintz 416fe56b9e6SYuval Mintz /* if mcp fails to respond we must abort */ 417fe56b9e6SYuval Mintz if (rc) { 418fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 419fe56b9e6SYuval Mintz return rc; 420fe56b9e6SYuval Mintz } 421fe56b9e6SYuval Mintz 4225529bad9STomer Tayar *p_load_code = mb_params.mcp_resp; 4235529bad9STomer Tayar 424fe56b9e6SYuval Mintz /* If MFW refused (e.g. other port is in diagnostic mode) we 425fe56b9e6SYuval Mintz * must abort. This can happen in the following cases: 426fe56b9e6SYuval Mintz * - Other port is in diagnostic mode 427fe56b9e6SYuval Mintz * - Previously loaded function on the engine is not compliant with 428fe56b9e6SYuval Mintz * the requester. 429fe56b9e6SYuval Mintz * - MFW cannot cope with the requester's DRV_MFW_HSI_VERSION. 430fe56b9e6SYuval Mintz * - 431fe56b9e6SYuval Mintz */ 432fe56b9e6SYuval Mintz if (!(*p_load_code) || 433fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_HSI) || 434fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_PDA) || 435fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_DIAG)) { 436fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP refused load request, aborting\n"); 437fe56b9e6SYuval Mintz return -EBUSY; 438fe56b9e6SYuval Mintz } 439fe56b9e6SYuval Mintz 440fe56b9e6SYuval Mintz return 0; 441fe56b9e6SYuval Mintz } 442fe56b9e6SYuval Mintz 443334c03b5SZvi Nachmani static void qed_mcp_handle_transceiver_change(struct qed_hwfn *p_hwfn, 444334c03b5SZvi Nachmani struct qed_ptt *p_ptt) 445334c03b5SZvi Nachmani { 446334c03b5SZvi Nachmani u32 transceiver_state; 447334c03b5SZvi Nachmani 448334c03b5SZvi Nachmani transceiver_state = qed_rd(p_hwfn, p_ptt, 449334c03b5SZvi Nachmani p_hwfn->mcp_info->port_addr + 450334c03b5SZvi Nachmani offsetof(struct public_port, 451334c03b5SZvi Nachmani transceiver_data)); 452334c03b5SZvi Nachmani 453334c03b5SZvi Nachmani DP_VERBOSE(p_hwfn, 454334c03b5SZvi Nachmani (NETIF_MSG_HW | QED_MSG_SP), 455334c03b5SZvi Nachmani "Received transceiver state update [0x%08x] from mfw [Addr 0x%x]\n", 456334c03b5SZvi Nachmani transceiver_state, 457334c03b5SZvi Nachmani (u32)(p_hwfn->mcp_info->port_addr + 458334c03b5SZvi Nachmani offsetof(struct public_port, 459334c03b5SZvi Nachmani transceiver_data))); 460334c03b5SZvi Nachmani 461334c03b5SZvi Nachmani transceiver_state = GET_FIELD(transceiver_state, 462334c03b5SZvi Nachmani PMM_TRANSCEIVER_STATE); 463334c03b5SZvi Nachmani 464334c03b5SZvi Nachmani if (transceiver_state == PMM_TRANSCEIVER_STATE_PRESENT) 465334c03b5SZvi Nachmani DP_NOTICE(p_hwfn, "Transceiver is present.\n"); 466334c03b5SZvi Nachmani else 467334c03b5SZvi Nachmani DP_NOTICE(p_hwfn, "Transceiver is unplugged.\n"); 468334c03b5SZvi Nachmani } 469334c03b5SZvi Nachmani 470cc875c2eSYuval Mintz static void qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn, 471cc875c2eSYuval Mintz struct qed_ptt *p_ptt, 472cc875c2eSYuval Mintz bool b_reset) 473cc875c2eSYuval Mintz { 474cc875c2eSYuval Mintz struct qed_mcp_link_state *p_link; 475cc875c2eSYuval Mintz u32 status = 0; 476cc875c2eSYuval Mintz 477cc875c2eSYuval Mintz p_link = &p_hwfn->mcp_info->link_output; 478cc875c2eSYuval Mintz memset(p_link, 0, sizeof(*p_link)); 479cc875c2eSYuval Mintz if (!b_reset) { 480cc875c2eSYuval Mintz status = qed_rd(p_hwfn, p_ptt, 481cc875c2eSYuval Mintz p_hwfn->mcp_info->port_addr + 482cc875c2eSYuval Mintz offsetof(struct public_port, link_status)); 483cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, (NETIF_MSG_LINK | QED_MSG_SP), 484cc875c2eSYuval Mintz "Received link update [0x%08x] from mfw [Addr 0x%x]\n", 485cc875c2eSYuval Mintz status, 486cc875c2eSYuval Mintz (u32)(p_hwfn->mcp_info->port_addr + 487cc875c2eSYuval Mintz offsetof(struct public_port, 488cc875c2eSYuval Mintz link_status))); 489cc875c2eSYuval Mintz } else { 490cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 491cc875c2eSYuval Mintz "Resetting link indications\n"); 492cc875c2eSYuval Mintz return; 493cc875c2eSYuval Mintz } 494cc875c2eSYuval Mintz 495fc916ff2SSudarsana Reddy Kalluru if (p_hwfn->b_drv_link_init) 496cc875c2eSYuval Mintz p_link->link_up = !!(status & LINK_STATUS_LINK_UP); 497fc916ff2SSudarsana Reddy Kalluru else 498fc916ff2SSudarsana Reddy Kalluru p_link->link_up = false; 499cc875c2eSYuval Mintz 500cc875c2eSYuval Mintz p_link->full_duplex = true; 501cc875c2eSYuval Mintz switch ((status & LINK_STATUS_SPEED_AND_DUPLEX_MASK)) { 502cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_100G: 503cc875c2eSYuval Mintz p_link->speed = 100000; 504cc875c2eSYuval Mintz break; 505cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_50G: 506cc875c2eSYuval Mintz p_link->speed = 50000; 507cc875c2eSYuval Mintz break; 508cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_40G: 509cc875c2eSYuval Mintz p_link->speed = 40000; 510cc875c2eSYuval Mintz break; 511cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_25G: 512cc875c2eSYuval Mintz p_link->speed = 25000; 513cc875c2eSYuval Mintz break; 514cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_20G: 515cc875c2eSYuval Mintz p_link->speed = 20000; 516cc875c2eSYuval Mintz break; 517cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_10G: 518cc875c2eSYuval Mintz p_link->speed = 10000; 519cc875c2eSYuval Mintz break; 520cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_1000THD: 521cc875c2eSYuval Mintz p_link->full_duplex = false; 522cc875c2eSYuval Mintz /* Fall-through */ 523cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_1000TFD: 524cc875c2eSYuval Mintz p_link->speed = 1000; 525cc875c2eSYuval Mintz break; 526cc875c2eSYuval Mintz default: 527cc875c2eSYuval Mintz p_link->speed = 0; 528cc875c2eSYuval Mintz } 529cc875c2eSYuval Mintz 530cc875c2eSYuval Mintz /* Correct speed according to bandwidth allocation */ 531cc875c2eSYuval Mintz if (p_hwfn->mcp_info->func_info.bandwidth_max && p_link->speed) { 532cc875c2eSYuval Mintz p_link->speed = p_link->speed * 533cc875c2eSYuval Mintz p_hwfn->mcp_info->func_info.bandwidth_max / 534cc875c2eSYuval Mintz 100; 535cc875c2eSYuval Mintz qed_init_pf_rl(p_hwfn, p_ptt, p_hwfn->rel_pf_id, 536cc875c2eSYuval Mintz p_link->speed); 537cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 538cc875c2eSYuval Mintz "Configured MAX bandwidth to be %08x Mb/sec\n", 539cc875c2eSYuval Mintz p_link->speed); 540cc875c2eSYuval Mintz } 541cc875c2eSYuval Mintz 542cc875c2eSYuval Mintz p_link->an = !!(status & LINK_STATUS_AUTO_NEGOTIATE_ENABLED); 543cc875c2eSYuval Mintz p_link->an_complete = !!(status & 544cc875c2eSYuval Mintz LINK_STATUS_AUTO_NEGOTIATE_COMPLETE); 545cc875c2eSYuval Mintz p_link->parallel_detection = !!(status & 546cc875c2eSYuval Mintz LINK_STATUS_PARALLEL_DETECTION_USED); 547cc875c2eSYuval Mintz p_link->pfc_enabled = !!(status & LINK_STATUS_PFC_ENABLED); 548cc875c2eSYuval Mintz 549cc875c2eSYuval Mintz p_link->partner_adv_speed |= 550cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE) ? 551cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_1G_FD : 0; 552cc875c2eSYuval Mintz p_link->partner_adv_speed |= 553cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE) ? 554cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_1G_HD : 0; 555cc875c2eSYuval Mintz p_link->partner_adv_speed |= 556cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_10G_CAPABLE) ? 557cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_10G : 0; 558cc875c2eSYuval Mintz p_link->partner_adv_speed |= 559cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_20G_CAPABLE) ? 560cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_20G : 0; 561cc875c2eSYuval Mintz p_link->partner_adv_speed |= 562cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_40G_CAPABLE) ? 563cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_40G : 0; 564cc875c2eSYuval Mintz p_link->partner_adv_speed |= 565cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_50G_CAPABLE) ? 566cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_50G : 0; 567cc875c2eSYuval Mintz p_link->partner_adv_speed |= 568cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_100G_CAPABLE) ? 569cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_100G : 0; 570cc875c2eSYuval Mintz 571cc875c2eSYuval Mintz p_link->partner_tx_flow_ctrl_en = 572cc875c2eSYuval Mintz !!(status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED); 573cc875c2eSYuval Mintz p_link->partner_rx_flow_ctrl_en = 574cc875c2eSYuval Mintz !!(status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED); 575cc875c2eSYuval Mintz 576cc875c2eSYuval Mintz switch (status & LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK) { 577cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE: 578cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_SYMMETRIC_PAUSE; 579cc875c2eSYuval Mintz break; 580cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE: 581cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_ASYMMETRIC_PAUSE; 582cc875c2eSYuval Mintz break; 583cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_BOTH_PAUSE: 584cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_BOTH_PAUSE; 585cc875c2eSYuval Mintz break; 586cc875c2eSYuval Mintz default: 587cc875c2eSYuval Mintz p_link->partner_adv_pause = 0; 588cc875c2eSYuval Mintz } 589cc875c2eSYuval Mintz 590cc875c2eSYuval Mintz p_link->sfp_tx_fault = !!(status & LINK_STATUS_SFP_TX_FAULT); 591cc875c2eSYuval Mintz 592cc875c2eSYuval Mintz qed_link_update(p_hwfn); 593cc875c2eSYuval Mintz } 594cc875c2eSYuval Mintz 595cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn *p_hwfn, 596cc875c2eSYuval Mintz struct qed_ptt *p_ptt, 597cc875c2eSYuval Mintz bool b_up) 598cc875c2eSYuval Mintz { 599cc875c2eSYuval Mintz struct qed_mcp_link_params *params = &p_hwfn->mcp_info->link_input; 6005529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 6015529bad9STomer Tayar union drv_union_data union_data; 6025529bad9STomer Tayar struct pmm_phy_cfg *phy_cfg; 603cc875c2eSYuval Mintz int rc = 0; 6045529bad9STomer Tayar u32 cmd; 605cc875c2eSYuval Mintz 606cc875c2eSYuval Mintz /* Set the shmem configuration according to params */ 6075529bad9STomer Tayar phy_cfg = &union_data.drv_phy_cfg; 6085529bad9STomer Tayar memset(phy_cfg, 0, sizeof(*phy_cfg)); 609cc875c2eSYuval Mintz cmd = b_up ? DRV_MSG_CODE_INIT_PHY : DRV_MSG_CODE_LINK_RESET; 610cc875c2eSYuval Mintz if (!params->speed.autoneg) 6115529bad9STomer Tayar phy_cfg->speed = params->speed.forced_speed; 6125529bad9STomer Tayar phy_cfg->pause |= (params->pause.autoneg) ? PMM_PAUSE_AUTONEG : 0; 6135529bad9STomer Tayar phy_cfg->pause |= (params->pause.forced_rx) ? PMM_PAUSE_RX : 0; 6145529bad9STomer Tayar phy_cfg->pause |= (params->pause.forced_tx) ? PMM_PAUSE_TX : 0; 6155529bad9STomer Tayar phy_cfg->adv_speed = params->speed.advertised_speeds; 6165529bad9STomer Tayar phy_cfg->loopback_mode = params->loopback_mode; 617cc875c2eSYuval Mintz 618fc916ff2SSudarsana Reddy Kalluru p_hwfn->b_drv_link_init = b_up; 619fc916ff2SSudarsana Reddy Kalluru 620cc875c2eSYuval Mintz if (b_up) { 621cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 622cc875c2eSYuval Mintz "Configuring Link: Speed 0x%08x, Pause 0x%08x, adv_speed 0x%08x, loopback 0x%08x, features 0x%08x\n", 6235529bad9STomer Tayar phy_cfg->speed, 6245529bad9STomer Tayar phy_cfg->pause, 6255529bad9STomer Tayar phy_cfg->adv_speed, 6265529bad9STomer Tayar phy_cfg->loopback_mode, 6275529bad9STomer Tayar phy_cfg->feature_config_flags); 628cc875c2eSYuval Mintz } else { 629cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 630cc875c2eSYuval Mintz "Resetting link\n"); 631cc875c2eSYuval Mintz } 632cc875c2eSYuval Mintz 6335529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 6345529bad9STomer Tayar mb_params.cmd = cmd; 6355529bad9STomer Tayar mb_params.p_data_src = &union_data; 6365529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 637cc875c2eSYuval Mintz 638cc875c2eSYuval Mintz /* if mcp fails to respond we must abort */ 639cc875c2eSYuval Mintz if (rc) { 640cc875c2eSYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 641cc875c2eSYuval Mintz return rc; 642cc875c2eSYuval Mintz } 643cc875c2eSYuval Mintz 644cc875c2eSYuval Mintz /* Reset the link status if needed */ 645cc875c2eSYuval Mintz if (!b_up) 646cc875c2eSYuval Mintz qed_mcp_handle_link_change(p_hwfn, p_ptt, true); 647cc875c2eSYuval Mintz 648cc875c2eSYuval Mintz return 0; 649cc875c2eSYuval Mintz } 650cc875c2eSYuval Mintz 651cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 652cc875c2eSYuval Mintz struct qed_ptt *p_ptt) 653cc875c2eSYuval Mintz { 654cc875c2eSYuval Mintz struct qed_mcp_info *info = p_hwfn->mcp_info; 655cc875c2eSYuval Mintz int rc = 0; 656cc875c2eSYuval Mintz bool found = false; 657cc875c2eSYuval Mintz u16 i; 658cc875c2eSYuval Mintz 659cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, "Received message from MFW\n"); 660cc875c2eSYuval Mintz 661cc875c2eSYuval Mintz /* Read Messages from MFW */ 662cc875c2eSYuval Mintz qed_mcp_read_mb(p_hwfn, p_ptt); 663cc875c2eSYuval Mintz 664cc875c2eSYuval Mintz /* Compare current messages to old ones */ 665cc875c2eSYuval Mintz for (i = 0; i < info->mfw_mb_length; i++) { 666cc875c2eSYuval Mintz if (info->mfw_mb_cur[i] == info->mfw_mb_shadow[i]) 667cc875c2eSYuval Mintz continue; 668cc875c2eSYuval Mintz 669cc875c2eSYuval Mintz found = true; 670cc875c2eSYuval Mintz 671cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 672cc875c2eSYuval Mintz "Msg [%d] - old CMD 0x%02x, new CMD 0x%02x\n", 673cc875c2eSYuval Mintz i, info->mfw_mb_shadow[i], info->mfw_mb_cur[i]); 674cc875c2eSYuval Mintz 675cc875c2eSYuval Mintz switch (i) { 676cc875c2eSYuval Mintz case MFW_DRV_MSG_LINK_CHANGE: 677cc875c2eSYuval Mintz qed_mcp_handle_link_change(p_hwfn, p_ptt, false); 678cc875c2eSYuval Mintz break; 679334c03b5SZvi Nachmani case MFW_DRV_MSG_TRANSCEIVER_STATE_CHANGE: 680334c03b5SZvi Nachmani qed_mcp_handle_transceiver_change(p_hwfn, p_ptt); 681334c03b5SZvi Nachmani break; 682cc875c2eSYuval Mintz default: 683cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, "Unimplemented MFW message %d\n", i); 684cc875c2eSYuval Mintz rc = -EINVAL; 685cc875c2eSYuval Mintz } 686cc875c2eSYuval Mintz } 687cc875c2eSYuval Mintz 688cc875c2eSYuval Mintz /* ACK everything */ 689cc875c2eSYuval Mintz for (i = 0; i < MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length); i++) { 690cc875c2eSYuval Mintz __be32 val = cpu_to_be32(((u32 *)info->mfw_mb_cur)[i]); 691cc875c2eSYuval Mintz 692cc875c2eSYuval Mintz /* MFW expect answer in BE, so we force write in that format */ 693cc875c2eSYuval Mintz qed_wr(p_hwfn, p_ptt, 694cc875c2eSYuval Mintz info->mfw_mb_addr + sizeof(u32) + 695cc875c2eSYuval Mintz MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length) * 696cc875c2eSYuval Mintz sizeof(u32) + i * sizeof(u32), 697cc875c2eSYuval Mintz (__force u32)val); 698cc875c2eSYuval Mintz } 699cc875c2eSYuval Mintz 700cc875c2eSYuval Mintz if (!found) { 701cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, 702cc875c2eSYuval Mintz "Received an MFW message indication but no new message!\n"); 703cc875c2eSYuval Mintz rc = -EINVAL; 704cc875c2eSYuval Mintz } 705cc875c2eSYuval Mintz 706cc875c2eSYuval Mintz /* Copy the new mfw messages into the shadow */ 707cc875c2eSYuval Mintz memcpy(info->mfw_mb_shadow, info->mfw_mb_cur, info->mfw_mb_length); 708cc875c2eSYuval Mintz 709cc875c2eSYuval Mintz return rc; 710cc875c2eSYuval Mintz } 711cc875c2eSYuval Mintz 712fe56b9e6SYuval Mintz int qed_mcp_get_mfw_ver(struct qed_dev *cdev, 713fe56b9e6SYuval Mintz u32 *p_mfw_ver) 714fe56b9e6SYuval Mintz { 715fe56b9e6SYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[0]; 716fe56b9e6SYuval Mintz struct qed_ptt *p_ptt; 717fe56b9e6SYuval Mintz u32 global_offsize; 718fe56b9e6SYuval Mintz 719fe56b9e6SYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn); 720fe56b9e6SYuval Mintz if (!p_ptt) 721fe56b9e6SYuval Mintz return -EBUSY; 722fe56b9e6SYuval Mintz 723fe56b9e6SYuval Mintz global_offsize = qed_rd(p_hwfn, p_ptt, 724fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info-> 725fe56b9e6SYuval Mintz public_base, 726fe56b9e6SYuval Mintz PUBLIC_GLOBAL)); 727fe56b9e6SYuval Mintz *p_mfw_ver = qed_rd(p_hwfn, p_ptt, 728fe56b9e6SYuval Mintz SECTION_ADDR(global_offsize, 0) + 729fe56b9e6SYuval Mintz offsetof(struct public_global, mfw_ver)); 730fe56b9e6SYuval Mintz 731fe56b9e6SYuval Mintz qed_ptt_release(p_hwfn, p_ptt); 732fe56b9e6SYuval Mintz 733fe56b9e6SYuval Mintz return 0; 734fe56b9e6SYuval Mintz } 735fe56b9e6SYuval Mintz 736cc875c2eSYuval Mintz int qed_mcp_get_media_type(struct qed_dev *cdev, 737cc875c2eSYuval Mintz u32 *p_media_type) 738cc875c2eSYuval Mintz { 739cc875c2eSYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[0]; 740cc875c2eSYuval Mintz struct qed_ptt *p_ptt; 741cc875c2eSYuval Mintz 742cc875c2eSYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 743cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized !\n"); 744cc875c2eSYuval Mintz return -EBUSY; 745cc875c2eSYuval Mintz } 746cc875c2eSYuval Mintz 747cc875c2eSYuval Mintz *p_media_type = MEDIA_UNSPECIFIED; 748cc875c2eSYuval Mintz 749cc875c2eSYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn); 750cc875c2eSYuval Mintz if (!p_ptt) 751cc875c2eSYuval Mintz return -EBUSY; 752cc875c2eSYuval Mintz 753cc875c2eSYuval Mintz *p_media_type = qed_rd(p_hwfn, p_ptt, p_hwfn->mcp_info->port_addr + 754cc875c2eSYuval Mintz offsetof(struct public_port, media_type)); 755cc875c2eSYuval Mintz 756cc875c2eSYuval Mintz qed_ptt_release(p_hwfn, p_ptt); 757cc875c2eSYuval Mintz 758cc875c2eSYuval Mintz return 0; 759cc875c2eSYuval Mintz } 760cc875c2eSYuval Mintz 761fe56b9e6SYuval Mintz static u32 qed_mcp_get_shmem_func(struct qed_hwfn *p_hwfn, 762fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 763fe56b9e6SYuval Mintz struct public_func *p_data, 764fe56b9e6SYuval Mintz int pfid) 765fe56b9e6SYuval Mintz { 766fe56b9e6SYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 767fe56b9e6SYuval Mintz PUBLIC_FUNC); 768fe56b9e6SYuval Mintz u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr); 769fe56b9e6SYuval Mintz u32 func_addr = SECTION_ADDR(mfw_path_offsize, pfid); 770fe56b9e6SYuval Mintz u32 i, size; 771fe56b9e6SYuval Mintz 772fe56b9e6SYuval Mintz memset(p_data, 0, sizeof(*p_data)); 773fe56b9e6SYuval Mintz 774fe56b9e6SYuval Mintz size = min_t(u32, sizeof(*p_data), 775fe56b9e6SYuval Mintz QED_SECTION_SIZE(mfw_path_offsize)); 776fe56b9e6SYuval Mintz for (i = 0; i < size / sizeof(u32); i++) 777fe56b9e6SYuval Mintz ((u32 *)p_data)[i] = qed_rd(p_hwfn, p_ptt, 778fe56b9e6SYuval Mintz func_addr + (i << 2)); 779fe56b9e6SYuval Mintz 780fe56b9e6SYuval Mintz return size; 781fe56b9e6SYuval Mintz } 782fe56b9e6SYuval Mintz 783fe56b9e6SYuval Mintz static int 784fe56b9e6SYuval Mintz qed_mcp_get_shmem_proto(struct qed_hwfn *p_hwfn, 785fe56b9e6SYuval Mintz struct public_func *p_info, 786fe56b9e6SYuval Mintz enum qed_pci_personality *p_proto) 787fe56b9e6SYuval Mintz { 788fe56b9e6SYuval Mintz int rc = 0; 789fe56b9e6SYuval Mintz 790fe56b9e6SYuval Mintz switch (p_info->config & FUNC_MF_CFG_PROTOCOL_MASK) { 791fe56b9e6SYuval Mintz case FUNC_MF_CFG_PROTOCOL_ETHERNET: 792fe56b9e6SYuval Mintz *p_proto = QED_PCI_ETH; 793fe56b9e6SYuval Mintz break; 794fe56b9e6SYuval Mintz default: 795fe56b9e6SYuval Mintz rc = -EINVAL; 796fe56b9e6SYuval Mintz } 797fe56b9e6SYuval Mintz 798fe56b9e6SYuval Mintz return rc; 799fe56b9e6SYuval Mintz } 800fe56b9e6SYuval Mintz 801fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 802fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 803fe56b9e6SYuval Mintz { 804fe56b9e6SYuval Mintz struct qed_mcp_function_info *info; 805fe56b9e6SYuval Mintz struct public_func shmem_info; 806fe56b9e6SYuval Mintz 807fe56b9e6SYuval Mintz qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, 808fe56b9e6SYuval Mintz MCP_PF_ID(p_hwfn)); 809fe56b9e6SYuval Mintz info = &p_hwfn->mcp_info->func_info; 810fe56b9e6SYuval Mintz 811fe56b9e6SYuval Mintz info->pause_on_host = (shmem_info.config & 812fe56b9e6SYuval Mintz FUNC_MF_CFG_PAUSE_ON_HOST_RING) ? 1 : 0; 813fe56b9e6SYuval Mintz 814fe56b9e6SYuval Mintz if (qed_mcp_get_shmem_proto(p_hwfn, &shmem_info, 815fe56b9e6SYuval Mintz &info->protocol)) { 816fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Unknown personality %08x\n", 817fe56b9e6SYuval Mintz (u32)(shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK)); 818fe56b9e6SYuval Mintz return -EINVAL; 819fe56b9e6SYuval Mintz } 820fe56b9e6SYuval Mintz 821fc48b7a6SYuval Mintz 822fe56b9e6SYuval Mintz info->bandwidth_min = (shmem_info.config & 823fe56b9e6SYuval Mintz FUNC_MF_CFG_MIN_BW_MASK) >> 824fe56b9e6SYuval Mintz FUNC_MF_CFG_MIN_BW_SHIFT; 825fe56b9e6SYuval Mintz if (info->bandwidth_min < 1 || info->bandwidth_min > 100) { 826fe56b9e6SYuval Mintz DP_INFO(p_hwfn, 827fe56b9e6SYuval Mintz "bandwidth minimum out of bounds [%02x]. Set to 1\n", 828fe56b9e6SYuval Mintz info->bandwidth_min); 829fe56b9e6SYuval Mintz info->bandwidth_min = 1; 830fe56b9e6SYuval Mintz } 831fe56b9e6SYuval Mintz 832fe56b9e6SYuval Mintz info->bandwidth_max = (shmem_info.config & 833fe56b9e6SYuval Mintz FUNC_MF_CFG_MAX_BW_MASK) >> 834fe56b9e6SYuval Mintz FUNC_MF_CFG_MAX_BW_SHIFT; 835fe56b9e6SYuval Mintz if (info->bandwidth_max < 1 || info->bandwidth_max > 100) { 836fe56b9e6SYuval Mintz DP_INFO(p_hwfn, 837fe56b9e6SYuval Mintz "bandwidth maximum out of bounds [%02x]. Set to 100\n", 838fe56b9e6SYuval Mintz info->bandwidth_max); 839fe56b9e6SYuval Mintz info->bandwidth_max = 100; 840fe56b9e6SYuval Mintz } 841fe56b9e6SYuval Mintz 842fe56b9e6SYuval Mintz if (shmem_info.mac_upper || shmem_info.mac_lower) { 843fe56b9e6SYuval Mintz info->mac[0] = (u8)(shmem_info.mac_upper >> 8); 844fe56b9e6SYuval Mintz info->mac[1] = (u8)(shmem_info.mac_upper); 845fe56b9e6SYuval Mintz info->mac[2] = (u8)(shmem_info.mac_lower >> 24); 846fe56b9e6SYuval Mintz info->mac[3] = (u8)(shmem_info.mac_lower >> 16); 847fe56b9e6SYuval Mintz info->mac[4] = (u8)(shmem_info.mac_lower >> 8); 848fe56b9e6SYuval Mintz info->mac[5] = (u8)(shmem_info.mac_lower); 849fe56b9e6SYuval Mintz } else { 850fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MAC is 0 in shmem\n"); 851fe56b9e6SYuval Mintz } 852fe56b9e6SYuval Mintz 853fe56b9e6SYuval Mintz info->wwn_port = (u64)shmem_info.fcoe_wwn_port_name_upper | 854fe56b9e6SYuval Mintz (((u64)shmem_info.fcoe_wwn_port_name_lower) << 32); 855fe56b9e6SYuval Mintz info->wwn_node = (u64)shmem_info.fcoe_wwn_node_name_upper | 856fe56b9e6SYuval Mintz (((u64)shmem_info.fcoe_wwn_node_name_lower) << 32); 857fe56b9e6SYuval Mintz 858fe56b9e6SYuval Mintz info->ovlan = (u16)(shmem_info.ovlan_stag & FUNC_MF_CFG_OV_STAG_MASK); 859fe56b9e6SYuval Mintz 860fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_SP | NETIF_MSG_IFUP), 861fe56b9e6SYuval Mintz "Read configuration from shmem: pause_on_host %02x protocol %02x BW [%02x - %02x] MAC %02x:%02x:%02x:%02x:%02x:%02x wwn port %llx node %llx ovlan %04x\n", 862fe56b9e6SYuval Mintz info->pause_on_host, info->protocol, 863fe56b9e6SYuval Mintz info->bandwidth_min, info->bandwidth_max, 864fe56b9e6SYuval Mintz info->mac[0], info->mac[1], info->mac[2], 865fe56b9e6SYuval Mintz info->mac[3], info->mac[4], info->mac[5], 866fe56b9e6SYuval Mintz info->wwn_port, info->wwn_node, info->ovlan); 867fe56b9e6SYuval Mintz 868fe56b9e6SYuval Mintz return 0; 869fe56b9e6SYuval Mintz } 870fe56b9e6SYuval Mintz 871cc875c2eSYuval Mintz struct qed_mcp_link_params 872cc875c2eSYuval Mintz *qed_mcp_get_link_params(struct qed_hwfn *p_hwfn) 873cc875c2eSYuval Mintz { 874cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 875cc875c2eSYuval Mintz return NULL; 876cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_input; 877cc875c2eSYuval Mintz } 878cc875c2eSYuval Mintz 879cc875c2eSYuval Mintz struct qed_mcp_link_state 880cc875c2eSYuval Mintz *qed_mcp_get_link_state(struct qed_hwfn *p_hwfn) 881cc875c2eSYuval Mintz { 882cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 883cc875c2eSYuval Mintz return NULL; 884cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_output; 885cc875c2eSYuval Mintz } 886cc875c2eSYuval Mintz 887cc875c2eSYuval Mintz struct qed_mcp_link_capabilities 888cc875c2eSYuval Mintz *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn) 889cc875c2eSYuval Mintz { 890cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 891cc875c2eSYuval Mintz return NULL; 892cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_capabilities; 893cc875c2eSYuval Mintz } 894cc875c2eSYuval Mintz 895fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn, 896fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 897fe56b9e6SYuval Mintz { 898fe56b9e6SYuval Mintz u32 resp = 0, param = 0; 899fe56b9e6SYuval Mintz int rc; 900fe56b9e6SYuval Mintz 901fe56b9e6SYuval Mintz rc = qed_mcp_cmd(p_hwfn, p_ptt, 902fe56b9e6SYuval Mintz DRV_MSG_CODE_NIG_DRAIN, 100, 903fe56b9e6SYuval Mintz &resp, ¶m); 904fe56b9e6SYuval Mintz 905fe56b9e6SYuval Mintz /* Wait for the drain to complete before returning */ 906fe56b9e6SYuval Mintz msleep(120); 907fe56b9e6SYuval Mintz 908fe56b9e6SYuval Mintz return rc; 909fe56b9e6SYuval Mintz } 910fe56b9e6SYuval Mintz 911cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 912cee4d264SManish Chopra struct qed_ptt *p_ptt, 913cee4d264SManish Chopra u32 *p_flash_size) 914cee4d264SManish Chopra { 915cee4d264SManish Chopra u32 flash_size; 916cee4d264SManish Chopra 917cee4d264SManish Chopra flash_size = qed_rd(p_hwfn, p_ptt, MCP_REG_NVM_CFG4); 918cee4d264SManish Chopra flash_size = (flash_size & MCP_REG_NVM_CFG4_FLASH_SIZE) >> 919cee4d264SManish Chopra MCP_REG_NVM_CFG4_FLASH_SIZE_SHIFT; 920cee4d264SManish Chopra flash_size = (1 << (flash_size + MCP_BYTES_PER_MBIT_SHIFT)); 921cee4d264SManish Chopra 922cee4d264SManish Chopra *p_flash_size = flash_size; 923cee4d264SManish Chopra 924cee4d264SManish Chopra return 0; 925cee4d264SManish Chopra } 926cee4d264SManish Chopra 927fe56b9e6SYuval Mintz int 928fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 929fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 930fe56b9e6SYuval Mintz struct qed_mcp_drv_version *p_ver) 931fe56b9e6SYuval Mintz { 9325529bad9STomer Tayar struct drv_version_stc *p_drv_version; 9335529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 9345529bad9STomer Tayar union drv_union_data union_data; 9355529bad9STomer Tayar __be32 val; 9365529bad9STomer Tayar u32 i; 9375529bad9STomer Tayar int rc; 938fe56b9e6SYuval Mintz 9395529bad9STomer Tayar p_drv_version = &union_data.drv_version; 9405529bad9STomer Tayar p_drv_version->version = p_ver->version; 9415529bad9STomer Tayar for (i = 0; i < MCP_DRV_VER_STR_SIZE - 1; i += 4) { 9425529bad9STomer Tayar val = cpu_to_be32(p_ver->name[i]); 9435529bad9STomer Tayar *(u32 *)&p_drv_version->name[i * sizeof(u32)] = val; 944fe56b9e6SYuval Mintz } 945fe56b9e6SYuval Mintz 9465529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 9475529bad9STomer Tayar mb_params.cmd = DRV_MSG_CODE_SET_VERSION; 9485529bad9STomer Tayar mb_params.p_data_src = &union_data; 9495529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 9505529bad9STomer Tayar if (rc) 951fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 952fe56b9e6SYuval Mintz 9535529bad9STomer Tayar return rc; 954fe56b9e6SYuval Mintz } 95591420b83SSudarsana Kalluru 95691420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 95791420b83SSudarsana Kalluru enum qed_led_mode mode) 95891420b83SSudarsana Kalluru { 95991420b83SSudarsana Kalluru u32 resp = 0, param = 0, drv_mb_param; 96091420b83SSudarsana Kalluru int rc; 96191420b83SSudarsana Kalluru 96291420b83SSudarsana Kalluru switch (mode) { 96391420b83SSudarsana Kalluru case QED_LED_MODE_ON: 96491420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_ON; 96591420b83SSudarsana Kalluru break; 96691420b83SSudarsana Kalluru case QED_LED_MODE_OFF: 96791420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_OFF; 96891420b83SSudarsana Kalluru break; 96991420b83SSudarsana Kalluru case QED_LED_MODE_RESTORE: 97091420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_OPER; 97191420b83SSudarsana Kalluru break; 97291420b83SSudarsana Kalluru default: 97391420b83SSudarsana Kalluru DP_NOTICE(p_hwfn, "Invalid LED mode %d\n", mode); 97491420b83SSudarsana Kalluru return -EINVAL; 97591420b83SSudarsana Kalluru } 97691420b83SSudarsana Kalluru 97791420b83SSudarsana Kalluru rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LED_MODE, 97891420b83SSudarsana Kalluru drv_mb_param, &resp, ¶m); 97991420b83SSudarsana Kalluru 98091420b83SSudarsana Kalluru return rc; 98191420b83SSudarsana Kalluru } 982