1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 2fe56b9e6SYuval Mintz * Copyright (c) 2015 QLogic Corporation 3fe56b9e6SYuval Mintz * 4fe56b9e6SYuval Mintz * This software is available under the terms of the GNU General Public License 5fe56b9e6SYuval Mintz * (GPL) Version 2, available from the file COPYING in the main directory of 6fe56b9e6SYuval Mintz * this source tree. 7fe56b9e6SYuval Mintz */ 8fe56b9e6SYuval Mintz 9fe56b9e6SYuval Mintz #include <linux/types.h> 10fe56b9e6SYuval Mintz #include <asm/byteorder.h> 11fe56b9e6SYuval Mintz #include <linux/delay.h> 12fe56b9e6SYuval Mintz #include <linux/errno.h> 13fe56b9e6SYuval Mintz #include <linux/kernel.h> 14fe56b9e6SYuval Mintz #include <linux/slab.h> 155529bad9STomer Tayar #include <linux/spinlock.h> 16fe56b9e6SYuval Mintz #include <linux/string.h> 17fe56b9e6SYuval Mintz #include "qed.h" 1839651abdSSudarsana Reddy Kalluru #include "qed_dcbx.h" 19fe56b9e6SYuval Mintz #include "qed_hsi.h" 20fe56b9e6SYuval Mintz #include "qed_hw.h" 21fe56b9e6SYuval Mintz #include "qed_mcp.h" 22fe56b9e6SYuval Mintz #include "qed_reg_addr.h" 231408cc1fSYuval Mintz #include "qed_sriov.h" 241408cc1fSYuval Mintz 25fe56b9e6SYuval Mintz #define CHIP_MCP_RESP_ITER_US 10 26fe56b9e6SYuval Mintz 27fe56b9e6SYuval Mintz #define QED_DRV_MB_MAX_RETRIES (500 * 1000) /* Account for 5 sec */ 28fe56b9e6SYuval Mintz #define QED_MCP_RESET_RETRIES (50 * 1000) /* Account for 500 msec */ 29fe56b9e6SYuval Mintz 30fe56b9e6SYuval Mintz #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val) \ 31fe56b9e6SYuval Mintz qed_wr(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset), \ 32fe56b9e6SYuval Mintz _val) 33fe56b9e6SYuval Mintz 34fe56b9e6SYuval Mintz #define DRV_INNER_RD(_p_hwfn, _p_ptt, _ptr, _offset) \ 35fe56b9e6SYuval Mintz qed_rd(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset)) 36fe56b9e6SYuval Mintz 37fe56b9e6SYuval Mintz #define DRV_MB_WR(_p_hwfn, _p_ptt, _field, _val) \ 38fe56b9e6SYuval Mintz DRV_INNER_WR(p_hwfn, _p_ptt, drv_mb_addr, \ 39fe56b9e6SYuval Mintz offsetof(struct public_drv_mb, _field), _val) 40fe56b9e6SYuval Mintz 41fe56b9e6SYuval Mintz #define DRV_MB_RD(_p_hwfn, _p_ptt, _field) \ 42fe56b9e6SYuval Mintz DRV_INNER_RD(_p_hwfn, _p_ptt, drv_mb_addr, \ 43fe56b9e6SYuval Mintz offsetof(struct public_drv_mb, _field)) 44fe56b9e6SYuval Mintz 45fe56b9e6SYuval Mintz #define PDA_COMP (((FW_MAJOR_VERSION) + (FW_MINOR_VERSION << 8)) << \ 46fe56b9e6SYuval Mintz DRV_ID_PDA_COMP_VER_SHIFT) 47fe56b9e6SYuval Mintz 48fe56b9e6SYuval Mintz #define MCP_BYTES_PER_MBIT_SHIFT 17 49fe56b9e6SYuval Mintz 50fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn) 51fe56b9e6SYuval Mintz { 52fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info || !p_hwfn->mcp_info->public_base) 53fe56b9e6SYuval Mintz return false; 54fe56b9e6SYuval Mintz return true; 55fe56b9e6SYuval Mintz } 56fe56b9e6SYuval Mintz 571a635e48SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 58fe56b9e6SYuval Mintz { 59fe56b9e6SYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 60fe56b9e6SYuval Mintz PUBLIC_PORT); 61fe56b9e6SYuval Mintz u32 mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, addr); 62fe56b9e6SYuval Mintz 63fe56b9e6SYuval Mintz p_hwfn->mcp_info->port_addr = SECTION_ADDR(mfw_mb_offsize, 64fe56b9e6SYuval Mintz MFW_PORT(p_hwfn)); 65fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 66fe56b9e6SYuval Mintz "port_addr = 0x%x, port_id 0x%02x\n", 67fe56b9e6SYuval Mintz p_hwfn->mcp_info->port_addr, MFW_PORT(p_hwfn)); 68fe56b9e6SYuval Mintz } 69fe56b9e6SYuval Mintz 701a635e48SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 71fe56b9e6SYuval Mintz { 72fe56b9e6SYuval Mintz u32 length = MFW_DRV_MSG_MAX_DWORDS(p_hwfn->mcp_info->mfw_mb_length); 73fe56b9e6SYuval Mintz u32 tmp, i; 74fe56b9e6SYuval Mintz 75fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info->public_base) 76fe56b9e6SYuval Mintz return; 77fe56b9e6SYuval Mintz 78fe56b9e6SYuval Mintz for (i = 0; i < length; i++) { 79fe56b9e6SYuval Mintz tmp = qed_rd(p_hwfn, p_ptt, 80fe56b9e6SYuval Mintz p_hwfn->mcp_info->mfw_mb_addr + 81fe56b9e6SYuval Mintz (i << 2) + sizeof(u32)); 82fe56b9e6SYuval Mintz 83fe56b9e6SYuval Mintz /* The MB data is actually BE; Need to force it to cpu */ 84fe56b9e6SYuval Mintz ((u32 *)p_hwfn->mcp_info->mfw_mb_cur)[i] = 85fe56b9e6SYuval Mintz be32_to_cpu((__force __be32)tmp); 86fe56b9e6SYuval Mintz } 87fe56b9e6SYuval Mintz } 88fe56b9e6SYuval Mintz 89fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn) 90fe56b9e6SYuval Mintz { 91fe56b9e6SYuval Mintz if (p_hwfn->mcp_info) { 92fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info->mfw_mb_cur); 93fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info->mfw_mb_shadow); 94fe56b9e6SYuval Mintz } 95fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info); 96fe56b9e6SYuval Mintz 97fe56b9e6SYuval Mintz return 0; 98fe56b9e6SYuval Mintz } 99fe56b9e6SYuval Mintz 1001a635e48SYuval Mintz static int qed_load_mcp_offsets(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 101fe56b9e6SYuval Mintz { 102fe56b9e6SYuval Mintz struct qed_mcp_info *p_info = p_hwfn->mcp_info; 103fe56b9e6SYuval Mintz u32 drv_mb_offsize, mfw_mb_offsize; 104fe56b9e6SYuval Mintz u32 mcp_pf_id = MCP_PF_ID(p_hwfn); 105fe56b9e6SYuval Mintz 106fe56b9e6SYuval Mintz p_info->public_base = qed_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR); 107fe56b9e6SYuval Mintz if (!p_info->public_base) 108fe56b9e6SYuval Mintz return 0; 109fe56b9e6SYuval Mintz 110fe56b9e6SYuval Mintz p_info->public_base |= GRCBASE_MCP; 111fe56b9e6SYuval Mintz 112fe56b9e6SYuval Mintz /* Calculate the driver and MFW mailbox address */ 113fe56b9e6SYuval Mintz drv_mb_offsize = qed_rd(p_hwfn, p_ptt, 114fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_info->public_base, 115fe56b9e6SYuval Mintz PUBLIC_DRV_MB)); 116fe56b9e6SYuval Mintz p_info->drv_mb_addr = SECTION_ADDR(drv_mb_offsize, mcp_pf_id); 117fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 118fe56b9e6SYuval Mintz "drv_mb_offsiz = 0x%x, drv_mb_addr = 0x%x mcp_pf_id = 0x%x\n", 119fe56b9e6SYuval Mintz drv_mb_offsize, p_info->drv_mb_addr, mcp_pf_id); 120fe56b9e6SYuval Mintz 121fe56b9e6SYuval Mintz /* Set the MFW MB address */ 122fe56b9e6SYuval Mintz mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, 123fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_info->public_base, 124fe56b9e6SYuval Mintz PUBLIC_MFW_MB)); 125fe56b9e6SYuval Mintz p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id); 126fe56b9e6SYuval Mintz p_info->mfw_mb_length = (u16)qed_rd(p_hwfn, p_ptt, p_info->mfw_mb_addr); 127fe56b9e6SYuval Mintz 128fe56b9e6SYuval Mintz /* Get the current driver mailbox sequence before sending 129fe56b9e6SYuval Mintz * the first command 130fe56b9e6SYuval Mintz */ 131fe56b9e6SYuval Mintz p_info->drv_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & 132fe56b9e6SYuval Mintz DRV_MSG_SEQ_NUMBER_MASK; 133fe56b9e6SYuval Mintz 134fe56b9e6SYuval Mintz /* Get current FW pulse sequence */ 135fe56b9e6SYuval Mintz p_info->drv_pulse_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_pulse_mb) & 136fe56b9e6SYuval Mintz DRV_PULSE_SEQ_MASK; 137fe56b9e6SYuval Mintz 138fe56b9e6SYuval Mintz p_info->mcp_hist = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); 139fe56b9e6SYuval Mintz 140fe56b9e6SYuval Mintz return 0; 141fe56b9e6SYuval Mintz } 142fe56b9e6SYuval Mintz 1431a635e48SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 144fe56b9e6SYuval Mintz { 145fe56b9e6SYuval Mintz struct qed_mcp_info *p_info; 146fe56b9e6SYuval Mintz u32 size; 147fe56b9e6SYuval Mintz 148fe56b9e6SYuval Mintz /* Allocate mcp_info structure */ 14960fffb3bSYuval Mintz p_hwfn->mcp_info = kzalloc(sizeof(*p_hwfn->mcp_info), GFP_KERNEL); 150fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info) 151fe56b9e6SYuval Mintz goto err; 152fe56b9e6SYuval Mintz p_info = p_hwfn->mcp_info; 153fe56b9e6SYuval Mintz 154fe56b9e6SYuval Mintz if (qed_load_mcp_offsets(p_hwfn, p_ptt) != 0) { 155fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MCP is not initialized\n"); 156fe56b9e6SYuval Mintz /* Do not free mcp_info here, since public_base indicate that 157fe56b9e6SYuval Mintz * the MCP is not initialized 158fe56b9e6SYuval Mintz */ 159fe56b9e6SYuval Mintz return 0; 160fe56b9e6SYuval Mintz } 161fe56b9e6SYuval Mintz 162fe56b9e6SYuval Mintz size = MFW_DRV_MSG_MAX_DWORDS(p_info->mfw_mb_length) * sizeof(u32); 16360fffb3bSYuval Mintz p_info->mfw_mb_cur = kzalloc(size, GFP_KERNEL); 164fe56b9e6SYuval Mintz p_info->mfw_mb_shadow = 165fe56b9e6SYuval Mintz kzalloc(sizeof(u32) * MFW_DRV_MSG_MAX_DWORDS( 16660fffb3bSYuval Mintz p_info->mfw_mb_length), GFP_KERNEL); 167fe56b9e6SYuval Mintz if (!p_info->mfw_mb_shadow || !p_info->mfw_mb_addr) 168fe56b9e6SYuval Mintz goto err; 169fe56b9e6SYuval Mintz 1705529bad9STomer Tayar /* Initialize the MFW spinlock */ 1715529bad9STomer Tayar spin_lock_init(&p_info->lock); 172fe56b9e6SYuval Mintz 173fe56b9e6SYuval Mintz return 0; 174fe56b9e6SYuval Mintz 175fe56b9e6SYuval Mintz err: 176fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Failed to allocate mcp memory\n"); 177fe56b9e6SYuval Mintz qed_mcp_free(p_hwfn); 178fe56b9e6SYuval Mintz return -ENOMEM; 179fe56b9e6SYuval Mintz } 180fe56b9e6SYuval Mintz 1815529bad9STomer Tayar /* Locks the MFW mailbox of a PF to ensure a single access. 1825529bad9STomer Tayar * The lock is achieved in most cases by holding a spinlock, causing other 1835529bad9STomer Tayar * threads to wait till a previous access is done. 1845529bad9STomer Tayar * In some cases (currently when a [UN]LOAD_REQ commands are sent), the single 1855529bad9STomer Tayar * access is achieved by setting a blocking flag, which will fail other 1865529bad9STomer Tayar * competing contexts to send their mailboxes. 1875529bad9STomer Tayar */ 1881a635e48SYuval Mintz static int qed_mcp_mb_lock(struct qed_hwfn *p_hwfn, u32 cmd) 1895529bad9STomer Tayar { 1905529bad9STomer Tayar spin_lock_bh(&p_hwfn->mcp_info->lock); 1915529bad9STomer Tayar 1925529bad9STomer Tayar /* The spinlock shouldn't be acquired when the mailbox command is 1935529bad9STomer Tayar * [UN]LOAD_REQ, since the engine is locked by the MFW, and a parallel 1945529bad9STomer Tayar * pending [UN]LOAD_REQ command of another PF together with a spinlock 1955529bad9STomer Tayar * (i.e. interrupts are disabled) - can lead to a deadlock. 1965529bad9STomer Tayar * It is assumed that for a single PF, no other mailbox commands can be 1975529bad9STomer Tayar * sent from another context while sending LOAD_REQ, and that any 1985529bad9STomer Tayar * parallel commands to UNLOAD_REQ can be cancelled. 1995529bad9STomer Tayar */ 2005529bad9STomer Tayar if (cmd == DRV_MSG_CODE_LOAD_DONE || cmd == DRV_MSG_CODE_UNLOAD_DONE) 2015529bad9STomer Tayar p_hwfn->mcp_info->block_mb_sending = false; 2025529bad9STomer Tayar 2035529bad9STomer Tayar if (p_hwfn->mcp_info->block_mb_sending) { 2045529bad9STomer Tayar DP_NOTICE(p_hwfn, 2055529bad9STomer Tayar "Trying to send a MFW mailbox command [0x%x] in parallel to [UN]LOAD_REQ. Aborting.\n", 2065529bad9STomer Tayar cmd); 2075529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2085529bad9STomer Tayar return -EBUSY; 2095529bad9STomer Tayar } 2105529bad9STomer Tayar 2115529bad9STomer Tayar if (cmd == DRV_MSG_CODE_LOAD_REQ || cmd == DRV_MSG_CODE_UNLOAD_REQ) { 2125529bad9STomer Tayar p_hwfn->mcp_info->block_mb_sending = true; 2135529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2145529bad9STomer Tayar } 2155529bad9STomer Tayar 2165529bad9STomer Tayar return 0; 2175529bad9STomer Tayar } 2185529bad9STomer Tayar 2191a635e48SYuval Mintz static void qed_mcp_mb_unlock(struct qed_hwfn *p_hwfn, u32 cmd) 2205529bad9STomer Tayar { 2215529bad9STomer Tayar if (cmd != DRV_MSG_CODE_LOAD_REQ && cmd != DRV_MSG_CODE_UNLOAD_REQ) 2225529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2235529bad9STomer Tayar } 2245529bad9STomer Tayar 2251a635e48SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 226fe56b9e6SYuval Mintz { 227fe56b9e6SYuval Mintz u32 seq = ++p_hwfn->mcp_info->drv_mb_seq; 228fe56b9e6SYuval Mintz u8 delay = CHIP_MCP_RESP_ITER_US; 229fe56b9e6SYuval Mintz u32 org_mcp_reset_seq, cnt = 0; 230fe56b9e6SYuval Mintz int rc = 0; 231fe56b9e6SYuval Mintz 2325529bad9STomer Tayar /* Ensure that only a single thread is accessing the mailbox at a 2335529bad9STomer Tayar * certain time. 2345529bad9STomer Tayar */ 2355529bad9STomer Tayar rc = qed_mcp_mb_lock(p_hwfn, DRV_MSG_CODE_MCP_RESET); 2365529bad9STomer Tayar if (rc != 0) 2375529bad9STomer Tayar return rc; 2385529bad9STomer Tayar 239fe56b9e6SYuval Mintz /* Set drv command along with the updated sequence */ 240fe56b9e6SYuval Mintz org_mcp_reset_seq = qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); 241fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, 242fe56b9e6SYuval Mintz (DRV_MSG_CODE_MCP_RESET | seq)); 243fe56b9e6SYuval Mintz 244fe56b9e6SYuval Mintz do { 245fe56b9e6SYuval Mintz /* Wait for MFW response */ 246fe56b9e6SYuval Mintz udelay(delay); 247fe56b9e6SYuval Mintz /* Give the FW up to 500 second (50*1000*10usec) */ 248fe56b9e6SYuval Mintz } while ((org_mcp_reset_seq == qed_rd(p_hwfn, p_ptt, 249fe56b9e6SYuval Mintz MISCS_REG_GENERIC_POR_0)) && 250fe56b9e6SYuval Mintz (cnt++ < QED_MCP_RESET_RETRIES)); 251fe56b9e6SYuval Mintz 252fe56b9e6SYuval Mintz if (org_mcp_reset_seq != 253fe56b9e6SYuval Mintz qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { 254fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 255fe56b9e6SYuval Mintz "MCP was reset after %d usec\n", cnt * delay); 256fe56b9e6SYuval Mintz } else { 257fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Failed to reset MCP\n"); 258fe56b9e6SYuval Mintz rc = -EAGAIN; 259fe56b9e6SYuval Mintz } 260fe56b9e6SYuval Mintz 2615529bad9STomer Tayar qed_mcp_mb_unlock(p_hwfn, DRV_MSG_CODE_MCP_RESET); 2625529bad9STomer Tayar 263fe56b9e6SYuval Mintz return rc; 264fe56b9e6SYuval Mintz } 265fe56b9e6SYuval Mintz 266fe56b9e6SYuval Mintz static int qed_do_mcp_cmd(struct qed_hwfn *p_hwfn, 267fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 268fe56b9e6SYuval Mintz u32 cmd, 269fe56b9e6SYuval Mintz u32 param, 270fe56b9e6SYuval Mintz u32 *o_mcp_resp, 271fe56b9e6SYuval Mintz u32 *o_mcp_param) 272fe56b9e6SYuval Mintz { 273fe56b9e6SYuval Mintz u8 delay = CHIP_MCP_RESP_ITER_US; 274fe56b9e6SYuval Mintz u32 seq, cnt = 1, actual_mb_seq; 275fe56b9e6SYuval Mintz int rc = 0; 276fe56b9e6SYuval Mintz 277fe56b9e6SYuval Mintz /* Get actual driver mailbox sequence */ 278fe56b9e6SYuval Mintz actual_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & 279fe56b9e6SYuval Mintz DRV_MSG_SEQ_NUMBER_MASK; 280fe56b9e6SYuval Mintz 281fe56b9e6SYuval Mintz /* Use MCP history register to check if MCP reset occurred between 282fe56b9e6SYuval Mintz * init time and now. 283fe56b9e6SYuval Mintz */ 284fe56b9e6SYuval Mintz if (p_hwfn->mcp_info->mcp_hist != 285fe56b9e6SYuval Mintz qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { 286fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, "Rereading MCP offsets\n"); 287fe56b9e6SYuval Mintz qed_load_mcp_offsets(p_hwfn, p_ptt); 288fe56b9e6SYuval Mintz qed_mcp_cmd_port_init(p_hwfn, p_ptt); 289fe56b9e6SYuval Mintz } 290fe56b9e6SYuval Mintz seq = ++p_hwfn->mcp_info->drv_mb_seq; 291fe56b9e6SYuval Mintz 292fe56b9e6SYuval Mintz /* Set drv param */ 293fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_param, param); 294fe56b9e6SYuval Mintz 295fe56b9e6SYuval Mintz /* Set drv command along with the updated sequence */ 296fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, (cmd | seq)); 297fe56b9e6SYuval Mintz 298fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 299fe56b9e6SYuval Mintz "wrote command (%x) to MFW MB param 0x%08x\n", 300fe56b9e6SYuval Mintz (cmd | seq), param); 301fe56b9e6SYuval Mintz 302fe56b9e6SYuval Mintz do { 303fe56b9e6SYuval Mintz /* Wait for MFW response */ 304fe56b9e6SYuval Mintz udelay(delay); 305fe56b9e6SYuval Mintz *o_mcp_resp = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_header); 306fe56b9e6SYuval Mintz 307fe56b9e6SYuval Mintz /* Give the FW up to 5 second (500*10ms) */ 308fe56b9e6SYuval Mintz } while ((seq != (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) && 309fe56b9e6SYuval Mintz (cnt++ < QED_DRV_MB_MAX_RETRIES)); 310fe56b9e6SYuval Mintz 311fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 312fe56b9e6SYuval Mintz "[after %d ms] read (%x) seq is (%x) from FW MB\n", 313fe56b9e6SYuval Mintz cnt * delay, *o_mcp_resp, seq); 314fe56b9e6SYuval Mintz 315fe56b9e6SYuval Mintz /* Is this a reply to our command? */ 316fe56b9e6SYuval Mintz if (seq == (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) { 317fe56b9e6SYuval Mintz *o_mcp_resp &= FW_MSG_CODE_MASK; 318fe56b9e6SYuval Mintz /* Get the MCP param */ 319fe56b9e6SYuval Mintz *o_mcp_param = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_param); 320fe56b9e6SYuval Mintz } else { 321fe56b9e6SYuval Mintz /* FW BUG! */ 322fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MFW failed to respond!\n"); 323fe56b9e6SYuval Mintz *o_mcp_resp = 0; 324fe56b9e6SYuval Mintz rc = -EAGAIN; 325fe56b9e6SYuval Mintz } 326fe56b9e6SYuval Mintz return rc; 327fe56b9e6SYuval Mintz } 328fe56b9e6SYuval Mintz 3295529bad9STomer Tayar static int qed_mcp_cmd_and_union(struct qed_hwfn *p_hwfn, 330fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 3315529bad9STomer Tayar struct qed_mcp_mb_params *p_mb_params) 332fe56b9e6SYuval Mintz { 3335529bad9STomer Tayar u32 union_data_addr; 3345529bad9STomer Tayar int rc; 335fe56b9e6SYuval Mintz 336fe56b9e6SYuval Mintz /* MCP not initialized */ 337fe56b9e6SYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 338fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized !\n"); 339fe56b9e6SYuval Mintz return -EBUSY; 340fe56b9e6SYuval Mintz } 341fe56b9e6SYuval Mintz 3425529bad9STomer Tayar union_data_addr = p_hwfn->mcp_info->drv_mb_addr + 3435529bad9STomer Tayar offsetof(struct public_drv_mb, union_data); 3445529bad9STomer Tayar 3455529bad9STomer Tayar /* Ensure that only a single thread is accessing the mailbox at a 3465529bad9STomer Tayar * certain time. 347fe56b9e6SYuval Mintz */ 3485529bad9STomer Tayar rc = qed_mcp_mb_lock(p_hwfn, p_mb_params->cmd); 3495529bad9STomer Tayar if (rc) 3505529bad9STomer Tayar return rc; 3515529bad9STomer Tayar 3525529bad9STomer Tayar if (p_mb_params->p_data_src != NULL) 3535529bad9STomer Tayar qed_memcpy_to(p_hwfn, p_ptt, union_data_addr, 3545529bad9STomer Tayar p_mb_params->p_data_src, 3555529bad9STomer Tayar sizeof(*p_mb_params->p_data_src)); 3565529bad9STomer Tayar 3575529bad9STomer Tayar rc = qed_do_mcp_cmd(p_hwfn, p_ptt, p_mb_params->cmd, 3585529bad9STomer Tayar p_mb_params->param, &p_mb_params->mcp_resp, 3595529bad9STomer Tayar &p_mb_params->mcp_param); 3605529bad9STomer Tayar 3615529bad9STomer Tayar if (p_mb_params->p_data_dst != NULL) 3625529bad9STomer Tayar qed_memcpy_from(p_hwfn, p_ptt, p_mb_params->p_data_dst, 3635529bad9STomer Tayar union_data_addr, 3645529bad9STomer Tayar sizeof(*p_mb_params->p_data_dst)); 3655529bad9STomer Tayar 3665529bad9STomer Tayar qed_mcp_mb_unlock(p_hwfn, p_mb_params->cmd); 367fe56b9e6SYuval Mintz 368fe56b9e6SYuval Mintz return rc; 369fe56b9e6SYuval Mintz } 370fe56b9e6SYuval Mintz 3715529bad9STomer Tayar int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 3725529bad9STomer Tayar struct qed_ptt *p_ptt, 3735529bad9STomer Tayar u32 cmd, 3745529bad9STomer Tayar u32 param, 3755529bad9STomer Tayar u32 *o_mcp_resp, 3765529bad9STomer Tayar u32 *o_mcp_param) 377fe56b9e6SYuval Mintz { 3785529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 3795529bad9STomer Tayar int rc; 380fe56b9e6SYuval Mintz 3815529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 3825529bad9STomer Tayar mb_params.cmd = cmd; 3835529bad9STomer Tayar mb_params.param = param; 3845529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 3855529bad9STomer Tayar if (rc) 3865529bad9STomer Tayar return rc; 3875529bad9STomer Tayar 3885529bad9STomer Tayar *o_mcp_resp = mb_params.mcp_resp; 3895529bad9STomer Tayar *o_mcp_param = mb_params.mcp_param; 3905529bad9STomer Tayar 3915529bad9STomer Tayar return 0; 392fe56b9e6SYuval Mintz } 393fe56b9e6SYuval Mintz 394fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 3951a635e48SYuval Mintz struct qed_ptt *p_ptt, u32 *p_load_code) 396fe56b9e6SYuval Mintz { 397fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 3985529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 3995529bad9STomer Tayar union drv_union_data union_data; 400fe56b9e6SYuval Mintz int rc; 401fe56b9e6SYuval Mintz 4025529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 403fe56b9e6SYuval Mintz /* Load Request */ 4045529bad9STomer Tayar mb_params.cmd = DRV_MSG_CODE_LOAD_REQ; 4055529bad9STomer Tayar mb_params.param = PDA_COMP | DRV_ID_MCP_HSI_VER_CURRENT | 4065529bad9STomer Tayar cdev->drv_type; 4075529bad9STomer Tayar memcpy(&union_data.ver_str, cdev->ver_str, MCP_DRV_VER_STR_SIZE); 4085529bad9STomer Tayar mb_params.p_data_src = &union_data; 4095529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 410fe56b9e6SYuval Mintz 411fe56b9e6SYuval Mintz /* if mcp fails to respond we must abort */ 412fe56b9e6SYuval Mintz if (rc) { 413fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 414fe56b9e6SYuval Mintz return rc; 415fe56b9e6SYuval Mintz } 416fe56b9e6SYuval Mintz 4175529bad9STomer Tayar *p_load_code = mb_params.mcp_resp; 4185529bad9STomer Tayar 419fe56b9e6SYuval Mintz /* If MFW refused (e.g. other port is in diagnostic mode) we 420fe56b9e6SYuval Mintz * must abort. This can happen in the following cases: 421fe56b9e6SYuval Mintz * - Other port is in diagnostic mode 422fe56b9e6SYuval Mintz * - Previously loaded function on the engine is not compliant with 423fe56b9e6SYuval Mintz * the requester. 424fe56b9e6SYuval Mintz * - MFW cannot cope with the requester's DRV_MFW_HSI_VERSION. 425fe56b9e6SYuval Mintz * - 426fe56b9e6SYuval Mintz */ 427fe56b9e6SYuval Mintz if (!(*p_load_code) || 428fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_HSI) || 429fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_PDA) || 430fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_DIAG)) { 431fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP refused load request, aborting\n"); 432fe56b9e6SYuval Mintz return -EBUSY; 433fe56b9e6SYuval Mintz } 434fe56b9e6SYuval Mintz 435fe56b9e6SYuval Mintz return 0; 436fe56b9e6SYuval Mintz } 437fe56b9e6SYuval Mintz 4380b55e27dSYuval Mintz static void qed_mcp_handle_vf_flr(struct qed_hwfn *p_hwfn, 4390b55e27dSYuval Mintz struct qed_ptt *p_ptt) 4400b55e27dSYuval Mintz { 4410b55e27dSYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 4420b55e27dSYuval Mintz PUBLIC_PATH); 4430b55e27dSYuval Mintz u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr); 4440b55e27dSYuval Mintz u32 path_addr = SECTION_ADDR(mfw_path_offsize, 4450b55e27dSYuval Mintz QED_PATH_ID(p_hwfn)); 4460b55e27dSYuval Mintz u32 disabled_vfs[VF_MAX_STATIC / 32]; 4470b55e27dSYuval Mintz int i; 4480b55e27dSYuval Mintz 4490b55e27dSYuval Mintz DP_VERBOSE(p_hwfn, 4500b55e27dSYuval Mintz QED_MSG_SP, 4510b55e27dSYuval Mintz "Reading Disabled VF information from [offset %08x], path_addr %08x\n", 4520b55e27dSYuval Mintz mfw_path_offsize, path_addr); 4530b55e27dSYuval Mintz 4540b55e27dSYuval Mintz for (i = 0; i < (VF_MAX_STATIC / 32); i++) { 4550b55e27dSYuval Mintz disabled_vfs[i] = qed_rd(p_hwfn, p_ptt, 4560b55e27dSYuval Mintz path_addr + 4570b55e27dSYuval Mintz offsetof(struct public_path, 4580b55e27dSYuval Mintz mcp_vf_disabled) + 4590b55e27dSYuval Mintz sizeof(u32) * i); 4600b55e27dSYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_SP | QED_MSG_IOV), 4610b55e27dSYuval Mintz "FLR-ed VFs [%08x,...,%08x] - %08x\n", 4620b55e27dSYuval Mintz i * 32, (i + 1) * 32 - 1, disabled_vfs[i]); 4630b55e27dSYuval Mintz } 4640b55e27dSYuval Mintz 4650b55e27dSYuval Mintz if (qed_iov_mark_vf_flr(p_hwfn, disabled_vfs)) 4660b55e27dSYuval Mintz qed_schedule_iov(p_hwfn, QED_IOV_WQ_FLR_FLAG); 4670b55e27dSYuval Mintz } 4680b55e27dSYuval Mintz 4690b55e27dSYuval Mintz int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn, 4700b55e27dSYuval Mintz struct qed_ptt *p_ptt, u32 *vfs_to_ack) 4710b55e27dSYuval Mintz { 4720b55e27dSYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 4730b55e27dSYuval Mintz PUBLIC_FUNC); 4740b55e27dSYuval Mintz u32 mfw_func_offsize = qed_rd(p_hwfn, p_ptt, addr); 4750b55e27dSYuval Mintz u32 func_addr = SECTION_ADDR(mfw_func_offsize, 4760b55e27dSYuval Mintz MCP_PF_ID(p_hwfn)); 4770b55e27dSYuval Mintz struct qed_mcp_mb_params mb_params; 4780b55e27dSYuval Mintz union drv_union_data union_data; 4790b55e27dSYuval Mintz int rc; 4800b55e27dSYuval Mintz int i; 4810b55e27dSYuval Mintz 4820b55e27dSYuval Mintz for (i = 0; i < (VF_MAX_STATIC / 32); i++) 4830b55e27dSYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_SP | QED_MSG_IOV), 4840b55e27dSYuval Mintz "Acking VFs [%08x,...,%08x] - %08x\n", 4850b55e27dSYuval Mintz i * 32, (i + 1) * 32 - 1, vfs_to_ack[i]); 4860b55e27dSYuval Mintz 4870b55e27dSYuval Mintz memset(&mb_params, 0, sizeof(mb_params)); 4880b55e27dSYuval Mintz mb_params.cmd = DRV_MSG_CODE_VF_DISABLED_DONE; 4890b55e27dSYuval Mintz memcpy(&union_data.ack_vf_disabled, vfs_to_ack, VF_MAX_STATIC / 8); 4900b55e27dSYuval Mintz mb_params.p_data_src = &union_data; 4910b55e27dSYuval Mintz rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 4920b55e27dSYuval Mintz if (rc) { 4930b55e27dSYuval Mintz DP_NOTICE(p_hwfn, "Failed to pass ACK for VF flr to MFW\n"); 4940b55e27dSYuval Mintz return -EBUSY; 4950b55e27dSYuval Mintz } 4960b55e27dSYuval Mintz 4970b55e27dSYuval Mintz /* Clear the ACK bits */ 4980b55e27dSYuval Mintz for (i = 0; i < (VF_MAX_STATIC / 32); i++) 4990b55e27dSYuval Mintz qed_wr(p_hwfn, p_ptt, 5000b55e27dSYuval Mintz func_addr + 5010b55e27dSYuval Mintz offsetof(struct public_func, drv_ack_vf_disabled) + 5020b55e27dSYuval Mintz i * sizeof(u32), 0); 5030b55e27dSYuval Mintz 5040b55e27dSYuval Mintz return rc; 5050b55e27dSYuval Mintz } 5060b55e27dSYuval Mintz 507334c03b5SZvi Nachmani static void qed_mcp_handle_transceiver_change(struct qed_hwfn *p_hwfn, 508334c03b5SZvi Nachmani struct qed_ptt *p_ptt) 509334c03b5SZvi Nachmani { 510334c03b5SZvi Nachmani u32 transceiver_state; 511334c03b5SZvi Nachmani 512334c03b5SZvi Nachmani transceiver_state = qed_rd(p_hwfn, p_ptt, 513334c03b5SZvi Nachmani p_hwfn->mcp_info->port_addr + 514334c03b5SZvi Nachmani offsetof(struct public_port, 515334c03b5SZvi Nachmani transceiver_data)); 516334c03b5SZvi Nachmani 517334c03b5SZvi Nachmani DP_VERBOSE(p_hwfn, 518334c03b5SZvi Nachmani (NETIF_MSG_HW | QED_MSG_SP), 519334c03b5SZvi Nachmani "Received transceiver state update [0x%08x] from mfw [Addr 0x%x]\n", 520334c03b5SZvi Nachmani transceiver_state, 521334c03b5SZvi Nachmani (u32)(p_hwfn->mcp_info->port_addr + 5221a635e48SYuval Mintz offsetof(struct public_port, transceiver_data))); 523334c03b5SZvi Nachmani 524334c03b5SZvi Nachmani transceiver_state = GET_FIELD(transceiver_state, 525351a4dedSYuval Mintz ETH_TRANSCEIVER_STATE); 526334c03b5SZvi Nachmani 527351a4dedSYuval Mintz if (transceiver_state == ETH_TRANSCEIVER_STATE_PRESENT) 528334c03b5SZvi Nachmani DP_NOTICE(p_hwfn, "Transceiver is present.\n"); 529334c03b5SZvi Nachmani else 530334c03b5SZvi Nachmani DP_NOTICE(p_hwfn, "Transceiver is unplugged.\n"); 531334c03b5SZvi Nachmani } 532334c03b5SZvi Nachmani 533cc875c2eSYuval Mintz static void qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn, 5341a635e48SYuval Mintz struct qed_ptt *p_ptt, bool b_reset) 535cc875c2eSYuval Mintz { 536cc875c2eSYuval Mintz struct qed_mcp_link_state *p_link; 537a64b02d5SManish Chopra u8 max_bw, min_bw; 538cc875c2eSYuval Mintz u32 status = 0; 539cc875c2eSYuval Mintz 540cc875c2eSYuval Mintz p_link = &p_hwfn->mcp_info->link_output; 541cc875c2eSYuval Mintz memset(p_link, 0, sizeof(*p_link)); 542cc875c2eSYuval Mintz if (!b_reset) { 543cc875c2eSYuval Mintz status = qed_rd(p_hwfn, p_ptt, 544cc875c2eSYuval Mintz p_hwfn->mcp_info->port_addr + 545cc875c2eSYuval Mintz offsetof(struct public_port, link_status)); 546cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, (NETIF_MSG_LINK | QED_MSG_SP), 547cc875c2eSYuval Mintz "Received link update [0x%08x] from mfw [Addr 0x%x]\n", 548cc875c2eSYuval Mintz status, 549cc875c2eSYuval Mintz (u32)(p_hwfn->mcp_info->port_addr + 5501a635e48SYuval Mintz offsetof(struct public_port, link_status))); 551cc875c2eSYuval Mintz } else { 552cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 553cc875c2eSYuval Mintz "Resetting link indications\n"); 554cc875c2eSYuval Mintz return; 555cc875c2eSYuval Mintz } 556cc875c2eSYuval Mintz 557fc916ff2SSudarsana Reddy Kalluru if (p_hwfn->b_drv_link_init) 558cc875c2eSYuval Mintz p_link->link_up = !!(status & LINK_STATUS_LINK_UP); 559fc916ff2SSudarsana Reddy Kalluru else 560fc916ff2SSudarsana Reddy Kalluru p_link->link_up = false; 561cc875c2eSYuval Mintz 562cc875c2eSYuval Mintz p_link->full_duplex = true; 563cc875c2eSYuval Mintz switch ((status & LINK_STATUS_SPEED_AND_DUPLEX_MASK)) { 564cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_100G: 565cc875c2eSYuval Mintz p_link->speed = 100000; 566cc875c2eSYuval Mintz break; 567cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_50G: 568cc875c2eSYuval Mintz p_link->speed = 50000; 569cc875c2eSYuval Mintz break; 570cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_40G: 571cc875c2eSYuval Mintz p_link->speed = 40000; 572cc875c2eSYuval Mintz break; 573cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_25G: 574cc875c2eSYuval Mintz p_link->speed = 25000; 575cc875c2eSYuval Mintz break; 576cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_20G: 577cc875c2eSYuval Mintz p_link->speed = 20000; 578cc875c2eSYuval Mintz break; 579cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_10G: 580cc875c2eSYuval Mintz p_link->speed = 10000; 581cc875c2eSYuval Mintz break; 582cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_1000THD: 583cc875c2eSYuval Mintz p_link->full_duplex = false; 584cc875c2eSYuval Mintz /* Fall-through */ 585cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_1000TFD: 586cc875c2eSYuval Mintz p_link->speed = 1000; 587cc875c2eSYuval Mintz break; 588cc875c2eSYuval Mintz default: 589cc875c2eSYuval Mintz p_link->speed = 0; 590cc875c2eSYuval Mintz } 591cc875c2eSYuval Mintz 5924b01e519SManish Chopra if (p_link->link_up && p_link->speed) 5934b01e519SManish Chopra p_link->line_speed = p_link->speed; 5944b01e519SManish Chopra else 5954b01e519SManish Chopra p_link->line_speed = 0; 5964b01e519SManish Chopra 5974b01e519SManish Chopra max_bw = p_hwfn->mcp_info->func_info.bandwidth_max; 598a64b02d5SManish Chopra min_bw = p_hwfn->mcp_info->func_info.bandwidth_min; 5994b01e519SManish Chopra 600a64b02d5SManish Chopra /* Max bandwidth configuration */ 6014b01e519SManish Chopra __qed_configure_pf_max_bandwidth(p_hwfn, p_ptt, p_link, max_bw); 602cc875c2eSYuval Mintz 603a64b02d5SManish Chopra /* Min bandwidth configuration */ 604a64b02d5SManish Chopra __qed_configure_pf_min_bandwidth(p_hwfn, p_ptt, p_link, min_bw); 605a64b02d5SManish Chopra qed_configure_vp_wfq_on_link_change(p_hwfn->cdev, p_link->min_pf_rate); 606a64b02d5SManish Chopra 607cc875c2eSYuval Mintz p_link->an = !!(status & LINK_STATUS_AUTO_NEGOTIATE_ENABLED); 608cc875c2eSYuval Mintz p_link->an_complete = !!(status & 609cc875c2eSYuval Mintz LINK_STATUS_AUTO_NEGOTIATE_COMPLETE); 610cc875c2eSYuval Mintz p_link->parallel_detection = !!(status & 611cc875c2eSYuval Mintz LINK_STATUS_PARALLEL_DETECTION_USED); 612cc875c2eSYuval Mintz p_link->pfc_enabled = !!(status & LINK_STATUS_PFC_ENABLED); 613cc875c2eSYuval Mintz 614cc875c2eSYuval Mintz p_link->partner_adv_speed |= 615cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE) ? 616cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_1G_FD : 0; 617cc875c2eSYuval Mintz p_link->partner_adv_speed |= 618cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE) ? 619cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_1G_HD : 0; 620cc875c2eSYuval Mintz p_link->partner_adv_speed |= 621cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_10G_CAPABLE) ? 622cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_10G : 0; 623cc875c2eSYuval Mintz p_link->partner_adv_speed |= 624cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_20G_CAPABLE) ? 625cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_20G : 0; 626cc875c2eSYuval Mintz p_link->partner_adv_speed |= 627054c67d1SSudarsana Reddy Kalluru (status & LINK_STATUS_LINK_PARTNER_25G_CAPABLE) ? 628054c67d1SSudarsana Reddy Kalluru QED_LINK_PARTNER_SPEED_25G : 0; 629054c67d1SSudarsana Reddy Kalluru p_link->partner_adv_speed |= 630cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_40G_CAPABLE) ? 631cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_40G : 0; 632cc875c2eSYuval Mintz p_link->partner_adv_speed |= 633cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_50G_CAPABLE) ? 634cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_50G : 0; 635cc875c2eSYuval Mintz p_link->partner_adv_speed |= 636cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_100G_CAPABLE) ? 637cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_100G : 0; 638cc875c2eSYuval Mintz 639cc875c2eSYuval Mintz p_link->partner_tx_flow_ctrl_en = 640cc875c2eSYuval Mintz !!(status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED); 641cc875c2eSYuval Mintz p_link->partner_rx_flow_ctrl_en = 642cc875c2eSYuval Mintz !!(status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED); 643cc875c2eSYuval Mintz 644cc875c2eSYuval Mintz switch (status & LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK) { 645cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE: 646cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_SYMMETRIC_PAUSE; 647cc875c2eSYuval Mintz break; 648cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE: 649cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_ASYMMETRIC_PAUSE; 650cc875c2eSYuval Mintz break; 651cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_BOTH_PAUSE: 652cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_BOTH_PAUSE; 653cc875c2eSYuval Mintz break; 654cc875c2eSYuval Mintz default: 655cc875c2eSYuval Mintz p_link->partner_adv_pause = 0; 656cc875c2eSYuval Mintz } 657cc875c2eSYuval Mintz 658cc875c2eSYuval Mintz p_link->sfp_tx_fault = !!(status & LINK_STATUS_SFP_TX_FAULT); 659cc875c2eSYuval Mintz 660cc875c2eSYuval Mintz qed_link_update(p_hwfn); 661cc875c2eSYuval Mintz } 662cc875c2eSYuval Mintz 663351a4dedSYuval Mintz int qed_mcp_set_link(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool b_up) 664cc875c2eSYuval Mintz { 665cc875c2eSYuval Mintz struct qed_mcp_link_params *params = &p_hwfn->mcp_info->link_input; 6665529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 6675529bad9STomer Tayar union drv_union_data union_data; 668351a4dedSYuval Mintz struct eth_phy_cfg *phy_cfg; 669cc875c2eSYuval Mintz int rc = 0; 6705529bad9STomer Tayar u32 cmd; 671cc875c2eSYuval Mintz 672cc875c2eSYuval Mintz /* Set the shmem configuration according to params */ 6735529bad9STomer Tayar phy_cfg = &union_data.drv_phy_cfg; 6745529bad9STomer Tayar memset(phy_cfg, 0, sizeof(*phy_cfg)); 675cc875c2eSYuval Mintz cmd = b_up ? DRV_MSG_CODE_INIT_PHY : DRV_MSG_CODE_LINK_RESET; 676cc875c2eSYuval Mintz if (!params->speed.autoneg) 6775529bad9STomer Tayar phy_cfg->speed = params->speed.forced_speed; 678351a4dedSYuval Mintz phy_cfg->pause |= (params->pause.autoneg) ? ETH_PAUSE_AUTONEG : 0; 679351a4dedSYuval Mintz phy_cfg->pause |= (params->pause.forced_rx) ? ETH_PAUSE_RX : 0; 680351a4dedSYuval Mintz phy_cfg->pause |= (params->pause.forced_tx) ? ETH_PAUSE_TX : 0; 6815529bad9STomer Tayar phy_cfg->adv_speed = params->speed.advertised_speeds; 6825529bad9STomer Tayar phy_cfg->loopback_mode = params->loopback_mode; 683cc875c2eSYuval Mintz 684fc916ff2SSudarsana Reddy Kalluru p_hwfn->b_drv_link_init = b_up; 685fc916ff2SSudarsana Reddy Kalluru 686cc875c2eSYuval Mintz if (b_up) { 687cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 688cc875c2eSYuval Mintz "Configuring Link: Speed 0x%08x, Pause 0x%08x, adv_speed 0x%08x, loopback 0x%08x, features 0x%08x\n", 6895529bad9STomer Tayar phy_cfg->speed, 6905529bad9STomer Tayar phy_cfg->pause, 6915529bad9STomer Tayar phy_cfg->adv_speed, 6925529bad9STomer Tayar phy_cfg->loopback_mode, 6935529bad9STomer Tayar phy_cfg->feature_config_flags); 694cc875c2eSYuval Mintz } else { 695cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 696cc875c2eSYuval Mintz "Resetting link\n"); 697cc875c2eSYuval Mintz } 698cc875c2eSYuval Mintz 6995529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 7005529bad9STomer Tayar mb_params.cmd = cmd; 7015529bad9STomer Tayar mb_params.p_data_src = &union_data; 7025529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 703cc875c2eSYuval Mintz 704cc875c2eSYuval Mintz /* if mcp fails to respond we must abort */ 705cc875c2eSYuval Mintz if (rc) { 706cc875c2eSYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 707cc875c2eSYuval Mintz return rc; 708cc875c2eSYuval Mintz } 709cc875c2eSYuval Mintz 710cc875c2eSYuval Mintz /* Reset the link status if needed */ 711cc875c2eSYuval Mintz if (!b_up) 712cc875c2eSYuval Mintz qed_mcp_handle_link_change(p_hwfn, p_ptt, true); 713cc875c2eSYuval Mintz 714cc875c2eSYuval Mintz return 0; 715cc875c2eSYuval Mintz } 716cc875c2eSYuval Mintz 7174b01e519SManish Chopra static void qed_read_pf_bandwidth(struct qed_hwfn *p_hwfn, 7184b01e519SManish Chopra struct public_func *p_shmem_info) 7194b01e519SManish Chopra { 7204b01e519SManish Chopra struct qed_mcp_function_info *p_info; 7214b01e519SManish Chopra 7224b01e519SManish Chopra p_info = &p_hwfn->mcp_info->func_info; 7234b01e519SManish Chopra 7244b01e519SManish Chopra p_info->bandwidth_min = (p_shmem_info->config & 7254b01e519SManish Chopra FUNC_MF_CFG_MIN_BW_MASK) >> 7264b01e519SManish Chopra FUNC_MF_CFG_MIN_BW_SHIFT; 7274b01e519SManish Chopra if (p_info->bandwidth_min < 1 || p_info->bandwidth_min > 100) { 7284b01e519SManish Chopra DP_INFO(p_hwfn, 7294b01e519SManish Chopra "bandwidth minimum out of bounds [%02x]. Set to 1\n", 7304b01e519SManish Chopra p_info->bandwidth_min); 7314b01e519SManish Chopra p_info->bandwidth_min = 1; 7324b01e519SManish Chopra } 7334b01e519SManish Chopra 7344b01e519SManish Chopra p_info->bandwidth_max = (p_shmem_info->config & 7354b01e519SManish Chopra FUNC_MF_CFG_MAX_BW_MASK) >> 7364b01e519SManish Chopra FUNC_MF_CFG_MAX_BW_SHIFT; 7374b01e519SManish Chopra if (p_info->bandwidth_max < 1 || p_info->bandwidth_max > 100) { 7384b01e519SManish Chopra DP_INFO(p_hwfn, 7394b01e519SManish Chopra "bandwidth maximum out of bounds [%02x]. Set to 100\n", 7404b01e519SManish Chopra p_info->bandwidth_max); 7414b01e519SManish Chopra p_info->bandwidth_max = 100; 7424b01e519SManish Chopra } 7434b01e519SManish Chopra } 7444b01e519SManish Chopra 7454b01e519SManish Chopra static u32 qed_mcp_get_shmem_func(struct qed_hwfn *p_hwfn, 7464b01e519SManish Chopra struct qed_ptt *p_ptt, 7471a635e48SYuval Mintz struct public_func *p_data, int pfid) 7484b01e519SManish Chopra { 7494b01e519SManish Chopra u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 7504b01e519SManish Chopra PUBLIC_FUNC); 7514b01e519SManish Chopra u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr); 7524b01e519SManish Chopra u32 func_addr = SECTION_ADDR(mfw_path_offsize, pfid); 7534b01e519SManish Chopra u32 i, size; 7544b01e519SManish Chopra 7554b01e519SManish Chopra memset(p_data, 0, sizeof(*p_data)); 7564b01e519SManish Chopra 7571a635e48SYuval Mintz size = min_t(u32, sizeof(*p_data), QED_SECTION_SIZE(mfw_path_offsize)); 7584b01e519SManish Chopra for (i = 0; i < size / sizeof(u32); i++) 7594b01e519SManish Chopra ((u32 *)p_data)[i] = qed_rd(p_hwfn, p_ptt, 7604b01e519SManish Chopra func_addr + (i << 2)); 7614b01e519SManish Chopra return size; 7624b01e519SManish Chopra } 7634b01e519SManish Chopra 764351a4dedSYuval Mintz int qed_hw_init_first_eth(struct qed_hwfn *p_hwfn, 765351a4dedSYuval Mintz struct qed_ptt *p_ptt, u8 *p_pf) 766351a4dedSYuval Mintz { 767351a4dedSYuval Mintz struct public_func shmem_info; 768351a4dedSYuval Mintz int i; 769351a4dedSYuval Mintz 770351a4dedSYuval Mintz /* Find first Ethernet interface in port */ 771351a4dedSYuval Mintz for (i = 0; i < NUM_OF_ENG_PFS(p_hwfn->cdev); 772351a4dedSYuval Mintz i += p_hwfn->cdev->num_ports_in_engines) { 773351a4dedSYuval Mintz qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, 774351a4dedSYuval Mintz MCP_PF_ID_BY_REL(p_hwfn, i)); 775351a4dedSYuval Mintz 776351a4dedSYuval Mintz if (shmem_info.config & FUNC_MF_CFG_FUNC_HIDE) 777351a4dedSYuval Mintz continue; 778351a4dedSYuval Mintz 779351a4dedSYuval Mintz if ((shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK) == 780351a4dedSYuval Mintz FUNC_MF_CFG_PROTOCOL_ETHERNET) { 781351a4dedSYuval Mintz *p_pf = (u8)i; 782351a4dedSYuval Mintz return 0; 783351a4dedSYuval Mintz } 784351a4dedSYuval Mintz } 785351a4dedSYuval Mintz 786351a4dedSYuval Mintz DP_NOTICE(p_hwfn, 787351a4dedSYuval Mintz "Failed to find on port an ethernet interface in MF_SI mode\n"); 788351a4dedSYuval Mintz 789351a4dedSYuval Mintz return -EINVAL; 790351a4dedSYuval Mintz } 791351a4dedSYuval Mintz 7921a635e48SYuval Mintz static void qed_mcp_update_bw(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 7934b01e519SManish Chopra { 7944b01e519SManish Chopra struct qed_mcp_function_info *p_info; 7954b01e519SManish Chopra struct public_func shmem_info; 7964b01e519SManish Chopra u32 resp = 0, param = 0; 7974b01e519SManish Chopra 7981a635e48SYuval Mintz qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, MCP_PF_ID(p_hwfn)); 7994b01e519SManish Chopra 8004b01e519SManish Chopra qed_read_pf_bandwidth(p_hwfn, &shmem_info); 8014b01e519SManish Chopra 8024b01e519SManish Chopra p_info = &p_hwfn->mcp_info->func_info; 8034b01e519SManish Chopra 804a64b02d5SManish Chopra qed_configure_pf_min_bandwidth(p_hwfn->cdev, p_info->bandwidth_min); 8054b01e519SManish Chopra qed_configure_pf_max_bandwidth(p_hwfn->cdev, p_info->bandwidth_max); 8064b01e519SManish Chopra 8074b01e519SManish Chopra /* Acknowledge the MFW */ 8084b01e519SManish Chopra qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BW_UPDATE_ACK, 0, &resp, 8094b01e519SManish Chopra ¶m); 8104b01e519SManish Chopra } 8114b01e519SManish Chopra 812cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 813cc875c2eSYuval Mintz struct qed_ptt *p_ptt) 814cc875c2eSYuval Mintz { 815cc875c2eSYuval Mintz struct qed_mcp_info *info = p_hwfn->mcp_info; 816cc875c2eSYuval Mintz int rc = 0; 817cc875c2eSYuval Mintz bool found = false; 818cc875c2eSYuval Mintz u16 i; 819cc875c2eSYuval Mintz 820cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, "Received message from MFW\n"); 821cc875c2eSYuval Mintz 822cc875c2eSYuval Mintz /* Read Messages from MFW */ 823cc875c2eSYuval Mintz qed_mcp_read_mb(p_hwfn, p_ptt); 824cc875c2eSYuval Mintz 825cc875c2eSYuval Mintz /* Compare current messages to old ones */ 826cc875c2eSYuval Mintz for (i = 0; i < info->mfw_mb_length; i++) { 827cc875c2eSYuval Mintz if (info->mfw_mb_cur[i] == info->mfw_mb_shadow[i]) 828cc875c2eSYuval Mintz continue; 829cc875c2eSYuval Mintz 830cc875c2eSYuval Mintz found = true; 831cc875c2eSYuval Mintz 832cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 833cc875c2eSYuval Mintz "Msg [%d] - old CMD 0x%02x, new CMD 0x%02x\n", 834cc875c2eSYuval Mintz i, info->mfw_mb_shadow[i], info->mfw_mb_cur[i]); 835cc875c2eSYuval Mintz 836cc875c2eSYuval Mintz switch (i) { 837cc875c2eSYuval Mintz case MFW_DRV_MSG_LINK_CHANGE: 838cc875c2eSYuval Mintz qed_mcp_handle_link_change(p_hwfn, p_ptt, false); 839cc875c2eSYuval Mintz break; 8400b55e27dSYuval Mintz case MFW_DRV_MSG_VF_DISABLED: 8410b55e27dSYuval Mintz qed_mcp_handle_vf_flr(p_hwfn, p_ptt); 8420b55e27dSYuval Mintz break; 84339651abdSSudarsana Reddy Kalluru case MFW_DRV_MSG_LLDP_DATA_UPDATED: 84439651abdSSudarsana Reddy Kalluru qed_dcbx_mib_update_event(p_hwfn, p_ptt, 84539651abdSSudarsana Reddy Kalluru QED_DCBX_REMOTE_LLDP_MIB); 84639651abdSSudarsana Reddy Kalluru break; 84739651abdSSudarsana Reddy Kalluru case MFW_DRV_MSG_DCBX_REMOTE_MIB_UPDATED: 84839651abdSSudarsana Reddy Kalluru qed_dcbx_mib_update_event(p_hwfn, p_ptt, 84939651abdSSudarsana Reddy Kalluru QED_DCBX_REMOTE_MIB); 85039651abdSSudarsana Reddy Kalluru break; 85139651abdSSudarsana Reddy Kalluru case MFW_DRV_MSG_DCBX_OPERATIONAL_MIB_UPDATED: 85239651abdSSudarsana Reddy Kalluru qed_dcbx_mib_update_event(p_hwfn, p_ptt, 85339651abdSSudarsana Reddy Kalluru QED_DCBX_OPERATIONAL_MIB); 85439651abdSSudarsana Reddy Kalluru break; 855334c03b5SZvi Nachmani case MFW_DRV_MSG_TRANSCEIVER_STATE_CHANGE: 856334c03b5SZvi Nachmani qed_mcp_handle_transceiver_change(p_hwfn, p_ptt); 857334c03b5SZvi Nachmani break; 8584b01e519SManish Chopra case MFW_DRV_MSG_BW_UPDATE: 8594b01e519SManish Chopra qed_mcp_update_bw(p_hwfn, p_ptt); 8604b01e519SManish Chopra break; 861cc875c2eSYuval Mintz default: 862cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, "Unimplemented MFW message %d\n", i); 863cc875c2eSYuval Mintz rc = -EINVAL; 864cc875c2eSYuval Mintz } 865cc875c2eSYuval Mintz } 866cc875c2eSYuval Mintz 867cc875c2eSYuval Mintz /* ACK everything */ 868cc875c2eSYuval Mintz for (i = 0; i < MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length); i++) { 869cc875c2eSYuval Mintz __be32 val = cpu_to_be32(((u32 *)info->mfw_mb_cur)[i]); 870cc875c2eSYuval Mintz 871cc875c2eSYuval Mintz /* MFW expect answer in BE, so we force write in that format */ 872cc875c2eSYuval Mintz qed_wr(p_hwfn, p_ptt, 873cc875c2eSYuval Mintz info->mfw_mb_addr + sizeof(u32) + 874cc875c2eSYuval Mintz MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length) * 875cc875c2eSYuval Mintz sizeof(u32) + i * sizeof(u32), 876cc875c2eSYuval Mintz (__force u32)val); 877cc875c2eSYuval Mintz } 878cc875c2eSYuval Mintz 879cc875c2eSYuval Mintz if (!found) { 880cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, 881cc875c2eSYuval Mintz "Received an MFW message indication but no new message!\n"); 882cc875c2eSYuval Mintz rc = -EINVAL; 883cc875c2eSYuval Mintz } 884cc875c2eSYuval Mintz 885cc875c2eSYuval Mintz /* Copy the new mfw messages into the shadow */ 886cc875c2eSYuval Mintz memcpy(info->mfw_mb_shadow, info->mfw_mb_cur, info->mfw_mb_length); 887cc875c2eSYuval Mintz 888cc875c2eSYuval Mintz return rc; 889cc875c2eSYuval Mintz } 890cc875c2eSYuval Mintz 8911408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, 8921408cc1fSYuval Mintz struct qed_ptt *p_ptt, 8931408cc1fSYuval Mintz u32 *p_mfw_ver, u32 *p_running_bundle_id) 894fe56b9e6SYuval Mintz { 895fe56b9e6SYuval Mintz u32 global_offsize; 896fe56b9e6SYuval Mintz 8971408cc1fSYuval Mintz if (IS_VF(p_hwfn->cdev)) { 8981408cc1fSYuval Mintz if (p_hwfn->vf_iov_info) { 8991408cc1fSYuval Mintz struct pfvf_acquire_resp_tlv *p_resp; 9001408cc1fSYuval Mintz 9011408cc1fSYuval Mintz p_resp = &p_hwfn->vf_iov_info->acquire_resp; 9021408cc1fSYuval Mintz *p_mfw_ver = p_resp->pfdev_info.mfw_ver; 9031408cc1fSYuval Mintz return 0; 9041408cc1fSYuval Mintz } else { 9051408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, 9061408cc1fSYuval Mintz QED_MSG_IOV, 9071408cc1fSYuval Mintz "VF requested MFW version prior to ACQUIRE\n"); 9081408cc1fSYuval Mintz return -EINVAL; 9091408cc1fSYuval Mintz } 9101408cc1fSYuval Mintz } 911fe56b9e6SYuval Mintz 912fe56b9e6SYuval Mintz global_offsize = qed_rd(p_hwfn, p_ptt, 9131408cc1fSYuval Mintz SECTION_OFFSIZE_ADDR(p_hwfn-> 9141408cc1fSYuval Mintz mcp_info->public_base, 915fe56b9e6SYuval Mintz PUBLIC_GLOBAL)); 9161408cc1fSYuval Mintz *p_mfw_ver = 9171408cc1fSYuval Mintz qed_rd(p_hwfn, p_ptt, 9181408cc1fSYuval Mintz SECTION_ADDR(global_offsize, 9191408cc1fSYuval Mintz 0) + offsetof(struct public_global, mfw_ver)); 920fe56b9e6SYuval Mintz 9211408cc1fSYuval Mintz if (p_running_bundle_id != NULL) { 9221408cc1fSYuval Mintz *p_running_bundle_id = qed_rd(p_hwfn, p_ptt, 9231408cc1fSYuval Mintz SECTION_ADDR(global_offsize, 0) + 9241408cc1fSYuval Mintz offsetof(struct public_global, 9251408cc1fSYuval Mintz running_bundle_id)); 9261408cc1fSYuval Mintz } 927fe56b9e6SYuval Mintz 928fe56b9e6SYuval Mintz return 0; 929fe56b9e6SYuval Mintz } 930fe56b9e6SYuval Mintz 9311a635e48SYuval Mintz int qed_mcp_get_media_type(struct qed_dev *cdev, u32 *p_media_type) 932cc875c2eSYuval Mintz { 933cc875c2eSYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[0]; 934cc875c2eSYuval Mintz struct qed_ptt *p_ptt; 935cc875c2eSYuval Mintz 9361408cc1fSYuval Mintz if (IS_VF(cdev)) 9371408cc1fSYuval Mintz return -EINVAL; 9381408cc1fSYuval Mintz 939cc875c2eSYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 940cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized !\n"); 941cc875c2eSYuval Mintz return -EBUSY; 942cc875c2eSYuval Mintz } 943cc875c2eSYuval Mintz 944cc875c2eSYuval Mintz *p_media_type = MEDIA_UNSPECIFIED; 945cc875c2eSYuval Mintz 946cc875c2eSYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn); 947cc875c2eSYuval Mintz if (!p_ptt) 948cc875c2eSYuval Mintz return -EBUSY; 949cc875c2eSYuval Mintz 950cc875c2eSYuval Mintz *p_media_type = qed_rd(p_hwfn, p_ptt, p_hwfn->mcp_info->port_addr + 951cc875c2eSYuval Mintz offsetof(struct public_port, media_type)); 952cc875c2eSYuval Mintz 953cc875c2eSYuval Mintz qed_ptt_release(p_hwfn, p_ptt); 954cc875c2eSYuval Mintz 955cc875c2eSYuval Mintz return 0; 956cc875c2eSYuval Mintz } 957cc875c2eSYuval Mintz 958fe56b9e6SYuval Mintz static int 959fe56b9e6SYuval Mintz qed_mcp_get_shmem_proto(struct qed_hwfn *p_hwfn, 960fe56b9e6SYuval Mintz struct public_func *p_info, 961fe56b9e6SYuval Mintz enum qed_pci_personality *p_proto) 962fe56b9e6SYuval Mintz { 963fe56b9e6SYuval Mintz int rc = 0; 964fe56b9e6SYuval Mintz 965fe56b9e6SYuval Mintz switch (p_info->config & FUNC_MF_CFG_PROTOCOL_MASK) { 966fe56b9e6SYuval Mintz case FUNC_MF_CFG_PROTOCOL_ETHERNET: 967c5ac9319SYuval Mintz if (test_bit(QED_DEV_CAP_ROCE, 968c5ac9319SYuval Mintz &p_hwfn->hw_info.device_capabilities)) 969c5ac9319SYuval Mintz *p_proto = QED_PCI_ETH_ROCE; 970c5ac9319SYuval Mintz else 971fe56b9e6SYuval Mintz *p_proto = QED_PCI_ETH; 972fe56b9e6SYuval Mintz break; 973c5ac9319SYuval Mintz case FUNC_MF_CFG_PROTOCOL_ISCSI: 974c5ac9319SYuval Mintz *p_proto = QED_PCI_ISCSI; 975c5ac9319SYuval Mintz break; 976c5ac9319SYuval Mintz case FUNC_MF_CFG_PROTOCOL_ROCE: 977c5ac9319SYuval Mintz DP_NOTICE(p_hwfn, "RoCE personality is not a valid value!\n"); 978c5ac9319SYuval Mintz rc = -EINVAL; 979c5ac9319SYuval Mintz break; 980fe56b9e6SYuval Mintz default: 981fe56b9e6SYuval Mintz rc = -EINVAL; 982fe56b9e6SYuval Mintz } 983fe56b9e6SYuval Mintz 984fe56b9e6SYuval Mintz return rc; 985fe56b9e6SYuval Mintz } 986fe56b9e6SYuval Mintz 987fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 988fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 989fe56b9e6SYuval Mintz { 990fe56b9e6SYuval Mintz struct qed_mcp_function_info *info; 991fe56b9e6SYuval Mintz struct public_func shmem_info; 992fe56b9e6SYuval Mintz 9931a635e48SYuval Mintz qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, MCP_PF_ID(p_hwfn)); 994fe56b9e6SYuval Mintz info = &p_hwfn->mcp_info->func_info; 995fe56b9e6SYuval Mintz 996fe56b9e6SYuval Mintz info->pause_on_host = (shmem_info.config & 997fe56b9e6SYuval Mintz FUNC_MF_CFG_PAUSE_ON_HOST_RING) ? 1 : 0; 998fe56b9e6SYuval Mintz 9991a635e48SYuval Mintz if (qed_mcp_get_shmem_proto(p_hwfn, &shmem_info, &info->protocol)) { 1000fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Unknown personality %08x\n", 1001fe56b9e6SYuval Mintz (u32)(shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK)); 1002fe56b9e6SYuval Mintz return -EINVAL; 1003fe56b9e6SYuval Mintz } 1004fe56b9e6SYuval Mintz 10054b01e519SManish Chopra qed_read_pf_bandwidth(p_hwfn, &shmem_info); 1006fe56b9e6SYuval Mintz 1007fe56b9e6SYuval Mintz if (shmem_info.mac_upper || shmem_info.mac_lower) { 1008fe56b9e6SYuval Mintz info->mac[0] = (u8)(shmem_info.mac_upper >> 8); 1009fe56b9e6SYuval Mintz info->mac[1] = (u8)(shmem_info.mac_upper); 1010fe56b9e6SYuval Mintz info->mac[2] = (u8)(shmem_info.mac_lower >> 24); 1011fe56b9e6SYuval Mintz info->mac[3] = (u8)(shmem_info.mac_lower >> 16); 1012fe56b9e6SYuval Mintz info->mac[4] = (u8)(shmem_info.mac_lower >> 8); 1013fe56b9e6SYuval Mintz info->mac[5] = (u8)(shmem_info.mac_lower); 1014fe56b9e6SYuval Mintz } else { 1015fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MAC is 0 in shmem\n"); 1016fe56b9e6SYuval Mintz } 1017fe56b9e6SYuval Mintz 1018fe56b9e6SYuval Mintz info->wwn_port = (u64)shmem_info.fcoe_wwn_port_name_upper | 1019fe56b9e6SYuval Mintz (((u64)shmem_info.fcoe_wwn_port_name_lower) << 32); 1020fe56b9e6SYuval Mintz info->wwn_node = (u64)shmem_info.fcoe_wwn_node_name_upper | 1021fe56b9e6SYuval Mintz (((u64)shmem_info.fcoe_wwn_node_name_lower) << 32); 1022fe56b9e6SYuval Mintz 1023fe56b9e6SYuval Mintz info->ovlan = (u16)(shmem_info.ovlan_stag & FUNC_MF_CFG_OV_STAG_MASK); 1024fe56b9e6SYuval Mintz 1025fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_SP | NETIF_MSG_IFUP), 1026fe56b9e6SYuval Mintz "Read configuration from shmem: pause_on_host %02x protocol %02x BW [%02x - %02x] MAC %02x:%02x:%02x:%02x:%02x:%02x wwn port %llx node %llx ovlan %04x\n", 1027fe56b9e6SYuval Mintz info->pause_on_host, info->protocol, 1028fe56b9e6SYuval Mintz info->bandwidth_min, info->bandwidth_max, 1029fe56b9e6SYuval Mintz info->mac[0], info->mac[1], info->mac[2], 1030fe56b9e6SYuval Mintz info->mac[3], info->mac[4], info->mac[5], 1031fe56b9e6SYuval Mintz info->wwn_port, info->wwn_node, info->ovlan); 1032fe56b9e6SYuval Mintz 1033fe56b9e6SYuval Mintz return 0; 1034fe56b9e6SYuval Mintz } 1035fe56b9e6SYuval Mintz 1036cc875c2eSYuval Mintz struct qed_mcp_link_params 1037cc875c2eSYuval Mintz *qed_mcp_get_link_params(struct qed_hwfn *p_hwfn) 1038cc875c2eSYuval Mintz { 1039cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 1040cc875c2eSYuval Mintz return NULL; 1041cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_input; 1042cc875c2eSYuval Mintz } 1043cc875c2eSYuval Mintz 1044cc875c2eSYuval Mintz struct qed_mcp_link_state 1045cc875c2eSYuval Mintz *qed_mcp_get_link_state(struct qed_hwfn *p_hwfn) 1046cc875c2eSYuval Mintz { 1047cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 1048cc875c2eSYuval Mintz return NULL; 1049cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_output; 1050cc875c2eSYuval Mintz } 1051cc875c2eSYuval Mintz 1052cc875c2eSYuval Mintz struct qed_mcp_link_capabilities 1053cc875c2eSYuval Mintz *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn) 1054cc875c2eSYuval Mintz { 1055cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 1056cc875c2eSYuval Mintz return NULL; 1057cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_capabilities; 1058cc875c2eSYuval Mintz } 1059cc875c2eSYuval Mintz 10601a635e48SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 1061fe56b9e6SYuval Mintz { 1062fe56b9e6SYuval Mintz u32 resp = 0, param = 0; 1063fe56b9e6SYuval Mintz int rc; 1064fe56b9e6SYuval Mintz 1065fe56b9e6SYuval Mintz rc = qed_mcp_cmd(p_hwfn, p_ptt, 10661a635e48SYuval Mintz DRV_MSG_CODE_NIG_DRAIN, 1000, &resp, ¶m); 1067fe56b9e6SYuval Mintz 1068fe56b9e6SYuval Mintz /* Wait for the drain to complete before returning */ 10698f60bafeSYuval Mintz msleep(1020); 1070fe56b9e6SYuval Mintz 1071fe56b9e6SYuval Mintz return rc; 1072fe56b9e6SYuval Mintz } 1073fe56b9e6SYuval Mintz 1074cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 10751a635e48SYuval Mintz struct qed_ptt *p_ptt, u32 *p_flash_size) 1076cee4d264SManish Chopra { 1077cee4d264SManish Chopra u32 flash_size; 1078cee4d264SManish Chopra 10791408cc1fSYuval Mintz if (IS_VF(p_hwfn->cdev)) 10801408cc1fSYuval Mintz return -EINVAL; 10811408cc1fSYuval Mintz 1082cee4d264SManish Chopra flash_size = qed_rd(p_hwfn, p_ptt, MCP_REG_NVM_CFG4); 1083cee4d264SManish Chopra flash_size = (flash_size & MCP_REG_NVM_CFG4_FLASH_SIZE) >> 1084cee4d264SManish Chopra MCP_REG_NVM_CFG4_FLASH_SIZE_SHIFT; 1085cee4d264SManish Chopra flash_size = (1 << (flash_size + MCP_BYTES_PER_MBIT_SHIFT)); 1086cee4d264SManish Chopra 1087cee4d264SManish Chopra *p_flash_size = flash_size; 1088cee4d264SManish Chopra 1089cee4d264SManish Chopra return 0; 1090cee4d264SManish Chopra } 1091cee4d264SManish Chopra 10921408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, 10931408cc1fSYuval Mintz struct qed_ptt *p_ptt, u8 vf_id, u8 num) 10941408cc1fSYuval Mintz { 10951408cc1fSYuval Mintz u32 resp = 0, param = 0, rc_param = 0; 10961408cc1fSYuval Mintz int rc; 10971408cc1fSYuval Mintz 10981408cc1fSYuval Mintz /* Only Leader can configure MSIX, and need to take CMT into account */ 10991408cc1fSYuval Mintz if (!IS_LEAD_HWFN(p_hwfn)) 11001408cc1fSYuval Mintz return 0; 11011408cc1fSYuval Mintz num *= p_hwfn->cdev->num_hwfns; 11021408cc1fSYuval Mintz 11031408cc1fSYuval Mintz param |= (vf_id << DRV_MB_PARAM_CFG_VF_MSIX_VF_ID_SHIFT) & 11041408cc1fSYuval Mintz DRV_MB_PARAM_CFG_VF_MSIX_VF_ID_MASK; 11051408cc1fSYuval Mintz param |= (num << DRV_MB_PARAM_CFG_VF_MSIX_SB_NUM_SHIFT) & 11061408cc1fSYuval Mintz DRV_MB_PARAM_CFG_VF_MSIX_SB_NUM_MASK; 11071408cc1fSYuval Mintz 11081408cc1fSYuval Mintz rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_CFG_VF_MSIX, param, 11091408cc1fSYuval Mintz &resp, &rc_param); 11101408cc1fSYuval Mintz 11111408cc1fSYuval Mintz if (resp != FW_MSG_CODE_DRV_CFG_VF_MSIX_DONE) { 11121408cc1fSYuval Mintz DP_NOTICE(p_hwfn, "VF[%d]: MFW failed to set MSI-X\n", vf_id); 11131408cc1fSYuval Mintz rc = -EINVAL; 11141408cc1fSYuval Mintz } else { 11151408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 11161408cc1fSYuval Mintz "Requested 0x%02x MSI-x interrupts from VF 0x%02x\n", 11171408cc1fSYuval Mintz num, vf_id); 11181408cc1fSYuval Mintz } 11191408cc1fSYuval Mintz 11201408cc1fSYuval Mintz return rc; 11211408cc1fSYuval Mintz } 11221408cc1fSYuval Mintz 1123fe56b9e6SYuval Mintz int 1124fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 1125fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 1126fe56b9e6SYuval Mintz struct qed_mcp_drv_version *p_ver) 1127fe56b9e6SYuval Mintz { 11285529bad9STomer Tayar struct drv_version_stc *p_drv_version; 11295529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 11305529bad9STomer Tayar union drv_union_data union_data; 11315529bad9STomer Tayar __be32 val; 11325529bad9STomer Tayar u32 i; 11335529bad9STomer Tayar int rc; 1134fe56b9e6SYuval Mintz 11355529bad9STomer Tayar p_drv_version = &union_data.drv_version; 11365529bad9STomer Tayar p_drv_version->version = p_ver->version; 11374b01e519SManish Chopra 11385529bad9STomer Tayar for (i = 0; i < MCP_DRV_VER_STR_SIZE - 1; i += 4) { 11395529bad9STomer Tayar val = cpu_to_be32(p_ver->name[i]); 11404b01e519SManish Chopra *(__be32 *)&p_drv_version->name[i * sizeof(u32)] = val; 1141fe56b9e6SYuval Mintz } 1142fe56b9e6SYuval Mintz 11435529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 11445529bad9STomer Tayar mb_params.cmd = DRV_MSG_CODE_SET_VERSION; 11455529bad9STomer Tayar mb_params.p_data_src = &union_data; 11465529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 11475529bad9STomer Tayar if (rc) 1148fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 1149fe56b9e6SYuval Mintz 11505529bad9STomer Tayar return rc; 1151fe56b9e6SYuval Mintz } 115291420b83SSudarsana Kalluru 11531a635e48SYuval Mintz int qed_mcp_set_led(struct qed_hwfn *p_hwfn, 11541a635e48SYuval Mintz struct qed_ptt *p_ptt, enum qed_led_mode mode) 115591420b83SSudarsana Kalluru { 115691420b83SSudarsana Kalluru u32 resp = 0, param = 0, drv_mb_param; 115791420b83SSudarsana Kalluru int rc; 115891420b83SSudarsana Kalluru 115991420b83SSudarsana Kalluru switch (mode) { 116091420b83SSudarsana Kalluru case QED_LED_MODE_ON: 116191420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_ON; 116291420b83SSudarsana Kalluru break; 116391420b83SSudarsana Kalluru case QED_LED_MODE_OFF: 116491420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_OFF; 116591420b83SSudarsana Kalluru break; 116691420b83SSudarsana Kalluru case QED_LED_MODE_RESTORE: 116791420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_OPER; 116891420b83SSudarsana Kalluru break; 116991420b83SSudarsana Kalluru default: 117091420b83SSudarsana Kalluru DP_NOTICE(p_hwfn, "Invalid LED mode %d\n", mode); 117191420b83SSudarsana Kalluru return -EINVAL; 117291420b83SSudarsana Kalluru } 117391420b83SSudarsana Kalluru 117491420b83SSudarsana Kalluru rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LED_MODE, 117591420b83SSudarsana Kalluru drv_mb_param, &resp, ¶m); 117691420b83SSudarsana Kalluru 117791420b83SSudarsana Kalluru return rc; 117891420b83SSudarsana Kalluru } 117903dc76caSSudarsana Reddy Kalluru 118003dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 118103dc76caSSudarsana Reddy Kalluru { 118203dc76caSSudarsana Reddy Kalluru u32 drv_mb_param = 0, rsp, param; 118303dc76caSSudarsana Reddy Kalluru int rc = 0; 118403dc76caSSudarsana Reddy Kalluru 118503dc76caSSudarsana Reddy Kalluru drv_mb_param = (DRV_MB_PARAM_BIST_REGISTER_TEST << 118603dc76caSSudarsana Reddy Kalluru DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT); 118703dc76caSSudarsana Reddy Kalluru 118803dc76caSSudarsana Reddy Kalluru rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST, 118903dc76caSSudarsana Reddy Kalluru drv_mb_param, &rsp, ¶m); 119003dc76caSSudarsana Reddy Kalluru 119103dc76caSSudarsana Reddy Kalluru if (rc) 119203dc76caSSudarsana Reddy Kalluru return rc; 119303dc76caSSudarsana Reddy Kalluru 119403dc76caSSudarsana Reddy Kalluru if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) || 119503dc76caSSudarsana Reddy Kalluru (param != DRV_MB_PARAM_BIST_RC_PASSED)) 119603dc76caSSudarsana Reddy Kalluru rc = -EAGAIN; 119703dc76caSSudarsana Reddy Kalluru 119803dc76caSSudarsana Reddy Kalluru return rc; 119903dc76caSSudarsana Reddy Kalluru } 120003dc76caSSudarsana Reddy Kalluru 120103dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 120203dc76caSSudarsana Reddy Kalluru { 120303dc76caSSudarsana Reddy Kalluru u32 drv_mb_param, rsp, param; 120403dc76caSSudarsana Reddy Kalluru int rc = 0; 120503dc76caSSudarsana Reddy Kalluru 120603dc76caSSudarsana Reddy Kalluru drv_mb_param = (DRV_MB_PARAM_BIST_CLOCK_TEST << 120703dc76caSSudarsana Reddy Kalluru DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT); 120803dc76caSSudarsana Reddy Kalluru 120903dc76caSSudarsana Reddy Kalluru rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST, 121003dc76caSSudarsana Reddy Kalluru drv_mb_param, &rsp, ¶m); 121103dc76caSSudarsana Reddy Kalluru 121203dc76caSSudarsana Reddy Kalluru if (rc) 121303dc76caSSudarsana Reddy Kalluru return rc; 121403dc76caSSudarsana Reddy Kalluru 121503dc76caSSudarsana Reddy Kalluru if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) || 121603dc76caSSudarsana Reddy Kalluru (param != DRV_MB_PARAM_BIST_RC_PASSED)) 121703dc76caSSudarsana Reddy Kalluru rc = -EAGAIN; 121803dc76caSSudarsana Reddy Kalluru 121903dc76caSSudarsana Reddy Kalluru return rc; 122003dc76caSSudarsana Reddy Kalluru } 1221