1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 2fe56b9e6SYuval Mintz * Copyright (c) 2015 QLogic Corporation 3fe56b9e6SYuval Mintz * 4fe56b9e6SYuval Mintz * This software is available under the terms of the GNU General Public License 5fe56b9e6SYuval Mintz * (GPL) Version 2, available from the file COPYING in the main directory of 6fe56b9e6SYuval Mintz * this source tree. 7fe56b9e6SYuval Mintz */ 8fe56b9e6SYuval Mintz 9fe56b9e6SYuval Mintz #include <linux/types.h> 10fe56b9e6SYuval Mintz #include <asm/byteorder.h> 11fe56b9e6SYuval Mintz #include <linux/delay.h> 12fe56b9e6SYuval Mintz #include <linux/errno.h> 13fe56b9e6SYuval Mintz #include <linux/kernel.h> 14fe56b9e6SYuval Mintz #include <linux/slab.h> 155529bad9STomer Tayar #include <linux/spinlock.h> 16fe56b9e6SYuval Mintz #include <linux/string.h> 17fe56b9e6SYuval Mintz #include "qed.h" 18fe56b9e6SYuval Mintz #include "qed_hsi.h" 19fe56b9e6SYuval Mintz #include "qed_hw.h" 20fe56b9e6SYuval Mintz #include "qed_mcp.h" 21fe56b9e6SYuval Mintz #include "qed_reg_addr.h" 221408cc1fSYuval Mintz #include "qed_sriov.h" 231408cc1fSYuval Mintz 24fe56b9e6SYuval Mintz #define CHIP_MCP_RESP_ITER_US 10 25fe56b9e6SYuval Mintz 26fe56b9e6SYuval Mintz #define QED_DRV_MB_MAX_RETRIES (500 * 1000) /* Account for 5 sec */ 27fe56b9e6SYuval Mintz #define QED_MCP_RESET_RETRIES (50 * 1000) /* Account for 500 msec */ 28fe56b9e6SYuval Mintz 29fe56b9e6SYuval Mintz #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val) \ 30fe56b9e6SYuval Mintz qed_wr(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset), \ 31fe56b9e6SYuval Mintz _val) 32fe56b9e6SYuval Mintz 33fe56b9e6SYuval Mintz #define DRV_INNER_RD(_p_hwfn, _p_ptt, _ptr, _offset) \ 34fe56b9e6SYuval Mintz qed_rd(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset)) 35fe56b9e6SYuval Mintz 36fe56b9e6SYuval Mintz #define DRV_MB_WR(_p_hwfn, _p_ptt, _field, _val) \ 37fe56b9e6SYuval Mintz DRV_INNER_WR(p_hwfn, _p_ptt, drv_mb_addr, \ 38fe56b9e6SYuval Mintz offsetof(struct public_drv_mb, _field), _val) 39fe56b9e6SYuval Mintz 40fe56b9e6SYuval Mintz #define DRV_MB_RD(_p_hwfn, _p_ptt, _field) \ 41fe56b9e6SYuval Mintz DRV_INNER_RD(_p_hwfn, _p_ptt, drv_mb_addr, \ 42fe56b9e6SYuval Mintz offsetof(struct public_drv_mb, _field)) 43fe56b9e6SYuval Mintz 44fe56b9e6SYuval Mintz #define PDA_COMP (((FW_MAJOR_VERSION) + (FW_MINOR_VERSION << 8)) << \ 45fe56b9e6SYuval Mintz DRV_ID_PDA_COMP_VER_SHIFT) 46fe56b9e6SYuval Mintz 47fe56b9e6SYuval Mintz #define MCP_BYTES_PER_MBIT_SHIFT 17 48fe56b9e6SYuval Mintz 49fe56b9e6SYuval Mintz bool qed_mcp_is_init(struct qed_hwfn *p_hwfn) 50fe56b9e6SYuval Mintz { 51fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info || !p_hwfn->mcp_info->public_base) 52fe56b9e6SYuval Mintz return false; 53fe56b9e6SYuval Mintz return true; 54fe56b9e6SYuval Mintz } 55fe56b9e6SYuval Mintz 56fe56b9e6SYuval Mintz void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, 57fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 58fe56b9e6SYuval Mintz { 59fe56b9e6SYuval Mintz u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 60fe56b9e6SYuval Mintz PUBLIC_PORT); 61fe56b9e6SYuval Mintz u32 mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, addr); 62fe56b9e6SYuval Mintz 63fe56b9e6SYuval Mintz p_hwfn->mcp_info->port_addr = SECTION_ADDR(mfw_mb_offsize, 64fe56b9e6SYuval Mintz MFW_PORT(p_hwfn)); 65fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 66fe56b9e6SYuval Mintz "port_addr = 0x%x, port_id 0x%02x\n", 67fe56b9e6SYuval Mintz p_hwfn->mcp_info->port_addr, MFW_PORT(p_hwfn)); 68fe56b9e6SYuval Mintz } 69fe56b9e6SYuval Mintz 70fe56b9e6SYuval Mintz void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, 71fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 72fe56b9e6SYuval Mintz { 73fe56b9e6SYuval Mintz u32 length = MFW_DRV_MSG_MAX_DWORDS(p_hwfn->mcp_info->mfw_mb_length); 74fe56b9e6SYuval Mintz u32 tmp, i; 75fe56b9e6SYuval Mintz 76fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info->public_base) 77fe56b9e6SYuval Mintz return; 78fe56b9e6SYuval Mintz 79fe56b9e6SYuval Mintz for (i = 0; i < length; i++) { 80fe56b9e6SYuval Mintz tmp = qed_rd(p_hwfn, p_ptt, 81fe56b9e6SYuval Mintz p_hwfn->mcp_info->mfw_mb_addr + 82fe56b9e6SYuval Mintz (i << 2) + sizeof(u32)); 83fe56b9e6SYuval Mintz 84fe56b9e6SYuval Mintz /* The MB data is actually BE; Need to force it to cpu */ 85fe56b9e6SYuval Mintz ((u32 *)p_hwfn->mcp_info->mfw_mb_cur)[i] = 86fe56b9e6SYuval Mintz be32_to_cpu((__force __be32)tmp); 87fe56b9e6SYuval Mintz } 88fe56b9e6SYuval Mintz } 89fe56b9e6SYuval Mintz 90fe56b9e6SYuval Mintz int qed_mcp_free(struct qed_hwfn *p_hwfn) 91fe56b9e6SYuval Mintz { 92fe56b9e6SYuval Mintz if (p_hwfn->mcp_info) { 93fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info->mfw_mb_cur); 94fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info->mfw_mb_shadow); 95fe56b9e6SYuval Mintz } 96fe56b9e6SYuval Mintz kfree(p_hwfn->mcp_info); 97fe56b9e6SYuval Mintz 98fe56b9e6SYuval Mintz return 0; 99fe56b9e6SYuval Mintz } 100fe56b9e6SYuval Mintz 101fe56b9e6SYuval Mintz static int qed_load_mcp_offsets(struct qed_hwfn *p_hwfn, 102fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 103fe56b9e6SYuval Mintz { 104fe56b9e6SYuval Mintz struct qed_mcp_info *p_info = p_hwfn->mcp_info; 105fe56b9e6SYuval Mintz u32 drv_mb_offsize, mfw_mb_offsize; 106fe56b9e6SYuval Mintz u32 mcp_pf_id = MCP_PF_ID(p_hwfn); 107fe56b9e6SYuval Mintz 108fe56b9e6SYuval Mintz p_info->public_base = qed_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR); 109fe56b9e6SYuval Mintz if (!p_info->public_base) 110fe56b9e6SYuval Mintz return 0; 111fe56b9e6SYuval Mintz 112fe56b9e6SYuval Mintz p_info->public_base |= GRCBASE_MCP; 113fe56b9e6SYuval Mintz 114fe56b9e6SYuval Mintz /* Calculate the driver and MFW mailbox address */ 115fe56b9e6SYuval Mintz drv_mb_offsize = qed_rd(p_hwfn, p_ptt, 116fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_info->public_base, 117fe56b9e6SYuval Mintz PUBLIC_DRV_MB)); 118fe56b9e6SYuval Mintz p_info->drv_mb_addr = SECTION_ADDR(drv_mb_offsize, mcp_pf_id); 119fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 120fe56b9e6SYuval Mintz "drv_mb_offsiz = 0x%x, drv_mb_addr = 0x%x mcp_pf_id = 0x%x\n", 121fe56b9e6SYuval Mintz drv_mb_offsize, p_info->drv_mb_addr, mcp_pf_id); 122fe56b9e6SYuval Mintz 123fe56b9e6SYuval Mintz /* Set the MFW MB address */ 124fe56b9e6SYuval Mintz mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, 125fe56b9e6SYuval Mintz SECTION_OFFSIZE_ADDR(p_info->public_base, 126fe56b9e6SYuval Mintz PUBLIC_MFW_MB)); 127fe56b9e6SYuval Mintz p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id); 128fe56b9e6SYuval Mintz p_info->mfw_mb_length = (u16)qed_rd(p_hwfn, p_ptt, p_info->mfw_mb_addr); 129fe56b9e6SYuval Mintz 130fe56b9e6SYuval Mintz /* Get the current driver mailbox sequence before sending 131fe56b9e6SYuval Mintz * the first command 132fe56b9e6SYuval Mintz */ 133fe56b9e6SYuval Mintz p_info->drv_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & 134fe56b9e6SYuval Mintz DRV_MSG_SEQ_NUMBER_MASK; 135fe56b9e6SYuval Mintz 136fe56b9e6SYuval Mintz /* Get current FW pulse sequence */ 137fe56b9e6SYuval Mintz p_info->drv_pulse_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_pulse_mb) & 138fe56b9e6SYuval Mintz DRV_PULSE_SEQ_MASK; 139fe56b9e6SYuval Mintz 140fe56b9e6SYuval Mintz p_info->mcp_hist = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); 141fe56b9e6SYuval Mintz 142fe56b9e6SYuval Mintz return 0; 143fe56b9e6SYuval Mintz } 144fe56b9e6SYuval Mintz 145fe56b9e6SYuval Mintz int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, 146fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 147fe56b9e6SYuval Mintz { 148fe56b9e6SYuval Mintz struct qed_mcp_info *p_info; 149fe56b9e6SYuval Mintz u32 size; 150fe56b9e6SYuval Mintz 151fe56b9e6SYuval Mintz /* Allocate mcp_info structure */ 15260fffb3bSYuval Mintz p_hwfn->mcp_info = kzalloc(sizeof(*p_hwfn->mcp_info), GFP_KERNEL); 153fe56b9e6SYuval Mintz if (!p_hwfn->mcp_info) 154fe56b9e6SYuval Mintz goto err; 155fe56b9e6SYuval Mintz p_info = p_hwfn->mcp_info; 156fe56b9e6SYuval Mintz 157fe56b9e6SYuval Mintz if (qed_load_mcp_offsets(p_hwfn, p_ptt) != 0) { 158fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MCP is not initialized\n"); 159fe56b9e6SYuval Mintz /* Do not free mcp_info here, since public_base indicate that 160fe56b9e6SYuval Mintz * the MCP is not initialized 161fe56b9e6SYuval Mintz */ 162fe56b9e6SYuval Mintz return 0; 163fe56b9e6SYuval Mintz } 164fe56b9e6SYuval Mintz 165fe56b9e6SYuval Mintz size = MFW_DRV_MSG_MAX_DWORDS(p_info->mfw_mb_length) * sizeof(u32); 16660fffb3bSYuval Mintz p_info->mfw_mb_cur = kzalloc(size, GFP_KERNEL); 167fe56b9e6SYuval Mintz p_info->mfw_mb_shadow = 168fe56b9e6SYuval Mintz kzalloc(sizeof(u32) * MFW_DRV_MSG_MAX_DWORDS( 16960fffb3bSYuval Mintz p_info->mfw_mb_length), GFP_KERNEL); 170fe56b9e6SYuval Mintz if (!p_info->mfw_mb_shadow || !p_info->mfw_mb_addr) 171fe56b9e6SYuval Mintz goto err; 172fe56b9e6SYuval Mintz 1735529bad9STomer Tayar /* Initialize the MFW spinlock */ 1745529bad9STomer Tayar spin_lock_init(&p_info->lock); 175fe56b9e6SYuval Mintz 176fe56b9e6SYuval Mintz return 0; 177fe56b9e6SYuval Mintz 178fe56b9e6SYuval Mintz err: 179fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Failed to allocate mcp memory\n"); 180fe56b9e6SYuval Mintz qed_mcp_free(p_hwfn); 181fe56b9e6SYuval Mintz return -ENOMEM; 182fe56b9e6SYuval Mintz } 183fe56b9e6SYuval Mintz 1845529bad9STomer Tayar /* Locks the MFW mailbox of a PF to ensure a single access. 1855529bad9STomer Tayar * The lock is achieved in most cases by holding a spinlock, causing other 1865529bad9STomer Tayar * threads to wait till a previous access is done. 1875529bad9STomer Tayar * In some cases (currently when a [UN]LOAD_REQ commands are sent), the single 1885529bad9STomer Tayar * access is achieved by setting a blocking flag, which will fail other 1895529bad9STomer Tayar * competing contexts to send their mailboxes. 1905529bad9STomer Tayar */ 1915529bad9STomer Tayar static int qed_mcp_mb_lock(struct qed_hwfn *p_hwfn, 1925529bad9STomer Tayar u32 cmd) 1935529bad9STomer Tayar { 1945529bad9STomer Tayar spin_lock_bh(&p_hwfn->mcp_info->lock); 1955529bad9STomer Tayar 1965529bad9STomer Tayar /* The spinlock shouldn't be acquired when the mailbox command is 1975529bad9STomer Tayar * [UN]LOAD_REQ, since the engine is locked by the MFW, and a parallel 1985529bad9STomer Tayar * pending [UN]LOAD_REQ command of another PF together with a spinlock 1995529bad9STomer Tayar * (i.e. interrupts are disabled) - can lead to a deadlock. 2005529bad9STomer Tayar * It is assumed that for a single PF, no other mailbox commands can be 2015529bad9STomer Tayar * sent from another context while sending LOAD_REQ, and that any 2025529bad9STomer Tayar * parallel commands to UNLOAD_REQ can be cancelled. 2035529bad9STomer Tayar */ 2045529bad9STomer Tayar if (cmd == DRV_MSG_CODE_LOAD_DONE || cmd == DRV_MSG_CODE_UNLOAD_DONE) 2055529bad9STomer Tayar p_hwfn->mcp_info->block_mb_sending = false; 2065529bad9STomer Tayar 2075529bad9STomer Tayar if (p_hwfn->mcp_info->block_mb_sending) { 2085529bad9STomer Tayar DP_NOTICE(p_hwfn, 2095529bad9STomer Tayar "Trying to send a MFW mailbox command [0x%x] in parallel to [UN]LOAD_REQ. Aborting.\n", 2105529bad9STomer Tayar cmd); 2115529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2125529bad9STomer Tayar return -EBUSY; 2135529bad9STomer Tayar } 2145529bad9STomer Tayar 2155529bad9STomer Tayar if (cmd == DRV_MSG_CODE_LOAD_REQ || cmd == DRV_MSG_CODE_UNLOAD_REQ) { 2165529bad9STomer Tayar p_hwfn->mcp_info->block_mb_sending = true; 2175529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2185529bad9STomer Tayar } 2195529bad9STomer Tayar 2205529bad9STomer Tayar return 0; 2215529bad9STomer Tayar } 2225529bad9STomer Tayar 2235529bad9STomer Tayar static void qed_mcp_mb_unlock(struct qed_hwfn *p_hwfn, 2245529bad9STomer Tayar u32 cmd) 2255529bad9STomer Tayar { 2265529bad9STomer Tayar if (cmd != DRV_MSG_CODE_LOAD_REQ && cmd != DRV_MSG_CODE_UNLOAD_REQ) 2275529bad9STomer Tayar spin_unlock_bh(&p_hwfn->mcp_info->lock); 2285529bad9STomer Tayar } 2295529bad9STomer Tayar 230fe56b9e6SYuval Mintz int qed_mcp_reset(struct qed_hwfn *p_hwfn, 231fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 232fe56b9e6SYuval Mintz { 233fe56b9e6SYuval Mintz u32 seq = ++p_hwfn->mcp_info->drv_mb_seq; 234fe56b9e6SYuval Mintz u8 delay = CHIP_MCP_RESP_ITER_US; 235fe56b9e6SYuval Mintz u32 org_mcp_reset_seq, cnt = 0; 236fe56b9e6SYuval Mintz int rc = 0; 237fe56b9e6SYuval Mintz 2385529bad9STomer Tayar /* Ensure that only a single thread is accessing the mailbox at a 2395529bad9STomer Tayar * certain time. 2405529bad9STomer Tayar */ 2415529bad9STomer Tayar rc = qed_mcp_mb_lock(p_hwfn, DRV_MSG_CODE_MCP_RESET); 2425529bad9STomer Tayar if (rc != 0) 2435529bad9STomer Tayar return rc; 2445529bad9STomer Tayar 245fe56b9e6SYuval Mintz /* Set drv command along with the updated sequence */ 246fe56b9e6SYuval Mintz org_mcp_reset_seq = qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); 247fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, 248fe56b9e6SYuval Mintz (DRV_MSG_CODE_MCP_RESET | seq)); 249fe56b9e6SYuval Mintz 250fe56b9e6SYuval Mintz do { 251fe56b9e6SYuval Mintz /* Wait for MFW response */ 252fe56b9e6SYuval Mintz udelay(delay); 253fe56b9e6SYuval Mintz /* Give the FW up to 500 second (50*1000*10usec) */ 254fe56b9e6SYuval Mintz } while ((org_mcp_reset_seq == qed_rd(p_hwfn, p_ptt, 255fe56b9e6SYuval Mintz MISCS_REG_GENERIC_POR_0)) && 256fe56b9e6SYuval Mintz (cnt++ < QED_MCP_RESET_RETRIES)); 257fe56b9e6SYuval Mintz 258fe56b9e6SYuval Mintz if (org_mcp_reset_seq != 259fe56b9e6SYuval Mintz qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { 260fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 261fe56b9e6SYuval Mintz "MCP was reset after %d usec\n", cnt * delay); 262fe56b9e6SYuval Mintz } else { 263fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Failed to reset MCP\n"); 264fe56b9e6SYuval Mintz rc = -EAGAIN; 265fe56b9e6SYuval Mintz } 266fe56b9e6SYuval Mintz 2675529bad9STomer Tayar qed_mcp_mb_unlock(p_hwfn, DRV_MSG_CODE_MCP_RESET); 2685529bad9STomer Tayar 269fe56b9e6SYuval Mintz return rc; 270fe56b9e6SYuval Mintz } 271fe56b9e6SYuval Mintz 272fe56b9e6SYuval Mintz static int qed_do_mcp_cmd(struct qed_hwfn *p_hwfn, 273fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 274fe56b9e6SYuval Mintz u32 cmd, 275fe56b9e6SYuval Mintz u32 param, 276fe56b9e6SYuval Mintz u32 *o_mcp_resp, 277fe56b9e6SYuval Mintz u32 *o_mcp_param) 278fe56b9e6SYuval Mintz { 279fe56b9e6SYuval Mintz u8 delay = CHIP_MCP_RESP_ITER_US; 280fe56b9e6SYuval Mintz u32 seq, cnt = 1, actual_mb_seq; 281fe56b9e6SYuval Mintz int rc = 0; 282fe56b9e6SYuval Mintz 283fe56b9e6SYuval Mintz /* Get actual driver mailbox sequence */ 284fe56b9e6SYuval Mintz actual_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & 285fe56b9e6SYuval Mintz DRV_MSG_SEQ_NUMBER_MASK; 286fe56b9e6SYuval Mintz 287fe56b9e6SYuval Mintz /* Use MCP history register to check if MCP reset occurred between 288fe56b9e6SYuval Mintz * init time and now. 289fe56b9e6SYuval Mintz */ 290fe56b9e6SYuval Mintz if (p_hwfn->mcp_info->mcp_hist != 291fe56b9e6SYuval Mintz qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { 292fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, "Rereading MCP offsets\n"); 293fe56b9e6SYuval Mintz qed_load_mcp_offsets(p_hwfn, p_ptt); 294fe56b9e6SYuval Mintz qed_mcp_cmd_port_init(p_hwfn, p_ptt); 295fe56b9e6SYuval Mintz } 296fe56b9e6SYuval Mintz seq = ++p_hwfn->mcp_info->drv_mb_seq; 297fe56b9e6SYuval Mintz 298fe56b9e6SYuval Mintz /* Set drv param */ 299fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_param, param); 300fe56b9e6SYuval Mintz 301fe56b9e6SYuval Mintz /* Set drv command along with the updated sequence */ 302fe56b9e6SYuval Mintz DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, (cmd | seq)); 303fe56b9e6SYuval Mintz 304fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 305fe56b9e6SYuval Mintz "wrote command (%x) to MFW MB param 0x%08x\n", 306fe56b9e6SYuval Mintz (cmd | seq), param); 307fe56b9e6SYuval Mintz 308fe56b9e6SYuval Mintz do { 309fe56b9e6SYuval Mintz /* Wait for MFW response */ 310fe56b9e6SYuval Mintz udelay(delay); 311fe56b9e6SYuval Mintz *o_mcp_resp = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_header); 312fe56b9e6SYuval Mintz 313fe56b9e6SYuval Mintz /* Give the FW up to 5 second (500*10ms) */ 314fe56b9e6SYuval Mintz } while ((seq != (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) && 315fe56b9e6SYuval Mintz (cnt++ < QED_DRV_MB_MAX_RETRIES)); 316fe56b9e6SYuval Mintz 317fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, 318fe56b9e6SYuval Mintz "[after %d ms] read (%x) seq is (%x) from FW MB\n", 319fe56b9e6SYuval Mintz cnt * delay, *o_mcp_resp, seq); 320fe56b9e6SYuval Mintz 321fe56b9e6SYuval Mintz /* Is this a reply to our command? */ 322fe56b9e6SYuval Mintz if (seq == (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) { 323fe56b9e6SYuval Mintz *o_mcp_resp &= FW_MSG_CODE_MASK; 324fe56b9e6SYuval Mintz /* Get the MCP param */ 325fe56b9e6SYuval Mintz *o_mcp_param = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_param); 326fe56b9e6SYuval Mintz } else { 327fe56b9e6SYuval Mintz /* FW BUG! */ 328fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MFW failed to respond!\n"); 329fe56b9e6SYuval Mintz *o_mcp_resp = 0; 330fe56b9e6SYuval Mintz rc = -EAGAIN; 331fe56b9e6SYuval Mintz } 332fe56b9e6SYuval Mintz return rc; 333fe56b9e6SYuval Mintz } 334fe56b9e6SYuval Mintz 3355529bad9STomer Tayar static int qed_mcp_cmd_and_union(struct qed_hwfn *p_hwfn, 336fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 3375529bad9STomer Tayar struct qed_mcp_mb_params *p_mb_params) 338fe56b9e6SYuval Mintz { 3395529bad9STomer Tayar u32 union_data_addr; 3405529bad9STomer Tayar int rc; 341fe56b9e6SYuval Mintz 342fe56b9e6SYuval Mintz /* MCP not initialized */ 343fe56b9e6SYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 344fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized !\n"); 345fe56b9e6SYuval Mintz return -EBUSY; 346fe56b9e6SYuval Mintz } 347fe56b9e6SYuval Mintz 3485529bad9STomer Tayar union_data_addr = p_hwfn->mcp_info->drv_mb_addr + 3495529bad9STomer Tayar offsetof(struct public_drv_mb, union_data); 3505529bad9STomer Tayar 3515529bad9STomer Tayar /* Ensure that only a single thread is accessing the mailbox at a 3525529bad9STomer Tayar * certain time. 353fe56b9e6SYuval Mintz */ 3545529bad9STomer Tayar rc = qed_mcp_mb_lock(p_hwfn, p_mb_params->cmd); 3555529bad9STomer Tayar if (rc) 3565529bad9STomer Tayar return rc; 3575529bad9STomer Tayar 3585529bad9STomer Tayar if (p_mb_params->p_data_src != NULL) 3595529bad9STomer Tayar qed_memcpy_to(p_hwfn, p_ptt, union_data_addr, 3605529bad9STomer Tayar p_mb_params->p_data_src, 3615529bad9STomer Tayar sizeof(*p_mb_params->p_data_src)); 3625529bad9STomer Tayar 3635529bad9STomer Tayar rc = qed_do_mcp_cmd(p_hwfn, p_ptt, p_mb_params->cmd, 3645529bad9STomer Tayar p_mb_params->param, &p_mb_params->mcp_resp, 3655529bad9STomer Tayar &p_mb_params->mcp_param); 3665529bad9STomer Tayar 3675529bad9STomer Tayar if (p_mb_params->p_data_dst != NULL) 3685529bad9STomer Tayar qed_memcpy_from(p_hwfn, p_ptt, p_mb_params->p_data_dst, 3695529bad9STomer Tayar union_data_addr, 3705529bad9STomer Tayar sizeof(*p_mb_params->p_data_dst)); 3715529bad9STomer Tayar 3725529bad9STomer Tayar qed_mcp_mb_unlock(p_hwfn, p_mb_params->cmd); 373fe56b9e6SYuval Mintz 374fe56b9e6SYuval Mintz return rc; 375fe56b9e6SYuval Mintz } 376fe56b9e6SYuval Mintz 3775529bad9STomer Tayar int qed_mcp_cmd(struct qed_hwfn *p_hwfn, 3785529bad9STomer Tayar struct qed_ptt *p_ptt, 3795529bad9STomer Tayar u32 cmd, 3805529bad9STomer Tayar u32 param, 3815529bad9STomer Tayar u32 *o_mcp_resp, 3825529bad9STomer Tayar u32 *o_mcp_param) 383fe56b9e6SYuval Mintz { 3845529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 3855529bad9STomer Tayar int rc; 386fe56b9e6SYuval Mintz 3875529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 3885529bad9STomer Tayar mb_params.cmd = cmd; 3895529bad9STomer Tayar mb_params.param = param; 3905529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 3915529bad9STomer Tayar if (rc) 3925529bad9STomer Tayar return rc; 3935529bad9STomer Tayar 3945529bad9STomer Tayar *o_mcp_resp = mb_params.mcp_resp; 3955529bad9STomer Tayar *o_mcp_param = mb_params.mcp_param; 3965529bad9STomer Tayar 3975529bad9STomer Tayar return 0; 398fe56b9e6SYuval Mintz } 399fe56b9e6SYuval Mintz 400fe56b9e6SYuval Mintz int qed_mcp_load_req(struct qed_hwfn *p_hwfn, 401fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 402fe56b9e6SYuval Mintz u32 *p_load_code) 403fe56b9e6SYuval Mintz { 404fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 4055529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 4065529bad9STomer Tayar union drv_union_data union_data; 407fe56b9e6SYuval Mintz int rc; 408fe56b9e6SYuval Mintz 4095529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 410fe56b9e6SYuval Mintz /* Load Request */ 4115529bad9STomer Tayar mb_params.cmd = DRV_MSG_CODE_LOAD_REQ; 4125529bad9STomer Tayar mb_params.param = PDA_COMP | DRV_ID_MCP_HSI_VER_CURRENT | 4135529bad9STomer Tayar cdev->drv_type; 4145529bad9STomer Tayar memcpy(&union_data.ver_str, cdev->ver_str, MCP_DRV_VER_STR_SIZE); 4155529bad9STomer Tayar mb_params.p_data_src = &union_data; 4165529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 417fe56b9e6SYuval Mintz 418fe56b9e6SYuval Mintz /* if mcp fails to respond we must abort */ 419fe56b9e6SYuval Mintz if (rc) { 420fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 421fe56b9e6SYuval Mintz return rc; 422fe56b9e6SYuval Mintz } 423fe56b9e6SYuval Mintz 4245529bad9STomer Tayar *p_load_code = mb_params.mcp_resp; 4255529bad9STomer Tayar 426fe56b9e6SYuval Mintz /* If MFW refused (e.g. other port is in diagnostic mode) we 427fe56b9e6SYuval Mintz * must abort. This can happen in the following cases: 428fe56b9e6SYuval Mintz * - Other port is in diagnostic mode 429fe56b9e6SYuval Mintz * - Previously loaded function on the engine is not compliant with 430fe56b9e6SYuval Mintz * the requester. 431fe56b9e6SYuval Mintz * - MFW cannot cope with the requester's DRV_MFW_HSI_VERSION. 432fe56b9e6SYuval Mintz * - 433fe56b9e6SYuval Mintz */ 434fe56b9e6SYuval Mintz if (!(*p_load_code) || 435fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_HSI) || 436fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_PDA) || 437fe56b9e6SYuval Mintz ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_DIAG)) { 438fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP refused load request, aborting\n"); 439fe56b9e6SYuval Mintz return -EBUSY; 440fe56b9e6SYuval Mintz } 441fe56b9e6SYuval Mintz 442fe56b9e6SYuval Mintz return 0; 443fe56b9e6SYuval Mintz } 444fe56b9e6SYuval Mintz 445334c03b5SZvi Nachmani static void qed_mcp_handle_transceiver_change(struct qed_hwfn *p_hwfn, 446334c03b5SZvi Nachmani struct qed_ptt *p_ptt) 447334c03b5SZvi Nachmani { 448334c03b5SZvi Nachmani u32 transceiver_state; 449334c03b5SZvi Nachmani 450334c03b5SZvi Nachmani transceiver_state = qed_rd(p_hwfn, p_ptt, 451334c03b5SZvi Nachmani p_hwfn->mcp_info->port_addr + 452334c03b5SZvi Nachmani offsetof(struct public_port, 453334c03b5SZvi Nachmani transceiver_data)); 454334c03b5SZvi Nachmani 455334c03b5SZvi Nachmani DP_VERBOSE(p_hwfn, 456334c03b5SZvi Nachmani (NETIF_MSG_HW | QED_MSG_SP), 457334c03b5SZvi Nachmani "Received transceiver state update [0x%08x] from mfw [Addr 0x%x]\n", 458334c03b5SZvi Nachmani transceiver_state, 459334c03b5SZvi Nachmani (u32)(p_hwfn->mcp_info->port_addr + 460334c03b5SZvi Nachmani offsetof(struct public_port, 461334c03b5SZvi Nachmani transceiver_data))); 462334c03b5SZvi Nachmani 463334c03b5SZvi Nachmani transceiver_state = GET_FIELD(transceiver_state, 464334c03b5SZvi Nachmani PMM_TRANSCEIVER_STATE); 465334c03b5SZvi Nachmani 466334c03b5SZvi Nachmani if (transceiver_state == PMM_TRANSCEIVER_STATE_PRESENT) 467334c03b5SZvi Nachmani DP_NOTICE(p_hwfn, "Transceiver is present.\n"); 468334c03b5SZvi Nachmani else 469334c03b5SZvi Nachmani DP_NOTICE(p_hwfn, "Transceiver is unplugged.\n"); 470334c03b5SZvi Nachmani } 471334c03b5SZvi Nachmani 472cc875c2eSYuval Mintz static void qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn, 473cc875c2eSYuval Mintz struct qed_ptt *p_ptt, 474cc875c2eSYuval Mintz bool b_reset) 475cc875c2eSYuval Mintz { 476cc875c2eSYuval Mintz struct qed_mcp_link_state *p_link; 477a64b02d5SManish Chopra u8 max_bw, min_bw; 478cc875c2eSYuval Mintz u32 status = 0; 479cc875c2eSYuval Mintz 480cc875c2eSYuval Mintz p_link = &p_hwfn->mcp_info->link_output; 481cc875c2eSYuval Mintz memset(p_link, 0, sizeof(*p_link)); 482cc875c2eSYuval Mintz if (!b_reset) { 483cc875c2eSYuval Mintz status = qed_rd(p_hwfn, p_ptt, 484cc875c2eSYuval Mintz p_hwfn->mcp_info->port_addr + 485cc875c2eSYuval Mintz offsetof(struct public_port, link_status)); 486cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, (NETIF_MSG_LINK | QED_MSG_SP), 487cc875c2eSYuval Mintz "Received link update [0x%08x] from mfw [Addr 0x%x]\n", 488cc875c2eSYuval Mintz status, 489cc875c2eSYuval Mintz (u32)(p_hwfn->mcp_info->port_addr + 490cc875c2eSYuval Mintz offsetof(struct public_port, 491cc875c2eSYuval Mintz link_status))); 492cc875c2eSYuval Mintz } else { 493cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 494cc875c2eSYuval Mintz "Resetting link indications\n"); 495cc875c2eSYuval Mintz return; 496cc875c2eSYuval Mintz } 497cc875c2eSYuval Mintz 498fc916ff2SSudarsana Reddy Kalluru if (p_hwfn->b_drv_link_init) 499cc875c2eSYuval Mintz p_link->link_up = !!(status & LINK_STATUS_LINK_UP); 500fc916ff2SSudarsana Reddy Kalluru else 501fc916ff2SSudarsana Reddy Kalluru p_link->link_up = false; 502cc875c2eSYuval Mintz 503cc875c2eSYuval Mintz p_link->full_duplex = true; 504cc875c2eSYuval Mintz switch ((status & LINK_STATUS_SPEED_AND_DUPLEX_MASK)) { 505cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_100G: 506cc875c2eSYuval Mintz p_link->speed = 100000; 507cc875c2eSYuval Mintz break; 508cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_50G: 509cc875c2eSYuval Mintz p_link->speed = 50000; 510cc875c2eSYuval Mintz break; 511cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_40G: 512cc875c2eSYuval Mintz p_link->speed = 40000; 513cc875c2eSYuval Mintz break; 514cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_25G: 515cc875c2eSYuval Mintz p_link->speed = 25000; 516cc875c2eSYuval Mintz break; 517cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_20G: 518cc875c2eSYuval Mintz p_link->speed = 20000; 519cc875c2eSYuval Mintz break; 520cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_10G: 521cc875c2eSYuval Mintz p_link->speed = 10000; 522cc875c2eSYuval Mintz break; 523cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_1000THD: 524cc875c2eSYuval Mintz p_link->full_duplex = false; 525cc875c2eSYuval Mintz /* Fall-through */ 526cc875c2eSYuval Mintz case LINK_STATUS_SPEED_AND_DUPLEX_1000TFD: 527cc875c2eSYuval Mintz p_link->speed = 1000; 528cc875c2eSYuval Mintz break; 529cc875c2eSYuval Mintz default: 530cc875c2eSYuval Mintz p_link->speed = 0; 531cc875c2eSYuval Mintz } 532cc875c2eSYuval Mintz 5334b01e519SManish Chopra if (p_link->link_up && p_link->speed) 5344b01e519SManish Chopra p_link->line_speed = p_link->speed; 5354b01e519SManish Chopra else 5364b01e519SManish Chopra p_link->line_speed = 0; 5374b01e519SManish Chopra 5384b01e519SManish Chopra max_bw = p_hwfn->mcp_info->func_info.bandwidth_max; 539a64b02d5SManish Chopra min_bw = p_hwfn->mcp_info->func_info.bandwidth_min; 5404b01e519SManish Chopra 541a64b02d5SManish Chopra /* Max bandwidth configuration */ 5424b01e519SManish Chopra __qed_configure_pf_max_bandwidth(p_hwfn, p_ptt, p_link, max_bw); 543cc875c2eSYuval Mintz 544a64b02d5SManish Chopra /* Min bandwidth configuration */ 545a64b02d5SManish Chopra __qed_configure_pf_min_bandwidth(p_hwfn, p_ptt, p_link, min_bw); 546a64b02d5SManish Chopra qed_configure_vp_wfq_on_link_change(p_hwfn->cdev, p_link->min_pf_rate); 547a64b02d5SManish Chopra 548cc875c2eSYuval Mintz p_link->an = !!(status & LINK_STATUS_AUTO_NEGOTIATE_ENABLED); 549cc875c2eSYuval Mintz p_link->an_complete = !!(status & 550cc875c2eSYuval Mintz LINK_STATUS_AUTO_NEGOTIATE_COMPLETE); 551cc875c2eSYuval Mintz p_link->parallel_detection = !!(status & 552cc875c2eSYuval Mintz LINK_STATUS_PARALLEL_DETECTION_USED); 553cc875c2eSYuval Mintz p_link->pfc_enabled = !!(status & LINK_STATUS_PFC_ENABLED); 554cc875c2eSYuval Mintz 555cc875c2eSYuval Mintz p_link->partner_adv_speed |= 556cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE) ? 557cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_1G_FD : 0; 558cc875c2eSYuval Mintz p_link->partner_adv_speed |= 559cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE) ? 560cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_1G_HD : 0; 561cc875c2eSYuval Mintz p_link->partner_adv_speed |= 562cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_10G_CAPABLE) ? 563cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_10G : 0; 564cc875c2eSYuval Mintz p_link->partner_adv_speed |= 565cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_20G_CAPABLE) ? 566cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_20G : 0; 567cc875c2eSYuval Mintz p_link->partner_adv_speed |= 568cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_40G_CAPABLE) ? 569cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_40G : 0; 570cc875c2eSYuval Mintz p_link->partner_adv_speed |= 571cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_50G_CAPABLE) ? 572cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_50G : 0; 573cc875c2eSYuval Mintz p_link->partner_adv_speed |= 574cc875c2eSYuval Mintz (status & LINK_STATUS_LINK_PARTNER_100G_CAPABLE) ? 575cc875c2eSYuval Mintz QED_LINK_PARTNER_SPEED_100G : 0; 576cc875c2eSYuval Mintz 577cc875c2eSYuval Mintz p_link->partner_tx_flow_ctrl_en = 578cc875c2eSYuval Mintz !!(status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED); 579cc875c2eSYuval Mintz p_link->partner_rx_flow_ctrl_en = 580cc875c2eSYuval Mintz !!(status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED); 581cc875c2eSYuval Mintz 582cc875c2eSYuval Mintz switch (status & LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK) { 583cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE: 584cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_SYMMETRIC_PAUSE; 585cc875c2eSYuval Mintz break; 586cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE: 587cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_ASYMMETRIC_PAUSE; 588cc875c2eSYuval Mintz break; 589cc875c2eSYuval Mintz case LINK_STATUS_LINK_PARTNER_BOTH_PAUSE: 590cc875c2eSYuval Mintz p_link->partner_adv_pause = QED_LINK_PARTNER_BOTH_PAUSE; 591cc875c2eSYuval Mintz break; 592cc875c2eSYuval Mintz default: 593cc875c2eSYuval Mintz p_link->partner_adv_pause = 0; 594cc875c2eSYuval Mintz } 595cc875c2eSYuval Mintz 596cc875c2eSYuval Mintz p_link->sfp_tx_fault = !!(status & LINK_STATUS_SFP_TX_FAULT); 597cc875c2eSYuval Mintz 598cc875c2eSYuval Mintz qed_link_update(p_hwfn); 599cc875c2eSYuval Mintz } 600cc875c2eSYuval Mintz 601cc875c2eSYuval Mintz int qed_mcp_set_link(struct qed_hwfn *p_hwfn, 602cc875c2eSYuval Mintz struct qed_ptt *p_ptt, 603cc875c2eSYuval Mintz bool b_up) 604cc875c2eSYuval Mintz { 605cc875c2eSYuval Mintz struct qed_mcp_link_params *params = &p_hwfn->mcp_info->link_input; 6065529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 6075529bad9STomer Tayar union drv_union_data union_data; 6085529bad9STomer Tayar struct pmm_phy_cfg *phy_cfg; 609cc875c2eSYuval Mintz int rc = 0; 6105529bad9STomer Tayar u32 cmd; 611cc875c2eSYuval Mintz 612cc875c2eSYuval Mintz /* Set the shmem configuration according to params */ 6135529bad9STomer Tayar phy_cfg = &union_data.drv_phy_cfg; 6145529bad9STomer Tayar memset(phy_cfg, 0, sizeof(*phy_cfg)); 615cc875c2eSYuval Mintz cmd = b_up ? DRV_MSG_CODE_INIT_PHY : DRV_MSG_CODE_LINK_RESET; 616cc875c2eSYuval Mintz if (!params->speed.autoneg) 6175529bad9STomer Tayar phy_cfg->speed = params->speed.forced_speed; 6185529bad9STomer Tayar phy_cfg->pause |= (params->pause.autoneg) ? PMM_PAUSE_AUTONEG : 0; 6195529bad9STomer Tayar phy_cfg->pause |= (params->pause.forced_rx) ? PMM_PAUSE_RX : 0; 6205529bad9STomer Tayar phy_cfg->pause |= (params->pause.forced_tx) ? PMM_PAUSE_TX : 0; 6215529bad9STomer Tayar phy_cfg->adv_speed = params->speed.advertised_speeds; 6225529bad9STomer Tayar phy_cfg->loopback_mode = params->loopback_mode; 623cc875c2eSYuval Mintz 624fc916ff2SSudarsana Reddy Kalluru p_hwfn->b_drv_link_init = b_up; 625fc916ff2SSudarsana Reddy Kalluru 626cc875c2eSYuval Mintz if (b_up) { 627cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 628cc875c2eSYuval Mintz "Configuring Link: Speed 0x%08x, Pause 0x%08x, adv_speed 0x%08x, loopback 0x%08x, features 0x%08x\n", 6295529bad9STomer Tayar phy_cfg->speed, 6305529bad9STomer Tayar phy_cfg->pause, 6315529bad9STomer Tayar phy_cfg->adv_speed, 6325529bad9STomer Tayar phy_cfg->loopback_mode, 6335529bad9STomer Tayar phy_cfg->feature_config_flags); 634cc875c2eSYuval Mintz } else { 635cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 636cc875c2eSYuval Mintz "Resetting link\n"); 637cc875c2eSYuval Mintz } 638cc875c2eSYuval Mintz 6395529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 6405529bad9STomer Tayar mb_params.cmd = cmd; 6415529bad9STomer Tayar mb_params.p_data_src = &union_data; 6425529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 643cc875c2eSYuval Mintz 644cc875c2eSYuval Mintz /* if mcp fails to respond we must abort */ 645cc875c2eSYuval Mintz if (rc) { 646cc875c2eSYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 647cc875c2eSYuval Mintz return rc; 648cc875c2eSYuval Mintz } 649cc875c2eSYuval Mintz 650cc875c2eSYuval Mintz /* Reset the link status if needed */ 651cc875c2eSYuval Mintz if (!b_up) 652cc875c2eSYuval Mintz qed_mcp_handle_link_change(p_hwfn, p_ptt, true); 653cc875c2eSYuval Mintz 654cc875c2eSYuval Mintz return 0; 655cc875c2eSYuval Mintz } 656cc875c2eSYuval Mintz 6574b01e519SManish Chopra static void qed_read_pf_bandwidth(struct qed_hwfn *p_hwfn, 6584b01e519SManish Chopra struct public_func *p_shmem_info) 6594b01e519SManish Chopra { 6604b01e519SManish Chopra struct qed_mcp_function_info *p_info; 6614b01e519SManish Chopra 6624b01e519SManish Chopra p_info = &p_hwfn->mcp_info->func_info; 6634b01e519SManish Chopra 6644b01e519SManish Chopra p_info->bandwidth_min = (p_shmem_info->config & 6654b01e519SManish Chopra FUNC_MF_CFG_MIN_BW_MASK) >> 6664b01e519SManish Chopra FUNC_MF_CFG_MIN_BW_SHIFT; 6674b01e519SManish Chopra if (p_info->bandwidth_min < 1 || p_info->bandwidth_min > 100) { 6684b01e519SManish Chopra DP_INFO(p_hwfn, 6694b01e519SManish Chopra "bandwidth minimum out of bounds [%02x]. Set to 1\n", 6704b01e519SManish Chopra p_info->bandwidth_min); 6714b01e519SManish Chopra p_info->bandwidth_min = 1; 6724b01e519SManish Chopra } 6734b01e519SManish Chopra 6744b01e519SManish Chopra p_info->bandwidth_max = (p_shmem_info->config & 6754b01e519SManish Chopra FUNC_MF_CFG_MAX_BW_MASK) >> 6764b01e519SManish Chopra FUNC_MF_CFG_MAX_BW_SHIFT; 6774b01e519SManish Chopra if (p_info->bandwidth_max < 1 || p_info->bandwidth_max > 100) { 6784b01e519SManish Chopra DP_INFO(p_hwfn, 6794b01e519SManish Chopra "bandwidth maximum out of bounds [%02x]. Set to 100\n", 6804b01e519SManish Chopra p_info->bandwidth_max); 6814b01e519SManish Chopra p_info->bandwidth_max = 100; 6824b01e519SManish Chopra } 6834b01e519SManish Chopra } 6844b01e519SManish Chopra 6854b01e519SManish Chopra static u32 qed_mcp_get_shmem_func(struct qed_hwfn *p_hwfn, 6864b01e519SManish Chopra struct qed_ptt *p_ptt, 6874b01e519SManish Chopra struct public_func *p_data, 6884b01e519SManish Chopra int pfid) 6894b01e519SManish Chopra { 6904b01e519SManish Chopra u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base, 6914b01e519SManish Chopra PUBLIC_FUNC); 6924b01e519SManish Chopra u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr); 6934b01e519SManish Chopra u32 func_addr = SECTION_ADDR(mfw_path_offsize, pfid); 6944b01e519SManish Chopra u32 i, size; 6954b01e519SManish Chopra 6964b01e519SManish Chopra memset(p_data, 0, sizeof(*p_data)); 6974b01e519SManish Chopra 6984b01e519SManish Chopra size = min_t(u32, sizeof(*p_data), 6994b01e519SManish Chopra QED_SECTION_SIZE(mfw_path_offsize)); 7004b01e519SManish Chopra for (i = 0; i < size / sizeof(u32); i++) 7014b01e519SManish Chopra ((u32 *)p_data)[i] = qed_rd(p_hwfn, p_ptt, 7024b01e519SManish Chopra func_addr + (i << 2)); 7034b01e519SManish Chopra return size; 7044b01e519SManish Chopra } 7054b01e519SManish Chopra 7064b01e519SManish Chopra static void qed_mcp_update_bw(struct qed_hwfn *p_hwfn, 7074b01e519SManish Chopra struct qed_ptt *p_ptt) 7084b01e519SManish Chopra { 7094b01e519SManish Chopra struct qed_mcp_function_info *p_info; 7104b01e519SManish Chopra struct public_func shmem_info; 7114b01e519SManish Chopra u32 resp = 0, param = 0; 7124b01e519SManish Chopra 7134b01e519SManish Chopra qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, 7144b01e519SManish Chopra MCP_PF_ID(p_hwfn)); 7154b01e519SManish Chopra 7164b01e519SManish Chopra qed_read_pf_bandwidth(p_hwfn, &shmem_info); 7174b01e519SManish Chopra 7184b01e519SManish Chopra p_info = &p_hwfn->mcp_info->func_info; 7194b01e519SManish Chopra 720a64b02d5SManish Chopra qed_configure_pf_min_bandwidth(p_hwfn->cdev, p_info->bandwidth_min); 7214b01e519SManish Chopra qed_configure_pf_max_bandwidth(p_hwfn->cdev, p_info->bandwidth_max); 7224b01e519SManish Chopra 7234b01e519SManish Chopra /* Acknowledge the MFW */ 7244b01e519SManish Chopra qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BW_UPDATE_ACK, 0, &resp, 7254b01e519SManish Chopra ¶m); 7264b01e519SManish Chopra } 7274b01e519SManish Chopra 728cc875c2eSYuval Mintz int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, 729cc875c2eSYuval Mintz struct qed_ptt *p_ptt) 730cc875c2eSYuval Mintz { 731cc875c2eSYuval Mintz struct qed_mcp_info *info = p_hwfn->mcp_info; 732cc875c2eSYuval Mintz int rc = 0; 733cc875c2eSYuval Mintz bool found = false; 734cc875c2eSYuval Mintz u16 i; 735cc875c2eSYuval Mintz 736cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SP, "Received message from MFW\n"); 737cc875c2eSYuval Mintz 738cc875c2eSYuval Mintz /* Read Messages from MFW */ 739cc875c2eSYuval Mintz qed_mcp_read_mb(p_hwfn, p_ptt); 740cc875c2eSYuval Mintz 741cc875c2eSYuval Mintz /* Compare current messages to old ones */ 742cc875c2eSYuval Mintz for (i = 0; i < info->mfw_mb_length; i++) { 743cc875c2eSYuval Mintz if (info->mfw_mb_cur[i] == info->mfw_mb_shadow[i]) 744cc875c2eSYuval Mintz continue; 745cc875c2eSYuval Mintz 746cc875c2eSYuval Mintz found = true; 747cc875c2eSYuval Mintz 748cc875c2eSYuval Mintz DP_VERBOSE(p_hwfn, NETIF_MSG_LINK, 749cc875c2eSYuval Mintz "Msg [%d] - old CMD 0x%02x, new CMD 0x%02x\n", 750cc875c2eSYuval Mintz i, info->mfw_mb_shadow[i], info->mfw_mb_cur[i]); 751cc875c2eSYuval Mintz 752cc875c2eSYuval Mintz switch (i) { 753cc875c2eSYuval Mintz case MFW_DRV_MSG_LINK_CHANGE: 754cc875c2eSYuval Mintz qed_mcp_handle_link_change(p_hwfn, p_ptt, false); 755cc875c2eSYuval Mintz break; 756334c03b5SZvi Nachmani case MFW_DRV_MSG_TRANSCEIVER_STATE_CHANGE: 757334c03b5SZvi Nachmani qed_mcp_handle_transceiver_change(p_hwfn, p_ptt); 758334c03b5SZvi Nachmani break; 7594b01e519SManish Chopra case MFW_DRV_MSG_BW_UPDATE: 7604b01e519SManish Chopra qed_mcp_update_bw(p_hwfn, p_ptt); 7614b01e519SManish Chopra break; 762cc875c2eSYuval Mintz default: 763cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, "Unimplemented MFW message %d\n", i); 764cc875c2eSYuval Mintz rc = -EINVAL; 765cc875c2eSYuval Mintz } 766cc875c2eSYuval Mintz } 767cc875c2eSYuval Mintz 768cc875c2eSYuval Mintz /* ACK everything */ 769cc875c2eSYuval Mintz for (i = 0; i < MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length); i++) { 770cc875c2eSYuval Mintz __be32 val = cpu_to_be32(((u32 *)info->mfw_mb_cur)[i]); 771cc875c2eSYuval Mintz 772cc875c2eSYuval Mintz /* MFW expect answer in BE, so we force write in that format */ 773cc875c2eSYuval Mintz qed_wr(p_hwfn, p_ptt, 774cc875c2eSYuval Mintz info->mfw_mb_addr + sizeof(u32) + 775cc875c2eSYuval Mintz MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length) * 776cc875c2eSYuval Mintz sizeof(u32) + i * sizeof(u32), 777cc875c2eSYuval Mintz (__force u32)val); 778cc875c2eSYuval Mintz } 779cc875c2eSYuval Mintz 780cc875c2eSYuval Mintz if (!found) { 781cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, 782cc875c2eSYuval Mintz "Received an MFW message indication but no new message!\n"); 783cc875c2eSYuval Mintz rc = -EINVAL; 784cc875c2eSYuval Mintz } 785cc875c2eSYuval Mintz 786cc875c2eSYuval Mintz /* Copy the new mfw messages into the shadow */ 787cc875c2eSYuval Mintz memcpy(info->mfw_mb_shadow, info->mfw_mb_cur, info->mfw_mb_length); 788cc875c2eSYuval Mintz 789cc875c2eSYuval Mintz return rc; 790cc875c2eSYuval Mintz } 791cc875c2eSYuval Mintz 7921408cc1fSYuval Mintz int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, 7931408cc1fSYuval Mintz struct qed_ptt *p_ptt, 7941408cc1fSYuval Mintz u32 *p_mfw_ver, u32 *p_running_bundle_id) 795fe56b9e6SYuval Mintz { 796fe56b9e6SYuval Mintz u32 global_offsize; 797fe56b9e6SYuval Mintz 7981408cc1fSYuval Mintz if (IS_VF(p_hwfn->cdev)) { 7991408cc1fSYuval Mintz if (p_hwfn->vf_iov_info) { 8001408cc1fSYuval Mintz struct pfvf_acquire_resp_tlv *p_resp; 8011408cc1fSYuval Mintz 8021408cc1fSYuval Mintz p_resp = &p_hwfn->vf_iov_info->acquire_resp; 8031408cc1fSYuval Mintz *p_mfw_ver = p_resp->pfdev_info.mfw_ver; 8041408cc1fSYuval Mintz return 0; 8051408cc1fSYuval Mintz } else { 8061408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, 8071408cc1fSYuval Mintz QED_MSG_IOV, 8081408cc1fSYuval Mintz "VF requested MFW version prior to ACQUIRE\n"); 8091408cc1fSYuval Mintz return -EINVAL; 8101408cc1fSYuval Mintz } 8111408cc1fSYuval Mintz } 812fe56b9e6SYuval Mintz 813fe56b9e6SYuval Mintz global_offsize = qed_rd(p_hwfn, p_ptt, 8141408cc1fSYuval Mintz SECTION_OFFSIZE_ADDR(p_hwfn-> 8151408cc1fSYuval Mintz mcp_info->public_base, 816fe56b9e6SYuval Mintz PUBLIC_GLOBAL)); 8171408cc1fSYuval Mintz *p_mfw_ver = 8181408cc1fSYuval Mintz qed_rd(p_hwfn, p_ptt, 8191408cc1fSYuval Mintz SECTION_ADDR(global_offsize, 8201408cc1fSYuval Mintz 0) + offsetof(struct public_global, mfw_ver)); 821fe56b9e6SYuval Mintz 8221408cc1fSYuval Mintz if (p_running_bundle_id != NULL) { 8231408cc1fSYuval Mintz *p_running_bundle_id = qed_rd(p_hwfn, p_ptt, 8241408cc1fSYuval Mintz SECTION_ADDR(global_offsize, 0) + 8251408cc1fSYuval Mintz offsetof(struct public_global, 8261408cc1fSYuval Mintz running_bundle_id)); 8271408cc1fSYuval Mintz } 828fe56b9e6SYuval Mintz 829fe56b9e6SYuval Mintz return 0; 830fe56b9e6SYuval Mintz } 831fe56b9e6SYuval Mintz 832cc875c2eSYuval Mintz int qed_mcp_get_media_type(struct qed_dev *cdev, 833cc875c2eSYuval Mintz u32 *p_media_type) 834cc875c2eSYuval Mintz { 835cc875c2eSYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[0]; 836cc875c2eSYuval Mintz struct qed_ptt *p_ptt; 837cc875c2eSYuval Mintz 8381408cc1fSYuval Mintz if (IS_VF(cdev)) 8391408cc1fSYuval Mintz return -EINVAL; 8401408cc1fSYuval Mintz 841cc875c2eSYuval Mintz if (!qed_mcp_is_init(p_hwfn)) { 842cc875c2eSYuval Mintz DP_NOTICE(p_hwfn, "MFW is not initialized !\n"); 843cc875c2eSYuval Mintz return -EBUSY; 844cc875c2eSYuval Mintz } 845cc875c2eSYuval Mintz 846cc875c2eSYuval Mintz *p_media_type = MEDIA_UNSPECIFIED; 847cc875c2eSYuval Mintz 848cc875c2eSYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn); 849cc875c2eSYuval Mintz if (!p_ptt) 850cc875c2eSYuval Mintz return -EBUSY; 851cc875c2eSYuval Mintz 852cc875c2eSYuval Mintz *p_media_type = qed_rd(p_hwfn, p_ptt, p_hwfn->mcp_info->port_addr + 853cc875c2eSYuval Mintz offsetof(struct public_port, media_type)); 854cc875c2eSYuval Mintz 855cc875c2eSYuval Mintz qed_ptt_release(p_hwfn, p_ptt); 856cc875c2eSYuval Mintz 857cc875c2eSYuval Mintz return 0; 858cc875c2eSYuval Mintz } 859cc875c2eSYuval Mintz 860fe56b9e6SYuval Mintz static int 861fe56b9e6SYuval Mintz qed_mcp_get_shmem_proto(struct qed_hwfn *p_hwfn, 862fe56b9e6SYuval Mintz struct public_func *p_info, 863fe56b9e6SYuval Mintz enum qed_pci_personality *p_proto) 864fe56b9e6SYuval Mintz { 865fe56b9e6SYuval Mintz int rc = 0; 866fe56b9e6SYuval Mintz 867fe56b9e6SYuval Mintz switch (p_info->config & FUNC_MF_CFG_PROTOCOL_MASK) { 868fe56b9e6SYuval Mintz case FUNC_MF_CFG_PROTOCOL_ETHERNET: 869fe56b9e6SYuval Mintz *p_proto = QED_PCI_ETH; 870fe56b9e6SYuval Mintz break; 871fe56b9e6SYuval Mintz default: 872fe56b9e6SYuval Mintz rc = -EINVAL; 873fe56b9e6SYuval Mintz } 874fe56b9e6SYuval Mintz 875fe56b9e6SYuval Mintz return rc; 876fe56b9e6SYuval Mintz } 877fe56b9e6SYuval Mintz 878fe56b9e6SYuval Mintz int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, 879fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 880fe56b9e6SYuval Mintz { 881fe56b9e6SYuval Mintz struct qed_mcp_function_info *info; 882fe56b9e6SYuval Mintz struct public_func shmem_info; 883fe56b9e6SYuval Mintz 884fe56b9e6SYuval Mintz qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, 885fe56b9e6SYuval Mintz MCP_PF_ID(p_hwfn)); 886fe56b9e6SYuval Mintz info = &p_hwfn->mcp_info->func_info; 887fe56b9e6SYuval Mintz 888fe56b9e6SYuval Mintz info->pause_on_host = (shmem_info.config & 889fe56b9e6SYuval Mintz FUNC_MF_CFG_PAUSE_ON_HOST_RING) ? 1 : 0; 890fe56b9e6SYuval Mintz 891fe56b9e6SYuval Mintz if (qed_mcp_get_shmem_proto(p_hwfn, &shmem_info, 892fe56b9e6SYuval Mintz &info->protocol)) { 893fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Unknown personality %08x\n", 894fe56b9e6SYuval Mintz (u32)(shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK)); 895fe56b9e6SYuval Mintz return -EINVAL; 896fe56b9e6SYuval Mintz } 897fe56b9e6SYuval Mintz 8984b01e519SManish Chopra qed_read_pf_bandwidth(p_hwfn, &shmem_info); 899fe56b9e6SYuval Mintz 900fe56b9e6SYuval Mintz if (shmem_info.mac_upper || shmem_info.mac_lower) { 901fe56b9e6SYuval Mintz info->mac[0] = (u8)(shmem_info.mac_upper >> 8); 902fe56b9e6SYuval Mintz info->mac[1] = (u8)(shmem_info.mac_upper); 903fe56b9e6SYuval Mintz info->mac[2] = (u8)(shmem_info.mac_lower >> 24); 904fe56b9e6SYuval Mintz info->mac[3] = (u8)(shmem_info.mac_lower >> 16); 905fe56b9e6SYuval Mintz info->mac[4] = (u8)(shmem_info.mac_lower >> 8); 906fe56b9e6SYuval Mintz info->mac[5] = (u8)(shmem_info.mac_lower); 907fe56b9e6SYuval Mintz } else { 908fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "MAC is 0 in shmem\n"); 909fe56b9e6SYuval Mintz } 910fe56b9e6SYuval Mintz 911fe56b9e6SYuval Mintz info->wwn_port = (u64)shmem_info.fcoe_wwn_port_name_upper | 912fe56b9e6SYuval Mintz (((u64)shmem_info.fcoe_wwn_port_name_lower) << 32); 913fe56b9e6SYuval Mintz info->wwn_node = (u64)shmem_info.fcoe_wwn_node_name_upper | 914fe56b9e6SYuval Mintz (((u64)shmem_info.fcoe_wwn_node_name_lower) << 32); 915fe56b9e6SYuval Mintz 916fe56b9e6SYuval Mintz info->ovlan = (u16)(shmem_info.ovlan_stag & FUNC_MF_CFG_OV_STAG_MASK); 917fe56b9e6SYuval Mintz 918fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_SP | NETIF_MSG_IFUP), 919fe56b9e6SYuval Mintz "Read configuration from shmem: pause_on_host %02x protocol %02x BW [%02x - %02x] MAC %02x:%02x:%02x:%02x:%02x:%02x wwn port %llx node %llx ovlan %04x\n", 920fe56b9e6SYuval Mintz info->pause_on_host, info->protocol, 921fe56b9e6SYuval Mintz info->bandwidth_min, info->bandwidth_max, 922fe56b9e6SYuval Mintz info->mac[0], info->mac[1], info->mac[2], 923fe56b9e6SYuval Mintz info->mac[3], info->mac[4], info->mac[5], 924fe56b9e6SYuval Mintz info->wwn_port, info->wwn_node, info->ovlan); 925fe56b9e6SYuval Mintz 926fe56b9e6SYuval Mintz return 0; 927fe56b9e6SYuval Mintz } 928fe56b9e6SYuval Mintz 929cc875c2eSYuval Mintz struct qed_mcp_link_params 930cc875c2eSYuval Mintz *qed_mcp_get_link_params(struct qed_hwfn *p_hwfn) 931cc875c2eSYuval Mintz { 932cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 933cc875c2eSYuval Mintz return NULL; 934cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_input; 935cc875c2eSYuval Mintz } 936cc875c2eSYuval Mintz 937cc875c2eSYuval Mintz struct qed_mcp_link_state 938cc875c2eSYuval Mintz *qed_mcp_get_link_state(struct qed_hwfn *p_hwfn) 939cc875c2eSYuval Mintz { 940cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 941cc875c2eSYuval Mintz return NULL; 942cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_output; 943cc875c2eSYuval Mintz } 944cc875c2eSYuval Mintz 945cc875c2eSYuval Mintz struct qed_mcp_link_capabilities 946cc875c2eSYuval Mintz *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn) 947cc875c2eSYuval Mintz { 948cc875c2eSYuval Mintz if (!p_hwfn || !p_hwfn->mcp_info) 949cc875c2eSYuval Mintz return NULL; 950cc875c2eSYuval Mintz return &p_hwfn->mcp_info->link_capabilities; 951cc875c2eSYuval Mintz } 952cc875c2eSYuval Mintz 953fe56b9e6SYuval Mintz int qed_mcp_drain(struct qed_hwfn *p_hwfn, 954fe56b9e6SYuval Mintz struct qed_ptt *p_ptt) 955fe56b9e6SYuval Mintz { 956fe56b9e6SYuval Mintz u32 resp = 0, param = 0; 957fe56b9e6SYuval Mintz int rc; 958fe56b9e6SYuval Mintz 959fe56b9e6SYuval Mintz rc = qed_mcp_cmd(p_hwfn, p_ptt, 9608f60bafeSYuval Mintz DRV_MSG_CODE_NIG_DRAIN, 1000, 961fe56b9e6SYuval Mintz &resp, ¶m); 962fe56b9e6SYuval Mintz 963fe56b9e6SYuval Mintz /* Wait for the drain to complete before returning */ 9648f60bafeSYuval Mintz msleep(1020); 965fe56b9e6SYuval Mintz 966fe56b9e6SYuval Mintz return rc; 967fe56b9e6SYuval Mintz } 968fe56b9e6SYuval Mintz 969cee4d264SManish Chopra int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, 970cee4d264SManish Chopra struct qed_ptt *p_ptt, 971cee4d264SManish Chopra u32 *p_flash_size) 972cee4d264SManish Chopra { 973cee4d264SManish Chopra u32 flash_size; 974cee4d264SManish Chopra 9751408cc1fSYuval Mintz if (IS_VF(p_hwfn->cdev)) 9761408cc1fSYuval Mintz return -EINVAL; 9771408cc1fSYuval Mintz 978cee4d264SManish Chopra flash_size = qed_rd(p_hwfn, p_ptt, MCP_REG_NVM_CFG4); 979cee4d264SManish Chopra flash_size = (flash_size & MCP_REG_NVM_CFG4_FLASH_SIZE) >> 980cee4d264SManish Chopra MCP_REG_NVM_CFG4_FLASH_SIZE_SHIFT; 981cee4d264SManish Chopra flash_size = (1 << (flash_size + MCP_BYTES_PER_MBIT_SHIFT)); 982cee4d264SManish Chopra 983cee4d264SManish Chopra *p_flash_size = flash_size; 984cee4d264SManish Chopra 985cee4d264SManish Chopra return 0; 986cee4d264SManish Chopra } 987cee4d264SManish Chopra 9881408cc1fSYuval Mintz int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, 9891408cc1fSYuval Mintz struct qed_ptt *p_ptt, u8 vf_id, u8 num) 9901408cc1fSYuval Mintz { 9911408cc1fSYuval Mintz u32 resp = 0, param = 0, rc_param = 0; 9921408cc1fSYuval Mintz int rc; 9931408cc1fSYuval Mintz 9941408cc1fSYuval Mintz /* Only Leader can configure MSIX, and need to take CMT into account */ 9951408cc1fSYuval Mintz if (!IS_LEAD_HWFN(p_hwfn)) 9961408cc1fSYuval Mintz return 0; 9971408cc1fSYuval Mintz num *= p_hwfn->cdev->num_hwfns; 9981408cc1fSYuval Mintz 9991408cc1fSYuval Mintz param |= (vf_id << DRV_MB_PARAM_CFG_VF_MSIX_VF_ID_SHIFT) & 10001408cc1fSYuval Mintz DRV_MB_PARAM_CFG_VF_MSIX_VF_ID_MASK; 10011408cc1fSYuval Mintz param |= (num << DRV_MB_PARAM_CFG_VF_MSIX_SB_NUM_SHIFT) & 10021408cc1fSYuval Mintz DRV_MB_PARAM_CFG_VF_MSIX_SB_NUM_MASK; 10031408cc1fSYuval Mintz 10041408cc1fSYuval Mintz rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_CFG_VF_MSIX, param, 10051408cc1fSYuval Mintz &resp, &rc_param); 10061408cc1fSYuval Mintz 10071408cc1fSYuval Mintz if (resp != FW_MSG_CODE_DRV_CFG_VF_MSIX_DONE) { 10081408cc1fSYuval Mintz DP_NOTICE(p_hwfn, "VF[%d]: MFW failed to set MSI-X\n", vf_id); 10091408cc1fSYuval Mintz rc = -EINVAL; 10101408cc1fSYuval Mintz } else { 10111408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 10121408cc1fSYuval Mintz "Requested 0x%02x MSI-x interrupts from VF 0x%02x\n", 10131408cc1fSYuval Mintz num, vf_id); 10141408cc1fSYuval Mintz } 10151408cc1fSYuval Mintz 10161408cc1fSYuval Mintz return rc; 10171408cc1fSYuval Mintz } 10181408cc1fSYuval Mintz 1019fe56b9e6SYuval Mintz int 1020fe56b9e6SYuval Mintz qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, 1021fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 1022fe56b9e6SYuval Mintz struct qed_mcp_drv_version *p_ver) 1023fe56b9e6SYuval Mintz { 10245529bad9STomer Tayar struct drv_version_stc *p_drv_version; 10255529bad9STomer Tayar struct qed_mcp_mb_params mb_params; 10265529bad9STomer Tayar union drv_union_data union_data; 10275529bad9STomer Tayar __be32 val; 10285529bad9STomer Tayar u32 i; 10295529bad9STomer Tayar int rc; 1030fe56b9e6SYuval Mintz 10315529bad9STomer Tayar p_drv_version = &union_data.drv_version; 10325529bad9STomer Tayar p_drv_version->version = p_ver->version; 10334b01e519SManish Chopra 10345529bad9STomer Tayar for (i = 0; i < MCP_DRV_VER_STR_SIZE - 1; i += 4) { 10355529bad9STomer Tayar val = cpu_to_be32(p_ver->name[i]); 10364b01e519SManish Chopra *(__be32 *)&p_drv_version->name[i * sizeof(u32)] = val; 1037fe56b9e6SYuval Mintz } 1038fe56b9e6SYuval Mintz 10395529bad9STomer Tayar memset(&mb_params, 0, sizeof(mb_params)); 10405529bad9STomer Tayar mb_params.cmd = DRV_MSG_CODE_SET_VERSION; 10415529bad9STomer Tayar mb_params.p_data_src = &union_data; 10425529bad9STomer Tayar rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params); 10435529bad9STomer Tayar if (rc) 1044fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "MCP response failure, aborting\n"); 1045fe56b9e6SYuval Mintz 10465529bad9STomer Tayar return rc; 1047fe56b9e6SYuval Mintz } 104891420b83SSudarsana Kalluru 104991420b83SSudarsana Kalluru int qed_mcp_set_led(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 105091420b83SSudarsana Kalluru enum qed_led_mode mode) 105191420b83SSudarsana Kalluru { 105291420b83SSudarsana Kalluru u32 resp = 0, param = 0, drv_mb_param; 105391420b83SSudarsana Kalluru int rc; 105491420b83SSudarsana Kalluru 105591420b83SSudarsana Kalluru switch (mode) { 105691420b83SSudarsana Kalluru case QED_LED_MODE_ON: 105791420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_ON; 105891420b83SSudarsana Kalluru break; 105991420b83SSudarsana Kalluru case QED_LED_MODE_OFF: 106091420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_OFF; 106191420b83SSudarsana Kalluru break; 106291420b83SSudarsana Kalluru case QED_LED_MODE_RESTORE: 106391420b83SSudarsana Kalluru drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_OPER; 106491420b83SSudarsana Kalluru break; 106591420b83SSudarsana Kalluru default: 106691420b83SSudarsana Kalluru DP_NOTICE(p_hwfn, "Invalid LED mode %d\n", mode); 106791420b83SSudarsana Kalluru return -EINVAL; 106891420b83SSudarsana Kalluru } 106991420b83SSudarsana Kalluru 107091420b83SSudarsana Kalluru rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LED_MODE, 107191420b83SSudarsana Kalluru drv_mb_param, &resp, ¶m); 107291420b83SSudarsana Kalluru 107391420b83SSudarsana Kalluru return rc; 107491420b83SSudarsana Kalluru } 107503dc76caSSudarsana Reddy Kalluru 107603dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 107703dc76caSSudarsana Reddy Kalluru { 107803dc76caSSudarsana Reddy Kalluru u32 drv_mb_param = 0, rsp, param; 107903dc76caSSudarsana Reddy Kalluru int rc = 0; 108003dc76caSSudarsana Reddy Kalluru 108103dc76caSSudarsana Reddy Kalluru drv_mb_param = (DRV_MB_PARAM_BIST_REGISTER_TEST << 108203dc76caSSudarsana Reddy Kalluru DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT); 108303dc76caSSudarsana Reddy Kalluru 108403dc76caSSudarsana Reddy Kalluru rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST, 108503dc76caSSudarsana Reddy Kalluru drv_mb_param, &rsp, ¶m); 108603dc76caSSudarsana Reddy Kalluru 108703dc76caSSudarsana Reddy Kalluru if (rc) 108803dc76caSSudarsana Reddy Kalluru return rc; 108903dc76caSSudarsana Reddy Kalluru 109003dc76caSSudarsana Reddy Kalluru if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) || 109103dc76caSSudarsana Reddy Kalluru (param != DRV_MB_PARAM_BIST_RC_PASSED)) 109203dc76caSSudarsana Reddy Kalluru rc = -EAGAIN; 109303dc76caSSudarsana Reddy Kalluru 109403dc76caSSudarsana Reddy Kalluru return rc; 109503dc76caSSudarsana Reddy Kalluru } 109603dc76caSSudarsana Reddy Kalluru 109703dc76caSSudarsana Reddy Kalluru int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 109803dc76caSSudarsana Reddy Kalluru { 109903dc76caSSudarsana Reddy Kalluru u32 drv_mb_param, rsp, param; 110003dc76caSSudarsana Reddy Kalluru int rc = 0; 110103dc76caSSudarsana Reddy Kalluru 110203dc76caSSudarsana Reddy Kalluru drv_mb_param = (DRV_MB_PARAM_BIST_CLOCK_TEST << 110303dc76caSSudarsana Reddy Kalluru DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT); 110403dc76caSSudarsana Reddy Kalluru 110503dc76caSSudarsana Reddy Kalluru rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST, 110603dc76caSSudarsana Reddy Kalluru drv_mb_param, &rsp, ¶m); 110703dc76caSSudarsana Reddy Kalluru 110803dc76caSSudarsana Reddy Kalluru if (rc) 110903dc76caSSudarsana Reddy Kalluru return rc; 111003dc76caSSudarsana Reddy Kalluru 111103dc76caSSudarsana Reddy Kalluru if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) || 111203dc76caSSudarsana Reddy Kalluru (param != DRV_MB_PARAM_BIST_RC_PASSED)) 111303dc76caSSudarsana Reddy Kalluru rc = -EAGAIN; 111403dc76caSSudarsana Reddy Kalluru 111503dc76caSSudarsana Reddy Kalluru return rc; 111603dc76caSSudarsana Reddy Kalluru } 1117