1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/if_vlan.h> 37 #include <linux/kernel.h> 38 #include <linux/pci.h> 39 #include <linux/slab.h> 40 #include <linux/stddef.h> 41 #include <linux/workqueue.h> 42 #include <net/ipv6.h> 43 #include <linux/bitops.h> 44 #include <linux/delay.h> 45 #include <linux/errno.h> 46 #include <linux/etherdevice.h> 47 #include <linux/io.h> 48 #include <linux/list.h> 49 #include <linux/mutex.h> 50 #include <linux/spinlock.h> 51 #include <linux/string.h> 52 #include <linux/qed/qed_ll2_if.h> 53 #include "qed.h" 54 #include "qed_cxt.h" 55 #include "qed_dev_api.h" 56 #include "qed_hsi.h" 57 #include "qed_hw.h" 58 #include "qed_int.h" 59 #include "qed_ll2.h" 60 #include "qed_mcp.h" 61 #include "qed_ooo.h" 62 #include "qed_reg_addr.h" 63 #include "qed_sp.h" 64 #include "qed_rdma.h" 65 66 #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred) 67 #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred) 68 69 #define QED_LL2_TX_SIZE (256) 70 #define QED_LL2_RX_SIZE (4096) 71 72 struct qed_cb_ll2_info { 73 int rx_cnt; 74 u32 rx_size; 75 u8 handle; 76 77 /* Lock protecting LL2 buffer lists in sleepless context */ 78 spinlock_t lock; 79 struct list_head list; 80 81 const struct qed_ll2_cb_ops *cbs; 82 void *cb_cookie; 83 }; 84 85 struct qed_ll2_buffer { 86 struct list_head list; 87 void *data; 88 dma_addr_t phys_addr; 89 }; 90 91 static void qed_ll2b_complete_tx_packet(void *cxt, 92 u8 connection_handle, 93 void *cookie, 94 dma_addr_t first_frag_addr, 95 bool b_last_fragment, 96 bool b_last_packet) 97 { 98 struct qed_hwfn *p_hwfn = cxt; 99 struct qed_dev *cdev = p_hwfn->cdev; 100 struct sk_buff *skb = cookie; 101 102 /* All we need to do is release the mapping */ 103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr, 104 skb_headlen(skb), DMA_TO_DEVICE); 105 106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb) 107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb, 108 b_last_fragment); 109 110 dev_kfree_skb_any(skb); 111 } 112 113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev, 114 u8 **data, dma_addr_t *phys_addr) 115 { 116 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC); 117 if (!(*data)) { 118 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n"); 119 return -ENOMEM; 120 } 121 122 *phys_addr = dma_map_single(&cdev->pdev->dev, 123 ((*data) + NET_SKB_PAD), 124 cdev->ll2->rx_size, DMA_FROM_DEVICE); 125 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) { 126 DP_INFO(cdev, "Failed to map LL2 buffer data\n"); 127 kfree((*data)); 128 return -ENOMEM; 129 } 130 131 return 0; 132 } 133 134 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev, 135 struct qed_ll2_buffer *buffer) 136 { 137 spin_lock_bh(&cdev->ll2->lock); 138 139 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 140 cdev->ll2->rx_size, DMA_FROM_DEVICE); 141 kfree(buffer->data); 142 list_del(&buffer->list); 143 144 cdev->ll2->rx_cnt--; 145 if (!cdev->ll2->rx_cnt) 146 DP_INFO(cdev, "All LL2 entries were removed\n"); 147 148 spin_unlock_bh(&cdev->ll2->lock); 149 150 return 0; 151 } 152 153 static void qed_ll2_kill_buffers(struct qed_dev *cdev) 154 { 155 struct qed_ll2_buffer *buffer, *tmp_buffer; 156 157 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) 158 qed_ll2_dealloc_buffer(cdev, buffer); 159 } 160 161 void qed_ll2b_complete_rx_packet(void *cxt, struct qed_ll2_comp_rx_data *data) 162 { 163 struct qed_hwfn *p_hwfn = cxt; 164 struct qed_ll2_buffer *buffer = data->cookie; 165 struct qed_dev *cdev = p_hwfn->cdev; 166 dma_addr_t new_phys_addr; 167 struct sk_buff *skb; 168 bool reuse = false; 169 int rc = -EINVAL; 170 u8 *new_data; 171 172 DP_VERBOSE(p_hwfn, 173 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA), 174 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n", 175 (u64)data->rx_buf_addr, 176 data->u.placement_offset, 177 data->length.packet_length, 178 data->parse_flags, 179 data->vlan, data->opaque_data_0, data->opaque_data_1); 180 181 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) { 182 print_hex_dump(KERN_INFO, "", 183 DUMP_PREFIX_OFFSET, 16, 1, 184 buffer->data, data->length.packet_length, false); 185 } 186 187 /* Determine if data is valid */ 188 if (data->length.packet_length < ETH_HLEN) 189 reuse = true; 190 191 /* Allocate a replacement for buffer; Reuse upon failure */ 192 if (!reuse) 193 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data, 194 &new_phys_addr); 195 196 /* If need to reuse or there's no replacement buffer, repost this */ 197 if (rc) 198 goto out_post; 199 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 200 cdev->ll2->rx_size, DMA_FROM_DEVICE); 201 202 skb = build_skb(buffer->data, 0); 203 if (!skb) { 204 rc = -ENOMEM; 205 goto out_post; 206 } 207 208 data->u.placement_offset += NET_SKB_PAD; 209 skb_reserve(skb, data->u.placement_offset); 210 skb_put(skb, data->length.packet_length); 211 skb_checksum_none_assert(skb); 212 213 /* Get parital ethernet information instead of eth_type_trans(), 214 * Since we don't have an associated net_device. 215 */ 216 skb_reset_mac_header(skb); 217 skb->protocol = eth_hdr(skb)->h_proto; 218 219 /* Pass SKB onward */ 220 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) { 221 if (data->vlan) 222 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 223 data->vlan); 224 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb, 225 data->opaque_data_0, 226 data->opaque_data_1); 227 } 228 229 /* Update Buffer information and update FW producer */ 230 buffer->data = new_data; 231 buffer->phys_addr = new_phys_addr; 232 233 out_post: 234 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle, 235 buffer->phys_addr, 0, buffer, 1); 236 237 if (rc) 238 qed_ll2_dealloc_buffer(cdev, buffer); 239 } 240 241 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 242 u8 connection_handle, 243 bool b_lock, 244 bool b_only_active) 245 { 246 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL; 247 248 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) 249 return NULL; 250 251 if (!p_hwfn->p_ll2_info) 252 return NULL; 253 254 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 255 256 if (b_only_active) { 257 if (b_lock) 258 mutex_lock(&p_ll2_conn->mutex); 259 if (p_ll2_conn->b_active) 260 p_ret = p_ll2_conn; 261 if (b_lock) 262 mutex_unlock(&p_ll2_conn->mutex); 263 } else { 264 p_ret = p_ll2_conn; 265 } 266 267 return p_ret; 268 } 269 270 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 271 u8 connection_handle) 272 { 273 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true); 274 } 275 276 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn, 277 u8 connection_handle) 278 { 279 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true); 280 } 281 282 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn 283 *p_hwfn, 284 u8 connection_handle) 285 { 286 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false); 287 } 288 289 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 290 { 291 bool b_last_packet = false, b_last_frag = false; 292 struct qed_ll2_tx_packet *p_pkt = NULL; 293 struct qed_ll2_info *p_ll2_conn; 294 struct qed_ll2_tx_queue *p_tx; 295 unsigned long flags = 0; 296 dma_addr_t tx_frag; 297 298 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 299 if (!p_ll2_conn) 300 return; 301 302 p_tx = &p_ll2_conn->tx_queue; 303 304 spin_lock_irqsave(&p_tx->lock, flags); 305 while (!list_empty(&p_tx->active_descq)) { 306 p_pkt = list_first_entry(&p_tx->active_descq, 307 struct qed_ll2_tx_packet, list_entry); 308 if (!p_pkt) 309 break; 310 311 list_del(&p_pkt->list_entry); 312 b_last_packet = list_empty(&p_tx->active_descq); 313 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 314 spin_unlock_irqrestore(&p_tx->lock, flags); 315 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 316 struct qed_ooo_buffer *p_buffer; 317 318 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 319 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 320 p_buffer); 321 } else { 322 p_tx->cur_completing_packet = *p_pkt; 323 p_tx->cur_completing_bd_idx = 1; 324 b_last_frag = 325 p_tx->cur_completing_bd_idx == p_pkt->bd_used; 326 tx_frag = p_pkt->bds_set[0].tx_frag; 327 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie, 328 p_ll2_conn->my_id, 329 p_pkt->cookie, 330 tx_frag, 331 b_last_frag, 332 b_last_packet); 333 } 334 spin_lock_irqsave(&p_tx->lock, flags); 335 } 336 spin_unlock_irqrestore(&p_tx->lock, flags); 337 } 338 339 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 340 { 341 struct qed_ll2_info *p_ll2_conn = p_cookie; 342 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 343 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0; 344 struct qed_ll2_tx_packet *p_pkt; 345 bool b_last_frag = false; 346 unsigned long flags; 347 int rc = -EINVAL; 348 349 spin_lock_irqsave(&p_tx->lock, flags); 350 if (p_tx->b_completing_packet) { 351 rc = -EBUSY; 352 goto out; 353 } 354 355 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 356 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 357 while (num_bds) { 358 if (list_empty(&p_tx->active_descq)) 359 goto out; 360 361 p_pkt = list_first_entry(&p_tx->active_descq, 362 struct qed_ll2_tx_packet, list_entry); 363 if (!p_pkt) 364 goto out; 365 366 p_tx->b_completing_packet = true; 367 p_tx->cur_completing_packet = *p_pkt; 368 num_bds_in_packet = p_pkt->bd_used; 369 list_del(&p_pkt->list_entry); 370 371 if (num_bds < num_bds_in_packet) { 372 DP_NOTICE(p_hwfn, 373 "Rest of BDs does not cover whole packet\n"); 374 goto out; 375 } 376 377 num_bds -= num_bds_in_packet; 378 p_tx->bds_idx += num_bds_in_packet; 379 while (num_bds_in_packet--) 380 qed_chain_consume(&p_tx->txq_chain); 381 382 p_tx->cur_completing_bd_idx = 1; 383 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used; 384 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 385 386 spin_unlock_irqrestore(&p_tx->lock, flags); 387 388 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie, 389 p_ll2_conn->my_id, 390 p_pkt->cookie, 391 p_pkt->bds_set[0].tx_frag, 392 b_last_frag, !num_bds); 393 394 spin_lock_irqsave(&p_tx->lock, flags); 395 } 396 397 p_tx->b_completing_packet = false; 398 rc = 0; 399 out: 400 spin_unlock_irqrestore(&p_tx->lock, flags); 401 return rc; 402 } 403 404 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn, 405 union core_rx_cqe_union *p_cqe, 406 struct qed_ll2_comp_rx_data *data) 407 { 408 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags); 409 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length); 410 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan); 411 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi); 412 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo); 413 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error; 414 data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id); 415 416 data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp); 417 } 418 419 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn, 420 union core_rx_cqe_union *p_cqe, 421 struct qed_ll2_comp_rx_data *data) 422 { 423 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags); 424 data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags); 425 data->length.packet_length = 426 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length); 427 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan); 428 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]); 429 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]); 430 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset; 431 } 432 433 static int 434 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn, 435 struct qed_ll2_info *p_ll2_conn, 436 union core_rx_cqe_union *p_cqe, 437 unsigned long *p_lock_flags) 438 { 439 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 440 struct core_rx_slow_path_cqe *sp_cqe; 441 442 sp_cqe = &p_cqe->rx_cqe_sp; 443 if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) { 444 DP_NOTICE(p_hwfn, 445 "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n", 446 sp_cqe->ramrod_cmd_id); 447 return -EINVAL; 448 } 449 450 if (!p_ll2_conn->cbs.slowpath_cb) { 451 DP_NOTICE(p_hwfn, 452 "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n"); 453 return -EINVAL; 454 } 455 456 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 457 458 p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie, 459 p_ll2_conn->my_id, 460 le32_to_cpu(sp_cqe->opaque_data.data[0]), 461 le32_to_cpu(sp_cqe->opaque_data.data[1])); 462 463 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 464 465 return 0; 466 } 467 468 static int 469 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn, 470 struct qed_ll2_info *p_ll2_conn, 471 union core_rx_cqe_union *p_cqe, 472 unsigned long *p_lock_flags, bool b_last_cqe) 473 { 474 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 475 struct qed_ll2_rx_packet *p_pkt = NULL; 476 struct qed_ll2_comp_rx_data data; 477 478 if (!list_empty(&p_rx->active_descq)) 479 p_pkt = list_first_entry(&p_rx->active_descq, 480 struct qed_ll2_rx_packet, list_entry); 481 if (!p_pkt) { 482 DP_NOTICE(p_hwfn, 483 "[%d] LL2 Rx completion but active_descq is empty\n", 484 p_ll2_conn->input.conn_type); 485 486 return -EIO; 487 } 488 list_del(&p_pkt->list_entry); 489 490 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR) 491 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data); 492 else 493 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data); 494 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd) 495 DP_NOTICE(p_hwfn, 496 "Mismatch between active_descq and the LL2 Rx chain\n"); 497 498 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 499 500 data.connection_handle = p_ll2_conn->my_id; 501 data.cookie = p_pkt->cookie; 502 data.rx_buf_addr = p_pkt->rx_buf_addr; 503 data.b_last_packet = b_last_cqe; 504 505 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 506 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data); 507 508 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 509 510 return 0; 511 } 512 513 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie) 514 { 515 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie; 516 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 517 union core_rx_cqe_union *cqe = NULL; 518 u16 cq_new_idx = 0, cq_old_idx = 0; 519 unsigned long flags = 0; 520 int rc = 0; 521 522 spin_lock_irqsave(&p_rx->lock, flags); 523 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 524 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 525 526 while (cq_new_idx != cq_old_idx) { 527 bool b_last_cqe = (cq_new_idx == cq_old_idx); 528 529 cqe = 530 (union core_rx_cqe_union *) 531 qed_chain_consume(&p_rx->rcq_chain); 532 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 533 534 DP_VERBOSE(p_hwfn, 535 QED_MSG_LL2, 536 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n", 537 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type); 538 539 switch (cqe->rx_cqe_sp.type) { 540 case CORE_RX_CQE_TYPE_SLOW_PATH: 541 rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn, 542 cqe, &flags); 543 break; 544 case CORE_RX_CQE_TYPE_GSI_OFFLOAD: 545 case CORE_RX_CQE_TYPE_REGULAR: 546 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn, 547 cqe, &flags, 548 b_last_cqe); 549 break; 550 default: 551 rc = -EIO; 552 } 553 } 554 555 spin_unlock_irqrestore(&p_rx->lock, flags); 556 return rc; 557 } 558 559 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 560 { 561 struct qed_ll2_info *p_ll2_conn = NULL; 562 struct qed_ll2_rx_packet *p_pkt = NULL; 563 struct qed_ll2_rx_queue *p_rx; 564 unsigned long flags = 0; 565 566 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 567 if (!p_ll2_conn) 568 return; 569 570 p_rx = &p_ll2_conn->rx_queue; 571 572 spin_lock_irqsave(&p_rx->lock, flags); 573 while (!list_empty(&p_rx->active_descq)) { 574 p_pkt = list_first_entry(&p_rx->active_descq, 575 struct qed_ll2_rx_packet, list_entry); 576 if (!p_pkt) 577 break; 578 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq); 579 spin_unlock_irqrestore(&p_rx->lock, flags); 580 581 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 582 struct qed_ooo_buffer *p_buffer; 583 584 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 585 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 586 p_buffer); 587 } else { 588 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr; 589 void *cookie = p_pkt->cookie; 590 bool b_last; 591 592 b_last = list_empty(&p_rx->active_descq); 593 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie, 594 p_ll2_conn->my_id, 595 cookie, 596 rx_buf_addr, b_last); 597 } 598 spin_lock_irqsave(&p_rx->lock, flags); 599 } 600 spin_unlock_irqrestore(&p_rx->lock, flags); 601 } 602 603 static bool 604 qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn *p_hwfn, 605 struct core_rx_slow_path_cqe *p_cqe) 606 { 607 struct ooo_opaque *iscsi_ooo; 608 u32 cid; 609 610 if (p_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) 611 return false; 612 613 iscsi_ooo = (struct ooo_opaque *)&p_cqe->opaque_data; 614 if (iscsi_ooo->ooo_opcode != TCP_EVENT_DELETE_ISLES) 615 return false; 616 617 /* Need to make a flush */ 618 cid = le32_to_cpu(iscsi_ooo->cid); 619 qed_ooo_release_connection_isles(p_hwfn, p_hwfn->p_ooo_info, cid); 620 621 return true; 622 } 623 624 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn, 625 struct qed_ll2_info *p_ll2_conn) 626 { 627 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 628 u16 packet_length = 0, parse_flags = 0, vlan = 0; 629 struct qed_ll2_rx_packet *p_pkt = NULL; 630 u32 num_ooo_add_to_peninsula = 0, cid; 631 union core_rx_cqe_union *cqe = NULL; 632 u16 cq_new_idx = 0, cq_old_idx = 0; 633 struct qed_ooo_buffer *p_buffer; 634 struct ooo_opaque *iscsi_ooo; 635 u8 placement_offset = 0; 636 u8 cqe_type; 637 638 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 639 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 640 if (cq_new_idx == cq_old_idx) 641 return 0; 642 643 while (cq_new_idx != cq_old_idx) { 644 struct core_rx_fast_path_cqe *p_cqe_fp; 645 646 cqe = qed_chain_consume(&p_rx->rcq_chain); 647 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 648 cqe_type = cqe->rx_cqe_sp.type; 649 650 if (cqe_type == CORE_RX_CQE_TYPE_SLOW_PATH) 651 if (qed_ll2_lb_rxq_handler_slowpath(p_hwfn, 652 &cqe->rx_cqe_sp)) 653 continue; 654 655 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) { 656 DP_NOTICE(p_hwfn, 657 "Got a non-regular LB LL2 completion [type 0x%02x]\n", 658 cqe_type); 659 return -EINVAL; 660 } 661 p_cqe_fp = &cqe->rx_cqe_fp; 662 663 placement_offset = p_cqe_fp->placement_offset; 664 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags); 665 packet_length = le16_to_cpu(p_cqe_fp->packet_length); 666 vlan = le16_to_cpu(p_cqe_fp->vlan); 667 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data; 668 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info, 669 iscsi_ooo); 670 cid = le32_to_cpu(iscsi_ooo->cid); 671 672 /* Process delete isle first */ 673 if (iscsi_ooo->drop_size) 674 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid, 675 iscsi_ooo->drop_isle, 676 iscsi_ooo->drop_size); 677 678 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP) 679 continue; 680 681 /* Now process create/add/join isles */ 682 if (list_empty(&p_rx->active_descq)) { 683 DP_NOTICE(p_hwfn, 684 "LL2 OOO RX chain has no submitted buffers\n" 685 ); 686 return -EIO; 687 } 688 689 p_pkt = list_first_entry(&p_rx->active_descq, 690 struct qed_ll2_rx_packet, list_entry); 691 692 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) || 693 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) || 694 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) || 695 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) || 696 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) { 697 if (!p_pkt) { 698 DP_NOTICE(p_hwfn, 699 "LL2 OOO RX packet is not valid\n"); 700 return -EIO; 701 } 702 list_del(&p_pkt->list_entry); 703 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 704 p_buffer->packet_length = packet_length; 705 p_buffer->parse_flags = parse_flags; 706 p_buffer->vlan = vlan; 707 p_buffer->placement_offset = placement_offset; 708 qed_chain_consume(&p_rx->rxq_chain); 709 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 710 711 switch (iscsi_ooo->ooo_opcode) { 712 case TCP_EVENT_ADD_NEW_ISLE: 713 qed_ooo_add_new_isle(p_hwfn, 714 p_hwfn->p_ooo_info, 715 cid, 716 iscsi_ooo->ooo_isle, 717 p_buffer); 718 break; 719 case TCP_EVENT_ADD_ISLE_RIGHT: 720 qed_ooo_add_new_buffer(p_hwfn, 721 p_hwfn->p_ooo_info, 722 cid, 723 iscsi_ooo->ooo_isle, 724 p_buffer, 725 QED_OOO_RIGHT_BUF); 726 break; 727 case TCP_EVENT_ADD_ISLE_LEFT: 728 qed_ooo_add_new_buffer(p_hwfn, 729 p_hwfn->p_ooo_info, 730 cid, 731 iscsi_ooo->ooo_isle, 732 p_buffer, 733 QED_OOO_LEFT_BUF); 734 break; 735 case TCP_EVENT_JOIN: 736 qed_ooo_add_new_buffer(p_hwfn, 737 p_hwfn->p_ooo_info, 738 cid, 739 iscsi_ooo->ooo_isle + 740 1, 741 p_buffer, 742 QED_OOO_LEFT_BUF); 743 qed_ooo_join_isles(p_hwfn, 744 p_hwfn->p_ooo_info, 745 cid, iscsi_ooo->ooo_isle); 746 break; 747 case TCP_EVENT_ADD_PEN: 748 num_ooo_add_to_peninsula++; 749 qed_ooo_put_ready_buffer(p_hwfn, 750 p_hwfn->p_ooo_info, 751 p_buffer, true); 752 break; 753 } 754 } else { 755 DP_NOTICE(p_hwfn, 756 "Unexpected event (%d) TX OOO completion\n", 757 iscsi_ooo->ooo_opcode); 758 } 759 } 760 761 return 0; 762 } 763 764 static void 765 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn, 766 struct qed_ll2_info *p_ll2_conn) 767 { 768 struct qed_ll2_tx_pkt_info tx_pkt; 769 struct qed_ooo_buffer *p_buffer; 770 u16 l4_hdr_offset_w; 771 dma_addr_t first_frag; 772 u8 bd_flags; 773 int rc; 774 775 /* Submit Tx buffers here */ 776 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn, 777 p_hwfn->p_ooo_info))) { 778 l4_hdr_offset_w = 0; 779 bd_flags = 0; 780 781 first_frag = p_buffer->rx_buffer_phys_addr + 782 p_buffer->placement_offset; 783 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1); 784 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1); 785 786 memset(&tx_pkt, 0, sizeof(tx_pkt)); 787 tx_pkt.num_of_bds = 1; 788 tx_pkt.vlan = p_buffer->vlan; 789 tx_pkt.bd_flags = bd_flags; 790 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w; 791 tx_pkt.tx_dest = p_ll2_conn->tx_dest; 792 tx_pkt.first_frag = first_frag; 793 tx_pkt.first_frag_len = p_buffer->packet_length; 794 tx_pkt.cookie = p_buffer; 795 796 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id, 797 &tx_pkt, true); 798 if (rc) { 799 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info, 800 p_buffer, false); 801 break; 802 } 803 } 804 } 805 806 static void 807 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn, 808 struct qed_ll2_info *p_ll2_conn) 809 { 810 struct qed_ooo_buffer *p_buffer; 811 int rc; 812 813 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 814 p_hwfn->p_ooo_info))) { 815 rc = qed_ll2_post_rx_buffer(p_hwfn, 816 p_ll2_conn->my_id, 817 p_buffer->rx_buffer_phys_addr, 818 0, p_buffer, true); 819 if (rc) { 820 qed_ooo_put_free_buffer(p_hwfn, 821 p_hwfn->p_ooo_info, p_buffer); 822 break; 823 } 824 } 825 } 826 827 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 828 { 829 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 830 int rc; 831 832 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) 833 return 0; 834 835 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn); 836 if (rc) 837 return rc; 838 839 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 840 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 841 842 return 0; 843 } 844 845 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 846 { 847 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 848 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 849 struct qed_ll2_tx_packet *p_pkt = NULL; 850 struct qed_ooo_buffer *p_buffer; 851 bool b_dont_submit_rx = false; 852 u16 new_idx = 0, num_bds = 0; 853 int rc; 854 855 if (!QED_LL2_TX_REGISTERED(p_ll2_conn)) 856 return 0; 857 858 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 859 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 860 861 if (!num_bds) 862 return 0; 863 864 while (num_bds) { 865 if (list_empty(&p_tx->active_descq)) 866 return -EINVAL; 867 868 p_pkt = list_first_entry(&p_tx->active_descq, 869 struct qed_ll2_tx_packet, list_entry); 870 if (!p_pkt) 871 return -EINVAL; 872 873 if (p_pkt->bd_used != 1) { 874 DP_NOTICE(p_hwfn, 875 "Unexpectedly many BDs(%d) in TX OOO completion\n", 876 p_pkt->bd_used); 877 return -EINVAL; 878 } 879 880 list_del(&p_pkt->list_entry); 881 882 num_bds--; 883 p_tx->bds_idx++; 884 qed_chain_consume(&p_tx->txq_chain); 885 886 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 887 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 888 889 if (b_dont_submit_rx) { 890 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 891 p_buffer); 892 continue; 893 } 894 895 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id, 896 p_buffer->rx_buffer_phys_addr, 0, 897 p_buffer, true); 898 if (rc != 0) { 899 qed_ooo_put_free_buffer(p_hwfn, 900 p_hwfn->p_ooo_info, p_buffer); 901 b_dont_submit_rx = true; 902 } 903 } 904 905 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 906 907 return 0; 908 } 909 910 static void qed_ll2_stop_ooo(struct qed_dev *cdev) 911 { 912 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 913 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 914 915 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n", 916 *handle); 917 918 qed_ll2_terminate_connection(hwfn, *handle); 919 qed_ll2_release_connection(hwfn, *handle); 920 *handle = QED_LL2_UNUSED_HANDLE; 921 } 922 923 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn, 924 struct qed_ll2_info *p_ll2_conn, 925 u8 action_on_error) 926 { 927 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 928 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 929 struct core_rx_start_ramrod_data *p_ramrod = NULL; 930 struct qed_spq_entry *p_ent = NULL; 931 struct qed_sp_init_data init_data; 932 u16 cqe_pbl_size; 933 int rc = 0; 934 935 /* Get SPQ entry */ 936 memset(&init_data, 0, sizeof(init_data)); 937 init_data.cid = p_ll2_conn->cid; 938 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 939 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 940 941 rc = qed_sp_init_request(p_hwfn, &p_ent, 942 CORE_RAMROD_RX_QUEUE_START, 943 PROTOCOLID_CORE, &init_data); 944 if (rc) 945 return rc; 946 947 p_ramrod = &p_ent->ramrod.core_rx_queue_start; 948 949 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 950 p_ramrod->sb_index = p_rx->rx_sb_index; 951 p_ramrod->complete_event_flg = 1; 952 953 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 954 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr); 955 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain); 956 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size); 957 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, 958 qed_chain_get_pbl_phys(&p_rx->rcq_chain)); 959 960 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg; 961 p_ramrod->inner_vlan_stripping_en = 962 p_ll2_conn->input.rx_vlan_removal_en; 963 964 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && 965 p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) 966 p_ramrod->report_outer_vlan = 1; 967 p_ramrod->queue_id = p_ll2_conn->queue_id; 968 p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0; 969 970 if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) && 971 p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE && 972 conn_type != QED_LL2_TYPE_IWARP) { 973 p_ramrod->mf_si_bcast_accept_all = 1; 974 p_ramrod->mf_si_mcast_accept_all = 1; 975 } else { 976 p_ramrod->mf_si_bcast_accept_all = 0; 977 p_ramrod->mf_si_mcast_accept_all = 0; 978 } 979 980 p_ramrod->action_on_error.error_type = action_on_error; 981 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 982 return qed_spq_post(p_hwfn, p_ent, NULL); 983 } 984 985 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn, 986 struct qed_ll2_info *p_ll2_conn) 987 { 988 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 989 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 990 struct core_tx_start_ramrod_data *p_ramrod = NULL; 991 struct qed_spq_entry *p_ent = NULL; 992 struct qed_sp_init_data init_data; 993 u16 pq_id = 0, pbl_size; 994 int rc = -EINVAL; 995 996 if (!QED_LL2_TX_REGISTERED(p_ll2_conn)) 997 return 0; 998 999 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 1000 p_ll2_conn->tx_stats_en = 0; 1001 else 1002 p_ll2_conn->tx_stats_en = 1; 1003 1004 /* Get SPQ entry */ 1005 memset(&init_data, 0, sizeof(init_data)); 1006 init_data.cid = p_ll2_conn->cid; 1007 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1008 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1009 1010 rc = qed_sp_init_request(p_hwfn, &p_ent, 1011 CORE_RAMROD_TX_QUEUE_START, 1012 PROTOCOLID_CORE, &init_data); 1013 if (rc) 1014 return rc; 1015 1016 p_ramrod = &p_ent->ramrod.core_tx_queue_start; 1017 1018 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 1019 p_ramrod->sb_index = p_tx->tx_sb_index; 1020 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 1021 p_ramrod->stats_en = p_ll2_conn->tx_stats_en; 1022 p_ramrod->stats_id = p_ll2_conn->tx_stats_id; 1023 1024 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, 1025 qed_chain_get_pbl_phys(&p_tx->txq_chain)); 1026 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain); 1027 p_ramrod->pbl_size = cpu_to_le16(pbl_size); 1028 1029 switch (p_ll2_conn->input.tx_tc) { 1030 case PURE_LB_TC: 1031 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB); 1032 break; 1033 case PKT_LB_TC: 1034 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO); 1035 break; 1036 default: 1037 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD); 1038 break; 1039 } 1040 1041 p_ramrod->qm_pq_id = cpu_to_le16(pq_id); 1042 1043 switch (conn_type) { 1044 case QED_LL2_TYPE_FCOE: 1045 p_ramrod->conn_type = PROTOCOLID_FCOE; 1046 break; 1047 case QED_LL2_TYPE_ISCSI: 1048 p_ramrod->conn_type = PROTOCOLID_ISCSI; 1049 break; 1050 case QED_LL2_TYPE_ROCE: 1051 p_ramrod->conn_type = PROTOCOLID_ROCE; 1052 break; 1053 case QED_LL2_TYPE_IWARP: 1054 p_ramrod->conn_type = PROTOCOLID_IWARP; 1055 break; 1056 case QED_LL2_TYPE_OOO: 1057 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) 1058 p_ramrod->conn_type = PROTOCOLID_ISCSI; 1059 else 1060 p_ramrod->conn_type = PROTOCOLID_IWARP; 1061 break; 1062 default: 1063 p_ramrod->conn_type = PROTOCOLID_ETH; 1064 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type); 1065 } 1066 1067 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 1068 1069 return qed_spq_post(p_hwfn, p_ent, NULL); 1070 } 1071 1072 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn, 1073 struct qed_ll2_info *p_ll2_conn) 1074 { 1075 struct core_rx_stop_ramrod_data *p_ramrod = NULL; 1076 struct qed_spq_entry *p_ent = NULL; 1077 struct qed_sp_init_data init_data; 1078 int rc = -EINVAL; 1079 1080 /* Get SPQ entry */ 1081 memset(&init_data, 0, sizeof(init_data)); 1082 init_data.cid = p_ll2_conn->cid; 1083 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1084 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1085 1086 rc = qed_sp_init_request(p_hwfn, &p_ent, 1087 CORE_RAMROD_RX_QUEUE_STOP, 1088 PROTOCOLID_CORE, &init_data); 1089 if (rc) 1090 return rc; 1091 1092 p_ramrod = &p_ent->ramrod.core_rx_queue_stop; 1093 1094 p_ramrod->complete_event_flg = 1; 1095 p_ramrod->queue_id = p_ll2_conn->queue_id; 1096 1097 return qed_spq_post(p_hwfn, p_ent, NULL); 1098 } 1099 1100 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn, 1101 struct qed_ll2_info *p_ll2_conn) 1102 { 1103 struct qed_spq_entry *p_ent = NULL; 1104 struct qed_sp_init_data init_data; 1105 int rc = -EINVAL; 1106 1107 /* Get SPQ entry */ 1108 memset(&init_data, 0, sizeof(init_data)); 1109 init_data.cid = p_ll2_conn->cid; 1110 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1111 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1112 1113 rc = qed_sp_init_request(p_hwfn, &p_ent, 1114 CORE_RAMROD_TX_QUEUE_STOP, 1115 PROTOCOLID_CORE, &init_data); 1116 if (rc) 1117 return rc; 1118 1119 return qed_spq_post(p_hwfn, p_ent, NULL); 1120 } 1121 1122 static int 1123 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn, 1124 struct qed_ll2_info *p_ll2_info) 1125 { 1126 struct qed_ll2_rx_packet *p_descq; 1127 u32 capacity; 1128 int rc = 0; 1129 1130 if (!p_ll2_info->input.rx_num_desc) 1131 goto out; 1132 1133 rc = qed_chain_alloc(p_hwfn->cdev, 1134 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1135 QED_CHAIN_MODE_NEXT_PTR, 1136 QED_CHAIN_CNT_TYPE_U16, 1137 p_ll2_info->input.rx_num_desc, 1138 sizeof(struct core_rx_bd), 1139 &p_ll2_info->rx_queue.rxq_chain, NULL); 1140 if (rc) { 1141 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n"); 1142 goto out; 1143 } 1144 1145 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain); 1146 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet), 1147 GFP_KERNEL); 1148 if (!p_descq) { 1149 rc = -ENOMEM; 1150 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n"); 1151 goto out; 1152 } 1153 p_ll2_info->rx_queue.descq_array = p_descq; 1154 1155 rc = qed_chain_alloc(p_hwfn->cdev, 1156 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1157 QED_CHAIN_MODE_PBL, 1158 QED_CHAIN_CNT_TYPE_U16, 1159 p_ll2_info->input.rx_num_desc, 1160 sizeof(struct core_rx_fast_path_cqe), 1161 &p_ll2_info->rx_queue.rcq_chain, NULL); 1162 if (rc) { 1163 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n"); 1164 goto out; 1165 } 1166 1167 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1168 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n", 1169 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc); 1170 1171 out: 1172 return rc; 1173 } 1174 1175 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn, 1176 struct qed_ll2_info *p_ll2_info) 1177 { 1178 struct qed_ll2_tx_packet *p_descq; 1179 u32 desc_size; 1180 u32 capacity; 1181 int rc = 0; 1182 1183 if (!p_ll2_info->input.tx_num_desc) 1184 goto out; 1185 1186 rc = qed_chain_alloc(p_hwfn->cdev, 1187 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1188 QED_CHAIN_MODE_PBL, 1189 QED_CHAIN_CNT_TYPE_U16, 1190 p_ll2_info->input.tx_num_desc, 1191 sizeof(struct core_tx_bd), 1192 &p_ll2_info->tx_queue.txq_chain, NULL); 1193 if (rc) 1194 goto out; 1195 1196 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain); 1197 /* First element is part of the packet, rest are flexibly added */ 1198 desc_size = (sizeof(*p_descq) + 1199 (p_ll2_info->input.tx_max_bds_per_packet - 1) * 1200 sizeof(p_descq->bds_set)); 1201 1202 p_descq = kcalloc(capacity, desc_size, GFP_KERNEL); 1203 if (!p_descq) { 1204 rc = -ENOMEM; 1205 goto out; 1206 } 1207 p_ll2_info->tx_queue.descq_mem = p_descq; 1208 1209 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1210 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n", 1211 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc); 1212 1213 out: 1214 if (rc) 1215 DP_NOTICE(p_hwfn, 1216 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n", 1217 p_ll2_info->input.tx_num_desc); 1218 return rc; 1219 } 1220 1221 static int 1222 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn, 1223 struct qed_ll2_info *p_ll2_info, u16 mtu) 1224 { 1225 struct qed_ooo_buffer *p_buf = NULL; 1226 void *p_virt; 1227 u16 buf_idx; 1228 int rc = 0; 1229 1230 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO) 1231 return rc; 1232 1233 /* Correct number of requested OOO buffers if needed */ 1234 if (!p_ll2_info->input.rx_num_ooo_buffers) { 1235 u16 num_desc = p_ll2_info->input.rx_num_desc; 1236 1237 if (!num_desc) 1238 return -EINVAL; 1239 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2; 1240 } 1241 1242 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers; 1243 buf_idx++) { 1244 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL); 1245 if (!p_buf) { 1246 rc = -ENOMEM; 1247 goto out; 1248 } 1249 1250 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE; 1251 p_buf->rx_buffer_size = (p_buf->rx_buffer_size + 1252 ETH_CACHE_LINE_SIZE - 1) & 1253 ~(ETH_CACHE_LINE_SIZE - 1); 1254 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 1255 p_buf->rx_buffer_size, 1256 &p_buf->rx_buffer_phys_addr, 1257 GFP_KERNEL); 1258 if (!p_virt) { 1259 kfree(p_buf); 1260 rc = -ENOMEM; 1261 goto out; 1262 } 1263 1264 p_buf->rx_buffer_virt_addr = p_virt; 1265 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf); 1266 } 1267 1268 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1269 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n", 1270 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size); 1271 1272 out: 1273 return rc; 1274 } 1275 1276 static int 1277 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs) 1278 { 1279 if (!cbs || (!cbs->rx_comp_cb || 1280 !cbs->rx_release_cb || 1281 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie)) 1282 return -EINVAL; 1283 1284 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb; 1285 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb; 1286 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb; 1287 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb; 1288 p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb; 1289 p_ll2_info->cbs.cookie = cbs->cookie; 1290 1291 return 0; 1292 } 1293 1294 static enum core_error_handle 1295 qed_ll2_get_error_choice(enum qed_ll2_error_handle err) 1296 { 1297 switch (err) { 1298 case QED_LL2_DROP_PACKET: 1299 return LL2_DROP_PACKET; 1300 case QED_LL2_DO_NOTHING: 1301 return LL2_DO_NOTHING; 1302 case QED_LL2_ASSERT: 1303 return LL2_ASSERT; 1304 default: 1305 return LL2_DO_NOTHING; 1306 } 1307 } 1308 1309 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data) 1310 { 1311 struct qed_hwfn *p_hwfn = cxt; 1312 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb; 1313 struct qed_ll2_info *p_ll2_info = NULL; 1314 u8 i, *p_tx_max; 1315 int rc; 1316 1317 if (!data->p_connection_handle || !p_hwfn->p_ll2_info) 1318 return -EINVAL; 1319 1320 /* Find a free connection to be used */ 1321 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) { 1322 mutex_lock(&p_hwfn->p_ll2_info[i].mutex); 1323 if (p_hwfn->p_ll2_info[i].b_active) { 1324 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1325 continue; 1326 } 1327 1328 p_hwfn->p_ll2_info[i].b_active = true; 1329 p_ll2_info = &p_hwfn->p_ll2_info[i]; 1330 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1331 break; 1332 } 1333 if (!p_ll2_info) 1334 return -EBUSY; 1335 1336 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input)); 1337 1338 switch (data->input.tx_dest) { 1339 case QED_LL2_TX_DEST_NW: 1340 p_ll2_info->tx_dest = CORE_TX_DEST_NW; 1341 break; 1342 case QED_LL2_TX_DEST_LB: 1343 p_ll2_info->tx_dest = CORE_TX_DEST_LB; 1344 break; 1345 case QED_LL2_TX_DEST_DROP: 1346 p_ll2_info->tx_dest = CORE_TX_DEST_DROP; 1347 break; 1348 default: 1349 return -EINVAL; 1350 } 1351 1352 if (data->input.conn_type == QED_LL2_TYPE_OOO || 1353 data->input.secondary_queue) 1354 p_ll2_info->main_func_queue = false; 1355 else 1356 p_ll2_info->main_func_queue = true; 1357 1358 /* Correct maximum number of Tx BDs */ 1359 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet; 1360 if (*p_tx_max == 0) 1361 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET; 1362 else 1363 *p_tx_max = min_t(u8, *p_tx_max, 1364 CORE_LL2_TX_MAX_BDS_PER_PACKET); 1365 1366 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs); 1367 if (rc) { 1368 DP_NOTICE(p_hwfn, "Invalid callback functions\n"); 1369 goto q_allocate_fail; 1370 } 1371 1372 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info); 1373 if (rc) 1374 goto q_allocate_fail; 1375 1376 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info); 1377 if (rc) 1378 goto q_allocate_fail; 1379 1380 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info, 1381 data->input.mtu); 1382 if (rc) 1383 goto q_allocate_fail; 1384 1385 /* Register callbacks for the Rx/Tx queues */ 1386 if (data->input.conn_type == QED_LL2_TYPE_OOO) { 1387 comp_rx_cb = qed_ll2_lb_rxq_completion; 1388 comp_tx_cb = qed_ll2_lb_txq_completion; 1389 } else { 1390 comp_rx_cb = qed_ll2_rxq_completion; 1391 comp_tx_cb = qed_ll2_txq_completion; 1392 } 1393 1394 if (data->input.rx_num_desc) { 1395 qed_int_register_cb(p_hwfn, comp_rx_cb, 1396 &p_hwfn->p_ll2_info[i], 1397 &p_ll2_info->rx_queue.rx_sb_index, 1398 &p_ll2_info->rx_queue.p_fw_cons); 1399 p_ll2_info->rx_queue.b_cb_registred = true; 1400 } 1401 1402 if (data->input.tx_num_desc) { 1403 qed_int_register_cb(p_hwfn, 1404 comp_tx_cb, 1405 &p_hwfn->p_ll2_info[i], 1406 &p_ll2_info->tx_queue.tx_sb_index, 1407 &p_ll2_info->tx_queue.p_fw_cons); 1408 p_ll2_info->tx_queue.b_cb_registred = true; 1409 } 1410 1411 *data->p_connection_handle = i; 1412 return rc; 1413 1414 q_allocate_fail: 1415 qed_ll2_release_connection(p_hwfn, i); 1416 return -ENOMEM; 1417 } 1418 1419 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn, 1420 struct qed_ll2_info *p_ll2_conn) 1421 { 1422 enum qed_ll2_error_handle error_input; 1423 enum core_error_handle error_mode; 1424 u8 action_on_error = 0; 1425 1426 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) 1427 return 0; 1428 1429 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0); 1430 error_input = p_ll2_conn->input.ai_err_packet_too_big; 1431 error_mode = qed_ll2_get_error_choice(error_input); 1432 SET_FIELD(action_on_error, 1433 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode); 1434 error_input = p_ll2_conn->input.ai_err_no_buf; 1435 error_mode = qed_ll2_get_error_choice(error_input); 1436 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode); 1437 1438 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error); 1439 } 1440 1441 static void 1442 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn, 1443 struct qed_ll2_info *p_ll2_conn) 1444 { 1445 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1446 return; 1447 1448 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1449 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 1450 } 1451 1452 int qed_ll2_establish_connection(void *cxt, u8 connection_handle) 1453 { 1454 struct qed_hwfn *p_hwfn = cxt; 1455 struct qed_ll2_info *p_ll2_conn; 1456 struct qed_ll2_tx_packet *p_pkt; 1457 struct qed_ll2_rx_queue *p_rx; 1458 struct qed_ll2_tx_queue *p_tx; 1459 struct qed_ptt *p_ptt; 1460 int rc = -EINVAL; 1461 u32 i, capacity; 1462 u32 desc_size; 1463 u8 qid; 1464 1465 p_ptt = qed_ptt_acquire(p_hwfn); 1466 if (!p_ptt) 1467 return -EAGAIN; 1468 1469 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1470 if (!p_ll2_conn) { 1471 rc = -EINVAL; 1472 goto out; 1473 } 1474 1475 p_rx = &p_ll2_conn->rx_queue; 1476 p_tx = &p_ll2_conn->tx_queue; 1477 1478 qed_chain_reset(&p_rx->rxq_chain); 1479 qed_chain_reset(&p_rx->rcq_chain); 1480 INIT_LIST_HEAD(&p_rx->active_descq); 1481 INIT_LIST_HEAD(&p_rx->free_descq); 1482 INIT_LIST_HEAD(&p_rx->posting_descq); 1483 spin_lock_init(&p_rx->lock); 1484 capacity = qed_chain_get_capacity(&p_rx->rxq_chain); 1485 for (i = 0; i < capacity; i++) 1486 list_add_tail(&p_rx->descq_array[i].list_entry, 1487 &p_rx->free_descq); 1488 *p_rx->p_fw_cons = 0; 1489 1490 qed_chain_reset(&p_tx->txq_chain); 1491 INIT_LIST_HEAD(&p_tx->active_descq); 1492 INIT_LIST_HEAD(&p_tx->free_descq); 1493 INIT_LIST_HEAD(&p_tx->sending_descq); 1494 spin_lock_init(&p_tx->lock); 1495 capacity = qed_chain_get_capacity(&p_tx->txq_chain); 1496 /* First element is part of the packet, rest are flexibly added */ 1497 desc_size = (sizeof(*p_pkt) + 1498 (p_ll2_conn->input.tx_max_bds_per_packet - 1) * 1499 sizeof(p_pkt->bds_set)); 1500 1501 for (i = 0; i < capacity; i++) { 1502 p_pkt = p_tx->descq_mem + desc_size * i; 1503 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 1504 } 1505 p_tx->cur_completing_bd_idx = 0; 1506 p_tx->bds_idx = 0; 1507 p_tx->b_completing_packet = false; 1508 p_tx->cur_send_packet = NULL; 1509 p_tx->cur_send_frag_num = 0; 1510 p_tx->cur_completing_frag_num = 0; 1511 *p_tx->p_fw_cons = 0; 1512 1513 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid); 1514 if (rc) 1515 goto out; 1516 1517 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle; 1518 p_ll2_conn->queue_id = qid; 1519 p_ll2_conn->tx_stats_id = qid; 1520 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview + 1521 GTT_BAR0_MAP_REG_TSDM_RAM + 1522 TSTORM_LL2_RX_PRODS_OFFSET(qid); 1523 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells + 1524 qed_db_addr(p_ll2_conn->cid, 1525 DQ_DEMS_LEGACY); 1526 1527 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn); 1528 if (rc) 1529 goto out; 1530 1531 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn); 1532 if (rc) 1533 goto out; 1534 1535 if (!QED_IS_RDMA_PERSONALITY(p_hwfn)) 1536 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1); 1537 1538 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn); 1539 1540 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1541 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) 1542 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1543 ETH_P_FCOE, 0, 1544 QED_LLH_FILTER_ETHERTYPE); 1545 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1546 ETH_P_FIP, 0, 1547 QED_LLH_FILTER_ETHERTYPE); 1548 } 1549 1550 out: 1551 qed_ptt_release(p_hwfn, p_ptt); 1552 return rc; 1553 } 1554 1555 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn, 1556 struct qed_ll2_rx_queue *p_rx, 1557 struct qed_ll2_rx_packet *p_curp) 1558 { 1559 struct qed_ll2_rx_packet *p_posting_packet = NULL; 1560 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 }; 1561 bool b_notify_fw = false; 1562 u16 bd_prod, cq_prod; 1563 1564 /* This handles the flushing of already posted buffers */ 1565 while (!list_empty(&p_rx->posting_descq)) { 1566 p_posting_packet = list_first_entry(&p_rx->posting_descq, 1567 struct qed_ll2_rx_packet, 1568 list_entry); 1569 list_move_tail(&p_posting_packet->list_entry, 1570 &p_rx->active_descq); 1571 b_notify_fw = true; 1572 } 1573 1574 /* This handles the supplied packet [if there is one] */ 1575 if (p_curp) { 1576 list_add_tail(&p_curp->list_entry, &p_rx->active_descq); 1577 b_notify_fw = true; 1578 } 1579 1580 if (!b_notify_fw) 1581 return; 1582 1583 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain); 1584 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain); 1585 rx_prod.bd_prod = cpu_to_le16(bd_prod); 1586 rx_prod.cqe_prod = cpu_to_le16(cq_prod); 1587 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod)); 1588 } 1589 1590 int qed_ll2_post_rx_buffer(void *cxt, 1591 u8 connection_handle, 1592 dma_addr_t addr, 1593 u16 buf_len, void *cookie, u8 notify_fw) 1594 { 1595 struct qed_hwfn *p_hwfn = cxt; 1596 struct core_rx_bd_with_buff_len *p_curb = NULL; 1597 struct qed_ll2_rx_packet *p_curp = NULL; 1598 struct qed_ll2_info *p_ll2_conn; 1599 struct qed_ll2_rx_queue *p_rx; 1600 unsigned long flags; 1601 void *p_data; 1602 int rc = 0; 1603 1604 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1605 if (!p_ll2_conn) 1606 return -EINVAL; 1607 p_rx = &p_ll2_conn->rx_queue; 1608 1609 spin_lock_irqsave(&p_rx->lock, flags); 1610 if (!list_empty(&p_rx->free_descq)) 1611 p_curp = list_first_entry(&p_rx->free_descq, 1612 struct qed_ll2_rx_packet, list_entry); 1613 if (p_curp) { 1614 if (qed_chain_get_elem_left(&p_rx->rxq_chain) && 1615 qed_chain_get_elem_left(&p_rx->rcq_chain)) { 1616 p_data = qed_chain_produce(&p_rx->rxq_chain); 1617 p_curb = (struct core_rx_bd_with_buff_len *)p_data; 1618 qed_chain_produce(&p_rx->rcq_chain); 1619 } 1620 } 1621 1622 /* If we're lacking entires, let's try to flush buffers to FW */ 1623 if (!p_curp || !p_curb) { 1624 rc = -EBUSY; 1625 p_curp = NULL; 1626 goto out_notify; 1627 } 1628 1629 /* We have an Rx packet we can fill */ 1630 DMA_REGPAIR_LE(p_curb->addr, addr); 1631 p_curb->buff_length = cpu_to_le16(buf_len); 1632 p_curp->rx_buf_addr = addr; 1633 p_curp->cookie = cookie; 1634 p_curp->rxq_bd = p_curb; 1635 p_curp->buf_length = buf_len; 1636 list_del(&p_curp->list_entry); 1637 1638 /* Check if we only want to enqueue this packet without informing FW */ 1639 if (!notify_fw) { 1640 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq); 1641 goto out; 1642 } 1643 1644 out_notify: 1645 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp); 1646 out: 1647 spin_unlock_irqrestore(&p_rx->lock, flags); 1648 return rc; 1649 } 1650 1651 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn, 1652 struct qed_ll2_tx_queue *p_tx, 1653 struct qed_ll2_tx_packet *p_curp, 1654 struct qed_ll2_tx_pkt_info *pkt, 1655 u8 notify_fw) 1656 { 1657 list_del(&p_curp->list_entry); 1658 p_curp->cookie = pkt->cookie; 1659 p_curp->bd_used = pkt->num_of_bds; 1660 p_curp->notify_fw = notify_fw; 1661 p_tx->cur_send_packet = p_curp; 1662 p_tx->cur_send_frag_num = 0; 1663 1664 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag; 1665 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len; 1666 p_tx->cur_send_frag_num++; 1667 } 1668 1669 static void 1670 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn, 1671 struct qed_ll2_info *p_ll2, 1672 struct qed_ll2_tx_packet *p_curp, 1673 struct qed_ll2_tx_pkt_info *pkt) 1674 { 1675 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain; 1676 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain); 1677 struct core_tx_bd *start_bd = NULL; 1678 enum core_roce_flavor_type roce_flavor; 1679 enum core_tx_dest tx_dest; 1680 u16 bd_data = 0, frag_idx; 1681 1682 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE 1683 : CORE_RROCE; 1684 1685 switch (pkt->tx_dest) { 1686 case QED_LL2_TX_DEST_NW: 1687 tx_dest = CORE_TX_DEST_NW; 1688 break; 1689 case QED_LL2_TX_DEST_LB: 1690 tx_dest = CORE_TX_DEST_LB; 1691 break; 1692 case QED_LL2_TX_DEST_DROP: 1693 tx_dest = CORE_TX_DEST_DROP; 1694 break; 1695 default: 1696 tx_dest = CORE_TX_DEST_LB; 1697 break; 1698 } 1699 1700 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1701 if (QED_IS_IWARP_PERSONALITY(p_hwfn) && 1702 p_ll2->input.conn_type == QED_LL2_TYPE_OOO) { 1703 start_bd->nw_vlan_or_lb_echo = 1704 cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE); 1705 } else { 1706 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan); 1707 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && 1708 p_ll2->input.conn_type == QED_LL2_TYPE_FCOE) 1709 pkt->remove_stag = true; 1710 } 1711 1712 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, 1713 cpu_to_le16(pkt->l4_hdr_offset_w)); 1714 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest); 1715 bd_data |= pkt->bd_flags; 1716 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1); 1717 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds); 1718 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor); 1719 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum)); 1720 SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum)); 1721 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len)); 1722 SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION, 1723 !!(pkt->remove_stag)); 1724 1725 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data); 1726 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag); 1727 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len); 1728 1729 DP_VERBOSE(p_hwfn, 1730 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1731 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n", 1732 p_ll2->queue_id, 1733 p_ll2->cid, 1734 p_ll2->input.conn_type, 1735 prod_idx, 1736 pkt->first_frag_len, 1737 pkt->num_of_bds, 1738 le32_to_cpu(start_bd->addr.hi), 1739 le32_to_cpu(start_bd->addr.lo)); 1740 1741 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds) 1742 return; 1743 1744 /* Need to provide the packet with additional BDs for frags */ 1745 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num; 1746 frag_idx < pkt->num_of_bds; frag_idx++) { 1747 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd; 1748 1749 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1750 (*p_bd)->bd_data.as_bitfield = 0; 1751 (*p_bd)->bitfield1 = 0; 1752 p_curp->bds_set[frag_idx].tx_frag = 0; 1753 p_curp->bds_set[frag_idx].frag_len = 0; 1754 } 1755 } 1756 1757 /* This should be called while the Txq spinlock is being held */ 1758 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn, 1759 struct qed_ll2_info *p_ll2_conn) 1760 { 1761 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw; 1762 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 1763 struct qed_ll2_tx_packet *p_pkt = NULL; 1764 struct core_db_data db_msg = { 0, 0, 0 }; 1765 u16 bd_prod; 1766 1767 /* If there are missing BDs, don't do anything now */ 1768 if (p_ll2_conn->tx_queue.cur_send_frag_num != 1769 p_ll2_conn->tx_queue.cur_send_packet->bd_used) 1770 return; 1771 1772 /* Push the current packet to the list and clean after it */ 1773 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry, 1774 &p_ll2_conn->tx_queue.sending_descq); 1775 p_ll2_conn->tx_queue.cur_send_packet = NULL; 1776 p_ll2_conn->tx_queue.cur_send_frag_num = 0; 1777 1778 /* Notify FW of packet only if requested to */ 1779 if (!b_notify) 1780 return; 1781 1782 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain); 1783 1784 while (!list_empty(&p_tx->sending_descq)) { 1785 p_pkt = list_first_entry(&p_tx->sending_descq, 1786 struct qed_ll2_tx_packet, list_entry); 1787 if (!p_pkt) 1788 break; 1789 1790 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq); 1791 } 1792 1793 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM); 1794 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 1795 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL, 1796 DQ_XCM_CORE_TX_BD_PROD_CMD); 1797 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD; 1798 db_msg.spq_prod = cpu_to_le16(bd_prod); 1799 1800 /* Make sure the BDs data is updated before ringing the doorbell */ 1801 wmb(); 1802 1803 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg)); 1804 1805 DP_VERBOSE(p_hwfn, 1806 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1807 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n", 1808 p_ll2_conn->queue_id, 1809 p_ll2_conn->cid, 1810 p_ll2_conn->input.conn_type, db_msg.spq_prod); 1811 } 1812 1813 int qed_ll2_prepare_tx_packet(void *cxt, 1814 u8 connection_handle, 1815 struct qed_ll2_tx_pkt_info *pkt, 1816 bool notify_fw) 1817 { 1818 struct qed_hwfn *p_hwfn = cxt; 1819 struct qed_ll2_tx_packet *p_curp = NULL; 1820 struct qed_ll2_info *p_ll2_conn = NULL; 1821 struct qed_ll2_tx_queue *p_tx; 1822 struct qed_chain *p_tx_chain; 1823 unsigned long flags; 1824 int rc = 0; 1825 1826 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1827 if (!p_ll2_conn) 1828 return -EINVAL; 1829 p_tx = &p_ll2_conn->tx_queue; 1830 p_tx_chain = &p_tx->txq_chain; 1831 1832 if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet) 1833 return -EIO; 1834 1835 spin_lock_irqsave(&p_tx->lock, flags); 1836 if (p_tx->cur_send_packet) { 1837 rc = -EEXIST; 1838 goto out; 1839 } 1840 1841 /* Get entry, but only if we have tx elements for it */ 1842 if (!list_empty(&p_tx->free_descq)) 1843 p_curp = list_first_entry(&p_tx->free_descq, 1844 struct qed_ll2_tx_packet, list_entry); 1845 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds) 1846 p_curp = NULL; 1847 1848 if (!p_curp) { 1849 rc = -EBUSY; 1850 goto out; 1851 } 1852 1853 /* Prepare packet and BD, and perhaps send a doorbell to FW */ 1854 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw); 1855 1856 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt); 1857 1858 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1859 1860 out: 1861 spin_unlock_irqrestore(&p_tx->lock, flags); 1862 return rc; 1863 } 1864 1865 int qed_ll2_set_fragment_of_tx_packet(void *cxt, 1866 u8 connection_handle, 1867 dma_addr_t addr, u16 nbytes) 1868 { 1869 struct qed_ll2_tx_packet *p_cur_send_packet = NULL; 1870 struct qed_hwfn *p_hwfn = cxt; 1871 struct qed_ll2_info *p_ll2_conn = NULL; 1872 u16 cur_send_frag_num = 0; 1873 struct core_tx_bd *p_bd; 1874 unsigned long flags; 1875 1876 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1877 if (!p_ll2_conn) 1878 return -EINVAL; 1879 1880 if (!p_ll2_conn->tx_queue.cur_send_packet) 1881 return -EINVAL; 1882 1883 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet; 1884 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num; 1885 1886 if (cur_send_frag_num >= p_cur_send_packet->bd_used) 1887 return -EINVAL; 1888 1889 /* Fill the BD information, and possibly notify FW */ 1890 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd; 1891 DMA_REGPAIR_LE(p_bd->addr, addr); 1892 p_bd->nbytes = cpu_to_le16(nbytes); 1893 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr; 1894 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes; 1895 1896 p_ll2_conn->tx_queue.cur_send_frag_num++; 1897 1898 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags); 1899 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1900 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags); 1901 1902 return 0; 1903 } 1904 1905 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle) 1906 { 1907 struct qed_hwfn *p_hwfn = cxt; 1908 struct qed_ll2_info *p_ll2_conn = NULL; 1909 int rc = -EINVAL; 1910 struct qed_ptt *p_ptt; 1911 1912 p_ptt = qed_ptt_acquire(p_hwfn); 1913 if (!p_ptt) 1914 return -EAGAIN; 1915 1916 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1917 if (!p_ll2_conn) { 1918 rc = -EINVAL; 1919 goto out; 1920 } 1921 1922 /* Stop Tx & Rx of connection, if needed */ 1923 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1924 p_ll2_conn->tx_queue.b_cb_registred = false; 1925 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */ 1926 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn); 1927 if (rc) 1928 goto out; 1929 1930 qed_ll2_txq_flush(p_hwfn, connection_handle); 1931 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index); 1932 } 1933 1934 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1935 p_ll2_conn->rx_queue.b_cb_registred = false; 1936 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */ 1937 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn); 1938 if (rc) 1939 goto out; 1940 1941 qed_ll2_rxq_flush(p_hwfn, connection_handle); 1942 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index); 1943 } 1944 1945 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 1946 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1947 1948 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1949 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) 1950 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1951 ETH_P_FCOE, 0, 1952 QED_LLH_FILTER_ETHERTYPE); 1953 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1954 ETH_P_FIP, 0, 1955 QED_LLH_FILTER_ETHERTYPE); 1956 } 1957 1958 out: 1959 qed_ptt_release(p_hwfn, p_ptt); 1960 return rc; 1961 } 1962 1963 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn, 1964 struct qed_ll2_info *p_ll2_conn) 1965 { 1966 struct qed_ooo_buffer *p_buffer; 1967 1968 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1969 return; 1970 1971 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1972 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 1973 p_hwfn->p_ooo_info))) { 1974 dma_free_coherent(&p_hwfn->cdev->pdev->dev, 1975 p_buffer->rx_buffer_size, 1976 p_buffer->rx_buffer_virt_addr, 1977 p_buffer->rx_buffer_phys_addr); 1978 kfree(p_buffer); 1979 } 1980 } 1981 1982 void qed_ll2_release_connection(void *cxt, u8 connection_handle) 1983 { 1984 struct qed_hwfn *p_hwfn = cxt; 1985 struct qed_ll2_info *p_ll2_conn = NULL; 1986 1987 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1988 if (!p_ll2_conn) 1989 return; 1990 1991 kfree(p_ll2_conn->tx_queue.descq_mem); 1992 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain); 1993 1994 kfree(p_ll2_conn->rx_queue.descq_array); 1995 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain); 1996 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain); 1997 1998 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid); 1999 2000 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn); 2001 2002 mutex_lock(&p_ll2_conn->mutex); 2003 p_ll2_conn->b_active = false; 2004 mutex_unlock(&p_ll2_conn->mutex); 2005 } 2006 2007 int qed_ll2_alloc(struct qed_hwfn *p_hwfn) 2008 { 2009 struct qed_ll2_info *p_ll2_connections; 2010 u8 i; 2011 2012 /* Allocate LL2's set struct */ 2013 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS, 2014 sizeof(struct qed_ll2_info), GFP_KERNEL); 2015 if (!p_ll2_connections) { 2016 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n"); 2017 return -ENOMEM; 2018 } 2019 2020 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 2021 p_ll2_connections[i].my_id = i; 2022 2023 p_hwfn->p_ll2_info = p_ll2_connections; 2024 return 0; 2025 } 2026 2027 void qed_ll2_setup(struct qed_hwfn *p_hwfn) 2028 { 2029 int i; 2030 2031 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 2032 mutex_init(&p_hwfn->p_ll2_info[i].mutex); 2033 } 2034 2035 void qed_ll2_free(struct qed_hwfn *p_hwfn) 2036 { 2037 if (!p_hwfn->p_ll2_info) 2038 return; 2039 2040 kfree(p_hwfn->p_ll2_info); 2041 p_hwfn->p_ll2_info = NULL; 2042 } 2043 2044 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn, 2045 struct qed_ptt *p_ptt, 2046 struct qed_ll2_stats *p_stats) 2047 { 2048 struct core_ll2_port_stats port_stats; 2049 2050 memset(&port_stats, 0, sizeof(port_stats)); 2051 qed_memcpy_from(p_hwfn, p_ptt, &port_stats, 2052 BAR0_MAP_REG_TSDM_RAM + 2053 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)), 2054 sizeof(port_stats)); 2055 2056 p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr); 2057 p_stats->gsi_invalid_pkt_length = 2058 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length); 2059 p_stats->gsi_unsupported_pkt_typ = 2060 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ); 2061 p_stats->gsi_crcchksm_error = 2062 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error); 2063 } 2064 2065 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn, 2066 struct qed_ptt *p_ptt, 2067 struct qed_ll2_info *p_ll2_conn, 2068 struct qed_ll2_stats *p_stats) 2069 { 2070 struct core_ll2_tstorm_per_queue_stat tstats; 2071 u8 qid = p_ll2_conn->queue_id; 2072 u32 tstats_addr; 2073 2074 memset(&tstats, 0, sizeof(tstats)); 2075 tstats_addr = BAR0_MAP_REG_TSDM_RAM + 2076 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid); 2077 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats)); 2078 2079 p_stats->packet_too_big_discard = 2080 HILO_64_REGPAIR(tstats.packet_too_big_discard); 2081 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard); 2082 } 2083 2084 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn, 2085 struct qed_ptt *p_ptt, 2086 struct qed_ll2_info *p_ll2_conn, 2087 struct qed_ll2_stats *p_stats) 2088 { 2089 struct core_ll2_ustorm_per_queue_stat ustats; 2090 u8 qid = p_ll2_conn->queue_id; 2091 u32 ustats_addr; 2092 2093 memset(&ustats, 0, sizeof(ustats)); 2094 ustats_addr = BAR0_MAP_REG_USDM_RAM + 2095 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid); 2096 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats)); 2097 2098 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes); 2099 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes); 2100 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes); 2101 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts); 2102 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts); 2103 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts); 2104 } 2105 2106 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn, 2107 struct qed_ptt *p_ptt, 2108 struct qed_ll2_info *p_ll2_conn, 2109 struct qed_ll2_stats *p_stats) 2110 { 2111 struct core_ll2_pstorm_per_queue_stat pstats; 2112 u8 stats_id = p_ll2_conn->tx_stats_id; 2113 u32 pstats_addr; 2114 2115 memset(&pstats, 0, sizeof(pstats)); 2116 pstats_addr = BAR0_MAP_REG_PSDM_RAM + 2117 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id); 2118 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats)); 2119 2120 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes); 2121 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes); 2122 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes); 2123 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts); 2124 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts); 2125 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts); 2126 } 2127 2128 int qed_ll2_get_stats(void *cxt, 2129 u8 connection_handle, struct qed_ll2_stats *p_stats) 2130 { 2131 struct qed_hwfn *p_hwfn = cxt; 2132 struct qed_ll2_info *p_ll2_conn = NULL; 2133 struct qed_ptt *p_ptt; 2134 2135 memset(p_stats, 0, sizeof(*p_stats)); 2136 2137 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) || 2138 !p_hwfn->p_ll2_info) 2139 return -EINVAL; 2140 2141 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 2142 2143 p_ptt = qed_ptt_acquire(p_hwfn); 2144 if (!p_ptt) { 2145 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 2146 return -EINVAL; 2147 } 2148 2149 if (p_ll2_conn->input.gsi_enable) 2150 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats); 2151 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2152 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2153 if (p_ll2_conn->tx_stats_en) 2154 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2155 2156 qed_ptt_release(p_hwfn, p_ptt); 2157 return 0; 2158 } 2159 2160 static void qed_ll2b_release_rx_packet(void *cxt, 2161 u8 connection_handle, 2162 void *cookie, 2163 dma_addr_t rx_buf_addr, 2164 bool b_last_packet) 2165 { 2166 struct qed_hwfn *p_hwfn = cxt; 2167 2168 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie); 2169 } 2170 2171 static void qed_ll2_register_cb_ops(struct qed_dev *cdev, 2172 const struct qed_ll2_cb_ops *ops, 2173 void *cookie) 2174 { 2175 cdev->ll2->cbs = ops; 2176 cdev->ll2->cb_cookie = cookie; 2177 } 2178 2179 struct qed_ll2_cbs ll2_cbs = { 2180 .rx_comp_cb = &qed_ll2b_complete_rx_packet, 2181 .rx_release_cb = &qed_ll2b_release_rx_packet, 2182 .tx_comp_cb = &qed_ll2b_complete_tx_packet, 2183 .tx_release_cb = &qed_ll2b_complete_tx_packet, 2184 }; 2185 2186 static void qed_ll2_set_conn_data(struct qed_dev *cdev, 2187 struct qed_ll2_acquire_data *data, 2188 struct qed_ll2_params *params, 2189 enum qed_ll2_conn_type conn_type, 2190 u8 *handle, bool lb) 2191 { 2192 memset(data, 0, sizeof(*data)); 2193 2194 data->input.conn_type = conn_type; 2195 data->input.mtu = params->mtu; 2196 data->input.rx_num_desc = QED_LL2_RX_SIZE; 2197 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets; 2198 data->input.rx_vlan_removal_en = params->rx_vlan_stripping; 2199 data->input.tx_num_desc = QED_LL2_TX_SIZE; 2200 data->p_connection_handle = handle; 2201 data->cbs = &ll2_cbs; 2202 ll2_cbs.cookie = QED_LEADING_HWFN(cdev); 2203 2204 if (lb) { 2205 data->input.tx_tc = PKT_LB_TC; 2206 data->input.tx_dest = QED_LL2_TX_DEST_LB; 2207 } else { 2208 data->input.tx_tc = 0; 2209 data->input.tx_dest = QED_LL2_TX_DEST_NW; 2210 } 2211 } 2212 2213 static int qed_ll2_start_ooo(struct qed_dev *cdev, 2214 struct qed_ll2_params *params) 2215 { 2216 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2217 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 2218 struct qed_ll2_acquire_data data; 2219 int rc; 2220 2221 qed_ll2_set_conn_data(cdev, &data, params, 2222 QED_LL2_TYPE_OOO, handle, true); 2223 2224 rc = qed_ll2_acquire_connection(hwfn, &data); 2225 if (rc) { 2226 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n"); 2227 goto out; 2228 } 2229 2230 rc = qed_ll2_establish_connection(hwfn, *handle); 2231 if (rc) { 2232 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n"); 2233 goto fail; 2234 } 2235 2236 return 0; 2237 2238 fail: 2239 qed_ll2_release_connection(hwfn, *handle); 2240 out: 2241 *handle = QED_LL2_UNUSED_HANDLE; 2242 return rc; 2243 } 2244 2245 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params) 2246 { 2247 struct qed_ll2_buffer *buffer, *tmp_buffer; 2248 enum qed_ll2_conn_type conn_type; 2249 struct qed_ll2_acquire_data data; 2250 struct qed_ptt *p_ptt; 2251 int rc, i; 2252 2253 2254 /* Initialize LL2 locks & lists */ 2255 INIT_LIST_HEAD(&cdev->ll2->list); 2256 spin_lock_init(&cdev->ll2->lock); 2257 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN + 2258 L1_CACHE_BYTES + params->mtu; 2259 2260 /*Allocate memory for LL2 */ 2261 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n", 2262 cdev->ll2->rx_size); 2263 for (i = 0; i < QED_LL2_RX_SIZE; i++) { 2264 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); 2265 if (!buffer) { 2266 DP_INFO(cdev, "Failed to allocate LL2 buffers\n"); 2267 goto fail; 2268 } 2269 2270 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data, 2271 &buffer->phys_addr); 2272 if (rc) { 2273 kfree(buffer); 2274 goto fail; 2275 } 2276 2277 list_add_tail(&buffer->list, &cdev->ll2->list); 2278 } 2279 2280 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) { 2281 case QED_PCI_FCOE: 2282 conn_type = QED_LL2_TYPE_FCOE; 2283 break; 2284 case QED_PCI_ISCSI: 2285 conn_type = QED_LL2_TYPE_ISCSI; 2286 break; 2287 case QED_PCI_ETH_ROCE: 2288 conn_type = QED_LL2_TYPE_ROCE; 2289 break; 2290 default: 2291 conn_type = QED_LL2_TYPE_TEST; 2292 } 2293 2294 qed_ll2_set_conn_data(cdev, &data, params, conn_type, 2295 &cdev->ll2->handle, false); 2296 2297 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data); 2298 if (rc) { 2299 DP_INFO(cdev, "Failed to acquire LL2 connection\n"); 2300 goto fail; 2301 } 2302 2303 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev), 2304 cdev->ll2->handle); 2305 if (rc) { 2306 DP_INFO(cdev, "Failed to establish LL2 connection\n"); 2307 goto release_fail; 2308 } 2309 2310 /* Post all Rx buffers to FW */ 2311 spin_lock_bh(&cdev->ll2->lock); 2312 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) { 2313 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), 2314 cdev->ll2->handle, 2315 buffer->phys_addr, 0, buffer, 1); 2316 if (rc) { 2317 DP_INFO(cdev, 2318 "Failed to post an Rx buffer; Deleting it\n"); 2319 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 2320 cdev->ll2->rx_size, DMA_FROM_DEVICE); 2321 kfree(buffer->data); 2322 list_del(&buffer->list); 2323 kfree(buffer); 2324 } else { 2325 cdev->ll2->rx_cnt++; 2326 } 2327 } 2328 spin_unlock_bh(&cdev->ll2->lock); 2329 2330 if (!cdev->ll2->rx_cnt) { 2331 DP_INFO(cdev, "Failed passing even a single Rx buffer\n"); 2332 goto release_terminate; 2333 } 2334 2335 if (!is_valid_ether_addr(params->ll2_mac_address)) { 2336 DP_INFO(cdev, "Invalid Ethernet address\n"); 2337 goto release_terminate; 2338 } 2339 2340 if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI) { 2341 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n"); 2342 rc = qed_ll2_start_ooo(cdev, params); 2343 if (rc) { 2344 DP_INFO(cdev, 2345 "Failed to initialize the OOO LL2 queue\n"); 2346 goto release_terminate; 2347 } 2348 } 2349 2350 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2351 if (!p_ptt) { 2352 DP_INFO(cdev, "Failed to acquire PTT\n"); 2353 goto release_terminate; 2354 } 2355 2356 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2357 params->ll2_mac_address); 2358 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2359 if (rc) { 2360 DP_ERR(cdev, "Failed to allocate LLH filter\n"); 2361 goto release_terminate_all; 2362 } 2363 2364 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address); 2365 return 0; 2366 2367 release_terminate_all: 2368 2369 release_terminate: 2370 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2371 release_fail: 2372 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2373 fail: 2374 qed_ll2_kill_buffers(cdev); 2375 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2376 return -EINVAL; 2377 } 2378 2379 static int qed_ll2_stop(struct qed_dev *cdev) 2380 { 2381 struct qed_ptt *p_ptt; 2382 int rc; 2383 2384 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE) 2385 return 0; 2386 2387 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2388 if (!p_ptt) { 2389 DP_INFO(cdev, "Failed to acquire PTT\n"); 2390 goto fail; 2391 } 2392 2393 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2394 cdev->ll2_mac_address); 2395 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2396 eth_zero_addr(cdev->ll2_mac_address); 2397 2398 if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI) 2399 qed_ll2_stop_ooo(cdev); 2400 2401 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), 2402 cdev->ll2->handle); 2403 if (rc) 2404 DP_INFO(cdev, "Failed to terminate LL2 connection\n"); 2405 2406 qed_ll2_kill_buffers(cdev); 2407 2408 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2409 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2410 2411 return rc; 2412 fail: 2413 return -EINVAL; 2414 } 2415 2416 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb, 2417 unsigned long xmit_flags) 2418 { 2419 struct qed_ll2_tx_pkt_info pkt; 2420 const skb_frag_t *frag; 2421 int rc = -EINVAL, i; 2422 dma_addr_t mapping; 2423 u16 vlan = 0; 2424 u8 flags = 0; 2425 2426 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) { 2427 DP_INFO(cdev, "Cannot transmit a checksummed packet\n"); 2428 return -EINVAL; 2429 } 2430 2431 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) { 2432 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n", 2433 1 + skb_shinfo(skb)->nr_frags); 2434 return -EINVAL; 2435 } 2436 2437 mapping = dma_map_single(&cdev->pdev->dev, skb->data, 2438 skb->len, DMA_TO_DEVICE); 2439 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2440 DP_NOTICE(cdev, "SKB mapping failed\n"); 2441 return -EINVAL; 2442 } 2443 2444 /* Request HW to calculate IP csum */ 2445 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) && 2446 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 2447 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT); 2448 2449 if (skb_vlan_tag_present(skb)) { 2450 vlan = skb_vlan_tag_get(skb); 2451 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT); 2452 } 2453 2454 memset(&pkt, 0, sizeof(pkt)); 2455 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags; 2456 pkt.vlan = vlan; 2457 pkt.bd_flags = flags; 2458 pkt.tx_dest = QED_LL2_TX_DEST_NW; 2459 pkt.first_frag = mapping; 2460 pkt.first_frag_len = skb->len; 2461 pkt.cookie = skb; 2462 if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) && 2463 test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags)) 2464 pkt.remove_stag = true; 2465 2466 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle, 2467 &pkt, 1); 2468 if (rc) 2469 goto err; 2470 2471 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 2472 frag = &skb_shinfo(skb)->frags[i]; 2473 2474 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0, 2475 skb_frag_size(frag), DMA_TO_DEVICE); 2476 2477 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2478 DP_NOTICE(cdev, 2479 "Unable to map frag - dropping packet\n"); 2480 goto err; 2481 } 2482 2483 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev), 2484 cdev->ll2->handle, 2485 mapping, 2486 skb_frag_size(frag)); 2487 2488 /* if failed not much to do here, partial packet has been posted 2489 * we can't free memory, will need to wait for completion. 2490 */ 2491 if (rc) 2492 goto err2; 2493 } 2494 2495 return 0; 2496 2497 err: 2498 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE); 2499 2500 err2: 2501 return rc; 2502 } 2503 2504 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats) 2505 { 2506 if (!cdev->ll2) 2507 return -EINVAL; 2508 2509 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev), 2510 cdev->ll2->handle, stats); 2511 } 2512 2513 const struct qed_ll2_ops qed_ll2_ops_pass = { 2514 .start = &qed_ll2_start, 2515 .stop = &qed_ll2_stop, 2516 .start_xmit = &qed_ll2_start_xmit, 2517 .register_cb_ops = &qed_ll2_register_cb_ops, 2518 .get_stats = &qed_ll2_stats, 2519 }; 2520 2521 int qed_ll2_alloc_if(struct qed_dev *cdev) 2522 { 2523 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL); 2524 return cdev->ll2 ? 0 : -ENOMEM; 2525 } 2526 2527 void qed_ll2_dealloc_if(struct qed_dev *cdev) 2528 { 2529 kfree(cdev->ll2); 2530 cdev->ll2 = NULL; 2531 } 2532