1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/if_vlan.h> 37 #include <linux/kernel.h> 38 #include <linux/pci.h> 39 #include <linux/slab.h> 40 #include <linux/stddef.h> 41 #include <linux/workqueue.h> 42 #include <net/ipv6.h> 43 #include <linux/bitops.h> 44 #include <linux/delay.h> 45 #include <linux/errno.h> 46 #include <linux/etherdevice.h> 47 #include <linux/io.h> 48 #include <linux/list.h> 49 #include <linux/mutex.h> 50 #include <linux/spinlock.h> 51 #include <linux/string.h> 52 #include <linux/qed/qed_ll2_if.h> 53 #include "qed.h" 54 #include "qed_cxt.h" 55 #include "qed_dev_api.h" 56 #include "qed_hsi.h" 57 #include "qed_hw.h" 58 #include "qed_int.h" 59 #include "qed_ll2.h" 60 #include "qed_mcp.h" 61 #include "qed_ooo.h" 62 #include "qed_reg_addr.h" 63 #include "qed_sp.h" 64 #include "qed_rdma.h" 65 66 #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred) 67 #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred) 68 69 #define QED_LL2_TX_SIZE (256) 70 #define QED_LL2_RX_SIZE (4096) 71 72 struct qed_cb_ll2_info { 73 int rx_cnt; 74 u32 rx_size; 75 u8 handle; 76 77 /* Lock protecting LL2 buffer lists in sleepless context */ 78 spinlock_t lock; 79 struct list_head list; 80 81 const struct qed_ll2_cb_ops *cbs; 82 void *cb_cookie; 83 }; 84 85 struct qed_ll2_buffer { 86 struct list_head list; 87 void *data; 88 dma_addr_t phys_addr; 89 }; 90 91 static void qed_ll2b_complete_tx_packet(void *cxt, 92 u8 connection_handle, 93 void *cookie, 94 dma_addr_t first_frag_addr, 95 bool b_last_fragment, 96 bool b_last_packet) 97 { 98 struct qed_hwfn *p_hwfn = cxt; 99 struct qed_dev *cdev = p_hwfn->cdev; 100 struct sk_buff *skb = cookie; 101 102 /* All we need to do is release the mapping */ 103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr, 104 skb_headlen(skb), DMA_TO_DEVICE); 105 106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb) 107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb, 108 b_last_fragment); 109 110 dev_kfree_skb_any(skb); 111 } 112 113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev, 114 u8 **data, dma_addr_t *phys_addr) 115 { 116 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC); 117 if (!(*data)) { 118 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n"); 119 return -ENOMEM; 120 } 121 122 *phys_addr = dma_map_single(&cdev->pdev->dev, 123 ((*data) + NET_SKB_PAD), 124 cdev->ll2->rx_size, DMA_FROM_DEVICE); 125 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) { 126 DP_INFO(cdev, "Failed to map LL2 buffer data\n"); 127 kfree((*data)); 128 return -ENOMEM; 129 } 130 131 return 0; 132 } 133 134 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev, 135 struct qed_ll2_buffer *buffer) 136 { 137 spin_lock_bh(&cdev->ll2->lock); 138 139 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 140 cdev->ll2->rx_size, DMA_FROM_DEVICE); 141 kfree(buffer->data); 142 list_del(&buffer->list); 143 144 cdev->ll2->rx_cnt--; 145 if (!cdev->ll2->rx_cnt) 146 DP_INFO(cdev, "All LL2 entries were removed\n"); 147 148 spin_unlock_bh(&cdev->ll2->lock); 149 150 return 0; 151 } 152 153 static void qed_ll2_kill_buffers(struct qed_dev *cdev) 154 { 155 struct qed_ll2_buffer *buffer, *tmp_buffer; 156 157 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) 158 qed_ll2_dealloc_buffer(cdev, buffer); 159 } 160 161 void qed_ll2b_complete_rx_packet(void *cxt, struct qed_ll2_comp_rx_data *data) 162 { 163 struct qed_hwfn *p_hwfn = cxt; 164 struct qed_ll2_buffer *buffer = data->cookie; 165 struct qed_dev *cdev = p_hwfn->cdev; 166 dma_addr_t new_phys_addr; 167 struct sk_buff *skb; 168 bool reuse = false; 169 int rc = -EINVAL; 170 u8 *new_data; 171 172 DP_VERBOSE(p_hwfn, 173 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA), 174 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n", 175 (u64)data->rx_buf_addr, 176 data->u.placement_offset, 177 data->length.packet_length, 178 data->parse_flags, 179 data->vlan, data->opaque_data_0, data->opaque_data_1); 180 181 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) { 182 print_hex_dump(KERN_INFO, "", 183 DUMP_PREFIX_OFFSET, 16, 1, 184 buffer->data, data->length.packet_length, false); 185 } 186 187 /* Determine if data is valid */ 188 if (data->length.packet_length < ETH_HLEN) 189 reuse = true; 190 191 /* Allocate a replacement for buffer; Reuse upon failure */ 192 if (!reuse) 193 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data, 194 &new_phys_addr); 195 196 /* If need to reuse or there's no replacement buffer, repost this */ 197 if (rc) 198 goto out_post; 199 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 200 cdev->ll2->rx_size, DMA_FROM_DEVICE); 201 202 skb = build_skb(buffer->data, 0); 203 if (!skb) { 204 rc = -ENOMEM; 205 goto out_post; 206 } 207 208 data->u.placement_offset += NET_SKB_PAD; 209 skb_reserve(skb, data->u.placement_offset); 210 skb_put(skb, data->length.packet_length); 211 skb_checksum_none_assert(skb); 212 213 /* Get parital ethernet information instead of eth_type_trans(), 214 * Since we don't have an associated net_device. 215 */ 216 skb_reset_mac_header(skb); 217 skb->protocol = eth_hdr(skb)->h_proto; 218 219 /* Pass SKB onward */ 220 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) { 221 if (data->vlan) 222 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 223 data->vlan); 224 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb, 225 data->opaque_data_0, 226 data->opaque_data_1); 227 } 228 229 /* Update Buffer information and update FW producer */ 230 buffer->data = new_data; 231 buffer->phys_addr = new_phys_addr; 232 233 out_post: 234 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle, 235 buffer->phys_addr, 0, buffer, 1); 236 237 if (rc) 238 qed_ll2_dealloc_buffer(cdev, buffer); 239 } 240 241 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 242 u8 connection_handle, 243 bool b_lock, 244 bool b_only_active) 245 { 246 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL; 247 248 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) 249 return NULL; 250 251 if (!p_hwfn->p_ll2_info) 252 return NULL; 253 254 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 255 256 if (b_only_active) { 257 if (b_lock) 258 mutex_lock(&p_ll2_conn->mutex); 259 if (p_ll2_conn->b_active) 260 p_ret = p_ll2_conn; 261 if (b_lock) 262 mutex_unlock(&p_ll2_conn->mutex); 263 } else { 264 p_ret = p_ll2_conn; 265 } 266 267 return p_ret; 268 } 269 270 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 271 u8 connection_handle) 272 { 273 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true); 274 } 275 276 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn, 277 u8 connection_handle) 278 { 279 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true); 280 } 281 282 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn 283 *p_hwfn, 284 u8 connection_handle) 285 { 286 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false); 287 } 288 289 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 290 { 291 bool b_last_packet = false, b_last_frag = false; 292 struct qed_ll2_tx_packet *p_pkt = NULL; 293 struct qed_ll2_info *p_ll2_conn; 294 struct qed_ll2_tx_queue *p_tx; 295 dma_addr_t tx_frag; 296 297 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 298 if (!p_ll2_conn) 299 return; 300 301 p_tx = &p_ll2_conn->tx_queue; 302 303 while (!list_empty(&p_tx->active_descq)) { 304 p_pkt = list_first_entry(&p_tx->active_descq, 305 struct qed_ll2_tx_packet, list_entry); 306 if (!p_pkt) 307 break; 308 309 list_del(&p_pkt->list_entry); 310 b_last_packet = list_empty(&p_tx->active_descq); 311 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 312 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 313 struct qed_ooo_buffer *p_buffer; 314 315 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 316 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 317 p_buffer); 318 } else { 319 p_tx->cur_completing_packet = *p_pkt; 320 p_tx->cur_completing_bd_idx = 1; 321 b_last_frag = 322 p_tx->cur_completing_bd_idx == p_pkt->bd_used; 323 tx_frag = p_pkt->bds_set[0].tx_frag; 324 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie, 325 p_ll2_conn->my_id, 326 p_pkt->cookie, 327 tx_frag, 328 b_last_frag, 329 b_last_packet); 330 } 331 } 332 } 333 334 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 335 { 336 struct qed_ll2_info *p_ll2_conn = p_cookie; 337 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 338 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0; 339 struct qed_ll2_tx_packet *p_pkt; 340 bool b_last_frag = false; 341 unsigned long flags; 342 int rc = -EINVAL; 343 344 spin_lock_irqsave(&p_tx->lock, flags); 345 if (p_tx->b_completing_packet) { 346 rc = -EBUSY; 347 goto out; 348 } 349 350 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 351 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 352 while (num_bds) { 353 if (list_empty(&p_tx->active_descq)) 354 goto out; 355 356 p_pkt = list_first_entry(&p_tx->active_descq, 357 struct qed_ll2_tx_packet, list_entry); 358 if (!p_pkt) 359 goto out; 360 361 p_tx->b_completing_packet = true; 362 p_tx->cur_completing_packet = *p_pkt; 363 num_bds_in_packet = p_pkt->bd_used; 364 list_del(&p_pkt->list_entry); 365 366 if (num_bds < num_bds_in_packet) { 367 DP_NOTICE(p_hwfn, 368 "Rest of BDs does not cover whole packet\n"); 369 goto out; 370 } 371 372 num_bds -= num_bds_in_packet; 373 p_tx->bds_idx += num_bds_in_packet; 374 while (num_bds_in_packet--) 375 qed_chain_consume(&p_tx->txq_chain); 376 377 p_tx->cur_completing_bd_idx = 1; 378 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used; 379 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 380 381 spin_unlock_irqrestore(&p_tx->lock, flags); 382 383 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie, 384 p_ll2_conn->my_id, 385 p_pkt->cookie, 386 p_pkt->bds_set[0].tx_frag, 387 b_last_frag, !num_bds); 388 389 spin_lock_irqsave(&p_tx->lock, flags); 390 } 391 392 p_tx->b_completing_packet = false; 393 rc = 0; 394 out: 395 spin_unlock_irqrestore(&p_tx->lock, flags); 396 return rc; 397 } 398 399 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn, 400 union core_rx_cqe_union *p_cqe, 401 struct qed_ll2_comp_rx_data *data) 402 { 403 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags); 404 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length); 405 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan); 406 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi); 407 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo); 408 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error; 409 data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id); 410 411 data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp); 412 } 413 414 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn, 415 union core_rx_cqe_union *p_cqe, 416 struct qed_ll2_comp_rx_data *data) 417 { 418 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags); 419 data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags); 420 data->length.packet_length = 421 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length); 422 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan); 423 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]); 424 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]); 425 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset; 426 } 427 428 static int 429 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn, 430 struct qed_ll2_info *p_ll2_conn, 431 union core_rx_cqe_union *p_cqe, 432 unsigned long *p_lock_flags) 433 { 434 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 435 struct core_rx_slow_path_cqe *sp_cqe; 436 437 sp_cqe = &p_cqe->rx_cqe_sp; 438 if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) { 439 DP_NOTICE(p_hwfn, 440 "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n", 441 sp_cqe->ramrod_cmd_id); 442 return -EINVAL; 443 } 444 445 if (!p_ll2_conn->cbs.slowpath_cb) { 446 DP_NOTICE(p_hwfn, 447 "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n"); 448 return -EINVAL; 449 } 450 451 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 452 453 p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie, 454 p_ll2_conn->my_id, 455 le32_to_cpu(sp_cqe->opaque_data.data[0]), 456 le32_to_cpu(sp_cqe->opaque_data.data[1])); 457 458 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 459 460 return 0; 461 } 462 463 static int 464 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn, 465 struct qed_ll2_info *p_ll2_conn, 466 union core_rx_cqe_union *p_cqe, 467 unsigned long *p_lock_flags, bool b_last_cqe) 468 { 469 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 470 struct qed_ll2_rx_packet *p_pkt = NULL; 471 struct qed_ll2_comp_rx_data data; 472 473 if (!list_empty(&p_rx->active_descq)) 474 p_pkt = list_first_entry(&p_rx->active_descq, 475 struct qed_ll2_rx_packet, list_entry); 476 if (!p_pkt) { 477 DP_NOTICE(p_hwfn, 478 "[%d] LL2 Rx completion but active_descq is empty\n", 479 p_ll2_conn->input.conn_type); 480 481 return -EIO; 482 } 483 list_del(&p_pkt->list_entry); 484 485 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR) 486 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data); 487 else 488 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data); 489 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd) 490 DP_NOTICE(p_hwfn, 491 "Mismatch between active_descq and the LL2 Rx chain\n"); 492 493 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 494 495 data.connection_handle = p_ll2_conn->my_id; 496 data.cookie = p_pkt->cookie; 497 data.rx_buf_addr = p_pkt->rx_buf_addr; 498 data.b_last_packet = b_last_cqe; 499 500 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 501 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data); 502 503 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 504 505 return 0; 506 } 507 508 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie) 509 { 510 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie; 511 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 512 union core_rx_cqe_union *cqe = NULL; 513 u16 cq_new_idx = 0, cq_old_idx = 0; 514 unsigned long flags = 0; 515 int rc = 0; 516 517 spin_lock_irqsave(&p_rx->lock, flags); 518 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 519 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 520 521 while (cq_new_idx != cq_old_idx) { 522 bool b_last_cqe = (cq_new_idx == cq_old_idx); 523 524 cqe = 525 (union core_rx_cqe_union *) 526 qed_chain_consume(&p_rx->rcq_chain); 527 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 528 529 DP_VERBOSE(p_hwfn, 530 QED_MSG_LL2, 531 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n", 532 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type); 533 534 switch (cqe->rx_cqe_sp.type) { 535 case CORE_RX_CQE_TYPE_SLOW_PATH: 536 rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn, 537 cqe, &flags); 538 break; 539 case CORE_RX_CQE_TYPE_GSI_OFFLOAD: 540 case CORE_RX_CQE_TYPE_REGULAR: 541 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn, 542 cqe, &flags, 543 b_last_cqe); 544 break; 545 default: 546 rc = -EIO; 547 } 548 } 549 550 spin_unlock_irqrestore(&p_rx->lock, flags); 551 return rc; 552 } 553 554 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 555 { 556 struct qed_ll2_info *p_ll2_conn = NULL; 557 struct qed_ll2_rx_packet *p_pkt = NULL; 558 struct qed_ll2_rx_queue *p_rx; 559 560 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 561 if (!p_ll2_conn) 562 return; 563 564 p_rx = &p_ll2_conn->rx_queue; 565 566 while (!list_empty(&p_rx->active_descq)) { 567 p_pkt = list_first_entry(&p_rx->active_descq, 568 struct qed_ll2_rx_packet, list_entry); 569 if (!p_pkt) 570 break; 571 572 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq); 573 574 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 575 struct qed_ooo_buffer *p_buffer; 576 577 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 578 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 579 p_buffer); 580 } else { 581 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr; 582 void *cookie = p_pkt->cookie; 583 bool b_last; 584 585 b_last = list_empty(&p_rx->active_descq); 586 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie, 587 p_ll2_conn->my_id, 588 cookie, 589 rx_buf_addr, b_last); 590 } 591 } 592 } 593 594 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn, 595 struct qed_ll2_info *p_ll2_conn) 596 { 597 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 598 u16 packet_length = 0, parse_flags = 0, vlan = 0; 599 struct qed_ll2_rx_packet *p_pkt = NULL; 600 u32 num_ooo_add_to_peninsula = 0, cid; 601 union core_rx_cqe_union *cqe = NULL; 602 u16 cq_new_idx = 0, cq_old_idx = 0; 603 struct qed_ooo_buffer *p_buffer; 604 struct ooo_opaque *iscsi_ooo; 605 u8 placement_offset = 0; 606 u8 cqe_type; 607 608 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 609 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 610 if (cq_new_idx == cq_old_idx) 611 return 0; 612 613 while (cq_new_idx != cq_old_idx) { 614 struct core_rx_fast_path_cqe *p_cqe_fp; 615 616 cqe = qed_chain_consume(&p_rx->rcq_chain); 617 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 618 cqe_type = cqe->rx_cqe_sp.type; 619 620 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) { 621 DP_NOTICE(p_hwfn, 622 "Got a non-regular LB LL2 completion [type 0x%02x]\n", 623 cqe_type); 624 return -EINVAL; 625 } 626 p_cqe_fp = &cqe->rx_cqe_fp; 627 628 placement_offset = p_cqe_fp->placement_offset; 629 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags); 630 packet_length = le16_to_cpu(p_cqe_fp->packet_length); 631 vlan = le16_to_cpu(p_cqe_fp->vlan); 632 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data; 633 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info, 634 iscsi_ooo); 635 cid = le32_to_cpu(iscsi_ooo->cid); 636 637 /* Process delete isle first */ 638 if (iscsi_ooo->drop_size) 639 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid, 640 iscsi_ooo->drop_isle, 641 iscsi_ooo->drop_size); 642 643 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP) 644 continue; 645 646 /* Now process create/add/join isles */ 647 if (list_empty(&p_rx->active_descq)) { 648 DP_NOTICE(p_hwfn, 649 "LL2 OOO RX chain has no submitted buffers\n" 650 ); 651 return -EIO; 652 } 653 654 p_pkt = list_first_entry(&p_rx->active_descq, 655 struct qed_ll2_rx_packet, list_entry); 656 657 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) || 658 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) || 659 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) || 660 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) || 661 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) { 662 if (!p_pkt) { 663 DP_NOTICE(p_hwfn, 664 "LL2 OOO RX packet is not valid\n"); 665 return -EIO; 666 } 667 list_del(&p_pkt->list_entry); 668 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 669 p_buffer->packet_length = packet_length; 670 p_buffer->parse_flags = parse_flags; 671 p_buffer->vlan = vlan; 672 p_buffer->placement_offset = placement_offset; 673 qed_chain_consume(&p_rx->rxq_chain); 674 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 675 676 switch (iscsi_ooo->ooo_opcode) { 677 case TCP_EVENT_ADD_NEW_ISLE: 678 qed_ooo_add_new_isle(p_hwfn, 679 p_hwfn->p_ooo_info, 680 cid, 681 iscsi_ooo->ooo_isle, 682 p_buffer); 683 break; 684 case TCP_EVENT_ADD_ISLE_RIGHT: 685 qed_ooo_add_new_buffer(p_hwfn, 686 p_hwfn->p_ooo_info, 687 cid, 688 iscsi_ooo->ooo_isle, 689 p_buffer, 690 QED_OOO_RIGHT_BUF); 691 break; 692 case TCP_EVENT_ADD_ISLE_LEFT: 693 qed_ooo_add_new_buffer(p_hwfn, 694 p_hwfn->p_ooo_info, 695 cid, 696 iscsi_ooo->ooo_isle, 697 p_buffer, 698 QED_OOO_LEFT_BUF); 699 break; 700 case TCP_EVENT_JOIN: 701 qed_ooo_add_new_buffer(p_hwfn, 702 p_hwfn->p_ooo_info, 703 cid, 704 iscsi_ooo->ooo_isle + 705 1, 706 p_buffer, 707 QED_OOO_LEFT_BUF); 708 qed_ooo_join_isles(p_hwfn, 709 p_hwfn->p_ooo_info, 710 cid, iscsi_ooo->ooo_isle); 711 break; 712 case TCP_EVENT_ADD_PEN: 713 num_ooo_add_to_peninsula++; 714 qed_ooo_put_ready_buffer(p_hwfn, 715 p_hwfn->p_ooo_info, 716 p_buffer, true); 717 break; 718 } 719 } else { 720 DP_NOTICE(p_hwfn, 721 "Unexpected event (%d) TX OOO completion\n", 722 iscsi_ooo->ooo_opcode); 723 } 724 } 725 726 return 0; 727 } 728 729 static void 730 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn, 731 struct qed_ll2_info *p_ll2_conn) 732 { 733 struct qed_ll2_tx_pkt_info tx_pkt; 734 struct qed_ooo_buffer *p_buffer; 735 u16 l4_hdr_offset_w; 736 dma_addr_t first_frag; 737 u8 bd_flags; 738 int rc; 739 740 /* Submit Tx buffers here */ 741 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn, 742 p_hwfn->p_ooo_info))) { 743 l4_hdr_offset_w = 0; 744 bd_flags = 0; 745 746 first_frag = p_buffer->rx_buffer_phys_addr + 747 p_buffer->placement_offset; 748 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1); 749 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1); 750 751 memset(&tx_pkt, 0, sizeof(tx_pkt)); 752 tx_pkt.num_of_bds = 1; 753 tx_pkt.vlan = p_buffer->vlan; 754 tx_pkt.bd_flags = bd_flags; 755 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w; 756 tx_pkt.tx_dest = p_ll2_conn->tx_dest; 757 tx_pkt.first_frag = first_frag; 758 tx_pkt.first_frag_len = p_buffer->packet_length; 759 tx_pkt.cookie = p_buffer; 760 761 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id, 762 &tx_pkt, true); 763 if (rc) { 764 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info, 765 p_buffer, false); 766 break; 767 } 768 } 769 } 770 771 static void 772 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn, 773 struct qed_ll2_info *p_ll2_conn) 774 { 775 struct qed_ooo_buffer *p_buffer; 776 int rc; 777 778 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 779 p_hwfn->p_ooo_info))) { 780 rc = qed_ll2_post_rx_buffer(p_hwfn, 781 p_ll2_conn->my_id, 782 p_buffer->rx_buffer_phys_addr, 783 0, p_buffer, true); 784 if (rc) { 785 qed_ooo_put_free_buffer(p_hwfn, 786 p_hwfn->p_ooo_info, p_buffer); 787 break; 788 } 789 } 790 } 791 792 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 793 { 794 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 795 int rc; 796 797 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn); 798 if (rc) 799 return rc; 800 801 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 802 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 803 804 return 0; 805 } 806 807 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 808 { 809 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 810 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 811 struct qed_ll2_tx_packet *p_pkt = NULL; 812 struct qed_ooo_buffer *p_buffer; 813 bool b_dont_submit_rx = false; 814 u16 new_idx = 0, num_bds = 0; 815 int rc; 816 817 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 818 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 819 820 if (!num_bds) 821 return 0; 822 823 while (num_bds) { 824 if (list_empty(&p_tx->active_descq)) 825 return -EINVAL; 826 827 p_pkt = list_first_entry(&p_tx->active_descq, 828 struct qed_ll2_tx_packet, list_entry); 829 if (!p_pkt) 830 return -EINVAL; 831 832 if (p_pkt->bd_used != 1) { 833 DP_NOTICE(p_hwfn, 834 "Unexpectedly many BDs(%d) in TX OOO completion\n", 835 p_pkt->bd_used); 836 return -EINVAL; 837 } 838 839 list_del(&p_pkt->list_entry); 840 841 num_bds--; 842 p_tx->bds_idx++; 843 qed_chain_consume(&p_tx->txq_chain); 844 845 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 846 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 847 848 if (b_dont_submit_rx) { 849 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 850 p_buffer); 851 continue; 852 } 853 854 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id, 855 p_buffer->rx_buffer_phys_addr, 0, 856 p_buffer, true); 857 if (rc != 0) { 858 qed_ooo_put_free_buffer(p_hwfn, 859 p_hwfn->p_ooo_info, p_buffer); 860 b_dont_submit_rx = true; 861 } 862 } 863 864 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 865 866 return 0; 867 } 868 869 static void qed_ll2_stop_ooo(struct qed_dev *cdev) 870 { 871 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 872 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 873 874 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n", 875 *handle); 876 877 qed_ll2_terminate_connection(hwfn, *handle); 878 qed_ll2_release_connection(hwfn, *handle); 879 *handle = QED_LL2_UNUSED_HANDLE; 880 } 881 882 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn, 883 struct qed_ll2_info *p_ll2_conn, 884 u8 action_on_error) 885 { 886 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 887 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 888 struct core_rx_start_ramrod_data *p_ramrod = NULL; 889 struct qed_spq_entry *p_ent = NULL; 890 struct qed_sp_init_data init_data; 891 u16 cqe_pbl_size; 892 int rc = 0; 893 894 /* Get SPQ entry */ 895 memset(&init_data, 0, sizeof(init_data)); 896 init_data.cid = p_ll2_conn->cid; 897 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 898 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 899 900 rc = qed_sp_init_request(p_hwfn, &p_ent, 901 CORE_RAMROD_RX_QUEUE_START, 902 PROTOCOLID_CORE, &init_data); 903 if (rc) 904 return rc; 905 906 p_ramrod = &p_ent->ramrod.core_rx_queue_start; 907 908 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 909 p_ramrod->sb_index = p_rx->rx_sb_index; 910 p_ramrod->complete_event_flg = 1; 911 912 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 913 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr); 914 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain); 915 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size); 916 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, 917 qed_chain_get_pbl_phys(&p_rx->rcq_chain)); 918 919 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg; 920 p_ramrod->inner_vlan_stripping_en = 921 p_ll2_conn->input.rx_vlan_removal_en; 922 p_ramrod->queue_id = p_ll2_conn->queue_id; 923 p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0; 924 925 if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) && 926 p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE) && 927 (conn_type != QED_LL2_TYPE_IWARP)) { 928 p_ramrod->mf_si_bcast_accept_all = 1; 929 p_ramrod->mf_si_mcast_accept_all = 1; 930 } else { 931 p_ramrod->mf_si_bcast_accept_all = 0; 932 p_ramrod->mf_si_mcast_accept_all = 0; 933 } 934 935 p_ramrod->action_on_error.error_type = action_on_error; 936 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 937 return qed_spq_post(p_hwfn, p_ent, NULL); 938 } 939 940 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn, 941 struct qed_ll2_info *p_ll2_conn) 942 { 943 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 944 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 945 struct core_tx_start_ramrod_data *p_ramrod = NULL; 946 struct qed_spq_entry *p_ent = NULL; 947 struct qed_sp_init_data init_data; 948 u16 pq_id = 0, pbl_size; 949 int rc = -EINVAL; 950 951 if (!QED_LL2_TX_REGISTERED(p_ll2_conn)) 952 return 0; 953 954 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 955 p_ll2_conn->tx_stats_en = 0; 956 else 957 p_ll2_conn->tx_stats_en = 1; 958 959 /* Get SPQ entry */ 960 memset(&init_data, 0, sizeof(init_data)); 961 init_data.cid = p_ll2_conn->cid; 962 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 963 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 964 965 rc = qed_sp_init_request(p_hwfn, &p_ent, 966 CORE_RAMROD_TX_QUEUE_START, 967 PROTOCOLID_CORE, &init_data); 968 if (rc) 969 return rc; 970 971 p_ramrod = &p_ent->ramrod.core_tx_queue_start; 972 973 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 974 p_ramrod->sb_index = p_tx->tx_sb_index; 975 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 976 p_ramrod->stats_en = p_ll2_conn->tx_stats_en; 977 p_ramrod->stats_id = p_ll2_conn->tx_stats_id; 978 979 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, 980 qed_chain_get_pbl_phys(&p_tx->txq_chain)); 981 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain); 982 p_ramrod->pbl_size = cpu_to_le16(pbl_size); 983 984 switch (p_ll2_conn->input.tx_tc) { 985 case PURE_LB_TC: 986 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB); 987 break; 988 case PKT_LB_TC: 989 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO); 990 break; 991 default: 992 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD); 993 break; 994 } 995 996 p_ramrod->qm_pq_id = cpu_to_le16(pq_id); 997 998 switch (conn_type) { 999 case QED_LL2_TYPE_FCOE: 1000 p_ramrod->conn_type = PROTOCOLID_FCOE; 1001 break; 1002 case QED_LL2_TYPE_ISCSI: 1003 p_ramrod->conn_type = PROTOCOLID_ISCSI; 1004 break; 1005 case QED_LL2_TYPE_ROCE: 1006 p_ramrod->conn_type = PROTOCOLID_ROCE; 1007 break; 1008 case QED_LL2_TYPE_IWARP: 1009 p_ramrod->conn_type = PROTOCOLID_IWARP; 1010 break; 1011 case QED_LL2_TYPE_OOO: 1012 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) 1013 p_ramrod->conn_type = PROTOCOLID_ISCSI; 1014 else 1015 p_ramrod->conn_type = PROTOCOLID_IWARP; 1016 break; 1017 default: 1018 p_ramrod->conn_type = PROTOCOLID_ETH; 1019 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type); 1020 } 1021 1022 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 1023 1024 return qed_spq_post(p_hwfn, p_ent, NULL); 1025 } 1026 1027 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn, 1028 struct qed_ll2_info *p_ll2_conn) 1029 { 1030 struct core_rx_stop_ramrod_data *p_ramrod = NULL; 1031 struct qed_spq_entry *p_ent = NULL; 1032 struct qed_sp_init_data init_data; 1033 int rc = -EINVAL; 1034 1035 /* Get SPQ entry */ 1036 memset(&init_data, 0, sizeof(init_data)); 1037 init_data.cid = p_ll2_conn->cid; 1038 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1039 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1040 1041 rc = qed_sp_init_request(p_hwfn, &p_ent, 1042 CORE_RAMROD_RX_QUEUE_STOP, 1043 PROTOCOLID_CORE, &init_data); 1044 if (rc) 1045 return rc; 1046 1047 p_ramrod = &p_ent->ramrod.core_rx_queue_stop; 1048 1049 p_ramrod->complete_event_flg = 1; 1050 p_ramrod->queue_id = p_ll2_conn->queue_id; 1051 1052 return qed_spq_post(p_hwfn, p_ent, NULL); 1053 } 1054 1055 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn, 1056 struct qed_ll2_info *p_ll2_conn) 1057 { 1058 struct qed_spq_entry *p_ent = NULL; 1059 struct qed_sp_init_data init_data; 1060 int rc = -EINVAL; 1061 1062 /* Get SPQ entry */ 1063 memset(&init_data, 0, sizeof(init_data)); 1064 init_data.cid = p_ll2_conn->cid; 1065 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1066 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1067 1068 rc = qed_sp_init_request(p_hwfn, &p_ent, 1069 CORE_RAMROD_TX_QUEUE_STOP, 1070 PROTOCOLID_CORE, &init_data); 1071 if (rc) 1072 return rc; 1073 1074 return qed_spq_post(p_hwfn, p_ent, NULL); 1075 } 1076 1077 static int 1078 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn, 1079 struct qed_ll2_info *p_ll2_info) 1080 { 1081 struct qed_ll2_rx_packet *p_descq; 1082 u32 capacity; 1083 int rc = 0; 1084 1085 if (!p_ll2_info->input.rx_num_desc) 1086 goto out; 1087 1088 rc = qed_chain_alloc(p_hwfn->cdev, 1089 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1090 QED_CHAIN_MODE_NEXT_PTR, 1091 QED_CHAIN_CNT_TYPE_U16, 1092 p_ll2_info->input.rx_num_desc, 1093 sizeof(struct core_rx_bd), 1094 &p_ll2_info->rx_queue.rxq_chain, NULL); 1095 if (rc) { 1096 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n"); 1097 goto out; 1098 } 1099 1100 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain); 1101 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet), 1102 GFP_KERNEL); 1103 if (!p_descq) { 1104 rc = -ENOMEM; 1105 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n"); 1106 goto out; 1107 } 1108 p_ll2_info->rx_queue.descq_array = p_descq; 1109 1110 rc = qed_chain_alloc(p_hwfn->cdev, 1111 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1112 QED_CHAIN_MODE_PBL, 1113 QED_CHAIN_CNT_TYPE_U16, 1114 p_ll2_info->input.rx_num_desc, 1115 sizeof(struct core_rx_fast_path_cqe), 1116 &p_ll2_info->rx_queue.rcq_chain, NULL); 1117 if (rc) { 1118 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n"); 1119 goto out; 1120 } 1121 1122 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1123 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n", 1124 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc); 1125 1126 out: 1127 return rc; 1128 } 1129 1130 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn, 1131 struct qed_ll2_info *p_ll2_info) 1132 { 1133 struct qed_ll2_tx_packet *p_descq; 1134 u32 desc_size; 1135 u32 capacity; 1136 int rc = 0; 1137 1138 if (!p_ll2_info->input.tx_num_desc) 1139 goto out; 1140 1141 rc = qed_chain_alloc(p_hwfn->cdev, 1142 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1143 QED_CHAIN_MODE_PBL, 1144 QED_CHAIN_CNT_TYPE_U16, 1145 p_ll2_info->input.tx_num_desc, 1146 sizeof(struct core_tx_bd), 1147 &p_ll2_info->tx_queue.txq_chain, NULL); 1148 if (rc) 1149 goto out; 1150 1151 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain); 1152 /* First element is part of the packet, rest are flexibly added */ 1153 desc_size = (sizeof(*p_descq) + 1154 (p_ll2_info->input.tx_max_bds_per_packet - 1) * 1155 sizeof(p_descq->bds_set)); 1156 1157 p_descq = kcalloc(capacity, desc_size, GFP_KERNEL); 1158 if (!p_descq) { 1159 rc = -ENOMEM; 1160 goto out; 1161 } 1162 p_ll2_info->tx_queue.descq_mem = p_descq; 1163 1164 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1165 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n", 1166 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc); 1167 1168 out: 1169 if (rc) 1170 DP_NOTICE(p_hwfn, 1171 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n", 1172 p_ll2_info->input.tx_num_desc); 1173 return rc; 1174 } 1175 1176 static int 1177 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn, 1178 struct qed_ll2_info *p_ll2_info, u16 mtu) 1179 { 1180 struct qed_ooo_buffer *p_buf = NULL; 1181 void *p_virt; 1182 u16 buf_idx; 1183 int rc = 0; 1184 1185 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO) 1186 return rc; 1187 1188 /* Correct number of requested OOO buffers if needed */ 1189 if (!p_ll2_info->input.rx_num_ooo_buffers) { 1190 u16 num_desc = p_ll2_info->input.rx_num_desc; 1191 1192 if (!num_desc) 1193 return -EINVAL; 1194 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2; 1195 } 1196 1197 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers; 1198 buf_idx++) { 1199 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL); 1200 if (!p_buf) { 1201 rc = -ENOMEM; 1202 goto out; 1203 } 1204 1205 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE; 1206 p_buf->rx_buffer_size = (p_buf->rx_buffer_size + 1207 ETH_CACHE_LINE_SIZE - 1) & 1208 ~(ETH_CACHE_LINE_SIZE - 1); 1209 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 1210 p_buf->rx_buffer_size, 1211 &p_buf->rx_buffer_phys_addr, 1212 GFP_KERNEL); 1213 if (!p_virt) { 1214 kfree(p_buf); 1215 rc = -ENOMEM; 1216 goto out; 1217 } 1218 1219 p_buf->rx_buffer_virt_addr = p_virt; 1220 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf); 1221 } 1222 1223 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1224 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n", 1225 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size); 1226 1227 out: 1228 return rc; 1229 } 1230 1231 static int 1232 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs) 1233 { 1234 if (!cbs || (!cbs->rx_comp_cb || 1235 !cbs->rx_release_cb || 1236 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie)) 1237 return -EINVAL; 1238 1239 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb; 1240 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb; 1241 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb; 1242 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb; 1243 p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb; 1244 p_ll2_info->cbs.cookie = cbs->cookie; 1245 1246 return 0; 1247 } 1248 1249 static enum core_error_handle 1250 qed_ll2_get_error_choice(enum qed_ll2_error_handle err) 1251 { 1252 switch (err) { 1253 case QED_LL2_DROP_PACKET: 1254 return LL2_DROP_PACKET; 1255 case QED_LL2_DO_NOTHING: 1256 return LL2_DO_NOTHING; 1257 case QED_LL2_ASSERT: 1258 return LL2_ASSERT; 1259 default: 1260 return LL2_DO_NOTHING; 1261 } 1262 } 1263 1264 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data) 1265 { 1266 struct qed_hwfn *p_hwfn = cxt; 1267 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb; 1268 struct qed_ll2_info *p_ll2_info = NULL; 1269 u8 i, *p_tx_max; 1270 int rc; 1271 1272 if (!data->p_connection_handle || !p_hwfn->p_ll2_info) 1273 return -EINVAL; 1274 1275 /* Find a free connection to be used */ 1276 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) { 1277 mutex_lock(&p_hwfn->p_ll2_info[i].mutex); 1278 if (p_hwfn->p_ll2_info[i].b_active) { 1279 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1280 continue; 1281 } 1282 1283 p_hwfn->p_ll2_info[i].b_active = true; 1284 p_ll2_info = &p_hwfn->p_ll2_info[i]; 1285 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1286 break; 1287 } 1288 if (!p_ll2_info) 1289 return -EBUSY; 1290 1291 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input)); 1292 1293 switch (data->input.tx_dest) { 1294 case QED_LL2_TX_DEST_NW: 1295 p_ll2_info->tx_dest = CORE_TX_DEST_NW; 1296 break; 1297 case QED_LL2_TX_DEST_LB: 1298 p_ll2_info->tx_dest = CORE_TX_DEST_LB; 1299 break; 1300 case QED_LL2_TX_DEST_DROP: 1301 p_ll2_info->tx_dest = CORE_TX_DEST_DROP; 1302 break; 1303 default: 1304 return -EINVAL; 1305 } 1306 1307 if (data->input.conn_type == QED_LL2_TYPE_OOO || 1308 data->input.secondary_queue) 1309 p_ll2_info->main_func_queue = false; 1310 else 1311 p_ll2_info->main_func_queue = true; 1312 1313 /* Correct maximum number of Tx BDs */ 1314 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet; 1315 if (*p_tx_max == 0) 1316 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET; 1317 else 1318 *p_tx_max = min_t(u8, *p_tx_max, 1319 CORE_LL2_TX_MAX_BDS_PER_PACKET); 1320 1321 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs); 1322 if (rc) { 1323 DP_NOTICE(p_hwfn, "Invalid callback functions\n"); 1324 goto q_allocate_fail; 1325 } 1326 1327 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info); 1328 if (rc) 1329 goto q_allocate_fail; 1330 1331 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info); 1332 if (rc) 1333 goto q_allocate_fail; 1334 1335 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info, 1336 data->input.mtu); 1337 if (rc) 1338 goto q_allocate_fail; 1339 1340 /* Register callbacks for the Rx/Tx queues */ 1341 if (data->input.conn_type == QED_LL2_TYPE_OOO) { 1342 comp_rx_cb = qed_ll2_lb_rxq_completion; 1343 comp_tx_cb = qed_ll2_lb_txq_completion; 1344 } else { 1345 comp_rx_cb = qed_ll2_rxq_completion; 1346 comp_tx_cb = qed_ll2_txq_completion; 1347 } 1348 1349 if (data->input.rx_num_desc) { 1350 qed_int_register_cb(p_hwfn, comp_rx_cb, 1351 &p_hwfn->p_ll2_info[i], 1352 &p_ll2_info->rx_queue.rx_sb_index, 1353 &p_ll2_info->rx_queue.p_fw_cons); 1354 p_ll2_info->rx_queue.b_cb_registred = true; 1355 } 1356 1357 if (data->input.tx_num_desc) { 1358 qed_int_register_cb(p_hwfn, 1359 comp_tx_cb, 1360 &p_hwfn->p_ll2_info[i], 1361 &p_ll2_info->tx_queue.tx_sb_index, 1362 &p_ll2_info->tx_queue.p_fw_cons); 1363 p_ll2_info->tx_queue.b_cb_registred = true; 1364 } 1365 1366 *data->p_connection_handle = i; 1367 return rc; 1368 1369 q_allocate_fail: 1370 qed_ll2_release_connection(p_hwfn, i); 1371 return -ENOMEM; 1372 } 1373 1374 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn, 1375 struct qed_ll2_info *p_ll2_conn) 1376 { 1377 enum qed_ll2_error_handle error_input; 1378 enum core_error_handle error_mode; 1379 u8 action_on_error = 0; 1380 1381 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) 1382 return 0; 1383 1384 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0); 1385 error_input = p_ll2_conn->input.ai_err_packet_too_big; 1386 error_mode = qed_ll2_get_error_choice(error_input); 1387 SET_FIELD(action_on_error, 1388 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode); 1389 error_input = p_ll2_conn->input.ai_err_no_buf; 1390 error_mode = qed_ll2_get_error_choice(error_input); 1391 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode); 1392 1393 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error); 1394 } 1395 1396 static void 1397 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn, 1398 struct qed_ll2_info *p_ll2_conn) 1399 { 1400 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1401 return; 1402 1403 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1404 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 1405 } 1406 1407 int qed_ll2_establish_connection(void *cxt, u8 connection_handle) 1408 { 1409 struct qed_hwfn *p_hwfn = cxt; 1410 struct qed_ll2_info *p_ll2_conn; 1411 struct qed_ll2_tx_packet *p_pkt; 1412 struct qed_ll2_rx_queue *p_rx; 1413 struct qed_ll2_tx_queue *p_tx; 1414 struct qed_ptt *p_ptt; 1415 int rc = -EINVAL; 1416 u32 i, capacity; 1417 u32 desc_size; 1418 u8 qid; 1419 1420 p_ptt = qed_ptt_acquire(p_hwfn); 1421 if (!p_ptt) 1422 return -EAGAIN; 1423 1424 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1425 if (!p_ll2_conn) { 1426 rc = -EINVAL; 1427 goto out; 1428 } 1429 1430 p_rx = &p_ll2_conn->rx_queue; 1431 p_tx = &p_ll2_conn->tx_queue; 1432 1433 qed_chain_reset(&p_rx->rxq_chain); 1434 qed_chain_reset(&p_rx->rcq_chain); 1435 INIT_LIST_HEAD(&p_rx->active_descq); 1436 INIT_LIST_HEAD(&p_rx->free_descq); 1437 INIT_LIST_HEAD(&p_rx->posting_descq); 1438 spin_lock_init(&p_rx->lock); 1439 capacity = qed_chain_get_capacity(&p_rx->rxq_chain); 1440 for (i = 0; i < capacity; i++) 1441 list_add_tail(&p_rx->descq_array[i].list_entry, 1442 &p_rx->free_descq); 1443 *p_rx->p_fw_cons = 0; 1444 1445 qed_chain_reset(&p_tx->txq_chain); 1446 INIT_LIST_HEAD(&p_tx->active_descq); 1447 INIT_LIST_HEAD(&p_tx->free_descq); 1448 INIT_LIST_HEAD(&p_tx->sending_descq); 1449 spin_lock_init(&p_tx->lock); 1450 capacity = qed_chain_get_capacity(&p_tx->txq_chain); 1451 /* First element is part of the packet, rest are flexibly added */ 1452 desc_size = (sizeof(*p_pkt) + 1453 (p_ll2_conn->input.tx_max_bds_per_packet - 1) * 1454 sizeof(p_pkt->bds_set)); 1455 1456 for (i = 0; i < capacity; i++) { 1457 p_pkt = p_tx->descq_mem + desc_size * i; 1458 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 1459 } 1460 p_tx->cur_completing_bd_idx = 0; 1461 p_tx->bds_idx = 0; 1462 p_tx->b_completing_packet = false; 1463 p_tx->cur_send_packet = NULL; 1464 p_tx->cur_send_frag_num = 0; 1465 p_tx->cur_completing_frag_num = 0; 1466 *p_tx->p_fw_cons = 0; 1467 1468 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid); 1469 if (rc) 1470 goto out; 1471 1472 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle; 1473 p_ll2_conn->queue_id = qid; 1474 p_ll2_conn->tx_stats_id = qid; 1475 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview + 1476 GTT_BAR0_MAP_REG_TSDM_RAM + 1477 TSTORM_LL2_RX_PRODS_OFFSET(qid); 1478 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells + 1479 qed_db_addr(p_ll2_conn->cid, 1480 DQ_DEMS_LEGACY); 1481 1482 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn); 1483 if (rc) 1484 goto out; 1485 1486 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn); 1487 if (rc) 1488 goto out; 1489 1490 if (!QED_IS_RDMA_PERSONALITY(p_hwfn)) 1491 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1); 1492 1493 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn); 1494 1495 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1496 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1497 0x8906, 0, 1498 QED_LLH_FILTER_ETHERTYPE); 1499 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1500 0x8914, 0, 1501 QED_LLH_FILTER_ETHERTYPE); 1502 } 1503 1504 out: 1505 qed_ptt_release(p_hwfn, p_ptt); 1506 return rc; 1507 } 1508 1509 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn, 1510 struct qed_ll2_rx_queue *p_rx, 1511 struct qed_ll2_rx_packet *p_curp) 1512 { 1513 struct qed_ll2_rx_packet *p_posting_packet = NULL; 1514 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 }; 1515 bool b_notify_fw = false; 1516 u16 bd_prod, cq_prod; 1517 1518 /* This handles the flushing of already posted buffers */ 1519 while (!list_empty(&p_rx->posting_descq)) { 1520 p_posting_packet = list_first_entry(&p_rx->posting_descq, 1521 struct qed_ll2_rx_packet, 1522 list_entry); 1523 list_move_tail(&p_posting_packet->list_entry, 1524 &p_rx->active_descq); 1525 b_notify_fw = true; 1526 } 1527 1528 /* This handles the supplied packet [if there is one] */ 1529 if (p_curp) { 1530 list_add_tail(&p_curp->list_entry, &p_rx->active_descq); 1531 b_notify_fw = true; 1532 } 1533 1534 if (!b_notify_fw) 1535 return; 1536 1537 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain); 1538 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain); 1539 rx_prod.bd_prod = cpu_to_le16(bd_prod); 1540 rx_prod.cqe_prod = cpu_to_le16(cq_prod); 1541 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod)); 1542 } 1543 1544 int qed_ll2_post_rx_buffer(void *cxt, 1545 u8 connection_handle, 1546 dma_addr_t addr, 1547 u16 buf_len, void *cookie, u8 notify_fw) 1548 { 1549 struct qed_hwfn *p_hwfn = cxt; 1550 struct core_rx_bd_with_buff_len *p_curb = NULL; 1551 struct qed_ll2_rx_packet *p_curp = NULL; 1552 struct qed_ll2_info *p_ll2_conn; 1553 struct qed_ll2_rx_queue *p_rx; 1554 unsigned long flags; 1555 void *p_data; 1556 int rc = 0; 1557 1558 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1559 if (!p_ll2_conn) 1560 return -EINVAL; 1561 p_rx = &p_ll2_conn->rx_queue; 1562 1563 spin_lock_irqsave(&p_rx->lock, flags); 1564 if (!list_empty(&p_rx->free_descq)) 1565 p_curp = list_first_entry(&p_rx->free_descq, 1566 struct qed_ll2_rx_packet, list_entry); 1567 if (p_curp) { 1568 if (qed_chain_get_elem_left(&p_rx->rxq_chain) && 1569 qed_chain_get_elem_left(&p_rx->rcq_chain)) { 1570 p_data = qed_chain_produce(&p_rx->rxq_chain); 1571 p_curb = (struct core_rx_bd_with_buff_len *)p_data; 1572 qed_chain_produce(&p_rx->rcq_chain); 1573 } 1574 } 1575 1576 /* If we're lacking entires, let's try to flush buffers to FW */ 1577 if (!p_curp || !p_curb) { 1578 rc = -EBUSY; 1579 p_curp = NULL; 1580 goto out_notify; 1581 } 1582 1583 /* We have an Rx packet we can fill */ 1584 DMA_REGPAIR_LE(p_curb->addr, addr); 1585 p_curb->buff_length = cpu_to_le16(buf_len); 1586 p_curp->rx_buf_addr = addr; 1587 p_curp->cookie = cookie; 1588 p_curp->rxq_bd = p_curb; 1589 p_curp->buf_length = buf_len; 1590 list_del(&p_curp->list_entry); 1591 1592 /* Check if we only want to enqueue this packet without informing FW */ 1593 if (!notify_fw) { 1594 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq); 1595 goto out; 1596 } 1597 1598 out_notify: 1599 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp); 1600 out: 1601 spin_unlock_irqrestore(&p_rx->lock, flags); 1602 return rc; 1603 } 1604 1605 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn, 1606 struct qed_ll2_tx_queue *p_tx, 1607 struct qed_ll2_tx_packet *p_curp, 1608 struct qed_ll2_tx_pkt_info *pkt, 1609 u8 notify_fw) 1610 { 1611 list_del(&p_curp->list_entry); 1612 p_curp->cookie = pkt->cookie; 1613 p_curp->bd_used = pkt->num_of_bds; 1614 p_curp->notify_fw = notify_fw; 1615 p_tx->cur_send_packet = p_curp; 1616 p_tx->cur_send_frag_num = 0; 1617 1618 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag; 1619 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len; 1620 p_tx->cur_send_frag_num++; 1621 } 1622 1623 static void 1624 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn, 1625 struct qed_ll2_info *p_ll2, 1626 struct qed_ll2_tx_packet *p_curp, 1627 struct qed_ll2_tx_pkt_info *pkt) 1628 { 1629 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain; 1630 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain); 1631 struct core_tx_bd *start_bd = NULL; 1632 enum core_roce_flavor_type roce_flavor; 1633 enum core_tx_dest tx_dest; 1634 u16 bd_data = 0, frag_idx; 1635 1636 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE 1637 : CORE_RROCE; 1638 1639 switch (pkt->tx_dest) { 1640 case QED_LL2_TX_DEST_NW: 1641 tx_dest = CORE_TX_DEST_NW; 1642 break; 1643 case QED_LL2_TX_DEST_LB: 1644 tx_dest = CORE_TX_DEST_LB; 1645 break; 1646 case QED_LL2_TX_DEST_DROP: 1647 tx_dest = CORE_TX_DEST_DROP; 1648 break; 1649 default: 1650 tx_dest = CORE_TX_DEST_LB; 1651 break; 1652 } 1653 1654 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1655 if (QED_IS_IWARP_PERSONALITY(p_hwfn) && 1656 p_ll2->input.conn_type == QED_LL2_TYPE_OOO) 1657 start_bd->nw_vlan_or_lb_echo = 1658 cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE); 1659 else 1660 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan); 1661 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, 1662 cpu_to_le16(pkt->l4_hdr_offset_w)); 1663 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest); 1664 bd_data |= pkt->bd_flags; 1665 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1); 1666 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds); 1667 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor); 1668 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum)); 1669 SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum)); 1670 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len)); 1671 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data); 1672 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag); 1673 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len); 1674 1675 DP_VERBOSE(p_hwfn, 1676 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1677 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n", 1678 p_ll2->queue_id, 1679 p_ll2->cid, 1680 p_ll2->input.conn_type, 1681 prod_idx, 1682 pkt->first_frag_len, 1683 pkt->num_of_bds, 1684 le32_to_cpu(start_bd->addr.hi), 1685 le32_to_cpu(start_bd->addr.lo)); 1686 1687 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds) 1688 return; 1689 1690 /* Need to provide the packet with additional BDs for frags */ 1691 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num; 1692 frag_idx < pkt->num_of_bds; frag_idx++) { 1693 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd; 1694 1695 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1696 (*p_bd)->bd_data.as_bitfield = 0; 1697 (*p_bd)->bitfield1 = 0; 1698 p_curp->bds_set[frag_idx].tx_frag = 0; 1699 p_curp->bds_set[frag_idx].frag_len = 0; 1700 } 1701 } 1702 1703 /* This should be called while the Txq spinlock is being held */ 1704 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn, 1705 struct qed_ll2_info *p_ll2_conn) 1706 { 1707 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw; 1708 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 1709 struct qed_ll2_tx_packet *p_pkt = NULL; 1710 struct core_db_data db_msg = { 0, 0, 0 }; 1711 u16 bd_prod; 1712 1713 /* If there are missing BDs, don't do anything now */ 1714 if (p_ll2_conn->tx_queue.cur_send_frag_num != 1715 p_ll2_conn->tx_queue.cur_send_packet->bd_used) 1716 return; 1717 1718 /* Push the current packet to the list and clean after it */ 1719 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry, 1720 &p_ll2_conn->tx_queue.sending_descq); 1721 p_ll2_conn->tx_queue.cur_send_packet = NULL; 1722 p_ll2_conn->tx_queue.cur_send_frag_num = 0; 1723 1724 /* Notify FW of packet only if requested to */ 1725 if (!b_notify) 1726 return; 1727 1728 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain); 1729 1730 while (!list_empty(&p_tx->sending_descq)) { 1731 p_pkt = list_first_entry(&p_tx->sending_descq, 1732 struct qed_ll2_tx_packet, list_entry); 1733 if (!p_pkt) 1734 break; 1735 1736 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq); 1737 } 1738 1739 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM); 1740 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 1741 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL, 1742 DQ_XCM_CORE_TX_BD_PROD_CMD); 1743 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD; 1744 db_msg.spq_prod = cpu_to_le16(bd_prod); 1745 1746 /* Make sure the BDs data is updated before ringing the doorbell */ 1747 wmb(); 1748 1749 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg)); 1750 1751 DP_VERBOSE(p_hwfn, 1752 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1753 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n", 1754 p_ll2_conn->queue_id, 1755 p_ll2_conn->cid, 1756 p_ll2_conn->input.conn_type, db_msg.spq_prod); 1757 } 1758 1759 int qed_ll2_prepare_tx_packet(void *cxt, 1760 u8 connection_handle, 1761 struct qed_ll2_tx_pkt_info *pkt, 1762 bool notify_fw) 1763 { 1764 struct qed_hwfn *p_hwfn = cxt; 1765 struct qed_ll2_tx_packet *p_curp = NULL; 1766 struct qed_ll2_info *p_ll2_conn = NULL; 1767 struct qed_ll2_tx_queue *p_tx; 1768 struct qed_chain *p_tx_chain; 1769 unsigned long flags; 1770 int rc = 0; 1771 1772 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1773 if (!p_ll2_conn) 1774 return -EINVAL; 1775 p_tx = &p_ll2_conn->tx_queue; 1776 p_tx_chain = &p_tx->txq_chain; 1777 1778 if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet) 1779 return -EIO; 1780 1781 spin_lock_irqsave(&p_tx->lock, flags); 1782 if (p_tx->cur_send_packet) { 1783 rc = -EEXIST; 1784 goto out; 1785 } 1786 1787 /* Get entry, but only if we have tx elements for it */ 1788 if (!list_empty(&p_tx->free_descq)) 1789 p_curp = list_first_entry(&p_tx->free_descq, 1790 struct qed_ll2_tx_packet, list_entry); 1791 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds) 1792 p_curp = NULL; 1793 1794 if (!p_curp) { 1795 rc = -EBUSY; 1796 goto out; 1797 } 1798 1799 /* Prepare packet and BD, and perhaps send a doorbell to FW */ 1800 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw); 1801 1802 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt); 1803 1804 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1805 1806 out: 1807 spin_unlock_irqrestore(&p_tx->lock, flags); 1808 return rc; 1809 } 1810 1811 int qed_ll2_set_fragment_of_tx_packet(void *cxt, 1812 u8 connection_handle, 1813 dma_addr_t addr, u16 nbytes) 1814 { 1815 struct qed_ll2_tx_packet *p_cur_send_packet = NULL; 1816 struct qed_hwfn *p_hwfn = cxt; 1817 struct qed_ll2_info *p_ll2_conn = NULL; 1818 u16 cur_send_frag_num = 0; 1819 struct core_tx_bd *p_bd; 1820 unsigned long flags; 1821 1822 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1823 if (!p_ll2_conn) 1824 return -EINVAL; 1825 1826 if (!p_ll2_conn->tx_queue.cur_send_packet) 1827 return -EINVAL; 1828 1829 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet; 1830 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num; 1831 1832 if (cur_send_frag_num >= p_cur_send_packet->bd_used) 1833 return -EINVAL; 1834 1835 /* Fill the BD information, and possibly notify FW */ 1836 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd; 1837 DMA_REGPAIR_LE(p_bd->addr, addr); 1838 p_bd->nbytes = cpu_to_le16(nbytes); 1839 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr; 1840 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes; 1841 1842 p_ll2_conn->tx_queue.cur_send_frag_num++; 1843 1844 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags); 1845 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1846 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags); 1847 1848 return 0; 1849 } 1850 1851 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle) 1852 { 1853 struct qed_hwfn *p_hwfn = cxt; 1854 struct qed_ll2_info *p_ll2_conn = NULL; 1855 int rc = -EINVAL; 1856 struct qed_ptt *p_ptt; 1857 1858 p_ptt = qed_ptt_acquire(p_hwfn); 1859 if (!p_ptt) 1860 return -EAGAIN; 1861 1862 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1863 if (!p_ll2_conn) { 1864 rc = -EINVAL; 1865 goto out; 1866 } 1867 1868 /* Stop Tx & Rx of connection, if needed */ 1869 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1870 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn); 1871 if (rc) 1872 goto out; 1873 qed_ll2_txq_flush(p_hwfn, connection_handle); 1874 } 1875 1876 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1877 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn); 1878 if (rc) 1879 goto out; 1880 qed_ll2_rxq_flush(p_hwfn, connection_handle); 1881 } 1882 1883 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 1884 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1885 1886 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1887 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1888 0x8906, 0, 1889 QED_LLH_FILTER_ETHERTYPE); 1890 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1891 0x8914, 0, 1892 QED_LLH_FILTER_ETHERTYPE); 1893 } 1894 1895 out: 1896 qed_ptt_release(p_hwfn, p_ptt); 1897 return rc; 1898 } 1899 1900 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn, 1901 struct qed_ll2_info *p_ll2_conn) 1902 { 1903 struct qed_ooo_buffer *p_buffer; 1904 1905 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1906 return; 1907 1908 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1909 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 1910 p_hwfn->p_ooo_info))) { 1911 dma_free_coherent(&p_hwfn->cdev->pdev->dev, 1912 p_buffer->rx_buffer_size, 1913 p_buffer->rx_buffer_virt_addr, 1914 p_buffer->rx_buffer_phys_addr); 1915 kfree(p_buffer); 1916 } 1917 } 1918 1919 void qed_ll2_release_connection(void *cxt, u8 connection_handle) 1920 { 1921 struct qed_hwfn *p_hwfn = cxt; 1922 struct qed_ll2_info *p_ll2_conn = NULL; 1923 1924 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1925 if (!p_ll2_conn) 1926 return; 1927 1928 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1929 p_ll2_conn->rx_queue.b_cb_registred = false; 1930 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index); 1931 } 1932 1933 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1934 p_ll2_conn->tx_queue.b_cb_registred = false; 1935 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index); 1936 } 1937 1938 kfree(p_ll2_conn->tx_queue.descq_mem); 1939 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain); 1940 1941 kfree(p_ll2_conn->rx_queue.descq_array); 1942 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain); 1943 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain); 1944 1945 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid); 1946 1947 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn); 1948 1949 mutex_lock(&p_ll2_conn->mutex); 1950 p_ll2_conn->b_active = false; 1951 mutex_unlock(&p_ll2_conn->mutex); 1952 } 1953 1954 int qed_ll2_alloc(struct qed_hwfn *p_hwfn) 1955 { 1956 struct qed_ll2_info *p_ll2_connections; 1957 u8 i; 1958 1959 /* Allocate LL2's set struct */ 1960 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS, 1961 sizeof(struct qed_ll2_info), GFP_KERNEL); 1962 if (!p_ll2_connections) { 1963 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n"); 1964 return -ENOMEM; 1965 } 1966 1967 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 1968 p_ll2_connections[i].my_id = i; 1969 1970 p_hwfn->p_ll2_info = p_ll2_connections; 1971 return 0; 1972 } 1973 1974 void qed_ll2_setup(struct qed_hwfn *p_hwfn) 1975 { 1976 int i; 1977 1978 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 1979 mutex_init(&p_hwfn->p_ll2_info[i].mutex); 1980 } 1981 1982 void qed_ll2_free(struct qed_hwfn *p_hwfn) 1983 { 1984 if (!p_hwfn->p_ll2_info) 1985 return; 1986 1987 kfree(p_hwfn->p_ll2_info); 1988 p_hwfn->p_ll2_info = NULL; 1989 } 1990 1991 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn, 1992 struct qed_ptt *p_ptt, 1993 struct qed_ll2_stats *p_stats) 1994 { 1995 struct core_ll2_port_stats port_stats; 1996 1997 memset(&port_stats, 0, sizeof(port_stats)); 1998 qed_memcpy_from(p_hwfn, p_ptt, &port_stats, 1999 BAR0_MAP_REG_TSDM_RAM + 2000 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)), 2001 sizeof(port_stats)); 2002 2003 p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr); 2004 p_stats->gsi_invalid_pkt_length = 2005 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length); 2006 p_stats->gsi_unsupported_pkt_typ = 2007 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ); 2008 p_stats->gsi_crcchksm_error = 2009 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error); 2010 } 2011 2012 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn, 2013 struct qed_ptt *p_ptt, 2014 struct qed_ll2_info *p_ll2_conn, 2015 struct qed_ll2_stats *p_stats) 2016 { 2017 struct core_ll2_tstorm_per_queue_stat tstats; 2018 u8 qid = p_ll2_conn->queue_id; 2019 u32 tstats_addr; 2020 2021 memset(&tstats, 0, sizeof(tstats)); 2022 tstats_addr = BAR0_MAP_REG_TSDM_RAM + 2023 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid); 2024 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats)); 2025 2026 p_stats->packet_too_big_discard = 2027 HILO_64_REGPAIR(tstats.packet_too_big_discard); 2028 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard); 2029 } 2030 2031 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn, 2032 struct qed_ptt *p_ptt, 2033 struct qed_ll2_info *p_ll2_conn, 2034 struct qed_ll2_stats *p_stats) 2035 { 2036 struct core_ll2_ustorm_per_queue_stat ustats; 2037 u8 qid = p_ll2_conn->queue_id; 2038 u32 ustats_addr; 2039 2040 memset(&ustats, 0, sizeof(ustats)); 2041 ustats_addr = BAR0_MAP_REG_USDM_RAM + 2042 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid); 2043 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats)); 2044 2045 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes); 2046 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes); 2047 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes); 2048 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts); 2049 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts); 2050 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts); 2051 } 2052 2053 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn, 2054 struct qed_ptt *p_ptt, 2055 struct qed_ll2_info *p_ll2_conn, 2056 struct qed_ll2_stats *p_stats) 2057 { 2058 struct core_ll2_pstorm_per_queue_stat pstats; 2059 u8 stats_id = p_ll2_conn->tx_stats_id; 2060 u32 pstats_addr; 2061 2062 memset(&pstats, 0, sizeof(pstats)); 2063 pstats_addr = BAR0_MAP_REG_PSDM_RAM + 2064 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id); 2065 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats)); 2066 2067 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes); 2068 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes); 2069 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes); 2070 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts); 2071 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts); 2072 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts); 2073 } 2074 2075 int qed_ll2_get_stats(void *cxt, 2076 u8 connection_handle, struct qed_ll2_stats *p_stats) 2077 { 2078 struct qed_hwfn *p_hwfn = cxt; 2079 struct qed_ll2_info *p_ll2_conn = NULL; 2080 struct qed_ptt *p_ptt; 2081 2082 memset(p_stats, 0, sizeof(*p_stats)); 2083 2084 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) || 2085 !p_hwfn->p_ll2_info) 2086 return -EINVAL; 2087 2088 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 2089 2090 p_ptt = qed_ptt_acquire(p_hwfn); 2091 if (!p_ptt) { 2092 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 2093 return -EINVAL; 2094 } 2095 2096 if (p_ll2_conn->input.gsi_enable) 2097 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats); 2098 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2099 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2100 if (p_ll2_conn->tx_stats_en) 2101 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2102 2103 qed_ptt_release(p_hwfn, p_ptt); 2104 return 0; 2105 } 2106 2107 static void qed_ll2b_release_rx_packet(void *cxt, 2108 u8 connection_handle, 2109 void *cookie, 2110 dma_addr_t rx_buf_addr, 2111 bool b_last_packet) 2112 { 2113 struct qed_hwfn *p_hwfn = cxt; 2114 2115 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie); 2116 } 2117 2118 static void qed_ll2_register_cb_ops(struct qed_dev *cdev, 2119 const struct qed_ll2_cb_ops *ops, 2120 void *cookie) 2121 { 2122 cdev->ll2->cbs = ops; 2123 cdev->ll2->cb_cookie = cookie; 2124 } 2125 2126 struct qed_ll2_cbs ll2_cbs = { 2127 .rx_comp_cb = &qed_ll2b_complete_rx_packet, 2128 .rx_release_cb = &qed_ll2b_release_rx_packet, 2129 .tx_comp_cb = &qed_ll2b_complete_tx_packet, 2130 .tx_release_cb = &qed_ll2b_complete_tx_packet, 2131 }; 2132 2133 static void qed_ll2_set_conn_data(struct qed_dev *cdev, 2134 struct qed_ll2_acquire_data *data, 2135 struct qed_ll2_params *params, 2136 enum qed_ll2_conn_type conn_type, 2137 u8 *handle, bool lb) 2138 { 2139 memset(data, 0, sizeof(*data)); 2140 2141 data->input.conn_type = conn_type; 2142 data->input.mtu = params->mtu; 2143 data->input.rx_num_desc = QED_LL2_RX_SIZE; 2144 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets; 2145 data->input.rx_vlan_removal_en = params->rx_vlan_stripping; 2146 data->input.tx_num_desc = QED_LL2_TX_SIZE; 2147 data->p_connection_handle = handle; 2148 data->cbs = &ll2_cbs; 2149 ll2_cbs.cookie = QED_LEADING_HWFN(cdev); 2150 2151 if (lb) { 2152 data->input.tx_tc = PKT_LB_TC; 2153 data->input.tx_dest = QED_LL2_TX_DEST_LB; 2154 } else { 2155 data->input.tx_tc = 0; 2156 data->input.tx_dest = QED_LL2_TX_DEST_NW; 2157 } 2158 } 2159 2160 static int qed_ll2_start_ooo(struct qed_dev *cdev, 2161 struct qed_ll2_params *params) 2162 { 2163 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2164 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 2165 struct qed_ll2_acquire_data data; 2166 int rc; 2167 2168 qed_ll2_set_conn_data(cdev, &data, params, 2169 QED_LL2_TYPE_OOO, handle, true); 2170 2171 rc = qed_ll2_acquire_connection(hwfn, &data); 2172 if (rc) { 2173 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n"); 2174 goto out; 2175 } 2176 2177 rc = qed_ll2_establish_connection(hwfn, *handle); 2178 if (rc) { 2179 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n"); 2180 goto fail; 2181 } 2182 2183 return 0; 2184 2185 fail: 2186 qed_ll2_release_connection(hwfn, *handle); 2187 out: 2188 *handle = QED_LL2_UNUSED_HANDLE; 2189 return rc; 2190 } 2191 2192 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params) 2193 { 2194 struct qed_ll2_buffer *buffer, *tmp_buffer; 2195 enum qed_ll2_conn_type conn_type; 2196 struct qed_ll2_acquire_data data; 2197 struct qed_ptt *p_ptt; 2198 int rc, i; 2199 2200 2201 /* Initialize LL2 locks & lists */ 2202 INIT_LIST_HEAD(&cdev->ll2->list); 2203 spin_lock_init(&cdev->ll2->lock); 2204 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN + 2205 L1_CACHE_BYTES + params->mtu; 2206 2207 /*Allocate memory for LL2 */ 2208 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n", 2209 cdev->ll2->rx_size); 2210 for (i = 0; i < QED_LL2_RX_SIZE; i++) { 2211 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); 2212 if (!buffer) { 2213 DP_INFO(cdev, "Failed to allocate LL2 buffers\n"); 2214 goto fail; 2215 } 2216 2217 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data, 2218 &buffer->phys_addr); 2219 if (rc) { 2220 kfree(buffer); 2221 goto fail; 2222 } 2223 2224 list_add_tail(&buffer->list, &cdev->ll2->list); 2225 } 2226 2227 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) { 2228 case QED_PCI_FCOE: 2229 conn_type = QED_LL2_TYPE_FCOE; 2230 break; 2231 case QED_PCI_ISCSI: 2232 conn_type = QED_LL2_TYPE_ISCSI; 2233 break; 2234 case QED_PCI_ETH_ROCE: 2235 conn_type = QED_LL2_TYPE_ROCE; 2236 break; 2237 default: 2238 conn_type = QED_LL2_TYPE_TEST; 2239 } 2240 2241 qed_ll2_set_conn_data(cdev, &data, params, conn_type, 2242 &cdev->ll2->handle, false); 2243 2244 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data); 2245 if (rc) { 2246 DP_INFO(cdev, "Failed to acquire LL2 connection\n"); 2247 goto fail; 2248 } 2249 2250 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev), 2251 cdev->ll2->handle); 2252 if (rc) { 2253 DP_INFO(cdev, "Failed to establish LL2 connection\n"); 2254 goto release_fail; 2255 } 2256 2257 /* Post all Rx buffers to FW */ 2258 spin_lock_bh(&cdev->ll2->lock); 2259 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) { 2260 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), 2261 cdev->ll2->handle, 2262 buffer->phys_addr, 0, buffer, 1); 2263 if (rc) { 2264 DP_INFO(cdev, 2265 "Failed to post an Rx buffer; Deleting it\n"); 2266 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 2267 cdev->ll2->rx_size, DMA_FROM_DEVICE); 2268 kfree(buffer->data); 2269 list_del(&buffer->list); 2270 kfree(buffer); 2271 } else { 2272 cdev->ll2->rx_cnt++; 2273 } 2274 } 2275 spin_unlock_bh(&cdev->ll2->lock); 2276 2277 if (!cdev->ll2->rx_cnt) { 2278 DP_INFO(cdev, "Failed passing even a single Rx buffer\n"); 2279 goto release_terminate; 2280 } 2281 2282 if (!is_valid_ether_addr(params->ll2_mac_address)) { 2283 DP_INFO(cdev, "Invalid Ethernet address\n"); 2284 goto release_terminate; 2285 } 2286 2287 if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI) { 2288 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n"); 2289 rc = qed_ll2_start_ooo(cdev, params); 2290 if (rc) { 2291 DP_INFO(cdev, 2292 "Failed to initialize the OOO LL2 queue\n"); 2293 goto release_terminate; 2294 } 2295 } 2296 2297 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2298 if (!p_ptt) { 2299 DP_INFO(cdev, "Failed to acquire PTT\n"); 2300 goto release_terminate; 2301 } 2302 2303 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2304 params->ll2_mac_address); 2305 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2306 if (rc) { 2307 DP_ERR(cdev, "Failed to allocate LLH filter\n"); 2308 goto release_terminate_all; 2309 } 2310 2311 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address); 2312 return 0; 2313 2314 release_terminate_all: 2315 2316 release_terminate: 2317 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2318 release_fail: 2319 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2320 fail: 2321 qed_ll2_kill_buffers(cdev); 2322 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2323 return -EINVAL; 2324 } 2325 2326 static int qed_ll2_stop(struct qed_dev *cdev) 2327 { 2328 struct qed_ptt *p_ptt; 2329 int rc; 2330 2331 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE) 2332 return 0; 2333 2334 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2335 if (!p_ptt) { 2336 DP_INFO(cdev, "Failed to acquire PTT\n"); 2337 goto fail; 2338 } 2339 2340 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2341 cdev->ll2_mac_address); 2342 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2343 eth_zero_addr(cdev->ll2_mac_address); 2344 2345 if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI) 2346 qed_ll2_stop_ooo(cdev); 2347 2348 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), 2349 cdev->ll2->handle); 2350 if (rc) 2351 DP_INFO(cdev, "Failed to terminate LL2 connection\n"); 2352 2353 qed_ll2_kill_buffers(cdev); 2354 2355 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2356 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2357 2358 return rc; 2359 fail: 2360 return -EINVAL; 2361 } 2362 2363 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb) 2364 { 2365 struct qed_ll2_tx_pkt_info pkt; 2366 const skb_frag_t *frag; 2367 int rc = -EINVAL, i; 2368 dma_addr_t mapping; 2369 u16 vlan = 0; 2370 u8 flags = 0; 2371 2372 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) { 2373 DP_INFO(cdev, "Cannot transmit a checksumed packet\n"); 2374 return -EINVAL; 2375 } 2376 2377 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) { 2378 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n", 2379 1 + skb_shinfo(skb)->nr_frags); 2380 return -EINVAL; 2381 } 2382 2383 mapping = dma_map_single(&cdev->pdev->dev, skb->data, 2384 skb->len, DMA_TO_DEVICE); 2385 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2386 DP_NOTICE(cdev, "SKB mapping failed\n"); 2387 return -EINVAL; 2388 } 2389 2390 /* Request HW to calculate IP csum */ 2391 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) && 2392 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 2393 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT); 2394 2395 if (skb_vlan_tag_present(skb)) { 2396 vlan = skb_vlan_tag_get(skb); 2397 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT); 2398 } 2399 2400 memset(&pkt, 0, sizeof(pkt)); 2401 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags; 2402 pkt.vlan = vlan; 2403 pkt.bd_flags = flags; 2404 pkt.tx_dest = QED_LL2_TX_DEST_NW; 2405 pkt.first_frag = mapping; 2406 pkt.first_frag_len = skb->len; 2407 pkt.cookie = skb; 2408 2409 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle, 2410 &pkt, 1); 2411 if (rc) 2412 goto err; 2413 2414 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 2415 frag = &skb_shinfo(skb)->frags[i]; 2416 2417 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0, 2418 skb_frag_size(frag), DMA_TO_DEVICE); 2419 2420 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2421 DP_NOTICE(cdev, 2422 "Unable to map frag - dropping packet\n"); 2423 goto err; 2424 } 2425 2426 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev), 2427 cdev->ll2->handle, 2428 mapping, 2429 skb_frag_size(frag)); 2430 2431 /* if failed not much to do here, partial packet has been posted 2432 * we can't free memory, will need to wait for completion. 2433 */ 2434 if (rc) 2435 goto err2; 2436 } 2437 2438 return 0; 2439 2440 err: 2441 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE); 2442 2443 err2: 2444 return rc; 2445 } 2446 2447 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats) 2448 { 2449 if (!cdev->ll2) 2450 return -EINVAL; 2451 2452 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev), 2453 cdev->ll2->handle, stats); 2454 } 2455 2456 const struct qed_ll2_ops qed_ll2_ops_pass = { 2457 .start = &qed_ll2_start, 2458 .stop = &qed_ll2_stop, 2459 .start_xmit = &qed_ll2_start_xmit, 2460 .register_cb_ops = &qed_ll2_register_cb_ops, 2461 .get_stats = &qed_ll2_stats, 2462 }; 2463 2464 int qed_ll2_alloc_if(struct qed_dev *cdev) 2465 { 2466 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL); 2467 return cdev->ll2 ? 0 : -ENOMEM; 2468 } 2469 2470 void qed_ll2_dealloc_if(struct qed_dev *cdev) 2471 { 2472 kfree(cdev->ll2); 2473 cdev->ll2 = NULL; 2474 } 2475