1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qed NIC Driver
3  * Copyright (c) 2015-2017  QLogic Corporation
4  * Copyright (c) 2019-2020 Marvell International Ltd.
5  */
6 
7 #include <linux/types.h>
8 #include <asm/byteorder.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/if_vlan.h>
11 #include <linux/kernel.h>
12 #include <linux/pci.h>
13 #include <linux/slab.h>
14 #include <linux/stddef.h>
15 #include <linux/workqueue.h>
16 #include <net/ipv6.h>
17 #include <linux/bitops.h>
18 #include <linux/delay.h>
19 #include <linux/errno.h>
20 #include <linux/etherdevice.h>
21 #include <linux/io.h>
22 #include <linux/list.h>
23 #include <linux/mutex.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/qed/qed_ll2_if.h>
27 #include "qed.h"
28 #include "qed_cxt.h"
29 #include "qed_dev_api.h"
30 #include "qed_hsi.h"
31 #include "qed_iro_hsi.h"
32 #include "qed_hw.h"
33 #include "qed_int.h"
34 #include "qed_ll2.h"
35 #include "qed_mcp.h"
36 #include "qed_ooo.h"
37 #include "qed_reg_addr.h"
38 #include "qed_sp.h"
39 #include "qed_rdma.h"
40 
41 #define QED_LL2_RX_REGISTERED(ll2)	((ll2)->rx_queue.b_cb_registered)
42 #define QED_LL2_TX_REGISTERED(ll2)	((ll2)->tx_queue.b_cb_registered)
43 
44 #define QED_LL2_TX_SIZE (256)
45 #define QED_LL2_RX_SIZE (4096)
46 
47 #define QED_LL2_INVALID_STATS_ID        0xff
48 
49 struct qed_cb_ll2_info {
50 	int rx_cnt;
51 	u32 rx_size;
52 	u8 handle;
53 
54 	/* Lock protecting LL2 buffer lists in sleepless context */
55 	spinlock_t lock;
56 	struct list_head list;
57 
58 	const struct qed_ll2_cb_ops *cbs;
59 	void *cb_cookie;
60 };
61 
62 struct qed_ll2_buffer {
63 	struct list_head list;
64 	void *data;
65 	dma_addr_t phys_addr;
66 };
67 
68 static u8 qed_ll2_handle_to_stats_id(struct qed_hwfn *p_hwfn,
69 				     u8 ll2_queue_type, u8 qid)
70 {
71 	u8 stats_id;
72 
73 	/* For legacy (RAM based) queues, the stats_id will be set as the
74 	 * queue_id. Otherwise (context based queue), it will be set to
75 	 * the "abs_pf_id" offset from the end of the RAM based queue IDs.
76 	 * If the final value exceeds the total counters amount, return
77 	 * INVALID value to indicate that the stats for this connection should
78 	 * be disabled.
79 	 */
80 	if (ll2_queue_type == QED_LL2_RX_TYPE_LEGACY)
81 		stats_id = qid;
82 	else
83 		stats_id = MAX_NUM_LL2_RX_RAM_QUEUES + p_hwfn->abs_pf_id;
84 
85 	if (stats_id < MAX_NUM_LL2_TX_STATS_COUNTERS)
86 		return stats_id;
87 	else
88 		return QED_LL2_INVALID_STATS_ID;
89 }
90 
91 static void qed_ll2b_complete_tx_packet(void *cxt,
92 					u8 connection_handle,
93 					void *cookie,
94 					dma_addr_t first_frag_addr,
95 					bool b_last_fragment,
96 					bool b_last_packet)
97 {
98 	struct qed_hwfn *p_hwfn = cxt;
99 	struct qed_dev *cdev = p_hwfn->cdev;
100 	struct sk_buff *skb = cookie;
101 
102 	/* All we need to do is release the mapping */
103 	dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
104 			 skb_headlen(skb), DMA_TO_DEVICE);
105 
106 	if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
107 		cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
108 				      b_last_fragment);
109 
110 	dev_kfree_skb_any(skb);
111 }
112 
113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
114 				u8 **data, dma_addr_t *phys_addr)
115 {
116 	*data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC);
117 	if (!(*data)) {
118 		DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
119 		return -ENOMEM;
120 	}
121 
122 	*phys_addr = dma_map_single(&cdev->pdev->dev,
123 				    ((*data) + NET_SKB_PAD),
124 				    cdev->ll2->rx_size, DMA_FROM_DEVICE);
125 	if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
126 		DP_INFO(cdev, "Failed to map LL2 buffer data\n");
127 		kfree((*data));
128 		return -ENOMEM;
129 	}
130 
131 	return 0;
132 }
133 
134 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
135 				  struct qed_ll2_buffer *buffer)
136 {
137 	spin_lock_bh(&cdev->ll2->lock);
138 
139 	dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
140 			 cdev->ll2->rx_size, DMA_FROM_DEVICE);
141 	kfree(buffer->data);
142 	list_del(&buffer->list);
143 
144 	cdev->ll2->rx_cnt--;
145 	if (!cdev->ll2->rx_cnt)
146 		DP_INFO(cdev, "All LL2 entries were removed\n");
147 
148 	spin_unlock_bh(&cdev->ll2->lock);
149 
150 	return 0;
151 }
152 
153 static void qed_ll2_kill_buffers(struct qed_dev *cdev)
154 {
155 	struct qed_ll2_buffer *buffer, *tmp_buffer;
156 
157 	list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
158 		qed_ll2_dealloc_buffer(cdev, buffer);
159 }
160 
161 static void qed_ll2b_complete_rx_packet(void *cxt,
162 					struct qed_ll2_comp_rx_data *data)
163 {
164 	struct qed_hwfn *p_hwfn = cxt;
165 	struct qed_ll2_buffer *buffer = data->cookie;
166 	struct qed_dev *cdev = p_hwfn->cdev;
167 	dma_addr_t new_phys_addr;
168 	struct sk_buff *skb;
169 	bool reuse = false;
170 	int rc = -EINVAL;
171 	u8 *new_data;
172 
173 	DP_VERBOSE(p_hwfn,
174 		   (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
175 		   "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
176 		   (u64)data->rx_buf_addr,
177 		   data->u.placement_offset,
178 		   data->length.packet_length,
179 		   data->parse_flags,
180 		   data->vlan, data->opaque_data_0, data->opaque_data_1);
181 
182 	if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
183 		print_hex_dump(KERN_INFO, "",
184 			       DUMP_PREFIX_OFFSET, 16, 1,
185 			       buffer->data, data->length.packet_length, false);
186 	}
187 
188 	/* Determine if data is valid */
189 	if (data->length.packet_length < ETH_HLEN)
190 		reuse = true;
191 
192 	/* Allocate a replacement for buffer; Reuse upon failure */
193 	if (!reuse)
194 		rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
195 					  &new_phys_addr);
196 
197 	/* If need to reuse or there's no replacement buffer, repost this */
198 	if (rc)
199 		goto out_post;
200 	dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
201 			 cdev->ll2->rx_size, DMA_FROM_DEVICE);
202 
203 	skb = slab_build_skb(buffer->data);
204 	if (!skb) {
205 		DP_INFO(cdev, "Failed to build SKB\n");
206 		kfree(buffer->data);
207 		goto out_post1;
208 	}
209 
210 	data->u.placement_offset += NET_SKB_PAD;
211 	skb_reserve(skb, data->u.placement_offset);
212 	skb_put(skb, data->length.packet_length);
213 	skb_checksum_none_assert(skb);
214 
215 	/* Get parital ethernet information instead of eth_type_trans(),
216 	 * Since we don't have an associated net_device.
217 	 */
218 	skb_reset_mac_header(skb);
219 	skb->protocol = eth_hdr(skb)->h_proto;
220 
221 	/* Pass SKB onward */
222 	if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
223 		if (data->vlan)
224 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
225 					       data->vlan);
226 		cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
227 				      data->opaque_data_0,
228 				      data->opaque_data_1);
229 	} else {
230 		DP_VERBOSE(p_hwfn, (NETIF_MSG_RX_STATUS | NETIF_MSG_PKTDATA |
231 				    QED_MSG_LL2 | QED_MSG_STORAGE),
232 			   "Dropping the packet\n");
233 		kfree(buffer->data);
234 	}
235 
236 out_post1:
237 	/* Update Buffer information and update FW producer */
238 	buffer->data = new_data;
239 	buffer->phys_addr = new_phys_addr;
240 
241 out_post:
242 	rc = qed_ll2_post_rx_buffer(p_hwfn, cdev->ll2->handle,
243 				    buffer->phys_addr, 0, buffer, 1);
244 	if (rc)
245 		qed_ll2_dealloc_buffer(cdev, buffer);
246 }
247 
248 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
249 						    u8 connection_handle,
250 						    bool b_lock,
251 						    bool b_only_active)
252 {
253 	struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
254 
255 	if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
256 		return NULL;
257 
258 	if (!p_hwfn->p_ll2_info)
259 		return NULL;
260 
261 	p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
262 
263 	if (b_only_active) {
264 		if (b_lock)
265 			mutex_lock(&p_ll2_conn->mutex);
266 		if (p_ll2_conn->b_active)
267 			p_ret = p_ll2_conn;
268 		if (b_lock)
269 			mutex_unlock(&p_ll2_conn->mutex);
270 	} else {
271 		p_ret = p_ll2_conn;
272 	}
273 
274 	return p_ret;
275 }
276 
277 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
278 						  u8 connection_handle)
279 {
280 	return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
281 }
282 
283 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
284 						       u8 connection_handle)
285 {
286 	return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
287 }
288 
289 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
290 							   *p_hwfn,
291 							   u8 connection_handle)
292 {
293 	return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
294 }
295 
296 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
297 {
298 	bool b_last_packet = false, b_last_frag = false;
299 	struct qed_ll2_tx_packet *p_pkt = NULL;
300 	struct qed_ll2_info *p_ll2_conn;
301 	struct qed_ll2_tx_queue *p_tx;
302 	unsigned long flags = 0;
303 	dma_addr_t tx_frag;
304 
305 	p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
306 	if (!p_ll2_conn)
307 		return;
308 
309 	p_tx = &p_ll2_conn->tx_queue;
310 
311 	spin_lock_irqsave(&p_tx->lock, flags);
312 	while (!list_empty(&p_tx->active_descq)) {
313 		p_pkt = list_first_entry(&p_tx->active_descq,
314 					 struct qed_ll2_tx_packet, list_entry);
315 		if (!p_pkt)
316 			break;
317 
318 		list_del(&p_pkt->list_entry);
319 		b_last_packet = list_empty(&p_tx->active_descq);
320 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
321 		spin_unlock_irqrestore(&p_tx->lock, flags);
322 		if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
323 			struct qed_ooo_buffer *p_buffer;
324 
325 			p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
326 			qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
327 						p_buffer);
328 		} else {
329 			p_tx->cur_completing_packet = *p_pkt;
330 			p_tx->cur_completing_bd_idx = 1;
331 			b_last_frag =
332 				p_tx->cur_completing_bd_idx == p_pkt->bd_used;
333 			tx_frag = p_pkt->bds_set[0].tx_frag;
334 			p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
335 						      p_ll2_conn->my_id,
336 						      p_pkt->cookie,
337 						      tx_frag,
338 						      b_last_frag,
339 						      b_last_packet);
340 		}
341 		spin_lock_irqsave(&p_tx->lock, flags);
342 	}
343 	spin_unlock_irqrestore(&p_tx->lock, flags);
344 }
345 
346 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
347 {
348 	struct qed_ll2_info *p_ll2_conn = p_cookie;
349 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
350 	u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
351 	struct qed_ll2_tx_packet *p_pkt;
352 	bool b_last_frag = false;
353 	unsigned long flags;
354 	int rc = -EINVAL;
355 
356 	if (!p_ll2_conn)
357 		return rc;
358 
359 	spin_lock_irqsave(&p_tx->lock, flags);
360 	if (p_tx->b_completing_packet) {
361 		rc = -EBUSY;
362 		goto out;
363 	}
364 
365 	new_idx = le16_to_cpu(*p_tx->p_fw_cons);
366 	num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
367 	while (num_bds) {
368 		if (list_empty(&p_tx->active_descq))
369 			goto out;
370 
371 		p_pkt = list_first_entry(&p_tx->active_descq,
372 					 struct qed_ll2_tx_packet, list_entry);
373 		if (!p_pkt)
374 			goto out;
375 
376 		p_tx->b_completing_packet = true;
377 		p_tx->cur_completing_packet = *p_pkt;
378 		num_bds_in_packet = p_pkt->bd_used;
379 		list_del(&p_pkt->list_entry);
380 
381 		if (unlikely(num_bds < num_bds_in_packet)) {
382 			DP_NOTICE(p_hwfn,
383 				  "Rest of BDs does not cover whole packet\n");
384 			goto out;
385 		}
386 
387 		num_bds -= num_bds_in_packet;
388 		p_tx->bds_idx += num_bds_in_packet;
389 		while (num_bds_in_packet--)
390 			qed_chain_consume(&p_tx->txq_chain);
391 
392 		p_tx->cur_completing_bd_idx = 1;
393 		b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
394 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
395 
396 		spin_unlock_irqrestore(&p_tx->lock, flags);
397 
398 		p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
399 					   p_ll2_conn->my_id,
400 					   p_pkt->cookie,
401 					   p_pkt->bds_set[0].tx_frag,
402 					   b_last_frag, !num_bds);
403 
404 		spin_lock_irqsave(&p_tx->lock, flags);
405 	}
406 
407 	p_tx->b_completing_packet = false;
408 	rc = 0;
409 out:
410 	spin_unlock_irqrestore(&p_tx->lock, flags);
411 	return rc;
412 }
413 
414 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
415 				  union core_rx_cqe_union *p_cqe,
416 				  struct qed_ll2_comp_rx_data *data)
417 {
418 	data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
419 	data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
420 	data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
421 	data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
422 	data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
423 	data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
424 	data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id);
425 
426 	data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp);
427 }
428 
429 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
430 				  union core_rx_cqe_union *p_cqe,
431 				  struct qed_ll2_comp_rx_data *data)
432 {
433 	data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
434 	data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags);
435 	data->length.packet_length =
436 	    le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
437 	data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
438 	data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
439 	data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
440 	data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
441 }
442 
443 static int
444 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn,
445 			struct qed_ll2_info *p_ll2_conn,
446 			union core_rx_cqe_union *p_cqe,
447 			unsigned long *p_lock_flags)
448 {
449 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
450 	struct core_rx_slow_path_cqe *sp_cqe;
451 
452 	sp_cqe = &p_cqe->rx_cqe_sp;
453 	if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) {
454 		DP_NOTICE(p_hwfn,
455 			  "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n",
456 			  sp_cqe->ramrod_cmd_id);
457 		return -EINVAL;
458 	}
459 
460 	if (!p_ll2_conn->cbs.slowpath_cb) {
461 		DP_NOTICE(p_hwfn,
462 			  "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n");
463 		return -EINVAL;
464 	}
465 
466 	spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
467 
468 	p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie,
469 				    p_ll2_conn->my_id,
470 				    le32_to_cpu(sp_cqe->opaque_data.data[0]),
471 				    le32_to_cpu(sp_cqe->opaque_data.data[1]));
472 
473 	spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
474 
475 	return 0;
476 }
477 
478 static int
479 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
480 			      struct qed_ll2_info *p_ll2_conn,
481 			      union core_rx_cqe_union *p_cqe,
482 			      unsigned long *p_lock_flags, bool b_last_cqe)
483 {
484 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
485 	struct qed_ll2_rx_packet *p_pkt = NULL;
486 	struct qed_ll2_comp_rx_data data;
487 
488 	if (!list_empty(&p_rx->active_descq))
489 		p_pkt = list_first_entry(&p_rx->active_descq,
490 					 struct qed_ll2_rx_packet, list_entry);
491 	if (unlikely(!p_pkt)) {
492 		DP_NOTICE(p_hwfn,
493 			  "[%d] LL2 Rx completion but active_descq is empty\n",
494 			  p_ll2_conn->input.conn_type);
495 
496 		return -EIO;
497 	}
498 	list_del(&p_pkt->list_entry);
499 
500 	if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
501 		qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
502 	else
503 		qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
504 	if (unlikely(qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd))
505 		DP_NOTICE(p_hwfn,
506 			  "Mismatch between active_descq and the LL2 Rx chain\n");
507 
508 	list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
509 
510 	data.connection_handle = p_ll2_conn->my_id;
511 	data.cookie = p_pkt->cookie;
512 	data.rx_buf_addr = p_pkt->rx_buf_addr;
513 	data.b_last_packet = b_last_cqe;
514 
515 	spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
516 	p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
517 
518 	spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
519 
520 	return 0;
521 }
522 
523 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
524 {
525 	struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
526 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
527 	union core_rx_cqe_union *cqe = NULL;
528 	u16 cq_new_idx = 0, cq_old_idx = 0;
529 	unsigned long flags = 0;
530 	int rc = 0;
531 
532 	if (!p_ll2_conn)
533 		return rc;
534 
535 	spin_lock_irqsave(&p_rx->lock, flags);
536 
537 	if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) {
538 		spin_unlock_irqrestore(&p_rx->lock, flags);
539 		return 0;
540 	}
541 
542 	cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
543 	cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
544 
545 	while (cq_new_idx != cq_old_idx) {
546 		bool b_last_cqe = (cq_new_idx == cq_old_idx);
547 
548 		cqe =
549 		    (union core_rx_cqe_union *)
550 		    qed_chain_consume(&p_rx->rcq_chain);
551 		cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
552 
553 		DP_VERBOSE(p_hwfn,
554 			   QED_MSG_LL2,
555 			   "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
556 			   cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
557 
558 		switch (cqe->rx_cqe_sp.type) {
559 		case CORE_RX_CQE_TYPE_SLOW_PATH:
560 			rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn,
561 						     cqe, &flags);
562 			break;
563 		case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
564 		case CORE_RX_CQE_TYPE_REGULAR:
565 			rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
566 							   cqe, &flags,
567 							   b_last_cqe);
568 			break;
569 		default:
570 			rc = -EIO;
571 		}
572 	}
573 
574 	spin_unlock_irqrestore(&p_rx->lock, flags);
575 	return rc;
576 }
577 
578 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
579 {
580 	struct qed_ll2_info *p_ll2_conn = NULL;
581 	struct qed_ll2_rx_packet *p_pkt = NULL;
582 	struct qed_ll2_rx_queue *p_rx;
583 	unsigned long flags = 0;
584 
585 	p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
586 	if (!p_ll2_conn)
587 		return;
588 
589 	p_rx = &p_ll2_conn->rx_queue;
590 
591 	spin_lock_irqsave(&p_rx->lock, flags);
592 	while (!list_empty(&p_rx->active_descq)) {
593 		p_pkt = list_first_entry(&p_rx->active_descq,
594 					 struct qed_ll2_rx_packet, list_entry);
595 		if (!p_pkt)
596 			break;
597 		list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
598 		spin_unlock_irqrestore(&p_rx->lock, flags);
599 
600 		if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
601 			struct qed_ooo_buffer *p_buffer;
602 
603 			p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
604 			qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
605 						p_buffer);
606 		} else {
607 			dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr;
608 			void *cookie = p_pkt->cookie;
609 			bool b_last;
610 
611 			b_last = list_empty(&p_rx->active_descq);
612 			p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie,
613 						      p_ll2_conn->my_id,
614 						      cookie,
615 						      rx_buf_addr, b_last);
616 		}
617 		spin_lock_irqsave(&p_rx->lock, flags);
618 	}
619 	spin_unlock_irqrestore(&p_rx->lock, flags);
620 }
621 
622 static bool
623 qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn *p_hwfn,
624 				struct core_rx_slow_path_cqe *p_cqe)
625 {
626 	struct ooo_opaque *ooo_opq;
627 	u32 cid;
628 
629 	if (p_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH)
630 		return false;
631 
632 	ooo_opq = (struct ooo_opaque *)&p_cqe->opaque_data;
633 	if (ooo_opq->ooo_opcode != TCP_EVENT_DELETE_ISLES)
634 		return false;
635 
636 	/* Need to make a flush */
637 	cid = le32_to_cpu(ooo_opq->cid);
638 	qed_ooo_release_connection_isles(p_hwfn, p_hwfn->p_ooo_info, cid);
639 
640 	return true;
641 }
642 
643 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
644 				  struct qed_ll2_info *p_ll2_conn)
645 {
646 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
647 	u16 packet_length = 0, parse_flags = 0, vlan = 0;
648 	struct qed_ll2_rx_packet *p_pkt = NULL;
649 	union core_rx_cqe_union *cqe = NULL;
650 	u16 cq_new_idx = 0, cq_old_idx = 0;
651 	struct qed_ooo_buffer *p_buffer;
652 	struct ooo_opaque *ooo_opq;
653 	u8 placement_offset = 0;
654 	u8 cqe_type;
655 	u32 cid;
656 
657 	cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
658 	cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
659 	if (cq_new_idx == cq_old_idx)
660 		return 0;
661 
662 	while (cq_new_idx != cq_old_idx) {
663 		struct core_rx_fast_path_cqe *p_cqe_fp;
664 
665 		cqe = qed_chain_consume(&p_rx->rcq_chain);
666 		cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
667 		cqe_type = cqe->rx_cqe_sp.type;
668 
669 		if (cqe_type == CORE_RX_CQE_TYPE_SLOW_PATH)
670 			if (qed_ll2_lb_rxq_handler_slowpath(p_hwfn,
671 							    &cqe->rx_cqe_sp))
672 				continue;
673 
674 		if (unlikely(cqe_type != CORE_RX_CQE_TYPE_REGULAR)) {
675 			DP_NOTICE(p_hwfn,
676 				  "Got a non-regular LB LL2 completion [type 0x%02x]\n",
677 				  cqe_type);
678 			return -EINVAL;
679 		}
680 		p_cqe_fp = &cqe->rx_cqe_fp;
681 
682 		placement_offset = p_cqe_fp->placement_offset;
683 		parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
684 		packet_length = le16_to_cpu(p_cqe_fp->packet_length);
685 		vlan = le16_to_cpu(p_cqe_fp->vlan);
686 		ooo_opq = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
687 		qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info, ooo_opq);
688 		cid = le32_to_cpu(ooo_opq->cid);
689 
690 		/* Process delete isle first */
691 		if (ooo_opq->drop_size)
692 			qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
693 					     ooo_opq->drop_isle,
694 					     ooo_opq->drop_size);
695 
696 		if (ooo_opq->ooo_opcode == TCP_EVENT_NOP)
697 			continue;
698 
699 		/* Now process create/add/join isles */
700 		if (unlikely(list_empty(&p_rx->active_descq))) {
701 			DP_NOTICE(p_hwfn,
702 				  "LL2 OOO RX chain has no submitted buffers\n"
703 				  );
704 			return -EIO;
705 		}
706 
707 		p_pkt = list_first_entry(&p_rx->active_descq,
708 					 struct qed_ll2_rx_packet, list_entry);
709 
710 		if (likely(ooo_opq->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE ||
711 			   ooo_opq->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT ||
712 			   ooo_opq->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT ||
713 			   ooo_opq->ooo_opcode == TCP_EVENT_ADD_PEN ||
714 			   ooo_opq->ooo_opcode == TCP_EVENT_JOIN)) {
715 			if (unlikely(!p_pkt)) {
716 				DP_NOTICE(p_hwfn,
717 					  "LL2 OOO RX packet is not valid\n");
718 				return -EIO;
719 			}
720 			list_del(&p_pkt->list_entry);
721 			p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
722 			p_buffer->packet_length = packet_length;
723 			p_buffer->parse_flags = parse_flags;
724 			p_buffer->vlan = vlan;
725 			p_buffer->placement_offset = placement_offset;
726 			qed_chain_consume(&p_rx->rxq_chain);
727 			list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
728 
729 			switch (ooo_opq->ooo_opcode) {
730 			case TCP_EVENT_ADD_NEW_ISLE:
731 				qed_ooo_add_new_isle(p_hwfn,
732 						     p_hwfn->p_ooo_info,
733 						     cid,
734 						     ooo_opq->ooo_isle,
735 						     p_buffer);
736 				break;
737 			case TCP_EVENT_ADD_ISLE_RIGHT:
738 				qed_ooo_add_new_buffer(p_hwfn,
739 						       p_hwfn->p_ooo_info,
740 						       cid,
741 						       ooo_opq->ooo_isle,
742 						       p_buffer,
743 						       QED_OOO_RIGHT_BUF);
744 				break;
745 			case TCP_EVENT_ADD_ISLE_LEFT:
746 				qed_ooo_add_new_buffer(p_hwfn,
747 						       p_hwfn->p_ooo_info,
748 						       cid,
749 						       ooo_opq->ooo_isle,
750 						       p_buffer,
751 						       QED_OOO_LEFT_BUF);
752 				break;
753 			case TCP_EVENT_JOIN:
754 				qed_ooo_add_new_buffer(p_hwfn,
755 						       p_hwfn->p_ooo_info,
756 						       cid,
757 						       ooo_opq->ooo_isle + 1,
758 						       p_buffer,
759 						       QED_OOO_LEFT_BUF);
760 				qed_ooo_join_isles(p_hwfn,
761 						   p_hwfn->p_ooo_info,
762 						   cid, ooo_opq->ooo_isle);
763 				break;
764 			case TCP_EVENT_ADD_PEN:
765 				qed_ooo_put_ready_buffer(p_hwfn,
766 							 p_hwfn->p_ooo_info,
767 							 p_buffer, true);
768 				break;
769 			}
770 		} else {
771 			DP_NOTICE(p_hwfn,
772 				  "Unexpected event (%d) TX OOO completion\n",
773 				  ooo_opq->ooo_opcode);
774 		}
775 	}
776 
777 	return 0;
778 }
779 
780 static void
781 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
782 			  struct qed_ll2_info *p_ll2_conn)
783 {
784 	struct qed_ll2_tx_pkt_info tx_pkt;
785 	struct qed_ooo_buffer *p_buffer;
786 	u16 l4_hdr_offset_w;
787 	dma_addr_t first_frag;
788 	u8 bd_flags;
789 	int rc;
790 
791 	/* Submit Tx buffers here */
792 	while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
793 						    p_hwfn->p_ooo_info))) {
794 		l4_hdr_offset_w = 0;
795 		bd_flags = 0;
796 
797 		first_frag = p_buffer->rx_buffer_phys_addr +
798 			     p_buffer->placement_offset;
799 		SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
800 		SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
801 
802 		memset(&tx_pkt, 0, sizeof(tx_pkt));
803 		tx_pkt.num_of_bds = 1;
804 		tx_pkt.vlan = p_buffer->vlan;
805 		tx_pkt.bd_flags = bd_flags;
806 		tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
807 		switch (p_ll2_conn->tx_dest) {
808 		case CORE_TX_DEST_NW:
809 			tx_pkt.tx_dest = QED_LL2_TX_DEST_NW;
810 			break;
811 		case CORE_TX_DEST_LB:
812 			tx_pkt.tx_dest = QED_LL2_TX_DEST_LB;
813 			break;
814 		case CORE_TX_DEST_DROP:
815 		default:
816 			tx_pkt.tx_dest = QED_LL2_TX_DEST_DROP;
817 			break;
818 		}
819 		tx_pkt.first_frag = first_frag;
820 		tx_pkt.first_frag_len = p_buffer->packet_length;
821 		tx_pkt.cookie = p_buffer;
822 
823 		rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
824 					       &tx_pkt, true);
825 		if (rc) {
826 			qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
827 						 p_buffer, false);
828 			break;
829 		}
830 	}
831 }
832 
833 static void
834 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
835 			  struct qed_ll2_info *p_ll2_conn)
836 {
837 	struct qed_ooo_buffer *p_buffer;
838 	int rc;
839 
840 	while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
841 						   p_hwfn->p_ooo_info))) {
842 		rc = qed_ll2_post_rx_buffer(p_hwfn,
843 					    p_ll2_conn->my_id,
844 					    p_buffer->rx_buffer_phys_addr,
845 					    0, p_buffer, true);
846 		if (rc) {
847 			qed_ooo_put_free_buffer(p_hwfn,
848 						p_hwfn->p_ooo_info, p_buffer);
849 			break;
850 		}
851 	}
852 }
853 
854 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
855 {
856 	struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
857 	int rc;
858 
859 	if (!p_ll2_conn)
860 		return 0;
861 
862 	if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
863 		return 0;
864 
865 	rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
866 	if (rc)
867 		return rc;
868 
869 	qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
870 	qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
871 
872 	return 0;
873 }
874 
875 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
876 {
877 	struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
878 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
879 	struct qed_ll2_tx_packet *p_pkt = NULL;
880 	struct qed_ooo_buffer *p_buffer;
881 	bool b_dont_submit_rx = false;
882 	u16 new_idx = 0, num_bds = 0;
883 	int rc;
884 
885 	if (unlikely(!p_ll2_conn))
886 		return 0;
887 
888 	if (unlikely(!QED_LL2_TX_REGISTERED(p_ll2_conn)))
889 		return 0;
890 
891 	new_idx = le16_to_cpu(*p_tx->p_fw_cons);
892 	num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
893 
894 	if (unlikely(!num_bds))
895 		return 0;
896 
897 	while (num_bds) {
898 		if (list_empty(&p_tx->active_descq))
899 			return -EINVAL;
900 
901 		p_pkt = list_first_entry(&p_tx->active_descq,
902 					 struct qed_ll2_tx_packet, list_entry);
903 		if (unlikely(!p_pkt))
904 			return -EINVAL;
905 
906 		if (unlikely(p_pkt->bd_used != 1)) {
907 			DP_NOTICE(p_hwfn,
908 				  "Unexpectedly many BDs(%d) in TX OOO completion\n",
909 				  p_pkt->bd_used);
910 			return -EINVAL;
911 		}
912 
913 		list_del(&p_pkt->list_entry);
914 
915 		num_bds--;
916 		p_tx->bds_idx++;
917 		qed_chain_consume(&p_tx->txq_chain);
918 
919 		p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
920 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
921 
922 		if (b_dont_submit_rx) {
923 			qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
924 						p_buffer);
925 			continue;
926 		}
927 
928 		rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
929 					    p_buffer->rx_buffer_phys_addr, 0,
930 					    p_buffer, true);
931 		if (rc != 0) {
932 			qed_ooo_put_free_buffer(p_hwfn,
933 						p_hwfn->p_ooo_info, p_buffer);
934 			b_dont_submit_rx = true;
935 		}
936 	}
937 
938 	qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
939 
940 	return 0;
941 }
942 
943 static void qed_ll2_stop_ooo(struct qed_hwfn *p_hwfn)
944 {
945 	u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
946 
947 	DP_VERBOSE(p_hwfn, (QED_MSG_STORAGE | QED_MSG_LL2),
948 		   "Stopping LL2 OOO queue [%02x]\n", *handle);
949 
950 	qed_ll2_terminate_connection(p_hwfn, *handle);
951 	qed_ll2_release_connection(p_hwfn, *handle);
952 	*handle = QED_LL2_UNUSED_HANDLE;
953 }
954 
955 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
956 				     struct qed_ll2_info *p_ll2_conn,
957 				     u8 action_on_error)
958 {
959 	enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
960 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
961 	struct core_rx_start_ramrod_data *p_ramrod = NULL;
962 	struct qed_spq_entry *p_ent = NULL;
963 	struct qed_sp_init_data init_data;
964 	u16 cqe_pbl_size;
965 	int rc = 0;
966 
967 	/* Get SPQ entry */
968 	memset(&init_data, 0, sizeof(init_data));
969 	init_data.cid = p_ll2_conn->cid;
970 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
971 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
972 
973 	rc = qed_sp_init_request(p_hwfn, &p_ent,
974 				 CORE_RAMROD_RX_QUEUE_START,
975 				 PROTOCOLID_CORE, &init_data);
976 	if (rc)
977 		return rc;
978 
979 	p_ramrod = &p_ent->ramrod.core_rx_queue_start;
980 	memset(p_ramrod, 0, sizeof(*p_ramrod));
981 	p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
982 	p_ramrod->sb_index = p_rx->rx_sb_index;
983 	p_ramrod->complete_event_flg = 1;
984 
985 	p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
986 	DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
987 	cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
988 	p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
989 	DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
990 		       qed_chain_get_pbl_phys(&p_rx->rcq_chain));
991 
992 	p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
993 	p_ramrod->inner_vlan_stripping_en =
994 		p_ll2_conn->input.rx_vlan_removal_en;
995 
996 	if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
997 	    p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE)
998 		p_ramrod->report_outer_vlan = 1;
999 	p_ramrod->queue_id = p_ll2_conn->queue_id;
1000 	p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0;
1001 
1002 	if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) &&
1003 	    p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE &&
1004 	    conn_type != QED_LL2_TYPE_IWARP &&
1005 		(!QED_IS_NVMETCP_PERSONALITY(p_hwfn))) {
1006 		p_ramrod->mf_si_bcast_accept_all = 1;
1007 		p_ramrod->mf_si_mcast_accept_all = 1;
1008 	} else {
1009 		p_ramrod->mf_si_bcast_accept_all = 0;
1010 		p_ramrod->mf_si_mcast_accept_all = 0;
1011 	}
1012 
1013 	p_ramrod->action_on_error.error_type = action_on_error;
1014 	p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1015 	p_ramrod->zero_prod_flg = 1;
1016 
1017 	return qed_spq_post(p_hwfn, p_ent, NULL);
1018 }
1019 
1020 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
1021 				     struct qed_ll2_info *p_ll2_conn)
1022 {
1023 	enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
1024 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1025 	struct core_tx_start_ramrod_data *p_ramrod = NULL;
1026 	struct qed_spq_entry *p_ent = NULL;
1027 	struct qed_sp_init_data init_data;
1028 	u16 pq_id = 0, pbl_size;
1029 	int rc = -EINVAL;
1030 
1031 	if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
1032 		return 0;
1033 
1034 	if (likely(p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO))
1035 		p_ll2_conn->tx_stats_en = 0;
1036 	else
1037 		p_ll2_conn->tx_stats_en = 1;
1038 
1039 	/* Get SPQ entry */
1040 	memset(&init_data, 0, sizeof(init_data));
1041 	init_data.cid = p_ll2_conn->cid;
1042 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1043 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1044 
1045 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1046 				 CORE_RAMROD_TX_QUEUE_START,
1047 				 PROTOCOLID_CORE, &init_data);
1048 	if (rc)
1049 		return rc;
1050 
1051 	p_ramrod = &p_ent->ramrod.core_tx_queue_start;
1052 
1053 	p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
1054 	p_ramrod->sb_index = p_tx->tx_sb_index;
1055 	p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
1056 	p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
1057 	p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
1058 
1059 	DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
1060 		       qed_chain_get_pbl_phys(&p_tx->txq_chain));
1061 	pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
1062 	p_ramrod->pbl_size = cpu_to_le16(pbl_size);
1063 
1064 	switch (p_ll2_conn->input.tx_tc) {
1065 	case PURE_LB_TC:
1066 		pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
1067 		break;
1068 	case PKT_LB_TC:
1069 		pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
1070 		break;
1071 	default:
1072 		pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
1073 		break;
1074 	}
1075 
1076 	p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1077 
1078 	switch (conn_type) {
1079 	case QED_LL2_TYPE_FCOE:
1080 		p_ramrod->conn_type = PROTOCOLID_FCOE;
1081 		break;
1082 	case QED_LL2_TYPE_TCP_ULP:
1083 		p_ramrod->conn_type = PROTOCOLID_TCP_ULP;
1084 		break;
1085 	case QED_LL2_TYPE_ROCE:
1086 		p_ramrod->conn_type = PROTOCOLID_ROCE;
1087 		break;
1088 	case QED_LL2_TYPE_IWARP:
1089 		p_ramrod->conn_type = PROTOCOLID_IWARP;
1090 		break;
1091 	case QED_LL2_TYPE_OOO:
1092 		if (p_hwfn->hw_info.personality == QED_PCI_ISCSI ||
1093 		    p_hwfn->hw_info.personality == QED_PCI_NVMETCP)
1094 			p_ramrod->conn_type = PROTOCOLID_TCP_ULP;
1095 		else
1096 			p_ramrod->conn_type = PROTOCOLID_IWARP;
1097 		break;
1098 	default:
1099 		p_ramrod->conn_type = PROTOCOLID_ETH;
1100 		DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
1101 	}
1102 
1103 	p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1104 
1105 	rc = qed_spq_post(p_hwfn, p_ent, NULL);
1106 	if (rc)
1107 		return rc;
1108 
1109 	rc = qed_db_recovery_add(p_hwfn->cdev, p_tx->doorbell_addr,
1110 				 &p_tx->db_msg, DB_REC_WIDTH_32B,
1111 				 DB_REC_KERNEL);
1112 	return rc;
1113 }
1114 
1115 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1116 				    struct qed_ll2_info *p_ll2_conn)
1117 {
1118 	struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1119 	struct qed_spq_entry *p_ent = NULL;
1120 	struct qed_sp_init_data init_data;
1121 	int rc = -EINVAL;
1122 
1123 	/* Get SPQ entry */
1124 	memset(&init_data, 0, sizeof(init_data));
1125 	init_data.cid = p_ll2_conn->cid;
1126 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1127 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1128 
1129 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1130 				 CORE_RAMROD_RX_QUEUE_STOP,
1131 				 PROTOCOLID_CORE, &init_data);
1132 	if (rc)
1133 		return rc;
1134 
1135 	p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1136 
1137 	p_ramrod->complete_event_flg = 1;
1138 	p_ramrod->queue_id = p_ll2_conn->queue_id;
1139 
1140 	return qed_spq_post(p_hwfn, p_ent, NULL);
1141 }
1142 
1143 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1144 				    struct qed_ll2_info *p_ll2_conn)
1145 {
1146 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1147 	struct qed_spq_entry *p_ent = NULL;
1148 	struct qed_sp_init_data init_data;
1149 	int rc = -EINVAL;
1150 
1151 	qed_db_recovery_del(p_hwfn->cdev, p_tx->doorbell_addr, &p_tx->db_msg);
1152 
1153 	/* Get SPQ entry */
1154 	memset(&init_data, 0, sizeof(init_data));
1155 	init_data.cid = p_ll2_conn->cid;
1156 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1157 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1158 
1159 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1160 				 CORE_RAMROD_TX_QUEUE_STOP,
1161 				 PROTOCOLID_CORE, &init_data);
1162 	if (rc)
1163 		return rc;
1164 
1165 	return qed_spq_post(p_hwfn, p_ent, NULL);
1166 }
1167 
1168 static int
1169 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
1170 			      struct qed_ll2_info *p_ll2_info)
1171 {
1172 	struct qed_chain_init_params params = {
1173 		.intended_use	= QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1174 		.cnt_type	= QED_CHAIN_CNT_TYPE_U16,
1175 		.num_elems	= p_ll2_info->input.rx_num_desc,
1176 	};
1177 	struct qed_dev *cdev = p_hwfn->cdev;
1178 	struct qed_ll2_rx_packet *p_descq;
1179 	u32 capacity;
1180 	int rc = 0;
1181 
1182 	if (!p_ll2_info->input.rx_num_desc)
1183 		goto out;
1184 
1185 	params.mode = QED_CHAIN_MODE_NEXT_PTR;
1186 	params.elem_size = sizeof(struct core_rx_bd);
1187 
1188 	rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rxq_chain, &params);
1189 	if (rc) {
1190 		DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1191 		goto out;
1192 	}
1193 
1194 	capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1195 	p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1196 			  GFP_KERNEL);
1197 	if (!p_descq) {
1198 		rc = -ENOMEM;
1199 		DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1200 		goto out;
1201 	}
1202 	p_ll2_info->rx_queue.descq_array = p_descq;
1203 
1204 	params.mode = QED_CHAIN_MODE_PBL;
1205 	params.elem_size = sizeof(struct core_rx_fast_path_cqe);
1206 
1207 	rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rcq_chain, &params);
1208 	if (rc) {
1209 		DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1210 		goto out;
1211 	}
1212 
1213 	DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1214 		   "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
1215 		   p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
1216 
1217 out:
1218 	return rc;
1219 }
1220 
1221 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
1222 					 struct qed_ll2_info *p_ll2_info)
1223 {
1224 	struct qed_chain_init_params params = {
1225 		.mode		= QED_CHAIN_MODE_PBL,
1226 		.intended_use	= QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1227 		.cnt_type	= QED_CHAIN_CNT_TYPE_U16,
1228 		.num_elems	= p_ll2_info->input.tx_num_desc,
1229 		.elem_size	= sizeof(struct core_tx_bd),
1230 	};
1231 	struct qed_ll2_tx_packet *p_descq;
1232 	size_t desc_size;
1233 	u32 capacity;
1234 	int rc = 0;
1235 
1236 	if (!p_ll2_info->input.tx_num_desc)
1237 		goto out;
1238 
1239 	rc = qed_chain_alloc(p_hwfn->cdev, &p_ll2_info->tx_queue.txq_chain,
1240 			     &params);
1241 	if (rc)
1242 		goto out;
1243 
1244 	capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
1245 	/* All bds_set elements are flexibily added. */
1246 	desc_size = struct_size(p_descq, bds_set,
1247 				p_ll2_info->input.tx_max_bds_per_packet);
1248 
1249 	p_descq = kcalloc(capacity, desc_size, GFP_KERNEL);
1250 	if (!p_descq) {
1251 		rc = -ENOMEM;
1252 		goto out;
1253 	}
1254 	p_ll2_info->tx_queue.descq_mem = p_descq;
1255 
1256 	DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1257 		   "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
1258 		   p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
1259 
1260 out:
1261 	if (rc)
1262 		DP_NOTICE(p_hwfn,
1263 			  "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
1264 			  p_ll2_info->input.tx_num_desc);
1265 	return rc;
1266 }
1267 
1268 static int
1269 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1270 			       struct qed_ll2_info *p_ll2_info, u16 mtu)
1271 {
1272 	struct qed_ooo_buffer *p_buf = NULL;
1273 	void *p_virt;
1274 	u16 buf_idx;
1275 	int rc = 0;
1276 
1277 	if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO)
1278 		return rc;
1279 
1280 	/* Correct number of requested OOO buffers if needed */
1281 	if (!p_ll2_info->input.rx_num_ooo_buffers) {
1282 		u16 num_desc = p_ll2_info->input.rx_num_desc;
1283 
1284 		if (!num_desc)
1285 			return -EINVAL;
1286 		p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1287 	}
1288 
1289 	for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1290 	     buf_idx++) {
1291 		p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
1292 		if (!p_buf) {
1293 			rc = -ENOMEM;
1294 			goto out;
1295 		}
1296 
1297 		p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1298 		p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1299 					 ETH_CACHE_LINE_SIZE - 1) &
1300 					~(ETH_CACHE_LINE_SIZE - 1);
1301 		p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1302 					    p_buf->rx_buffer_size,
1303 					    &p_buf->rx_buffer_phys_addr,
1304 					    GFP_KERNEL);
1305 		if (!p_virt) {
1306 			kfree(p_buf);
1307 			rc = -ENOMEM;
1308 			goto out;
1309 		}
1310 
1311 		p_buf->rx_buffer_virt_addr = p_virt;
1312 		qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1313 	}
1314 
1315 	DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1316 		   "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1317 		   p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1318 
1319 out:
1320 	return rc;
1321 }
1322 
1323 static int
1324 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
1325 {
1326 	if (!cbs || (!cbs->rx_comp_cb ||
1327 		     !cbs->rx_release_cb ||
1328 		     !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
1329 		return -EINVAL;
1330 
1331 	p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
1332 	p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
1333 	p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
1334 	p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
1335 	p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb;
1336 	p_ll2_info->cbs.cookie = cbs->cookie;
1337 
1338 	return 0;
1339 }
1340 
1341 static void _qed_ll2_calc_allowed_conns(struct qed_hwfn *p_hwfn,
1342 					struct qed_ll2_acquire_data *data,
1343 					u8 *start_idx, u8 *last_idx)
1344 {
1345 	/* LL2 queues handles will be split as follows:
1346 	 * First will be the legacy queues, and then the ctx based.
1347 	 */
1348 	if (data->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1349 		*start_idx = QED_LL2_LEGACY_CONN_BASE_PF;
1350 		*last_idx = *start_idx +
1351 			QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF;
1352 	} else {
1353 		/* QED_LL2_RX_TYPE_CTX */
1354 		*start_idx = QED_LL2_CTX_CONN_BASE_PF;
1355 		*last_idx = *start_idx +
1356 			QED_MAX_NUM_OF_CTX_LL2_CONNS_PF;
1357 	}
1358 }
1359 
1360 static enum core_error_handle
1361 qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1362 {
1363 	switch (err) {
1364 	case QED_LL2_DROP_PACKET:
1365 		return LL2_DROP_PACKET;
1366 	case QED_LL2_DO_NOTHING:
1367 		return LL2_DO_NOTHING;
1368 	case QED_LL2_ASSERT:
1369 		return LL2_ASSERT;
1370 	default:
1371 		return LL2_DO_NOTHING;
1372 	}
1373 }
1374 
1375 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
1376 {
1377 	struct qed_hwfn *p_hwfn = cxt;
1378 	qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1379 	struct qed_ll2_info *p_ll2_info = NULL;
1380 	u8 i, first_idx, last_idx, *p_tx_max;
1381 	int rc;
1382 
1383 	if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
1384 		return -EINVAL;
1385 
1386 	_qed_ll2_calc_allowed_conns(p_hwfn, data, &first_idx, &last_idx);
1387 
1388 	/* Find a free connection to be used */
1389 	for (i = first_idx; i < last_idx; i++) {
1390 		mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1391 		if (p_hwfn->p_ll2_info[i].b_active) {
1392 			mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1393 			continue;
1394 		}
1395 
1396 		p_hwfn->p_ll2_info[i].b_active = true;
1397 		p_ll2_info = &p_hwfn->p_ll2_info[i];
1398 		mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1399 		break;
1400 	}
1401 	if (!p_ll2_info)
1402 		return -EBUSY;
1403 
1404 	memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
1405 
1406 	switch (data->input.tx_dest) {
1407 	case QED_LL2_TX_DEST_NW:
1408 		p_ll2_info->tx_dest = CORE_TX_DEST_NW;
1409 		break;
1410 	case QED_LL2_TX_DEST_LB:
1411 		p_ll2_info->tx_dest = CORE_TX_DEST_LB;
1412 		break;
1413 	case QED_LL2_TX_DEST_DROP:
1414 		p_ll2_info->tx_dest = CORE_TX_DEST_DROP;
1415 		break;
1416 	default:
1417 		return -EINVAL;
1418 	}
1419 
1420 	if (data->input.conn_type == QED_LL2_TYPE_OOO ||
1421 	    data->input.secondary_queue)
1422 		p_ll2_info->main_func_queue = false;
1423 	else
1424 		p_ll2_info->main_func_queue = true;
1425 
1426 	/* Correct maximum number of Tx BDs */
1427 	p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1428 	if (*p_tx_max == 0)
1429 		*p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1430 	else
1431 		*p_tx_max = min_t(u8, *p_tx_max,
1432 				  CORE_LL2_TX_MAX_BDS_PER_PACKET);
1433 
1434 	rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
1435 	if (rc) {
1436 		DP_NOTICE(p_hwfn, "Invalid callback functions\n");
1437 		goto q_allocate_fail;
1438 	}
1439 
1440 	rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
1441 	if (rc)
1442 		goto q_allocate_fail;
1443 
1444 	rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
1445 	if (rc)
1446 		goto q_allocate_fail;
1447 
1448 	rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
1449 					    data->input.mtu);
1450 	if (rc)
1451 		goto q_allocate_fail;
1452 
1453 	/* Register callbacks for the Rx/Tx queues */
1454 	if (data->input.conn_type == QED_LL2_TYPE_OOO) {
1455 		comp_rx_cb = qed_ll2_lb_rxq_completion;
1456 		comp_tx_cb = qed_ll2_lb_txq_completion;
1457 	} else {
1458 		comp_rx_cb = qed_ll2_rxq_completion;
1459 		comp_tx_cb = qed_ll2_txq_completion;
1460 	}
1461 
1462 	if (data->input.rx_num_desc) {
1463 		qed_int_register_cb(p_hwfn, comp_rx_cb,
1464 				    &p_hwfn->p_ll2_info[i],
1465 				    &p_ll2_info->rx_queue.rx_sb_index,
1466 				    &p_ll2_info->rx_queue.p_fw_cons);
1467 		p_ll2_info->rx_queue.b_cb_registered = true;
1468 	}
1469 
1470 	if (data->input.tx_num_desc) {
1471 		qed_int_register_cb(p_hwfn,
1472 				    comp_tx_cb,
1473 				    &p_hwfn->p_ll2_info[i],
1474 				    &p_ll2_info->tx_queue.tx_sb_index,
1475 				    &p_ll2_info->tx_queue.p_fw_cons);
1476 		p_ll2_info->tx_queue.b_cb_registered = true;
1477 	}
1478 
1479 	*data->p_connection_handle = i;
1480 	return rc;
1481 
1482 q_allocate_fail:
1483 	qed_ll2_release_connection(p_hwfn, i);
1484 	return -ENOMEM;
1485 }
1486 
1487 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1488 					   struct qed_ll2_info *p_ll2_conn)
1489 {
1490 	enum qed_ll2_error_handle error_input;
1491 	enum core_error_handle error_mode;
1492 	u8 action_on_error = 0;
1493 	int rc;
1494 
1495 	if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1496 		return 0;
1497 
1498 	DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
1499 	error_input = p_ll2_conn->input.ai_err_packet_too_big;
1500 	error_mode = qed_ll2_get_error_choice(error_input);
1501 	SET_FIELD(action_on_error,
1502 		  CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1503 	error_input = p_ll2_conn->input.ai_err_no_buf;
1504 	error_mode = qed_ll2_get_error_choice(error_input);
1505 	SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
1506 
1507 	rc = qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1508 	if (rc)
1509 		return rc;
1510 
1511 	if (p_ll2_conn->rx_queue.ctx_based) {
1512 		rc = qed_db_recovery_add(p_hwfn->cdev,
1513 					 p_ll2_conn->rx_queue.set_prod_addr,
1514 					 &p_ll2_conn->rx_queue.db_data,
1515 					 DB_REC_WIDTH_64B, DB_REC_KERNEL);
1516 	}
1517 
1518 	return rc;
1519 }
1520 
1521 static void
1522 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1523 				 struct qed_ll2_info *p_ll2_conn)
1524 {
1525 	if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
1526 		return;
1527 
1528 	qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1529 	qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1530 }
1531 
1532 static inline u8 qed_ll2_handle_to_queue_id(struct qed_hwfn *p_hwfn,
1533 					    u8 handle,
1534 					    u8 ll2_queue_type)
1535 {
1536 	u8 qid;
1537 
1538 	if (ll2_queue_type == QED_LL2_RX_TYPE_LEGACY)
1539 		return p_hwfn->hw_info.resc_start[QED_LL2_RAM_QUEUE] + handle;
1540 
1541 	/* QED_LL2_RX_TYPE_CTX
1542 	 * FW distinguishes between the legacy queues (ram based) and the
1543 	 * ctx based queues by the queue_id.
1544 	 * The first MAX_NUM_LL2_RX_RAM_QUEUES queues are legacy
1545 	 * and the queue ids above that are ctx base.
1546 	 */
1547 	qid = p_hwfn->hw_info.resc_start[QED_LL2_CTX_QUEUE] +
1548 	      MAX_NUM_LL2_RX_RAM_QUEUES;
1549 
1550 	/* See comment on the acquire connection for how the ll2
1551 	 * queues handles are divided.
1552 	 */
1553 	qid += (handle - QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF);
1554 
1555 	return qid;
1556 }
1557 
1558 int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
1559 {
1560 	struct core_conn_context *p_cxt;
1561 	struct qed_ll2_tx_packet *p_pkt;
1562 	struct qed_ll2_info *p_ll2_conn;
1563 	struct qed_hwfn *p_hwfn = cxt;
1564 	struct qed_ll2_rx_queue *p_rx;
1565 	struct qed_ll2_tx_queue *p_tx;
1566 	struct qed_cxt_info cxt_info;
1567 	struct qed_ptt *p_ptt;
1568 	int rc = -EINVAL;
1569 	u32 i, capacity;
1570 	size_t desc_size;
1571 	u8 qid, stats_id;
1572 
1573 	p_ptt = qed_ptt_acquire(p_hwfn);
1574 	if (!p_ptt)
1575 		return -EAGAIN;
1576 
1577 	p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
1578 	if (!p_ll2_conn) {
1579 		rc = -EINVAL;
1580 		goto out;
1581 	}
1582 
1583 	p_rx = &p_ll2_conn->rx_queue;
1584 	p_tx = &p_ll2_conn->tx_queue;
1585 
1586 	qed_chain_reset(&p_rx->rxq_chain);
1587 	qed_chain_reset(&p_rx->rcq_chain);
1588 	INIT_LIST_HEAD(&p_rx->active_descq);
1589 	INIT_LIST_HEAD(&p_rx->free_descq);
1590 	INIT_LIST_HEAD(&p_rx->posting_descq);
1591 	spin_lock_init(&p_rx->lock);
1592 	capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1593 	for (i = 0; i < capacity; i++)
1594 		list_add_tail(&p_rx->descq_array[i].list_entry,
1595 			      &p_rx->free_descq);
1596 	*p_rx->p_fw_cons = 0;
1597 
1598 	qed_chain_reset(&p_tx->txq_chain);
1599 	INIT_LIST_HEAD(&p_tx->active_descq);
1600 	INIT_LIST_HEAD(&p_tx->free_descq);
1601 	INIT_LIST_HEAD(&p_tx->sending_descq);
1602 	spin_lock_init(&p_tx->lock);
1603 	capacity = qed_chain_get_capacity(&p_tx->txq_chain);
1604 	/* All bds_set elements are flexibily added. */
1605 	desc_size = struct_size(p_pkt, bds_set,
1606 				p_ll2_conn->input.tx_max_bds_per_packet);
1607 
1608 	for (i = 0; i < capacity; i++) {
1609 		p_pkt = p_tx->descq_mem + desc_size * i;
1610 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
1611 	}
1612 	p_tx->cur_completing_bd_idx = 0;
1613 	p_tx->bds_idx = 0;
1614 	p_tx->b_completing_packet = false;
1615 	p_tx->cur_send_packet = NULL;
1616 	p_tx->cur_send_frag_num = 0;
1617 	p_tx->cur_completing_frag_num = 0;
1618 	*p_tx->p_fw_cons = 0;
1619 
1620 	rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1621 	if (rc)
1622 		goto out;
1623 	cxt_info.iid = p_ll2_conn->cid;
1624 	rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
1625 	if (rc) {
1626 		DP_NOTICE(p_hwfn, "Cannot find context info for cid=%d\n",
1627 			  p_ll2_conn->cid);
1628 		goto out;
1629 	}
1630 
1631 	p_cxt = cxt_info.p_cxt;
1632 
1633 	memset(p_cxt, 0, sizeof(*p_cxt));
1634 
1635 	qid = qed_ll2_handle_to_queue_id(p_hwfn, connection_handle,
1636 					 p_ll2_conn->input.rx_conn_type);
1637 	stats_id = qed_ll2_handle_to_stats_id(p_hwfn,
1638 					      p_ll2_conn->input.rx_conn_type,
1639 					      qid);
1640 	p_ll2_conn->queue_id = qid;
1641 	p_ll2_conn->tx_stats_id = stats_id;
1642 
1643 	/* If there is no valid stats id for this connection, disable stats */
1644 	if (p_ll2_conn->tx_stats_id == QED_LL2_INVALID_STATS_ID) {
1645 		p_ll2_conn->tx_stats_en = 0;
1646 		DP_VERBOSE(p_hwfn,
1647 			   QED_MSG_LL2,
1648 			   "Disabling stats for queue %d - not enough counters\n",
1649 			   qid);
1650 	}
1651 
1652 	DP_VERBOSE(p_hwfn,
1653 		   QED_MSG_LL2,
1654 		   "Establishing ll2 queue. PF %d ctx_based=%d abs qid=%d stats_id=%d\n",
1655 		   p_hwfn->rel_pf_id,
1656 		   p_ll2_conn->input.rx_conn_type, qid, stats_id);
1657 
1658 	if (p_ll2_conn->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1659 		p_rx->set_prod_addr =
1660 		    (u8 __iomem *)p_hwfn->regview +
1661 		    GET_GTT_REG_ADDR(GTT_BAR0_MAP_REG_TSDM_RAM,
1662 				     TSTORM_LL2_RX_PRODS, qid);
1663 	} else {
1664 		/* QED_LL2_RX_TYPE_CTX - using doorbell */
1665 		p_rx->ctx_based = 1;
1666 
1667 		p_rx->set_prod_addr = p_hwfn->doorbells +
1668 			p_hwfn->dpi_start_offset +
1669 			DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_LL2_PROD_UPDATE);
1670 
1671 		/* prepare db data */
1672 		p_rx->db_data.icid = cpu_to_le16((u16)p_ll2_conn->cid);
1673 		SET_FIELD(p_rx->db_data.params,
1674 			  CORE_PWM_PROD_UPDATE_DATA_AGG_CMD, DB_AGG_CMD_SET);
1675 		SET_FIELD(p_rx->db_data.params,
1676 			  CORE_PWM_PROD_UPDATE_DATA_RESERVED1, 0);
1677 	}
1678 
1679 	p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1680 					    qed_db_addr(p_ll2_conn->cid,
1681 							DQ_DEMS_LEGACY);
1682 	/* prepare db data */
1683 	SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1684 	SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1685 	SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1686 		  DQ_XCM_CORE_TX_BD_PROD_CMD);
1687 	p_tx->db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1688 
1689 	rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1690 	if (rc)
1691 		goto out;
1692 
1693 	rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1694 	if (rc)
1695 		goto out;
1696 
1697 	if (!QED_IS_RDMA_PERSONALITY(p_hwfn) &&
1698 	    !QED_IS_NVMETCP_PERSONALITY(p_hwfn))
1699 		qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
1700 
1701 	qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1702 
1703 	if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
1704 		if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
1705 			qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1706 						    QED_LLH_FILTER_ETHERTYPE,
1707 						    ETH_P_FCOE, 0);
1708 		qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1709 					    QED_LLH_FILTER_ETHERTYPE,
1710 					    ETH_P_FIP, 0);
1711 	}
1712 
1713 out:
1714 	qed_ptt_release(p_hwfn, p_ptt);
1715 	return rc;
1716 }
1717 
1718 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1719 					     struct qed_ll2_rx_queue *p_rx,
1720 					     struct qed_ll2_rx_packet *p_curp)
1721 {
1722 	struct qed_ll2_rx_packet *p_posting_packet = NULL;
1723 	struct core_ll2_rx_prod rx_prod = { 0, 0 };
1724 	bool b_notify_fw = false;
1725 	u16 bd_prod, cq_prod;
1726 
1727 	/* This handles the flushing of already posted buffers */
1728 	while (!list_empty(&p_rx->posting_descq)) {
1729 		p_posting_packet = list_first_entry(&p_rx->posting_descq,
1730 						    struct qed_ll2_rx_packet,
1731 						    list_entry);
1732 		list_move_tail(&p_posting_packet->list_entry,
1733 			       &p_rx->active_descq);
1734 		b_notify_fw = true;
1735 	}
1736 
1737 	/* This handles the supplied packet [if there is one] */
1738 	if (p_curp) {
1739 		list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1740 		b_notify_fw = true;
1741 	}
1742 
1743 	if (!b_notify_fw)
1744 		return;
1745 
1746 	bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1747 	cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1748 	if (p_rx->ctx_based) {
1749 		/* update producer by giving a doorbell */
1750 		p_rx->db_data.prod.bd_prod = cpu_to_le16(bd_prod);
1751 		p_rx->db_data.prod.cqe_prod = cpu_to_le16(cq_prod);
1752 		/* Make sure chain element is updated before ringing the
1753 		 * doorbell
1754 		 */
1755 		dma_wmb();
1756 		DIRECT_REG_WR64(p_rx->set_prod_addr,
1757 				*((u64 *)&p_rx->db_data));
1758 	} else {
1759 		rx_prod.bd_prod = cpu_to_le16(bd_prod);
1760 		rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1761 
1762 		/* Make sure chain element is updated before ringing the
1763 		 * doorbell
1764 		 */
1765 		dma_wmb();
1766 
1767 		DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1768 	}
1769 }
1770 
1771 int qed_ll2_post_rx_buffer(void *cxt,
1772 			   u8 connection_handle,
1773 			   dma_addr_t addr,
1774 			   u16 buf_len, void *cookie, u8 notify_fw)
1775 {
1776 	struct qed_hwfn *p_hwfn = cxt;
1777 	struct core_rx_bd_with_buff_len *p_curb = NULL;
1778 	struct qed_ll2_rx_packet *p_curp = NULL;
1779 	struct qed_ll2_info *p_ll2_conn;
1780 	struct qed_ll2_rx_queue *p_rx;
1781 	unsigned long flags;
1782 	void *p_data;
1783 	int rc = 0;
1784 
1785 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1786 	if (!p_ll2_conn)
1787 		return -EINVAL;
1788 	p_rx = &p_ll2_conn->rx_queue;
1789 	if (!p_rx->set_prod_addr)
1790 		return -EIO;
1791 
1792 	spin_lock_irqsave(&p_rx->lock, flags);
1793 	if (!list_empty(&p_rx->free_descq))
1794 		p_curp = list_first_entry(&p_rx->free_descq,
1795 					  struct qed_ll2_rx_packet, list_entry);
1796 	if (p_curp) {
1797 		if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1798 		    qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1799 			p_data = qed_chain_produce(&p_rx->rxq_chain);
1800 			p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1801 			qed_chain_produce(&p_rx->rcq_chain);
1802 		}
1803 	}
1804 
1805 	/* If we're lacking entries, let's try to flush buffers to FW */
1806 	if (!p_curp || !p_curb) {
1807 		rc = -EBUSY;
1808 		p_curp = NULL;
1809 		goto out_notify;
1810 	}
1811 
1812 	/* We have an Rx packet we can fill */
1813 	DMA_REGPAIR_LE(p_curb->addr, addr);
1814 	p_curb->buff_length = cpu_to_le16(buf_len);
1815 	p_curp->rx_buf_addr = addr;
1816 	p_curp->cookie = cookie;
1817 	p_curp->rxq_bd = p_curb;
1818 	p_curp->buf_length = buf_len;
1819 	list_del(&p_curp->list_entry);
1820 
1821 	/* Check if we only want to enqueue this packet without informing FW */
1822 	if (!notify_fw) {
1823 		list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1824 		goto out;
1825 	}
1826 
1827 out_notify:
1828 	qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1829 out:
1830 	spin_unlock_irqrestore(&p_rx->lock, flags);
1831 	return rc;
1832 }
1833 
1834 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1835 					  struct qed_ll2_tx_queue *p_tx,
1836 					  struct qed_ll2_tx_packet *p_curp,
1837 					  struct qed_ll2_tx_pkt_info *pkt,
1838 					  u8 notify_fw)
1839 {
1840 	list_del(&p_curp->list_entry);
1841 	p_curp->cookie = pkt->cookie;
1842 	p_curp->bd_used = pkt->num_of_bds;
1843 	p_curp->notify_fw = notify_fw;
1844 	p_tx->cur_send_packet = p_curp;
1845 	p_tx->cur_send_frag_num = 0;
1846 
1847 	p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1848 	p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
1849 	p_tx->cur_send_frag_num++;
1850 }
1851 
1852 static void
1853 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1854 				 struct qed_ll2_info *p_ll2,
1855 				 struct qed_ll2_tx_packet *p_curp,
1856 				 struct qed_ll2_tx_pkt_info *pkt)
1857 {
1858 	struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1859 	u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1860 	struct core_tx_bd *start_bd = NULL;
1861 	enum core_roce_flavor_type roce_flavor;
1862 	enum core_tx_dest tx_dest;
1863 	u16 bd_data = 0, frag_idx;
1864 	u16 bitfield1;
1865 
1866 	roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1867 							     : CORE_RROCE;
1868 
1869 	switch (pkt->tx_dest) {
1870 	case QED_LL2_TX_DEST_NW:
1871 		tx_dest = CORE_TX_DEST_NW;
1872 		break;
1873 	case QED_LL2_TX_DEST_LB:
1874 		tx_dest = CORE_TX_DEST_LB;
1875 		break;
1876 	case QED_LL2_TX_DEST_DROP:
1877 		tx_dest = CORE_TX_DEST_DROP;
1878 		break;
1879 	default:
1880 		tx_dest = CORE_TX_DEST_LB;
1881 		break;
1882 	}
1883 
1884 	start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1885 	if (likely(QED_IS_IWARP_PERSONALITY(p_hwfn) &&
1886 		   p_ll2->input.conn_type == QED_LL2_TYPE_OOO)) {
1887 		start_bd->nw_vlan_or_lb_echo =
1888 		    cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE);
1889 	} else {
1890 		start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
1891 		if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
1892 		    p_ll2->input.conn_type == QED_LL2_TYPE_FCOE)
1893 			pkt->remove_stag = true;
1894 	}
1895 
1896 	bitfield1 = le16_to_cpu(start_bd->bitfield1);
1897 	SET_FIELD(bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, pkt->l4_hdr_offset_w);
1898 	SET_FIELD(bitfield1, CORE_TX_BD_TX_DST, tx_dest);
1899 	start_bd->bitfield1 = cpu_to_le16(bitfield1);
1900 
1901 	bd_data |= pkt->bd_flags;
1902 	SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
1903 	SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
1904 	SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
1905 	SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum));
1906 	SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum));
1907 	SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len));
1908 	SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION,
1909 		  !!(pkt->remove_stag));
1910 
1911 	start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
1912 	DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1913 	start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
1914 
1915 	DP_VERBOSE(p_hwfn,
1916 		   (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1917 		   "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1918 		   p_ll2->queue_id,
1919 		   p_ll2->cid,
1920 		   p_ll2->input.conn_type,
1921 		   prod_idx,
1922 		   pkt->first_frag_len,
1923 		   pkt->num_of_bds,
1924 		   le32_to_cpu(start_bd->addr.hi),
1925 		   le32_to_cpu(start_bd->addr.lo));
1926 
1927 	if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
1928 		return;
1929 
1930 	/* Need to provide the packet with additional BDs for frags */
1931 	for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
1932 	     frag_idx < pkt->num_of_bds; frag_idx++) {
1933 		struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1934 
1935 		*p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1936 		(*p_bd)->bd_data.as_bitfield = 0;
1937 		(*p_bd)->bitfield1 = 0;
1938 		p_curp->bds_set[frag_idx].tx_frag = 0;
1939 		p_curp->bds_set[frag_idx].frag_len = 0;
1940 	}
1941 }
1942 
1943 /* This should be called while the Txq spinlock is being held */
1944 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1945 				     struct qed_ll2_info *p_ll2_conn)
1946 {
1947 	bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1948 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1949 	struct qed_ll2_tx_packet *p_pkt = NULL;
1950 	u16 bd_prod;
1951 
1952 	/* If there are missing BDs, don't do anything now */
1953 	if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1954 	    p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1955 		return;
1956 
1957 	/* Push the current packet to the list and clean after it */
1958 	list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1959 		      &p_ll2_conn->tx_queue.sending_descq);
1960 	p_ll2_conn->tx_queue.cur_send_packet = NULL;
1961 	p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1962 
1963 	/* Notify FW of packet only if requested to */
1964 	if (!b_notify)
1965 		return;
1966 
1967 	bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1968 
1969 	while (!list_empty(&p_tx->sending_descq)) {
1970 		p_pkt = list_first_entry(&p_tx->sending_descq,
1971 					 struct qed_ll2_tx_packet, list_entry);
1972 		if (!p_pkt)
1973 			break;
1974 
1975 		list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
1976 	}
1977 
1978 	p_tx->db_msg.spq_prod = cpu_to_le16(bd_prod);
1979 
1980 	/* Make sure the BDs data is updated before ringing the doorbell */
1981 	wmb();
1982 
1983 	DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&p_tx->db_msg));
1984 
1985 	DP_VERBOSE(p_hwfn,
1986 		   (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1987 		   "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1988 		   p_ll2_conn->queue_id,
1989 		   p_ll2_conn->cid,
1990 		   p_ll2_conn->input.conn_type, p_tx->db_msg.spq_prod);
1991 }
1992 
1993 int qed_ll2_prepare_tx_packet(void *cxt,
1994 			      u8 connection_handle,
1995 			      struct qed_ll2_tx_pkt_info *pkt,
1996 			      bool notify_fw)
1997 {
1998 	struct qed_hwfn *p_hwfn = cxt;
1999 	struct qed_ll2_tx_packet *p_curp = NULL;
2000 	struct qed_ll2_info *p_ll2_conn = NULL;
2001 	struct qed_ll2_tx_queue *p_tx;
2002 	struct qed_chain *p_tx_chain;
2003 	unsigned long flags;
2004 	int rc = 0;
2005 
2006 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2007 	if (unlikely(!p_ll2_conn))
2008 		return -EINVAL;
2009 	p_tx = &p_ll2_conn->tx_queue;
2010 	p_tx_chain = &p_tx->txq_chain;
2011 
2012 	if (unlikely(pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet))
2013 		return -EIO;
2014 
2015 	spin_lock_irqsave(&p_tx->lock, flags);
2016 	if (unlikely(p_tx->cur_send_packet)) {
2017 		rc = -EEXIST;
2018 		goto out;
2019 	}
2020 
2021 	/* Get entry, but only if we have tx elements for it */
2022 	if (unlikely(!list_empty(&p_tx->free_descq)))
2023 		p_curp = list_first_entry(&p_tx->free_descq,
2024 					  struct qed_ll2_tx_packet, list_entry);
2025 	if (unlikely(p_curp &&
2026 		     qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds))
2027 		p_curp = NULL;
2028 
2029 	if (unlikely(!p_curp)) {
2030 		rc = -EBUSY;
2031 		goto out;
2032 	}
2033 
2034 	/* Prepare packet and BD, and perhaps send a doorbell to FW */
2035 	qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
2036 
2037 	qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
2038 
2039 	qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
2040 
2041 out:
2042 	spin_unlock_irqrestore(&p_tx->lock, flags);
2043 	return rc;
2044 }
2045 
2046 int qed_ll2_set_fragment_of_tx_packet(void *cxt,
2047 				      u8 connection_handle,
2048 				      dma_addr_t addr, u16 nbytes)
2049 {
2050 	struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
2051 	struct qed_hwfn *p_hwfn = cxt;
2052 	struct qed_ll2_info *p_ll2_conn = NULL;
2053 	u16 cur_send_frag_num = 0;
2054 	struct core_tx_bd *p_bd;
2055 	unsigned long flags;
2056 
2057 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2058 	if (unlikely(!p_ll2_conn))
2059 		return -EINVAL;
2060 
2061 	if (unlikely(!p_ll2_conn->tx_queue.cur_send_packet))
2062 		return -EINVAL;
2063 
2064 	p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
2065 	cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
2066 
2067 	if (unlikely(cur_send_frag_num >= p_cur_send_packet->bd_used))
2068 		return -EINVAL;
2069 
2070 	/* Fill the BD information, and possibly notify FW */
2071 	p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
2072 	DMA_REGPAIR_LE(p_bd->addr, addr);
2073 	p_bd->nbytes = cpu_to_le16(nbytes);
2074 	p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
2075 	p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
2076 
2077 	p_ll2_conn->tx_queue.cur_send_frag_num++;
2078 
2079 	spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
2080 	qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
2081 	spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
2082 
2083 	return 0;
2084 }
2085 
2086 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
2087 {
2088 	struct qed_hwfn *p_hwfn = cxt;
2089 	struct qed_ll2_info *p_ll2_conn = NULL;
2090 	int rc = -EINVAL;
2091 	struct qed_ptt *p_ptt;
2092 
2093 	p_ptt = qed_ptt_acquire(p_hwfn);
2094 	if (!p_ptt)
2095 		return -EAGAIN;
2096 
2097 	p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
2098 	if (!p_ll2_conn) {
2099 		rc = -EINVAL;
2100 		goto out;
2101 	}
2102 
2103 	/* Stop Tx & Rx of connection, if needed */
2104 	if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
2105 		p_ll2_conn->tx_queue.b_cb_registered = false;
2106 		smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2107 		rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
2108 		if (rc)
2109 			goto out;
2110 
2111 		qed_ll2_txq_flush(p_hwfn, connection_handle);
2112 		qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
2113 	}
2114 
2115 	if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
2116 		p_ll2_conn->rx_queue.b_cb_registered = false;
2117 		smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2118 
2119 		if (p_ll2_conn->rx_queue.ctx_based)
2120 			qed_db_recovery_del(p_hwfn->cdev,
2121 					    p_ll2_conn->rx_queue.set_prod_addr,
2122 					    &p_ll2_conn->rx_queue.db_data);
2123 
2124 		rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
2125 		if (rc)
2126 			goto out;
2127 
2128 		qed_ll2_rxq_flush(p_hwfn, connection_handle);
2129 		qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
2130 	}
2131 
2132 	if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
2133 		qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2134 
2135 	if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
2136 		if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
2137 			qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2138 						       QED_LLH_FILTER_ETHERTYPE,
2139 						       ETH_P_FCOE, 0);
2140 		qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2141 					       QED_LLH_FILTER_ETHERTYPE,
2142 					       ETH_P_FIP, 0);
2143 	}
2144 
2145 out:
2146 	qed_ptt_release(p_hwfn, p_ptt);
2147 	return rc;
2148 }
2149 
2150 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
2151 					   struct qed_ll2_info *p_ll2_conn)
2152 {
2153 	struct qed_ooo_buffer *p_buffer;
2154 
2155 	if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
2156 		return;
2157 
2158 	qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2159 	while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
2160 						   p_hwfn->p_ooo_info))) {
2161 		dma_free_coherent(&p_hwfn->cdev->pdev->dev,
2162 				  p_buffer->rx_buffer_size,
2163 				  p_buffer->rx_buffer_virt_addr,
2164 				  p_buffer->rx_buffer_phys_addr);
2165 		kfree(p_buffer);
2166 	}
2167 }
2168 
2169 void qed_ll2_release_connection(void *cxt, u8 connection_handle)
2170 {
2171 	struct qed_hwfn *p_hwfn = cxt;
2172 	struct qed_ll2_info *p_ll2_conn = NULL;
2173 
2174 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2175 	if (!p_ll2_conn)
2176 		return;
2177 
2178 	kfree(p_ll2_conn->tx_queue.descq_mem);
2179 	qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
2180 
2181 	kfree(p_ll2_conn->rx_queue.descq_array);
2182 	qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
2183 	qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
2184 
2185 	qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
2186 
2187 	qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
2188 
2189 	mutex_lock(&p_ll2_conn->mutex);
2190 	p_ll2_conn->b_active = false;
2191 	mutex_unlock(&p_ll2_conn->mutex);
2192 }
2193 
2194 int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
2195 {
2196 	struct qed_ll2_info *p_ll2_connections;
2197 	u8 i;
2198 
2199 	/* Allocate LL2's set struct */
2200 	p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
2201 				    sizeof(struct qed_ll2_info), GFP_KERNEL);
2202 	if (!p_ll2_connections) {
2203 		DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
2204 		return -ENOMEM;
2205 	}
2206 
2207 	for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2208 		p_ll2_connections[i].my_id = i;
2209 
2210 	p_hwfn->p_ll2_info = p_ll2_connections;
2211 	return 0;
2212 }
2213 
2214 void qed_ll2_setup(struct qed_hwfn *p_hwfn)
2215 {
2216 	int i;
2217 
2218 	for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2219 		mutex_init(&p_hwfn->p_ll2_info[i].mutex);
2220 }
2221 
2222 void qed_ll2_free(struct qed_hwfn *p_hwfn)
2223 {
2224 	if (!p_hwfn->p_ll2_info)
2225 		return;
2226 
2227 	kfree(p_hwfn->p_ll2_info);
2228 	p_hwfn->p_ll2_info = NULL;
2229 }
2230 
2231 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn,
2232 				    struct qed_ptt *p_ptt,
2233 				    struct qed_ll2_stats *p_stats)
2234 {
2235 	struct core_ll2_port_stats port_stats;
2236 
2237 	memset(&port_stats, 0, sizeof(port_stats));
2238 	qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
2239 			BAR0_MAP_REG_TSDM_RAM +
2240 			TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)),
2241 			sizeof(port_stats));
2242 
2243 	p_stats->gsi_invalid_hdr += HILO_64_REGPAIR(port_stats.gsi_invalid_hdr);
2244 	p_stats->gsi_invalid_pkt_length +=
2245 	    HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length);
2246 	p_stats->gsi_unsupported_pkt_typ +=
2247 	    HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ);
2248 	p_stats->gsi_crcchksm_error +=
2249 	    HILO_64_REGPAIR(port_stats.gsi_crcchksm_error);
2250 }
2251 
2252 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
2253 				struct qed_ptt *p_ptt,
2254 				struct qed_ll2_info *p_ll2_conn,
2255 				struct qed_ll2_stats *p_stats)
2256 {
2257 	struct core_ll2_tstorm_per_queue_stat tstats;
2258 	u8 qid = p_ll2_conn->queue_id;
2259 	u32 tstats_addr;
2260 
2261 	memset(&tstats, 0, sizeof(tstats));
2262 	tstats_addr = BAR0_MAP_REG_TSDM_RAM +
2263 		      CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
2264 	qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
2265 
2266 	p_stats->packet_too_big_discard +=
2267 			HILO_64_REGPAIR(tstats.packet_too_big_discard);
2268 	p_stats->no_buff_discard += HILO_64_REGPAIR(tstats.no_buff_discard);
2269 }
2270 
2271 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
2272 				struct qed_ptt *p_ptt,
2273 				struct qed_ll2_info *p_ll2_conn,
2274 				struct qed_ll2_stats *p_stats)
2275 {
2276 	struct core_ll2_ustorm_per_queue_stat ustats;
2277 	u8 qid = p_ll2_conn->queue_id;
2278 	u32 ustats_addr;
2279 
2280 	memset(&ustats, 0, sizeof(ustats));
2281 	ustats_addr = BAR0_MAP_REG_USDM_RAM +
2282 		      CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
2283 	qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
2284 
2285 	p_stats->rcv_ucast_bytes += HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
2286 	p_stats->rcv_mcast_bytes += HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
2287 	p_stats->rcv_bcast_bytes += HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
2288 	p_stats->rcv_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
2289 	p_stats->rcv_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
2290 	p_stats->rcv_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
2291 }
2292 
2293 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
2294 				struct qed_ptt *p_ptt,
2295 				struct qed_ll2_info *p_ll2_conn,
2296 				struct qed_ll2_stats *p_stats)
2297 {
2298 	struct core_ll2_pstorm_per_queue_stat pstats;
2299 	u8 stats_id = p_ll2_conn->tx_stats_id;
2300 	u32 pstats_addr;
2301 
2302 	memset(&pstats, 0, sizeof(pstats));
2303 	pstats_addr = BAR0_MAP_REG_PSDM_RAM +
2304 		      CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
2305 	qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
2306 
2307 	p_stats->sent_ucast_bytes += HILO_64_REGPAIR(pstats.sent_ucast_bytes);
2308 	p_stats->sent_mcast_bytes += HILO_64_REGPAIR(pstats.sent_mcast_bytes);
2309 	p_stats->sent_bcast_bytes += HILO_64_REGPAIR(pstats.sent_bcast_bytes);
2310 	p_stats->sent_ucast_pkts += HILO_64_REGPAIR(pstats.sent_ucast_pkts);
2311 	p_stats->sent_mcast_pkts += HILO_64_REGPAIR(pstats.sent_mcast_pkts);
2312 	p_stats->sent_bcast_pkts += HILO_64_REGPAIR(pstats.sent_bcast_pkts);
2313 }
2314 
2315 static int __qed_ll2_get_stats(void *cxt, u8 connection_handle,
2316 			       struct qed_ll2_stats *p_stats)
2317 {
2318 	struct qed_hwfn *p_hwfn = cxt;
2319 	struct qed_ll2_info *p_ll2_conn = NULL;
2320 	struct qed_ptt *p_ptt;
2321 
2322 	if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
2323 	    !p_hwfn->p_ll2_info)
2324 		return -EINVAL;
2325 
2326 	p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
2327 
2328 	p_ptt = qed_ptt_acquire(p_hwfn);
2329 	if (!p_ptt) {
2330 		DP_ERR(p_hwfn, "Failed to acquire ptt\n");
2331 		return -EINVAL;
2332 	}
2333 
2334 	if (p_ll2_conn->input.gsi_enable)
2335 		_qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats);
2336 
2337 	_qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2338 
2339 	_qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2340 
2341 	if (p_ll2_conn->tx_stats_en)
2342 		_qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2343 
2344 	qed_ptt_release(p_hwfn, p_ptt);
2345 
2346 	return 0;
2347 }
2348 
2349 int qed_ll2_get_stats(void *cxt,
2350 		      u8 connection_handle, struct qed_ll2_stats *p_stats)
2351 {
2352 	memset(p_stats, 0, sizeof(*p_stats));
2353 	return __qed_ll2_get_stats(cxt, connection_handle, p_stats);
2354 }
2355 
2356 static void qed_ll2b_release_rx_packet(void *cxt,
2357 				       u8 connection_handle,
2358 				       void *cookie,
2359 				       dma_addr_t rx_buf_addr,
2360 				       bool b_last_packet)
2361 {
2362 	struct qed_hwfn *p_hwfn = cxt;
2363 
2364 	qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
2365 }
2366 
2367 static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2368 				    const struct qed_ll2_cb_ops *ops,
2369 				    void *cookie)
2370 {
2371 	cdev->ll2->cbs = ops;
2372 	cdev->ll2->cb_cookie = cookie;
2373 }
2374 
2375 static struct qed_ll2_cbs ll2_cbs = {
2376 	.rx_comp_cb = &qed_ll2b_complete_rx_packet,
2377 	.rx_release_cb = &qed_ll2b_release_rx_packet,
2378 	.tx_comp_cb = &qed_ll2b_complete_tx_packet,
2379 	.tx_release_cb = &qed_ll2b_complete_tx_packet,
2380 };
2381 
2382 static void qed_ll2_set_conn_data(struct qed_hwfn *p_hwfn,
2383 				  struct qed_ll2_acquire_data *data,
2384 				  struct qed_ll2_params *params,
2385 				  enum qed_ll2_conn_type conn_type,
2386 				  u8 *handle, bool lb)
2387 {
2388 	memset(data, 0, sizeof(*data));
2389 
2390 	data->input.conn_type = conn_type;
2391 	data->input.mtu = params->mtu;
2392 	data->input.rx_num_desc = QED_LL2_RX_SIZE;
2393 	data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2394 	data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2395 	data->input.tx_num_desc = QED_LL2_TX_SIZE;
2396 	data->p_connection_handle = handle;
2397 	data->cbs = &ll2_cbs;
2398 	ll2_cbs.cookie = p_hwfn;
2399 
2400 	if (lb) {
2401 		data->input.tx_tc = PKT_LB_TC;
2402 		data->input.tx_dest = QED_LL2_TX_DEST_LB;
2403 	} else {
2404 		data->input.tx_tc = 0;
2405 		data->input.tx_dest = QED_LL2_TX_DEST_NW;
2406 	}
2407 }
2408 
2409 static int qed_ll2_start_ooo(struct qed_hwfn *p_hwfn,
2410 			     struct qed_ll2_params *params)
2411 {
2412 	u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2413 	struct qed_ll2_acquire_data data;
2414 	int rc;
2415 
2416 	qed_ll2_set_conn_data(p_hwfn, &data, params,
2417 			      QED_LL2_TYPE_OOO, handle, true);
2418 
2419 	rc = qed_ll2_acquire_connection(p_hwfn, &data);
2420 	if (rc) {
2421 		DP_INFO(p_hwfn, "Failed to acquire LL2 OOO connection\n");
2422 		goto out;
2423 	}
2424 
2425 	rc = qed_ll2_establish_connection(p_hwfn, *handle);
2426 	if (rc) {
2427 		DP_INFO(p_hwfn, "Failed to establish LL2 OOO connection\n");
2428 		goto fail;
2429 	}
2430 
2431 	return 0;
2432 
2433 fail:
2434 	qed_ll2_release_connection(p_hwfn, *handle);
2435 out:
2436 	*handle = QED_LL2_UNUSED_HANDLE;
2437 	return rc;
2438 }
2439 
2440 static bool qed_ll2_is_storage_eng1(struct qed_dev *cdev)
2441 {
2442 	return (QED_IS_FCOE_PERSONALITY(QED_LEADING_HWFN(cdev)) ||
2443 		QED_IS_ISCSI_PERSONALITY(QED_LEADING_HWFN(cdev)) ||
2444 		QED_IS_NVMETCP_PERSONALITY(QED_LEADING_HWFN(cdev))) &&
2445 		(QED_AFFIN_HWFN(cdev) != QED_LEADING_HWFN(cdev));
2446 }
2447 
2448 static int __qed_ll2_stop(struct qed_hwfn *p_hwfn)
2449 {
2450 	struct qed_dev *cdev = p_hwfn->cdev;
2451 	int rc;
2452 
2453 	rc = qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2454 	if (rc)
2455 		DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2456 
2457 	qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2458 
2459 	return rc;
2460 }
2461 
2462 static int qed_ll2_stop(struct qed_dev *cdev)
2463 {
2464 	bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2465 	struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2466 	int rc = 0, rc2 = 0;
2467 
2468 	if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2469 		return 0;
2470 	if (!QED_IS_NVMETCP_PERSONALITY(p_hwfn))
2471 		qed_llh_remove_mac_filter(cdev, 0, cdev->ll2_mac_address);
2472 
2473 	qed_llh_remove_mac_filter(cdev, 0, cdev->ll2_mac_address);
2474 	eth_zero_addr(cdev->ll2_mac_address);
2475 
2476 	if (QED_IS_ISCSI_PERSONALITY(p_hwfn) || QED_IS_NVMETCP_PERSONALITY(p_hwfn))
2477 		qed_ll2_stop_ooo(p_hwfn);
2478 
2479 	/* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2480 	if (b_is_storage_eng1) {
2481 		rc2 = __qed_ll2_stop(QED_LEADING_HWFN(cdev));
2482 		if (rc2)
2483 			DP_NOTICE(QED_LEADING_HWFN(cdev),
2484 				  "Failed to stop LL2 on engine 0\n");
2485 	}
2486 
2487 	rc = __qed_ll2_stop(p_hwfn);
2488 	if (rc)
2489 		DP_NOTICE(p_hwfn, "Failed to stop LL2\n");
2490 
2491 	qed_ll2_kill_buffers(cdev);
2492 
2493 	cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2494 
2495 	return rc | rc2;
2496 }
2497 
2498 static int __qed_ll2_start(struct qed_hwfn *p_hwfn,
2499 			   struct qed_ll2_params *params)
2500 {
2501 	struct qed_ll2_buffer *buffer, *tmp_buffer;
2502 	struct qed_dev *cdev = p_hwfn->cdev;
2503 	enum qed_ll2_conn_type conn_type;
2504 	struct qed_ll2_acquire_data data;
2505 	int rc, rx_cnt;
2506 
2507 	switch (p_hwfn->hw_info.personality) {
2508 	case QED_PCI_FCOE:
2509 		conn_type = QED_LL2_TYPE_FCOE;
2510 		break;
2511 	case QED_PCI_ISCSI:
2512 	case QED_PCI_NVMETCP:
2513 		conn_type = QED_LL2_TYPE_TCP_ULP;
2514 		break;
2515 	case QED_PCI_ETH_ROCE:
2516 		conn_type = QED_LL2_TYPE_ROCE;
2517 		break;
2518 	default:
2519 
2520 		conn_type = QED_LL2_TYPE_TEST;
2521 	}
2522 
2523 	qed_ll2_set_conn_data(p_hwfn, &data, params, conn_type,
2524 			      &cdev->ll2->handle, false);
2525 
2526 	rc = qed_ll2_acquire_connection(p_hwfn, &data);
2527 	if (rc) {
2528 		DP_INFO(p_hwfn, "Failed to acquire LL2 connection\n");
2529 		return rc;
2530 	}
2531 
2532 	rc = qed_ll2_establish_connection(p_hwfn, cdev->ll2->handle);
2533 	if (rc) {
2534 		DP_INFO(p_hwfn, "Failed to establish LL2 connection\n");
2535 		goto release_conn;
2536 	}
2537 
2538 	/* Post all Rx buffers to FW */
2539 	spin_lock_bh(&cdev->ll2->lock);
2540 	rx_cnt = cdev->ll2->rx_cnt;
2541 	list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
2542 		rc = qed_ll2_post_rx_buffer(p_hwfn,
2543 					    cdev->ll2->handle,
2544 					    buffer->phys_addr, 0, buffer, 1);
2545 		if (rc) {
2546 			DP_INFO(p_hwfn,
2547 				"Failed to post an Rx buffer; Deleting it\n");
2548 			dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2549 					 cdev->ll2->rx_size, DMA_FROM_DEVICE);
2550 			kfree(buffer->data);
2551 			list_del(&buffer->list);
2552 			kfree(buffer);
2553 		} else {
2554 			rx_cnt++;
2555 		}
2556 	}
2557 	spin_unlock_bh(&cdev->ll2->lock);
2558 
2559 	if (rx_cnt == cdev->ll2->rx_cnt) {
2560 		DP_NOTICE(p_hwfn, "Failed passing even a single Rx buffer\n");
2561 		goto terminate_conn;
2562 	}
2563 	cdev->ll2->rx_cnt = rx_cnt;
2564 
2565 	return 0;
2566 
2567 terminate_conn:
2568 	qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2569 release_conn:
2570 	qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2571 	return rc;
2572 }
2573 
2574 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2575 {
2576 	bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2577 	struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2578 	struct qed_ll2_buffer *buffer;
2579 	int rx_num_desc, i, rc;
2580 
2581 	if (!is_valid_ether_addr(params->ll2_mac_address)) {
2582 		DP_NOTICE(cdev, "Invalid Ethernet address\n");
2583 		return -EINVAL;
2584 	}
2585 
2586 	WARN_ON(!cdev->ll2->cbs);
2587 
2588 	/* Initialize LL2 locks & lists */
2589 	INIT_LIST_HEAD(&cdev->ll2->list);
2590 	spin_lock_init(&cdev->ll2->lock);
2591 
2592 	cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN +
2593 			     L1_CACHE_BYTES + params->mtu;
2594 
2595 	/* Allocate memory for LL2.
2596 	 * In CMT mode, in case of a storage PF which is affintized to engine 1,
2597 	 * LL2 is started also on engine 0 and thus we need twofold buffers.
2598 	 */
2599 	rx_num_desc = QED_LL2_RX_SIZE * (b_is_storage_eng1 ? 2 : 1);
2600 	DP_INFO(cdev, "Allocating %d LL2 buffers of size %08x bytes\n",
2601 		rx_num_desc, cdev->ll2->rx_size);
2602 	for (i = 0; i < rx_num_desc; i++) {
2603 		buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2604 		if (!buffer) {
2605 			DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2606 			rc = -ENOMEM;
2607 			goto err0;
2608 		}
2609 
2610 		rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2611 					  &buffer->phys_addr);
2612 		if (rc) {
2613 			kfree(buffer);
2614 			goto err0;
2615 		}
2616 
2617 		list_add_tail(&buffer->list, &cdev->ll2->list);
2618 	}
2619 
2620 	rc = __qed_ll2_start(p_hwfn, params);
2621 	if (rc) {
2622 		DP_NOTICE(cdev, "Failed to start LL2\n");
2623 		goto err0;
2624 	}
2625 
2626 	/* In CMT mode, always need to start LL2 on engine 0 for a storage PF,
2627 	 * since broadcast/mutlicast packets are routed to engine 0.
2628 	 */
2629 	if (b_is_storage_eng1) {
2630 		rc = __qed_ll2_start(QED_LEADING_HWFN(cdev), params);
2631 		if (rc) {
2632 			DP_NOTICE(QED_LEADING_HWFN(cdev),
2633 				  "Failed to start LL2 on engine 0\n");
2634 			goto err1;
2635 		}
2636 	}
2637 
2638 	if (QED_IS_ISCSI_PERSONALITY(p_hwfn) || QED_IS_NVMETCP_PERSONALITY(p_hwfn)) {
2639 		DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2640 		rc = qed_ll2_start_ooo(p_hwfn, params);
2641 		if (rc) {
2642 			DP_NOTICE(cdev, "Failed to start OOO LL2\n");
2643 			goto err2;
2644 		}
2645 	}
2646 
2647 	if (!QED_IS_NVMETCP_PERSONALITY(p_hwfn)) {
2648 		rc = qed_llh_add_mac_filter(cdev, 0, params->ll2_mac_address);
2649 		if (rc) {
2650 			DP_NOTICE(cdev, "Failed to add an LLH filter\n");
2651 			goto err3;
2652 		}
2653 	}
2654 
2655 	ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
2656 
2657 	return 0;
2658 
2659 err3:
2660 	if (QED_IS_ISCSI_PERSONALITY(p_hwfn) || QED_IS_NVMETCP_PERSONALITY(p_hwfn))
2661 		qed_ll2_stop_ooo(p_hwfn);
2662 err2:
2663 	if (b_is_storage_eng1)
2664 		__qed_ll2_stop(QED_LEADING_HWFN(cdev));
2665 err1:
2666 	__qed_ll2_stop(p_hwfn);
2667 err0:
2668 	qed_ll2_kill_buffers(cdev);
2669 	cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2670 	return rc;
2671 }
2672 
2673 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb,
2674 			      unsigned long xmit_flags)
2675 {
2676 	struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2677 	struct qed_ll2_tx_pkt_info pkt;
2678 	const skb_frag_t *frag;
2679 	u8 flags = 0, nr_frags;
2680 	int rc = -EINVAL, i;
2681 	dma_addr_t mapping;
2682 	u16 vlan = 0;
2683 
2684 	if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2685 		DP_INFO(cdev, "Cannot transmit a checksummed packet\n");
2686 		return -EINVAL;
2687 	}
2688 
2689 	/* Cache number of fragments from SKB since SKB may be freed by
2690 	 * the completion routine after calling qed_ll2_prepare_tx_packet()
2691 	 */
2692 	nr_frags = skb_shinfo(skb)->nr_frags;
2693 
2694 	if (unlikely(1 + nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET)) {
2695 		DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2696 		       1 + nr_frags);
2697 		return -EINVAL;
2698 	}
2699 
2700 	mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2701 				 skb->len, DMA_TO_DEVICE);
2702 	if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2703 		DP_NOTICE(cdev, "SKB mapping failed\n");
2704 		return -EINVAL;
2705 	}
2706 
2707 	/* Request HW to calculate IP csum */
2708 	if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2709 	      ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2710 		flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
2711 
2712 	if (skb_vlan_tag_present(skb)) {
2713 		vlan = skb_vlan_tag_get(skb);
2714 		flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
2715 	}
2716 
2717 	memset(&pkt, 0, sizeof(pkt));
2718 	pkt.num_of_bds = 1 + nr_frags;
2719 	pkt.vlan = vlan;
2720 	pkt.bd_flags = flags;
2721 	pkt.tx_dest = QED_LL2_TX_DEST_NW;
2722 	pkt.first_frag = mapping;
2723 	pkt.first_frag_len = skb->len;
2724 	pkt.cookie = skb;
2725 	if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) &&
2726 	    test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags))
2727 		pkt.remove_stag = true;
2728 
2729 	/* qed_ll2_prepare_tx_packet() may actually send the packet if
2730 	 * there are no fragments in the skb and subsequently the completion
2731 	 * routine may run and free the SKB, so no dereferencing the SKB
2732 	 * beyond this point unless skb has any fragments.
2733 	 */
2734 	rc = qed_ll2_prepare_tx_packet(p_hwfn, cdev->ll2->handle,
2735 				       &pkt, 1);
2736 	if (unlikely(rc))
2737 		goto err;
2738 
2739 	for (i = 0; i < nr_frags; i++) {
2740 		frag = &skb_shinfo(skb)->frags[i];
2741 
2742 		mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2743 					   skb_frag_size(frag), DMA_TO_DEVICE);
2744 
2745 		if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2746 			DP_NOTICE(cdev,
2747 				  "Unable to map frag - dropping packet\n");
2748 			rc = -ENOMEM;
2749 			goto err;
2750 		}
2751 
2752 		rc = qed_ll2_set_fragment_of_tx_packet(p_hwfn,
2753 						       cdev->ll2->handle,
2754 						       mapping,
2755 						       skb_frag_size(frag));
2756 
2757 		/* if failed not much to do here, partial packet has been posted
2758 		 * we can't free memory, will need to wait for completion
2759 		 */
2760 		if (unlikely(rc))
2761 			goto err2;
2762 	}
2763 
2764 	return 0;
2765 
2766 err:
2767 	dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2768 err2:
2769 	return rc;
2770 }
2771 
2772 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2773 {
2774 	bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2775 	struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2776 	int rc;
2777 
2778 	if (!cdev->ll2)
2779 		return -EINVAL;
2780 
2781 	rc = qed_ll2_get_stats(p_hwfn, cdev->ll2->handle, stats);
2782 	if (rc) {
2783 		DP_NOTICE(p_hwfn, "Failed to get LL2 stats\n");
2784 		return rc;
2785 	}
2786 
2787 	/* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2788 	if (b_is_storage_eng1) {
2789 		rc = __qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2790 					 cdev->ll2->handle, stats);
2791 		if (rc) {
2792 			DP_NOTICE(QED_LEADING_HWFN(cdev),
2793 				  "Failed to get LL2 stats on engine 0\n");
2794 			return rc;
2795 		}
2796 	}
2797 
2798 	return 0;
2799 }
2800 
2801 const struct qed_ll2_ops qed_ll2_ops_pass = {
2802 	.start = &qed_ll2_start,
2803 	.stop = &qed_ll2_stop,
2804 	.start_xmit = &qed_ll2_start_xmit,
2805 	.register_cb_ops = &qed_ll2_register_cb_ops,
2806 	.get_stats = &qed_ll2_stats,
2807 };
2808 
2809 int qed_ll2_alloc_if(struct qed_dev *cdev)
2810 {
2811 	cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2812 	return cdev->ll2 ? 0 : -ENOMEM;
2813 }
2814 
2815 void qed_ll2_dealloc_if(struct qed_dev *cdev)
2816 {
2817 	kfree(cdev->ll2);
2818 	cdev->ll2 = NULL;
2819 }
2820