xref: /openbmc/linux/drivers/net/ethernet/qlogic/qed/qed_ll2.c (revision 9977a8c3497a8f7f7f951994f298a8e4d961234f)
1 /* QLogic qed NIC Driver
2  * Copyright (c) 2015-2017  QLogic Corporation
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and /or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 
33 #include <linux/types.h>
34 #include <asm/byteorder.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/if_vlan.h>
37 #include <linux/kernel.h>
38 #include <linux/pci.h>
39 #include <linux/slab.h>
40 #include <linux/stddef.h>
41 #include <linux/workqueue.h>
42 #include <net/ipv6.h>
43 #include <linux/bitops.h>
44 #include <linux/delay.h>
45 #include <linux/errno.h>
46 #include <linux/etherdevice.h>
47 #include <linux/io.h>
48 #include <linux/list.h>
49 #include <linux/mutex.h>
50 #include <linux/spinlock.h>
51 #include <linux/string.h>
52 #include <linux/qed/qed_ll2_if.h>
53 #include "qed.h"
54 #include "qed_cxt.h"
55 #include "qed_dev_api.h"
56 #include "qed_hsi.h"
57 #include "qed_hw.h"
58 #include "qed_int.h"
59 #include "qed_ll2.h"
60 #include "qed_mcp.h"
61 #include "qed_ooo.h"
62 #include "qed_reg_addr.h"
63 #include "qed_sp.h"
64 #include "qed_rdma.h"
65 
66 #define QED_LL2_RX_REGISTERED(ll2)	((ll2)->rx_queue.b_cb_registred)
67 #define QED_LL2_TX_REGISTERED(ll2)	((ll2)->tx_queue.b_cb_registred)
68 
69 #define QED_LL2_TX_SIZE (256)
70 #define QED_LL2_RX_SIZE (4096)
71 
72 struct qed_cb_ll2_info {
73 	int rx_cnt;
74 	u32 rx_size;
75 	u8 handle;
76 
77 	/* Lock protecting LL2 buffer lists in sleepless context */
78 	spinlock_t lock;
79 	struct list_head list;
80 
81 	const struct qed_ll2_cb_ops *cbs;
82 	void *cb_cookie;
83 };
84 
85 struct qed_ll2_buffer {
86 	struct list_head list;
87 	void *data;
88 	dma_addr_t phys_addr;
89 };
90 
91 static void qed_ll2b_complete_tx_packet(void *cxt,
92 					u8 connection_handle,
93 					void *cookie,
94 					dma_addr_t first_frag_addr,
95 					bool b_last_fragment,
96 					bool b_last_packet)
97 {
98 	struct qed_hwfn *p_hwfn = cxt;
99 	struct qed_dev *cdev = p_hwfn->cdev;
100 	struct sk_buff *skb = cookie;
101 
102 	/* All we need to do is release the mapping */
103 	dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
104 			 skb_headlen(skb), DMA_TO_DEVICE);
105 
106 	if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
107 		cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
108 				      b_last_fragment);
109 
110 	dev_kfree_skb_any(skb);
111 }
112 
113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
114 				u8 **data, dma_addr_t *phys_addr)
115 {
116 	*data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC);
117 	if (!(*data)) {
118 		DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
119 		return -ENOMEM;
120 	}
121 
122 	*phys_addr = dma_map_single(&cdev->pdev->dev,
123 				    ((*data) + NET_SKB_PAD),
124 				    cdev->ll2->rx_size, DMA_FROM_DEVICE);
125 	if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
126 		DP_INFO(cdev, "Failed to map LL2 buffer data\n");
127 		kfree((*data));
128 		return -ENOMEM;
129 	}
130 
131 	return 0;
132 }
133 
134 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
135 				 struct qed_ll2_buffer *buffer)
136 {
137 	spin_lock_bh(&cdev->ll2->lock);
138 
139 	dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
140 			 cdev->ll2->rx_size, DMA_FROM_DEVICE);
141 	kfree(buffer->data);
142 	list_del(&buffer->list);
143 
144 	cdev->ll2->rx_cnt--;
145 	if (!cdev->ll2->rx_cnt)
146 		DP_INFO(cdev, "All LL2 entries were removed\n");
147 
148 	spin_unlock_bh(&cdev->ll2->lock);
149 
150 	return 0;
151 }
152 
153 static void qed_ll2_kill_buffers(struct qed_dev *cdev)
154 {
155 	struct qed_ll2_buffer *buffer, *tmp_buffer;
156 
157 	list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
158 		qed_ll2_dealloc_buffer(cdev, buffer);
159 }
160 
161 void qed_ll2b_complete_rx_packet(void *cxt, struct qed_ll2_comp_rx_data *data)
162 {
163 	struct qed_hwfn *p_hwfn = cxt;
164 	struct qed_ll2_buffer *buffer = data->cookie;
165 	struct qed_dev *cdev = p_hwfn->cdev;
166 	dma_addr_t new_phys_addr;
167 	struct sk_buff *skb;
168 	bool reuse = false;
169 	int rc = -EINVAL;
170 	u8 *new_data;
171 
172 	DP_VERBOSE(p_hwfn,
173 		   (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
174 		   "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
175 		   (u64)data->rx_buf_addr,
176 		   data->u.placement_offset,
177 		   data->length.packet_length,
178 		   data->parse_flags,
179 		   data->vlan, data->opaque_data_0, data->opaque_data_1);
180 
181 	if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
182 		print_hex_dump(KERN_INFO, "",
183 			       DUMP_PREFIX_OFFSET, 16, 1,
184 			       buffer->data, data->length.packet_length, false);
185 	}
186 
187 	/* Determine if data is valid */
188 	if (data->length.packet_length < ETH_HLEN)
189 		reuse = true;
190 
191 	/* Allocate a replacement for buffer; Reuse upon failure */
192 	if (!reuse)
193 		rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
194 					  &new_phys_addr);
195 
196 	/* If need to reuse or there's no replacement buffer, repost this */
197 	if (rc)
198 		goto out_post;
199 	dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
200 			 cdev->ll2->rx_size, DMA_FROM_DEVICE);
201 
202 	skb = build_skb(buffer->data, 0);
203 	if (!skb) {
204 		rc = -ENOMEM;
205 		goto out_post;
206 	}
207 
208 	data->u.placement_offset += NET_SKB_PAD;
209 	skb_reserve(skb, data->u.placement_offset);
210 	skb_put(skb, data->length.packet_length);
211 	skb_checksum_none_assert(skb);
212 
213 	/* Get parital ethernet information instead of eth_type_trans(),
214 	 * Since we don't have an associated net_device.
215 	 */
216 	skb_reset_mac_header(skb);
217 	skb->protocol = eth_hdr(skb)->h_proto;
218 
219 	/* Pass SKB onward */
220 	if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
221 		if (data->vlan)
222 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
223 					       data->vlan);
224 		cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
225 				      data->opaque_data_0,
226 				      data->opaque_data_1);
227 	}
228 
229 	/* Update Buffer information and update FW producer */
230 	buffer->data = new_data;
231 	buffer->phys_addr = new_phys_addr;
232 
233 out_post:
234 	rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle,
235 				    buffer->phys_addr, 0,  buffer, 1);
236 
237 	if (rc)
238 		qed_ll2_dealloc_buffer(cdev, buffer);
239 }
240 
241 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
242 						    u8 connection_handle,
243 						    bool b_lock,
244 						    bool b_only_active)
245 {
246 	struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
247 
248 	if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
249 		return NULL;
250 
251 	if (!p_hwfn->p_ll2_info)
252 		return NULL;
253 
254 	p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
255 
256 	if (b_only_active) {
257 		if (b_lock)
258 			mutex_lock(&p_ll2_conn->mutex);
259 		if (p_ll2_conn->b_active)
260 			p_ret = p_ll2_conn;
261 		if (b_lock)
262 			mutex_unlock(&p_ll2_conn->mutex);
263 	} else {
264 		p_ret = p_ll2_conn;
265 	}
266 
267 	return p_ret;
268 }
269 
270 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
271 						  u8 connection_handle)
272 {
273 	return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
274 }
275 
276 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
277 						       u8 connection_handle)
278 {
279 	return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
280 }
281 
282 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
283 							   *p_hwfn,
284 							   u8 connection_handle)
285 {
286 	return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
287 }
288 
289 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
290 {
291 	bool b_last_packet = false, b_last_frag = false;
292 	struct qed_ll2_tx_packet *p_pkt = NULL;
293 	struct qed_ll2_info *p_ll2_conn;
294 	struct qed_ll2_tx_queue *p_tx;
295 	dma_addr_t tx_frag;
296 
297 	p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
298 	if (!p_ll2_conn)
299 		return;
300 
301 	p_tx = &p_ll2_conn->tx_queue;
302 
303 	while (!list_empty(&p_tx->active_descq)) {
304 		p_pkt = list_first_entry(&p_tx->active_descq,
305 					 struct qed_ll2_tx_packet, list_entry);
306 		if (!p_pkt)
307 			break;
308 
309 		list_del(&p_pkt->list_entry);
310 		b_last_packet = list_empty(&p_tx->active_descq);
311 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
312 		if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
313 			struct qed_ooo_buffer *p_buffer;
314 
315 			p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
316 			qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
317 						p_buffer);
318 		} else {
319 			p_tx->cur_completing_packet = *p_pkt;
320 			p_tx->cur_completing_bd_idx = 1;
321 			b_last_frag =
322 				p_tx->cur_completing_bd_idx == p_pkt->bd_used;
323 			tx_frag = p_pkt->bds_set[0].tx_frag;
324 			p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
325 						      p_ll2_conn->my_id,
326 						      p_pkt->cookie,
327 						      tx_frag,
328 						      b_last_frag,
329 						      b_last_packet);
330 		}
331 	}
332 }
333 
334 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
335 {
336 	struct qed_ll2_info *p_ll2_conn = p_cookie;
337 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
338 	u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
339 	struct qed_ll2_tx_packet *p_pkt;
340 	bool b_last_frag = false;
341 	unsigned long flags;
342 	int rc = -EINVAL;
343 
344 	spin_lock_irqsave(&p_tx->lock, flags);
345 	if (p_tx->b_completing_packet) {
346 		rc = -EBUSY;
347 		goto out;
348 	}
349 
350 	new_idx = le16_to_cpu(*p_tx->p_fw_cons);
351 	num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
352 	while (num_bds) {
353 		if (list_empty(&p_tx->active_descq))
354 			goto out;
355 
356 		p_pkt = list_first_entry(&p_tx->active_descq,
357 					 struct qed_ll2_tx_packet, list_entry);
358 		if (!p_pkt)
359 			goto out;
360 
361 		p_tx->b_completing_packet = true;
362 		p_tx->cur_completing_packet = *p_pkt;
363 		num_bds_in_packet = p_pkt->bd_used;
364 		list_del(&p_pkt->list_entry);
365 
366 		if (num_bds < num_bds_in_packet) {
367 			DP_NOTICE(p_hwfn,
368 				  "Rest of BDs does not cover whole packet\n");
369 			goto out;
370 		}
371 
372 		num_bds -= num_bds_in_packet;
373 		p_tx->bds_idx += num_bds_in_packet;
374 		while (num_bds_in_packet--)
375 			qed_chain_consume(&p_tx->txq_chain);
376 
377 		p_tx->cur_completing_bd_idx = 1;
378 		b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
379 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
380 
381 		spin_unlock_irqrestore(&p_tx->lock, flags);
382 
383 		p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
384 					   p_ll2_conn->my_id,
385 					   p_pkt->cookie,
386 					   p_pkt->bds_set[0].tx_frag,
387 					   b_last_frag, !num_bds);
388 
389 		spin_lock_irqsave(&p_tx->lock, flags);
390 	}
391 
392 	p_tx->b_completing_packet = false;
393 	rc = 0;
394 out:
395 	spin_unlock_irqrestore(&p_tx->lock, flags);
396 	return rc;
397 }
398 
399 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
400 				  union core_rx_cqe_union *p_cqe,
401 				  struct qed_ll2_comp_rx_data *data)
402 {
403 	data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
404 	data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
405 	data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
406 	data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
407 	data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
408 	data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
409 	data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id);
410 
411 	data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp);
412 }
413 
414 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
415 				  union core_rx_cqe_union *p_cqe,
416 				  struct qed_ll2_comp_rx_data *data)
417 {
418 	data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
419 	data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags);
420 	data->length.packet_length =
421 	    le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
422 	data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
423 	data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
424 	data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
425 	data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
426 }
427 
428 static int
429 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn,
430 			struct qed_ll2_info *p_ll2_conn,
431 			union core_rx_cqe_union *p_cqe,
432 			unsigned long *p_lock_flags)
433 {
434 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
435 	struct core_rx_slow_path_cqe *sp_cqe;
436 
437 	sp_cqe = &p_cqe->rx_cqe_sp;
438 	if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) {
439 		DP_NOTICE(p_hwfn,
440 			  "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n",
441 			  sp_cqe->ramrod_cmd_id);
442 		return -EINVAL;
443 	}
444 
445 	if (!p_ll2_conn->cbs.slowpath_cb) {
446 		DP_NOTICE(p_hwfn,
447 			  "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n");
448 		return -EINVAL;
449 	}
450 
451 	spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
452 
453 	p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie,
454 				    p_ll2_conn->my_id,
455 				    le32_to_cpu(sp_cqe->opaque_data.data[0]),
456 				    le32_to_cpu(sp_cqe->opaque_data.data[1]));
457 
458 	spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
459 
460 	return 0;
461 }
462 
463 static int
464 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
465 			      struct qed_ll2_info *p_ll2_conn,
466 			      union core_rx_cqe_union *p_cqe,
467 			      unsigned long *p_lock_flags, bool b_last_cqe)
468 {
469 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
470 	struct qed_ll2_rx_packet *p_pkt = NULL;
471 	struct qed_ll2_comp_rx_data data;
472 
473 	if (!list_empty(&p_rx->active_descq))
474 		p_pkt = list_first_entry(&p_rx->active_descq,
475 					 struct qed_ll2_rx_packet, list_entry);
476 	if (!p_pkt) {
477 		DP_NOTICE(p_hwfn,
478 			  "[%d] LL2 Rx completion but active_descq is empty\n",
479 			  p_ll2_conn->input.conn_type);
480 
481 		return -EIO;
482 	}
483 	list_del(&p_pkt->list_entry);
484 
485 	if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
486 		qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
487 	else
488 		qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
489 	if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
490 		DP_NOTICE(p_hwfn,
491 			  "Mismatch between active_descq and the LL2 Rx chain\n");
492 
493 	list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
494 
495 	data.connection_handle = p_ll2_conn->my_id;
496 	data.cookie = p_pkt->cookie;
497 	data.rx_buf_addr = p_pkt->rx_buf_addr;
498 	data.b_last_packet = b_last_cqe;
499 
500 	spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
501 	p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
502 
503 	spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
504 
505 	return 0;
506 }
507 
508 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
509 {
510 	struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
511 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
512 	union core_rx_cqe_union *cqe = NULL;
513 	u16 cq_new_idx = 0, cq_old_idx = 0;
514 	unsigned long flags = 0;
515 	int rc = 0;
516 
517 	spin_lock_irqsave(&p_rx->lock, flags);
518 	cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
519 	cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
520 
521 	while (cq_new_idx != cq_old_idx) {
522 		bool b_last_cqe = (cq_new_idx == cq_old_idx);
523 
524 		cqe =
525 		    (union core_rx_cqe_union *)
526 		    qed_chain_consume(&p_rx->rcq_chain);
527 		cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
528 
529 		DP_VERBOSE(p_hwfn,
530 			   QED_MSG_LL2,
531 			   "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
532 			   cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
533 
534 		switch (cqe->rx_cqe_sp.type) {
535 		case CORE_RX_CQE_TYPE_SLOW_PATH:
536 			rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn,
537 						     cqe, &flags);
538 			break;
539 		case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
540 		case CORE_RX_CQE_TYPE_REGULAR:
541 			rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
542 							   cqe, &flags,
543 							   b_last_cqe);
544 			break;
545 		default:
546 			rc = -EIO;
547 		}
548 	}
549 
550 	spin_unlock_irqrestore(&p_rx->lock, flags);
551 	return rc;
552 }
553 
554 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
555 {
556 	struct qed_ll2_info *p_ll2_conn = NULL;
557 	struct qed_ll2_rx_packet *p_pkt = NULL;
558 	struct qed_ll2_rx_queue *p_rx;
559 
560 	p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
561 	if (!p_ll2_conn)
562 		return;
563 
564 	p_rx = &p_ll2_conn->rx_queue;
565 
566 	while (!list_empty(&p_rx->active_descq)) {
567 		p_pkt = list_first_entry(&p_rx->active_descq,
568 					 struct qed_ll2_rx_packet, list_entry);
569 		if (!p_pkt)
570 			break;
571 
572 		list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
573 
574 		if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
575 			struct qed_ooo_buffer *p_buffer;
576 
577 			p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
578 			qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
579 						p_buffer);
580 		} else {
581 			dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr;
582 			void *cookie = p_pkt->cookie;
583 			bool b_last;
584 
585 			b_last = list_empty(&p_rx->active_descq);
586 			p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie,
587 						      p_ll2_conn->my_id,
588 						      cookie,
589 						      rx_buf_addr, b_last);
590 		}
591 	}
592 }
593 
594 static u8 qed_ll2_convert_rx_parse_to_tx_flags(u16 parse_flags)
595 {
596 	u8 bd_flags = 0;
597 
598 	if (GET_FIELD(parse_flags, PARSING_AND_ERR_FLAGS_TAG8021QEXIST))
599 		SET_FIELD(bd_flags, CORE_TX_BD_DATA_VLAN_INSERTION, 1);
600 
601 	return bd_flags;
602 }
603 
604 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
605 				  struct qed_ll2_info *p_ll2_conn)
606 {
607 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
608 	u16 packet_length = 0, parse_flags = 0, vlan = 0;
609 	struct qed_ll2_rx_packet *p_pkt = NULL;
610 	u32 num_ooo_add_to_peninsula = 0, cid;
611 	union core_rx_cqe_union *cqe = NULL;
612 	u16 cq_new_idx = 0, cq_old_idx = 0;
613 	struct qed_ooo_buffer *p_buffer;
614 	struct ooo_opaque *iscsi_ooo;
615 	u8 placement_offset = 0;
616 	u8 cqe_type;
617 
618 	cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
619 	cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
620 	if (cq_new_idx == cq_old_idx)
621 		return 0;
622 
623 	while (cq_new_idx != cq_old_idx) {
624 		struct core_rx_fast_path_cqe *p_cqe_fp;
625 
626 		cqe = qed_chain_consume(&p_rx->rcq_chain);
627 		cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
628 		cqe_type = cqe->rx_cqe_sp.type;
629 
630 		if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) {
631 			DP_NOTICE(p_hwfn,
632 				  "Got a non-regular LB LL2 completion [type 0x%02x]\n",
633 				  cqe_type);
634 			return -EINVAL;
635 		}
636 		p_cqe_fp = &cqe->rx_cqe_fp;
637 
638 		placement_offset = p_cqe_fp->placement_offset;
639 		parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
640 		packet_length = le16_to_cpu(p_cqe_fp->packet_length);
641 		vlan = le16_to_cpu(p_cqe_fp->vlan);
642 		iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
643 		qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info,
644 					   iscsi_ooo);
645 		cid = le32_to_cpu(iscsi_ooo->cid);
646 
647 		/* Process delete isle first */
648 		if (iscsi_ooo->drop_size)
649 			qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
650 					     iscsi_ooo->drop_isle,
651 					     iscsi_ooo->drop_size);
652 
653 		if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP)
654 			continue;
655 
656 		/* Now process create/add/join isles */
657 		if (list_empty(&p_rx->active_descq)) {
658 			DP_NOTICE(p_hwfn,
659 				  "LL2 OOO RX chain has no submitted buffers\n"
660 				  );
661 			return -EIO;
662 		}
663 
664 		p_pkt = list_first_entry(&p_rx->active_descq,
665 					 struct qed_ll2_rx_packet, list_entry);
666 
667 		if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) ||
668 		    (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) ||
669 		    (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) ||
670 		    (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) ||
671 		    (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) {
672 			if (!p_pkt) {
673 				DP_NOTICE(p_hwfn,
674 					  "LL2 OOO RX packet is not valid\n");
675 				return -EIO;
676 			}
677 			list_del(&p_pkt->list_entry);
678 			p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
679 			p_buffer->packet_length = packet_length;
680 			p_buffer->parse_flags = parse_flags;
681 			p_buffer->vlan = vlan;
682 			p_buffer->placement_offset = placement_offset;
683 			qed_chain_consume(&p_rx->rxq_chain);
684 			list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
685 
686 			switch (iscsi_ooo->ooo_opcode) {
687 			case TCP_EVENT_ADD_NEW_ISLE:
688 				qed_ooo_add_new_isle(p_hwfn,
689 						     p_hwfn->p_ooo_info,
690 						     cid,
691 						     iscsi_ooo->ooo_isle,
692 						     p_buffer);
693 				break;
694 			case TCP_EVENT_ADD_ISLE_RIGHT:
695 				qed_ooo_add_new_buffer(p_hwfn,
696 						       p_hwfn->p_ooo_info,
697 						       cid,
698 						       iscsi_ooo->ooo_isle,
699 						       p_buffer,
700 						       QED_OOO_RIGHT_BUF);
701 				break;
702 			case TCP_EVENT_ADD_ISLE_LEFT:
703 				qed_ooo_add_new_buffer(p_hwfn,
704 						       p_hwfn->p_ooo_info,
705 						       cid,
706 						       iscsi_ooo->ooo_isle,
707 						       p_buffer,
708 						       QED_OOO_LEFT_BUF);
709 				break;
710 			case TCP_EVENT_JOIN:
711 				qed_ooo_add_new_buffer(p_hwfn,
712 						       p_hwfn->p_ooo_info,
713 						       cid,
714 						       iscsi_ooo->ooo_isle +
715 						       1,
716 						       p_buffer,
717 						       QED_OOO_LEFT_BUF);
718 				qed_ooo_join_isles(p_hwfn,
719 						   p_hwfn->p_ooo_info,
720 						   cid, iscsi_ooo->ooo_isle);
721 				break;
722 			case TCP_EVENT_ADD_PEN:
723 				num_ooo_add_to_peninsula++;
724 				qed_ooo_put_ready_buffer(p_hwfn,
725 							 p_hwfn->p_ooo_info,
726 							 p_buffer, true);
727 				break;
728 			}
729 		} else {
730 			DP_NOTICE(p_hwfn,
731 				  "Unexpected event (%d) TX OOO completion\n",
732 				  iscsi_ooo->ooo_opcode);
733 		}
734 	}
735 
736 	return 0;
737 }
738 
739 static void
740 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
741 			  struct qed_ll2_info *p_ll2_conn)
742 {
743 	struct qed_ll2_tx_pkt_info tx_pkt;
744 	struct qed_ooo_buffer *p_buffer;
745 	u16 l4_hdr_offset_w;
746 	dma_addr_t first_frag;
747 	u16 parse_flags;
748 	u8 bd_flags;
749 	int rc;
750 
751 	/* Submit Tx buffers here */
752 	while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
753 						    p_hwfn->p_ooo_info))) {
754 		l4_hdr_offset_w = 0;
755 		bd_flags = 0;
756 
757 		first_frag = p_buffer->rx_buffer_phys_addr +
758 			     p_buffer->placement_offset;
759 		parse_flags = p_buffer->parse_flags;
760 		bd_flags = qed_ll2_convert_rx_parse_to_tx_flags(parse_flags);
761 		SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
762 		SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
763 
764 		memset(&tx_pkt, 0, sizeof(tx_pkt));
765 		tx_pkt.num_of_bds = 1;
766 		tx_pkt.vlan = p_buffer->vlan;
767 		tx_pkt.bd_flags = bd_flags;
768 		tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
769 		tx_pkt.tx_dest = p_ll2_conn->tx_dest;
770 		tx_pkt.first_frag = first_frag;
771 		tx_pkt.first_frag_len = p_buffer->packet_length;
772 		tx_pkt.cookie = p_buffer;
773 
774 		rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
775 					       &tx_pkt, true);
776 		if (rc) {
777 			qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
778 						 p_buffer, false);
779 			break;
780 		}
781 	}
782 }
783 
784 static void
785 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
786 			  struct qed_ll2_info *p_ll2_conn)
787 {
788 	struct qed_ooo_buffer *p_buffer;
789 	int rc;
790 
791 	while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
792 						   p_hwfn->p_ooo_info))) {
793 		rc = qed_ll2_post_rx_buffer(p_hwfn,
794 					    p_ll2_conn->my_id,
795 					    p_buffer->rx_buffer_phys_addr,
796 					    0, p_buffer, true);
797 		if (rc) {
798 			qed_ooo_put_free_buffer(p_hwfn,
799 						p_hwfn->p_ooo_info, p_buffer);
800 			break;
801 		}
802 	}
803 }
804 
805 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
806 {
807 	struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
808 	int rc;
809 
810 	rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
811 	if (rc)
812 		return rc;
813 
814 	qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
815 	qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
816 
817 	return 0;
818 }
819 
820 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
821 {
822 	struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
823 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
824 	struct qed_ll2_tx_packet *p_pkt = NULL;
825 	struct qed_ooo_buffer *p_buffer;
826 	bool b_dont_submit_rx = false;
827 	u16 new_idx = 0, num_bds = 0;
828 	int rc;
829 
830 	new_idx = le16_to_cpu(*p_tx->p_fw_cons);
831 	num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
832 
833 	if (!num_bds)
834 		return 0;
835 
836 	while (num_bds) {
837 		if (list_empty(&p_tx->active_descq))
838 			return -EINVAL;
839 
840 		p_pkt = list_first_entry(&p_tx->active_descq,
841 					 struct qed_ll2_tx_packet, list_entry);
842 		if (!p_pkt)
843 			return -EINVAL;
844 
845 		if (p_pkt->bd_used != 1) {
846 			DP_NOTICE(p_hwfn,
847 				  "Unexpectedly many BDs(%d) in TX OOO completion\n",
848 				  p_pkt->bd_used);
849 			return -EINVAL;
850 		}
851 
852 		list_del(&p_pkt->list_entry);
853 
854 		num_bds--;
855 		p_tx->bds_idx++;
856 		qed_chain_consume(&p_tx->txq_chain);
857 
858 		p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
859 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
860 
861 		if (b_dont_submit_rx) {
862 			qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
863 						p_buffer);
864 			continue;
865 		}
866 
867 		rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
868 					    p_buffer->rx_buffer_phys_addr, 0,
869 					    p_buffer, true);
870 		if (rc != 0) {
871 			qed_ooo_put_free_buffer(p_hwfn,
872 						p_hwfn->p_ooo_info, p_buffer);
873 			b_dont_submit_rx = true;
874 		}
875 	}
876 
877 	qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
878 
879 	return 0;
880 }
881 
882 static void qed_ll2_stop_ooo(struct qed_dev *cdev)
883 {
884 	struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
885 	u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
886 
887 	DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n",
888 		   *handle);
889 
890 	qed_ll2_terminate_connection(hwfn, *handle);
891 	qed_ll2_release_connection(hwfn, *handle);
892 	*handle = QED_LL2_UNUSED_HANDLE;
893 }
894 
895 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
896 				     struct qed_ll2_info *p_ll2_conn,
897 				     u8 action_on_error)
898 {
899 	enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
900 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
901 	struct core_rx_start_ramrod_data *p_ramrod = NULL;
902 	struct qed_spq_entry *p_ent = NULL;
903 	struct qed_sp_init_data init_data;
904 	u16 cqe_pbl_size;
905 	int rc = 0;
906 
907 	/* Get SPQ entry */
908 	memset(&init_data, 0, sizeof(init_data));
909 	init_data.cid = p_ll2_conn->cid;
910 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
911 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
912 
913 	rc = qed_sp_init_request(p_hwfn, &p_ent,
914 				 CORE_RAMROD_RX_QUEUE_START,
915 				 PROTOCOLID_CORE, &init_data);
916 	if (rc)
917 		return rc;
918 
919 	p_ramrod = &p_ent->ramrod.core_rx_queue_start;
920 
921 	p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
922 	p_ramrod->sb_index = p_rx->rx_sb_index;
923 	p_ramrod->complete_event_flg = 1;
924 
925 	p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
926 	DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
927 	cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
928 	p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
929 	DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
930 		       qed_chain_get_pbl_phys(&p_rx->rcq_chain));
931 
932 	p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
933 	p_ramrod->inner_vlan_stripping_en =
934 		p_ll2_conn->input.rx_vlan_removal_en;
935 	p_ramrod->queue_id = p_ll2_conn->queue_id;
936 	p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0;
937 
938 	if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) &&
939 	    p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE) &&
940 	    (conn_type != QED_LL2_TYPE_IWARP)) {
941 		p_ramrod->mf_si_bcast_accept_all = 1;
942 		p_ramrod->mf_si_mcast_accept_all = 1;
943 	} else {
944 		p_ramrod->mf_si_bcast_accept_all = 0;
945 		p_ramrod->mf_si_mcast_accept_all = 0;
946 	}
947 
948 	p_ramrod->action_on_error.error_type = action_on_error;
949 	p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
950 	return qed_spq_post(p_hwfn, p_ent, NULL);
951 }
952 
953 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
954 				     struct qed_ll2_info *p_ll2_conn)
955 {
956 	enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
957 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
958 	struct core_tx_start_ramrod_data *p_ramrod = NULL;
959 	struct qed_spq_entry *p_ent = NULL;
960 	struct qed_sp_init_data init_data;
961 	u16 pq_id = 0, pbl_size;
962 	int rc = -EINVAL;
963 
964 	if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
965 		return 0;
966 
967 	if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
968 		p_ll2_conn->tx_stats_en = 0;
969 	else
970 		p_ll2_conn->tx_stats_en = 1;
971 
972 	/* Get SPQ entry */
973 	memset(&init_data, 0, sizeof(init_data));
974 	init_data.cid = p_ll2_conn->cid;
975 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
976 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
977 
978 	rc = qed_sp_init_request(p_hwfn, &p_ent,
979 				 CORE_RAMROD_TX_QUEUE_START,
980 				 PROTOCOLID_CORE, &init_data);
981 	if (rc)
982 		return rc;
983 
984 	p_ramrod = &p_ent->ramrod.core_tx_queue_start;
985 
986 	p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
987 	p_ramrod->sb_index = p_tx->tx_sb_index;
988 	p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
989 	p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
990 	p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
991 
992 	DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
993 		       qed_chain_get_pbl_phys(&p_tx->txq_chain));
994 	pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
995 	p_ramrod->pbl_size = cpu_to_le16(pbl_size);
996 
997 	switch (p_ll2_conn->input.tx_tc) {
998 	case PURE_LB_TC:
999 		pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
1000 		break;
1001 	case PKT_LB_TC:
1002 		pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
1003 		break;
1004 	default:
1005 		pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
1006 		break;
1007 	}
1008 
1009 	p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1010 
1011 	switch (conn_type) {
1012 	case QED_LL2_TYPE_FCOE:
1013 		p_ramrod->conn_type = PROTOCOLID_FCOE;
1014 		break;
1015 	case QED_LL2_TYPE_ISCSI:
1016 		p_ramrod->conn_type = PROTOCOLID_ISCSI;
1017 		break;
1018 	case QED_LL2_TYPE_ROCE:
1019 		p_ramrod->conn_type = PROTOCOLID_ROCE;
1020 		break;
1021 	case QED_LL2_TYPE_IWARP:
1022 		p_ramrod->conn_type = PROTOCOLID_IWARP;
1023 		break;
1024 	case QED_LL2_TYPE_OOO:
1025 		if (p_hwfn->hw_info.personality == QED_PCI_ISCSI)
1026 			p_ramrod->conn_type = PROTOCOLID_ISCSI;
1027 		else
1028 			p_ramrod->conn_type = PROTOCOLID_IWARP;
1029 		break;
1030 	default:
1031 		p_ramrod->conn_type = PROTOCOLID_ETH;
1032 		DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
1033 	}
1034 
1035 	p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1036 
1037 	return qed_spq_post(p_hwfn, p_ent, NULL);
1038 }
1039 
1040 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1041 				    struct qed_ll2_info *p_ll2_conn)
1042 {
1043 	struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1044 	struct qed_spq_entry *p_ent = NULL;
1045 	struct qed_sp_init_data init_data;
1046 	int rc = -EINVAL;
1047 
1048 	/* Get SPQ entry */
1049 	memset(&init_data, 0, sizeof(init_data));
1050 	init_data.cid = p_ll2_conn->cid;
1051 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1052 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1053 
1054 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1055 				 CORE_RAMROD_RX_QUEUE_STOP,
1056 				 PROTOCOLID_CORE, &init_data);
1057 	if (rc)
1058 		return rc;
1059 
1060 	p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1061 
1062 	p_ramrod->complete_event_flg = 1;
1063 	p_ramrod->queue_id = p_ll2_conn->queue_id;
1064 
1065 	return qed_spq_post(p_hwfn, p_ent, NULL);
1066 }
1067 
1068 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1069 				    struct qed_ll2_info *p_ll2_conn)
1070 {
1071 	struct qed_spq_entry *p_ent = NULL;
1072 	struct qed_sp_init_data init_data;
1073 	int rc = -EINVAL;
1074 
1075 	/* Get SPQ entry */
1076 	memset(&init_data, 0, sizeof(init_data));
1077 	init_data.cid = p_ll2_conn->cid;
1078 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1079 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1080 
1081 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1082 				 CORE_RAMROD_TX_QUEUE_STOP,
1083 				 PROTOCOLID_CORE, &init_data);
1084 	if (rc)
1085 		return rc;
1086 
1087 	return qed_spq_post(p_hwfn, p_ent, NULL);
1088 }
1089 
1090 static int
1091 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
1092 			      struct qed_ll2_info *p_ll2_info)
1093 {
1094 	struct qed_ll2_rx_packet *p_descq;
1095 	u32 capacity;
1096 	int rc = 0;
1097 
1098 	if (!p_ll2_info->input.rx_num_desc)
1099 		goto out;
1100 
1101 	rc = qed_chain_alloc(p_hwfn->cdev,
1102 			     QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1103 			     QED_CHAIN_MODE_NEXT_PTR,
1104 			     QED_CHAIN_CNT_TYPE_U16,
1105 			     p_ll2_info->input.rx_num_desc,
1106 			     sizeof(struct core_rx_bd),
1107 			     &p_ll2_info->rx_queue.rxq_chain, NULL);
1108 	if (rc) {
1109 		DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1110 		goto out;
1111 	}
1112 
1113 	capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1114 	p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1115 			  GFP_KERNEL);
1116 	if (!p_descq) {
1117 		rc = -ENOMEM;
1118 		DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1119 		goto out;
1120 	}
1121 	p_ll2_info->rx_queue.descq_array = p_descq;
1122 
1123 	rc = qed_chain_alloc(p_hwfn->cdev,
1124 			     QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1125 			     QED_CHAIN_MODE_PBL,
1126 			     QED_CHAIN_CNT_TYPE_U16,
1127 			     p_ll2_info->input.rx_num_desc,
1128 			     sizeof(struct core_rx_fast_path_cqe),
1129 			     &p_ll2_info->rx_queue.rcq_chain, NULL);
1130 	if (rc) {
1131 		DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1132 		goto out;
1133 	}
1134 
1135 	DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1136 		   "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
1137 		   p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
1138 
1139 out:
1140 	return rc;
1141 }
1142 
1143 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
1144 					 struct qed_ll2_info *p_ll2_info)
1145 {
1146 	struct qed_ll2_tx_packet *p_descq;
1147 	u32 desc_size;
1148 	u32 capacity;
1149 	int rc = 0;
1150 
1151 	if (!p_ll2_info->input.tx_num_desc)
1152 		goto out;
1153 
1154 	rc = qed_chain_alloc(p_hwfn->cdev,
1155 			     QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1156 			     QED_CHAIN_MODE_PBL,
1157 			     QED_CHAIN_CNT_TYPE_U16,
1158 			     p_ll2_info->input.tx_num_desc,
1159 			     sizeof(struct core_tx_bd),
1160 			     &p_ll2_info->tx_queue.txq_chain, NULL);
1161 	if (rc)
1162 		goto out;
1163 
1164 	capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
1165 	/* First element is part of the packet, rest are flexibly added */
1166 	desc_size = (sizeof(*p_descq) +
1167 		     (p_ll2_info->input.tx_max_bds_per_packet - 1) *
1168 		     sizeof(p_descq->bds_set));
1169 
1170 	p_descq = kcalloc(capacity, desc_size, GFP_KERNEL);
1171 	if (!p_descq) {
1172 		rc = -ENOMEM;
1173 		goto out;
1174 	}
1175 	p_ll2_info->tx_queue.descq_mem = p_descq;
1176 
1177 	DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1178 		   "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
1179 		   p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
1180 
1181 out:
1182 	if (rc)
1183 		DP_NOTICE(p_hwfn,
1184 			  "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
1185 			  p_ll2_info->input.tx_num_desc);
1186 	return rc;
1187 }
1188 
1189 static int
1190 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1191 			       struct qed_ll2_info *p_ll2_info, u16 mtu)
1192 {
1193 	struct qed_ooo_buffer *p_buf = NULL;
1194 	void *p_virt;
1195 	u16 buf_idx;
1196 	int rc = 0;
1197 
1198 	if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO)
1199 		return rc;
1200 
1201 	/* Correct number of requested OOO buffers if needed */
1202 	if (!p_ll2_info->input.rx_num_ooo_buffers) {
1203 		u16 num_desc = p_ll2_info->input.rx_num_desc;
1204 
1205 		if (!num_desc)
1206 			return -EINVAL;
1207 		p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1208 	}
1209 
1210 	for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1211 	     buf_idx++) {
1212 		p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
1213 		if (!p_buf) {
1214 			rc = -ENOMEM;
1215 			goto out;
1216 		}
1217 
1218 		p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1219 		p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1220 					 ETH_CACHE_LINE_SIZE - 1) &
1221 					~(ETH_CACHE_LINE_SIZE - 1);
1222 		p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1223 					    p_buf->rx_buffer_size,
1224 					    &p_buf->rx_buffer_phys_addr,
1225 					    GFP_KERNEL);
1226 		if (!p_virt) {
1227 			kfree(p_buf);
1228 			rc = -ENOMEM;
1229 			goto out;
1230 		}
1231 
1232 		p_buf->rx_buffer_virt_addr = p_virt;
1233 		qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1234 	}
1235 
1236 	DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1237 		   "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1238 		   p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1239 
1240 out:
1241 	return rc;
1242 }
1243 
1244 static int
1245 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
1246 {
1247 	if (!cbs || (!cbs->rx_comp_cb ||
1248 		     !cbs->rx_release_cb ||
1249 		     !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
1250 		return -EINVAL;
1251 
1252 	p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
1253 	p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
1254 	p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
1255 	p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
1256 	p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb;
1257 	p_ll2_info->cbs.cookie = cbs->cookie;
1258 
1259 	return 0;
1260 }
1261 
1262 static enum core_error_handle
1263 qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1264 {
1265 	switch (err) {
1266 	case QED_LL2_DROP_PACKET:
1267 		return LL2_DROP_PACKET;
1268 	case QED_LL2_DO_NOTHING:
1269 		return LL2_DO_NOTHING;
1270 	case QED_LL2_ASSERT:
1271 		return LL2_ASSERT;
1272 	default:
1273 		return LL2_DO_NOTHING;
1274 	}
1275 }
1276 
1277 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
1278 {
1279 	struct qed_hwfn *p_hwfn = cxt;
1280 	qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1281 	struct qed_ll2_info *p_ll2_info = NULL;
1282 	u8 i, *p_tx_max;
1283 	int rc;
1284 
1285 	if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
1286 		return -EINVAL;
1287 
1288 	/* Find a free connection to be used */
1289 	for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) {
1290 		mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1291 		if (p_hwfn->p_ll2_info[i].b_active) {
1292 			mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1293 			continue;
1294 		}
1295 
1296 		p_hwfn->p_ll2_info[i].b_active = true;
1297 		p_ll2_info = &p_hwfn->p_ll2_info[i];
1298 		mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1299 		break;
1300 	}
1301 	if (!p_ll2_info)
1302 		return -EBUSY;
1303 
1304 	memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
1305 
1306 	switch (data->input.tx_dest) {
1307 	case QED_LL2_TX_DEST_NW:
1308 		p_ll2_info->tx_dest = CORE_TX_DEST_NW;
1309 		break;
1310 	case QED_LL2_TX_DEST_LB:
1311 		p_ll2_info->tx_dest = CORE_TX_DEST_LB;
1312 		break;
1313 	case QED_LL2_TX_DEST_DROP:
1314 		p_ll2_info->tx_dest = CORE_TX_DEST_DROP;
1315 		break;
1316 	default:
1317 		return -EINVAL;
1318 	}
1319 
1320 	if (data->input.conn_type == QED_LL2_TYPE_OOO ||
1321 	    data->input.secondary_queue)
1322 		p_ll2_info->main_func_queue = false;
1323 	else
1324 		p_ll2_info->main_func_queue = true;
1325 
1326 	/* Correct maximum number of Tx BDs */
1327 	p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1328 	if (*p_tx_max == 0)
1329 		*p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1330 	else
1331 		*p_tx_max = min_t(u8, *p_tx_max,
1332 				  CORE_LL2_TX_MAX_BDS_PER_PACKET);
1333 
1334 	rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
1335 	if (rc) {
1336 		DP_NOTICE(p_hwfn, "Invalid callback functions\n");
1337 		goto q_allocate_fail;
1338 	}
1339 
1340 	rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
1341 	if (rc)
1342 		goto q_allocate_fail;
1343 
1344 	rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
1345 	if (rc)
1346 		goto q_allocate_fail;
1347 
1348 	rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
1349 					    data->input.mtu);
1350 	if (rc)
1351 		goto q_allocate_fail;
1352 
1353 	/* Register callbacks for the Rx/Tx queues */
1354 	if (data->input.conn_type == QED_LL2_TYPE_OOO) {
1355 		comp_rx_cb = qed_ll2_lb_rxq_completion;
1356 		comp_tx_cb = qed_ll2_lb_txq_completion;
1357 	} else {
1358 		comp_rx_cb = qed_ll2_rxq_completion;
1359 		comp_tx_cb = qed_ll2_txq_completion;
1360 	}
1361 
1362 	if (data->input.rx_num_desc) {
1363 		qed_int_register_cb(p_hwfn, comp_rx_cb,
1364 				    &p_hwfn->p_ll2_info[i],
1365 				    &p_ll2_info->rx_queue.rx_sb_index,
1366 				    &p_ll2_info->rx_queue.p_fw_cons);
1367 		p_ll2_info->rx_queue.b_cb_registred = true;
1368 	}
1369 
1370 	if (data->input.tx_num_desc) {
1371 		qed_int_register_cb(p_hwfn,
1372 				    comp_tx_cb,
1373 				    &p_hwfn->p_ll2_info[i],
1374 				    &p_ll2_info->tx_queue.tx_sb_index,
1375 				    &p_ll2_info->tx_queue.p_fw_cons);
1376 		p_ll2_info->tx_queue.b_cb_registred = true;
1377 	}
1378 
1379 	*data->p_connection_handle = i;
1380 	return rc;
1381 
1382 q_allocate_fail:
1383 	qed_ll2_release_connection(p_hwfn, i);
1384 	return -ENOMEM;
1385 }
1386 
1387 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1388 					   struct qed_ll2_info *p_ll2_conn)
1389 {
1390 	enum qed_ll2_error_handle error_input;
1391 	enum core_error_handle error_mode;
1392 	u8 action_on_error = 0;
1393 
1394 	if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1395 		return 0;
1396 
1397 	DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
1398 	error_input = p_ll2_conn->input.ai_err_packet_too_big;
1399 	error_mode = qed_ll2_get_error_choice(error_input);
1400 	SET_FIELD(action_on_error,
1401 		  CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1402 	error_input = p_ll2_conn->input.ai_err_no_buf;
1403 	error_mode = qed_ll2_get_error_choice(error_input);
1404 	SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
1405 
1406 	return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1407 }
1408 
1409 static void
1410 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1411 				 struct qed_ll2_info *p_ll2_conn)
1412 {
1413 	if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
1414 		return;
1415 
1416 	qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1417 	qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1418 }
1419 
1420 int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
1421 {
1422 	struct qed_hwfn *p_hwfn = cxt;
1423 	struct qed_ll2_info *p_ll2_conn;
1424 	struct qed_ll2_tx_packet *p_pkt;
1425 	struct qed_ll2_rx_queue *p_rx;
1426 	struct qed_ll2_tx_queue *p_tx;
1427 	struct qed_ptt *p_ptt;
1428 	int rc = -EINVAL;
1429 	u32 i, capacity;
1430 	u32 desc_size;
1431 	u8 qid;
1432 
1433 	p_ptt = qed_ptt_acquire(p_hwfn);
1434 	if (!p_ptt)
1435 		return -EAGAIN;
1436 
1437 	p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
1438 	if (!p_ll2_conn) {
1439 		rc = -EINVAL;
1440 		goto out;
1441 	}
1442 
1443 	p_rx = &p_ll2_conn->rx_queue;
1444 	p_tx = &p_ll2_conn->tx_queue;
1445 
1446 	qed_chain_reset(&p_rx->rxq_chain);
1447 	qed_chain_reset(&p_rx->rcq_chain);
1448 	INIT_LIST_HEAD(&p_rx->active_descq);
1449 	INIT_LIST_HEAD(&p_rx->free_descq);
1450 	INIT_LIST_HEAD(&p_rx->posting_descq);
1451 	spin_lock_init(&p_rx->lock);
1452 	capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1453 	for (i = 0; i < capacity; i++)
1454 		list_add_tail(&p_rx->descq_array[i].list_entry,
1455 			      &p_rx->free_descq);
1456 	*p_rx->p_fw_cons = 0;
1457 
1458 	qed_chain_reset(&p_tx->txq_chain);
1459 	INIT_LIST_HEAD(&p_tx->active_descq);
1460 	INIT_LIST_HEAD(&p_tx->free_descq);
1461 	INIT_LIST_HEAD(&p_tx->sending_descq);
1462 	spin_lock_init(&p_tx->lock);
1463 	capacity = qed_chain_get_capacity(&p_tx->txq_chain);
1464 	/* First element is part of the packet, rest are flexibly added */
1465 	desc_size = (sizeof(*p_pkt) +
1466 		     (p_ll2_conn->input.tx_max_bds_per_packet - 1) *
1467 		     sizeof(p_pkt->bds_set));
1468 
1469 	for (i = 0; i < capacity; i++) {
1470 		p_pkt = p_tx->descq_mem + desc_size * i;
1471 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
1472 	}
1473 	p_tx->cur_completing_bd_idx = 0;
1474 	p_tx->bds_idx = 0;
1475 	p_tx->b_completing_packet = false;
1476 	p_tx->cur_send_packet = NULL;
1477 	p_tx->cur_send_frag_num = 0;
1478 	p_tx->cur_completing_frag_num = 0;
1479 	*p_tx->p_fw_cons = 0;
1480 
1481 	rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1482 	if (rc)
1483 		goto out;
1484 
1485 	qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle;
1486 	p_ll2_conn->queue_id = qid;
1487 	p_ll2_conn->tx_stats_id = qid;
1488 	p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview +
1489 					    GTT_BAR0_MAP_REG_TSDM_RAM +
1490 					    TSTORM_LL2_RX_PRODS_OFFSET(qid);
1491 	p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1492 					    qed_db_addr(p_ll2_conn->cid,
1493 							DQ_DEMS_LEGACY);
1494 
1495 	rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1496 	if (rc)
1497 		goto out;
1498 
1499 	rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1500 	if (rc)
1501 		goto out;
1502 
1503 	if (!QED_IS_RDMA_PERSONALITY(p_hwfn))
1504 		qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
1505 
1506 	qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1507 
1508 	if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
1509 		qed_llh_add_protocol_filter(p_hwfn, p_ptt,
1510 					    0x8906, 0,
1511 					    QED_LLH_FILTER_ETHERTYPE);
1512 		qed_llh_add_protocol_filter(p_hwfn, p_ptt,
1513 					    0x8914, 0,
1514 					    QED_LLH_FILTER_ETHERTYPE);
1515 	}
1516 
1517 out:
1518 	qed_ptt_release(p_hwfn, p_ptt);
1519 	return rc;
1520 }
1521 
1522 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1523 					     struct qed_ll2_rx_queue *p_rx,
1524 					     struct qed_ll2_rx_packet *p_curp)
1525 {
1526 	struct qed_ll2_rx_packet *p_posting_packet = NULL;
1527 	struct core_ll2_rx_prod rx_prod = { 0, 0, 0 };
1528 	bool b_notify_fw = false;
1529 	u16 bd_prod, cq_prod;
1530 
1531 	/* This handles the flushing of already posted buffers */
1532 	while (!list_empty(&p_rx->posting_descq)) {
1533 		p_posting_packet = list_first_entry(&p_rx->posting_descq,
1534 						    struct qed_ll2_rx_packet,
1535 						    list_entry);
1536 		list_move_tail(&p_posting_packet->list_entry,
1537 			       &p_rx->active_descq);
1538 		b_notify_fw = true;
1539 	}
1540 
1541 	/* This handles the supplied packet [if there is one] */
1542 	if (p_curp) {
1543 		list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1544 		b_notify_fw = true;
1545 	}
1546 
1547 	if (!b_notify_fw)
1548 		return;
1549 
1550 	bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1551 	cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1552 	rx_prod.bd_prod = cpu_to_le16(bd_prod);
1553 	rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1554 	DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1555 }
1556 
1557 int qed_ll2_post_rx_buffer(void *cxt,
1558 			   u8 connection_handle,
1559 			   dma_addr_t addr,
1560 			   u16 buf_len, void *cookie, u8 notify_fw)
1561 {
1562 	struct qed_hwfn *p_hwfn = cxt;
1563 	struct core_rx_bd_with_buff_len *p_curb = NULL;
1564 	struct qed_ll2_rx_packet *p_curp = NULL;
1565 	struct qed_ll2_info *p_ll2_conn;
1566 	struct qed_ll2_rx_queue *p_rx;
1567 	unsigned long flags;
1568 	void *p_data;
1569 	int rc = 0;
1570 
1571 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1572 	if (!p_ll2_conn)
1573 		return -EINVAL;
1574 	p_rx = &p_ll2_conn->rx_queue;
1575 
1576 	spin_lock_irqsave(&p_rx->lock, flags);
1577 	if (!list_empty(&p_rx->free_descq))
1578 		p_curp = list_first_entry(&p_rx->free_descq,
1579 					  struct qed_ll2_rx_packet, list_entry);
1580 	if (p_curp) {
1581 		if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1582 		    qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1583 			p_data = qed_chain_produce(&p_rx->rxq_chain);
1584 			p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1585 			qed_chain_produce(&p_rx->rcq_chain);
1586 		}
1587 	}
1588 
1589 	/* If we're lacking entires, let's try to flush buffers to FW */
1590 	if (!p_curp || !p_curb) {
1591 		rc = -EBUSY;
1592 		p_curp = NULL;
1593 		goto out_notify;
1594 	}
1595 
1596 	/* We have an Rx packet we can fill */
1597 	DMA_REGPAIR_LE(p_curb->addr, addr);
1598 	p_curb->buff_length = cpu_to_le16(buf_len);
1599 	p_curp->rx_buf_addr = addr;
1600 	p_curp->cookie = cookie;
1601 	p_curp->rxq_bd = p_curb;
1602 	p_curp->buf_length = buf_len;
1603 	list_del(&p_curp->list_entry);
1604 
1605 	/* Check if we only want to enqueue this packet without informing FW */
1606 	if (!notify_fw) {
1607 		list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1608 		goto out;
1609 	}
1610 
1611 out_notify:
1612 	qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1613 out:
1614 	spin_unlock_irqrestore(&p_rx->lock, flags);
1615 	return rc;
1616 }
1617 
1618 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1619 					  struct qed_ll2_tx_queue *p_tx,
1620 					  struct qed_ll2_tx_packet *p_curp,
1621 					  struct qed_ll2_tx_pkt_info *pkt,
1622 					  u8 notify_fw)
1623 {
1624 	list_del(&p_curp->list_entry);
1625 	p_curp->cookie = pkt->cookie;
1626 	p_curp->bd_used = pkt->num_of_bds;
1627 	p_curp->notify_fw = notify_fw;
1628 	p_tx->cur_send_packet = p_curp;
1629 	p_tx->cur_send_frag_num = 0;
1630 
1631 	p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1632 	p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
1633 	p_tx->cur_send_frag_num++;
1634 }
1635 
1636 static void
1637 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1638 				 struct qed_ll2_info *p_ll2,
1639 				 struct qed_ll2_tx_packet *p_curp,
1640 				 struct qed_ll2_tx_pkt_info *pkt)
1641 {
1642 	struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1643 	u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1644 	struct core_tx_bd *start_bd = NULL;
1645 	enum core_roce_flavor_type roce_flavor;
1646 	enum core_tx_dest tx_dest;
1647 	u16 bd_data = 0, frag_idx;
1648 
1649 	roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1650 							     : CORE_RROCE;
1651 
1652 	switch (pkt->tx_dest) {
1653 	case QED_LL2_TX_DEST_NW:
1654 		tx_dest = CORE_TX_DEST_NW;
1655 		break;
1656 	case QED_LL2_TX_DEST_LB:
1657 		tx_dest = CORE_TX_DEST_LB;
1658 		break;
1659 	case QED_LL2_TX_DEST_DROP:
1660 		tx_dest = CORE_TX_DEST_DROP;
1661 		break;
1662 	default:
1663 		tx_dest = CORE_TX_DEST_LB;
1664 		break;
1665 	}
1666 
1667 	start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1668 	if (QED_IS_IWARP_PERSONALITY(p_hwfn) &&
1669 	    p_ll2->input.conn_type == QED_LL2_TYPE_OOO)
1670 		start_bd->nw_vlan_or_lb_echo =
1671 		    cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE);
1672 	else
1673 		start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
1674 	SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W,
1675 		  cpu_to_le16(pkt->l4_hdr_offset_w));
1676 	SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest);
1677 	bd_data |= pkt->bd_flags;
1678 	SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
1679 	SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
1680 	SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
1681 	SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum));
1682 	SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum));
1683 	SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len));
1684 	start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
1685 	DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1686 	start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
1687 
1688 	DP_VERBOSE(p_hwfn,
1689 		   (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1690 		   "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1691 		   p_ll2->queue_id,
1692 		   p_ll2->cid,
1693 		   p_ll2->input.conn_type,
1694 		   prod_idx,
1695 		   pkt->first_frag_len,
1696 		   pkt->num_of_bds,
1697 		   le32_to_cpu(start_bd->addr.hi),
1698 		   le32_to_cpu(start_bd->addr.lo));
1699 
1700 	if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
1701 		return;
1702 
1703 	/* Need to provide the packet with additional BDs for frags */
1704 	for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
1705 	     frag_idx < pkt->num_of_bds; frag_idx++) {
1706 		struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1707 
1708 		*p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1709 		(*p_bd)->bd_data.as_bitfield = 0;
1710 		(*p_bd)->bitfield1 = 0;
1711 		p_curp->bds_set[frag_idx].tx_frag = 0;
1712 		p_curp->bds_set[frag_idx].frag_len = 0;
1713 	}
1714 }
1715 
1716 /* This should be called while the Txq spinlock is being held */
1717 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1718 				     struct qed_ll2_info *p_ll2_conn)
1719 {
1720 	bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1721 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1722 	struct qed_ll2_tx_packet *p_pkt = NULL;
1723 	struct core_db_data db_msg = { 0, 0, 0 };
1724 	u16 bd_prod;
1725 
1726 	/* If there are missing BDs, don't do anything now */
1727 	if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1728 	    p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1729 		return;
1730 
1731 	/* Push the current packet to the list and clean after it */
1732 	list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1733 		      &p_ll2_conn->tx_queue.sending_descq);
1734 	p_ll2_conn->tx_queue.cur_send_packet = NULL;
1735 	p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1736 
1737 	/* Notify FW of packet only if requested to */
1738 	if (!b_notify)
1739 		return;
1740 
1741 	bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1742 
1743 	while (!list_empty(&p_tx->sending_descq)) {
1744 		p_pkt = list_first_entry(&p_tx->sending_descq,
1745 					 struct qed_ll2_tx_packet, list_entry);
1746 		if (!p_pkt)
1747 			break;
1748 
1749 		list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
1750 	}
1751 
1752 	SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1753 	SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1754 	SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1755 		  DQ_XCM_CORE_TX_BD_PROD_CMD);
1756 	db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1757 	db_msg.spq_prod = cpu_to_le16(bd_prod);
1758 
1759 	/* Make sure the BDs data is updated before ringing the doorbell */
1760 	wmb();
1761 
1762 	DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg));
1763 
1764 	DP_VERBOSE(p_hwfn,
1765 		   (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1766 		   "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1767 		   p_ll2_conn->queue_id,
1768 		   p_ll2_conn->cid,
1769 		   p_ll2_conn->input.conn_type, db_msg.spq_prod);
1770 }
1771 
1772 int qed_ll2_prepare_tx_packet(void *cxt,
1773 			      u8 connection_handle,
1774 			      struct qed_ll2_tx_pkt_info *pkt,
1775 			      bool notify_fw)
1776 {
1777 	struct qed_hwfn *p_hwfn = cxt;
1778 	struct qed_ll2_tx_packet *p_curp = NULL;
1779 	struct qed_ll2_info *p_ll2_conn = NULL;
1780 	struct qed_ll2_tx_queue *p_tx;
1781 	struct qed_chain *p_tx_chain;
1782 	unsigned long flags;
1783 	int rc = 0;
1784 
1785 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1786 	if (!p_ll2_conn)
1787 		return -EINVAL;
1788 	p_tx = &p_ll2_conn->tx_queue;
1789 	p_tx_chain = &p_tx->txq_chain;
1790 
1791 	if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet)
1792 		return -EIO;
1793 
1794 	spin_lock_irqsave(&p_tx->lock, flags);
1795 	if (p_tx->cur_send_packet) {
1796 		rc = -EEXIST;
1797 		goto out;
1798 	}
1799 
1800 	/* Get entry, but only if we have tx elements for it */
1801 	if (!list_empty(&p_tx->free_descq))
1802 		p_curp = list_first_entry(&p_tx->free_descq,
1803 					  struct qed_ll2_tx_packet, list_entry);
1804 	if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds)
1805 		p_curp = NULL;
1806 
1807 	if (!p_curp) {
1808 		rc = -EBUSY;
1809 		goto out;
1810 	}
1811 
1812 	/* Prepare packet and BD, and perhaps send a doorbell to FW */
1813 	qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
1814 
1815 	qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
1816 
1817 	qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1818 
1819 out:
1820 	spin_unlock_irqrestore(&p_tx->lock, flags);
1821 	return rc;
1822 }
1823 
1824 int qed_ll2_set_fragment_of_tx_packet(void *cxt,
1825 				      u8 connection_handle,
1826 				      dma_addr_t addr, u16 nbytes)
1827 {
1828 	struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
1829 	struct qed_hwfn *p_hwfn = cxt;
1830 	struct qed_ll2_info *p_ll2_conn = NULL;
1831 	u16 cur_send_frag_num = 0;
1832 	struct core_tx_bd *p_bd;
1833 	unsigned long flags;
1834 
1835 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1836 	if (!p_ll2_conn)
1837 		return -EINVAL;
1838 
1839 	if (!p_ll2_conn->tx_queue.cur_send_packet)
1840 		return -EINVAL;
1841 
1842 	p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
1843 	cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
1844 
1845 	if (cur_send_frag_num >= p_cur_send_packet->bd_used)
1846 		return -EINVAL;
1847 
1848 	/* Fill the BD information, and possibly notify FW */
1849 	p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
1850 	DMA_REGPAIR_LE(p_bd->addr, addr);
1851 	p_bd->nbytes = cpu_to_le16(nbytes);
1852 	p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
1853 	p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
1854 
1855 	p_ll2_conn->tx_queue.cur_send_frag_num++;
1856 
1857 	spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
1858 	qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1859 	spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
1860 
1861 	return 0;
1862 }
1863 
1864 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
1865 {
1866 	struct qed_hwfn *p_hwfn = cxt;
1867 	struct qed_ll2_info *p_ll2_conn = NULL;
1868 	int rc = -EINVAL;
1869 	struct qed_ptt *p_ptt;
1870 
1871 	p_ptt = qed_ptt_acquire(p_hwfn);
1872 	if (!p_ptt)
1873 		return -EAGAIN;
1874 
1875 	p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
1876 	if (!p_ll2_conn) {
1877 		rc = -EINVAL;
1878 		goto out;
1879 	}
1880 
1881 	/* Stop Tx & Rx of connection, if needed */
1882 	if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
1883 		rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
1884 		if (rc)
1885 			goto out;
1886 		qed_ll2_txq_flush(p_hwfn, connection_handle);
1887 	}
1888 
1889 	if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
1890 		rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
1891 		if (rc)
1892 			goto out;
1893 		qed_ll2_rxq_flush(p_hwfn, connection_handle);
1894 	}
1895 
1896 	if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
1897 		qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1898 
1899 	if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
1900 		qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
1901 					       0x8906, 0,
1902 					       QED_LLH_FILTER_ETHERTYPE);
1903 		qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
1904 					       0x8914, 0,
1905 					       QED_LLH_FILTER_ETHERTYPE);
1906 	}
1907 
1908 out:
1909 	qed_ptt_release(p_hwfn, p_ptt);
1910 	return rc;
1911 }
1912 
1913 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
1914 					   struct qed_ll2_info *p_ll2_conn)
1915 {
1916 	struct qed_ooo_buffer *p_buffer;
1917 
1918 	if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
1919 		return;
1920 
1921 	qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1922 	while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
1923 						   p_hwfn->p_ooo_info))) {
1924 		dma_free_coherent(&p_hwfn->cdev->pdev->dev,
1925 				  p_buffer->rx_buffer_size,
1926 				  p_buffer->rx_buffer_virt_addr,
1927 				  p_buffer->rx_buffer_phys_addr);
1928 		kfree(p_buffer);
1929 	}
1930 }
1931 
1932 void qed_ll2_release_connection(void *cxt, u8 connection_handle)
1933 {
1934 	struct qed_hwfn *p_hwfn = cxt;
1935 	struct qed_ll2_info *p_ll2_conn = NULL;
1936 
1937 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1938 	if (!p_ll2_conn)
1939 		return;
1940 
1941 	if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
1942 		p_ll2_conn->rx_queue.b_cb_registred = false;
1943 		qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
1944 	}
1945 
1946 	if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
1947 		p_ll2_conn->tx_queue.b_cb_registred = false;
1948 		qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
1949 	}
1950 
1951 	kfree(p_ll2_conn->tx_queue.descq_mem);
1952 	qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
1953 
1954 	kfree(p_ll2_conn->rx_queue.descq_array);
1955 	qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
1956 	qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
1957 
1958 	qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
1959 
1960 	qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
1961 
1962 	mutex_lock(&p_ll2_conn->mutex);
1963 	p_ll2_conn->b_active = false;
1964 	mutex_unlock(&p_ll2_conn->mutex);
1965 }
1966 
1967 int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
1968 {
1969 	struct qed_ll2_info *p_ll2_connections;
1970 	u8 i;
1971 
1972 	/* Allocate LL2's set struct */
1973 	p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
1974 				    sizeof(struct qed_ll2_info), GFP_KERNEL);
1975 	if (!p_ll2_connections) {
1976 		DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
1977 		return -ENOMEM;
1978 	}
1979 
1980 	for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
1981 		p_ll2_connections[i].my_id = i;
1982 
1983 	p_hwfn->p_ll2_info = p_ll2_connections;
1984 	return 0;
1985 }
1986 
1987 void qed_ll2_setup(struct qed_hwfn *p_hwfn)
1988 {
1989 	int i;
1990 
1991 	for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
1992 		mutex_init(&p_hwfn->p_ll2_info[i].mutex);
1993 }
1994 
1995 void qed_ll2_free(struct qed_hwfn *p_hwfn)
1996 {
1997 	if (!p_hwfn->p_ll2_info)
1998 		return;
1999 
2000 	kfree(p_hwfn->p_ll2_info);
2001 	p_hwfn->p_ll2_info = NULL;
2002 }
2003 
2004 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn,
2005 				    struct qed_ptt *p_ptt,
2006 				    struct qed_ll2_stats *p_stats)
2007 {
2008 	struct core_ll2_port_stats port_stats;
2009 
2010 	memset(&port_stats, 0, sizeof(port_stats));
2011 	qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
2012 			BAR0_MAP_REG_TSDM_RAM +
2013 			TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)),
2014 			sizeof(port_stats));
2015 
2016 	p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr);
2017 	p_stats->gsi_invalid_pkt_length =
2018 	    HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length);
2019 	p_stats->gsi_unsupported_pkt_typ =
2020 	    HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ);
2021 	p_stats->gsi_crcchksm_error =
2022 	    HILO_64_REGPAIR(port_stats.gsi_crcchksm_error);
2023 }
2024 
2025 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
2026 				struct qed_ptt *p_ptt,
2027 				struct qed_ll2_info *p_ll2_conn,
2028 				struct qed_ll2_stats *p_stats)
2029 {
2030 	struct core_ll2_tstorm_per_queue_stat tstats;
2031 	u8 qid = p_ll2_conn->queue_id;
2032 	u32 tstats_addr;
2033 
2034 	memset(&tstats, 0, sizeof(tstats));
2035 	tstats_addr = BAR0_MAP_REG_TSDM_RAM +
2036 		      CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
2037 	qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
2038 
2039 	p_stats->packet_too_big_discard =
2040 			HILO_64_REGPAIR(tstats.packet_too_big_discard);
2041 	p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard);
2042 }
2043 
2044 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
2045 				struct qed_ptt *p_ptt,
2046 				struct qed_ll2_info *p_ll2_conn,
2047 				struct qed_ll2_stats *p_stats)
2048 {
2049 	struct core_ll2_ustorm_per_queue_stat ustats;
2050 	u8 qid = p_ll2_conn->queue_id;
2051 	u32 ustats_addr;
2052 
2053 	memset(&ustats, 0, sizeof(ustats));
2054 	ustats_addr = BAR0_MAP_REG_USDM_RAM +
2055 		      CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
2056 	qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
2057 
2058 	p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
2059 	p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
2060 	p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
2061 	p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
2062 	p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
2063 	p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
2064 }
2065 
2066 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
2067 				struct qed_ptt *p_ptt,
2068 				struct qed_ll2_info *p_ll2_conn,
2069 				struct qed_ll2_stats *p_stats)
2070 {
2071 	struct core_ll2_pstorm_per_queue_stat pstats;
2072 	u8 stats_id = p_ll2_conn->tx_stats_id;
2073 	u32 pstats_addr;
2074 
2075 	memset(&pstats, 0, sizeof(pstats));
2076 	pstats_addr = BAR0_MAP_REG_PSDM_RAM +
2077 		      CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
2078 	qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
2079 
2080 	p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes);
2081 	p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes);
2082 	p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes);
2083 	p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts);
2084 	p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts);
2085 	p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts);
2086 }
2087 
2088 int qed_ll2_get_stats(void *cxt,
2089 		      u8 connection_handle, struct qed_ll2_stats *p_stats)
2090 {
2091 	struct qed_hwfn *p_hwfn = cxt;
2092 	struct qed_ll2_info *p_ll2_conn = NULL;
2093 	struct qed_ptt *p_ptt;
2094 
2095 	memset(p_stats, 0, sizeof(*p_stats));
2096 
2097 	if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
2098 	    !p_hwfn->p_ll2_info)
2099 		return -EINVAL;
2100 
2101 	p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
2102 
2103 	p_ptt = qed_ptt_acquire(p_hwfn);
2104 	if (!p_ptt) {
2105 		DP_ERR(p_hwfn, "Failed to acquire ptt\n");
2106 		return -EINVAL;
2107 	}
2108 
2109 	if (p_ll2_conn->input.gsi_enable)
2110 		_qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats);
2111 	_qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2112 	_qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2113 	if (p_ll2_conn->tx_stats_en)
2114 		_qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2115 
2116 	qed_ptt_release(p_hwfn, p_ptt);
2117 	return 0;
2118 }
2119 
2120 static void qed_ll2b_release_rx_packet(void *cxt,
2121 				       u8 connection_handle,
2122 				       void *cookie,
2123 				       dma_addr_t rx_buf_addr,
2124 				       bool b_last_packet)
2125 {
2126 	struct qed_hwfn *p_hwfn = cxt;
2127 
2128 	qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
2129 }
2130 
2131 static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2132 				    const struct qed_ll2_cb_ops *ops,
2133 				    void *cookie)
2134 {
2135 	cdev->ll2->cbs = ops;
2136 	cdev->ll2->cb_cookie = cookie;
2137 }
2138 
2139 struct qed_ll2_cbs ll2_cbs = {
2140 	.rx_comp_cb = &qed_ll2b_complete_rx_packet,
2141 	.rx_release_cb = &qed_ll2b_release_rx_packet,
2142 	.tx_comp_cb = &qed_ll2b_complete_tx_packet,
2143 	.tx_release_cb = &qed_ll2b_complete_tx_packet,
2144 };
2145 
2146 static void qed_ll2_set_conn_data(struct qed_dev *cdev,
2147 				  struct qed_ll2_acquire_data *data,
2148 				  struct qed_ll2_params *params,
2149 				  enum qed_ll2_conn_type conn_type,
2150 				  u8 *handle, bool lb)
2151 {
2152 	memset(data, 0, sizeof(*data));
2153 
2154 	data->input.conn_type = conn_type;
2155 	data->input.mtu = params->mtu;
2156 	data->input.rx_num_desc = QED_LL2_RX_SIZE;
2157 	data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2158 	data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2159 	data->input.tx_num_desc = QED_LL2_TX_SIZE;
2160 	data->p_connection_handle = handle;
2161 	data->cbs = &ll2_cbs;
2162 	ll2_cbs.cookie = QED_LEADING_HWFN(cdev);
2163 
2164 	if (lb) {
2165 		data->input.tx_tc = PKT_LB_TC;
2166 		data->input.tx_dest = QED_LL2_TX_DEST_LB;
2167 	} else {
2168 		data->input.tx_tc = 0;
2169 		data->input.tx_dest = QED_LL2_TX_DEST_NW;
2170 	}
2171 }
2172 
2173 static int qed_ll2_start_ooo(struct qed_dev *cdev,
2174 			     struct qed_ll2_params *params)
2175 {
2176 	struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2177 	u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2178 	struct qed_ll2_acquire_data data;
2179 	int rc;
2180 
2181 	qed_ll2_set_conn_data(cdev, &data, params,
2182 			      QED_LL2_TYPE_OOO, handle, true);
2183 
2184 	rc = qed_ll2_acquire_connection(hwfn, &data);
2185 	if (rc) {
2186 		DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n");
2187 		goto out;
2188 	}
2189 
2190 	rc = qed_ll2_establish_connection(hwfn, *handle);
2191 	if (rc) {
2192 		DP_INFO(cdev, "Failed to establist LL2 OOO connection\n");
2193 		goto fail;
2194 	}
2195 
2196 	return 0;
2197 
2198 fail:
2199 	qed_ll2_release_connection(hwfn, *handle);
2200 out:
2201 	*handle = QED_LL2_UNUSED_HANDLE;
2202 	return rc;
2203 }
2204 
2205 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2206 {
2207 	struct qed_ll2_buffer *buffer, *tmp_buffer;
2208 	enum qed_ll2_conn_type conn_type;
2209 	struct qed_ll2_acquire_data data;
2210 	struct qed_ptt *p_ptt;
2211 	int rc, i;
2212 
2213 
2214 	/* Initialize LL2 locks & lists */
2215 	INIT_LIST_HEAD(&cdev->ll2->list);
2216 	spin_lock_init(&cdev->ll2->lock);
2217 	cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN +
2218 			     L1_CACHE_BYTES + params->mtu;
2219 
2220 	/*Allocate memory for LL2 */
2221 	DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n",
2222 		cdev->ll2->rx_size);
2223 	for (i = 0; i < QED_LL2_RX_SIZE; i++) {
2224 		buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2225 		if (!buffer) {
2226 			DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2227 			goto fail;
2228 		}
2229 
2230 		rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2231 					  &buffer->phys_addr);
2232 		if (rc) {
2233 			kfree(buffer);
2234 			goto fail;
2235 		}
2236 
2237 		list_add_tail(&buffer->list, &cdev->ll2->list);
2238 	}
2239 
2240 	switch (QED_LEADING_HWFN(cdev)->hw_info.personality) {
2241 	case QED_PCI_FCOE:
2242 		conn_type = QED_LL2_TYPE_FCOE;
2243 		break;
2244 	case QED_PCI_ISCSI:
2245 		conn_type = QED_LL2_TYPE_ISCSI;
2246 		break;
2247 	case QED_PCI_ETH_ROCE:
2248 		conn_type = QED_LL2_TYPE_ROCE;
2249 		break;
2250 	default:
2251 		conn_type = QED_LL2_TYPE_TEST;
2252 	}
2253 
2254 	qed_ll2_set_conn_data(cdev, &data, params, conn_type,
2255 			      &cdev->ll2->handle, false);
2256 
2257 	rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data);
2258 	if (rc) {
2259 		DP_INFO(cdev, "Failed to acquire LL2 connection\n");
2260 		goto fail;
2261 	}
2262 
2263 	rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev),
2264 					  cdev->ll2->handle);
2265 	if (rc) {
2266 		DP_INFO(cdev, "Failed to establish LL2 connection\n");
2267 		goto release_fail;
2268 	}
2269 
2270 	/* Post all Rx buffers to FW */
2271 	spin_lock_bh(&cdev->ll2->lock);
2272 	list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
2273 		rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev),
2274 					    cdev->ll2->handle,
2275 					    buffer->phys_addr, 0, buffer, 1);
2276 		if (rc) {
2277 			DP_INFO(cdev,
2278 				"Failed to post an Rx buffer; Deleting it\n");
2279 			dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2280 					 cdev->ll2->rx_size, DMA_FROM_DEVICE);
2281 			kfree(buffer->data);
2282 			list_del(&buffer->list);
2283 			kfree(buffer);
2284 		} else {
2285 			cdev->ll2->rx_cnt++;
2286 		}
2287 	}
2288 	spin_unlock_bh(&cdev->ll2->lock);
2289 
2290 	if (!cdev->ll2->rx_cnt) {
2291 		DP_INFO(cdev, "Failed passing even a single Rx buffer\n");
2292 		goto release_terminate;
2293 	}
2294 
2295 	if (!is_valid_ether_addr(params->ll2_mac_address)) {
2296 		DP_INFO(cdev, "Invalid Ethernet address\n");
2297 		goto release_terminate;
2298 	}
2299 
2300 	if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI) {
2301 		DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2302 		rc = qed_ll2_start_ooo(cdev, params);
2303 		if (rc) {
2304 			DP_INFO(cdev,
2305 				"Failed to initialize the OOO LL2 queue\n");
2306 			goto release_terminate;
2307 		}
2308 	}
2309 
2310 	p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2311 	if (!p_ptt) {
2312 		DP_INFO(cdev, "Failed to acquire PTT\n");
2313 		goto release_terminate;
2314 	}
2315 
2316 	rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2317 				    params->ll2_mac_address);
2318 	qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2319 	if (rc) {
2320 		DP_ERR(cdev, "Failed to allocate LLH filter\n");
2321 		goto release_terminate_all;
2322 	}
2323 
2324 	ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
2325 	return 0;
2326 
2327 release_terminate_all:
2328 
2329 release_terminate:
2330 	qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2331 release_fail:
2332 	qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2333 fail:
2334 	qed_ll2_kill_buffers(cdev);
2335 	cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2336 	return -EINVAL;
2337 }
2338 
2339 static int qed_ll2_stop(struct qed_dev *cdev)
2340 {
2341 	struct qed_ptt *p_ptt;
2342 	int rc;
2343 
2344 	if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2345 		return 0;
2346 
2347 	p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2348 	if (!p_ptt) {
2349 		DP_INFO(cdev, "Failed to acquire PTT\n");
2350 		goto fail;
2351 	}
2352 
2353 	qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2354 				  cdev->ll2_mac_address);
2355 	qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2356 	eth_zero_addr(cdev->ll2_mac_address);
2357 
2358 	if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI)
2359 		qed_ll2_stop_ooo(cdev);
2360 
2361 	rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev),
2362 					  cdev->ll2->handle);
2363 	if (rc)
2364 		DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2365 
2366 	qed_ll2_kill_buffers(cdev);
2367 
2368 	qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2369 	cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2370 
2371 	return rc;
2372 fail:
2373 	return -EINVAL;
2374 }
2375 
2376 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb)
2377 {
2378 	struct qed_ll2_tx_pkt_info pkt;
2379 	const skb_frag_t *frag;
2380 	int rc = -EINVAL, i;
2381 	dma_addr_t mapping;
2382 	u16 vlan = 0;
2383 	u8 flags = 0;
2384 
2385 	if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2386 		DP_INFO(cdev, "Cannot transmit a checksumed packet\n");
2387 		return -EINVAL;
2388 	}
2389 
2390 	if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) {
2391 		DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2392 		       1 + skb_shinfo(skb)->nr_frags);
2393 		return -EINVAL;
2394 	}
2395 
2396 	mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2397 				 skb->len, DMA_TO_DEVICE);
2398 	if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2399 		DP_NOTICE(cdev, "SKB mapping failed\n");
2400 		return -EINVAL;
2401 	}
2402 
2403 	/* Request HW to calculate IP csum */
2404 	if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2405 	      ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2406 		flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
2407 
2408 	if (skb_vlan_tag_present(skb)) {
2409 		vlan = skb_vlan_tag_get(skb);
2410 		flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
2411 	}
2412 
2413 	memset(&pkt, 0, sizeof(pkt));
2414 	pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags;
2415 	pkt.vlan = vlan;
2416 	pkt.bd_flags = flags;
2417 	pkt.tx_dest = QED_LL2_TX_DEST_NW;
2418 	pkt.first_frag = mapping;
2419 	pkt.first_frag_len = skb->len;
2420 	pkt.cookie = skb;
2421 
2422 	rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle,
2423 				       &pkt, 1);
2424 	if (rc)
2425 		goto err;
2426 
2427 	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2428 		frag = &skb_shinfo(skb)->frags[i];
2429 
2430 		mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2431 					   skb_frag_size(frag), DMA_TO_DEVICE);
2432 
2433 		if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2434 			DP_NOTICE(cdev,
2435 				  "Unable to map frag - dropping packet\n");
2436 			goto err;
2437 		}
2438 
2439 		rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev),
2440 						       cdev->ll2->handle,
2441 						       mapping,
2442 						       skb_frag_size(frag));
2443 
2444 		/* if failed not much to do here, partial packet has been posted
2445 		 * we can't free memory, will need to wait for completion.
2446 		 */
2447 		if (rc)
2448 			goto err2;
2449 	}
2450 
2451 	return 0;
2452 
2453 err:
2454 	dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2455 
2456 err2:
2457 	return rc;
2458 }
2459 
2460 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2461 {
2462 	if (!cdev->ll2)
2463 		return -EINVAL;
2464 
2465 	return qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2466 				 cdev->ll2->handle, stats);
2467 }
2468 
2469 const struct qed_ll2_ops qed_ll2_ops_pass = {
2470 	.start = &qed_ll2_start,
2471 	.stop = &qed_ll2_stop,
2472 	.start_xmit = &qed_ll2_start_xmit,
2473 	.register_cb_ops = &qed_ll2_register_cb_ops,
2474 	.get_stats = &qed_ll2_stats,
2475 };
2476 
2477 int qed_ll2_alloc_if(struct qed_dev *cdev)
2478 {
2479 	cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2480 	return cdev->ll2 ? 0 : -ENOMEM;
2481 }
2482 
2483 void qed_ll2_dealloc_if(struct qed_dev *cdev)
2484 {
2485 	kfree(cdev->ll2);
2486 	cdev->ll2 = NULL;
2487 }
2488