1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/if_vlan.h> 37 #include <linux/kernel.h> 38 #include <linux/pci.h> 39 #include <linux/slab.h> 40 #include <linux/stddef.h> 41 #include <linux/workqueue.h> 42 #include <net/ipv6.h> 43 #include <linux/bitops.h> 44 #include <linux/delay.h> 45 #include <linux/errno.h> 46 #include <linux/etherdevice.h> 47 #include <linux/io.h> 48 #include <linux/list.h> 49 #include <linux/mutex.h> 50 #include <linux/spinlock.h> 51 #include <linux/string.h> 52 #include <linux/qed/qed_ll2_if.h> 53 #include "qed.h" 54 #include "qed_cxt.h" 55 #include "qed_dev_api.h" 56 #include "qed_hsi.h" 57 #include "qed_hw.h" 58 #include "qed_int.h" 59 #include "qed_ll2.h" 60 #include "qed_mcp.h" 61 #include "qed_ooo.h" 62 #include "qed_reg_addr.h" 63 #include "qed_sp.h" 64 #include "qed_rdma.h" 65 66 #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred) 67 #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred) 68 69 #define QED_LL2_TX_SIZE (256) 70 #define QED_LL2_RX_SIZE (4096) 71 72 struct qed_cb_ll2_info { 73 int rx_cnt; 74 u32 rx_size; 75 u8 handle; 76 77 /* Lock protecting LL2 buffer lists in sleepless context */ 78 spinlock_t lock; 79 struct list_head list; 80 81 const struct qed_ll2_cb_ops *cbs; 82 void *cb_cookie; 83 }; 84 85 struct qed_ll2_buffer { 86 struct list_head list; 87 void *data; 88 dma_addr_t phys_addr; 89 }; 90 91 static void qed_ll2b_complete_tx_packet(void *cxt, 92 u8 connection_handle, 93 void *cookie, 94 dma_addr_t first_frag_addr, 95 bool b_last_fragment, 96 bool b_last_packet) 97 { 98 struct qed_hwfn *p_hwfn = cxt; 99 struct qed_dev *cdev = p_hwfn->cdev; 100 struct sk_buff *skb = cookie; 101 102 /* All we need to do is release the mapping */ 103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr, 104 skb_headlen(skb), DMA_TO_DEVICE); 105 106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb) 107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb, 108 b_last_fragment); 109 110 dev_kfree_skb_any(skb); 111 } 112 113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev, 114 u8 **data, dma_addr_t *phys_addr) 115 { 116 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC); 117 if (!(*data)) { 118 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n"); 119 return -ENOMEM; 120 } 121 122 *phys_addr = dma_map_single(&cdev->pdev->dev, 123 ((*data) + NET_SKB_PAD), 124 cdev->ll2->rx_size, DMA_FROM_DEVICE); 125 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) { 126 DP_INFO(cdev, "Failed to map LL2 buffer data\n"); 127 kfree((*data)); 128 return -ENOMEM; 129 } 130 131 return 0; 132 } 133 134 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev, 135 struct qed_ll2_buffer *buffer) 136 { 137 spin_lock_bh(&cdev->ll2->lock); 138 139 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 140 cdev->ll2->rx_size, DMA_FROM_DEVICE); 141 kfree(buffer->data); 142 list_del(&buffer->list); 143 144 cdev->ll2->rx_cnt--; 145 if (!cdev->ll2->rx_cnt) 146 DP_INFO(cdev, "All LL2 entries were removed\n"); 147 148 spin_unlock_bh(&cdev->ll2->lock); 149 150 return 0; 151 } 152 153 static void qed_ll2_kill_buffers(struct qed_dev *cdev) 154 { 155 struct qed_ll2_buffer *buffer, *tmp_buffer; 156 157 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) 158 qed_ll2_dealloc_buffer(cdev, buffer); 159 } 160 161 static void qed_ll2b_complete_rx_packet(void *cxt, 162 struct qed_ll2_comp_rx_data *data) 163 { 164 struct qed_hwfn *p_hwfn = cxt; 165 struct qed_ll2_buffer *buffer = data->cookie; 166 struct qed_dev *cdev = p_hwfn->cdev; 167 dma_addr_t new_phys_addr; 168 struct sk_buff *skb; 169 bool reuse = false; 170 int rc = -EINVAL; 171 u8 *new_data; 172 173 DP_VERBOSE(p_hwfn, 174 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA), 175 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n", 176 (u64)data->rx_buf_addr, 177 data->u.placement_offset, 178 data->length.packet_length, 179 data->parse_flags, 180 data->vlan, data->opaque_data_0, data->opaque_data_1); 181 182 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) { 183 print_hex_dump(KERN_INFO, "", 184 DUMP_PREFIX_OFFSET, 16, 1, 185 buffer->data, data->length.packet_length, false); 186 } 187 188 /* Determine if data is valid */ 189 if (data->length.packet_length < ETH_HLEN) 190 reuse = true; 191 192 /* Allocate a replacement for buffer; Reuse upon failure */ 193 if (!reuse) 194 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data, 195 &new_phys_addr); 196 197 /* If need to reuse or there's no replacement buffer, repost this */ 198 if (rc) 199 goto out_post; 200 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 201 cdev->ll2->rx_size, DMA_FROM_DEVICE); 202 203 skb = build_skb(buffer->data, 0); 204 if (!skb) { 205 DP_INFO(cdev, "Failed to build SKB\n"); 206 kfree(buffer->data); 207 goto out_post1; 208 } 209 210 data->u.placement_offset += NET_SKB_PAD; 211 skb_reserve(skb, data->u.placement_offset); 212 skb_put(skb, data->length.packet_length); 213 skb_checksum_none_assert(skb); 214 215 /* Get parital ethernet information instead of eth_type_trans(), 216 * Since we don't have an associated net_device. 217 */ 218 skb_reset_mac_header(skb); 219 skb->protocol = eth_hdr(skb)->h_proto; 220 221 /* Pass SKB onward */ 222 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) { 223 if (data->vlan) 224 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 225 data->vlan); 226 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb, 227 data->opaque_data_0, 228 data->opaque_data_1); 229 } else { 230 DP_VERBOSE(p_hwfn, (NETIF_MSG_RX_STATUS | NETIF_MSG_PKTDATA | 231 QED_MSG_LL2 | QED_MSG_STORAGE), 232 "Dropping the packet\n"); 233 kfree(buffer->data); 234 } 235 236 out_post1: 237 /* Update Buffer information and update FW producer */ 238 buffer->data = new_data; 239 buffer->phys_addr = new_phys_addr; 240 241 out_post: 242 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle, 243 buffer->phys_addr, 0, buffer, 1); 244 245 if (rc) 246 qed_ll2_dealloc_buffer(cdev, buffer); 247 } 248 249 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 250 u8 connection_handle, 251 bool b_lock, 252 bool b_only_active) 253 { 254 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL; 255 256 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) 257 return NULL; 258 259 if (!p_hwfn->p_ll2_info) 260 return NULL; 261 262 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 263 264 if (b_only_active) { 265 if (b_lock) 266 mutex_lock(&p_ll2_conn->mutex); 267 if (p_ll2_conn->b_active) 268 p_ret = p_ll2_conn; 269 if (b_lock) 270 mutex_unlock(&p_ll2_conn->mutex); 271 } else { 272 p_ret = p_ll2_conn; 273 } 274 275 return p_ret; 276 } 277 278 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 279 u8 connection_handle) 280 { 281 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true); 282 } 283 284 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn, 285 u8 connection_handle) 286 { 287 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true); 288 } 289 290 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn 291 *p_hwfn, 292 u8 connection_handle) 293 { 294 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false); 295 } 296 297 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 298 { 299 bool b_last_packet = false, b_last_frag = false; 300 struct qed_ll2_tx_packet *p_pkt = NULL; 301 struct qed_ll2_info *p_ll2_conn; 302 struct qed_ll2_tx_queue *p_tx; 303 unsigned long flags = 0; 304 dma_addr_t tx_frag; 305 306 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 307 if (!p_ll2_conn) 308 return; 309 310 p_tx = &p_ll2_conn->tx_queue; 311 312 spin_lock_irqsave(&p_tx->lock, flags); 313 while (!list_empty(&p_tx->active_descq)) { 314 p_pkt = list_first_entry(&p_tx->active_descq, 315 struct qed_ll2_tx_packet, list_entry); 316 if (!p_pkt) 317 break; 318 319 list_del(&p_pkt->list_entry); 320 b_last_packet = list_empty(&p_tx->active_descq); 321 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 322 spin_unlock_irqrestore(&p_tx->lock, flags); 323 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 324 struct qed_ooo_buffer *p_buffer; 325 326 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 327 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 328 p_buffer); 329 } else { 330 p_tx->cur_completing_packet = *p_pkt; 331 p_tx->cur_completing_bd_idx = 1; 332 b_last_frag = 333 p_tx->cur_completing_bd_idx == p_pkt->bd_used; 334 tx_frag = p_pkt->bds_set[0].tx_frag; 335 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie, 336 p_ll2_conn->my_id, 337 p_pkt->cookie, 338 tx_frag, 339 b_last_frag, 340 b_last_packet); 341 } 342 spin_lock_irqsave(&p_tx->lock, flags); 343 } 344 spin_unlock_irqrestore(&p_tx->lock, flags); 345 } 346 347 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 348 { 349 struct qed_ll2_info *p_ll2_conn = p_cookie; 350 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 351 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0; 352 struct qed_ll2_tx_packet *p_pkt; 353 bool b_last_frag = false; 354 unsigned long flags; 355 int rc = -EINVAL; 356 357 spin_lock_irqsave(&p_tx->lock, flags); 358 if (p_tx->b_completing_packet) { 359 rc = -EBUSY; 360 goto out; 361 } 362 363 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 364 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 365 while (num_bds) { 366 if (list_empty(&p_tx->active_descq)) 367 goto out; 368 369 p_pkt = list_first_entry(&p_tx->active_descq, 370 struct qed_ll2_tx_packet, list_entry); 371 if (!p_pkt) 372 goto out; 373 374 p_tx->b_completing_packet = true; 375 p_tx->cur_completing_packet = *p_pkt; 376 num_bds_in_packet = p_pkt->bd_used; 377 list_del(&p_pkt->list_entry); 378 379 if (num_bds < num_bds_in_packet) { 380 DP_NOTICE(p_hwfn, 381 "Rest of BDs does not cover whole packet\n"); 382 goto out; 383 } 384 385 num_bds -= num_bds_in_packet; 386 p_tx->bds_idx += num_bds_in_packet; 387 while (num_bds_in_packet--) 388 qed_chain_consume(&p_tx->txq_chain); 389 390 p_tx->cur_completing_bd_idx = 1; 391 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used; 392 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 393 394 spin_unlock_irqrestore(&p_tx->lock, flags); 395 396 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie, 397 p_ll2_conn->my_id, 398 p_pkt->cookie, 399 p_pkt->bds_set[0].tx_frag, 400 b_last_frag, !num_bds); 401 402 spin_lock_irqsave(&p_tx->lock, flags); 403 } 404 405 p_tx->b_completing_packet = false; 406 rc = 0; 407 out: 408 spin_unlock_irqrestore(&p_tx->lock, flags); 409 return rc; 410 } 411 412 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn, 413 union core_rx_cqe_union *p_cqe, 414 struct qed_ll2_comp_rx_data *data) 415 { 416 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags); 417 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length); 418 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan); 419 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi); 420 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo); 421 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error; 422 data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id); 423 424 data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp); 425 } 426 427 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn, 428 union core_rx_cqe_union *p_cqe, 429 struct qed_ll2_comp_rx_data *data) 430 { 431 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags); 432 data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags); 433 data->length.packet_length = 434 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length); 435 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan); 436 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]); 437 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]); 438 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset; 439 } 440 441 static int 442 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn, 443 struct qed_ll2_info *p_ll2_conn, 444 union core_rx_cqe_union *p_cqe, 445 unsigned long *p_lock_flags) 446 { 447 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 448 struct core_rx_slow_path_cqe *sp_cqe; 449 450 sp_cqe = &p_cqe->rx_cqe_sp; 451 if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) { 452 DP_NOTICE(p_hwfn, 453 "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n", 454 sp_cqe->ramrod_cmd_id); 455 return -EINVAL; 456 } 457 458 if (!p_ll2_conn->cbs.slowpath_cb) { 459 DP_NOTICE(p_hwfn, 460 "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n"); 461 return -EINVAL; 462 } 463 464 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 465 466 p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie, 467 p_ll2_conn->my_id, 468 le32_to_cpu(sp_cqe->opaque_data.data[0]), 469 le32_to_cpu(sp_cqe->opaque_data.data[1])); 470 471 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 472 473 return 0; 474 } 475 476 static int 477 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn, 478 struct qed_ll2_info *p_ll2_conn, 479 union core_rx_cqe_union *p_cqe, 480 unsigned long *p_lock_flags, bool b_last_cqe) 481 { 482 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 483 struct qed_ll2_rx_packet *p_pkt = NULL; 484 struct qed_ll2_comp_rx_data data; 485 486 if (!list_empty(&p_rx->active_descq)) 487 p_pkt = list_first_entry(&p_rx->active_descq, 488 struct qed_ll2_rx_packet, list_entry); 489 if (!p_pkt) { 490 DP_NOTICE(p_hwfn, 491 "[%d] LL2 Rx completion but active_descq is empty\n", 492 p_ll2_conn->input.conn_type); 493 494 return -EIO; 495 } 496 list_del(&p_pkt->list_entry); 497 498 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR) 499 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data); 500 else 501 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data); 502 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd) 503 DP_NOTICE(p_hwfn, 504 "Mismatch between active_descq and the LL2 Rx chain\n"); 505 506 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 507 508 data.connection_handle = p_ll2_conn->my_id; 509 data.cookie = p_pkt->cookie; 510 data.rx_buf_addr = p_pkt->rx_buf_addr; 511 data.b_last_packet = b_last_cqe; 512 513 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 514 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data); 515 516 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 517 518 return 0; 519 } 520 521 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie) 522 { 523 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie; 524 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 525 union core_rx_cqe_union *cqe = NULL; 526 u16 cq_new_idx = 0, cq_old_idx = 0; 527 unsigned long flags = 0; 528 int rc = 0; 529 530 spin_lock_irqsave(&p_rx->lock, flags); 531 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 532 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 533 534 while (cq_new_idx != cq_old_idx) { 535 bool b_last_cqe = (cq_new_idx == cq_old_idx); 536 537 cqe = 538 (union core_rx_cqe_union *) 539 qed_chain_consume(&p_rx->rcq_chain); 540 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 541 542 DP_VERBOSE(p_hwfn, 543 QED_MSG_LL2, 544 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n", 545 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type); 546 547 switch (cqe->rx_cqe_sp.type) { 548 case CORE_RX_CQE_TYPE_SLOW_PATH: 549 rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn, 550 cqe, &flags); 551 break; 552 case CORE_RX_CQE_TYPE_GSI_OFFLOAD: 553 case CORE_RX_CQE_TYPE_REGULAR: 554 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn, 555 cqe, &flags, 556 b_last_cqe); 557 break; 558 default: 559 rc = -EIO; 560 } 561 } 562 563 spin_unlock_irqrestore(&p_rx->lock, flags); 564 return rc; 565 } 566 567 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 568 { 569 struct qed_ll2_info *p_ll2_conn = NULL; 570 struct qed_ll2_rx_packet *p_pkt = NULL; 571 struct qed_ll2_rx_queue *p_rx; 572 unsigned long flags = 0; 573 574 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 575 if (!p_ll2_conn) 576 return; 577 578 p_rx = &p_ll2_conn->rx_queue; 579 580 spin_lock_irqsave(&p_rx->lock, flags); 581 while (!list_empty(&p_rx->active_descq)) { 582 p_pkt = list_first_entry(&p_rx->active_descq, 583 struct qed_ll2_rx_packet, list_entry); 584 if (!p_pkt) 585 break; 586 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq); 587 spin_unlock_irqrestore(&p_rx->lock, flags); 588 589 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 590 struct qed_ooo_buffer *p_buffer; 591 592 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 593 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 594 p_buffer); 595 } else { 596 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr; 597 void *cookie = p_pkt->cookie; 598 bool b_last; 599 600 b_last = list_empty(&p_rx->active_descq); 601 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie, 602 p_ll2_conn->my_id, 603 cookie, 604 rx_buf_addr, b_last); 605 } 606 spin_lock_irqsave(&p_rx->lock, flags); 607 } 608 spin_unlock_irqrestore(&p_rx->lock, flags); 609 } 610 611 static bool 612 qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn *p_hwfn, 613 struct core_rx_slow_path_cqe *p_cqe) 614 { 615 struct ooo_opaque *iscsi_ooo; 616 u32 cid; 617 618 if (p_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) 619 return false; 620 621 iscsi_ooo = (struct ooo_opaque *)&p_cqe->opaque_data; 622 if (iscsi_ooo->ooo_opcode != TCP_EVENT_DELETE_ISLES) 623 return false; 624 625 /* Need to make a flush */ 626 cid = le32_to_cpu(iscsi_ooo->cid); 627 qed_ooo_release_connection_isles(p_hwfn, p_hwfn->p_ooo_info, cid); 628 629 return true; 630 } 631 632 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn, 633 struct qed_ll2_info *p_ll2_conn) 634 { 635 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 636 u16 packet_length = 0, parse_flags = 0, vlan = 0; 637 struct qed_ll2_rx_packet *p_pkt = NULL; 638 u32 num_ooo_add_to_peninsula = 0, cid; 639 union core_rx_cqe_union *cqe = NULL; 640 u16 cq_new_idx = 0, cq_old_idx = 0; 641 struct qed_ooo_buffer *p_buffer; 642 struct ooo_opaque *iscsi_ooo; 643 u8 placement_offset = 0; 644 u8 cqe_type; 645 646 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 647 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 648 if (cq_new_idx == cq_old_idx) 649 return 0; 650 651 while (cq_new_idx != cq_old_idx) { 652 struct core_rx_fast_path_cqe *p_cqe_fp; 653 654 cqe = qed_chain_consume(&p_rx->rcq_chain); 655 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 656 cqe_type = cqe->rx_cqe_sp.type; 657 658 if (cqe_type == CORE_RX_CQE_TYPE_SLOW_PATH) 659 if (qed_ll2_lb_rxq_handler_slowpath(p_hwfn, 660 &cqe->rx_cqe_sp)) 661 continue; 662 663 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) { 664 DP_NOTICE(p_hwfn, 665 "Got a non-regular LB LL2 completion [type 0x%02x]\n", 666 cqe_type); 667 return -EINVAL; 668 } 669 p_cqe_fp = &cqe->rx_cqe_fp; 670 671 placement_offset = p_cqe_fp->placement_offset; 672 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags); 673 packet_length = le16_to_cpu(p_cqe_fp->packet_length); 674 vlan = le16_to_cpu(p_cqe_fp->vlan); 675 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data; 676 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info, 677 iscsi_ooo); 678 cid = le32_to_cpu(iscsi_ooo->cid); 679 680 /* Process delete isle first */ 681 if (iscsi_ooo->drop_size) 682 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid, 683 iscsi_ooo->drop_isle, 684 iscsi_ooo->drop_size); 685 686 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP) 687 continue; 688 689 /* Now process create/add/join isles */ 690 if (list_empty(&p_rx->active_descq)) { 691 DP_NOTICE(p_hwfn, 692 "LL2 OOO RX chain has no submitted buffers\n" 693 ); 694 return -EIO; 695 } 696 697 p_pkt = list_first_entry(&p_rx->active_descq, 698 struct qed_ll2_rx_packet, list_entry); 699 700 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) || 701 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) || 702 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) || 703 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) || 704 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) { 705 if (!p_pkt) { 706 DP_NOTICE(p_hwfn, 707 "LL2 OOO RX packet is not valid\n"); 708 return -EIO; 709 } 710 list_del(&p_pkt->list_entry); 711 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 712 p_buffer->packet_length = packet_length; 713 p_buffer->parse_flags = parse_flags; 714 p_buffer->vlan = vlan; 715 p_buffer->placement_offset = placement_offset; 716 qed_chain_consume(&p_rx->rxq_chain); 717 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 718 719 switch (iscsi_ooo->ooo_opcode) { 720 case TCP_EVENT_ADD_NEW_ISLE: 721 qed_ooo_add_new_isle(p_hwfn, 722 p_hwfn->p_ooo_info, 723 cid, 724 iscsi_ooo->ooo_isle, 725 p_buffer); 726 break; 727 case TCP_EVENT_ADD_ISLE_RIGHT: 728 qed_ooo_add_new_buffer(p_hwfn, 729 p_hwfn->p_ooo_info, 730 cid, 731 iscsi_ooo->ooo_isle, 732 p_buffer, 733 QED_OOO_RIGHT_BUF); 734 break; 735 case TCP_EVENT_ADD_ISLE_LEFT: 736 qed_ooo_add_new_buffer(p_hwfn, 737 p_hwfn->p_ooo_info, 738 cid, 739 iscsi_ooo->ooo_isle, 740 p_buffer, 741 QED_OOO_LEFT_BUF); 742 break; 743 case TCP_EVENT_JOIN: 744 qed_ooo_add_new_buffer(p_hwfn, 745 p_hwfn->p_ooo_info, 746 cid, 747 iscsi_ooo->ooo_isle + 748 1, 749 p_buffer, 750 QED_OOO_LEFT_BUF); 751 qed_ooo_join_isles(p_hwfn, 752 p_hwfn->p_ooo_info, 753 cid, iscsi_ooo->ooo_isle); 754 break; 755 case TCP_EVENT_ADD_PEN: 756 num_ooo_add_to_peninsula++; 757 qed_ooo_put_ready_buffer(p_hwfn, 758 p_hwfn->p_ooo_info, 759 p_buffer, true); 760 break; 761 } 762 } else { 763 DP_NOTICE(p_hwfn, 764 "Unexpected event (%d) TX OOO completion\n", 765 iscsi_ooo->ooo_opcode); 766 } 767 } 768 769 return 0; 770 } 771 772 static void 773 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn, 774 struct qed_ll2_info *p_ll2_conn) 775 { 776 struct qed_ll2_tx_pkt_info tx_pkt; 777 struct qed_ooo_buffer *p_buffer; 778 u16 l4_hdr_offset_w; 779 dma_addr_t first_frag; 780 u8 bd_flags; 781 int rc; 782 783 /* Submit Tx buffers here */ 784 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn, 785 p_hwfn->p_ooo_info))) { 786 l4_hdr_offset_w = 0; 787 bd_flags = 0; 788 789 first_frag = p_buffer->rx_buffer_phys_addr + 790 p_buffer->placement_offset; 791 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1); 792 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1); 793 794 memset(&tx_pkt, 0, sizeof(tx_pkt)); 795 tx_pkt.num_of_bds = 1; 796 tx_pkt.vlan = p_buffer->vlan; 797 tx_pkt.bd_flags = bd_flags; 798 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w; 799 tx_pkt.tx_dest = p_ll2_conn->tx_dest; 800 tx_pkt.first_frag = first_frag; 801 tx_pkt.first_frag_len = p_buffer->packet_length; 802 tx_pkt.cookie = p_buffer; 803 804 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id, 805 &tx_pkt, true); 806 if (rc) { 807 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info, 808 p_buffer, false); 809 break; 810 } 811 } 812 } 813 814 static void 815 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn, 816 struct qed_ll2_info *p_ll2_conn) 817 { 818 struct qed_ooo_buffer *p_buffer; 819 int rc; 820 821 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 822 p_hwfn->p_ooo_info))) { 823 rc = qed_ll2_post_rx_buffer(p_hwfn, 824 p_ll2_conn->my_id, 825 p_buffer->rx_buffer_phys_addr, 826 0, p_buffer, true); 827 if (rc) { 828 qed_ooo_put_free_buffer(p_hwfn, 829 p_hwfn->p_ooo_info, p_buffer); 830 break; 831 } 832 } 833 } 834 835 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 836 { 837 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 838 int rc; 839 840 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) 841 return 0; 842 843 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn); 844 if (rc) 845 return rc; 846 847 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 848 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 849 850 return 0; 851 } 852 853 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 854 { 855 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 856 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 857 struct qed_ll2_tx_packet *p_pkt = NULL; 858 struct qed_ooo_buffer *p_buffer; 859 bool b_dont_submit_rx = false; 860 u16 new_idx = 0, num_bds = 0; 861 int rc; 862 863 if (!QED_LL2_TX_REGISTERED(p_ll2_conn)) 864 return 0; 865 866 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 867 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 868 869 if (!num_bds) 870 return 0; 871 872 while (num_bds) { 873 if (list_empty(&p_tx->active_descq)) 874 return -EINVAL; 875 876 p_pkt = list_first_entry(&p_tx->active_descq, 877 struct qed_ll2_tx_packet, list_entry); 878 if (!p_pkt) 879 return -EINVAL; 880 881 if (p_pkt->bd_used != 1) { 882 DP_NOTICE(p_hwfn, 883 "Unexpectedly many BDs(%d) in TX OOO completion\n", 884 p_pkt->bd_used); 885 return -EINVAL; 886 } 887 888 list_del(&p_pkt->list_entry); 889 890 num_bds--; 891 p_tx->bds_idx++; 892 qed_chain_consume(&p_tx->txq_chain); 893 894 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 895 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 896 897 if (b_dont_submit_rx) { 898 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 899 p_buffer); 900 continue; 901 } 902 903 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id, 904 p_buffer->rx_buffer_phys_addr, 0, 905 p_buffer, true); 906 if (rc != 0) { 907 qed_ooo_put_free_buffer(p_hwfn, 908 p_hwfn->p_ooo_info, p_buffer); 909 b_dont_submit_rx = true; 910 } 911 } 912 913 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 914 915 return 0; 916 } 917 918 static void qed_ll2_stop_ooo(struct qed_dev *cdev) 919 { 920 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 921 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 922 923 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n", 924 *handle); 925 926 qed_ll2_terminate_connection(hwfn, *handle); 927 qed_ll2_release_connection(hwfn, *handle); 928 *handle = QED_LL2_UNUSED_HANDLE; 929 } 930 931 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn, 932 struct qed_ll2_info *p_ll2_conn, 933 u8 action_on_error) 934 { 935 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 936 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 937 struct core_rx_start_ramrod_data *p_ramrod = NULL; 938 struct qed_spq_entry *p_ent = NULL; 939 struct qed_sp_init_data init_data; 940 u16 cqe_pbl_size; 941 int rc = 0; 942 943 /* Get SPQ entry */ 944 memset(&init_data, 0, sizeof(init_data)); 945 init_data.cid = p_ll2_conn->cid; 946 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 947 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 948 949 rc = qed_sp_init_request(p_hwfn, &p_ent, 950 CORE_RAMROD_RX_QUEUE_START, 951 PROTOCOLID_CORE, &init_data); 952 if (rc) 953 return rc; 954 955 p_ramrod = &p_ent->ramrod.core_rx_queue_start; 956 957 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 958 p_ramrod->sb_index = p_rx->rx_sb_index; 959 p_ramrod->complete_event_flg = 1; 960 961 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 962 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr); 963 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain); 964 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size); 965 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, 966 qed_chain_get_pbl_phys(&p_rx->rcq_chain)); 967 968 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg; 969 p_ramrod->inner_vlan_stripping_en = 970 p_ll2_conn->input.rx_vlan_removal_en; 971 972 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && 973 p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) 974 p_ramrod->report_outer_vlan = 1; 975 p_ramrod->queue_id = p_ll2_conn->queue_id; 976 p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0; 977 978 if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) && 979 p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE && 980 conn_type != QED_LL2_TYPE_IWARP) { 981 p_ramrod->mf_si_bcast_accept_all = 1; 982 p_ramrod->mf_si_mcast_accept_all = 1; 983 } else { 984 p_ramrod->mf_si_bcast_accept_all = 0; 985 p_ramrod->mf_si_mcast_accept_all = 0; 986 } 987 988 p_ramrod->action_on_error.error_type = action_on_error; 989 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 990 return qed_spq_post(p_hwfn, p_ent, NULL); 991 } 992 993 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn, 994 struct qed_ll2_info *p_ll2_conn) 995 { 996 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 997 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 998 struct core_tx_start_ramrod_data *p_ramrod = NULL; 999 struct qed_spq_entry *p_ent = NULL; 1000 struct qed_sp_init_data init_data; 1001 u16 pq_id = 0, pbl_size; 1002 int rc = -EINVAL; 1003 1004 if (!QED_LL2_TX_REGISTERED(p_ll2_conn)) 1005 return 0; 1006 1007 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 1008 p_ll2_conn->tx_stats_en = 0; 1009 else 1010 p_ll2_conn->tx_stats_en = 1; 1011 1012 /* Get SPQ entry */ 1013 memset(&init_data, 0, sizeof(init_data)); 1014 init_data.cid = p_ll2_conn->cid; 1015 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1016 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1017 1018 rc = qed_sp_init_request(p_hwfn, &p_ent, 1019 CORE_RAMROD_TX_QUEUE_START, 1020 PROTOCOLID_CORE, &init_data); 1021 if (rc) 1022 return rc; 1023 1024 p_ramrod = &p_ent->ramrod.core_tx_queue_start; 1025 1026 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 1027 p_ramrod->sb_index = p_tx->tx_sb_index; 1028 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 1029 p_ramrod->stats_en = p_ll2_conn->tx_stats_en; 1030 p_ramrod->stats_id = p_ll2_conn->tx_stats_id; 1031 1032 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, 1033 qed_chain_get_pbl_phys(&p_tx->txq_chain)); 1034 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain); 1035 p_ramrod->pbl_size = cpu_to_le16(pbl_size); 1036 1037 switch (p_ll2_conn->input.tx_tc) { 1038 case PURE_LB_TC: 1039 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB); 1040 break; 1041 case PKT_LB_TC: 1042 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO); 1043 break; 1044 default: 1045 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD); 1046 break; 1047 } 1048 1049 p_ramrod->qm_pq_id = cpu_to_le16(pq_id); 1050 1051 switch (conn_type) { 1052 case QED_LL2_TYPE_FCOE: 1053 p_ramrod->conn_type = PROTOCOLID_FCOE; 1054 break; 1055 case QED_LL2_TYPE_ISCSI: 1056 p_ramrod->conn_type = PROTOCOLID_ISCSI; 1057 break; 1058 case QED_LL2_TYPE_ROCE: 1059 p_ramrod->conn_type = PROTOCOLID_ROCE; 1060 break; 1061 case QED_LL2_TYPE_IWARP: 1062 p_ramrod->conn_type = PROTOCOLID_IWARP; 1063 break; 1064 case QED_LL2_TYPE_OOO: 1065 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) 1066 p_ramrod->conn_type = PROTOCOLID_ISCSI; 1067 else 1068 p_ramrod->conn_type = PROTOCOLID_IWARP; 1069 break; 1070 default: 1071 p_ramrod->conn_type = PROTOCOLID_ETH; 1072 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type); 1073 } 1074 1075 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 1076 1077 return qed_spq_post(p_hwfn, p_ent, NULL); 1078 } 1079 1080 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn, 1081 struct qed_ll2_info *p_ll2_conn) 1082 { 1083 struct core_rx_stop_ramrod_data *p_ramrod = NULL; 1084 struct qed_spq_entry *p_ent = NULL; 1085 struct qed_sp_init_data init_data; 1086 int rc = -EINVAL; 1087 1088 /* Get SPQ entry */ 1089 memset(&init_data, 0, sizeof(init_data)); 1090 init_data.cid = p_ll2_conn->cid; 1091 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1092 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1093 1094 rc = qed_sp_init_request(p_hwfn, &p_ent, 1095 CORE_RAMROD_RX_QUEUE_STOP, 1096 PROTOCOLID_CORE, &init_data); 1097 if (rc) 1098 return rc; 1099 1100 p_ramrod = &p_ent->ramrod.core_rx_queue_stop; 1101 1102 p_ramrod->complete_event_flg = 1; 1103 p_ramrod->queue_id = p_ll2_conn->queue_id; 1104 1105 return qed_spq_post(p_hwfn, p_ent, NULL); 1106 } 1107 1108 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn, 1109 struct qed_ll2_info *p_ll2_conn) 1110 { 1111 struct qed_spq_entry *p_ent = NULL; 1112 struct qed_sp_init_data init_data; 1113 int rc = -EINVAL; 1114 1115 /* Get SPQ entry */ 1116 memset(&init_data, 0, sizeof(init_data)); 1117 init_data.cid = p_ll2_conn->cid; 1118 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1119 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1120 1121 rc = qed_sp_init_request(p_hwfn, &p_ent, 1122 CORE_RAMROD_TX_QUEUE_STOP, 1123 PROTOCOLID_CORE, &init_data); 1124 if (rc) 1125 return rc; 1126 1127 return qed_spq_post(p_hwfn, p_ent, NULL); 1128 } 1129 1130 static int 1131 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn, 1132 struct qed_ll2_info *p_ll2_info) 1133 { 1134 struct qed_ll2_rx_packet *p_descq; 1135 u32 capacity; 1136 int rc = 0; 1137 1138 if (!p_ll2_info->input.rx_num_desc) 1139 goto out; 1140 1141 rc = qed_chain_alloc(p_hwfn->cdev, 1142 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1143 QED_CHAIN_MODE_NEXT_PTR, 1144 QED_CHAIN_CNT_TYPE_U16, 1145 p_ll2_info->input.rx_num_desc, 1146 sizeof(struct core_rx_bd), 1147 &p_ll2_info->rx_queue.rxq_chain, NULL); 1148 if (rc) { 1149 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n"); 1150 goto out; 1151 } 1152 1153 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain); 1154 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet), 1155 GFP_KERNEL); 1156 if (!p_descq) { 1157 rc = -ENOMEM; 1158 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n"); 1159 goto out; 1160 } 1161 p_ll2_info->rx_queue.descq_array = p_descq; 1162 1163 rc = qed_chain_alloc(p_hwfn->cdev, 1164 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1165 QED_CHAIN_MODE_PBL, 1166 QED_CHAIN_CNT_TYPE_U16, 1167 p_ll2_info->input.rx_num_desc, 1168 sizeof(struct core_rx_fast_path_cqe), 1169 &p_ll2_info->rx_queue.rcq_chain, NULL); 1170 if (rc) { 1171 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n"); 1172 goto out; 1173 } 1174 1175 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1176 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n", 1177 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc); 1178 1179 out: 1180 return rc; 1181 } 1182 1183 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn, 1184 struct qed_ll2_info *p_ll2_info) 1185 { 1186 struct qed_ll2_tx_packet *p_descq; 1187 u32 desc_size; 1188 u32 capacity; 1189 int rc = 0; 1190 1191 if (!p_ll2_info->input.tx_num_desc) 1192 goto out; 1193 1194 rc = qed_chain_alloc(p_hwfn->cdev, 1195 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1196 QED_CHAIN_MODE_PBL, 1197 QED_CHAIN_CNT_TYPE_U16, 1198 p_ll2_info->input.tx_num_desc, 1199 sizeof(struct core_tx_bd), 1200 &p_ll2_info->tx_queue.txq_chain, NULL); 1201 if (rc) 1202 goto out; 1203 1204 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain); 1205 /* First element is part of the packet, rest are flexibly added */ 1206 desc_size = (sizeof(*p_descq) + 1207 (p_ll2_info->input.tx_max_bds_per_packet - 1) * 1208 sizeof(p_descq->bds_set)); 1209 1210 p_descq = kcalloc(capacity, desc_size, GFP_KERNEL); 1211 if (!p_descq) { 1212 rc = -ENOMEM; 1213 goto out; 1214 } 1215 p_ll2_info->tx_queue.descq_mem = p_descq; 1216 1217 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1218 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n", 1219 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc); 1220 1221 out: 1222 if (rc) 1223 DP_NOTICE(p_hwfn, 1224 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n", 1225 p_ll2_info->input.tx_num_desc); 1226 return rc; 1227 } 1228 1229 static int 1230 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn, 1231 struct qed_ll2_info *p_ll2_info, u16 mtu) 1232 { 1233 struct qed_ooo_buffer *p_buf = NULL; 1234 void *p_virt; 1235 u16 buf_idx; 1236 int rc = 0; 1237 1238 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO) 1239 return rc; 1240 1241 /* Correct number of requested OOO buffers if needed */ 1242 if (!p_ll2_info->input.rx_num_ooo_buffers) { 1243 u16 num_desc = p_ll2_info->input.rx_num_desc; 1244 1245 if (!num_desc) 1246 return -EINVAL; 1247 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2; 1248 } 1249 1250 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers; 1251 buf_idx++) { 1252 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL); 1253 if (!p_buf) { 1254 rc = -ENOMEM; 1255 goto out; 1256 } 1257 1258 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE; 1259 p_buf->rx_buffer_size = (p_buf->rx_buffer_size + 1260 ETH_CACHE_LINE_SIZE - 1) & 1261 ~(ETH_CACHE_LINE_SIZE - 1); 1262 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 1263 p_buf->rx_buffer_size, 1264 &p_buf->rx_buffer_phys_addr, 1265 GFP_KERNEL); 1266 if (!p_virt) { 1267 kfree(p_buf); 1268 rc = -ENOMEM; 1269 goto out; 1270 } 1271 1272 p_buf->rx_buffer_virt_addr = p_virt; 1273 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf); 1274 } 1275 1276 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1277 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n", 1278 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size); 1279 1280 out: 1281 return rc; 1282 } 1283 1284 static int 1285 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs) 1286 { 1287 if (!cbs || (!cbs->rx_comp_cb || 1288 !cbs->rx_release_cb || 1289 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie)) 1290 return -EINVAL; 1291 1292 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb; 1293 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb; 1294 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb; 1295 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb; 1296 p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb; 1297 p_ll2_info->cbs.cookie = cbs->cookie; 1298 1299 return 0; 1300 } 1301 1302 static enum core_error_handle 1303 qed_ll2_get_error_choice(enum qed_ll2_error_handle err) 1304 { 1305 switch (err) { 1306 case QED_LL2_DROP_PACKET: 1307 return LL2_DROP_PACKET; 1308 case QED_LL2_DO_NOTHING: 1309 return LL2_DO_NOTHING; 1310 case QED_LL2_ASSERT: 1311 return LL2_ASSERT; 1312 default: 1313 return LL2_DO_NOTHING; 1314 } 1315 } 1316 1317 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data) 1318 { 1319 struct qed_hwfn *p_hwfn = cxt; 1320 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb; 1321 struct qed_ll2_info *p_ll2_info = NULL; 1322 u8 i, *p_tx_max; 1323 int rc; 1324 1325 if (!data->p_connection_handle || !p_hwfn->p_ll2_info) 1326 return -EINVAL; 1327 1328 /* Find a free connection to be used */ 1329 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) { 1330 mutex_lock(&p_hwfn->p_ll2_info[i].mutex); 1331 if (p_hwfn->p_ll2_info[i].b_active) { 1332 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1333 continue; 1334 } 1335 1336 p_hwfn->p_ll2_info[i].b_active = true; 1337 p_ll2_info = &p_hwfn->p_ll2_info[i]; 1338 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1339 break; 1340 } 1341 if (!p_ll2_info) 1342 return -EBUSY; 1343 1344 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input)); 1345 1346 switch (data->input.tx_dest) { 1347 case QED_LL2_TX_DEST_NW: 1348 p_ll2_info->tx_dest = CORE_TX_DEST_NW; 1349 break; 1350 case QED_LL2_TX_DEST_LB: 1351 p_ll2_info->tx_dest = CORE_TX_DEST_LB; 1352 break; 1353 case QED_LL2_TX_DEST_DROP: 1354 p_ll2_info->tx_dest = CORE_TX_DEST_DROP; 1355 break; 1356 default: 1357 return -EINVAL; 1358 } 1359 1360 if (data->input.conn_type == QED_LL2_TYPE_OOO || 1361 data->input.secondary_queue) 1362 p_ll2_info->main_func_queue = false; 1363 else 1364 p_ll2_info->main_func_queue = true; 1365 1366 /* Correct maximum number of Tx BDs */ 1367 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet; 1368 if (*p_tx_max == 0) 1369 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET; 1370 else 1371 *p_tx_max = min_t(u8, *p_tx_max, 1372 CORE_LL2_TX_MAX_BDS_PER_PACKET); 1373 1374 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs); 1375 if (rc) { 1376 DP_NOTICE(p_hwfn, "Invalid callback functions\n"); 1377 goto q_allocate_fail; 1378 } 1379 1380 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info); 1381 if (rc) 1382 goto q_allocate_fail; 1383 1384 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info); 1385 if (rc) 1386 goto q_allocate_fail; 1387 1388 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info, 1389 data->input.mtu); 1390 if (rc) 1391 goto q_allocate_fail; 1392 1393 /* Register callbacks for the Rx/Tx queues */ 1394 if (data->input.conn_type == QED_LL2_TYPE_OOO) { 1395 comp_rx_cb = qed_ll2_lb_rxq_completion; 1396 comp_tx_cb = qed_ll2_lb_txq_completion; 1397 } else { 1398 comp_rx_cb = qed_ll2_rxq_completion; 1399 comp_tx_cb = qed_ll2_txq_completion; 1400 } 1401 1402 if (data->input.rx_num_desc) { 1403 qed_int_register_cb(p_hwfn, comp_rx_cb, 1404 &p_hwfn->p_ll2_info[i], 1405 &p_ll2_info->rx_queue.rx_sb_index, 1406 &p_ll2_info->rx_queue.p_fw_cons); 1407 p_ll2_info->rx_queue.b_cb_registred = true; 1408 } 1409 1410 if (data->input.tx_num_desc) { 1411 qed_int_register_cb(p_hwfn, 1412 comp_tx_cb, 1413 &p_hwfn->p_ll2_info[i], 1414 &p_ll2_info->tx_queue.tx_sb_index, 1415 &p_ll2_info->tx_queue.p_fw_cons); 1416 p_ll2_info->tx_queue.b_cb_registred = true; 1417 } 1418 1419 *data->p_connection_handle = i; 1420 return rc; 1421 1422 q_allocate_fail: 1423 qed_ll2_release_connection(p_hwfn, i); 1424 return -ENOMEM; 1425 } 1426 1427 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn, 1428 struct qed_ll2_info *p_ll2_conn) 1429 { 1430 enum qed_ll2_error_handle error_input; 1431 enum core_error_handle error_mode; 1432 u8 action_on_error = 0; 1433 1434 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) 1435 return 0; 1436 1437 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0); 1438 error_input = p_ll2_conn->input.ai_err_packet_too_big; 1439 error_mode = qed_ll2_get_error_choice(error_input); 1440 SET_FIELD(action_on_error, 1441 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode); 1442 error_input = p_ll2_conn->input.ai_err_no_buf; 1443 error_mode = qed_ll2_get_error_choice(error_input); 1444 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode); 1445 1446 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error); 1447 } 1448 1449 static void 1450 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn, 1451 struct qed_ll2_info *p_ll2_conn) 1452 { 1453 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1454 return; 1455 1456 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1457 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 1458 } 1459 1460 int qed_ll2_establish_connection(void *cxt, u8 connection_handle) 1461 { 1462 struct qed_hwfn *p_hwfn = cxt; 1463 struct qed_ll2_info *p_ll2_conn; 1464 struct qed_ll2_tx_packet *p_pkt; 1465 struct qed_ll2_rx_queue *p_rx; 1466 struct qed_ll2_tx_queue *p_tx; 1467 struct qed_ptt *p_ptt; 1468 int rc = -EINVAL; 1469 u32 i, capacity; 1470 u32 desc_size; 1471 u8 qid; 1472 1473 p_ptt = qed_ptt_acquire(p_hwfn); 1474 if (!p_ptt) 1475 return -EAGAIN; 1476 1477 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1478 if (!p_ll2_conn) { 1479 rc = -EINVAL; 1480 goto out; 1481 } 1482 1483 p_rx = &p_ll2_conn->rx_queue; 1484 p_tx = &p_ll2_conn->tx_queue; 1485 1486 qed_chain_reset(&p_rx->rxq_chain); 1487 qed_chain_reset(&p_rx->rcq_chain); 1488 INIT_LIST_HEAD(&p_rx->active_descq); 1489 INIT_LIST_HEAD(&p_rx->free_descq); 1490 INIT_LIST_HEAD(&p_rx->posting_descq); 1491 spin_lock_init(&p_rx->lock); 1492 capacity = qed_chain_get_capacity(&p_rx->rxq_chain); 1493 for (i = 0; i < capacity; i++) 1494 list_add_tail(&p_rx->descq_array[i].list_entry, 1495 &p_rx->free_descq); 1496 *p_rx->p_fw_cons = 0; 1497 1498 qed_chain_reset(&p_tx->txq_chain); 1499 INIT_LIST_HEAD(&p_tx->active_descq); 1500 INIT_LIST_HEAD(&p_tx->free_descq); 1501 INIT_LIST_HEAD(&p_tx->sending_descq); 1502 spin_lock_init(&p_tx->lock); 1503 capacity = qed_chain_get_capacity(&p_tx->txq_chain); 1504 /* First element is part of the packet, rest are flexibly added */ 1505 desc_size = (sizeof(*p_pkt) + 1506 (p_ll2_conn->input.tx_max_bds_per_packet - 1) * 1507 sizeof(p_pkt->bds_set)); 1508 1509 for (i = 0; i < capacity; i++) { 1510 p_pkt = p_tx->descq_mem + desc_size * i; 1511 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 1512 } 1513 p_tx->cur_completing_bd_idx = 0; 1514 p_tx->bds_idx = 0; 1515 p_tx->b_completing_packet = false; 1516 p_tx->cur_send_packet = NULL; 1517 p_tx->cur_send_frag_num = 0; 1518 p_tx->cur_completing_frag_num = 0; 1519 *p_tx->p_fw_cons = 0; 1520 1521 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid); 1522 if (rc) 1523 goto out; 1524 1525 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle; 1526 p_ll2_conn->queue_id = qid; 1527 p_ll2_conn->tx_stats_id = qid; 1528 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview + 1529 GTT_BAR0_MAP_REG_TSDM_RAM + 1530 TSTORM_LL2_RX_PRODS_OFFSET(qid); 1531 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells + 1532 qed_db_addr(p_ll2_conn->cid, 1533 DQ_DEMS_LEGACY); 1534 1535 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn); 1536 if (rc) 1537 goto out; 1538 1539 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn); 1540 if (rc) 1541 goto out; 1542 1543 if (!QED_IS_RDMA_PERSONALITY(p_hwfn)) 1544 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1); 1545 1546 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn); 1547 1548 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1549 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) 1550 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1551 ETH_P_FCOE, 0, 1552 QED_LLH_FILTER_ETHERTYPE); 1553 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1554 ETH_P_FIP, 0, 1555 QED_LLH_FILTER_ETHERTYPE); 1556 } 1557 1558 out: 1559 qed_ptt_release(p_hwfn, p_ptt); 1560 return rc; 1561 } 1562 1563 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn, 1564 struct qed_ll2_rx_queue *p_rx, 1565 struct qed_ll2_rx_packet *p_curp) 1566 { 1567 struct qed_ll2_rx_packet *p_posting_packet = NULL; 1568 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 }; 1569 bool b_notify_fw = false; 1570 u16 bd_prod, cq_prod; 1571 1572 /* This handles the flushing of already posted buffers */ 1573 while (!list_empty(&p_rx->posting_descq)) { 1574 p_posting_packet = list_first_entry(&p_rx->posting_descq, 1575 struct qed_ll2_rx_packet, 1576 list_entry); 1577 list_move_tail(&p_posting_packet->list_entry, 1578 &p_rx->active_descq); 1579 b_notify_fw = true; 1580 } 1581 1582 /* This handles the supplied packet [if there is one] */ 1583 if (p_curp) { 1584 list_add_tail(&p_curp->list_entry, &p_rx->active_descq); 1585 b_notify_fw = true; 1586 } 1587 1588 if (!b_notify_fw) 1589 return; 1590 1591 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain); 1592 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain); 1593 rx_prod.bd_prod = cpu_to_le16(bd_prod); 1594 rx_prod.cqe_prod = cpu_to_le16(cq_prod); 1595 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod)); 1596 } 1597 1598 int qed_ll2_post_rx_buffer(void *cxt, 1599 u8 connection_handle, 1600 dma_addr_t addr, 1601 u16 buf_len, void *cookie, u8 notify_fw) 1602 { 1603 struct qed_hwfn *p_hwfn = cxt; 1604 struct core_rx_bd_with_buff_len *p_curb = NULL; 1605 struct qed_ll2_rx_packet *p_curp = NULL; 1606 struct qed_ll2_info *p_ll2_conn; 1607 struct qed_ll2_rx_queue *p_rx; 1608 unsigned long flags; 1609 void *p_data; 1610 int rc = 0; 1611 1612 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1613 if (!p_ll2_conn) 1614 return -EINVAL; 1615 p_rx = &p_ll2_conn->rx_queue; 1616 1617 spin_lock_irqsave(&p_rx->lock, flags); 1618 if (!list_empty(&p_rx->free_descq)) 1619 p_curp = list_first_entry(&p_rx->free_descq, 1620 struct qed_ll2_rx_packet, list_entry); 1621 if (p_curp) { 1622 if (qed_chain_get_elem_left(&p_rx->rxq_chain) && 1623 qed_chain_get_elem_left(&p_rx->rcq_chain)) { 1624 p_data = qed_chain_produce(&p_rx->rxq_chain); 1625 p_curb = (struct core_rx_bd_with_buff_len *)p_data; 1626 qed_chain_produce(&p_rx->rcq_chain); 1627 } 1628 } 1629 1630 /* If we're lacking entires, let's try to flush buffers to FW */ 1631 if (!p_curp || !p_curb) { 1632 rc = -EBUSY; 1633 p_curp = NULL; 1634 goto out_notify; 1635 } 1636 1637 /* We have an Rx packet we can fill */ 1638 DMA_REGPAIR_LE(p_curb->addr, addr); 1639 p_curb->buff_length = cpu_to_le16(buf_len); 1640 p_curp->rx_buf_addr = addr; 1641 p_curp->cookie = cookie; 1642 p_curp->rxq_bd = p_curb; 1643 p_curp->buf_length = buf_len; 1644 list_del(&p_curp->list_entry); 1645 1646 /* Check if we only want to enqueue this packet without informing FW */ 1647 if (!notify_fw) { 1648 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq); 1649 goto out; 1650 } 1651 1652 out_notify: 1653 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp); 1654 out: 1655 spin_unlock_irqrestore(&p_rx->lock, flags); 1656 return rc; 1657 } 1658 1659 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn, 1660 struct qed_ll2_tx_queue *p_tx, 1661 struct qed_ll2_tx_packet *p_curp, 1662 struct qed_ll2_tx_pkt_info *pkt, 1663 u8 notify_fw) 1664 { 1665 list_del(&p_curp->list_entry); 1666 p_curp->cookie = pkt->cookie; 1667 p_curp->bd_used = pkt->num_of_bds; 1668 p_curp->notify_fw = notify_fw; 1669 p_tx->cur_send_packet = p_curp; 1670 p_tx->cur_send_frag_num = 0; 1671 1672 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag; 1673 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len; 1674 p_tx->cur_send_frag_num++; 1675 } 1676 1677 static void 1678 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn, 1679 struct qed_ll2_info *p_ll2, 1680 struct qed_ll2_tx_packet *p_curp, 1681 struct qed_ll2_tx_pkt_info *pkt) 1682 { 1683 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain; 1684 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain); 1685 struct core_tx_bd *start_bd = NULL; 1686 enum core_roce_flavor_type roce_flavor; 1687 enum core_tx_dest tx_dest; 1688 u16 bd_data = 0, frag_idx; 1689 1690 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE 1691 : CORE_RROCE; 1692 1693 switch (pkt->tx_dest) { 1694 case QED_LL2_TX_DEST_NW: 1695 tx_dest = CORE_TX_DEST_NW; 1696 break; 1697 case QED_LL2_TX_DEST_LB: 1698 tx_dest = CORE_TX_DEST_LB; 1699 break; 1700 case QED_LL2_TX_DEST_DROP: 1701 tx_dest = CORE_TX_DEST_DROP; 1702 break; 1703 default: 1704 tx_dest = CORE_TX_DEST_LB; 1705 break; 1706 } 1707 1708 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1709 if (QED_IS_IWARP_PERSONALITY(p_hwfn) && 1710 p_ll2->input.conn_type == QED_LL2_TYPE_OOO) { 1711 start_bd->nw_vlan_or_lb_echo = 1712 cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE); 1713 } else { 1714 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan); 1715 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && 1716 p_ll2->input.conn_type == QED_LL2_TYPE_FCOE) 1717 pkt->remove_stag = true; 1718 } 1719 1720 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, 1721 cpu_to_le16(pkt->l4_hdr_offset_w)); 1722 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest); 1723 bd_data |= pkt->bd_flags; 1724 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1); 1725 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds); 1726 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor); 1727 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum)); 1728 SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum)); 1729 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len)); 1730 SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION, 1731 !!(pkt->remove_stag)); 1732 1733 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data); 1734 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag); 1735 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len); 1736 1737 DP_VERBOSE(p_hwfn, 1738 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1739 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n", 1740 p_ll2->queue_id, 1741 p_ll2->cid, 1742 p_ll2->input.conn_type, 1743 prod_idx, 1744 pkt->first_frag_len, 1745 pkt->num_of_bds, 1746 le32_to_cpu(start_bd->addr.hi), 1747 le32_to_cpu(start_bd->addr.lo)); 1748 1749 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds) 1750 return; 1751 1752 /* Need to provide the packet with additional BDs for frags */ 1753 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num; 1754 frag_idx < pkt->num_of_bds; frag_idx++) { 1755 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd; 1756 1757 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1758 (*p_bd)->bd_data.as_bitfield = 0; 1759 (*p_bd)->bitfield1 = 0; 1760 p_curp->bds_set[frag_idx].tx_frag = 0; 1761 p_curp->bds_set[frag_idx].frag_len = 0; 1762 } 1763 } 1764 1765 /* This should be called while the Txq spinlock is being held */ 1766 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn, 1767 struct qed_ll2_info *p_ll2_conn) 1768 { 1769 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw; 1770 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 1771 struct qed_ll2_tx_packet *p_pkt = NULL; 1772 struct core_db_data db_msg = { 0, 0, 0 }; 1773 u16 bd_prod; 1774 1775 /* If there are missing BDs, don't do anything now */ 1776 if (p_ll2_conn->tx_queue.cur_send_frag_num != 1777 p_ll2_conn->tx_queue.cur_send_packet->bd_used) 1778 return; 1779 1780 /* Push the current packet to the list and clean after it */ 1781 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry, 1782 &p_ll2_conn->tx_queue.sending_descq); 1783 p_ll2_conn->tx_queue.cur_send_packet = NULL; 1784 p_ll2_conn->tx_queue.cur_send_frag_num = 0; 1785 1786 /* Notify FW of packet only if requested to */ 1787 if (!b_notify) 1788 return; 1789 1790 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain); 1791 1792 while (!list_empty(&p_tx->sending_descq)) { 1793 p_pkt = list_first_entry(&p_tx->sending_descq, 1794 struct qed_ll2_tx_packet, list_entry); 1795 if (!p_pkt) 1796 break; 1797 1798 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq); 1799 } 1800 1801 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM); 1802 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 1803 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL, 1804 DQ_XCM_CORE_TX_BD_PROD_CMD); 1805 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD; 1806 db_msg.spq_prod = cpu_to_le16(bd_prod); 1807 1808 /* Make sure the BDs data is updated before ringing the doorbell */ 1809 wmb(); 1810 1811 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg)); 1812 1813 DP_VERBOSE(p_hwfn, 1814 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1815 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n", 1816 p_ll2_conn->queue_id, 1817 p_ll2_conn->cid, 1818 p_ll2_conn->input.conn_type, db_msg.spq_prod); 1819 } 1820 1821 int qed_ll2_prepare_tx_packet(void *cxt, 1822 u8 connection_handle, 1823 struct qed_ll2_tx_pkt_info *pkt, 1824 bool notify_fw) 1825 { 1826 struct qed_hwfn *p_hwfn = cxt; 1827 struct qed_ll2_tx_packet *p_curp = NULL; 1828 struct qed_ll2_info *p_ll2_conn = NULL; 1829 struct qed_ll2_tx_queue *p_tx; 1830 struct qed_chain *p_tx_chain; 1831 unsigned long flags; 1832 int rc = 0; 1833 1834 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1835 if (!p_ll2_conn) 1836 return -EINVAL; 1837 p_tx = &p_ll2_conn->tx_queue; 1838 p_tx_chain = &p_tx->txq_chain; 1839 1840 if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet) 1841 return -EIO; 1842 1843 spin_lock_irqsave(&p_tx->lock, flags); 1844 if (p_tx->cur_send_packet) { 1845 rc = -EEXIST; 1846 goto out; 1847 } 1848 1849 /* Get entry, but only if we have tx elements for it */ 1850 if (!list_empty(&p_tx->free_descq)) 1851 p_curp = list_first_entry(&p_tx->free_descq, 1852 struct qed_ll2_tx_packet, list_entry); 1853 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds) 1854 p_curp = NULL; 1855 1856 if (!p_curp) { 1857 rc = -EBUSY; 1858 goto out; 1859 } 1860 1861 /* Prepare packet and BD, and perhaps send a doorbell to FW */ 1862 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw); 1863 1864 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt); 1865 1866 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1867 1868 out: 1869 spin_unlock_irqrestore(&p_tx->lock, flags); 1870 return rc; 1871 } 1872 1873 int qed_ll2_set_fragment_of_tx_packet(void *cxt, 1874 u8 connection_handle, 1875 dma_addr_t addr, u16 nbytes) 1876 { 1877 struct qed_ll2_tx_packet *p_cur_send_packet = NULL; 1878 struct qed_hwfn *p_hwfn = cxt; 1879 struct qed_ll2_info *p_ll2_conn = NULL; 1880 u16 cur_send_frag_num = 0; 1881 struct core_tx_bd *p_bd; 1882 unsigned long flags; 1883 1884 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1885 if (!p_ll2_conn) 1886 return -EINVAL; 1887 1888 if (!p_ll2_conn->tx_queue.cur_send_packet) 1889 return -EINVAL; 1890 1891 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet; 1892 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num; 1893 1894 if (cur_send_frag_num >= p_cur_send_packet->bd_used) 1895 return -EINVAL; 1896 1897 /* Fill the BD information, and possibly notify FW */ 1898 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd; 1899 DMA_REGPAIR_LE(p_bd->addr, addr); 1900 p_bd->nbytes = cpu_to_le16(nbytes); 1901 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr; 1902 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes; 1903 1904 p_ll2_conn->tx_queue.cur_send_frag_num++; 1905 1906 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags); 1907 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1908 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags); 1909 1910 return 0; 1911 } 1912 1913 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle) 1914 { 1915 struct qed_hwfn *p_hwfn = cxt; 1916 struct qed_ll2_info *p_ll2_conn = NULL; 1917 int rc = -EINVAL; 1918 struct qed_ptt *p_ptt; 1919 1920 p_ptt = qed_ptt_acquire(p_hwfn); 1921 if (!p_ptt) 1922 return -EAGAIN; 1923 1924 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1925 if (!p_ll2_conn) { 1926 rc = -EINVAL; 1927 goto out; 1928 } 1929 1930 /* Stop Tx & Rx of connection, if needed */ 1931 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1932 p_ll2_conn->tx_queue.b_cb_registred = false; 1933 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */ 1934 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn); 1935 if (rc) 1936 goto out; 1937 1938 qed_ll2_txq_flush(p_hwfn, connection_handle); 1939 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index); 1940 } 1941 1942 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1943 p_ll2_conn->rx_queue.b_cb_registred = false; 1944 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */ 1945 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn); 1946 if (rc) 1947 goto out; 1948 1949 qed_ll2_rxq_flush(p_hwfn, connection_handle); 1950 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index); 1951 } 1952 1953 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 1954 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1955 1956 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1957 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) 1958 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1959 ETH_P_FCOE, 0, 1960 QED_LLH_FILTER_ETHERTYPE); 1961 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1962 ETH_P_FIP, 0, 1963 QED_LLH_FILTER_ETHERTYPE); 1964 } 1965 1966 out: 1967 qed_ptt_release(p_hwfn, p_ptt); 1968 return rc; 1969 } 1970 1971 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn, 1972 struct qed_ll2_info *p_ll2_conn) 1973 { 1974 struct qed_ooo_buffer *p_buffer; 1975 1976 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1977 return; 1978 1979 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1980 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 1981 p_hwfn->p_ooo_info))) { 1982 dma_free_coherent(&p_hwfn->cdev->pdev->dev, 1983 p_buffer->rx_buffer_size, 1984 p_buffer->rx_buffer_virt_addr, 1985 p_buffer->rx_buffer_phys_addr); 1986 kfree(p_buffer); 1987 } 1988 } 1989 1990 void qed_ll2_release_connection(void *cxt, u8 connection_handle) 1991 { 1992 struct qed_hwfn *p_hwfn = cxt; 1993 struct qed_ll2_info *p_ll2_conn = NULL; 1994 1995 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1996 if (!p_ll2_conn) 1997 return; 1998 1999 kfree(p_ll2_conn->tx_queue.descq_mem); 2000 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain); 2001 2002 kfree(p_ll2_conn->rx_queue.descq_array); 2003 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain); 2004 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain); 2005 2006 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid); 2007 2008 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn); 2009 2010 mutex_lock(&p_ll2_conn->mutex); 2011 p_ll2_conn->b_active = false; 2012 mutex_unlock(&p_ll2_conn->mutex); 2013 } 2014 2015 int qed_ll2_alloc(struct qed_hwfn *p_hwfn) 2016 { 2017 struct qed_ll2_info *p_ll2_connections; 2018 u8 i; 2019 2020 /* Allocate LL2's set struct */ 2021 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS, 2022 sizeof(struct qed_ll2_info), GFP_KERNEL); 2023 if (!p_ll2_connections) { 2024 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n"); 2025 return -ENOMEM; 2026 } 2027 2028 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 2029 p_ll2_connections[i].my_id = i; 2030 2031 p_hwfn->p_ll2_info = p_ll2_connections; 2032 return 0; 2033 } 2034 2035 void qed_ll2_setup(struct qed_hwfn *p_hwfn) 2036 { 2037 int i; 2038 2039 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 2040 mutex_init(&p_hwfn->p_ll2_info[i].mutex); 2041 } 2042 2043 void qed_ll2_free(struct qed_hwfn *p_hwfn) 2044 { 2045 if (!p_hwfn->p_ll2_info) 2046 return; 2047 2048 kfree(p_hwfn->p_ll2_info); 2049 p_hwfn->p_ll2_info = NULL; 2050 } 2051 2052 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn, 2053 struct qed_ptt *p_ptt, 2054 struct qed_ll2_stats *p_stats) 2055 { 2056 struct core_ll2_port_stats port_stats; 2057 2058 memset(&port_stats, 0, sizeof(port_stats)); 2059 qed_memcpy_from(p_hwfn, p_ptt, &port_stats, 2060 BAR0_MAP_REG_TSDM_RAM + 2061 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)), 2062 sizeof(port_stats)); 2063 2064 p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr); 2065 p_stats->gsi_invalid_pkt_length = 2066 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length); 2067 p_stats->gsi_unsupported_pkt_typ = 2068 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ); 2069 p_stats->gsi_crcchksm_error = 2070 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error); 2071 } 2072 2073 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn, 2074 struct qed_ptt *p_ptt, 2075 struct qed_ll2_info *p_ll2_conn, 2076 struct qed_ll2_stats *p_stats) 2077 { 2078 struct core_ll2_tstorm_per_queue_stat tstats; 2079 u8 qid = p_ll2_conn->queue_id; 2080 u32 tstats_addr; 2081 2082 memset(&tstats, 0, sizeof(tstats)); 2083 tstats_addr = BAR0_MAP_REG_TSDM_RAM + 2084 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid); 2085 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats)); 2086 2087 p_stats->packet_too_big_discard = 2088 HILO_64_REGPAIR(tstats.packet_too_big_discard); 2089 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard); 2090 } 2091 2092 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn, 2093 struct qed_ptt *p_ptt, 2094 struct qed_ll2_info *p_ll2_conn, 2095 struct qed_ll2_stats *p_stats) 2096 { 2097 struct core_ll2_ustorm_per_queue_stat ustats; 2098 u8 qid = p_ll2_conn->queue_id; 2099 u32 ustats_addr; 2100 2101 memset(&ustats, 0, sizeof(ustats)); 2102 ustats_addr = BAR0_MAP_REG_USDM_RAM + 2103 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid); 2104 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats)); 2105 2106 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes); 2107 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes); 2108 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes); 2109 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts); 2110 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts); 2111 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts); 2112 } 2113 2114 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn, 2115 struct qed_ptt *p_ptt, 2116 struct qed_ll2_info *p_ll2_conn, 2117 struct qed_ll2_stats *p_stats) 2118 { 2119 struct core_ll2_pstorm_per_queue_stat pstats; 2120 u8 stats_id = p_ll2_conn->tx_stats_id; 2121 u32 pstats_addr; 2122 2123 memset(&pstats, 0, sizeof(pstats)); 2124 pstats_addr = BAR0_MAP_REG_PSDM_RAM + 2125 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id); 2126 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats)); 2127 2128 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes); 2129 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes); 2130 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes); 2131 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts); 2132 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts); 2133 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts); 2134 } 2135 2136 int qed_ll2_get_stats(void *cxt, 2137 u8 connection_handle, struct qed_ll2_stats *p_stats) 2138 { 2139 struct qed_hwfn *p_hwfn = cxt; 2140 struct qed_ll2_info *p_ll2_conn = NULL; 2141 struct qed_ptt *p_ptt; 2142 2143 memset(p_stats, 0, sizeof(*p_stats)); 2144 2145 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) || 2146 !p_hwfn->p_ll2_info) 2147 return -EINVAL; 2148 2149 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 2150 2151 p_ptt = qed_ptt_acquire(p_hwfn); 2152 if (!p_ptt) { 2153 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 2154 return -EINVAL; 2155 } 2156 2157 if (p_ll2_conn->input.gsi_enable) 2158 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats); 2159 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2160 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2161 if (p_ll2_conn->tx_stats_en) 2162 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2163 2164 qed_ptt_release(p_hwfn, p_ptt); 2165 return 0; 2166 } 2167 2168 static void qed_ll2b_release_rx_packet(void *cxt, 2169 u8 connection_handle, 2170 void *cookie, 2171 dma_addr_t rx_buf_addr, 2172 bool b_last_packet) 2173 { 2174 struct qed_hwfn *p_hwfn = cxt; 2175 2176 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie); 2177 } 2178 2179 static void qed_ll2_register_cb_ops(struct qed_dev *cdev, 2180 const struct qed_ll2_cb_ops *ops, 2181 void *cookie) 2182 { 2183 cdev->ll2->cbs = ops; 2184 cdev->ll2->cb_cookie = cookie; 2185 } 2186 2187 struct qed_ll2_cbs ll2_cbs = { 2188 .rx_comp_cb = &qed_ll2b_complete_rx_packet, 2189 .rx_release_cb = &qed_ll2b_release_rx_packet, 2190 .tx_comp_cb = &qed_ll2b_complete_tx_packet, 2191 .tx_release_cb = &qed_ll2b_complete_tx_packet, 2192 }; 2193 2194 static void qed_ll2_set_conn_data(struct qed_dev *cdev, 2195 struct qed_ll2_acquire_data *data, 2196 struct qed_ll2_params *params, 2197 enum qed_ll2_conn_type conn_type, 2198 u8 *handle, bool lb) 2199 { 2200 memset(data, 0, sizeof(*data)); 2201 2202 data->input.conn_type = conn_type; 2203 data->input.mtu = params->mtu; 2204 data->input.rx_num_desc = QED_LL2_RX_SIZE; 2205 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets; 2206 data->input.rx_vlan_removal_en = params->rx_vlan_stripping; 2207 data->input.tx_num_desc = QED_LL2_TX_SIZE; 2208 data->p_connection_handle = handle; 2209 data->cbs = &ll2_cbs; 2210 ll2_cbs.cookie = QED_LEADING_HWFN(cdev); 2211 2212 if (lb) { 2213 data->input.tx_tc = PKT_LB_TC; 2214 data->input.tx_dest = QED_LL2_TX_DEST_LB; 2215 } else { 2216 data->input.tx_tc = 0; 2217 data->input.tx_dest = QED_LL2_TX_DEST_NW; 2218 } 2219 } 2220 2221 static int qed_ll2_start_ooo(struct qed_dev *cdev, 2222 struct qed_ll2_params *params) 2223 { 2224 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2225 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 2226 struct qed_ll2_acquire_data data; 2227 int rc; 2228 2229 qed_ll2_set_conn_data(cdev, &data, params, 2230 QED_LL2_TYPE_OOO, handle, true); 2231 2232 rc = qed_ll2_acquire_connection(hwfn, &data); 2233 if (rc) { 2234 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n"); 2235 goto out; 2236 } 2237 2238 rc = qed_ll2_establish_connection(hwfn, *handle); 2239 if (rc) { 2240 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n"); 2241 goto fail; 2242 } 2243 2244 return 0; 2245 2246 fail: 2247 qed_ll2_release_connection(hwfn, *handle); 2248 out: 2249 *handle = QED_LL2_UNUSED_HANDLE; 2250 return rc; 2251 } 2252 2253 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params) 2254 { 2255 struct qed_ll2_buffer *buffer, *tmp_buffer; 2256 enum qed_ll2_conn_type conn_type; 2257 struct qed_ll2_acquire_data data; 2258 struct qed_ptt *p_ptt; 2259 int rc, i; 2260 2261 2262 /* Initialize LL2 locks & lists */ 2263 INIT_LIST_HEAD(&cdev->ll2->list); 2264 spin_lock_init(&cdev->ll2->lock); 2265 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN + 2266 L1_CACHE_BYTES + params->mtu; 2267 2268 /*Allocate memory for LL2 */ 2269 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n", 2270 cdev->ll2->rx_size); 2271 for (i = 0; i < QED_LL2_RX_SIZE; i++) { 2272 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); 2273 if (!buffer) { 2274 DP_INFO(cdev, "Failed to allocate LL2 buffers\n"); 2275 goto fail; 2276 } 2277 2278 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data, 2279 &buffer->phys_addr); 2280 if (rc) { 2281 kfree(buffer); 2282 goto fail; 2283 } 2284 2285 list_add_tail(&buffer->list, &cdev->ll2->list); 2286 } 2287 2288 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) { 2289 case QED_PCI_FCOE: 2290 conn_type = QED_LL2_TYPE_FCOE; 2291 break; 2292 case QED_PCI_ISCSI: 2293 conn_type = QED_LL2_TYPE_ISCSI; 2294 break; 2295 case QED_PCI_ETH_ROCE: 2296 conn_type = QED_LL2_TYPE_ROCE; 2297 break; 2298 default: 2299 conn_type = QED_LL2_TYPE_TEST; 2300 } 2301 2302 qed_ll2_set_conn_data(cdev, &data, params, conn_type, 2303 &cdev->ll2->handle, false); 2304 2305 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data); 2306 if (rc) { 2307 DP_INFO(cdev, "Failed to acquire LL2 connection\n"); 2308 goto fail; 2309 } 2310 2311 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev), 2312 cdev->ll2->handle); 2313 if (rc) { 2314 DP_INFO(cdev, "Failed to establish LL2 connection\n"); 2315 goto release_fail; 2316 } 2317 2318 /* Post all Rx buffers to FW */ 2319 spin_lock_bh(&cdev->ll2->lock); 2320 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) { 2321 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), 2322 cdev->ll2->handle, 2323 buffer->phys_addr, 0, buffer, 1); 2324 if (rc) { 2325 DP_INFO(cdev, 2326 "Failed to post an Rx buffer; Deleting it\n"); 2327 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 2328 cdev->ll2->rx_size, DMA_FROM_DEVICE); 2329 kfree(buffer->data); 2330 list_del(&buffer->list); 2331 kfree(buffer); 2332 } else { 2333 cdev->ll2->rx_cnt++; 2334 } 2335 } 2336 spin_unlock_bh(&cdev->ll2->lock); 2337 2338 if (!cdev->ll2->rx_cnt) { 2339 DP_INFO(cdev, "Failed passing even a single Rx buffer\n"); 2340 goto release_terminate; 2341 } 2342 2343 if (!is_valid_ether_addr(params->ll2_mac_address)) { 2344 DP_INFO(cdev, "Invalid Ethernet address\n"); 2345 goto release_terminate; 2346 } 2347 2348 if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI) { 2349 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n"); 2350 rc = qed_ll2_start_ooo(cdev, params); 2351 if (rc) { 2352 DP_INFO(cdev, 2353 "Failed to initialize the OOO LL2 queue\n"); 2354 goto release_terminate; 2355 } 2356 } 2357 2358 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2359 if (!p_ptt) { 2360 DP_INFO(cdev, "Failed to acquire PTT\n"); 2361 goto release_terminate; 2362 } 2363 2364 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2365 params->ll2_mac_address); 2366 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2367 if (rc) { 2368 DP_ERR(cdev, "Failed to allocate LLH filter\n"); 2369 goto release_terminate_all; 2370 } 2371 2372 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address); 2373 return 0; 2374 2375 release_terminate_all: 2376 2377 release_terminate: 2378 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2379 release_fail: 2380 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2381 fail: 2382 qed_ll2_kill_buffers(cdev); 2383 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2384 return -EINVAL; 2385 } 2386 2387 static int qed_ll2_stop(struct qed_dev *cdev) 2388 { 2389 struct qed_ptt *p_ptt; 2390 int rc; 2391 2392 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE) 2393 return 0; 2394 2395 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2396 if (!p_ptt) { 2397 DP_INFO(cdev, "Failed to acquire PTT\n"); 2398 goto fail; 2399 } 2400 2401 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2402 cdev->ll2_mac_address); 2403 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2404 eth_zero_addr(cdev->ll2_mac_address); 2405 2406 if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI) 2407 qed_ll2_stop_ooo(cdev); 2408 2409 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), 2410 cdev->ll2->handle); 2411 if (rc) 2412 DP_INFO(cdev, "Failed to terminate LL2 connection\n"); 2413 2414 qed_ll2_kill_buffers(cdev); 2415 2416 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2417 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2418 2419 return rc; 2420 fail: 2421 return -EINVAL; 2422 } 2423 2424 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb, 2425 unsigned long xmit_flags) 2426 { 2427 struct qed_ll2_tx_pkt_info pkt; 2428 const skb_frag_t *frag; 2429 int rc = -EINVAL, i; 2430 dma_addr_t mapping; 2431 u16 vlan = 0; 2432 u8 flags = 0; 2433 2434 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) { 2435 DP_INFO(cdev, "Cannot transmit a checksummed packet\n"); 2436 return -EINVAL; 2437 } 2438 2439 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) { 2440 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n", 2441 1 + skb_shinfo(skb)->nr_frags); 2442 return -EINVAL; 2443 } 2444 2445 mapping = dma_map_single(&cdev->pdev->dev, skb->data, 2446 skb->len, DMA_TO_DEVICE); 2447 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2448 DP_NOTICE(cdev, "SKB mapping failed\n"); 2449 return -EINVAL; 2450 } 2451 2452 /* Request HW to calculate IP csum */ 2453 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) && 2454 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 2455 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT); 2456 2457 if (skb_vlan_tag_present(skb)) { 2458 vlan = skb_vlan_tag_get(skb); 2459 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT); 2460 } 2461 2462 memset(&pkt, 0, sizeof(pkt)); 2463 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags; 2464 pkt.vlan = vlan; 2465 pkt.bd_flags = flags; 2466 pkt.tx_dest = QED_LL2_TX_DEST_NW; 2467 pkt.first_frag = mapping; 2468 pkt.first_frag_len = skb->len; 2469 pkt.cookie = skb; 2470 if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) && 2471 test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags)) 2472 pkt.remove_stag = true; 2473 2474 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle, 2475 &pkt, 1); 2476 if (rc) 2477 goto err; 2478 2479 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 2480 frag = &skb_shinfo(skb)->frags[i]; 2481 2482 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0, 2483 skb_frag_size(frag), DMA_TO_DEVICE); 2484 2485 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2486 DP_NOTICE(cdev, 2487 "Unable to map frag - dropping packet\n"); 2488 goto err; 2489 } 2490 2491 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev), 2492 cdev->ll2->handle, 2493 mapping, 2494 skb_frag_size(frag)); 2495 2496 /* if failed not much to do here, partial packet has been posted 2497 * we can't free memory, will need to wait for completion. 2498 */ 2499 if (rc) 2500 goto err2; 2501 } 2502 2503 return 0; 2504 2505 err: 2506 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE); 2507 2508 err2: 2509 return rc; 2510 } 2511 2512 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats) 2513 { 2514 if (!cdev->ll2) 2515 return -EINVAL; 2516 2517 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev), 2518 cdev->ll2->handle, stats); 2519 } 2520 2521 const struct qed_ll2_ops qed_ll2_ops_pass = { 2522 .start = &qed_ll2_start, 2523 .stop = &qed_ll2_stop, 2524 .start_xmit = &qed_ll2_start_xmit, 2525 .register_cb_ops = &qed_ll2_register_cb_ops, 2526 .get_stats = &qed_ll2_stats, 2527 }; 2528 2529 int qed_ll2_alloc_if(struct qed_dev *cdev) 2530 { 2531 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL); 2532 return cdev->ll2 ? 0 : -ENOMEM; 2533 } 2534 2535 void qed_ll2_dealloc_if(struct qed_dev *cdev) 2536 { 2537 kfree(cdev->ll2); 2538 cdev->ll2 = NULL; 2539 } 2540