1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/if_vlan.h> 37 #include <linux/kernel.h> 38 #include <linux/pci.h> 39 #include <linux/slab.h> 40 #include <linux/stddef.h> 41 #include <linux/workqueue.h> 42 #include <net/ipv6.h> 43 #include <linux/bitops.h> 44 #include <linux/delay.h> 45 #include <linux/errno.h> 46 #include <linux/etherdevice.h> 47 #include <linux/io.h> 48 #include <linux/list.h> 49 #include <linux/mutex.h> 50 #include <linux/spinlock.h> 51 #include <linux/string.h> 52 #include <linux/qed/qed_ll2_if.h> 53 #include "qed.h" 54 #include "qed_cxt.h" 55 #include "qed_dev_api.h" 56 #include "qed_hsi.h" 57 #include "qed_hw.h" 58 #include "qed_int.h" 59 #include "qed_ll2.h" 60 #include "qed_mcp.h" 61 #include "qed_ooo.h" 62 #include "qed_reg_addr.h" 63 #include "qed_sp.h" 64 #include "qed_rdma.h" 65 66 #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred) 67 #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred) 68 69 #define QED_LL2_TX_SIZE (256) 70 #define QED_LL2_RX_SIZE (4096) 71 72 struct qed_cb_ll2_info { 73 int rx_cnt; 74 u32 rx_size; 75 u8 handle; 76 77 /* Lock protecting LL2 buffer lists in sleepless context */ 78 spinlock_t lock; 79 struct list_head list; 80 81 const struct qed_ll2_cb_ops *cbs; 82 void *cb_cookie; 83 }; 84 85 struct qed_ll2_buffer { 86 struct list_head list; 87 void *data; 88 dma_addr_t phys_addr; 89 }; 90 91 static void qed_ll2b_complete_tx_packet(void *cxt, 92 u8 connection_handle, 93 void *cookie, 94 dma_addr_t first_frag_addr, 95 bool b_last_fragment, 96 bool b_last_packet) 97 { 98 struct qed_hwfn *p_hwfn = cxt; 99 struct qed_dev *cdev = p_hwfn->cdev; 100 struct sk_buff *skb = cookie; 101 102 /* All we need to do is release the mapping */ 103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr, 104 skb_headlen(skb), DMA_TO_DEVICE); 105 106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb) 107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb, 108 b_last_fragment); 109 110 dev_kfree_skb_any(skb); 111 } 112 113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev, 114 u8 **data, dma_addr_t *phys_addr) 115 { 116 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC); 117 if (!(*data)) { 118 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n"); 119 return -ENOMEM; 120 } 121 122 *phys_addr = dma_map_single(&cdev->pdev->dev, 123 ((*data) + NET_SKB_PAD), 124 cdev->ll2->rx_size, DMA_FROM_DEVICE); 125 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) { 126 DP_INFO(cdev, "Failed to map LL2 buffer data\n"); 127 kfree((*data)); 128 return -ENOMEM; 129 } 130 131 return 0; 132 } 133 134 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev, 135 struct qed_ll2_buffer *buffer) 136 { 137 spin_lock_bh(&cdev->ll2->lock); 138 139 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 140 cdev->ll2->rx_size, DMA_FROM_DEVICE); 141 kfree(buffer->data); 142 list_del(&buffer->list); 143 144 cdev->ll2->rx_cnt--; 145 if (!cdev->ll2->rx_cnt) 146 DP_INFO(cdev, "All LL2 entries were removed\n"); 147 148 spin_unlock_bh(&cdev->ll2->lock); 149 150 return 0; 151 } 152 153 static void qed_ll2_kill_buffers(struct qed_dev *cdev) 154 { 155 struct qed_ll2_buffer *buffer, *tmp_buffer; 156 157 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) 158 qed_ll2_dealloc_buffer(cdev, buffer); 159 } 160 161 void qed_ll2b_complete_rx_packet(void *cxt, struct qed_ll2_comp_rx_data *data) 162 { 163 struct qed_hwfn *p_hwfn = cxt; 164 struct qed_ll2_buffer *buffer = data->cookie; 165 struct qed_dev *cdev = p_hwfn->cdev; 166 dma_addr_t new_phys_addr; 167 struct sk_buff *skb; 168 bool reuse = false; 169 int rc = -EINVAL; 170 u8 *new_data; 171 172 DP_VERBOSE(p_hwfn, 173 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA), 174 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n", 175 (u64)data->rx_buf_addr, 176 data->u.placement_offset, 177 data->length.packet_length, 178 data->parse_flags, 179 data->vlan, data->opaque_data_0, data->opaque_data_1); 180 181 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) { 182 print_hex_dump(KERN_INFO, "", 183 DUMP_PREFIX_OFFSET, 16, 1, 184 buffer->data, data->length.packet_length, false); 185 } 186 187 /* Determine if data is valid */ 188 if (data->length.packet_length < ETH_HLEN) 189 reuse = true; 190 191 /* Allocate a replacement for buffer; Reuse upon failure */ 192 if (!reuse) 193 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data, 194 &new_phys_addr); 195 196 /* If need to reuse or there's no replacement buffer, repost this */ 197 if (rc) 198 goto out_post; 199 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 200 cdev->ll2->rx_size, DMA_FROM_DEVICE); 201 202 skb = build_skb(buffer->data, 0); 203 if (!skb) { 204 rc = -ENOMEM; 205 goto out_post; 206 } 207 208 data->u.placement_offset += NET_SKB_PAD; 209 skb_reserve(skb, data->u.placement_offset); 210 skb_put(skb, data->length.packet_length); 211 skb_checksum_none_assert(skb); 212 213 /* Get parital ethernet information instead of eth_type_trans(), 214 * Since we don't have an associated net_device. 215 */ 216 skb_reset_mac_header(skb); 217 skb->protocol = eth_hdr(skb)->h_proto; 218 219 /* Pass SKB onward */ 220 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) { 221 if (data->vlan) 222 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 223 data->vlan); 224 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb, 225 data->opaque_data_0, 226 data->opaque_data_1); 227 } 228 229 /* Update Buffer information and update FW producer */ 230 buffer->data = new_data; 231 buffer->phys_addr = new_phys_addr; 232 233 out_post: 234 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle, 235 buffer->phys_addr, 0, buffer, 1); 236 237 if (rc) 238 qed_ll2_dealloc_buffer(cdev, buffer); 239 } 240 241 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 242 u8 connection_handle, 243 bool b_lock, 244 bool b_only_active) 245 { 246 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL; 247 248 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) 249 return NULL; 250 251 if (!p_hwfn->p_ll2_info) 252 return NULL; 253 254 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 255 256 if (b_only_active) { 257 if (b_lock) 258 mutex_lock(&p_ll2_conn->mutex); 259 if (p_ll2_conn->b_active) 260 p_ret = p_ll2_conn; 261 if (b_lock) 262 mutex_unlock(&p_ll2_conn->mutex); 263 } else { 264 p_ret = p_ll2_conn; 265 } 266 267 return p_ret; 268 } 269 270 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 271 u8 connection_handle) 272 { 273 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true); 274 } 275 276 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn, 277 u8 connection_handle) 278 { 279 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true); 280 } 281 282 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn 283 *p_hwfn, 284 u8 connection_handle) 285 { 286 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false); 287 } 288 289 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 290 { 291 bool b_last_packet = false, b_last_frag = false; 292 struct qed_ll2_tx_packet *p_pkt = NULL; 293 struct qed_ll2_info *p_ll2_conn; 294 struct qed_ll2_tx_queue *p_tx; 295 dma_addr_t tx_frag; 296 297 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 298 if (!p_ll2_conn) 299 return; 300 301 p_tx = &p_ll2_conn->tx_queue; 302 303 while (!list_empty(&p_tx->active_descq)) { 304 p_pkt = list_first_entry(&p_tx->active_descq, 305 struct qed_ll2_tx_packet, list_entry); 306 if (!p_pkt) 307 break; 308 309 list_del(&p_pkt->list_entry); 310 b_last_packet = list_empty(&p_tx->active_descq); 311 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 312 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 313 struct qed_ooo_buffer *p_buffer; 314 315 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 316 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 317 p_buffer); 318 } else { 319 p_tx->cur_completing_packet = *p_pkt; 320 p_tx->cur_completing_bd_idx = 1; 321 b_last_frag = 322 p_tx->cur_completing_bd_idx == p_pkt->bd_used; 323 tx_frag = p_pkt->bds_set[0].tx_frag; 324 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie, 325 p_ll2_conn->my_id, 326 p_pkt->cookie, 327 tx_frag, 328 b_last_frag, 329 b_last_packet); 330 } 331 } 332 } 333 334 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 335 { 336 struct qed_ll2_info *p_ll2_conn = p_cookie; 337 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 338 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0; 339 struct qed_ll2_tx_packet *p_pkt; 340 bool b_last_frag = false; 341 unsigned long flags; 342 int rc = -EINVAL; 343 344 spin_lock_irqsave(&p_tx->lock, flags); 345 if (p_tx->b_completing_packet) { 346 rc = -EBUSY; 347 goto out; 348 } 349 350 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 351 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 352 while (num_bds) { 353 if (list_empty(&p_tx->active_descq)) 354 goto out; 355 356 p_pkt = list_first_entry(&p_tx->active_descq, 357 struct qed_ll2_tx_packet, list_entry); 358 if (!p_pkt) 359 goto out; 360 361 p_tx->b_completing_packet = true; 362 p_tx->cur_completing_packet = *p_pkt; 363 num_bds_in_packet = p_pkt->bd_used; 364 list_del(&p_pkt->list_entry); 365 366 if (num_bds < num_bds_in_packet) { 367 DP_NOTICE(p_hwfn, 368 "Rest of BDs does not cover whole packet\n"); 369 goto out; 370 } 371 372 num_bds -= num_bds_in_packet; 373 p_tx->bds_idx += num_bds_in_packet; 374 while (num_bds_in_packet--) 375 qed_chain_consume(&p_tx->txq_chain); 376 377 p_tx->cur_completing_bd_idx = 1; 378 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used; 379 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 380 381 spin_unlock_irqrestore(&p_tx->lock, flags); 382 383 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie, 384 p_ll2_conn->my_id, 385 p_pkt->cookie, 386 p_pkt->bds_set[0].tx_frag, 387 b_last_frag, !num_bds); 388 389 spin_lock_irqsave(&p_tx->lock, flags); 390 } 391 392 p_tx->b_completing_packet = false; 393 rc = 0; 394 out: 395 spin_unlock_irqrestore(&p_tx->lock, flags); 396 return rc; 397 } 398 399 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn, 400 union core_rx_cqe_union *p_cqe, 401 struct qed_ll2_comp_rx_data *data) 402 { 403 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags); 404 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length); 405 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan); 406 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi); 407 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo); 408 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error; 409 } 410 411 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn, 412 union core_rx_cqe_union *p_cqe, 413 struct qed_ll2_comp_rx_data *data) 414 { 415 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags); 416 data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags); 417 data->length.packet_length = 418 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length); 419 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan); 420 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]); 421 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]); 422 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset; 423 } 424 425 static int 426 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn, 427 struct qed_ll2_info *p_ll2_conn, 428 union core_rx_cqe_union *p_cqe, 429 unsigned long *p_lock_flags) 430 { 431 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 432 struct core_rx_slow_path_cqe *sp_cqe; 433 434 sp_cqe = &p_cqe->rx_cqe_sp; 435 if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) { 436 DP_NOTICE(p_hwfn, 437 "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n", 438 sp_cqe->ramrod_cmd_id); 439 return -EINVAL; 440 } 441 442 if (!p_ll2_conn->cbs.slowpath_cb) { 443 DP_NOTICE(p_hwfn, 444 "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n"); 445 return -EINVAL; 446 } 447 448 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 449 450 p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie, 451 p_ll2_conn->my_id, 452 le32_to_cpu(sp_cqe->opaque_data.data[0]), 453 le32_to_cpu(sp_cqe->opaque_data.data[1])); 454 455 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 456 457 return 0; 458 } 459 460 static int 461 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn, 462 struct qed_ll2_info *p_ll2_conn, 463 union core_rx_cqe_union *p_cqe, 464 unsigned long *p_lock_flags, bool b_last_cqe) 465 { 466 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 467 struct qed_ll2_rx_packet *p_pkt = NULL; 468 struct qed_ll2_comp_rx_data data; 469 470 if (!list_empty(&p_rx->active_descq)) 471 p_pkt = list_first_entry(&p_rx->active_descq, 472 struct qed_ll2_rx_packet, list_entry); 473 if (!p_pkt) { 474 DP_NOTICE(p_hwfn, 475 "[%d] LL2 Rx completion but active_descq is empty\n", 476 p_ll2_conn->input.conn_type); 477 478 return -EIO; 479 } 480 list_del(&p_pkt->list_entry); 481 482 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR) 483 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data); 484 else 485 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data); 486 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd) 487 DP_NOTICE(p_hwfn, 488 "Mismatch between active_descq and the LL2 Rx chain\n"); 489 490 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 491 492 data.connection_handle = p_ll2_conn->my_id; 493 data.cookie = p_pkt->cookie; 494 data.rx_buf_addr = p_pkt->rx_buf_addr; 495 data.b_last_packet = b_last_cqe; 496 497 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 498 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data); 499 500 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 501 502 return 0; 503 } 504 505 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie) 506 { 507 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie; 508 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 509 union core_rx_cqe_union *cqe = NULL; 510 u16 cq_new_idx = 0, cq_old_idx = 0; 511 unsigned long flags = 0; 512 int rc = 0; 513 514 spin_lock_irqsave(&p_rx->lock, flags); 515 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 516 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 517 518 while (cq_new_idx != cq_old_idx) { 519 bool b_last_cqe = (cq_new_idx == cq_old_idx); 520 521 cqe = 522 (union core_rx_cqe_union *) 523 qed_chain_consume(&p_rx->rcq_chain); 524 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 525 526 DP_VERBOSE(p_hwfn, 527 QED_MSG_LL2, 528 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n", 529 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type); 530 531 switch (cqe->rx_cqe_sp.type) { 532 case CORE_RX_CQE_TYPE_SLOW_PATH: 533 rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn, 534 cqe, &flags); 535 break; 536 case CORE_RX_CQE_TYPE_GSI_OFFLOAD: 537 case CORE_RX_CQE_TYPE_REGULAR: 538 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn, 539 cqe, &flags, 540 b_last_cqe); 541 break; 542 default: 543 rc = -EIO; 544 } 545 } 546 547 spin_unlock_irqrestore(&p_rx->lock, flags); 548 return rc; 549 } 550 551 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 552 { 553 struct qed_ll2_info *p_ll2_conn = NULL; 554 struct qed_ll2_rx_packet *p_pkt = NULL; 555 struct qed_ll2_rx_queue *p_rx; 556 557 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 558 if (!p_ll2_conn) 559 return; 560 561 p_rx = &p_ll2_conn->rx_queue; 562 563 while (!list_empty(&p_rx->active_descq)) { 564 p_pkt = list_first_entry(&p_rx->active_descq, 565 struct qed_ll2_rx_packet, list_entry); 566 if (!p_pkt) 567 break; 568 569 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq); 570 571 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 572 struct qed_ooo_buffer *p_buffer; 573 574 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 575 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 576 p_buffer); 577 } else { 578 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr; 579 void *cookie = p_pkt->cookie; 580 bool b_last; 581 582 b_last = list_empty(&p_rx->active_descq); 583 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie, 584 p_ll2_conn->my_id, 585 cookie, 586 rx_buf_addr, b_last); 587 } 588 } 589 } 590 591 static u8 qed_ll2_convert_rx_parse_to_tx_flags(u16 parse_flags) 592 { 593 u8 bd_flags = 0; 594 595 if (GET_FIELD(parse_flags, PARSING_AND_ERR_FLAGS_TAG8021QEXIST)) 596 SET_FIELD(bd_flags, CORE_TX_BD_DATA_VLAN_INSERTION, 1); 597 598 return bd_flags; 599 } 600 601 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn, 602 struct qed_ll2_info *p_ll2_conn) 603 { 604 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 605 u16 packet_length = 0, parse_flags = 0, vlan = 0; 606 struct qed_ll2_rx_packet *p_pkt = NULL; 607 u32 num_ooo_add_to_peninsula = 0, cid; 608 union core_rx_cqe_union *cqe = NULL; 609 u16 cq_new_idx = 0, cq_old_idx = 0; 610 struct qed_ooo_buffer *p_buffer; 611 struct ooo_opaque *iscsi_ooo; 612 u8 placement_offset = 0; 613 u8 cqe_type; 614 615 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 616 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 617 if (cq_new_idx == cq_old_idx) 618 return 0; 619 620 while (cq_new_idx != cq_old_idx) { 621 struct core_rx_fast_path_cqe *p_cqe_fp; 622 623 cqe = qed_chain_consume(&p_rx->rcq_chain); 624 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 625 cqe_type = cqe->rx_cqe_sp.type; 626 627 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) { 628 DP_NOTICE(p_hwfn, 629 "Got a non-regular LB LL2 completion [type 0x%02x]\n", 630 cqe_type); 631 return -EINVAL; 632 } 633 p_cqe_fp = &cqe->rx_cqe_fp; 634 635 placement_offset = p_cqe_fp->placement_offset; 636 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags); 637 packet_length = le16_to_cpu(p_cqe_fp->packet_length); 638 vlan = le16_to_cpu(p_cqe_fp->vlan); 639 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data; 640 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info, 641 iscsi_ooo); 642 cid = le32_to_cpu(iscsi_ooo->cid); 643 644 /* Process delete isle first */ 645 if (iscsi_ooo->drop_size) 646 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid, 647 iscsi_ooo->drop_isle, 648 iscsi_ooo->drop_size); 649 650 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP) 651 continue; 652 653 /* Now process create/add/join isles */ 654 if (list_empty(&p_rx->active_descq)) { 655 DP_NOTICE(p_hwfn, 656 "LL2 OOO RX chain has no submitted buffers\n" 657 ); 658 return -EIO; 659 } 660 661 p_pkt = list_first_entry(&p_rx->active_descq, 662 struct qed_ll2_rx_packet, list_entry); 663 664 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) || 665 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) || 666 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) || 667 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) || 668 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) { 669 if (!p_pkt) { 670 DP_NOTICE(p_hwfn, 671 "LL2 OOO RX packet is not valid\n"); 672 return -EIO; 673 } 674 list_del(&p_pkt->list_entry); 675 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 676 p_buffer->packet_length = packet_length; 677 p_buffer->parse_flags = parse_flags; 678 p_buffer->vlan = vlan; 679 p_buffer->placement_offset = placement_offset; 680 qed_chain_consume(&p_rx->rxq_chain); 681 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 682 683 switch (iscsi_ooo->ooo_opcode) { 684 case TCP_EVENT_ADD_NEW_ISLE: 685 qed_ooo_add_new_isle(p_hwfn, 686 p_hwfn->p_ooo_info, 687 cid, 688 iscsi_ooo->ooo_isle, 689 p_buffer); 690 break; 691 case TCP_EVENT_ADD_ISLE_RIGHT: 692 qed_ooo_add_new_buffer(p_hwfn, 693 p_hwfn->p_ooo_info, 694 cid, 695 iscsi_ooo->ooo_isle, 696 p_buffer, 697 QED_OOO_RIGHT_BUF); 698 break; 699 case TCP_EVENT_ADD_ISLE_LEFT: 700 qed_ooo_add_new_buffer(p_hwfn, 701 p_hwfn->p_ooo_info, 702 cid, 703 iscsi_ooo->ooo_isle, 704 p_buffer, 705 QED_OOO_LEFT_BUF); 706 break; 707 case TCP_EVENT_JOIN: 708 qed_ooo_add_new_buffer(p_hwfn, 709 p_hwfn->p_ooo_info, 710 cid, 711 iscsi_ooo->ooo_isle + 712 1, 713 p_buffer, 714 QED_OOO_LEFT_BUF); 715 qed_ooo_join_isles(p_hwfn, 716 p_hwfn->p_ooo_info, 717 cid, iscsi_ooo->ooo_isle); 718 break; 719 case TCP_EVENT_ADD_PEN: 720 num_ooo_add_to_peninsula++; 721 qed_ooo_put_ready_buffer(p_hwfn, 722 p_hwfn->p_ooo_info, 723 p_buffer, true); 724 break; 725 } 726 } else { 727 DP_NOTICE(p_hwfn, 728 "Unexpected event (%d) TX OOO completion\n", 729 iscsi_ooo->ooo_opcode); 730 } 731 } 732 733 return 0; 734 } 735 736 static void 737 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn, 738 struct qed_ll2_info *p_ll2_conn) 739 { 740 struct qed_ll2_tx_pkt_info tx_pkt; 741 struct qed_ooo_buffer *p_buffer; 742 u16 l4_hdr_offset_w; 743 dma_addr_t first_frag; 744 u16 parse_flags; 745 u8 bd_flags; 746 int rc; 747 748 /* Submit Tx buffers here */ 749 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn, 750 p_hwfn->p_ooo_info))) { 751 l4_hdr_offset_w = 0; 752 bd_flags = 0; 753 754 first_frag = p_buffer->rx_buffer_phys_addr + 755 p_buffer->placement_offset; 756 parse_flags = p_buffer->parse_flags; 757 bd_flags = qed_ll2_convert_rx_parse_to_tx_flags(parse_flags); 758 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1); 759 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1); 760 761 memset(&tx_pkt, 0, sizeof(tx_pkt)); 762 tx_pkt.num_of_bds = 1; 763 tx_pkt.vlan = p_buffer->vlan; 764 tx_pkt.bd_flags = bd_flags; 765 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w; 766 tx_pkt.tx_dest = p_ll2_conn->tx_dest; 767 tx_pkt.first_frag = first_frag; 768 tx_pkt.first_frag_len = p_buffer->packet_length; 769 tx_pkt.cookie = p_buffer; 770 771 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id, 772 &tx_pkt, true); 773 if (rc) { 774 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info, 775 p_buffer, false); 776 break; 777 } 778 } 779 } 780 781 static void 782 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn, 783 struct qed_ll2_info *p_ll2_conn) 784 { 785 struct qed_ooo_buffer *p_buffer; 786 int rc; 787 788 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 789 p_hwfn->p_ooo_info))) { 790 rc = qed_ll2_post_rx_buffer(p_hwfn, 791 p_ll2_conn->my_id, 792 p_buffer->rx_buffer_phys_addr, 793 0, p_buffer, true); 794 if (rc) { 795 qed_ooo_put_free_buffer(p_hwfn, 796 p_hwfn->p_ooo_info, p_buffer); 797 break; 798 } 799 } 800 } 801 802 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 803 { 804 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 805 int rc; 806 807 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn); 808 if (rc) 809 return rc; 810 811 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 812 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 813 814 return 0; 815 } 816 817 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 818 { 819 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 820 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 821 struct qed_ll2_tx_packet *p_pkt = NULL; 822 struct qed_ooo_buffer *p_buffer; 823 bool b_dont_submit_rx = false; 824 u16 new_idx = 0, num_bds = 0; 825 int rc; 826 827 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 828 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 829 830 if (!num_bds) 831 return 0; 832 833 while (num_bds) { 834 if (list_empty(&p_tx->active_descq)) 835 return -EINVAL; 836 837 p_pkt = list_first_entry(&p_tx->active_descq, 838 struct qed_ll2_tx_packet, list_entry); 839 if (!p_pkt) 840 return -EINVAL; 841 842 if (p_pkt->bd_used != 1) { 843 DP_NOTICE(p_hwfn, 844 "Unexpectedly many BDs(%d) in TX OOO completion\n", 845 p_pkt->bd_used); 846 return -EINVAL; 847 } 848 849 list_del(&p_pkt->list_entry); 850 851 num_bds--; 852 p_tx->bds_idx++; 853 qed_chain_consume(&p_tx->txq_chain); 854 855 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 856 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 857 858 if (b_dont_submit_rx) { 859 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 860 p_buffer); 861 continue; 862 } 863 864 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id, 865 p_buffer->rx_buffer_phys_addr, 0, 866 p_buffer, true); 867 if (rc != 0) { 868 qed_ooo_put_free_buffer(p_hwfn, 869 p_hwfn->p_ooo_info, p_buffer); 870 b_dont_submit_rx = true; 871 } 872 } 873 874 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 875 876 return 0; 877 } 878 879 static void qed_ll2_stop_ooo(struct qed_dev *cdev) 880 { 881 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 882 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 883 884 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n", 885 *handle); 886 887 qed_ll2_terminate_connection(hwfn, *handle); 888 qed_ll2_release_connection(hwfn, *handle); 889 *handle = QED_LL2_UNUSED_HANDLE; 890 } 891 892 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn, 893 struct qed_ll2_info *p_ll2_conn, 894 u8 action_on_error) 895 { 896 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 897 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 898 struct core_rx_start_ramrod_data *p_ramrod = NULL; 899 struct qed_spq_entry *p_ent = NULL; 900 struct qed_sp_init_data init_data; 901 u16 cqe_pbl_size; 902 int rc = 0; 903 904 /* Get SPQ entry */ 905 memset(&init_data, 0, sizeof(init_data)); 906 init_data.cid = p_ll2_conn->cid; 907 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 908 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 909 910 rc = qed_sp_init_request(p_hwfn, &p_ent, 911 CORE_RAMROD_RX_QUEUE_START, 912 PROTOCOLID_CORE, &init_data); 913 if (rc) 914 return rc; 915 916 p_ramrod = &p_ent->ramrod.core_rx_queue_start; 917 918 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 919 p_ramrod->sb_index = p_rx->rx_sb_index; 920 p_ramrod->complete_event_flg = 1; 921 922 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 923 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr); 924 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain); 925 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size); 926 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, 927 qed_chain_get_pbl_phys(&p_rx->rcq_chain)); 928 929 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg; 930 p_ramrod->inner_vlan_removal_en = p_ll2_conn->input.rx_vlan_removal_en; 931 p_ramrod->queue_id = p_ll2_conn->queue_id; 932 p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0; 933 934 if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) && 935 p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE) && 936 (conn_type != QED_LL2_TYPE_IWARP)) { 937 p_ramrod->mf_si_bcast_accept_all = 1; 938 p_ramrod->mf_si_mcast_accept_all = 1; 939 } else { 940 p_ramrod->mf_si_bcast_accept_all = 0; 941 p_ramrod->mf_si_mcast_accept_all = 0; 942 } 943 944 p_ramrod->action_on_error.error_type = action_on_error; 945 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 946 return qed_spq_post(p_hwfn, p_ent, NULL); 947 } 948 949 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn, 950 struct qed_ll2_info *p_ll2_conn) 951 { 952 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 953 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 954 struct core_tx_start_ramrod_data *p_ramrod = NULL; 955 struct qed_spq_entry *p_ent = NULL; 956 struct qed_sp_init_data init_data; 957 u16 pq_id = 0, pbl_size; 958 int rc = -EINVAL; 959 960 if (!QED_LL2_TX_REGISTERED(p_ll2_conn)) 961 return 0; 962 963 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 964 p_ll2_conn->tx_stats_en = 0; 965 else 966 p_ll2_conn->tx_stats_en = 1; 967 968 /* Get SPQ entry */ 969 memset(&init_data, 0, sizeof(init_data)); 970 init_data.cid = p_ll2_conn->cid; 971 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 972 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 973 974 rc = qed_sp_init_request(p_hwfn, &p_ent, 975 CORE_RAMROD_TX_QUEUE_START, 976 PROTOCOLID_CORE, &init_data); 977 if (rc) 978 return rc; 979 980 p_ramrod = &p_ent->ramrod.core_tx_queue_start; 981 982 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 983 p_ramrod->sb_index = p_tx->tx_sb_index; 984 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 985 p_ramrod->stats_en = p_ll2_conn->tx_stats_en; 986 p_ramrod->stats_id = p_ll2_conn->tx_stats_id; 987 988 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, 989 qed_chain_get_pbl_phys(&p_tx->txq_chain)); 990 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain); 991 p_ramrod->pbl_size = cpu_to_le16(pbl_size); 992 993 switch (p_ll2_conn->input.tx_tc) { 994 case PURE_LB_TC: 995 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB); 996 break; 997 case PKT_LB_TC: 998 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO); 999 break; 1000 default: 1001 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD); 1002 break; 1003 } 1004 1005 p_ramrod->qm_pq_id = cpu_to_le16(pq_id); 1006 1007 switch (conn_type) { 1008 case QED_LL2_TYPE_FCOE: 1009 p_ramrod->conn_type = PROTOCOLID_FCOE; 1010 break; 1011 case QED_LL2_TYPE_ISCSI: 1012 p_ramrod->conn_type = PROTOCOLID_ISCSI; 1013 break; 1014 case QED_LL2_TYPE_ROCE: 1015 p_ramrod->conn_type = PROTOCOLID_ROCE; 1016 break; 1017 case QED_LL2_TYPE_IWARP: 1018 p_ramrod->conn_type = PROTOCOLID_IWARP; 1019 break; 1020 case QED_LL2_TYPE_OOO: 1021 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) 1022 p_ramrod->conn_type = PROTOCOLID_ISCSI; 1023 else 1024 p_ramrod->conn_type = PROTOCOLID_IWARP; 1025 break; 1026 default: 1027 p_ramrod->conn_type = PROTOCOLID_ETH; 1028 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type); 1029 } 1030 1031 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 1032 1033 return qed_spq_post(p_hwfn, p_ent, NULL); 1034 } 1035 1036 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn, 1037 struct qed_ll2_info *p_ll2_conn) 1038 { 1039 struct core_rx_stop_ramrod_data *p_ramrod = NULL; 1040 struct qed_spq_entry *p_ent = NULL; 1041 struct qed_sp_init_data init_data; 1042 int rc = -EINVAL; 1043 1044 /* Get SPQ entry */ 1045 memset(&init_data, 0, sizeof(init_data)); 1046 init_data.cid = p_ll2_conn->cid; 1047 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1048 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1049 1050 rc = qed_sp_init_request(p_hwfn, &p_ent, 1051 CORE_RAMROD_RX_QUEUE_STOP, 1052 PROTOCOLID_CORE, &init_data); 1053 if (rc) 1054 return rc; 1055 1056 p_ramrod = &p_ent->ramrod.core_rx_queue_stop; 1057 1058 p_ramrod->complete_event_flg = 1; 1059 p_ramrod->queue_id = p_ll2_conn->queue_id; 1060 1061 return qed_spq_post(p_hwfn, p_ent, NULL); 1062 } 1063 1064 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn, 1065 struct qed_ll2_info *p_ll2_conn) 1066 { 1067 struct qed_spq_entry *p_ent = NULL; 1068 struct qed_sp_init_data init_data; 1069 int rc = -EINVAL; 1070 1071 /* Get SPQ entry */ 1072 memset(&init_data, 0, sizeof(init_data)); 1073 init_data.cid = p_ll2_conn->cid; 1074 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1075 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1076 1077 rc = qed_sp_init_request(p_hwfn, &p_ent, 1078 CORE_RAMROD_TX_QUEUE_STOP, 1079 PROTOCOLID_CORE, &init_data); 1080 if (rc) 1081 return rc; 1082 1083 return qed_spq_post(p_hwfn, p_ent, NULL); 1084 } 1085 1086 static int 1087 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn, 1088 struct qed_ll2_info *p_ll2_info) 1089 { 1090 struct qed_ll2_rx_packet *p_descq; 1091 u32 capacity; 1092 int rc = 0; 1093 1094 if (!p_ll2_info->input.rx_num_desc) 1095 goto out; 1096 1097 rc = qed_chain_alloc(p_hwfn->cdev, 1098 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1099 QED_CHAIN_MODE_NEXT_PTR, 1100 QED_CHAIN_CNT_TYPE_U16, 1101 p_ll2_info->input.rx_num_desc, 1102 sizeof(struct core_rx_bd), 1103 &p_ll2_info->rx_queue.rxq_chain, NULL); 1104 if (rc) { 1105 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n"); 1106 goto out; 1107 } 1108 1109 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain); 1110 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet), 1111 GFP_KERNEL); 1112 if (!p_descq) { 1113 rc = -ENOMEM; 1114 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n"); 1115 goto out; 1116 } 1117 p_ll2_info->rx_queue.descq_array = p_descq; 1118 1119 rc = qed_chain_alloc(p_hwfn->cdev, 1120 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1121 QED_CHAIN_MODE_PBL, 1122 QED_CHAIN_CNT_TYPE_U16, 1123 p_ll2_info->input.rx_num_desc, 1124 sizeof(struct core_rx_fast_path_cqe), 1125 &p_ll2_info->rx_queue.rcq_chain, NULL); 1126 if (rc) { 1127 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n"); 1128 goto out; 1129 } 1130 1131 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1132 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n", 1133 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc); 1134 1135 out: 1136 return rc; 1137 } 1138 1139 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn, 1140 struct qed_ll2_info *p_ll2_info) 1141 { 1142 struct qed_ll2_tx_packet *p_descq; 1143 u32 desc_size; 1144 u32 capacity; 1145 int rc = 0; 1146 1147 if (!p_ll2_info->input.tx_num_desc) 1148 goto out; 1149 1150 rc = qed_chain_alloc(p_hwfn->cdev, 1151 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1152 QED_CHAIN_MODE_PBL, 1153 QED_CHAIN_CNT_TYPE_U16, 1154 p_ll2_info->input.tx_num_desc, 1155 sizeof(struct core_tx_bd), 1156 &p_ll2_info->tx_queue.txq_chain, NULL); 1157 if (rc) 1158 goto out; 1159 1160 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain); 1161 /* First element is part of the packet, rest are flexibly added */ 1162 desc_size = (sizeof(*p_descq) + 1163 (p_ll2_info->input.tx_max_bds_per_packet - 1) * 1164 sizeof(p_descq->bds_set)); 1165 1166 p_descq = kcalloc(capacity, desc_size, GFP_KERNEL); 1167 if (!p_descq) { 1168 rc = -ENOMEM; 1169 goto out; 1170 } 1171 p_ll2_info->tx_queue.descq_mem = p_descq; 1172 1173 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1174 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n", 1175 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc); 1176 1177 out: 1178 if (rc) 1179 DP_NOTICE(p_hwfn, 1180 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n", 1181 p_ll2_info->input.tx_num_desc); 1182 return rc; 1183 } 1184 1185 static int 1186 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn, 1187 struct qed_ll2_info *p_ll2_info, u16 mtu) 1188 { 1189 struct qed_ooo_buffer *p_buf = NULL; 1190 void *p_virt; 1191 u16 buf_idx; 1192 int rc = 0; 1193 1194 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO) 1195 return rc; 1196 1197 /* Correct number of requested OOO buffers if needed */ 1198 if (!p_ll2_info->input.rx_num_ooo_buffers) { 1199 u16 num_desc = p_ll2_info->input.rx_num_desc; 1200 1201 if (!num_desc) 1202 return -EINVAL; 1203 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2; 1204 } 1205 1206 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers; 1207 buf_idx++) { 1208 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL); 1209 if (!p_buf) { 1210 rc = -ENOMEM; 1211 goto out; 1212 } 1213 1214 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE; 1215 p_buf->rx_buffer_size = (p_buf->rx_buffer_size + 1216 ETH_CACHE_LINE_SIZE - 1) & 1217 ~(ETH_CACHE_LINE_SIZE - 1); 1218 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 1219 p_buf->rx_buffer_size, 1220 &p_buf->rx_buffer_phys_addr, 1221 GFP_KERNEL); 1222 if (!p_virt) { 1223 kfree(p_buf); 1224 rc = -ENOMEM; 1225 goto out; 1226 } 1227 1228 p_buf->rx_buffer_virt_addr = p_virt; 1229 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf); 1230 } 1231 1232 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1233 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n", 1234 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size); 1235 1236 out: 1237 return rc; 1238 } 1239 1240 static int 1241 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs) 1242 { 1243 if (!cbs || (!cbs->rx_comp_cb || 1244 !cbs->rx_release_cb || 1245 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie)) 1246 return -EINVAL; 1247 1248 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb; 1249 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb; 1250 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb; 1251 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb; 1252 p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb; 1253 p_ll2_info->cbs.cookie = cbs->cookie; 1254 1255 return 0; 1256 } 1257 1258 static enum core_error_handle 1259 qed_ll2_get_error_choice(enum qed_ll2_error_handle err) 1260 { 1261 switch (err) { 1262 case QED_LL2_DROP_PACKET: 1263 return LL2_DROP_PACKET; 1264 case QED_LL2_DO_NOTHING: 1265 return LL2_DO_NOTHING; 1266 case QED_LL2_ASSERT: 1267 return LL2_ASSERT; 1268 default: 1269 return LL2_DO_NOTHING; 1270 } 1271 } 1272 1273 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data) 1274 { 1275 struct qed_hwfn *p_hwfn = cxt; 1276 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb; 1277 struct qed_ll2_info *p_ll2_info = NULL; 1278 u8 i, *p_tx_max; 1279 int rc; 1280 1281 if (!data->p_connection_handle || !p_hwfn->p_ll2_info) 1282 return -EINVAL; 1283 1284 /* Find a free connection to be used */ 1285 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) { 1286 mutex_lock(&p_hwfn->p_ll2_info[i].mutex); 1287 if (p_hwfn->p_ll2_info[i].b_active) { 1288 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1289 continue; 1290 } 1291 1292 p_hwfn->p_ll2_info[i].b_active = true; 1293 p_ll2_info = &p_hwfn->p_ll2_info[i]; 1294 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1295 break; 1296 } 1297 if (!p_ll2_info) 1298 return -EBUSY; 1299 1300 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input)); 1301 1302 p_ll2_info->tx_dest = (data->input.tx_dest == QED_LL2_TX_DEST_NW) ? 1303 CORE_TX_DEST_NW : CORE_TX_DEST_LB; 1304 if (data->input.conn_type == QED_LL2_TYPE_OOO || 1305 data->input.secondary_queue) 1306 p_ll2_info->main_func_queue = false; 1307 else 1308 p_ll2_info->main_func_queue = true; 1309 1310 /* Correct maximum number of Tx BDs */ 1311 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet; 1312 if (*p_tx_max == 0) 1313 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET; 1314 else 1315 *p_tx_max = min_t(u8, *p_tx_max, 1316 CORE_LL2_TX_MAX_BDS_PER_PACKET); 1317 1318 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs); 1319 if (rc) { 1320 DP_NOTICE(p_hwfn, "Invalid callback functions\n"); 1321 goto q_allocate_fail; 1322 } 1323 1324 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info); 1325 if (rc) 1326 goto q_allocate_fail; 1327 1328 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info); 1329 if (rc) 1330 goto q_allocate_fail; 1331 1332 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info, 1333 data->input.mtu); 1334 if (rc) 1335 goto q_allocate_fail; 1336 1337 /* Register callbacks for the Rx/Tx queues */ 1338 if (data->input.conn_type == QED_LL2_TYPE_OOO) { 1339 comp_rx_cb = qed_ll2_lb_rxq_completion; 1340 comp_tx_cb = qed_ll2_lb_txq_completion; 1341 } else { 1342 comp_rx_cb = qed_ll2_rxq_completion; 1343 comp_tx_cb = qed_ll2_txq_completion; 1344 } 1345 1346 if (data->input.rx_num_desc) { 1347 qed_int_register_cb(p_hwfn, comp_rx_cb, 1348 &p_hwfn->p_ll2_info[i], 1349 &p_ll2_info->rx_queue.rx_sb_index, 1350 &p_ll2_info->rx_queue.p_fw_cons); 1351 p_ll2_info->rx_queue.b_cb_registred = true; 1352 } 1353 1354 if (data->input.tx_num_desc) { 1355 qed_int_register_cb(p_hwfn, 1356 comp_tx_cb, 1357 &p_hwfn->p_ll2_info[i], 1358 &p_ll2_info->tx_queue.tx_sb_index, 1359 &p_ll2_info->tx_queue.p_fw_cons); 1360 p_ll2_info->tx_queue.b_cb_registred = true; 1361 } 1362 1363 *data->p_connection_handle = i; 1364 return rc; 1365 1366 q_allocate_fail: 1367 qed_ll2_release_connection(p_hwfn, i); 1368 return -ENOMEM; 1369 } 1370 1371 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn, 1372 struct qed_ll2_info *p_ll2_conn) 1373 { 1374 enum qed_ll2_error_handle error_input; 1375 enum core_error_handle error_mode; 1376 u8 action_on_error = 0; 1377 1378 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) 1379 return 0; 1380 1381 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0); 1382 error_input = p_ll2_conn->input.ai_err_packet_too_big; 1383 error_mode = qed_ll2_get_error_choice(error_input); 1384 SET_FIELD(action_on_error, 1385 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode); 1386 error_input = p_ll2_conn->input.ai_err_no_buf; 1387 error_mode = qed_ll2_get_error_choice(error_input); 1388 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode); 1389 1390 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error); 1391 } 1392 1393 static void 1394 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn, 1395 struct qed_ll2_info *p_ll2_conn) 1396 { 1397 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1398 return; 1399 1400 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1401 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 1402 } 1403 1404 int qed_ll2_establish_connection(void *cxt, u8 connection_handle) 1405 { 1406 struct qed_hwfn *p_hwfn = cxt; 1407 struct qed_ll2_info *p_ll2_conn; 1408 struct qed_ll2_tx_packet *p_pkt; 1409 struct qed_ll2_rx_queue *p_rx; 1410 struct qed_ll2_tx_queue *p_tx; 1411 struct qed_ptt *p_ptt; 1412 int rc = -EINVAL; 1413 u32 i, capacity; 1414 u32 desc_size; 1415 u8 qid; 1416 1417 p_ptt = qed_ptt_acquire(p_hwfn); 1418 if (!p_ptt) 1419 return -EAGAIN; 1420 1421 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1422 if (!p_ll2_conn) { 1423 rc = -EINVAL; 1424 goto out; 1425 } 1426 1427 p_rx = &p_ll2_conn->rx_queue; 1428 p_tx = &p_ll2_conn->tx_queue; 1429 1430 qed_chain_reset(&p_rx->rxq_chain); 1431 qed_chain_reset(&p_rx->rcq_chain); 1432 INIT_LIST_HEAD(&p_rx->active_descq); 1433 INIT_LIST_HEAD(&p_rx->free_descq); 1434 INIT_LIST_HEAD(&p_rx->posting_descq); 1435 spin_lock_init(&p_rx->lock); 1436 capacity = qed_chain_get_capacity(&p_rx->rxq_chain); 1437 for (i = 0; i < capacity; i++) 1438 list_add_tail(&p_rx->descq_array[i].list_entry, 1439 &p_rx->free_descq); 1440 *p_rx->p_fw_cons = 0; 1441 1442 qed_chain_reset(&p_tx->txq_chain); 1443 INIT_LIST_HEAD(&p_tx->active_descq); 1444 INIT_LIST_HEAD(&p_tx->free_descq); 1445 INIT_LIST_HEAD(&p_tx->sending_descq); 1446 spin_lock_init(&p_tx->lock); 1447 capacity = qed_chain_get_capacity(&p_tx->txq_chain); 1448 /* First element is part of the packet, rest are flexibly added */ 1449 desc_size = (sizeof(*p_pkt) + 1450 (p_ll2_conn->input.tx_max_bds_per_packet - 1) * 1451 sizeof(p_pkt->bds_set)); 1452 1453 for (i = 0; i < capacity; i++) { 1454 p_pkt = p_tx->descq_mem + desc_size * i; 1455 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 1456 } 1457 p_tx->cur_completing_bd_idx = 0; 1458 p_tx->bds_idx = 0; 1459 p_tx->b_completing_packet = false; 1460 p_tx->cur_send_packet = NULL; 1461 p_tx->cur_send_frag_num = 0; 1462 p_tx->cur_completing_frag_num = 0; 1463 *p_tx->p_fw_cons = 0; 1464 1465 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid); 1466 if (rc) 1467 goto out; 1468 1469 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle; 1470 p_ll2_conn->queue_id = qid; 1471 p_ll2_conn->tx_stats_id = qid; 1472 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview + 1473 GTT_BAR0_MAP_REG_TSDM_RAM + 1474 TSTORM_LL2_RX_PRODS_OFFSET(qid); 1475 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells + 1476 qed_db_addr(p_ll2_conn->cid, 1477 DQ_DEMS_LEGACY); 1478 1479 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn); 1480 if (rc) 1481 goto out; 1482 1483 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn); 1484 if (rc) 1485 goto out; 1486 1487 if (!QED_IS_RDMA_PERSONALITY(p_hwfn)) 1488 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1); 1489 1490 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn); 1491 1492 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1493 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1494 0x8906, 0, 1495 QED_LLH_FILTER_ETHERTYPE); 1496 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1497 0x8914, 0, 1498 QED_LLH_FILTER_ETHERTYPE); 1499 } 1500 1501 out: 1502 qed_ptt_release(p_hwfn, p_ptt); 1503 return rc; 1504 } 1505 1506 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn, 1507 struct qed_ll2_rx_queue *p_rx, 1508 struct qed_ll2_rx_packet *p_curp) 1509 { 1510 struct qed_ll2_rx_packet *p_posting_packet = NULL; 1511 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 }; 1512 bool b_notify_fw = false; 1513 u16 bd_prod, cq_prod; 1514 1515 /* This handles the flushing of already posted buffers */ 1516 while (!list_empty(&p_rx->posting_descq)) { 1517 p_posting_packet = list_first_entry(&p_rx->posting_descq, 1518 struct qed_ll2_rx_packet, 1519 list_entry); 1520 list_move_tail(&p_posting_packet->list_entry, 1521 &p_rx->active_descq); 1522 b_notify_fw = true; 1523 } 1524 1525 /* This handles the supplied packet [if there is one] */ 1526 if (p_curp) { 1527 list_add_tail(&p_curp->list_entry, &p_rx->active_descq); 1528 b_notify_fw = true; 1529 } 1530 1531 if (!b_notify_fw) 1532 return; 1533 1534 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain); 1535 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain); 1536 rx_prod.bd_prod = cpu_to_le16(bd_prod); 1537 rx_prod.cqe_prod = cpu_to_le16(cq_prod); 1538 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod)); 1539 } 1540 1541 int qed_ll2_post_rx_buffer(void *cxt, 1542 u8 connection_handle, 1543 dma_addr_t addr, 1544 u16 buf_len, void *cookie, u8 notify_fw) 1545 { 1546 struct qed_hwfn *p_hwfn = cxt; 1547 struct core_rx_bd_with_buff_len *p_curb = NULL; 1548 struct qed_ll2_rx_packet *p_curp = NULL; 1549 struct qed_ll2_info *p_ll2_conn; 1550 struct qed_ll2_rx_queue *p_rx; 1551 unsigned long flags; 1552 void *p_data; 1553 int rc = 0; 1554 1555 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1556 if (!p_ll2_conn) 1557 return -EINVAL; 1558 p_rx = &p_ll2_conn->rx_queue; 1559 1560 spin_lock_irqsave(&p_rx->lock, flags); 1561 if (!list_empty(&p_rx->free_descq)) 1562 p_curp = list_first_entry(&p_rx->free_descq, 1563 struct qed_ll2_rx_packet, list_entry); 1564 if (p_curp) { 1565 if (qed_chain_get_elem_left(&p_rx->rxq_chain) && 1566 qed_chain_get_elem_left(&p_rx->rcq_chain)) { 1567 p_data = qed_chain_produce(&p_rx->rxq_chain); 1568 p_curb = (struct core_rx_bd_with_buff_len *)p_data; 1569 qed_chain_produce(&p_rx->rcq_chain); 1570 } 1571 } 1572 1573 /* If we're lacking entires, let's try to flush buffers to FW */ 1574 if (!p_curp || !p_curb) { 1575 rc = -EBUSY; 1576 p_curp = NULL; 1577 goto out_notify; 1578 } 1579 1580 /* We have an Rx packet we can fill */ 1581 DMA_REGPAIR_LE(p_curb->addr, addr); 1582 p_curb->buff_length = cpu_to_le16(buf_len); 1583 p_curp->rx_buf_addr = addr; 1584 p_curp->cookie = cookie; 1585 p_curp->rxq_bd = p_curb; 1586 p_curp->buf_length = buf_len; 1587 list_del(&p_curp->list_entry); 1588 1589 /* Check if we only want to enqueue this packet without informing FW */ 1590 if (!notify_fw) { 1591 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq); 1592 goto out; 1593 } 1594 1595 out_notify: 1596 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp); 1597 out: 1598 spin_unlock_irqrestore(&p_rx->lock, flags); 1599 return rc; 1600 } 1601 1602 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn, 1603 struct qed_ll2_tx_queue *p_tx, 1604 struct qed_ll2_tx_packet *p_curp, 1605 struct qed_ll2_tx_pkt_info *pkt, 1606 u8 notify_fw) 1607 { 1608 list_del(&p_curp->list_entry); 1609 p_curp->cookie = pkt->cookie; 1610 p_curp->bd_used = pkt->num_of_bds; 1611 p_curp->notify_fw = notify_fw; 1612 p_tx->cur_send_packet = p_curp; 1613 p_tx->cur_send_frag_num = 0; 1614 1615 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag; 1616 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len; 1617 p_tx->cur_send_frag_num++; 1618 } 1619 1620 static void 1621 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn, 1622 struct qed_ll2_info *p_ll2, 1623 struct qed_ll2_tx_packet *p_curp, 1624 struct qed_ll2_tx_pkt_info *pkt) 1625 { 1626 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain; 1627 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain); 1628 struct core_tx_bd *start_bd = NULL; 1629 enum core_roce_flavor_type roce_flavor; 1630 enum core_tx_dest tx_dest; 1631 u16 bd_data = 0, frag_idx; 1632 1633 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE 1634 : CORE_RROCE; 1635 1636 switch (pkt->tx_dest) { 1637 case QED_LL2_TX_DEST_NW: 1638 tx_dest = CORE_TX_DEST_NW; 1639 break; 1640 case QED_LL2_TX_DEST_LB: 1641 tx_dest = CORE_TX_DEST_LB; 1642 break; 1643 case QED_LL2_TX_DEST_DROP: 1644 tx_dest = CORE_TX_DEST_DROP; 1645 break; 1646 default: 1647 tx_dest = CORE_TX_DEST_LB; 1648 break; 1649 } 1650 1651 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1652 if (QED_IS_IWARP_PERSONALITY(p_hwfn) && 1653 p_ll2->input.conn_type == QED_LL2_TYPE_OOO) 1654 start_bd->nw_vlan_or_lb_echo = 1655 cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE); 1656 else 1657 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan); 1658 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, 1659 cpu_to_le16(pkt->l4_hdr_offset_w)); 1660 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest); 1661 bd_data |= pkt->bd_flags; 1662 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1); 1663 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds); 1664 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor); 1665 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum)); 1666 SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum)); 1667 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len)); 1668 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data); 1669 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag); 1670 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len); 1671 1672 DP_VERBOSE(p_hwfn, 1673 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1674 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n", 1675 p_ll2->queue_id, 1676 p_ll2->cid, 1677 p_ll2->input.conn_type, 1678 prod_idx, 1679 pkt->first_frag_len, 1680 pkt->num_of_bds, 1681 le32_to_cpu(start_bd->addr.hi), 1682 le32_to_cpu(start_bd->addr.lo)); 1683 1684 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds) 1685 return; 1686 1687 /* Need to provide the packet with additional BDs for frags */ 1688 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num; 1689 frag_idx < pkt->num_of_bds; frag_idx++) { 1690 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd; 1691 1692 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1693 (*p_bd)->bd_data.as_bitfield = 0; 1694 (*p_bd)->bitfield1 = 0; 1695 p_curp->bds_set[frag_idx].tx_frag = 0; 1696 p_curp->bds_set[frag_idx].frag_len = 0; 1697 } 1698 } 1699 1700 /* This should be called while the Txq spinlock is being held */ 1701 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn, 1702 struct qed_ll2_info *p_ll2_conn) 1703 { 1704 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw; 1705 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 1706 struct qed_ll2_tx_packet *p_pkt = NULL; 1707 struct core_db_data db_msg = { 0, 0, 0 }; 1708 u16 bd_prod; 1709 1710 /* If there are missing BDs, don't do anything now */ 1711 if (p_ll2_conn->tx_queue.cur_send_frag_num != 1712 p_ll2_conn->tx_queue.cur_send_packet->bd_used) 1713 return; 1714 1715 /* Push the current packet to the list and clean after it */ 1716 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry, 1717 &p_ll2_conn->tx_queue.sending_descq); 1718 p_ll2_conn->tx_queue.cur_send_packet = NULL; 1719 p_ll2_conn->tx_queue.cur_send_frag_num = 0; 1720 1721 /* Notify FW of packet only if requested to */ 1722 if (!b_notify) 1723 return; 1724 1725 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain); 1726 1727 while (!list_empty(&p_tx->sending_descq)) { 1728 p_pkt = list_first_entry(&p_tx->sending_descq, 1729 struct qed_ll2_tx_packet, list_entry); 1730 if (!p_pkt) 1731 break; 1732 1733 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq); 1734 } 1735 1736 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM); 1737 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 1738 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL, 1739 DQ_XCM_CORE_TX_BD_PROD_CMD); 1740 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD; 1741 db_msg.spq_prod = cpu_to_le16(bd_prod); 1742 1743 /* Make sure the BDs data is updated before ringing the doorbell */ 1744 wmb(); 1745 1746 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg)); 1747 1748 DP_VERBOSE(p_hwfn, 1749 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1750 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n", 1751 p_ll2_conn->queue_id, 1752 p_ll2_conn->cid, 1753 p_ll2_conn->input.conn_type, db_msg.spq_prod); 1754 } 1755 1756 int qed_ll2_prepare_tx_packet(void *cxt, 1757 u8 connection_handle, 1758 struct qed_ll2_tx_pkt_info *pkt, 1759 bool notify_fw) 1760 { 1761 struct qed_hwfn *p_hwfn = cxt; 1762 struct qed_ll2_tx_packet *p_curp = NULL; 1763 struct qed_ll2_info *p_ll2_conn = NULL; 1764 struct qed_ll2_tx_queue *p_tx; 1765 struct qed_chain *p_tx_chain; 1766 unsigned long flags; 1767 int rc = 0; 1768 1769 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1770 if (!p_ll2_conn) 1771 return -EINVAL; 1772 p_tx = &p_ll2_conn->tx_queue; 1773 p_tx_chain = &p_tx->txq_chain; 1774 1775 if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet) 1776 return -EIO; 1777 1778 spin_lock_irqsave(&p_tx->lock, flags); 1779 if (p_tx->cur_send_packet) { 1780 rc = -EEXIST; 1781 goto out; 1782 } 1783 1784 /* Get entry, but only if we have tx elements for it */ 1785 if (!list_empty(&p_tx->free_descq)) 1786 p_curp = list_first_entry(&p_tx->free_descq, 1787 struct qed_ll2_tx_packet, list_entry); 1788 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds) 1789 p_curp = NULL; 1790 1791 if (!p_curp) { 1792 rc = -EBUSY; 1793 goto out; 1794 } 1795 1796 /* Prepare packet and BD, and perhaps send a doorbell to FW */ 1797 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw); 1798 1799 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt); 1800 1801 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1802 1803 out: 1804 spin_unlock_irqrestore(&p_tx->lock, flags); 1805 return rc; 1806 } 1807 1808 int qed_ll2_set_fragment_of_tx_packet(void *cxt, 1809 u8 connection_handle, 1810 dma_addr_t addr, u16 nbytes) 1811 { 1812 struct qed_ll2_tx_packet *p_cur_send_packet = NULL; 1813 struct qed_hwfn *p_hwfn = cxt; 1814 struct qed_ll2_info *p_ll2_conn = NULL; 1815 u16 cur_send_frag_num = 0; 1816 struct core_tx_bd *p_bd; 1817 unsigned long flags; 1818 1819 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1820 if (!p_ll2_conn) 1821 return -EINVAL; 1822 1823 if (!p_ll2_conn->tx_queue.cur_send_packet) 1824 return -EINVAL; 1825 1826 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet; 1827 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num; 1828 1829 if (cur_send_frag_num >= p_cur_send_packet->bd_used) 1830 return -EINVAL; 1831 1832 /* Fill the BD information, and possibly notify FW */ 1833 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd; 1834 DMA_REGPAIR_LE(p_bd->addr, addr); 1835 p_bd->nbytes = cpu_to_le16(nbytes); 1836 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr; 1837 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes; 1838 1839 p_ll2_conn->tx_queue.cur_send_frag_num++; 1840 1841 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags); 1842 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1843 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags); 1844 1845 return 0; 1846 } 1847 1848 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle) 1849 { 1850 struct qed_hwfn *p_hwfn = cxt; 1851 struct qed_ll2_info *p_ll2_conn = NULL; 1852 int rc = -EINVAL; 1853 struct qed_ptt *p_ptt; 1854 1855 p_ptt = qed_ptt_acquire(p_hwfn); 1856 if (!p_ptt) 1857 return -EAGAIN; 1858 1859 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1860 if (!p_ll2_conn) { 1861 rc = -EINVAL; 1862 goto out; 1863 } 1864 1865 /* Stop Tx & Rx of connection, if needed */ 1866 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1867 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn); 1868 if (rc) 1869 goto out; 1870 qed_ll2_txq_flush(p_hwfn, connection_handle); 1871 } 1872 1873 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1874 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn); 1875 if (rc) 1876 goto out; 1877 qed_ll2_rxq_flush(p_hwfn, connection_handle); 1878 } 1879 1880 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 1881 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1882 1883 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1884 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1885 0x8906, 0, 1886 QED_LLH_FILTER_ETHERTYPE); 1887 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1888 0x8914, 0, 1889 QED_LLH_FILTER_ETHERTYPE); 1890 } 1891 1892 out: 1893 qed_ptt_release(p_hwfn, p_ptt); 1894 return rc; 1895 } 1896 1897 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn, 1898 struct qed_ll2_info *p_ll2_conn) 1899 { 1900 struct qed_ooo_buffer *p_buffer; 1901 1902 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1903 return; 1904 1905 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1906 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 1907 p_hwfn->p_ooo_info))) { 1908 dma_free_coherent(&p_hwfn->cdev->pdev->dev, 1909 p_buffer->rx_buffer_size, 1910 p_buffer->rx_buffer_virt_addr, 1911 p_buffer->rx_buffer_phys_addr); 1912 kfree(p_buffer); 1913 } 1914 } 1915 1916 void qed_ll2_release_connection(void *cxt, u8 connection_handle) 1917 { 1918 struct qed_hwfn *p_hwfn = cxt; 1919 struct qed_ll2_info *p_ll2_conn = NULL; 1920 1921 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1922 if (!p_ll2_conn) 1923 return; 1924 1925 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1926 p_ll2_conn->rx_queue.b_cb_registred = false; 1927 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index); 1928 } 1929 1930 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1931 p_ll2_conn->tx_queue.b_cb_registred = false; 1932 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index); 1933 } 1934 1935 kfree(p_ll2_conn->tx_queue.descq_mem); 1936 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain); 1937 1938 kfree(p_ll2_conn->rx_queue.descq_array); 1939 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain); 1940 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain); 1941 1942 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid); 1943 1944 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn); 1945 1946 mutex_lock(&p_ll2_conn->mutex); 1947 p_ll2_conn->b_active = false; 1948 mutex_unlock(&p_ll2_conn->mutex); 1949 } 1950 1951 int qed_ll2_alloc(struct qed_hwfn *p_hwfn) 1952 { 1953 struct qed_ll2_info *p_ll2_connections; 1954 u8 i; 1955 1956 /* Allocate LL2's set struct */ 1957 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS, 1958 sizeof(struct qed_ll2_info), GFP_KERNEL); 1959 if (!p_ll2_connections) { 1960 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n"); 1961 return -ENOMEM; 1962 } 1963 1964 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 1965 p_ll2_connections[i].my_id = i; 1966 1967 p_hwfn->p_ll2_info = p_ll2_connections; 1968 return 0; 1969 } 1970 1971 void qed_ll2_setup(struct qed_hwfn *p_hwfn) 1972 { 1973 int i; 1974 1975 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 1976 mutex_init(&p_hwfn->p_ll2_info[i].mutex); 1977 } 1978 1979 void qed_ll2_free(struct qed_hwfn *p_hwfn) 1980 { 1981 if (!p_hwfn->p_ll2_info) 1982 return; 1983 1984 kfree(p_hwfn->p_ll2_info); 1985 p_hwfn->p_ll2_info = NULL; 1986 } 1987 1988 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn, 1989 struct qed_ptt *p_ptt, 1990 struct qed_ll2_stats *p_stats) 1991 { 1992 struct core_ll2_port_stats port_stats; 1993 1994 memset(&port_stats, 0, sizeof(port_stats)); 1995 qed_memcpy_from(p_hwfn, p_ptt, &port_stats, 1996 BAR0_MAP_REG_TSDM_RAM + 1997 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)), 1998 sizeof(port_stats)); 1999 2000 p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr); 2001 p_stats->gsi_invalid_pkt_length = 2002 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length); 2003 p_stats->gsi_unsupported_pkt_typ = 2004 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ); 2005 p_stats->gsi_crcchksm_error = 2006 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error); 2007 } 2008 2009 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn, 2010 struct qed_ptt *p_ptt, 2011 struct qed_ll2_info *p_ll2_conn, 2012 struct qed_ll2_stats *p_stats) 2013 { 2014 struct core_ll2_tstorm_per_queue_stat tstats; 2015 u8 qid = p_ll2_conn->queue_id; 2016 u32 tstats_addr; 2017 2018 memset(&tstats, 0, sizeof(tstats)); 2019 tstats_addr = BAR0_MAP_REG_TSDM_RAM + 2020 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid); 2021 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats)); 2022 2023 p_stats->packet_too_big_discard = 2024 HILO_64_REGPAIR(tstats.packet_too_big_discard); 2025 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard); 2026 } 2027 2028 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn, 2029 struct qed_ptt *p_ptt, 2030 struct qed_ll2_info *p_ll2_conn, 2031 struct qed_ll2_stats *p_stats) 2032 { 2033 struct core_ll2_ustorm_per_queue_stat ustats; 2034 u8 qid = p_ll2_conn->queue_id; 2035 u32 ustats_addr; 2036 2037 memset(&ustats, 0, sizeof(ustats)); 2038 ustats_addr = BAR0_MAP_REG_USDM_RAM + 2039 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid); 2040 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats)); 2041 2042 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes); 2043 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes); 2044 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes); 2045 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts); 2046 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts); 2047 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts); 2048 } 2049 2050 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn, 2051 struct qed_ptt *p_ptt, 2052 struct qed_ll2_info *p_ll2_conn, 2053 struct qed_ll2_stats *p_stats) 2054 { 2055 struct core_ll2_pstorm_per_queue_stat pstats; 2056 u8 stats_id = p_ll2_conn->tx_stats_id; 2057 u32 pstats_addr; 2058 2059 memset(&pstats, 0, sizeof(pstats)); 2060 pstats_addr = BAR0_MAP_REG_PSDM_RAM + 2061 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id); 2062 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats)); 2063 2064 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes); 2065 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes); 2066 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes); 2067 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts); 2068 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts); 2069 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts); 2070 } 2071 2072 int qed_ll2_get_stats(void *cxt, 2073 u8 connection_handle, struct qed_ll2_stats *p_stats) 2074 { 2075 struct qed_hwfn *p_hwfn = cxt; 2076 struct qed_ll2_info *p_ll2_conn = NULL; 2077 struct qed_ptt *p_ptt; 2078 2079 memset(p_stats, 0, sizeof(*p_stats)); 2080 2081 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) || 2082 !p_hwfn->p_ll2_info) 2083 return -EINVAL; 2084 2085 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 2086 2087 p_ptt = qed_ptt_acquire(p_hwfn); 2088 if (!p_ptt) { 2089 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 2090 return -EINVAL; 2091 } 2092 2093 if (p_ll2_conn->input.gsi_enable) 2094 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats); 2095 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2096 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2097 if (p_ll2_conn->tx_stats_en) 2098 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2099 2100 qed_ptt_release(p_hwfn, p_ptt); 2101 return 0; 2102 } 2103 2104 static void qed_ll2b_release_rx_packet(void *cxt, 2105 u8 connection_handle, 2106 void *cookie, 2107 dma_addr_t rx_buf_addr, 2108 bool b_last_packet) 2109 { 2110 struct qed_hwfn *p_hwfn = cxt; 2111 2112 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie); 2113 } 2114 2115 static void qed_ll2_register_cb_ops(struct qed_dev *cdev, 2116 const struct qed_ll2_cb_ops *ops, 2117 void *cookie) 2118 { 2119 cdev->ll2->cbs = ops; 2120 cdev->ll2->cb_cookie = cookie; 2121 } 2122 2123 struct qed_ll2_cbs ll2_cbs = { 2124 .rx_comp_cb = &qed_ll2b_complete_rx_packet, 2125 .rx_release_cb = &qed_ll2b_release_rx_packet, 2126 .tx_comp_cb = &qed_ll2b_complete_tx_packet, 2127 .tx_release_cb = &qed_ll2b_complete_tx_packet, 2128 }; 2129 2130 static void qed_ll2_set_conn_data(struct qed_dev *cdev, 2131 struct qed_ll2_acquire_data *data, 2132 struct qed_ll2_params *params, 2133 enum qed_ll2_conn_type conn_type, 2134 u8 *handle, bool lb) 2135 { 2136 memset(data, 0, sizeof(*data)); 2137 2138 data->input.conn_type = conn_type; 2139 data->input.mtu = params->mtu; 2140 data->input.rx_num_desc = QED_LL2_RX_SIZE; 2141 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets; 2142 data->input.rx_vlan_removal_en = params->rx_vlan_stripping; 2143 data->input.tx_num_desc = QED_LL2_TX_SIZE; 2144 data->p_connection_handle = handle; 2145 data->cbs = &ll2_cbs; 2146 ll2_cbs.cookie = QED_LEADING_HWFN(cdev); 2147 2148 if (lb) { 2149 data->input.tx_tc = PKT_LB_TC; 2150 data->input.tx_dest = QED_LL2_TX_DEST_LB; 2151 } else { 2152 data->input.tx_tc = 0; 2153 data->input.tx_dest = QED_LL2_TX_DEST_NW; 2154 } 2155 } 2156 2157 static int qed_ll2_start_ooo(struct qed_dev *cdev, 2158 struct qed_ll2_params *params) 2159 { 2160 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2161 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 2162 struct qed_ll2_acquire_data data; 2163 int rc; 2164 2165 qed_ll2_set_conn_data(cdev, &data, params, 2166 QED_LL2_TYPE_OOO, handle, true); 2167 2168 rc = qed_ll2_acquire_connection(hwfn, &data); 2169 if (rc) { 2170 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n"); 2171 goto out; 2172 } 2173 2174 rc = qed_ll2_establish_connection(hwfn, *handle); 2175 if (rc) { 2176 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n"); 2177 goto fail; 2178 } 2179 2180 return 0; 2181 2182 fail: 2183 qed_ll2_release_connection(hwfn, *handle); 2184 out: 2185 *handle = QED_LL2_UNUSED_HANDLE; 2186 return rc; 2187 } 2188 2189 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params) 2190 { 2191 struct qed_ll2_buffer *buffer, *tmp_buffer; 2192 enum qed_ll2_conn_type conn_type; 2193 struct qed_ll2_acquire_data data; 2194 struct qed_ptt *p_ptt; 2195 int rc, i; 2196 2197 2198 /* Initialize LL2 locks & lists */ 2199 INIT_LIST_HEAD(&cdev->ll2->list); 2200 spin_lock_init(&cdev->ll2->lock); 2201 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN + 2202 L1_CACHE_BYTES + params->mtu; 2203 2204 /*Allocate memory for LL2 */ 2205 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n", 2206 cdev->ll2->rx_size); 2207 for (i = 0; i < QED_LL2_RX_SIZE; i++) { 2208 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); 2209 if (!buffer) { 2210 DP_INFO(cdev, "Failed to allocate LL2 buffers\n"); 2211 goto fail; 2212 } 2213 2214 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data, 2215 &buffer->phys_addr); 2216 if (rc) { 2217 kfree(buffer); 2218 goto fail; 2219 } 2220 2221 list_add_tail(&buffer->list, &cdev->ll2->list); 2222 } 2223 2224 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) { 2225 case QED_PCI_FCOE: 2226 conn_type = QED_LL2_TYPE_FCOE; 2227 break; 2228 case QED_PCI_ISCSI: 2229 conn_type = QED_LL2_TYPE_ISCSI; 2230 break; 2231 case QED_PCI_ETH_ROCE: 2232 conn_type = QED_LL2_TYPE_ROCE; 2233 break; 2234 default: 2235 conn_type = QED_LL2_TYPE_TEST; 2236 } 2237 2238 qed_ll2_set_conn_data(cdev, &data, params, conn_type, 2239 &cdev->ll2->handle, false); 2240 2241 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data); 2242 if (rc) { 2243 DP_INFO(cdev, "Failed to acquire LL2 connection\n"); 2244 goto fail; 2245 } 2246 2247 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev), 2248 cdev->ll2->handle); 2249 if (rc) { 2250 DP_INFO(cdev, "Failed to establish LL2 connection\n"); 2251 goto release_fail; 2252 } 2253 2254 /* Post all Rx buffers to FW */ 2255 spin_lock_bh(&cdev->ll2->lock); 2256 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) { 2257 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), 2258 cdev->ll2->handle, 2259 buffer->phys_addr, 0, buffer, 1); 2260 if (rc) { 2261 DP_INFO(cdev, 2262 "Failed to post an Rx buffer; Deleting it\n"); 2263 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 2264 cdev->ll2->rx_size, DMA_FROM_DEVICE); 2265 kfree(buffer->data); 2266 list_del(&buffer->list); 2267 kfree(buffer); 2268 } else { 2269 cdev->ll2->rx_cnt++; 2270 } 2271 } 2272 spin_unlock_bh(&cdev->ll2->lock); 2273 2274 if (!cdev->ll2->rx_cnt) { 2275 DP_INFO(cdev, "Failed passing even a single Rx buffer\n"); 2276 goto release_terminate; 2277 } 2278 2279 if (!is_valid_ether_addr(params->ll2_mac_address)) { 2280 DP_INFO(cdev, "Invalid Ethernet address\n"); 2281 goto release_terminate; 2282 } 2283 2284 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI && 2285 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) { 2286 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n"); 2287 rc = qed_ll2_start_ooo(cdev, params); 2288 if (rc) { 2289 DP_INFO(cdev, 2290 "Failed to initialize the OOO LL2 queue\n"); 2291 goto release_terminate; 2292 } 2293 } 2294 2295 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2296 if (!p_ptt) { 2297 DP_INFO(cdev, "Failed to acquire PTT\n"); 2298 goto release_terminate; 2299 } 2300 2301 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2302 params->ll2_mac_address); 2303 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2304 if (rc) { 2305 DP_ERR(cdev, "Failed to allocate LLH filter\n"); 2306 goto release_terminate_all; 2307 } 2308 2309 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address); 2310 return 0; 2311 2312 release_terminate_all: 2313 2314 release_terminate: 2315 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2316 release_fail: 2317 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2318 fail: 2319 qed_ll2_kill_buffers(cdev); 2320 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2321 return -EINVAL; 2322 } 2323 2324 static int qed_ll2_stop(struct qed_dev *cdev) 2325 { 2326 struct qed_ptt *p_ptt; 2327 int rc; 2328 2329 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE) 2330 return 0; 2331 2332 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2333 if (!p_ptt) { 2334 DP_INFO(cdev, "Failed to acquire PTT\n"); 2335 goto fail; 2336 } 2337 2338 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2339 cdev->ll2_mac_address); 2340 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2341 eth_zero_addr(cdev->ll2_mac_address); 2342 2343 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI && 2344 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) 2345 qed_ll2_stop_ooo(cdev); 2346 2347 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), 2348 cdev->ll2->handle); 2349 if (rc) 2350 DP_INFO(cdev, "Failed to terminate LL2 connection\n"); 2351 2352 qed_ll2_kill_buffers(cdev); 2353 2354 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2355 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2356 2357 return rc; 2358 fail: 2359 return -EINVAL; 2360 } 2361 2362 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb) 2363 { 2364 struct qed_ll2_tx_pkt_info pkt; 2365 const skb_frag_t *frag; 2366 int rc = -EINVAL, i; 2367 dma_addr_t mapping; 2368 u16 vlan = 0; 2369 u8 flags = 0; 2370 2371 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) { 2372 DP_INFO(cdev, "Cannot transmit a checksumed packet\n"); 2373 return -EINVAL; 2374 } 2375 2376 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) { 2377 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n", 2378 1 + skb_shinfo(skb)->nr_frags); 2379 return -EINVAL; 2380 } 2381 2382 mapping = dma_map_single(&cdev->pdev->dev, skb->data, 2383 skb->len, DMA_TO_DEVICE); 2384 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2385 DP_NOTICE(cdev, "SKB mapping failed\n"); 2386 return -EINVAL; 2387 } 2388 2389 /* Request HW to calculate IP csum */ 2390 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) && 2391 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 2392 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT); 2393 2394 if (skb_vlan_tag_present(skb)) { 2395 vlan = skb_vlan_tag_get(skb); 2396 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT); 2397 } 2398 2399 memset(&pkt, 0, sizeof(pkt)); 2400 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags; 2401 pkt.vlan = vlan; 2402 pkt.bd_flags = flags; 2403 pkt.tx_dest = QED_LL2_TX_DEST_NW; 2404 pkt.first_frag = mapping; 2405 pkt.first_frag_len = skb->len; 2406 pkt.cookie = skb; 2407 2408 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle, 2409 &pkt, 1); 2410 if (rc) 2411 goto err; 2412 2413 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 2414 frag = &skb_shinfo(skb)->frags[i]; 2415 2416 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0, 2417 skb_frag_size(frag), DMA_TO_DEVICE); 2418 2419 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2420 DP_NOTICE(cdev, 2421 "Unable to map frag - dropping packet\n"); 2422 goto err; 2423 } 2424 2425 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev), 2426 cdev->ll2->handle, 2427 mapping, 2428 skb_frag_size(frag)); 2429 2430 /* if failed not much to do here, partial packet has been posted 2431 * we can't free memory, will need to wait for completion. 2432 */ 2433 if (rc) 2434 goto err2; 2435 } 2436 2437 return 0; 2438 2439 err: 2440 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE); 2441 2442 err2: 2443 return rc; 2444 } 2445 2446 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats) 2447 { 2448 if (!cdev->ll2) 2449 return -EINVAL; 2450 2451 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev), 2452 cdev->ll2->handle, stats); 2453 } 2454 2455 const struct qed_ll2_ops qed_ll2_ops_pass = { 2456 .start = &qed_ll2_start, 2457 .stop = &qed_ll2_stop, 2458 .start_xmit = &qed_ll2_start_xmit, 2459 .register_cb_ops = &qed_ll2_register_cb_ops, 2460 .get_stats = &qed_ll2_stats, 2461 }; 2462 2463 int qed_ll2_alloc_if(struct qed_dev *cdev) 2464 { 2465 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL); 2466 return cdev->ll2 ? 0 : -ENOMEM; 2467 } 2468 2469 void qed_ll2_dealloc_if(struct qed_dev *cdev) 2470 { 2471 kfree(cdev->ll2); 2472 cdev->ll2 = NULL; 2473 } 2474