1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/if_vlan.h> 37 #include <linux/kernel.h> 38 #include <linux/pci.h> 39 #include <linux/slab.h> 40 #include <linux/stddef.h> 41 #include <linux/workqueue.h> 42 #include <net/ipv6.h> 43 #include <linux/bitops.h> 44 #include <linux/delay.h> 45 #include <linux/errno.h> 46 #include <linux/etherdevice.h> 47 #include <linux/io.h> 48 #include <linux/list.h> 49 #include <linux/mutex.h> 50 #include <linux/spinlock.h> 51 #include <linux/string.h> 52 #include <linux/qed/qed_ll2_if.h> 53 #include "qed.h" 54 #include "qed_cxt.h" 55 #include "qed_dev_api.h" 56 #include "qed_hsi.h" 57 #include "qed_hw.h" 58 #include "qed_int.h" 59 #include "qed_ll2.h" 60 #include "qed_mcp.h" 61 #include "qed_ooo.h" 62 #include "qed_reg_addr.h" 63 #include "qed_sp.h" 64 #include "qed_rdma.h" 65 66 #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred) 67 #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred) 68 69 #define QED_LL2_TX_SIZE (256) 70 #define QED_LL2_RX_SIZE (4096) 71 72 struct qed_cb_ll2_info { 73 int rx_cnt; 74 u32 rx_size; 75 u8 handle; 76 77 /* Lock protecting LL2 buffer lists in sleepless context */ 78 spinlock_t lock; 79 struct list_head list; 80 81 const struct qed_ll2_cb_ops *cbs; 82 void *cb_cookie; 83 }; 84 85 struct qed_ll2_buffer { 86 struct list_head list; 87 void *data; 88 dma_addr_t phys_addr; 89 }; 90 91 static void qed_ll2b_complete_tx_packet(void *cxt, 92 u8 connection_handle, 93 void *cookie, 94 dma_addr_t first_frag_addr, 95 bool b_last_fragment, 96 bool b_last_packet) 97 { 98 struct qed_hwfn *p_hwfn = cxt; 99 struct qed_dev *cdev = p_hwfn->cdev; 100 struct sk_buff *skb = cookie; 101 102 /* All we need to do is release the mapping */ 103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr, 104 skb_headlen(skb), DMA_TO_DEVICE); 105 106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb) 107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb, 108 b_last_fragment); 109 110 dev_kfree_skb_any(skb); 111 } 112 113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev, 114 u8 **data, dma_addr_t *phys_addr) 115 { 116 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC); 117 if (!(*data)) { 118 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n"); 119 return -ENOMEM; 120 } 121 122 *phys_addr = dma_map_single(&cdev->pdev->dev, 123 ((*data) + NET_SKB_PAD), 124 cdev->ll2->rx_size, DMA_FROM_DEVICE); 125 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) { 126 DP_INFO(cdev, "Failed to map LL2 buffer data\n"); 127 kfree((*data)); 128 return -ENOMEM; 129 } 130 131 return 0; 132 } 133 134 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev, 135 struct qed_ll2_buffer *buffer) 136 { 137 spin_lock_bh(&cdev->ll2->lock); 138 139 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 140 cdev->ll2->rx_size, DMA_FROM_DEVICE); 141 kfree(buffer->data); 142 list_del(&buffer->list); 143 144 cdev->ll2->rx_cnt--; 145 if (!cdev->ll2->rx_cnt) 146 DP_INFO(cdev, "All LL2 entries were removed\n"); 147 148 spin_unlock_bh(&cdev->ll2->lock); 149 150 return 0; 151 } 152 153 static void qed_ll2_kill_buffers(struct qed_dev *cdev) 154 { 155 struct qed_ll2_buffer *buffer, *tmp_buffer; 156 157 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) 158 qed_ll2_dealloc_buffer(cdev, buffer); 159 } 160 161 void qed_ll2b_complete_rx_packet(void *cxt, struct qed_ll2_comp_rx_data *data) 162 { 163 struct qed_hwfn *p_hwfn = cxt; 164 struct qed_ll2_buffer *buffer = data->cookie; 165 struct qed_dev *cdev = p_hwfn->cdev; 166 dma_addr_t new_phys_addr; 167 struct sk_buff *skb; 168 bool reuse = false; 169 int rc = -EINVAL; 170 u8 *new_data; 171 172 DP_VERBOSE(p_hwfn, 173 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA), 174 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n", 175 (u64)data->rx_buf_addr, 176 data->u.placement_offset, 177 data->length.packet_length, 178 data->parse_flags, 179 data->vlan, data->opaque_data_0, data->opaque_data_1); 180 181 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) { 182 print_hex_dump(KERN_INFO, "", 183 DUMP_PREFIX_OFFSET, 16, 1, 184 buffer->data, data->length.packet_length, false); 185 } 186 187 /* Determine if data is valid */ 188 if (data->length.packet_length < ETH_HLEN) 189 reuse = true; 190 191 /* Allocate a replacement for buffer; Reuse upon failure */ 192 if (!reuse) 193 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data, 194 &new_phys_addr); 195 196 /* If need to reuse or there's no replacement buffer, repost this */ 197 if (rc) 198 goto out_post; 199 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 200 cdev->ll2->rx_size, DMA_FROM_DEVICE); 201 202 skb = build_skb(buffer->data, 0); 203 if (!skb) { 204 rc = -ENOMEM; 205 goto out_post; 206 } 207 208 data->u.placement_offset += NET_SKB_PAD; 209 skb_reserve(skb, data->u.placement_offset); 210 skb_put(skb, data->length.packet_length); 211 skb_checksum_none_assert(skb); 212 213 /* Get parital ethernet information instead of eth_type_trans(), 214 * Since we don't have an associated net_device. 215 */ 216 skb_reset_mac_header(skb); 217 skb->protocol = eth_hdr(skb)->h_proto; 218 219 /* Pass SKB onward */ 220 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) { 221 if (data->vlan) 222 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 223 data->vlan); 224 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb, 225 data->opaque_data_0, 226 data->opaque_data_1); 227 } 228 229 /* Update Buffer information and update FW producer */ 230 buffer->data = new_data; 231 buffer->phys_addr = new_phys_addr; 232 233 out_post: 234 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle, 235 buffer->phys_addr, 0, buffer, 1); 236 237 if (rc) 238 qed_ll2_dealloc_buffer(cdev, buffer); 239 } 240 241 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 242 u8 connection_handle, 243 bool b_lock, 244 bool b_only_active) 245 { 246 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL; 247 248 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) 249 return NULL; 250 251 if (!p_hwfn->p_ll2_info) 252 return NULL; 253 254 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 255 256 if (b_only_active) { 257 if (b_lock) 258 mutex_lock(&p_ll2_conn->mutex); 259 if (p_ll2_conn->b_active) 260 p_ret = p_ll2_conn; 261 if (b_lock) 262 mutex_unlock(&p_ll2_conn->mutex); 263 } else { 264 p_ret = p_ll2_conn; 265 } 266 267 return p_ret; 268 } 269 270 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 271 u8 connection_handle) 272 { 273 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true); 274 } 275 276 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn, 277 u8 connection_handle) 278 { 279 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true); 280 } 281 282 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn 283 *p_hwfn, 284 u8 connection_handle) 285 { 286 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false); 287 } 288 289 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 290 { 291 bool b_last_packet = false, b_last_frag = false; 292 struct qed_ll2_tx_packet *p_pkt = NULL; 293 struct qed_ll2_info *p_ll2_conn; 294 struct qed_ll2_tx_queue *p_tx; 295 dma_addr_t tx_frag; 296 297 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 298 if (!p_ll2_conn) 299 return; 300 301 p_tx = &p_ll2_conn->tx_queue; 302 303 while (!list_empty(&p_tx->active_descq)) { 304 p_pkt = list_first_entry(&p_tx->active_descq, 305 struct qed_ll2_tx_packet, list_entry); 306 if (!p_pkt) 307 break; 308 309 list_del(&p_pkt->list_entry); 310 b_last_packet = list_empty(&p_tx->active_descq); 311 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 312 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 313 struct qed_ooo_buffer *p_buffer; 314 315 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 316 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 317 p_buffer); 318 } else { 319 p_tx->cur_completing_packet = *p_pkt; 320 p_tx->cur_completing_bd_idx = 1; 321 b_last_frag = 322 p_tx->cur_completing_bd_idx == p_pkt->bd_used; 323 tx_frag = p_pkt->bds_set[0].tx_frag; 324 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie, 325 p_ll2_conn->my_id, 326 p_pkt->cookie, 327 tx_frag, 328 b_last_frag, 329 b_last_packet); 330 } 331 } 332 } 333 334 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 335 { 336 struct qed_ll2_info *p_ll2_conn = p_cookie; 337 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 338 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0; 339 struct qed_ll2_tx_packet *p_pkt; 340 bool b_last_frag = false; 341 unsigned long flags; 342 int rc = -EINVAL; 343 344 spin_lock_irqsave(&p_tx->lock, flags); 345 if (p_tx->b_completing_packet) { 346 rc = -EBUSY; 347 goto out; 348 } 349 350 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 351 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 352 while (num_bds) { 353 if (list_empty(&p_tx->active_descq)) 354 goto out; 355 356 p_pkt = list_first_entry(&p_tx->active_descq, 357 struct qed_ll2_tx_packet, list_entry); 358 if (!p_pkt) 359 goto out; 360 361 p_tx->b_completing_packet = true; 362 p_tx->cur_completing_packet = *p_pkt; 363 num_bds_in_packet = p_pkt->bd_used; 364 list_del(&p_pkt->list_entry); 365 366 if (num_bds < num_bds_in_packet) { 367 DP_NOTICE(p_hwfn, 368 "Rest of BDs does not cover whole packet\n"); 369 goto out; 370 } 371 372 num_bds -= num_bds_in_packet; 373 p_tx->bds_idx += num_bds_in_packet; 374 while (num_bds_in_packet--) 375 qed_chain_consume(&p_tx->txq_chain); 376 377 p_tx->cur_completing_bd_idx = 1; 378 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used; 379 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 380 381 spin_unlock_irqrestore(&p_tx->lock, flags); 382 383 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie, 384 p_ll2_conn->my_id, 385 p_pkt->cookie, 386 p_pkt->bds_set[0].tx_frag, 387 b_last_frag, !num_bds); 388 389 spin_lock_irqsave(&p_tx->lock, flags); 390 } 391 392 p_tx->b_completing_packet = false; 393 rc = 0; 394 out: 395 spin_unlock_irqrestore(&p_tx->lock, flags); 396 return rc; 397 } 398 399 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn, 400 union core_rx_cqe_union *p_cqe, 401 struct qed_ll2_comp_rx_data *data) 402 { 403 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags); 404 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length); 405 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan); 406 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi); 407 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo); 408 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error; 409 } 410 411 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn, 412 union core_rx_cqe_union *p_cqe, 413 struct qed_ll2_comp_rx_data *data) 414 { 415 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags); 416 data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags); 417 data->length.packet_length = 418 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length); 419 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan); 420 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]); 421 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]); 422 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset; 423 } 424 425 static int 426 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn, 427 struct qed_ll2_info *p_ll2_conn, 428 union core_rx_cqe_union *p_cqe, 429 unsigned long *p_lock_flags, bool b_last_cqe) 430 { 431 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 432 struct qed_ll2_rx_packet *p_pkt = NULL; 433 struct qed_ll2_comp_rx_data data; 434 435 if (!list_empty(&p_rx->active_descq)) 436 p_pkt = list_first_entry(&p_rx->active_descq, 437 struct qed_ll2_rx_packet, list_entry); 438 if (!p_pkt) { 439 DP_NOTICE(p_hwfn, 440 "[%d] LL2 Rx completion but active_descq is empty\n", 441 p_ll2_conn->input.conn_type); 442 443 return -EIO; 444 } 445 list_del(&p_pkt->list_entry); 446 447 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR) 448 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data); 449 else 450 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data); 451 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd) 452 DP_NOTICE(p_hwfn, 453 "Mismatch between active_descq and the LL2 Rx chain\n"); 454 455 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 456 457 data.connection_handle = p_ll2_conn->my_id; 458 data.cookie = p_pkt->cookie; 459 data.rx_buf_addr = p_pkt->rx_buf_addr; 460 data.b_last_packet = b_last_cqe; 461 462 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 463 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data); 464 465 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 466 467 return 0; 468 } 469 470 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie) 471 { 472 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie; 473 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 474 union core_rx_cqe_union *cqe = NULL; 475 u16 cq_new_idx = 0, cq_old_idx = 0; 476 unsigned long flags = 0; 477 int rc = 0; 478 479 spin_lock_irqsave(&p_rx->lock, flags); 480 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 481 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 482 483 while (cq_new_idx != cq_old_idx) { 484 bool b_last_cqe = (cq_new_idx == cq_old_idx); 485 486 cqe = 487 (union core_rx_cqe_union *) 488 qed_chain_consume(&p_rx->rcq_chain); 489 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 490 491 DP_VERBOSE(p_hwfn, 492 QED_MSG_LL2, 493 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n", 494 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type); 495 496 switch (cqe->rx_cqe_sp.type) { 497 case CORE_RX_CQE_TYPE_SLOW_PATH: 498 DP_NOTICE(p_hwfn, "LL2 - unexpected Rx CQE slowpath\n"); 499 rc = -EINVAL; 500 break; 501 case CORE_RX_CQE_TYPE_GSI_OFFLOAD: 502 case CORE_RX_CQE_TYPE_REGULAR: 503 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn, 504 cqe, &flags, 505 b_last_cqe); 506 break; 507 default: 508 rc = -EIO; 509 } 510 } 511 512 spin_unlock_irqrestore(&p_rx->lock, flags); 513 return rc; 514 } 515 516 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 517 { 518 struct qed_ll2_info *p_ll2_conn = NULL; 519 struct qed_ll2_rx_packet *p_pkt = NULL; 520 struct qed_ll2_rx_queue *p_rx; 521 522 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 523 if (!p_ll2_conn) 524 return; 525 526 p_rx = &p_ll2_conn->rx_queue; 527 528 while (!list_empty(&p_rx->active_descq)) { 529 p_pkt = list_first_entry(&p_rx->active_descq, 530 struct qed_ll2_rx_packet, list_entry); 531 if (!p_pkt) 532 break; 533 534 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq); 535 536 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 537 struct qed_ooo_buffer *p_buffer; 538 539 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 540 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 541 p_buffer); 542 } else { 543 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr; 544 void *cookie = p_pkt->cookie; 545 bool b_last; 546 547 b_last = list_empty(&p_rx->active_descq); 548 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie, 549 p_ll2_conn->my_id, 550 cookie, 551 rx_buf_addr, b_last); 552 } 553 } 554 } 555 556 static u8 qed_ll2_convert_rx_parse_to_tx_flags(u16 parse_flags) 557 { 558 u8 bd_flags = 0; 559 560 if (GET_FIELD(parse_flags, PARSING_AND_ERR_FLAGS_TAG8021QEXIST)) 561 SET_FIELD(bd_flags, CORE_TX_BD_DATA_VLAN_INSERTION, 1); 562 563 return bd_flags; 564 } 565 566 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn, 567 struct qed_ll2_info *p_ll2_conn) 568 { 569 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 570 u16 packet_length = 0, parse_flags = 0, vlan = 0; 571 struct qed_ll2_rx_packet *p_pkt = NULL; 572 u32 num_ooo_add_to_peninsula = 0, cid; 573 union core_rx_cqe_union *cqe = NULL; 574 u16 cq_new_idx = 0, cq_old_idx = 0; 575 struct qed_ooo_buffer *p_buffer; 576 struct ooo_opaque *iscsi_ooo; 577 u8 placement_offset = 0; 578 u8 cqe_type; 579 580 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 581 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 582 if (cq_new_idx == cq_old_idx) 583 return 0; 584 585 while (cq_new_idx != cq_old_idx) { 586 struct core_rx_fast_path_cqe *p_cqe_fp; 587 588 cqe = qed_chain_consume(&p_rx->rcq_chain); 589 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 590 cqe_type = cqe->rx_cqe_sp.type; 591 592 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) { 593 DP_NOTICE(p_hwfn, 594 "Got a non-regular LB LL2 completion [type 0x%02x]\n", 595 cqe_type); 596 return -EINVAL; 597 } 598 p_cqe_fp = &cqe->rx_cqe_fp; 599 600 placement_offset = p_cqe_fp->placement_offset; 601 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags); 602 packet_length = le16_to_cpu(p_cqe_fp->packet_length); 603 vlan = le16_to_cpu(p_cqe_fp->vlan); 604 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data; 605 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info, 606 iscsi_ooo); 607 cid = le32_to_cpu(iscsi_ooo->cid); 608 609 /* Process delete isle first */ 610 if (iscsi_ooo->drop_size) 611 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid, 612 iscsi_ooo->drop_isle, 613 iscsi_ooo->drop_size); 614 615 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP) 616 continue; 617 618 /* Now process create/add/join isles */ 619 if (list_empty(&p_rx->active_descq)) { 620 DP_NOTICE(p_hwfn, 621 "LL2 OOO RX chain has no submitted buffers\n" 622 ); 623 return -EIO; 624 } 625 626 p_pkt = list_first_entry(&p_rx->active_descq, 627 struct qed_ll2_rx_packet, list_entry); 628 629 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) || 630 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) || 631 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) || 632 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) || 633 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) { 634 if (!p_pkt) { 635 DP_NOTICE(p_hwfn, 636 "LL2 OOO RX packet is not valid\n"); 637 return -EIO; 638 } 639 list_del(&p_pkt->list_entry); 640 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 641 p_buffer->packet_length = packet_length; 642 p_buffer->parse_flags = parse_flags; 643 p_buffer->vlan = vlan; 644 p_buffer->placement_offset = placement_offset; 645 qed_chain_consume(&p_rx->rxq_chain); 646 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 647 648 switch (iscsi_ooo->ooo_opcode) { 649 case TCP_EVENT_ADD_NEW_ISLE: 650 qed_ooo_add_new_isle(p_hwfn, 651 p_hwfn->p_ooo_info, 652 cid, 653 iscsi_ooo->ooo_isle, 654 p_buffer); 655 break; 656 case TCP_EVENT_ADD_ISLE_RIGHT: 657 qed_ooo_add_new_buffer(p_hwfn, 658 p_hwfn->p_ooo_info, 659 cid, 660 iscsi_ooo->ooo_isle, 661 p_buffer, 662 QED_OOO_RIGHT_BUF); 663 break; 664 case TCP_EVENT_ADD_ISLE_LEFT: 665 qed_ooo_add_new_buffer(p_hwfn, 666 p_hwfn->p_ooo_info, 667 cid, 668 iscsi_ooo->ooo_isle, 669 p_buffer, 670 QED_OOO_LEFT_BUF); 671 break; 672 case TCP_EVENT_JOIN: 673 qed_ooo_add_new_buffer(p_hwfn, 674 p_hwfn->p_ooo_info, 675 cid, 676 iscsi_ooo->ooo_isle + 677 1, 678 p_buffer, 679 QED_OOO_LEFT_BUF); 680 qed_ooo_join_isles(p_hwfn, 681 p_hwfn->p_ooo_info, 682 cid, iscsi_ooo->ooo_isle); 683 break; 684 case TCP_EVENT_ADD_PEN: 685 num_ooo_add_to_peninsula++; 686 qed_ooo_put_ready_buffer(p_hwfn, 687 p_hwfn->p_ooo_info, 688 p_buffer, true); 689 break; 690 } 691 } else { 692 DP_NOTICE(p_hwfn, 693 "Unexpected event (%d) TX OOO completion\n", 694 iscsi_ooo->ooo_opcode); 695 } 696 } 697 698 return 0; 699 } 700 701 static void 702 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn, 703 struct qed_ll2_info *p_ll2_conn) 704 { 705 struct qed_ll2_tx_pkt_info tx_pkt; 706 struct qed_ooo_buffer *p_buffer; 707 u16 l4_hdr_offset_w; 708 dma_addr_t first_frag; 709 u16 parse_flags; 710 u8 bd_flags; 711 int rc; 712 713 /* Submit Tx buffers here */ 714 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn, 715 p_hwfn->p_ooo_info))) { 716 l4_hdr_offset_w = 0; 717 bd_flags = 0; 718 719 first_frag = p_buffer->rx_buffer_phys_addr + 720 p_buffer->placement_offset; 721 parse_flags = p_buffer->parse_flags; 722 bd_flags = qed_ll2_convert_rx_parse_to_tx_flags(parse_flags); 723 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1); 724 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1); 725 726 memset(&tx_pkt, 0, sizeof(tx_pkt)); 727 tx_pkt.num_of_bds = 1; 728 tx_pkt.vlan = p_buffer->vlan; 729 tx_pkt.bd_flags = bd_flags; 730 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w; 731 tx_pkt.tx_dest = p_ll2_conn->tx_dest; 732 tx_pkt.first_frag = first_frag; 733 tx_pkt.first_frag_len = p_buffer->packet_length; 734 tx_pkt.cookie = p_buffer; 735 736 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id, 737 &tx_pkt, true); 738 if (rc) { 739 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info, 740 p_buffer, false); 741 break; 742 } 743 } 744 } 745 746 static void 747 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn, 748 struct qed_ll2_info *p_ll2_conn) 749 { 750 struct qed_ooo_buffer *p_buffer; 751 int rc; 752 753 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 754 p_hwfn->p_ooo_info))) { 755 rc = qed_ll2_post_rx_buffer(p_hwfn, 756 p_ll2_conn->my_id, 757 p_buffer->rx_buffer_phys_addr, 758 0, p_buffer, true); 759 if (rc) { 760 qed_ooo_put_free_buffer(p_hwfn, 761 p_hwfn->p_ooo_info, p_buffer); 762 break; 763 } 764 } 765 } 766 767 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 768 { 769 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 770 int rc; 771 772 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn); 773 if (rc) 774 return rc; 775 776 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 777 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 778 779 return 0; 780 } 781 782 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 783 { 784 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 785 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 786 struct qed_ll2_tx_packet *p_pkt = NULL; 787 struct qed_ooo_buffer *p_buffer; 788 bool b_dont_submit_rx = false; 789 u16 new_idx = 0, num_bds = 0; 790 int rc; 791 792 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 793 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 794 795 if (!num_bds) 796 return 0; 797 798 while (num_bds) { 799 if (list_empty(&p_tx->active_descq)) 800 return -EINVAL; 801 802 p_pkt = list_first_entry(&p_tx->active_descq, 803 struct qed_ll2_tx_packet, list_entry); 804 if (!p_pkt) 805 return -EINVAL; 806 807 if (p_pkt->bd_used != 1) { 808 DP_NOTICE(p_hwfn, 809 "Unexpectedly many BDs(%d) in TX OOO completion\n", 810 p_pkt->bd_used); 811 return -EINVAL; 812 } 813 814 list_del(&p_pkt->list_entry); 815 816 num_bds--; 817 p_tx->bds_idx++; 818 qed_chain_consume(&p_tx->txq_chain); 819 820 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 821 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 822 823 if (b_dont_submit_rx) { 824 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 825 p_buffer); 826 continue; 827 } 828 829 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id, 830 p_buffer->rx_buffer_phys_addr, 0, 831 p_buffer, true); 832 if (rc != 0) { 833 qed_ooo_put_free_buffer(p_hwfn, 834 p_hwfn->p_ooo_info, p_buffer); 835 b_dont_submit_rx = true; 836 } 837 } 838 839 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 840 841 return 0; 842 } 843 844 static void qed_ll2_stop_ooo(struct qed_dev *cdev) 845 { 846 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 847 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 848 849 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n", 850 *handle); 851 852 qed_ll2_terminate_connection(hwfn, *handle); 853 qed_ll2_release_connection(hwfn, *handle); 854 *handle = QED_LL2_UNUSED_HANDLE; 855 } 856 857 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn, 858 struct qed_ll2_info *p_ll2_conn, 859 u8 action_on_error) 860 { 861 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 862 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 863 struct core_rx_start_ramrod_data *p_ramrod = NULL; 864 struct qed_spq_entry *p_ent = NULL; 865 struct qed_sp_init_data init_data; 866 u16 cqe_pbl_size; 867 int rc = 0; 868 869 /* Get SPQ entry */ 870 memset(&init_data, 0, sizeof(init_data)); 871 init_data.cid = p_ll2_conn->cid; 872 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 873 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 874 875 rc = qed_sp_init_request(p_hwfn, &p_ent, 876 CORE_RAMROD_RX_QUEUE_START, 877 PROTOCOLID_CORE, &init_data); 878 if (rc) 879 return rc; 880 881 p_ramrod = &p_ent->ramrod.core_rx_queue_start; 882 883 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 884 p_ramrod->sb_index = p_rx->rx_sb_index; 885 p_ramrod->complete_event_flg = 1; 886 887 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 888 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr); 889 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain); 890 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size); 891 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, 892 qed_chain_get_pbl_phys(&p_rx->rcq_chain)); 893 894 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg; 895 p_ramrod->inner_vlan_removal_en = p_ll2_conn->input.rx_vlan_removal_en; 896 p_ramrod->queue_id = p_ll2_conn->queue_id; 897 p_ramrod->main_func_queue = (conn_type == QED_LL2_TYPE_OOO) ? 0 : 1; 898 899 if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) && 900 p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE) && 901 (conn_type != QED_LL2_TYPE_IWARP)) { 902 p_ramrod->mf_si_bcast_accept_all = 1; 903 p_ramrod->mf_si_mcast_accept_all = 1; 904 } else { 905 p_ramrod->mf_si_bcast_accept_all = 0; 906 p_ramrod->mf_si_mcast_accept_all = 0; 907 } 908 909 p_ramrod->action_on_error.error_type = action_on_error; 910 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 911 return qed_spq_post(p_hwfn, p_ent, NULL); 912 } 913 914 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn, 915 struct qed_ll2_info *p_ll2_conn) 916 { 917 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 918 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 919 struct core_tx_start_ramrod_data *p_ramrod = NULL; 920 struct qed_spq_entry *p_ent = NULL; 921 struct qed_sp_init_data init_data; 922 u16 pq_id = 0, pbl_size; 923 int rc = -EINVAL; 924 925 if (!QED_LL2_TX_REGISTERED(p_ll2_conn)) 926 return 0; 927 928 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 929 p_ll2_conn->tx_stats_en = 0; 930 else 931 p_ll2_conn->tx_stats_en = 1; 932 933 /* Get SPQ entry */ 934 memset(&init_data, 0, sizeof(init_data)); 935 init_data.cid = p_ll2_conn->cid; 936 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 937 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 938 939 rc = qed_sp_init_request(p_hwfn, &p_ent, 940 CORE_RAMROD_TX_QUEUE_START, 941 PROTOCOLID_CORE, &init_data); 942 if (rc) 943 return rc; 944 945 p_ramrod = &p_ent->ramrod.core_tx_queue_start; 946 947 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 948 p_ramrod->sb_index = p_tx->tx_sb_index; 949 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 950 p_ramrod->stats_en = p_ll2_conn->tx_stats_en; 951 p_ramrod->stats_id = p_ll2_conn->tx_stats_id; 952 953 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, 954 qed_chain_get_pbl_phys(&p_tx->txq_chain)); 955 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain); 956 p_ramrod->pbl_size = cpu_to_le16(pbl_size); 957 958 switch (p_ll2_conn->input.tx_tc) { 959 case PURE_LB_TC: 960 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB); 961 break; 962 case PKT_LB_TC: 963 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO); 964 break; 965 default: 966 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD); 967 break; 968 } 969 970 p_ramrod->qm_pq_id = cpu_to_le16(pq_id); 971 972 switch (conn_type) { 973 case QED_LL2_TYPE_FCOE: 974 p_ramrod->conn_type = PROTOCOLID_FCOE; 975 break; 976 case QED_LL2_TYPE_ISCSI: 977 p_ramrod->conn_type = PROTOCOLID_ISCSI; 978 break; 979 case QED_LL2_TYPE_ROCE: 980 p_ramrod->conn_type = PROTOCOLID_ROCE; 981 break; 982 case QED_LL2_TYPE_IWARP: 983 p_ramrod->conn_type = PROTOCOLID_IWARP; 984 break; 985 case QED_LL2_TYPE_OOO: 986 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) 987 p_ramrod->conn_type = PROTOCOLID_ISCSI; 988 else 989 p_ramrod->conn_type = PROTOCOLID_IWARP; 990 break; 991 default: 992 p_ramrod->conn_type = PROTOCOLID_ETH; 993 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type); 994 } 995 996 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 997 998 return qed_spq_post(p_hwfn, p_ent, NULL); 999 } 1000 1001 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn, 1002 struct qed_ll2_info *p_ll2_conn) 1003 { 1004 struct core_rx_stop_ramrod_data *p_ramrod = NULL; 1005 struct qed_spq_entry *p_ent = NULL; 1006 struct qed_sp_init_data init_data; 1007 int rc = -EINVAL; 1008 1009 /* Get SPQ entry */ 1010 memset(&init_data, 0, sizeof(init_data)); 1011 init_data.cid = p_ll2_conn->cid; 1012 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1013 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1014 1015 rc = qed_sp_init_request(p_hwfn, &p_ent, 1016 CORE_RAMROD_RX_QUEUE_STOP, 1017 PROTOCOLID_CORE, &init_data); 1018 if (rc) 1019 return rc; 1020 1021 p_ramrod = &p_ent->ramrod.core_rx_queue_stop; 1022 1023 p_ramrod->complete_event_flg = 1; 1024 p_ramrod->queue_id = p_ll2_conn->queue_id; 1025 1026 return qed_spq_post(p_hwfn, p_ent, NULL); 1027 } 1028 1029 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn, 1030 struct qed_ll2_info *p_ll2_conn) 1031 { 1032 struct qed_spq_entry *p_ent = NULL; 1033 struct qed_sp_init_data init_data; 1034 int rc = -EINVAL; 1035 1036 /* Get SPQ entry */ 1037 memset(&init_data, 0, sizeof(init_data)); 1038 init_data.cid = p_ll2_conn->cid; 1039 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1040 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1041 1042 rc = qed_sp_init_request(p_hwfn, &p_ent, 1043 CORE_RAMROD_TX_QUEUE_STOP, 1044 PROTOCOLID_CORE, &init_data); 1045 if (rc) 1046 return rc; 1047 1048 return qed_spq_post(p_hwfn, p_ent, NULL); 1049 } 1050 1051 static int 1052 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn, 1053 struct qed_ll2_info *p_ll2_info) 1054 { 1055 struct qed_ll2_rx_packet *p_descq; 1056 u32 capacity; 1057 int rc = 0; 1058 1059 if (!p_ll2_info->input.rx_num_desc) 1060 goto out; 1061 1062 rc = qed_chain_alloc(p_hwfn->cdev, 1063 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1064 QED_CHAIN_MODE_NEXT_PTR, 1065 QED_CHAIN_CNT_TYPE_U16, 1066 p_ll2_info->input.rx_num_desc, 1067 sizeof(struct core_rx_bd), 1068 &p_ll2_info->rx_queue.rxq_chain, NULL); 1069 if (rc) { 1070 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n"); 1071 goto out; 1072 } 1073 1074 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain); 1075 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet), 1076 GFP_KERNEL); 1077 if (!p_descq) { 1078 rc = -ENOMEM; 1079 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n"); 1080 goto out; 1081 } 1082 p_ll2_info->rx_queue.descq_array = p_descq; 1083 1084 rc = qed_chain_alloc(p_hwfn->cdev, 1085 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1086 QED_CHAIN_MODE_PBL, 1087 QED_CHAIN_CNT_TYPE_U16, 1088 p_ll2_info->input.rx_num_desc, 1089 sizeof(struct core_rx_fast_path_cqe), 1090 &p_ll2_info->rx_queue.rcq_chain, NULL); 1091 if (rc) { 1092 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n"); 1093 goto out; 1094 } 1095 1096 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1097 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n", 1098 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc); 1099 1100 out: 1101 return rc; 1102 } 1103 1104 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn, 1105 struct qed_ll2_info *p_ll2_info) 1106 { 1107 struct qed_ll2_tx_packet *p_descq; 1108 u32 capacity; 1109 int rc = 0; 1110 1111 if (!p_ll2_info->input.tx_num_desc) 1112 goto out; 1113 1114 rc = qed_chain_alloc(p_hwfn->cdev, 1115 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1116 QED_CHAIN_MODE_PBL, 1117 QED_CHAIN_CNT_TYPE_U16, 1118 p_ll2_info->input.tx_num_desc, 1119 sizeof(struct core_tx_bd), 1120 &p_ll2_info->tx_queue.txq_chain, NULL); 1121 if (rc) 1122 goto out; 1123 1124 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain); 1125 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_tx_packet), 1126 GFP_KERNEL); 1127 if (!p_descq) { 1128 rc = -ENOMEM; 1129 goto out; 1130 } 1131 p_ll2_info->tx_queue.descq_array = p_descq; 1132 1133 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1134 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n", 1135 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc); 1136 1137 out: 1138 if (rc) 1139 DP_NOTICE(p_hwfn, 1140 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n", 1141 p_ll2_info->input.tx_num_desc); 1142 return rc; 1143 } 1144 1145 static int 1146 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn, 1147 struct qed_ll2_info *p_ll2_info, u16 mtu) 1148 { 1149 struct qed_ooo_buffer *p_buf = NULL; 1150 void *p_virt; 1151 u16 buf_idx; 1152 int rc = 0; 1153 1154 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO) 1155 return rc; 1156 1157 /* Correct number of requested OOO buffers if needed */ 1158 if (!p_ll2_info->input.rx_num_ooo_buffers) { 1159 u16 num_desc = p_ll2_info->input.rx_num_desc; 1160 1161 if (!num_desc) 1162 return -EINVAL; 1163 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2; 1164 } 1165 1166 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers; 1167 buf_idx++) { 1168 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL); 1169 if (!p_buf) { 1170 rc = -ENOMEM; 1171 goto out; 1172 } 1173 1174 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE; 1175 p_buf->rx_buffer_size = (p_buf->rx_buffer_size + 1176 ETH_CACHE_LINE_SIZE - 1) & 1177 ~(ETH_CACHE_LINE_SIZE - 1); 1178 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 1179 p_buf->rx_buffer_size, 1180 &p_buf->rx_buffer_phys_addr, 1181 GFP_KERNEL); 1182 if (!p_virt) { 1183 kfree(p_buf); 1184 rc = -ENOMEM; 1185 goto out; 1186 } 1187 1188 p_buf->rx_buffer_virt_addr = p_virt; 1189 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf); 1190 } 1191 1192 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1193 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n", 1194 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size); 1195 1196 out: 1197 return rc; 1198 } 1199 1200 static int 1201 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs) 1202 { 1203 if (!cbs || (!cbs->rx_comp_cb || 1204 !cbs->rx_release_cb || 1205 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie)) 1206 return -EINVAL; 1207 1208 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb; 1209 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb; 1210 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb; 1211 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb; 1212 p_ll2_info->cbs.cookie = cbs->cookie; 1213 1214 return 0; 1215 } 1216 1217 static enum core_error_handle 1218 qed_ll2_get_error_choice(enum qed_ll2_error_handle err) 1219 { 1220 switch (err) { 1221 case QED_LL2_DROP_PACKET: 1222 return LL2_DROP_PACKET; 1223 case QED_LL2_DO_NOTHING: 1224 return LL2_DO_NOTHING; 1225 case QED_LL2_ASSERT: 1226 return LL2_ASSERT; 1227 default: 1228 return LL2_DO_NOTHING; 1229 } 1230 } 1231 1232 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data) 1233 { 1234 struct qed_hwfn *p_hwfn = cxt; 1235 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb; 1236 struct qed_ll2_info *p_ll2_info = NULL; 1237 u8 i, *p_tx_max; 1238 int rc; 1239 1240 if (!data->p_connection_handle || !p_hwfn->p_ll2_info) 1241 return -EINVAL; 1242 1243 /* Find a free connection to be used */ 1244 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) { 1245 mutex_lock(&p_hwfn->p_ll2_info[i].mutex); 1246 if (p_hwfn->p_ll2_info[i].b_active) { 1247 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1248 continue; 1249 } 1250 1251 p_hwfn->p_ll2_info[i].b_active = true; 1252 p_ll2_info = &p_hwfn->p_ll2_info[i]; 1253 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1254 break; 1255 } 1256 if (!p_ll2_info) 1257 return -EBUSY; 1258 1259 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input)); 1260 1261 p_ll2_info->tx_dest = (data->input.tx_dest == QED_LL2_TX_DEST_NW) ? 1262 CORE_TX_DEST_NW : CORE_TX_DEST_LB; 1263 1264 /* Correct maximum number of Tx BDs */ 1265 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet; 1266 if (*p_tx_max == 0) 1267 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET; 1268 else 1269 *p_tx_max = min_t(u8, *p_tx_max, 1270 CORE_LL2_TX_MAX_BDS_PER_PACKET); 1271 1272 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs); 1273 if (rc) { 1274 DP_NOTICE(p_hwfn, "Invalid callback functions\n"); 1275 goto q_allocate_fail; 1276 } 1277 1278 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info); 1279 if (rc) 1280 goto q_allocate_fail; 1281 1282 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info); 1283 if (rc) 1284 goto q_allocate_fail; 1285 1286 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info, 1287 data->input.mtu); 1288 if (rc) 1289 goto q_allocate_fail; 1290 1291 /* Register callbacks for the Rx/Tx queues */ 1292 if (data->input.conn_type == QED_LL2_TYPE_OOO) { 1293 comp_rx_cb = qed_ll2_lb_rxq_completion; 1294 comp_tx_cb = qed_ll2_lb_txq_completion; 1295 } else { 1296 comp_rx_cb = qed_ll2_rxq_completion; 1297 comp_tx_cb = qed_ll2_txq_completion; 1298 } 1299 1300 if (data->input.rx_num_desc) { 1301 qed_int_register_cb(p_hwfn, comp_rx_cb, 1302 &p_hwfn->p_ll2_info[i], 1303 &p_ll2_info->rx_queue.rx_sb_index, 1304 &p_ll2_info->rx_queue.p_fw_cons); 1305 p_ll2_info->rx_queue.b_cb_registred = true; 1306 } 1307 1308 if (data->input.tx_num_desc) { 1309 qed_int_register_cb(p_hwfn, 1310 comp_tx_cb, 1311 &p_hwfn->p_ll2_info[i], 1312 &p_ll2_info->tx_queue.tx_sb_index, 1313 &p_ll2_info->tx_queue.p_fw_cons); 1314 p_ll2_info->tx_queue.b_cb_registred = true; 1315 } 1316 1317 *data->p_connection_handle = i; 1318 return rc; 1319 1320 q_allocate_fail: 1321 qed_ll2_release_connection(p_hwfn, i); 1322 return -ENOMEM; 1323 } 1324 1325 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn, 1326 struct qed_ll2_info *p_ll2_conn) 1327 { 1328 enum qed_ll2_error_handle error_input; 1329 enum core_error_handle error_mode; 1330 u8 action_on_error = 0; 1331 1332 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) 1333 return 0; 1334 1335 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0); 1336 error_input = p_ll2_conn->input.ai_err_packet_too_big; 1337 error_mode = qed_ll2_get_error_choice(error_input); 1338 SET_FIELD(action_on_error, 1339 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode); 1340 error_input = p_ll2_conn->input.ai_err_no_buf; 1341 error_mode = qed_ll2_get_error_choice(error_input); 1342 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode); 1343 1344 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error); 1345 } 1346 1347 static void 1348 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn, 1349 struct qed_ll2_info *p_ll2_conn) 1350 { 1351 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1352 return; 1353 1354 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1355 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 1356 } 1357 1358 int qed_ll2_establish_connection(void *cxt, u8 connection_handle) 1359 { 1360 struct qed_hwfn *p_hwfn = cxt; 1361 struct qed_ll2_info *p_ll2_conn; 1362 struct qed_ll2_rx_queue *p_rx; 1363 struct qed_ll2_tx_queue *p_tx; 1364 struct qed_ptt *p_ptt; 1365 int rc = -EINVAL; 1366 u32 i, capacity; 1367 u8 qid; 1368 1369 p_ptt = qed_ptt_acquire(p_hwfn); 1370 if (!p_ptt) 1371 return -EAGAIN; 1372 1373 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1374 if (!p_ll2_conn) { 1375 rc = -EINVAL; 1376 goto out; 1377 } 1378 1379 p_rx = &p_ll2_conn->rx_queue; 1380 p_tx = &p_ll2_conn->tx_queue; 1381 1382 qed_chain_reset(&p_rx->rxq_chain); 1383 qed_chain_reset(&p_rx->rcq_chain); 1384 INIT_LIST_HEAD(&p_rx->active_descq); 1385 INIT_LIST_HEAD(&p_rx->free_descq); 1386 INIT_LIST_HEAD(&p_rx->posting_descq); 1387 spin_lock_init(&p_rx->lock); 1388 capacity = qed_chain_get_capacity(&p_rx->rxq_chain); 1389 for (i = 0; i < capacity; i++) 1390 list_add_tail(&p_rx->descq_array[i].list_entry, 1391 &p_rx->free_descq); 1392 *p_rx->p_fw_cons = 0; 1393 1394 qed_chain_reset(&p_tx->txq_chain); 1395 INIT_LIST_HEAD(&p_tx->active_descq); 1396 INIT_LIST_HEAD(&p_tx->free_descq); 1397 INIT_LIST_HEAD(&p_tx->sending_descq); 1398 spin_lock_init(&p_tx->lock); 1399 capacity = qed_chain_get_capacity(&p_tx->txq_chain); 1400 for (i = 0; i < capacity; i++) 1401 list_add_tail(&p_tx->descq_array[i].list_entry, 1402 &p_tx->free_descq); 1403 p_tx->cur_completing_bd_idx = 0; 1404 p_tx->bds_idx = 0; 1405 p_tx->b_completing_packet = false; 1406 p_tx->cur_send_packet = NULL; 1407 p_tx->cur_send_frag_num = 0; 1408 p_tx->cur_completing_frag_num = 0; 1409 *p_tx->p_fw_cons = 0; 1410 1411 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid); 1412 if (rc) 1413 goto out; 1414 1415 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle; 1416 p_ll2_conn->queue_id = qid; 1417 p_ll2_conn->tx_stats_id = qid; 1418 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview + 1419 GTT_BAR0_MAP_REG_TSDM_RAM + 1420 TSTORM_LL2_RX_PRODS_OFFSET(qid); 1421 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells + 1422 qed_db_addr(p_ll2_conn->cid, 1423 DQ_DEMS_LEGACY); 1424 1425 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn); 1426 if (rc) 1427 goto out; 1428 1429 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn); 1430 if (rc) 1431 goto out; 1432 1433 if (!QED_IS_RDMA_PERSONALITY(p_hwfn)) 1434 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1); 1435 1436 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn); 1437 1438 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1439 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1440 0x8906, 0, 1441 QED_LLH_FILTER_ETHERTYPE); 1442 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1443 0x8914, 0, 1444 QED_LLH_FILTER_ETHERTYPE); 1445 } 1446 1447 out: 1448 qed_ptt_release(p_hwfn, p_ptt); 1449 return rc; 1450 } 1451 1452 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn, 1453 struct qed_ll2_rx_queue *p_rx, 1454 struct qed_ll2_rx_packet *p_curp) 1455 { 1456 struct qed_ll2_rx_packet *p_posting_packet = NULL; 1457 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 }; 1458 bool b_notify_fw = false; 1459 u16 bd_prod, cq_prod; 1460 1461 /* This handles the flushing of already posted buffers */ 1462 while (!list_empty(&p_rx->posting_descq)) { 1463 p_posting_packet = list_first_entry(&p_rx->posting_descq, 1464 struct qed_ll2_rx_packet, 1465 list_entry); 1466 list_move_tail(&p_posting_packet->list_entry, 1467 &p_rx->active_descq); 1468 b_notify_fw = true; 1469 } 1470 1471 /* This handles the supplied packet [if there is one] */ 1472 if (p_curp) { 1473 list_add_tail(&p_curp->list_entry, &p_rx->active_descq); 1474 b_notify_fw = true; 1475 } 1476 1477 if (!b_notify_fw) 1478 return; 1479 1480 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain); 1481 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain); 1482 rx_prod.bd_prod = cpu_to_le16(bd_prod); 1483 rx_prod.cqe_prod = cpu_to_le16(cq_prod); 1484 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod)); 1485 } 1486 1487 int qed_ll2_post_rx_buffer(void *cxt, 1488 u8 connection_handle, 1489 dma_addr_t addr, 1490 u16 buf_len, void *cookie, u8 notify_fw) 1491 { 1492 struct qed_hwfn *p_hwfn = cxt; 1493 struct core_rx_bd_with_buff_len *p_curb = NULL; 1494 struct qed_ll2_rx_packet *p_curp = NULL; 1495 struct qed_ll2_info *p_ll2_conn; 1496 struct qed_ll2_rx_queue *p_rx; 1497 unsigned long flags; 1498 void *p_data; 1499 int rc = 0; 1500 1501 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1502 if (!p_ll2_conn) 1503 return -EINVAL; 1504 p_rx = &p_ll2_conn->rx_queue; 1505 1506 spin_lock_irqsave(&p_rx->lock, flags); 1507 if (!list_empty(&p_rx->free_descq)) 1508 p_curp = list_first_entry(&p_rx->free_descq, 1509 struct qed_ll2_rx_packet, list_entry); 1510 if (p_curp) { 1511 if (qed_chain_get_elem_left(&p_rx->rxq_chain) && 1512 qed_chain_get_elem_left(&p_rx->rcq_chain)) { 1513 p_data = qed_chain_produce(&p_rx->rxq_chain); 1514 p_curb = (struct core_rx_bd_with_buff_len *)p_data; 1515 qed_chain_produce(&p_rx->rcq_chain); 1516 } 1517 } 1518 1519 /* If we're lacking entires, let's try to flush buffers to FW */ 1520 if (!p_curp || !p_curb) { 1521 rc = -EBUSY; 1522 p_curp = NULL; 1523 goto out_notify; 1524 } 1525 1526 /* We have an Rx packet we can fill */ 1527 DMA_REGPAIR_LE(p_curb->addr, addr); 1528 p_curb->buff_length = cpu_to_le16(buf_len); 1529 p_curp->rx_buf_addr = addr; 1530 p_curp->cookie = cookie; 1531 p_curp->rxq_bd = p_curb; 1532 p_curp->buf_length = buf_len; 1533 list_del(&p_curp->list_entry); 1534 1535 /* Check if we only want to enqueue this packet without informing FW */ 1536 if (!notify_fw) { 1537 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq); 1538 goto out; 1539 } 1540 1541 out_notify: 1542 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp); 1543 out: 1544 spin_unlock_irqrestore(&p_rx->lock, flags); 1545 return rc; 1546 } 1547 1548 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn, 1549 struct qed_ll2_tx_queue *p_tx, 1550 struct qed_ll2_tx_packet *p_curp, 1551 struct qed_ll2_tx_pkt_info *pkt, 1552 u8 notify_fw) 1553 { 1554 list_del(&p_curp->list_entry); 1555 p_curp->cookie = pkt->cookie; 1556 p_curp->bd_used = pkt->num_of_bds; 1557 p_curp->notify_fw = notify_fw; 1558 p_tx->cur_send_packet = p_curp; 1559 p_tx->cur_send_frag_num = 0; 1560 1561 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag; 1562 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len; 1563 p_tx->cur_send_frag_num++; 1564 } 1565 1566 static void 1567 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn, 1568 struct qed_ll2_info *p_ll2, 1569 struct qed_ll2_tx_packet *p_curp, 1570 struct qed_ll2_tx_pkt_info *pkt) 1571 { 1572 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain; 1573 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain); 1574 struct core_tx_bd *start_bd = NULL; 1575 enum core_roce_flavor_type roce_flavor; 1576 enum core_tx_dest tx_dest; 1577 u16 bd_data = 0, frag_idx; 1578 1579 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE 1580 : CORE_RROCE; 1581 1582 tx_dest = (pkt->tx_dest == QED_LL2_TX_DEST_NW) ? CORE_TX_DEST_NW 1583 : CORE_TX_DEST_LB; 1584 1585 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1586 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan); 1587 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, 1588 cpu_to_le16(pkt->l4_hdr_offset_w)); 1589 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest); 1590 bd_data |= pkt->bd_flags; 1591 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1); 1592 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds); 1593 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor); 1594 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data); 1595 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag); 1596 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len); 1597 1598 DP_VERBOSE(p_hwfn, 1599 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1600 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n", 1601 p_ll2->queue_id, 1602 p_ll2->cid, 1603 p_ll2->input.conn_type, 1604 prod_idx, 1605 pkt->first_frag_len, 1606 pkt->num_of_bds, 1607 le32_to_cpu(start_bd->addr.hi), 1608 le32_to_cpu(start_bd->addr.lo)); 1609 1610 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds) 1611 return; 1612 1613 /* Need to provide the packet with additional BDs for frags */ 1614 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num; 1615 frag_idx < pkt->num_of_bds; frag_idx++) { 1616 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd; 1617 1618 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1619 (*p_bd)->bd_data.as_bitfield = 0; 1620 (*p_bd)->bitfield1 = 0; 1621 p_curp->bds_set[frag_idx].tx_frag = 0; 1622 p_curp->bds_set[frag_idx].frag_len = 0; 1623 } 1624 } 1625 1626 /* This should be called while the Txq spinlock is being held */ 1627 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn, 1628 struct qed_ll2_info *p_ll2_conn) 1629 { 1630 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw; 1631 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 1632 struct qed_ll2_tx_packet *p_pkt = NULL; 1633 struct core_db_data db_msg = { 0, 0, 0 }; 1634 u16 bd_prod; 1635 1636 /* If there are missing BDs, don't do anything now */ 1637 if (p_ll2_conn->tx_queue.cur_send_frag_num != 1638 p_ll2_conn->tx_queue.cur_send_packet->bd_used) 1639 return; 1640 1641 /* Push the current packet to the list and clean after it */ 1642 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry, 1643 &p_ll2_conn->tx_queue.sending_descq); 1644 p_ll2_conn->tx_queue.cur_send_packet = NULL; 1645 p_ll2_conn->tx_queue.cur_send_frag_num = 0; 1646 1647 /* Notify FW of packet only if requested to */ 1648 if (!b_notify) 1649 return; 1650 1651 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain); 1652 1653 while (!list_empty(&p_tx->sending_descq)) { 1654 p_pkt = list_first_entry(&p_tx->sending_descq, 1655 struct qed_ll2_tx_packet, list_entry); 1656 if (!p_pkt) 1657 break; 1658 1659 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq); 1660 } 1661 1662 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM); 1663 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 1664 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL, 1665 DQ_XCM_CORE_TX_BD_PROD_CMD); 1666 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD; 1667 db_msg.spq_prod = cpu_to_le16(bd_prod); 1668 1669 /* Make sure the BDs data is updated before ringing the doorbell */ 1670 wmb(); 1671 1672 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg)); 1673 1674 DP_VERBOSE(p_hwfn, 1675 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1676 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n", 1677 p_ll2_conn->queue_id, 1678 p_ll2_conn->cid, 1679 p_ll2_conn->input.conn_type, db_msg.spq_prod); 1680 } 1681 1682 int qed_ll2_prepare_tx_packet(void *cxt, 1683 u8 connection_handle, 1684 struct qed_ll2_tx_pkt_info *pkt, 1685 bool notify_fw) 1686 { 1687 struct qed_hwfn *p_hwfn = cxt; 1688 struct qed_ll2_tx_packet *p_curp = NULL; 1689 struct qed_ll2_info *p_ll2_conn = NULL; 1690 struct qed_ll2_tx_queue *p_tx; 1691 struct qed_chain *p_tx_chain; 1692 unsigned long flags; 1693 int rc = 0; 1694 1695 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1696 if (!p_ll2_conn) 1697 return -EINVAL; 1698 p_tx = &p_ll2_conn->tx_queue; 1699 p_tx_chain = &p_tx->txq_chain; 1700 1701 if (pkt->num_of_bds > CORE_LL2_TX_MAX_BDS_PER_PACKET) 1702 return -EIO; 1703 1704 spin_lock_irqsave(&p_tx->lock, flags); 1705 if (p_tx->cur_send_packet) { 1706 rc = -EEXIST; 1707 goto out; 1708 } 1709 1710 /* Get entry, but only if we have tx elements for it */ 1711 if (!list_empty(&p_tx->free_descq)) 1712 p_curp = list_first_entry(&p_tx->free_descq, 1713 struct qed_ll2_tx_packet, list_entry); 1714 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds) 1715 p_curp = NULL; 1716 1717 if (!p_curp) { 1718 rc = -EBUSY; 1719 goto out; 1720 } 1721 1722 /* Prepare packet and BD, and perhaps send a doorbell to FW */ 1723 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw); 1724 1725 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt); 1726 1727 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1728 1729 out: 1730 spin_unlock_irqrestore(&p_tx->lock, flags); 1731 return rc; 1732 } 1733 1734 int qed_ll2_set_fragment_of_tx_packet(void *cxt, 1735 u8 connection_handle, 1736 dma_addr_t addr, u16 nbytes) 1737 { 1738 struct qed_ll2_tx_packet *p_cur_send_packet = NULL; 1739 struct qed_hwfn *p_hwfn = cxt; 1740 struct qed_ll2_info *p_ll2_conn = NULL; 1741 u16 cur_send_frag_num = 0; 1742 struct core_tx_bd *p_bd; 1743 unsigned long flags; 1744 1745 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1746 if (!p_ll2_conn) 1747 return -EINVAL; 1748 1749 if (!p_ll2_conn->tx_queue.cur_send_packet) 1750 return -EINVAL; 1751 1752 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet; 1753 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num; 1754 1755 if (cur_send_frag_num >= p_cur_send_packet->bd_used) 1756 return -EINVAL; 1757 1758 /* Fill the BD information, and possibly notify FW */ 1759 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd; 1760 DMA_REGPAIR_LE(p_bd->addr, addr); 1761 p_bd->nbytes = cpu_to_le16(nbytes); 1762 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr; 1763 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes; 1764 1765 p_ll2_conn->tx_queue.cur_send_frag_num++; 1766 1767 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags); 1768 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1769 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags); 1770 1771 return 0; 1772 } 1773 1774 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle) 1775 { 1776 struct qed_hwfn *p_hwfn = cxt; 1777 struct qed_ll2_info *p_ll2_conn = NULL; 1778 int rc = -EINVAL; 1779 struct qed_ptt *p_ptt; 1780 1781 p_ptt = qed_ptt_acquire(p_hwfn); 1782 if (!p_ptt) 1783 return -EAGAIN; 1784 1785 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1786 if (!p_ll2_conn) { 1787 rc = -EINVAL; 1788 goto out; 1789 } 1790 1791 /* Stop Tx & Rx of connection, if needed */ 1792 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1793 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn); 1794 if (rc) 1795 goto out; 1796 qed_ll2_txq_flush(p_hwfn, connection_handle); 1797 } 1798 1799 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1800 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn); 1801 if (rc) 1802 goto out; 1803 qed_ll2_rxq_flush(p_hwfn, connection_handle); 1804 } 1805 1806 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 1807 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1808 1809 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1810 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1811 0x8906, 0, 1812 QED_LLH_FILTER_ETHERTYPE); 1813 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1814 0x8914, 0, 1815 QED_LLH_FILTER_ETHERTYPE); 1816 } 1817 1818 out: 1819 qed_ptt_release(p_hwfn, p_ptt); 1820 return rc; 1821 } 1822 1823 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn, 1824 struct qed_ll2_info *p_ll2_conn) 1825 { 1826 struct qed_ooo_buffer *p_buffer; 1827 1828 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1829 return; 1830 1831 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1832 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 1833 p_hwfn->p_ooo_info))) { 1834 dma_free_coherent(&p_hwfn->cdev->pdev->dev, 1835 p_buffer->rx_buffer_size, 1836 p_buffer->rx_buffer_virt_addr, 1837 p_buffer->rx_buffer_phys_addr); 1838 kfree(p_buffer); 1839 } 1840 } 1841 1842 void qed_ll2_release_connection(void *cxt, u8 connection_handle) 1843 { 1844 struct qed_hwfn *p_hwfn = cxt; 1845 struct qed_ll2_info *p_ll2_conn = NULL; 1846 1847 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1848 if (!p_ll2_conn) 1849 return; 1850 1851 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1852 p_ll2_conn->rx_queue.b_cb_registred = false; 1853 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index); 1854 } 1855 1856 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1857 p_ll2_conn->tx_queue.b_cb_registred = false; 1858 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index); 1859 } 1860 1861 kfree(p_ll2_conn->tx_queue.descq_array); 1862 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain); 1863 1864 kfree(p_ll2_conn->rx_queue.descq_array); 1865 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain); 1866 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain); 1867 1868 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid); 1869 1870 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn); 1871 1872 mutex_lock(&p_ll2_conn->mutex); 1873 p_ll2_conn->b_active = false; 1874 mutex_unlock(&p_ll2_conn->mutex); 1875 } 1876 1877 int qed_ll2_alloc(struct qed_hwfn *p_hwfn) 1878 { 1879 struct qed_ll2_info *p_ll2_connections; 1880 u8 i; 1881 1882 /* Allocate LL2's set struct */ 1883 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS, 1884 sizeof(struct qed_ll2_info), GFP_KERNEL); 1885 if (!p_ll2_connections) { 1886 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n"); 1887 return -ENOMEM; 1888 } 1889 1890 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 1891 p_ll2_connections[i].my_id = i; 1892 1893 p_hwfn->p_ll2_info = p_ll2_connections; 1894 return 0; 1895 } 1896 1897 void qed_ll2_setup(struct qed_hwfn *p_hwfn) 1898 { 1899 int i; 1900 1901 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 1902 mutex_init(&p_hwfn->p_ll2_info[i].mutex); 1903 } 1904 1905 void qed_ll2_free(struct qed_hwfn *p_hwfn) 1906 { 1907 if (!p_hwfn->p_ll2_info) 1908 return; 1909 1910 kfree(p_hwfn->p_ll2_info); 1911 p_hwfn->p_ll2_info = NULL; 1912 } 1913 1914 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn, 1915 struct qed_ptt *p_ptt, 1916 struct qed_ll2_stats *p_stats) 1917 { 1918 struct core_ll2_port_stats port_stats; 1919 1920 memset(&port_stats, 0, sizeof(port_stats)); 1921 qed_memcpy_from(p_hwfn, p_ptt, &port_stats, 1922 BAR0_MAP_REG_TSDM_RAM + 1923 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)), 1924 sizeof(port_stats)); 1925 1926 p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr); 1927 p_stats->gsi_invalid_pkt_length = 1928 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length); 1929 p_stats->gsi_unsupported_pkt_typ = 1930 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ); 1931 p_stats->gsi_crcchksm_error = 1932 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error); 1933 } 1934 1935 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn, 1936 struct qed_ptt *p_ptt, 1937 struct qed_ll2_info *p_ll2_conn, 1938 struct qed_ll2_stats *p_stats) 1939 { 1940 struct core_ll2_tstorm_per_queue_stat tstats; 1941 u8 qid = p_ll2_conn->queue_id; 1942 u32 tstats_addr; 1943 1944 memset(&tstats, 0, sizeof(tstats)); 1945 tstats_addr = BAR0_MAP_REG_TSDM_RAM + 1946 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid); 1947 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats)); 1948 1949 p_stats->packet_too_big_discard = 1950 HILO_64_REGPAIR(tstats.packet_too_big_discard); 1951 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard); 1952 } 1953 1954 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn, 1955 struct qed_ptt *p_ptt, 1956 struct qed_ll2_info *p_ll2_conn, 1957 struct qed_ll2_stats *p_stats) 1958 { 1959 struct core_ll2_ustorm_per_queue_stat ustats; 1960 u8 qid = p_ll2_conn->queue_id; 1961 u32 ustats_addr; 1962 1963 memset(&ustats, 0, sizeof(ustats)); 1964 ustats_addr = BAR0_MAP_REG_USDM_RAM + 1965 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid); 1966 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats)); 1967 1968 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes); 1969 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes); 1970 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes); 1971 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts); 1972 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts); 1973 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts); 1974 } 1975 1976 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn, 1977 struct qed_ptt *p_ptt, 1978 struct qed_ll2_info *p_ll2_conn, 1979 struct qed_ll2_stats *p_stats) 1980 { 1981 struct core_ll2_pstorm_per_queue_stat pstats; 1982 u8 stats_id = p_ll2_conn->tx_stats_id; 1983 u32 pstats_addr; 1984 1985 memset(&pstats, 0, sizeof(pstats)); 1986 pstats_addr = BAR0_MAP_REG_PSDM_RAM + 1987 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id); 1988 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats)); 1989 1990 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes); 1991 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes); 1992 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes); 1993 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts); 1994 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts); 1995 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts); 1996 } 1997 1998 int qed_ll2_get_stats(void *cxt, 1999 u8 connection_handle, struct qed_ll2_stats *p_stats) 2000 { 2001 struct qed_hwfn *p_hwfn = cxt; 2002 struct qed_ll2_info *p_ll2_conn = NULL; 2003 struct qed_ptt *p_ptt; 2004 2005 memset(p_stats, 0, sizeof(*p_stats)); 2006 2007 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) || 2008 !p_hwfn->p_ll2_info) 2009 return -EINVAL; 2010 2011 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 2012 2013 p_ptt = qed_ptt_acquire(p_hwfn); 2014 if (!p_ptt) { 2015 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 2016 return -EINVAL; 2017 } 2018 2019 if (p_ll2_conn->input.gsi_enable) 2020 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats); 2021 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2022 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2023 if (p_ll2_conn->tx_stats_en) 2024 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2025 2026 qed_ptt_release(p_hwfn, p_ptt); 2027 return 0; 2028 } 2029 2030 static void qed_ll2b_release_rx_packet(void *cxt, 2031 u8 connection_handle, 2032 void *cookie, 2033 dma_addr_t rx_buf_addr, 2034 bool b_last_packet) 2035 { 2036 struct qed_hwfn *p_hwfn = cxt; 2037 2038 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie); 2039 } 2040 2041 static void qed_ll2_register_cb_ops(struct qed_dev *cdev, 2042 const struct qed_ll2_cb_ops *ops, 2043 void *cookie) 2044 { 2045 cdev->ll2->cbs = ops; 2046 cdev->ll2->cb_cookie = cookie; 2047 } 2048 2049 struct qed_ll2_cbs ll2_cbs = { 2050 .rx_comp_cb = &qed_ll2b_complete_rx_packet, 2051 .rx_release_cb = &qed_ll2b_release_rx_packet, 2052 .tx_comp_cb = &qed_ll2b_complete_tx_packet, 2053 .tx_release_cb = &qed_ll2b_complete_tx_packet, 2054 }; 2055 2056 static void qed_ll2_set_conn_data(struct qed_dev *cdev, 2057 struct qed_ll2_acquire_data *data, 2058 struct qed_ll2_params *params, 2059 enum qed_ll2_conn_type conn_type, 2060 u8 *handle, bool lb) 2061 { 2062 memset(data, 0, sizeof(*data)); 2063 2064 data->input.conn_type = conn_type; 2065 data->input.mtu = params->mtu; 2066 data->input.rx_num_desc = QED_LL2_RX_SIZE; 2067 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets; 2068 data->input.rx_vlan_removal_en = params->rx_vlan_stripping; 2069 data->input.tx_num_desc = QED_LL2_TX_SIZE; 2070 data->p_connection_handle = handle; 2071 data->cbs = &ll2_cbs; 2072 ll2_cbs.cookie = QED_LEADING_HWFN(cdev); 2073 2074 if (lb) { 2075 data->input.tx_tc = PKT_LB_TC; 2076 data->input.tx_dest = QED_LL2_TX_DEST_LB; 2077 } else { 2078 data->input.tx_tc = 0; 2079 data->input.tx_dest = QED_LL2_TX_DEST_NW; 2080 } 2081 } 2082 2083 static int qed_ll2_start_ooo(struct qed_dev *cdev, 2084 struct qed_ll2_params *params) 2085 { 2086 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2087 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 2088 struct qed_ll2_acquire_data data; 2089 int rc; 2090 2091 qed_ll2_set_conn_data(cdev, &data, params, 2092 QED_LL2_TYPE_OOO, handle, true); 2093 2094 rc = qed_ll2_acquire_connection(hwfn, &data); 2095 if (rc) { 2096 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n"); 2097 goto out; 2098 } 2099 2100 rc = qed_ll2_establish_connection(hwfn, *handle); 2101 if (rc) { 2102 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n"); 2103 goto fail; 2104 } 2105 2106 return 0; 2107 2108 fail: 2109 qed_ll2_release_connection(hwfn, *handle); 2110 out: 2111 *handle = QED_LL2_UNUSED_HANDLE; 2112 return rc; 2113 } 2114 2115 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params) 2116 { 2117 struct qed_ll2_buffer *buffer, *tmp_buffer; 2118 enum qed_ll2_conn_type conn_type; 2119 struct qed_ll2_acquire_data data; 2120 struct qed_ptt *p_ptt; 2121 int rc, i; 2122 2123 2124 /* Initialize LL2 locks & lists */ 2125 INIT_LIST_HEAD(&cdev->ll2->list); 2126 spin_lock_init(&cdev->ll2->lock); 2127 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN + 2128 L1_CACHE_BYTES + params->mtu; 2129 2130 /*Allocate memory for LL2 */ 2131 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n", 2132 cdev->ll2->rx_size); 2133 for (i = 0; i < QED_LL2_RX_SIZE; i++) { 2134 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); 2135 if (!buffer) { 2136 DP_INFO(cdev, "Failed to allocate LL2 buffers\n"); 2137 goto fail; 2138 } 2139 2140 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data, 2141 &buffer->phys_addr); 2142 if (rc) { 2143 kfree(buffer); 2144 goto fail; 2145 } 2146 2147 list_add_tail(&buffer->list, &cdev->ll2->list); 2148 } 2149 2150 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) { 2151 case QED_PCI_FCOE: 2152 conn_type = QED_LL2_TYPE_FCOE; 2153 break; 2154 case QED_PCI_ISCSI: 2155 conn_type = QED_LL2_TYPE_ISCSI; 2156 break; 2157 case QED_PCI_ETH_ROCE: 2158 conn_type = QED_LL2_TYPE_ROCE; 2159 break; 2160 default: 2161 conn_type = QED_LL2_TYPE_TEST; 2162 } 2163 2164 qed_ll2_set_conn_data(cdev, &data, params, conn_type, 2165 &cdev->ll2->handle, false); 2166 2167 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data); 2168 if (rc) { 2169 DP_INFO(cdev, "Failed to acquire LL2 connection\n"); 2170 goto fail; 2171 } 2172 2173 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev), 2174 cdev->ll2->handle); 2175 if (rc) { 2176 DP_INFO(cdev, "Failed to establish LL2 connection\n"); 2177 goto release_fail; 2178 } 2179 2180 /* Post all Rx buffers to FW */ 2181 spin_lock_bh(&cdev->ll2->lock); 2182 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) { 2183 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), 2184 cdev->ll2->handle, 2185 buffer->phys_addr, 0, buffer, 1); 2186 if (rc) { 2187 DP_INFO(cdev, 2188 "Failed to post an Rx buffer; Deleting it\n"); 2189 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 2190 cdev->ll2->rx_size, DMA_FROM_DEVICE); 2191 kfree(buffer->data); 2192 list_del(&buffer->list); 2193 kfree(buffer); 2194 } else { 2195 cdev->ll2->rx_cnt++; 2196 } 2197 } 2198 spin_unlock_bh(&cdev->ll2->lock); 2199 2200 if (!cdev->ll2->rx_cnt) { 2201 DP_INFO(cdev, "Failed passing even a single Rx buffer\n"); 2202 goto release_terminate; 2203 } 2204 2205 if (!is_valid_ether_addr(params->ll2_mac_address)) { 2206 DP_INFO(cdev, "Invalid Ethernet address\n"); 2207 goto release_terminate; 2208 } 2209 2210 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI && 2211 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) { 2212 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n"); 2213 rc = qed_ll2_start_ooo(cdev, params); 2214 if (rc) { 2215 DP_INFO(cdev, 2216 "Failed to initialize the OOO LL2 queue\n"); 2217 goto release_terminate; 2218 } 2219 } 2220 2221 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2222 if (!p_ptt) { 2223 DP_INFO(cdev, "Failed to acquire PTT\n"); 2224 goto release_terminate; 2225 } 2226 2227 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2228 params->ll2_mac_address); 2229 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2230 if (rc) { 2231 DP_ERR(cdev, "Failed to allocate LLH filter\n"); 2232 goto release_terminate_all; 2233 } 2234 2235 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address); 2236 return 0; 2237 2238 release_terminate_all: 2239 2240 release_terminate: 2241 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2242 release_fail: 2243 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2244 fail: 2245 qed_ll2_kill_buffers(cdev); 2246 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2247 return -EINVAL; 2248 } 2249 2250 static int qed_ll2_stop(struct qed_dev *cdev) 2251 { 2252 struct qed_ptt *p_ptt; 2253 int rc; 2254 2255 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE) 2256 return 0; 2257 2258 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2259 if (!p_ptt) { 2260 DP_INFO(cdev, "Failed to acquire PTT\n"); 2261 goto fail; 2262 } 2263 2264 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2265 cdev->ll2_mac_address); 2266 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2267 eth_zero_addr(cdev->ll2_mac_address); 2268 2269 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI && 2270 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) 2271 qed_ll2_stop_ooo(cdev); 2272 2273 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), 2274 cdev->ll2->handle); 2275 if (rc) 2276 DP_INFO(cdev, "Failed to terminate LL2 connection\n"); 2277 2278 qed_ll2_kill_buffers(cdev); 2279 2280 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2281 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2282 2283 return rc; 2284 fail: 2285 return -EINVAL; 2286 } 2287 2288 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb) 2289 { 2290 struct qed_ll2_tx_pkt_info pkt; 2291 const skb_frag_t *frag; 2292 int rc = -EINVAL, i; 2293 dma_addr_t mapping; 2294 u16 vlan = 0; 2295 u8 flags = 0; 2296 2297 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) { 2298 DP_INFO(cdev, "Cannot transmit a checksumed packet\n"); 2299 return -EINVAL; 2300 } 2301 2302 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) { 2303 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n", 2304 1 + skb_shinfo(skb)->nr_frags); 2305 return -EINVAL; 2306 } 2307 2308 mapping = dma_map_single(&cdev->pdev->dev, skb->data, 2309 skb->len, DMA_TO_DEVICE); 2310 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2311 DP_NOTICE(cdev, "SKB mapping failed\n"); 2312 return -EINVAL; 2313 } 2314 2315 /* Request HW to calculate IP csum */ 2316 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) && 2317 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 2318 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT); 2319 2320 if (skb_vlan_tag_present(skb)) { 2321 vlan = skb_vlan_tag_get(skb); 2322 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT); 2323 } 2324 2325 memset(&pkt, 0, sizeof(pkt)); 2326 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags; 2327 pkt.vlan = vlan; 2328 pkt.bd_flags = flags; 2329 pkt.tx_dest = QED_LL2_TX_DEST_NW; 2330 pkt.first_frag = mapping; 2331 pkt.first_frag_len = skb->len; 2332 pkt.cookie = skb; 2333 2334 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle, 2335 &pkt, 1); 2336 if (rc) 2337 goto err; 2338 2339 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 2340 frag = &skb_shinfo(skb)->frags[i]; 2341 2342 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0, 2343 skb_frag_size(frag), DMA_TO_DEVICE); 2344 2345 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2346 DP_NOTICE(cdev, 2347 "Unable to map frag - dropping packet\n"); 2348 goto err; 2349 } 2350 2351 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev), 2352 cdev->ll2->handle, 2353 mapping, 2354 skb_frag_size(frag)); 2355 2356 /* if failed not much to do here, partial packet has been posted 2357 * we can't free memory, will need to wait for completion. 2358 */ 2359 if (rc) 2360 goto err2; 2361 } 2362 2363 return 0; 2364 2365 err: 2366 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE); 2367 2368 err2: 2369 return rc; 2370 } 2371 2372 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats) 2373 { 2374 if (!cdev->ll2) 2375 return -EINVAL; 2376 2377 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev), 2378 cdev->ll2->handle, stats); 2379 } 2380 2381 const struct qed_ll2_ops qed_ll2_ops_pass = { 2382 .start = &qed_ll2_start, 2383 .stop = &qed_ll2_stop, 2384 .start_xmit = &qed_ll2_start_xmit, 2385 .register_cb_ops = &qed_ll2_register_cb_ops, 2386 .get_stats = &qed_ll2_stats, 2387 }; 2388 2389 int qed_ll2_alloc_if(struct qed_dev *cdev) 2390 { 2391 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL); 2392 return cdev->ll2 ? 0 : -ENOMEM; 2393 } 2394 2395 void qed_ll2_dealloc_if(struct qed_dev *cdev) 2396 { 2397 kfree(cdev->ll2); 2398 cdev->ll2 = NULL; 2399 } 2400