1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/if_vlan.h> 37 #include <linux/kernel.h> 38 #include <linux/pci.h> 39 #include <linux/slab.h> 40 #include <linux/stddef.h> 41 #include <linux/workqueue.h> 42 #include <net/ipv6.h> 43 #include <linux/bitops.h> 44 #include <linux/delay.h> 45 #include <linux/errno.h> 46 #include <linux/etherdevice.h> 47 #include <linux/io.h> 48 #include <linux/list.h> 49 #include <linux/mutex.h> 50 #include <linux/spinlock.h> 51 #include <linux/string.h> 52 #include <linux/qed/qed_ll2_if.h> 53 #include "qed.h" 54 #include "qed_cxt.h" 55 #include "qed_dev_api.h" 56 #include "qed_hsi.h" 57 #include "qed_hw.h" 58 #include "qed_int.h" 59 #include "qed_ll2.h" 60 #include "qed_mcp.h" 61 #include "qed_ooo.h" 62 #include "qed_reg_addr.h" 63 #include "qed_sp.h" 64 #include "qed_rdma.h" 65 66 #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registered) 67 #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registered) 68 69 #define QED_LL2_TX_SIZE (256) 70 #define QED_LL2_RX_SIZE (4096) 71 72 struct qed_cb_ll2_info { 73 int rx_cnt; 74 u32 rx_size; 75 u8 handle; 76 77 /* Lock protecting LL2 buffer lists in sleepless context */ 78 spinlock_t lock; 79 struct list_head list; 80 81 const struct qed_ll2_cb_ops *cbs; 82 void *cb_cookie; 83 }; 84 85 struct qed_ll2_buffer { 86 struct list_head list; 87 void *data; 88 dma_addr_t phys_addr; 89 }; 90 91 static void qed_ll2b_complete_tx_packet(void *cxt, 92 u8 connection_handle, 93 void *cookie, 94 dma_addr_t first_frag_addr, 95 bool b_last_fragment, 96 bool b_last_packet) 97 { 98 struct qed_hwfn *p_hwfn = cxt; 99 struct qed_dev *cdev = p_hwfn->cdev; 100 struct sk_buff *skb = cookie; 101 102 /* All we need to do is release the mapping */ 103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr, 104 skb_headlen(skb), DMA_TO_DEVICE); 105 106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb) 107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb, 108 b_last_fragment); 109 110 dev_kfree_skb_any(skb); 111 } 112 113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev, 114 u8 **data, dma_addr_t *phys_addr) 115 { 116 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC); 117 if (!(*data)) { 118 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n"); 119 return -ENOMEM; 120 } 121 122 *phys_addr = dma_map_single(&cdev->pdev->dev, 123 ((*data) + NET_SKB_PAD), 124 cdev->ll2->rx_size, DMA_FROM_DEVICE); 125 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) { 126 DP_INFO(cdev, "Failed to map LL2 buffer data\n"); 127 kfree((*data)); 128 return -ENOMEM; 129 } 130 131 return 0; 132 } 133 134 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev, 135 struct qed_ll2_buffer *buffer) 136 { 137 spin_lock_bh(&cdev->ll2->lock); 138 139 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 140 cdev->ll2->rx_size, DMA_FROM_DEVICE); 141 kfree(buffer->data); 142 list_del(&buffer->list); 143 144 cdev->ll2->rx_cnt--; 145 if (!cdev->ll2->rx_cnt) 146 DP_INFO(cdev, "All LL2 entries were removed\n"); 147 148 spin_unlock_bh(&cdev->ll2->lock); 149 150 return 0; 151 } 152 153 static void qed_ll2_kill_buffers(struct qed_dev *cdev) 154 { 155 struct qed_ll2_buffer *buffer, *tmp_buffer; 156 157 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) 158 qed_ll2_dealloc_buffer(cdev, buffer); 159 } 160 161 static void qed_ll2b_complete_rx_packet(void *cxt, 162 struct qed_ll2_comp_rx_data *data) 163 { 164 struct qed_hwfn *p_hwfn = cxt; 165 struct qed_ll2_buffer *buffer = data->cookie; 166 struct qed_dev *cdev = p_hwfn->cdev; 167 dma_addr_t new_phys_addr; 168 struct sk_buff *skb; 169 bool reuse = false; 170 int rc = -EINVAL; 171 u8 *new_data; 172 173 DP_VERBOSE(p_hwfn, 174 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA), 175 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n", 176 (u64)data->rx_buf_addr, 177 data->u.placement_offset, 178 data->length.packet_length, 179 data->parse_flags, 180 data->vlan, data->opaque_data_0, data->opaque_data_1); 181 182 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) { 183 print_hex_dump(KERN_INFO, "", 184 DUMP_PREFIX_OFFSET, 16, 1, 185 buffer->data, data->length.packet_length, false); 186 } 187 188 /* Determine if data is valid */ 189 if (data->length.packet_length < ETH_HLEN) 190 reuse = true; 191 192 /* Allocate a replacement for buffer; Reuse upon failure */ 193 if (!reuse) 194 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data, 195 &new_phys_addr); 196 197 /* If need to reuse or there's no replacement buffer, repost this */ 198 if (rc) 199 goto out_post; 200 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 201 cdev->ll2->rx_size, DMA_FROM_DEVICE); 202 203 skb = build_skb(buffer->data, 0); 204 if (!skb) { 205 DP_INFO(cdev, "Failed to build SKB\n"); 206 kfree(buffer->data); 207 goto out_post1; 208 } 209 210 data->u.placement_offset += NET_SKB_PAD; 211 skb_reserve(skb, data->u.placement_offset); 212 skb_put(skb, data->length.packet_length); 213 skb_checksum_none_assert(skb); 214 215 /* Get parital ethernet information instead of eth_type_trans(), 216 * Since we don't have an associated net_device. 217 */ 218 skb_reset_mac_header(skb); 219 skb->protocol = eth_hdr(skb)->h_proto; 220 221 /* Pass SKB onward */ 222 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) { 223 if (data->vlan) 224 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 225 data->vlan); 226 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb, 227 data->opaque_data_0, 228 data->opaque_data_1); 229 } else { 230 DP_VERBOSE(p_hwfn, (NETIF_MSG_RX_STATUS | NETIF_MSG_PKTDATA | 231 QED_MSG_LL2 | QED_MSG_STORAGE), 232 "Dropping the packet\n"); 233 kfree(buffer->data); 234 } 235 236 out_post1: 237 /* Update Buffer information and update FW producer */ 238 buffer->data = new_data; 239 buffer->phys_addr = new_phys_addr; 240 241 out_post: 242 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle, 243 buffer->phys_addr, 0, buffer, 1); 244 245 if (rc) 246 qed_ll2_dealloc_buffer(cdev, buffer); 247 } 248 249 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 250 u8 connection_handle, 251 bool b_lock, 252 bool b_only_active) 253 { 254 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL; 255 256 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) 257 return NULL; 258 259 if (!p_hwfn->p_ll2_info) 260 return NULL; 261 262 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 263 264 if (b_only_active) { 265 if (b_lock) 266 mutex_lock(&p_ll2_conn->mutex); 267 if (p_ll2_conn->b_active) 268 p_ret = p_ll2_conn; 269 if (b_lock) 270 mutex_unlock(&p_ll2_conn->mutex); 271 } else { 272 p_ret = p_ll2_conn; 273 } 274 275 return p_ret; 276 } 277 278 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn, 279 u8 connection_handle) 280 { 281 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true); 282 } 283 284 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn, 285 u8 connection_handle) 286 { 287 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true); 288 } 289 290 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn 291 *p_hwfn, 292 u8 connection_handle) 293 { 294 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false); 295 } 296 297 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 298 { 299 bool b_last_packet = false, b_last_frag = false; 300 struct qed_ll2_tx_packet *p_pkt = NULL; 301 struct qed_ll2_info *p_ll2_conn; 302 struct qed_ll2_tx_queue *p_tx; 303 unsigned long flags = 0; 304 dma_addr_t tx_frag; 305 306 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 307 if (!p_ll2_conn) 308 return; 309 310 p_tx = &p_ll2_conn->tx_queue; 311 312 spin_lock_irqsave(&p_tx->lock, flags); 313 while (!list_empty(&p_tx->active_descq)) { 314 p_pkt = list_first_entry(&p_tx->active_descq, 315 struct qed_ll2_tx_packet, list_entry); 316 if (!p_pkt) 317 break; 318 319 list_del(&p_pkt->list_entry); 320 b_last_packet = list_empty(&p_tx->active_descq); 321 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 322 spin_unlock_irqrestore(&p_tx->lock, flags); 323 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 324 struct qed_ooo_buffer *p_buffer; 325 326 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 327 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 328 p_buffer); 329 } else { 330 p_tx->cur_completing_packet = *p_pkt; 331 p_tx->cur_completing_bd_idx = 1; 332 b_last_frag = 333 p_tx->cur_completing_bd_idx == p_pkt->bd_used; 334 tx_frag = p_pkt->bds_set[0].tx_frag; 335 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie, 336 p_ll2_conn->my_id, 337 p_pkt->cookie, 338 tx_frag, 339 b_last_frag, 340 b_last_packet); 341 } 342 spin_lock_irqsave(&p_tx->lock, flags); 343 } 344 spin_unlock_irqrestore(&p_tx->lock, flags); 345 } 346 347 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 348 { 349 struct qed_ll2_info *p_ll2_conn = p_cookie; 350 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 351 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0; 352 struct qed_ll2_tx_packet *p_pkt; 353 bool b_last_frag = false; 354 unsigned long flags; 355 int rc = -EINVAL; 356 357 spin_lock_irqsave(&p_tx->lock, flags); 358 if (p_tx->b_completing_packet) { 359 rc = -EBUSY; 360 goto out; 361 } 362 363 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 364 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 365 while (num_bds) { 366 if (list_empty(&p_tx->active_descq)) 367 goto out; 368 369 p_pkt = list_first_entry(&p_tx->active_descq, 370 struct qed_ll2_tx_packet, list_entry); 371 if (!p_pkt) 372 goto out; 373 374 p_tx->b_completing_packet = true; 375 p_tx->cur_completing_packet = *p_pkt; 376 num_bds_in_packet = p_pkt->bd_used; 377 list_del(&p_pkt->list_entry); 378 379 if (num_bds < num_bds_in_packet) { 380 DP_NOTICE(p_hwfn, 381 "Rest of BDs does not cover whole packet\n"); 382 goto out; 383 } 384 385 num_bds -= num_bds_in_packet; 386 p_tx->bds_idx += num_bds_in_packet; 387 while (num_bds_in_packet--) 388 qed_chain_consume(&p_tx->txq_chain); 389 390 p_tx->cur_completing_bd_idx = 1; 391 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used; 392 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 393 394 spin_unlock_irqrestore(&p_tx->lock, flags); 395 396 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie, 397 p_ll2_conn->my_id, 398 p_pkt->cookie, 399 p_pkt->bds_set[0].tx_frag, 400 b_last_frag, !num_bds); 401 402 spin_lock_irqsave(&p_tx->lock, flags); 403 } 404 405 p_tx->b_completing_packet = false; 406 rc = 0; 407 out: 408 spin_unlock_irqrestore(&p_tx->lock, flags); 409 return rc; 410 } 411 412 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn, 413 union core_rx_cqe_union *p_cqe, 414 struct qed_ll2_comp_rx_data *data) 415 { 416 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags); 417 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length); 418 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan); 419 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi); 420 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo); 421 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error; 422 data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id); 423 424 data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp); 425 } 426 427 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn, 428 union core_rx_cqe_union *p_cqe, 429 struct qed_ll2_comp_rx_data *data) 430 { 431 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags); 432 data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags); 433 data->length.packet_length = 434 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length); 435 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan); 436 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]); 437 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]); 438 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset; 439 } 440 441 static int 442 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn, 443 struct qed_ll2_info *p_ll2_conn, 444 union core_rx_cqe_union *p_cqe, 445 unsigned long *p_lock_flags) 446 { 447 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 448 struct core_rx_slow_path_cqe *sp_cqe; 449 450 sp_cqe = &p_cqe->rx_cqe_sp; 451 if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) { 452 DP_NOTICE(p_hwfn, 453 "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n", 454 sp_cqe->ramrod_cmd_id); 455 return -EINVAL; 456 } 457 458 if (!p_ll2_conn->cbs.slowpath_cb) { 459 DP_NOTICE(p_hwfn, 460 "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n"); 461 return -EINVAL; 462 } 463 464 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 465 466 p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie, 467 p_ll2_conn->my_id, 468 le32_to_cpu(sp_cqe->opaque_data.data[0]), 469 le32_to_cpu(sp_cqe->opaque_data.data[1])); 470 471 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 472 473 return 0; 474 } 475 476 static int 477 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn, 478 struct qed_ll2_info *p_ll2_conn, 479 union core_rx_cqe_union *p_cqe, 480 unsigned long *p_lock_flags, bool b_last_cqe) 481 { 482 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 483 struct qed_ll2_rx_packet *p_pkt = NULL; 484 struct qed_ll2_comp_rx_data data; 485 486 if (!list_empty(&p_rx->active_descq)) 487 p_pkt = list_first_entry(&p_rx->active_descq, 488 struct qed_ll2_rx_packet, list_entry); 489 if (!p_pkt) { 490 DP_NOTICE(p_hwfn, 491 "[%d] LL2 Rx completion but active_descq is empty\n", 492 p_ll2_conn->input.conn_type); 493 494 return -EIO; 495 } 496 list_del(&p_pkt->list_entry); 497 498 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR) 499 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data); 500 else 501 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data); 502 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd) 503 DP_NOTICE(p_hwfn, 504 "Mismatch between active_descq and the LL2 Rx chain\n"); 505 506 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 507 508 data.connection_handle = p_ll2_conn->my_id; 509 data.cookie = p_pkt->cookie; 510 data.rx_buf_addr = p_pkt->rx_buf_addr; 511 data.b_last_packet = b_last_cqe; 512 513 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); 514 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data); 515 516 spin_lock_irqsave(&p_rx->lock, *p_lock_flags); 517 518 return 0; 519 } 520 521 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie) 522 { 523 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie; 524 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 525 union core_rx_cqe_union *cqe = NULL; 526 u16 cq_new_idx = 0, cq_old_idx = 0; 527 unsigned long flags = 0; 528 int rc = 0; 529 530 spin_lock_irqsave(&p_rx->lock, flags); 531 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 532 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 533 534 while (cq_new_idx != cq_old_idx) { 535 bool b_last_cqe = (cq_new_idx == cq_old_idx); 536 537 cqe = 538 (union core_rx_cqe_union *) 539 qed_chain_consume(&p_rx->rcq_chain); 540 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 541 542 DP_VERBOSE(p_hwfn, 543 QED_MSG_LL2, 544 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n", 545 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type); 546 547 switch (cqe->rx_cqe_sp.type) { 548 case CORE_RX_CQE_TYPE_SLOW_PATH: 549 rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn, 550 cqe, &flags); 551 break; 552 case CORE_RX_CQE_TYPE_GSI_OFFLOAD: 553 case CORE_RX_CQE_TYPE_REGULAR: 554 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn, 555 cqe, &flags, 556 b_last_cqe); 557 break; 558 default: 559 rc = -EIO; 560 } 561 } 562 563 spin_unlock_irqrestore(&p_rx->lock, flags); 564 return rc; 565 } 566 567 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle) 568 { 569 struct qed_ll2_info *p_ll2_conn = NULL; 570 struct qed_ll2_rx_packet *p_pkt = NULL; 571 struct qed_ll2_rx_queue *p_rx; 572 unsigned long flags = 0; 573 574 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle); 575 if (!p_ll2_conn) 576 return; 577 578 p_rx = &p_ll2_conn->rx_queue; 579 580 spin_lock_irqsave(&p_rx->lock, flags); 581 while (!list_empty(&p_rx->active_descq)) { 582 p_pkt = list_first_entry(&p_rx->active_descq, 583 struct qed_ll2_rx_packet, list_entry); 584 if (!p_pkt) 585 break; 586 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq); 587 spin_unlock_irqrestore(&p_rx->lock, flags); 588 589 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) { 590 struct qed_ooo_buffer *p_buffer; 591 592 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 593 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 594 p_buffer); 595 } else { 596 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr; 597 void *cookie = p_pkt->cookie; 598 bool b_last; 599 600 b_last = list_empty(&p_rx->active_descq); 601 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie, 602 p_ll2_conn->my_id, 603 cookie, 604 rx_buf_addr, b_last); 605 } 606 spin_lock_irqsave(&p_rx->lock, flags); 607 } 608 spin_unlock_irqrestore(&p_rx->lock, flags); 609 } 610 611 static bool 612 qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn *p_hwfn, 613 struct core_rx_slow_path_cqe *p_cqe) 614 { 615 struct ooo_opaque *iscsi_ooo; 616 u32 cid; 617 618 if (p_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) 619 return false; 620 621 iscsi_ooo = (struct ooo_opaque *)&p_cqe->opaque_data; 622 if (iscsi_ooo->ooo_opcode != TCP_EVENT_DELETE_ISLES) 623 return false; 624 625 /* Need to make a flush */ 626 cid = le32_to_cpu(iscsi_ooo->cid); 627 qed_ooo_release_connection_isles(p_hwfn, p_hwfn->p_ooo_info, cid); 628 629 return true; 630 } 631 632 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn, 633 struct qed_ll2_info *p_ll2_conn) 634 { 635 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 636 u16 packet_length = 0, parse_flags = 0, vlan = 0; 637 struct qed_ll2_rx_packet *p_pkt = NULL; 638 u32 num_ooo_add_to_peninsula = 0, cid; 639 union core_rx_cqe_union *cqe = NULL; 640 u16 cq_new_idx = 0, cq_old_idx = 0; 641 struct qed_ooo_buffer *p_buffer; 642 struct ooo_opaque *iscsi_ooo; 643 u8 placement_offset = 0; 644 u8 cqe_type; 645 646 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons); 647 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 648 if (cq_new_idx == cq_old_idx) 649 return 0; 650 651 while (cq_new_idx != cq_old_idx) { 652 struct core_rx_fast_path_cqe *p_cqe_fp; 653 654 cqe = qed_chain_consume(&p_rx->rcq_chain); 655 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain); 656 cqe_type = cqe->rx_cqe_sp.type; 657 658 if (cqe_type == CORE_RX_CQE_TYPE_SLOW_PATH) 659 if (qed_ll2_lb_rxq_handler_slowpath(p_hwfn, 660 &cqe->rx_cqe_sp)) 661 continue; 662 663 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) { 664 DP_NOTICE(p_hwfn, 665 "Got a non-regular LB LL2 completion [type 0x%02x]\n", 666 cqe_type); 667 return -EINVAL; 668 } 669 p_cqe_fp = &cqe->rx_cqe_fp; 670 671 placement_offset = p_cqe_fp->placement_offset; 672 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags); 673 packet_length = le16_to_cpu(p_cqe_fp->packet_length); 674 vlan = le16_to_cpu(p_cqe_fp->vlan); 675 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data; 676 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info, 677 iscsi_ooo); 678 cid = le32_to_cpu(iscsi_ooo->cid); 679 680 /* Process delete isle first */ 681 if (iscsi_ooo->drop_size) 682 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid, 683 iscsi_ooo->drop_isle, 684 iscsi_ooo->drop_size); 685 686 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP) 687 continue; 688 689 /* Now process create/add/join isles */ 690 if (list_empty(&p_rx->active_descq)) { 691 DP_NOTICE(p_hwfn, 692 "LL2 OOO RX chain has no submitted buffers\n" 693 ); 694 return -EIO; 695 } 696 697 p_pkt = list_first_entry(&p_rx->active_descq, 698 struct qed_ll2_rx_packet, list_entry); 699 700 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) || 701 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) || 702 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) || 703 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) || 704 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) { 705 if (!p_pkt) { 706 DP_NOTICE(p_hwfn, 707 "LL2 OOO RX packet is not valid\n"); 708 return -EIO; 709 } 710 list_del(&p_pkt->list_entry); 711 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 712 p_buffer->packet_length = packet_length; 713 p_buffer->parse_flags = parse_flags; 714 p_buffer->vlan = vlan; 715 p_buffer->placement_offset = placement_offset; 716 qed_chain_consume(&p_rx->rxq_chain); 717 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); 718 719 switch (iscsi_ooo->ooo_opcode) { 720 case TCP_EVENT_ADD_NEW_ISLE: 721 qed_ooo_add_new_isle(p_hwfn, 722 p_hwfn->p_ooo_info, 723 cid, 724 iscsi_ooo->ooo_isle, 725 p_buffer); 726 break; 727 case TCP_EVENT_ADD_ISLE_RIGHT: 728 qed_ooo_add_new_buffer(p_hwfn, 729 p_hwfn->p_ooo_info, 730 cid, 731 iscsi_ooo->ooo_isle, 732 p_buffer, 733 QED_OOO_RIGHT_BUF); 734 break; 735 case TCP_EVENT_ADD_ISLE_LEFT: 736 qed_ooo_add_new_buffer(p_hwfn, 737 p_hwfn->p_ooo_info, 738 cid, 739 iscsi_ooo->ooo_isle, 740 p_buffer, 741 QED_OOO_LEFT_BUF); 742 break; 743 case TCP_EVENT_JOIN: 744 qed_ooo_add_new_buffer(p_hwfn, 745 p_hwfn->p_ooo_info, 746 cid, 747 iscsi_ooo->ooo_isle + 748 1, 749 p_buffer, 750 QED_OOO_LEFT_BUF); 751 qed_ooo_join_isles(p_hwfn, 752 p_hwfn->p_ooo_info, 753 cid, iscsi_ooo->ooo_isle); 754 break; 755 case TCP_EVENT_ADD_PEN: 756 num_ooo_add_to_peninsula++; 757 qed_ooo_put_ready_buffer(p_hwfn, 758 p_hwfn->p_ooo_info, 759 p_buffer, true); 760 break; 761 } 762 } else { 763 DP_NOTICE(p_hwfn, 764 "Unexpected event (%d) TX OOO completion\n", 765 iscsi_ooo->ooo_opcode); 766 } 767 } 768 769 return 0; 770 } 771 772 static void 773 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn, 774 struct qed_ll2_info *p_ll2_conn) 775 { 776 struct qed_ll2_tx_pkt_info tx_pkt; 777 struct qed_ooo_buffer *p_buffer; 778 u16 l4_hdr_offset_w; 779 dma_addr_t first_frag; 780 u8 bd_flags; 781 int rc; 782 783 /* Submit Tx buffers here */ 784 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn, 785 p_hwfn->p_ooo_info))) { 786 l4_hdr_offset_w = 0; 787 bd_flags = 0; 788 789 first_frag = p_buffer->rx_buffer_phys_addr + 790 p_buffer->placement_offset; 791 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1); 792 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1); 793 794 memset(&tx_pkt, 0, sizeof(tx_pkt)); 795 tx_pkt.num_of_bds = 1; 796 tx_pkt.vlan = p_buffer->vlan; 797 tx_pkt.bd_flags = bd_flags; 798 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w; 799 switch (p_ll2_conn->tx_dest) { 800 case CORE_TX_DEST_NW: 801 tx_pkt.tx_dest = QED_LL2_TX_DEST_NW; 802 break; 803 case CORE_TX_DEST_LB: 804 tx_pkt.tx_dest = QED_LL2_TX_DEST_LB; 805 break; 806 case CORE_TX_DEST_DROP: 807 default: 808 tx_pkt.tx_dest = QED_LL2_TX_DEST_DROP; 809 break; 810 } 811 tx_pkt.first_frag = first_frag; 812 tx_pkt.first_frag_len = p_buffer->packet_length; 813 tx_pkt.cookie = p_buffer; 814 815 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id, 816 &tx_pkt, true); 817 if (rc) { 818 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info, 819 p_buffer, false); 820 break; 821 } 822 } 823 } 824 825 static void 826 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn, 827 struct qed_ll2_info *p_ll2_conn) 828 { 829 struct qed_ooo_buffer *p_buffer; 830 int rc; 831 832 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 833 p_hwfn->p_ooo_info))) { 834 rc = qed_ll2_post_rx_buffer(p_hwfn, 835 p_ll2_conn->my_id, 836 p_buffer->rx_buffer_phys_addr, 837 0, p_buffer, true); 838 if (rc) { 839 qed_ooo_put_free_buffer(p_hwfn, 840 p_hwfn->p_ooo_info, p_buffer); 841 break; 842 } 843 } 844 } 845 846 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 847 { 848 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 849 int rc; 850 851 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) 852 return 0; 853 854 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn); 855 if (rc) 856 return rc; 857 858 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 859 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 860 861 return 0; 862 } 863 864 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie) 865 { 866 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie; 867 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 868 struct qed_ll2_tx_packet *p_pkt = NULL; 869 struct qed_ooo_buffer *p_buffer; 870 bool b_dont_submit_rx = false; 871 u16 new_idx = 0, num_bds = 0; 872 int rc; 873 874 if (!QED_LL2_TX_REGISTERED(p_ll2_conn)) 875 return 0; 876 877 new_idx = le16_to_cpu(*p_tx->p_fw_cons); 878 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx); 879 880 if (!num_bds) 881 return 0; 882 883 while (num_bds) { 884 if (list_empty(&p_tx->active_descq)) 885 return -EINVAL; 886 887 p_pkt = list_first_entry(&p_tx->active_descq, 888 struct qed_ll2_tx_packet, list_entry); 889 if (!p_pkt) 890 return -EINVAL; 891 892 if (p_pkt->bd_used != 1) { 893 DP_NOTICE(p_hwfn, 894 "Unexpectedly many BDs(%d) in TX OOO completion\n", 895 p_pkt->bd_used); 896 return -EINVAL; 897 } 898 899 list_del(&p_pkt->list_entry); 900 901 num_bds--; 902 p_tx->bds_idx++; 903 qed_chain_consume(&p_tx->txq_chain); 904 905 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie; 906 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 907 908 if (b_dont_submit_rx) { 909 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, 910 p_buffer); 911 continue; 912 } 913 914 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id, 915 p_buffer->rx_buffer_phys_addr, 0, 916 p_buffer, true); 917 if (rc != 0) { 918 qed_ooo_put_free_buffer(p_hwfn, 919 p_hwfn->p_ooo_info, p_buffer); 920 b_dont_submit_rx = true; 921 } 922 } 923 924 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn); 925 926 return 0; 927 } 928 929 static void qed_ll2_stop_ooo(struct qed_dev *cdev) 930 { 931 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 932 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 933 934 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n", 935 *handle); 936 937 qed_ll2_terminate_connection(hwfn, *handle); 938 qed_ll2_release_connection(hwfn, *handle); 939 *handle = QED_LL2_UNUSED_HANDLE; 940 } 941 942 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn, 943 struct qed_ll2_info *p_ll2_conn, 944 u8 action_on_error) 945 { 946 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 947 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; 948 struct core_rx_start_ramrod_data *p_ramrod = NULL; 949 struct qed_spq_entry *p_ent = NULL; 950 struct qed_sp_init_data init_data; 951 u16 cqe_pbl_size; 952 int rc = 0; 953 954 /* Get SPQ entry */ 955 memset(&init_data, 0, sizeof(init_data)); 956 init_data.cid = p_ll2_conn->cid; 957 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 958 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 959 960 rc = qed_sp_init_request(p_hwfn, &p_ent, 961 CORE_RAMROD_RX_QUEUE_START, 962 PROTOCOLID_CORE, &init_data); 963 if (rc) 964 return rc; 965 966 p_ramrod = &p_ent->ramrod.core_rx_queue_start; 967 968 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 969 p_ramrod->sb_index = p_rx->rx_sb_index; 970 p_ramrod->complete_event_flg = 1; 971 972 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 973 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr); 974 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain); 975 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size); 976 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, 977 qed_chain_get_pbl_phys(&p_rx->rcq_chain)); 978 979 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg; 980 p_ramrod->inner_vlan_stripping_en = 981 p_ll2_conn->input.rx_vlan_removal_en; 982 983 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && 984 p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) 985 p_ramrod->report_outer_vlan = 1; 986 p_ramrod->queue_id = p_ll2_conn->queue_id; 987 p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0; 988 989 if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) && 990 p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE && 991 conn_type != QED_LL2_TYPE_IWARP) { 992 p_ramrod->mf_si_bcast_accept_all = 1; 993 p_ramrod->mf_si_mcast_accept_all = 1; 994 } else { 995 p_ramrod->mf_si_bcast_accept_all = 0; 996 p_ramrod->mf_si_mcast_accept_all = 0; 997 } 998 999 p_ramrod->action_on_error.error_type = action_on_error; 1000 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 1001 return qed_spq_post(p_hwfn, p_ent, NULL); 1002 } 1003 1004 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn, 1005 struct qed_ll2_info *p_ll2_conn) 1006 { 1007 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type; 1008 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 1009 struct core_tx_start_ramrod_data *p_ramrod = NULL; 1010 struct qed_spq_entry *p_ent = NULL; 1011 struct qed_sp_init_data init_data; 1012 u16 pq_id = 0, pbl_size; 1013 int rc = -EINVAL; 1014 1015 if (!QED_LL2_TX_REGISTERED(p_ll2_conn)) 1016 return 0; 1017 1018 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 1019 p_ll2_conn->tx_stats_en = 0; 1020 else 1021 p_ll2_conn->tx_stats_en = 1; 1022 1023 /* Get SPQ entry */ 1024 memset(&init_data, 0, sizeof(init_data)); 1025 init_data.cid = p_ll2_conn->cid; 1026 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1027 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1028 1029 rc = qed_sp_init_request(p_hwfn, &p_ent, 1030 CORE_RAMROD_TX_QUEUE_START, 1031 PROTOCOLID_CORE, &init_data); 1032 if (rc) 1033 return rc; 1034 1035 p_ramrod = &p_ent->ramrod.core_tx_queue_start; 1036 1037 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn)); 1038 p_ramrod->sb_index = p_tx->tx_sb_index; 1039 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu); 1040 p_ramrod->stats_en = p_ll2_conn->tx_stats_en; 1041 p_ramrod->stats_id = p_ll2_conn->tx_stats_id; 1042 1043 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, 1044 qed_chain_get_pbl_phys(&p_tx->txq_chain)); 1045 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain); 1046 p_ramrod->pbl_size = cpu_to_le16(pbl_size); 1047 1048 switch (p_ll2_conn->input.tx_tc) { 1049 case PURE_LB_TC: 1050 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB); 1051 break; 1052 case PKT_LB_TC: 1053 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO); 1054 break; 1055 default: 1056 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD); 1057 break; 1058 } 1059 1060 p_ramrod->qm_pq_id = cpu_to_le16(pq_id); 1061 1062 switch (conn_type) { 1063 case QED_LL2_TYPE_FCOE: 1064 p_ramrod->conn_type = PROTOCOLID_FCOE; 1065 break; 1066 case QED_LL2_TYPE_ISCSI: 1067 p_ramrod->conn_type = PROTOCOLID_ISCSI; 1068 break; 1069 case QED_LL2_TYPE_ROCE: 1070 p_ramrod->conn_type = PROTOCOLID_ROCE; 1071 break; 1072 case QED_LL2_TYPE_IWARP: 1073 p_ramrod->conn_type = PROTOCOLID_IWARP; 1074 break; 1075 case QED_LL2_TYPE_OOO: 1076 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) 1077 p_ramrod->conn_type = PROTOCOLID_ISCSI; 1078 else 1079 p_ramrod->conn_type = PROTOCOLID_IWARP; 1080 break; 1081 default: 1082 p_ramrod->conn_type = PROTOCOLID_ETH; 1083 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type); 1084 } 1085 1086 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable; 1087 1088 return qed_spq_post(p_hwfn, p_ent, NULL); 1089 } 1090 1091 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn, 1092 struct qed_ll2_info *p_ll2_conn) 1093 { 1094 struct core_rx_stop_ramrod_data *p_ramrod = NULL; 1095 struct qed_spq_entry *p_ent = NULL; 1096 struct qed_sp_init_data init_data; 1097 int rc = -EINVAL; 1098 1099 /* Get SPQ entry */ 1100 memset(&init_data, 0, sizeof(init_data)); 1101 init_data.cid = p_ll2_conn->cid; 1102 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1103 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1104 1105 rc = qed_sp_init_request(p_hwfn, &p_ent, 1106 CORE_RAMROD_RX_QUEUE_STOP, 1107 PROTOCOLID_CORE, &init_data); 1108 if (rc) 1109 return rc; 1110 1111 p_ramrod = &p_ent->ramrod.core_rx_queue_stop; 1112 1113 p_ramrod->complete_event_flg = 1; 1114 p_ramrod->queue_id = p_ll2_conn->queue_id; 1115 1116 return qed_spq_post(p_hwfn, p_ent, NULL); 1117 } 1118 1119 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn, 1120 struct qed_ll2_info *p_ll2_conn) 1121 { 1122 struct qed_spq_entry *p_ent = NULL; 1123 struct qed_sp_init_data init_data; 1124 int rc = -EINVAL; 1125 1126 /* Get SPQ entry */ 1127 memset(&init_data, 0, sizeof(init_data)); 1128 init_data.cid = p_ll2_conn->cid; 1129 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1130 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1131 1132 rc = qed_sp_init_request(p_hwfn, &p_ent, 1133 CORE_RAMROD_TX_QUEUE_STOP, 1134 PROTOCOLID_CORE, &init_data); 1135 if (rc) 1136 return rc; 1137 1138 return qed_spq_post(p_hwfn, p_ent, NULL); 1139 } 1140 1141 static int 1142 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn, 1143 struct qed_ll2_info *p_ll2_info) 1144 { 1145 struct qed_ll2_rx_packet *p_descq; 1146 u32 capacity; 1147 int rc = 0; 1148 1149 if (!p_ll2_info->input.rx_num_desc) 1150 goto out; 1151 1152 rc = qed_chain_alloc(p_hwfn->cdev, 1153 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1154 QED_CHAIN_MODE_NEXT_PTR, 1155 QED_CHAIN_CNT_TYPE_U16, 1156 p_ll2_info->input.rx_num_desc, 1157 sizeof(struct core_rx_bd), 1158 &p_ll2_info->rx_queue.rxq_chain, NULL); 1159 if (rc) { 1160 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n"); 1161 goto out; 1162 } 1163 1164 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain); 1165 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet), 1166 GFP_KERNEL); 1167 if (!p_descq) { 1168 rc = -ENOMEM; 1169 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n"); 1170 goto out; 1171 } 1172 p_ll2_info->rx_queue.descq_array = p_descq; 1173 1174 rc = qed_chain_alloc(p_hwfn->cdev, 1175 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1176 QED_CHAIN_MODE_PBL, 1177 QED_CHAIN_CNT_TYPE_U16, 1178 p_ll2_info->input.rx_num_desc, 1179 sizeof(struct core_rx_fast_path_cqe), 1180 &p_ll2_info->rx_queue.rcq_chain, NULL); 1181 if (rc) { 1182 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n"); 1183 goto out; 1184 } 1185 1186 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1187 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n", 1188 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc); 1189 1190 out: 1191 return rc; 1192 } 1193 1194 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn, 1195 struct qed_ll2_info *p_ll2_info) 1196 { 1197 struct qed_ll2_tx_packet *p_descq; 1198 u32 desc_size; 1199 u32 capacity; 1200 int rc = 0; 1201 1202 if (!p_ll2_info->input.tx_num_desc) 1203 goto out; 1204 1205 rc = qed_chain_alloc(p_hwfn->cdev, 1206 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1207 QED_CHAIN_MODE_PBL, 1208 QED_CHAIN_CNT_TYPE_U16, 1209 p_ll2_info->input.tx_num_desc, 1210 sizeof(struct core_tx_bd), 1211 &p_ll2_info->tx_queue.txq_chain, NULL); 1212 if (rc) 1213 goto out; 1214 1215 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain); 1216 /* First element is part of the packet, rest are flexibly added */ 1217 desc_size = (sizeof(*p_descq) + 1218 (p_ll2_info->input.tx_max_bds_per_packet - 1) * 1219 sizeof(p_descq->bds_set)); 1220 1221 p_descq = kcalloc(capacity, desc_size, GFP_KERNEL); 1222 if (!p_descq) { 1223 rc = -ENOMEM; 1224 goto out; 1225 } 1226 p_ll2_info->tx_queue.descq_mem = p_descq; 1227 1228 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1229 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n", 1230 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc); 1231 1232 out: 1233 if (rc) 1234 DP_NOTICE(p_hwfn, 1235 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n", 1236 p_ll2_info->input.tx_num_desc); 1237 return rc; 1238 } 1239 1240 static int 1241 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn, 1242 struct qed_ll2_info *p_ll2_info, u16 mtu) 1243 { 1244 struct qed_ooo_buffer *p_buf = NULL; 1245 void *p_virt; 1246 u16 buf_idx; 1247 int rc = 0; 1248 1249 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO) 1250 return rc; 1251 1252 /* Correct number of requested OOO buffers if needed */ 1253 if (!p_ll2_info->input.rx_num_ooo_buffers) { 1254 u16 num_desc = p_ll2_info->input.rx_num_desc; 1255 1256 if (!num_desc) 1257 return -EINVAL; 1258 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2; 1259 } 1260 1261 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers; 1262 buf_idx++) { 1263 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL); 1264 if (!p_buf) { 1265 rc = -ENOMEM; 1266 goto out; 1267 } 1268 1269 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE; 1270 p_buf->rx_buffer_size = (p_buf->rx_buffer_size + 1271 ETH_CACHE_LINE_SIZE - 1) & 1272 ~(ETH_CACHE_LINE_SIZE - 1); 1273 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 1274 p_buf->rx_buffer_size, 1275 &p_buf->rx_buffer_phys_addr, 1276 GFP_KERNEL); 1277 if (!p_virt) { 1278 kfree(p_buf); 1279 rc = -ENOMEM; 1280 goto out; 1281 } 1282 1283 p_buf->rx_buffer_virt_addr = p_virt; 1284 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf); 1285 } 1286 1287 DP_VERBOSE(p_hwfn, QED_MSG_LL2, 1288 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n", 1289 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size); 1290 1291 out: 1292 return rc; 1293 } 1294 1295 static int 1296 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs) 1297 { 1298 if (!cbs || (!cbs->rx_comp_cb || 1299 !cbs->rx_release_cb || 1300 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie)) 1301 return -EINVAL; 1302 1303 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb; 1304 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb; 1305 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb; 1306 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb; 1307 p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb; 1308 p_ll2_info->cbs.cookie = cbs->cookie; 1309 1310 return 0; 1311 } 1312 1313 static enum core_error_handle 1314 qed_ll2_get_error_choice(enum qed_ll2_error_handle err) 1315 { 1316 switch (err) { 1317 case QED_LL2_DROP_PACKET: 1318 return LL2_DROP_PACKET; 1319 case QED_LL2_DO_NOTHING: 1320 return LL2_DO_NOTHING; 1321 case QED_LL2_ASSERT: 1322 return LL2_ASSERT; 1323 default: 1324 return LL2_DO_NOTHING; 1325 } 1326 } 1327 1328 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data) 1329 { 1330 struct qed_hwfn *p_hwfn = cxt; 1331 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb; 1332 struct qed_ll2_info *p_ll2_info = NULL; 1333 u8 i, *p_tx_max; 1334 int rc; 1335 1336 if (!data->p_connection_handle || !p_hwfn->p_ll2_info) 1337 return -EINVAL; 1338 1339 /* Find a free connection to be used */ 1340 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) { 1341 mutex_lock(&p_hwfn->p_ll2_info[i].mutex); 1342 if (p_hwfn->p_ll2_info[i].b_active) { 1343 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1344 continue; 1345 } 1346 1347 p_hwfn->p_ll2_info[i].b_active = true; 1348 p_ll2_info = &p_hwfn->p_ll2_info[i]; 1349 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex); 1350 break; 1351 } 1352 if (!p_ll2_info) 1353 return -EBUSY; 1354 1355 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input)); 1356 1357 switch (data->input.tx_dest) { 1358 case QED_LL2_TX_DEST_NW: 1359 p_ll2_info->tx_dest = CORE_TX_DEST_NW; 1360 break; 1361 case QED_LL2_TX_DEST_LB: 1362 p_ll2_info->tx_dest = CORE_TX_DEST_LB; 1363 break; 1364 case QED_LL2_TX_DEST_DROP: 1365 p_ll2_info->tx_dest = CORE_TX_DEST_DROP; 1366 break; 1367 default: 1368 return -EINVAL; 1369 } 1370 1371 if (data->input.conn_type == QED_LL2_TYPE_OOO || 1372 data->input.secondary_queue) 1373 p_ll2_info->main_func_queue = false; 1374 else 1375 p_ll2_info->main_func_queue = true; 1376 1377 /* Correct maximum number of Tx BDs */ 1378 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet; 1379 if (*p_tx_max == 0) 1380 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET; 1381 else 1382 *p_tx_max = min_t(u8, *p_tx_max, 1383 CORE_LL2_TX_MAX_BDS_PER_PACKET); 1384 1385 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs); 1386 if (rc) { 1387 DP_NOTICE(p_hwfn, "Invalid callback functions\n"); 1388 goto q_allocate_fail; 1389 } 1390 1391 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info); 1392 if (rc) 1393 goto q_allocate_fail; 1394 1395 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info); 1396 if (rc) 1397 goto q_allocate_fail; 1398 1399 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info, 1400 data->input.mtu); 1401 if (rc) 1402 goto q_allocate_fail; 1403 1404 /* Register callbacks for the Rx/Tx queues */ 1405 if (data->input.conn_type == QED_LL2_TYPE_OOO) { 1406 comp_rx_cb = qed_ll2_lb_rxq_completion; 1407 comp_tx_cb = qed_ll2_lb_txq_completion; 1408 } else { 1409 comp_rx_cb = qed_ll2_rxq_completion; 1410 comp_tx_cb = qed_ll2_txq_completion; 1411 } 1412 1413 if (data->input.rx_num_desc) { 1414 qed_int_register_cb(p_hwfn, comp_rx_cb, 1415 &p_hwfn->p_ll2_info[i], 1416 &p_ll2_info->rx_queue.rx_sb_index, 1417 &p_ll2_info->rx_queue.p_fw_cons); 1418 p_ll2_info->rx_queue.b_cb_registered = true; 1419 } 1420 1421 if (data->input.tx_num_desc) { 1422 qed_int_register_cb(p_hwfn, 1423 comp_tx_cb, 1424 &p_hwfn->p_ll2_info[i], 1425 &p_ll2_info->tx_queue.tx_sb_index, 1426 &p_ll2_info->tx_queue.p_fw_cons); 1427 p_ll2_info->tx_queue.b_cb_registered = true; 1428 } 1429 1430 *data->p_connection_handle = i; 1431 return rc; 1432 1433 q_allocate_fail: 1434 qed_ll2_release_connection(p_hwfn, i); 1435 return -ENOMEM; 1436 } 1437 1438 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn, 1439 struct qed_ll2_info *p_ll2_conn) 1440 { 1441 enum qed_ll2_error_handle error_input; 1442 enum core_error_handle error_mode; 1443 u8 action_on_error = 0; 1444 1445 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) 1446 return 0; 1447 1448 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0); 1449 error_input = p_ll2_conn->input.ai_err_packet_too_big; 1450 error_mode = qed_ll2_get_error_choice(error_input); 1451 SET_FIELD(action_on_error, 1452 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode); 1453 error_input = p_ll2_conn->input.ai_err_no_buf; 1454 error_mode = qed_ll2_get_error_choice(error_input); 1455 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode); 1456 1457 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error); 1458 } 1459 1460 static void 1461 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn, 1462 struct qed_ll2_info *p_ll2_conn) 1463 { 1464 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1465 return; 1466 1467 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1468 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn); 1469 } 1470 1471 int qed_ll2_establish_connection(void *cxt, u8 connection_handle) 1472 { 1473 struct qed_hwfn *p_hwfn = cxt; 1474 struct qed_ll2_info *p_ll2_conn; 1475 struct qed_ll2_tx_packet *p_pkt; 1476 struct qed_ll2_rx_queue *p_rx; 1477 struct qed_ll2_tx_queue *p_tx; 1478 struct qed_ptt *p_ptt; 1479 int rc = -EINVAL; 1480 u32 i, capacity; 1481 u32 desc_size; 1482 u8 qid; 1483 1484 p_ptt = qed_ptt_acquire(p_hwfn); 1485 if (!p_ptt) 1486 return -EAGAIN; 1487 1488 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1489 if (!p_ll2_conn) { 1490 rc = -EINVAL; 1491 goto out; 1492 } 1493 1494 p_rx = &p_ll2_conn->rx_queue; 1495 p_tx = &p_ll2_conn->tx_queue; 1496 1497 qed_chain_reset(&p_rx->rxq_chain); 1498 qed_chain_reset(&p_rx->rcq_chain); 1499 INIT_LIST_HEAD(&p_rx->active_descq); 1500 INIT_LIST_HEAD(&p_rx->free_descq); 1501 INIT_LIST_HEAD(&p_rx->posting_descq); 1502 spin_lock_init(&p_rx->lock); 1503 capacity = qed_chain_get_capacity(&p_rx->rxq_chain); 1504 for (i = 0; i < capacity; i++) 1505 list_add_tail(&p_rx->descq_array[i].list_entry, 1506 &p_rx->free_descq); 1507 *p_rx->p_fw_cons = 0; 1508 1509 qed_chain_reset(&p_tx->txq_chain); 1510 INIT_LIST_HEAD(&p_tx->active_descq); 1511 INIT_LIST_HEAD(&p_tx->free_descq); 1512 INIT_LIST_HEAD(&p_tx->sending_descq); 1513 spin_lock_init(&p_tx->lock); 1514 capacity = qed_chain_get_capacity(&p_tx->txq_chain); 1515 /* First element is part of the packet, rest are flexibly added */ 1516 desc_size = (sizeof(*p_pkt) + 1517 (p_ll2_conn->input.tx_max_bds_per_packet - 1) * 1518 sizeof(p_pkt->bds_set)); 1519 1520 for (i = 0; i < capacity; i++) { 1521 p_pkt = p_tx->descq_mem + desc_size * i; 1522 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq); 1523 } 1524 p_tx->cur_completing_bd_idx = 0; 1525 p_tx->bds_idx = 0; 1526 p_tx->b_completing_packet = false; 1527 p_tx->cur_send_packet = NULL; 1528 p_tx->cur_send_frag_num = 0; 1529 p_tx->cur_completing_frag_num = 0; 1530 *p_tx->p_fw_cons = 0; 1531 1532 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid); 1533 if (rc) 1534 goto out; 1535 1536 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle; 1537 p_ll2_conn->queue_id = qid; 1538 p_ll2_conn->tx_stats_id = qid; 1539 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview + 1540 GTT_BAR0_MAP_REG_TSDM_RAM + 1541 TSTORM_LL2_RX_PRODS_OFFSET(qid); 1542 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells + 1543 qed_db_addr(p_ll2_conn->cid, 1544 DQ_DEMS_LEGACY); 1545 1546 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn); 1547 if (rc) 1548 goto out; 1549 1550 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn); 1551 if (rc) 1552 goto out; 1553 1554 if (!QED_IS_RDMA_PERSONALITY(p_hwfn)) 1555 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1); 1556 1557 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn); 1558 1559 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1560 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) 1561 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1562 ETH_P_FCOE, 0, 1563 QED_LLH_FILTER_ETHERTYPE); 1564 qed_llh_add_protocol_filter(p_hwfn, p_ptt, 1565 ETH_P_FIP, 0, 1566 QED_LLH_FILTER_ETHERTYPE); 1567 } 1568 1569 out: 1570 qed_ptt_release(p_hwfn, p_ptt); 1571 return rc; 1572 } 1573 1574 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn, 1575 struct qed_ll2_rx_queue *p_rx, 1576 struct qed_ll2_rx_packet *p_curp) 1577 { 1578 struct qed_ll2_rx_packet *p_posting_packet = NULL; 1579 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 }; 1580 bool b_notify_fw = false; 1581 u16 bd_prod, cq_prod; 1582 1583 /* This handles the flushing of already posted buffers */ 1584 while (!list_empty(&p_rx->posting_descq)) { 1585 p_posting_packet = list_first_entry(&p_rx->posting_descq, 1586 struct qed_ll2_rx_packet, 1587 list_entry); 1588 list_move_tail(&p_posting_packet->list_entry, 1589 &p_rx->active_descq); 1590 b_notify_fw = true; 1591 } 1592 1593 /* This handles the supplied packet [if there is one] */ 1594 if (p_curp) { 1595 list_add_tail(&p_curp->list_entry, &p_rx->active_descq); 1596 b_notify_fw = true; 1597 } 1598 1599 if (!b_notify_fw) 1600 return; 1601 1602 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain); 1603 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain); 1604 rx_prod.bd_prod = cpu_to_le16(bd_prod); 1605 rx_prod.cqe_prod = cpu_to_le16(cq_prod); 1606 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod)); 1607 } 1608 1609 int qed_ll2_post_rx_buffer(void *cxt, 1610 u8 connection_handle, 1611 dma_addr_t addr, 1612 u16 buf_len, void *cookie, u8 notify_fw) 1613 { 1614 struct qed_hwfn *p_hwfn = cxt; 1615 struct core_rx_bd_with_buff_len *p_curb = NULL; 1616 struct qed_ll2_rx_packet *p_curp = NULL; 1617 struct qed_ll2_info *p_ll2_conn; 1618 struct qed_ll2_rx_queue *p_rx; 1619 unsigned long flags; 1620 void *p_data; 1621 int rc = 0; 1622 1623 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1624 if (!p_ll2_conn) 1625 return -EINVAL; 1626 p_rx = &p_ll2_conn->rx_queue; 1627 1628 spin_lock_irqsave(&p_rx->lock, flags); 1629 if (!list_empty(&p_rx->free_descq)) 1630 p_curp = list_first_entry(&p_rx->free_descq, 1631 struct qed_ll2_rx_packet, list_entry); 1632 if (p_curp) { 1633 if (qed_chain_get_elem_left(&p_rx->rxq_chain) && 1634 qed_chain_get_elem_left(&p_rx->rcq_chain)) { 1635 p_data = qed_chain_produce(&p_rx->rxq_chain); 1636 p_curb = (struct core_rx_bd_with_buff_len *)p_data; 1637 qed_chain_produce(&p_rx->rcq_chain); 1638 } 1639 } 1640 1641 /* If we're lacking entires, let's try to flush buffers to FW */ 1642 if (!p_curp || !p_curb) { 1643 rc = -EBUSY; 1644 p_curp = NULL; 1645 goto out_notify; 1646 } 1647 1648 /* We have an Rx packet we can fill */ 1649 DMA_REGPAIR_LE(p_curb->addr, addr); 1650 p_curb->buff_length = cpu_to_le16(buf_len); 1651 p_curp->rx_buf_addr = addr; 1652 p_curp->cookie = cookie; 1653 p_curp->rxq_bd = p_curb; 1654 p_curp->buf_length = buf_len; 1655 list_del(&p_curp->list_entry); 1656 1657 /* Check if we only want to enqueue this packet without informing FW */ 1658 if (!notify_fw) { 1659 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq); 1660 goto out; 1661 } 1662 1663 out_notify: 1664 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp); 1665 out: 1666 spin_unlock_irqrestore(&p_rx->lock, flags); 1667 return rc; 1668 } 1669 1670 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn, 1671 struct qed_ll2_tx_queue *p_tx, 1672 struct qed_ll2_tx_packet *p_curp, 1673 struct qed_ll2_tx_pkt_info *pkt, 1674 u8 notify_fw) 1675 { 1676 list_del(&p_curp->list_entry); 1677 p_curp->cookie = pkt->cookie; 1678 p_curp->bd_used = pkt->num_of_bds; 1679 p_curp->notify_fw = notify_fw; 1680 p_tx->cur_send_packet = p_curp; 1681 p_tx->cur_send_frag_num = 0; 1682 1683 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag; 1684 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len; 1685 p_tx->cur_send_frag_num++; 1686 } 1687 1688 static void 1689 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn, 1690 struct qed_ll2_info *p_ll2, 1691 struct qed_ll2_tx_packet *p_curp, 1692 struct qed_ll2_tx_pkt_info *pkt) 1693 { 1694 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain; 1695 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain); 1696 struct core_tx_bd *start_bd = NULL; 1697 enum core_roce_flavor_type roce_flavor; 1698 enum core_tx_dest tx_dest; 1699 u16 bd_data = 0, frag_idx; 1700 1701 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE 1702 : CORE_RROCE; 1703 1704 switch (pkt->tx_dest) { 1705 case QED_LL2_TX_DEST_NW: 1706 tx_dest = CORE_TX_DEST_NW; 1707 break; 1708 case QED_LL2_TX_DEST_LB: 1709 tx_dest = CORE_TX_DEST_LB; 1710 break; 1711 case QED_LL2_TX_DEST_DROP: 1712 tx_dest = CORE_TX_DEST_DROP; 1713 break; 1714 default: 1715 tx_dest = CORE_TX_DEST_LB; 1716 break; 1717 } 1718 1719 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1720 if (QED_IS_IWARP_PERSONALITY(p_hwfn) && 1721 p_ll2->input.conn_type == QED_LL2_TYPE_OOO) { 1722 start_bd->nw_vlan_or_lb_echo = 1723 cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE); 1724 } else { 1725 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan); 1726 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && 1727 p_ll2->input.conn_type == QED_LL2_TYPE_FCOE) 1728 pkt->remove_stag = true; 1729 } 1730 1731 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, 1732 cpu_to_le16(pkt->l4_hdr_offset_w)); 1733 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest); 1734 bd_data |= pkt->bd_flags; 1735 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1); 1736 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds); 1737 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor); 1738 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum)); 1739 SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum)); 1740 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len)); 1741 SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION, 1742 !!(pkt->remove_stag)); 1743 1744 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data); 1745 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag); 1746 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len); 1747 1748 DP_VERBOSE(p_hwfn, 1749 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1750 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n", 1751 p_ll2->queue_id, 1752 p_ll2->cid, 1753 p_ll2->input.conn_type, 1754 prod_idx, 1755 pkt->first_frag_len, 1756 pkt->num_of_bds, 1757 le32_to_cpu(start_bd->addr.hi), 1758 le32_to_cpu(start_bd->addr.lo)); 1759 1760 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds) 1761 return; 1762 1763 /* Need to provide the packet with additional BDs for frags */ 1764 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num; 1765 frag_idx < pkt->num_of_bds; frag_idx++) { 1766 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd; 1767 1768 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); 1769 (*p_bd)->bd_data.as_bitfield = 0; 1770 (*p_bd)->bitfield1 = 0; 1771 p_curp->bds_set[frag_idx].tx_frag = 0; 1772 p_curp->bds_set[frag_idx].frag_len = 0; 1773 } 1774 } 1775 1776 /* This should be called while the Txq spinlock is being held */ 1777 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn, 1778 struct qed_ll2_info *p_ll2_conn) 1779 { 1780 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw; 1781 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue; 1782 struct qed_ll2_tx_packet *p_pkt = NULL; 1783 struct core_db_data db_msg = { 0, 0, 0 }; 1784 u16 bd_prod; 1785 1786 /* If there are missing BDs, don't do anything now */ 1787 if (p_ll2_conn->tx_queue.cur_send_frag_num != 1788 p_ll2_conn->tx_queue.cur_send_packet->bd_used) 1789 return; 1790 1791 /* Push the current packet to the list and clean after it */ 1792 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry, 1793 &p_ll2_conn->tx_queue.sending_descq); 1794 p_ll2_conn->tx_queue.cur_send_packet = NULL; 1795 p_ll2_conn->tx_queue.cur_send_frag_num = 0; 1796 1797 /* Notify FW of packet only if requested to */ 1798 if (!b_notify) 1799 return; 1800 1801 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain); 1802 1803 while (!list_empty(&p_tx->sending_descq)) { 1804 p_pkt = list_first_entry(&p_tx->sending_descq, 1805 struct qed_ll2_tx_packet, list_entry); 1806 if (!p_pkt) 1807 break; 1808 1809 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq); 1810 } 1811 1812 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM); 1813 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 1814 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL, 1815 DQ_XCM_CORE_TX_BD_PROD_CMD); 1816 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD; 1817 db_msg.spq_prod = cpu_to_le16(bd_prod); 1818 1819 /* Make sure the BDs data is updated before ringing the doorbell */ 1820 wmb(); 1821 1822 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg)); 1823 1824 DP_VERBOSE(p_hwfn, 1825 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2), 1826 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n", 1827 p_ll2_conn->queue_id, 1828 p_ll2_conn->cid, 1829 p_ll2_conn->input.conn_type, db_msg.spq_prod); 1830 } 1831 1832 int qed_ll2_prepare_tx_packet(void *cxt, 1833 u8 connection_handle, 1834 struct qed_ll2_tx_pkt_info *pkt, 1835 bool notify_fw) 1836 { 1837 struct qed_hwfn *p_hwfn = cxt; 1838 struct qed_ll2_tx_packet *p_curp = NULL; 1839 struct qed_ll2_info *p_ll2_conn = NULL; 1840 struct qed_ll2_tx_queue *p_tx; 1841 struct qed_chain *p_tx_chain; 1842 unsigned long flags; 1843 int rc = 0; 1844 1845 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1846 if (!p_ll2_conn) 1847 return -EINVAL; 1848 p_tx = &p_ll2_conn->tx_queue; 1849 p_tx_chain = &p_tx->txq_chain; 1850 1851 if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet) 1852 return -EIO; 1853 1854 spin_lock_irqsave(&p_tx->lock, flags); 1855 if (p_tx->cur_send_packet) { 1856 rc = -EEXIST; 1857 goto out; 1858 } 1859 1860 /* Get entry, but only if we have tx elements for it */ 1861 if (!list_empty(&p_tx->free_descq)) 1862 p_curp = list_first_entry(&p_tx->free_descq, 1863 struct qed_ll2_tx_packet, list_entry); 1864 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds) 1865 p_curp = NULL; 1866 1867 if (!p_curp) { 1868 rc = -EBUSY; 1869 goto out; 1870 } 1871 1872 /* Prepare packet and BD, and perhaps send a doorbell to FW */ 1873 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw); 1874 1875 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt); 1876 1877 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1878 1879 out: 1880 spin_unlock_irqrestore(&p_tx->lock, flags); 1881 return rc; 1882 } 1883 1884 int qed_ll2_set_fragment_of_tx_packet(void *cxt, 1885 u8 connection_handle, 1886 dma_addr_t addr, u16 nbytes) 1887 { 1888 struct qed_ll2_tx_packet *p_cur_send_packet = NULL; 1889 struct qed_hwfn *p_hwfn = cxt; 1890 struct qed_ll2_info *p_ll2_conn = NULL; 1891 u16 cur_send_frag_num = 0; 1892 struct core_tx_bd *p_bd; 1893 unsigned long flags; 1894 1895 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 1896 if (!p_ll2_conn) 1897 return -EINVAL; 1898 1899 if (!p_ll2_conn->tx_queue.cur_send_packet) 1900 return -EINVAL; 1901 1902 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet; 1903 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num; 1904 1905 if (cur_send_frag_num >= p_cur_send_packet->bd_used) 1906 return -EINVAL; 1907 1908 /* Fill the BD information, and possibly notify FW */ 1909 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd; 1910 DMA_REGPAIR_LE(p_bd->addr, addr); 1911 p_bd->nbytes = cpu_to_le16(nbytes); 1912 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr; 1913 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes; 1914 1915 p_ll2_conn->tx_queue.cur_send_frag_num++; 1916 1917 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags); 1918 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn); 1919 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags); 1920 1921 return 0; 1922 } 1923 1924 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle) 1925 { 1926 struct qed_hwfn *p_hwfn = cxt; 1927 struct qed_ll2_info *p_ll2_conn = NULL; 1928 int rc = -EINVAL; 1929 struct qed_ptt *p_ptt; 1930 1931 p_ptt = qed_ptt_acquire(p_hwfn); 1932 if (!p_ptt) 1933 return -EAGAIN; 1934 1935 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle); 1936 if (!p_ll2_conn) { 1937 rc = -EINVAL; 1938 goto out; 1939 } 1940 1941 /* Stop Tx & Rx of connection, if needed */ 1942 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) { 1943 p_ll2_conn->tx_queue.b_cb_registered = false; 1944 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */ 1945 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn); 1946 if (rc) 1947 goto out; 1948 1949 qed_ll2_txq_flush(p_hwfn, connection_handle); 1950 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index); 1951 } 1952 1953 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) { 1954 p_ll2_conn->rx_queue.b_cb_registered = false; 1955 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */ 1956 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn); 1957 if (rc) 1958 goto out; 1959 1960 qed_ll2_rxq_flush(p_hwfn, connection_handle); 1961 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index); 1962 } 1963 1964 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) 1965 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1966 1967 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { 1968 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) 1969 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1970 ETH_P_FCOE, 0, 1971 QED_LLH_FILTER_ETHERTYPE); 1972 qed_llh_remove_protocol_filter(p_hwfn, p_ptt, 1973 ETH_P_FIP, 0, 1974 QED_LLH_FILTER_ETHERTYPE); 1975 } 1976 1977 out: 1978 qed_ptt_release(p_hwfn, p_ptt); 1979 return rc; 1980 } 1981 1982 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn, 1983 struct qed_ll2_info *p_ll2_conn) 1984 { 1985 struct qed_ooo_buffer *p_buffer; 1986 1987 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO) 1988 return; 1989 1990 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); 1991 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn, 1992 p_hwfn->p_ooo_info))) { 1993 dma_free_coherent(&p_hwfn->cdev->pdev->dev, 1994 p_buffer->rx_buffer_size, 1995 p_buffer->rx_buffer_virt_addr, 1996 p_buffer->rx_buffer_phys_addr); 1997 kfree(p_buffer); 1998 } 1999 } 2000 2001 void qed_ll2_release_connection(void *cxt, u8 connection_handle) 2002 { 2003 struct qed_hwfn *p_hwfn = cxt; 2004 struct qed_ll2_info *p_ll2_conn = NULL; 2005 2006 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle); 2007 if (!p_ll2_conn) 2008 return; 2009 2010 kfree(p_ll2_conn->tx_queue.descq_mem); 2011 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain); 2012 2013 kfree(p_ll2_conn->rx_queue.descq_array); 2014 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain); 2015 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain); 2016 2017 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid); 2018 2019 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn); 2020 2021 mutex_lock(&p_ll2_conn->mutex); 2022 p_ll2_conn->b_active = false; 2023 mutex_unlock(&p_ll2_conn->mutex); 2024 } 2025 2026 int qed_ll2_alloc(struct qed_hwfn *p_hwfn) 2027 { 2028 struct qed_ll2_info *p_ll2_connections; 2029 u8 i; 2030 2031 /* Allocate LL2's set struct */ 2032 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS, 2033 sizeof(struct qed_ll2_info), GFP_KERNEL); 2034 if (!p_ll2_connections) { 2035 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n"); 2036 return -ENOMEM; 2037 } 2038 2039 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 2040 p_ll2_connections[i].my_id = i; 2041 2042 p_hwfn->p_ll2_info = p_ll2_connections; 2043 return 0; 2044 } 2045 2046 void qed_ll2_setup(struct qed_hwfn *p_hwfn) 2047 { 2048 int i; 2049 2050 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++) 2051 mutex_init(&p_hwfn->p_ll2_info[i].mutex); 2052 } 2053 2054 void qed_ll2_free(struct qed_hwfn *p_hwfn) 2055 { 2056 if (!p_hwfn->p_ll2_info) 2057 return; 2058 2059 kfree(p_hwfn->p_ll2_info); 2060 p_hwfn->p_ll2_info = NULL; 2061 } 2062 2063 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn, 2064 struct qed_ptt *p_ptt, 2065 struct qed_ll2_stats *p_stats) 2066 { 2067 struct core_ll2_port_stats port_stats; 2068 2069 memset(&port_stats, 0, sizeof(port_stats)); 2070 qed_memcpy_from(p_hwfn, p_ptt, &port_stats, 2071 BAR0_MAP_REG_TSDM_RAM + 2072 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)), 2073 sizeof(port_stats)); 2074 2075 p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr); 2076 p_stats->gsi_invalid_pkt_length = 2077 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length); 2078 p_stats->gsi_unsupported_pkt_typ = 2079 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ); 2080 p_stats->gsi_crcchksm_error = 2081 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error); 2082 } 2083 2084 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn, 2085 struct qed_ptt *p_ptt, 2086 struct qed_ll2_info *p_ll2_conn, 2087 struct qed_ll2_stats *p_stats) 2088 { 2089 struct core_ll2_tstorm_per_queue_stat tstats; 2090 u8 qid = p_ll2_conn->queue_id; 2091 u32 tstats_addr; 2092 2093 memset(&tstats, 0, sizeof(tstats)); 2094 tstats_addr = BAR0_MAP_REG_TSDM_RAM + 2095 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid); 2096 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats)); 2097 2098 p_stats->packet_too_big_discard = 2099 HILO_64_REGPAIR(tstats.packet_too_big_discard); 2100 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard); 2101 } 2102 2103 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn, 2104 struct qed_ptt *p_ptt, 2105 struct qed_ll2_info *p_ll2_conn, 2106 struct qed_ll2_stats *p_stats) 2107 { 2108 struct core_ll2_ustorm_per_queue_stat ustats; 2109 u8 qid = p_ll2_conn->queue_id; 2110 u32 ustats_addr; 2111 2112 memset(&ustats, 0, sizeof(ustats)); 2113 ustats_addr = BAR0_MAP_REG_USDM_RAM + 2114 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid); 2115 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats)); 2116 2117 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes); 2118 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes); 2119 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes); 2120 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts); 2121 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts); 2122 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts); 2123 } 2124 2125 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn, 2126 struct qed_ptt *p_ptt, 2127 struct qed_ll2_info *p_ll2_conn, 2128 struct qed_ll2_stats *p_stats) 2129 { 2130 struct core_ll2_pstorm_per_queue_stat pstats; 2131 u8 stats_id = p_ll2_conn->tx_stats_id; 2132 u32 pstats_addr; 2133 2134 memset(&pstats, 0, sizeof(pstats)); 2135 pstats_addr = BAR0_MAP_REG_PSDM_RAM + 2136 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id); 2137 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats)); 2138 2139 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes); 2140 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes); 2141 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes); 2142 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts); 2143 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts); 2144 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts); 2145 } 2146 2147 int qed_ll2_get_stats(void *cxt, 2148 u8 connection_handle, struct qed_ll2_stats *p_stats) 2149 { 2150 struct qed_hwfn *p_hwfn = cxt; 2151 struct qed_ll2_info *p_ll2_conn = NULL; 2152 struct qed_ptt *p_ptt; 2153 2154 memset(p_stats, 0, sizeof(*p_stats)); 2155 2156 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) || 2157 !p_hwfn->p_ll2_info) 2158 return -EINVAL; 2159 2160 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle]; 2161 2162 p_ptt = qed_ptt_acquire(p_hwfn); 2163 if (!p_ptt) { 2164 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 2165 return -EINVAL; 2166 } 2167 2168 if (p_ll2_conn->input.gsi_enable) 2169 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats); 2170 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2171 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2172 if (p_ll2_conn->tx_stats_en) 2173 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats); 2174 2175 qed_ptt_release(p_hwfn, p_ptt); 2176 return 0; 2177 } 2178 2179 static void qed_ll2b_release_rx_packet(void *cxt, 2180 u8 connection_handle, 2181 void *cookie, 2182 dma_addr_t rx_buf_addr, 2183 bool b_last_packet) 2184 { 2185 struct qed_hwfn *p_hwfn = cxt; 2186 2187 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie); 2188 } 2189 2190 static void qed_ll2_register_cb_ops(struct qed_dev *cdev, 2191 const struct qed_ll2_cb_ops *ops, 2192 void *cookie) 2193 { 2194 cdev->ll2->cbs = ops; 2195 cdev->ll2->cb_cookie = cookie; 2196 } 2197 2198 struct qed_ll2_cbs ll2_cbs = { 2199 .rx_comp_cb = &qed_ll2b_complete_rx_packet, 2200 .rx_release_cb = &qed_ll2b_release_rx_packet, 2201 .tx_comp_cb = &qed_ll2b_complete_tx_packet, 2202 .tx_release_cb = &qed_ll2b_complete_tx_packet, 2203 }; 2204 2205 static void qed_ll2_set_conn_data(struct qed_dev *cdev, 2206 struct qed_ll2_acquire_data *data, 2207 struct qed_ll2_params *params, 2208 enum qed_ll2_conn_type conn_type, 2209 u8 *handle, bool lb) 2210 { 2211 memset(data, 0, sizeof(*data)); 2212 2213 data->input.conn_type = conn_type; 2214 data->input.mtu = params->mtu; 2215 data->input.rx_num_desc = QED_LL2_RX_SIZE; 2216 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets; 2217 data->input.rx_vlan_removal_en = params->rx_vlan_stripping; 2218 data->input.tx_num_desc = QED_LL2_TX_SIZE; 2219 data->p_connection_handle = handle; 2220 data->cbs = &ll2_cbs; 2221 ll2_cbs.cookie = QED_LEADING_HWFN(cdev); 2222 2223 if (lb) { 2224 data->input.tx_tc = PKT_LB_TC; 2225 data->input.tx_dest = QED_LL2_TX_DEST_LB; 2226 } else { 2227 data->input.tx_tc = 0; 2228 data->input.tx_dest = QED_LL2_TX_DEST_NW; 2229 } 2230 } 2231 2232 static int qed_ll2_start_ooo(struct qed_dev *cdev, 2233 struct qed_ll2_params *params) 2234 { 2235 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2236 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; 2237 struct qed_ll2_acquire_data data; 2238 int rc; 2239 2240 qed_ll2_set_conn_data(cdev, &data, params, 2241 QED_LL2_TYPE_OOO, handle, true); 2242 2243 rc = qed_ll2_acquire_connection(hwfn, &data); 2244 if (rc) { 2245 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n"); 2246 goto out; 2247 } 2248 2249 rc = qed_ll2_establish_connection(hwfn, *handle); 2250 if (rc) { 2251 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n"); 2252 goto fail; 2253 } 2254 2255 return 0; 2256 2257 fail: 2258 qed_ll2_release_connection(hwfn, *handle); 2259 out: 2260 *handle = QED_LL2_UNUSED_HANDLE; 2261 return rc; 2262 } 2263 2264 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params) 2265 { 2266 struct qed_ll2_buffer *buffer, *tmp_buffer; 2267 enum qed_ll2_conn_type conn_type; 2268 struct qed_ll2_acquire_data data; 2269 struct qed_ptt *p_ptt; 2270 int rc, i; 2271 2272 2273 /* Initialize LL2 locks & lists */ 2274 INIT_LIST_HEAD(&cdev->ll2->list); 2275 spin_lock_init(&cdev->ll2->lock); 2276 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN + 2277 L1_CACHE_BYTES + params->mtu; 2278 2279 /*Allocate memory for LL2 */ 2280 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n", 2281 cdev->ll2->rx_size); 2282 for (i = 0; i < QED_LL2_RX_SIZE; i++) { 2283 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); 2284 if (!buffer) { 2285 DP_INFO(cdev, "Failed to allocate LL2 buffers\n"); 2286 goto fail; 2287 } 2288 2289 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data, 2290 &buffer->phys_addr); 2291 if (rc) { 2292 kfree(buffer); 2293 goto fail; 2294 } 2295 2296 list_add_tail(&buffer->list, &cdev->ll2->list); 2297 } 2298 2299 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) { 2300 case QED_PCI_FCOE: 2301 conn_type = QED_LL2_TYPE_FCOE; 2302 break; 2303 case QED_PCI_ISCSI: 2304 conn_type = QED_LL2_TYPE_ISCSI; 2305 break; 2306 case QED_PCI_ETH_ROCE: 2307 conn_type = QED_LL2_TYPE_ROCE; 2308 break; 2309 default: 2310 conn_type = QED_LL2_TYPE_TEST; 2311 } 2312 2313 qed_ll2_set_conn_data(cdev, &data, params, conn_type, 2314 &cdev->ll2->handle, false); 2315 2316 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data); 2317 if (rc) { 2318 DP_INFO(cdev, "Failed to acquire LL2 connection\n"); 2319 goto fail; 2320 } 2321 2322 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev), 2323 cdev->ll2->handle); 2324 if (rc) { 2325 DP_INFO(cdev, "Failed to establish LL2 connection\n"); 2326 goto release_fail; 2327 } 2328 2329 /* Post all Rx buffers to FW */ 2330 spin_lock_bh(&cdev->ll2->lock); 2331 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) { 2332 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), 2333 cdev->ll2->handle, 2334 buffer->phys_addr, 0, buffer, 1); 2335 if (rc) { 2336 DP_INFO(cdev, 2337 "Failed to post an Rx buffer; Deleting it\n"); 2338 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, 2339 cdev->ll2->rx_size, DMA_FROM_DEVICE); 2340 kfree(buffer->data); 2341 list_del(&buffer->list); 2342 kfree(buffer); 2343 } else { 2344 cdev->ll2->rx_cnt++; 2345 } 2346 } 2347 spin_unlock_bh(&cdev->ll2->lock); 2348 2349 if (!cdev->ll2->rx_cnt) { 2350 DP_INFO(cdev, "Failed passing even a single Rx buffer\n"); 2351 goto release_terminate; 2352 } 2353 2354 if (!is_valid_ether_addr(params->ll2_mac_address)) { 2355 DP_INFO(cdev, "Invalid Ethernet address\n"); 2356 goto release_terminate; 2357 } 2358 2359 if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI) { 2360 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n"); 2361 rc = qed_ll2_start_ooo(cdev, params); 2362 if (rc) { 2363 DP_INFO(cdev, 2364 "Failed to initialize the OOO LL2 queue\n"); 2365 goto release_terminate; 2366 } 2367 } 2368 2369 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2370 if (!p_ptt) { 2371 DP_INFO(cdev, "Failed to acquire PTT\n"); 2372 goto release_terminate; 2373 } 2374 2375 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2376 params->ll2_mac_address); 2377 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2378 if (rc) { 2379 DP_ERR(cdev, "Failed to allocate LLH filter\n"); 2380 goto release_terminate_all; 2381 } 2382 2383 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address); 2384 return 0; 2385 2386 release_terminate_all: 2387 2388 release_terminate: 2389 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2390 release_fail: 2391 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2392 fail: 2393 qed_ll2_kill_buffers(cdev); 2394 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2395 return -EINVAL; 2396 } 2397 2398 static int qed_ll2_stop(struct qed_dev *cdev) 2399 { 2400 struct qed_ptt *p_ptt; 2401 int rc; 2402 2403 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE) 2404 return 0; 2405 2406 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev)); 2407 if (!p_ptt) { 2408 DP_INFO(cdev, "Failed to acquire PTT\n"); 2409 goto fail; 2410 } 2411 2412 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt, 2413 cdev->ll2_mac_address); 2414 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); 2415 eth_zero_addr(cdev->ll2_mac_address); 2416 2417 if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI) 2418 qed_ll2_stop_ooo(cdev); 2419 2420 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), 2421 cdev->ll2->handle); 2422 if (rc) 2423 DP_INFO(cdev, "Failed to terminate LL2 connection\n"); 2424 2425 qed_ll2_kill_buffers(cdev); 2426 2427 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle); 2428 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE; 2429 2430 return rc; 2431 fail: 2432 return -EINVAL; 2433 } 2434 2435 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb, 2436 unsigned long xmit_flags) 2437 { 2438 struct qed_ll2_tx_pkt_info pkt; 2439 const skb_frag_t *frag; 2440 int rc = -EINVAL, i; 2441 dma_addr_t mapping; 2442 u16 vlan = 0; 2443 u8 flags = 0; 2444 2445 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) { 2446 DP_INFO(cdev, "Cannot transmit a checksummed packet\n"); 2447 return -EINVAL; 2448 } 2449 2450 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) { 2451 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n", 2452 1 + skb_shinfo(skb)->nr_frags); 2453 return -EINVAL; 2454 } 2455 2456 mapping = dma_map_single(&cdev->pdev->dev, skb->data, 2457 skb->len, DMA_TO_DEVICE); 2458 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2459 DP_NOTICE(cdev, "SKB mapping failed\n"); 2460 return -EINVAL; 2461 } 2462 2463 /* Request HW to calculate IP csum */ 2464 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) && 2465 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 2466 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT); 2467 2468 if (skb_vlan_tag_present(skb)) { 2469 vlan = skb_vlan_tag_get(skb); 2470 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT); 2471 } 2472 2473 memset(&pkt, 0, sizeof(pkt)); 2474 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags; 2475 pkt.vlan = vlan; 2476 pkt.bd_flags = flags; 2477 pkt.tx_dest = QED_LL2_TX_DEST_NW; 2478 pkt.first_frag = mapping; 2479 pkt.first_frag_len = skb->len; 2480 pkt.cookie = skb; 2481 if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) && 2482 test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags)) 2483 pkt.remove_stag = true; 2484 2485 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle, 2486 &pkt, 1); 2487 if (rc) 2488 goto err; 2489 2490 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 2491 frag = &skb_shinfo(skb)->frags[i]; 2492 2493 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0, 2494 skb_frag_size(frag), DMA_TO_DEVICE); 2495 2496 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) { 2497 DP_NOTICE(cdev, 2498 "Unable to map frag - dropping packet\n"); 2499 goto err; 2500 } 2501 2502 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev), 2503 cdev->ll2->handle, 2504 mapping, 2505 skb_frag_size(frag)); 2506 2507 /* if failed not much to do here, partial packet has been posted 2508 * we can't free memory, will need to wait for completion. 2509 */ 2510 if (rc) 2511 goto err2; 2512 } 2513 2514 return 0; 2515 2516 err: 2517 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE); 2518 2519 err2: 2520 return rc; 2521 } 2522 2523 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats) 2524 { 2525 if (!cdev->ll2) 2526 return -EINVAL; 2527 2528 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev), 2529 cdev->ll2->handle, stats); 2530 } 2531 2532 const struct qed_ll2_ops qed_ll2_ops_pass = { 2533 .start = &qed_ll2_start, 2534 .stop = &qed_ll2_stop, 2535 .start_xmit = &qed_ll2_start_xmit, 2536 .register_cb_ops = &qed_ll2_register_cb_ops, 2537 .get_stats = &qed_ll2_stats, 2538 }; 2539 2540 int qed_ll2_alloc_if(struct qed_dev *cdev) 2541 { 2542 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL); 2543 return cdev->ll2 ? 0 : -ENOMEM; 2544 } 2545 2546 void qed_ll2_dealloc_if(struct qed_dev *cdev) 2547 { 2548 kfree(cdev->ll2); 2549 cdev->ll2 = NULL; 2550 } 2551