11f4d4ed6SAlexander Lobakin /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2dacd88d6SYuval Mintz /* QLogic qed NIC Driver 3e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 4dacd88d6SYuval Mintz */ 51f4d4ed6SAlexander Lobakin 6dacd88d6SYuval Mintz #ifndef _QED_L2_H 7dacd88d6SYuval Mintz #define _QED_L2_H 8dacd88d6SYuval Mintz #include <linux/types.h> 9dacd88d6SYuval Mintz #include <linux/io.h> 10dacd88d6SYuval Mintz #include <linux/kernel.h> 11dacd88d6SYuval Mintz #include <linux/slab.h> 12dacd88d6SYuval Mintz #include <linux/qed/qed_eth_if.h> 13dacd88d6SYuval Mintz #include "qed.h" 14dacd88d6SYuval Mintz #include "qed_hw.h" 15dacd88d6SYuval Mintz #include "qed_sp.h" 16f29ffdb6SMintz, Yuval struct qed_rss_params { 17f29ffdb6SMintz, Yuval u8 update_rss_config; 18f29ffdb6SMintz, Yuval u8 rss_enable; 19f29ffdb6SMintz, Yuval u8 rss_eng_id; 20f29ffdb6SMintz, Yuval u8 update_rss_capabilities; 21f29ffdb6SMintz, Yuval u8 update_rss_ind_table; 22f29ffdb6SMintz, Yuval u8 update_rss_key; 23f29ffdb6SMintz, Yuval u8 rss_caps; 24f29ffdb6SMintz, Yuval u8 rss_table_size_log; 25f29ffdb6SMintz, Yuval 26f29ffdb6SMintz, Yuval /* Indirection table consist of rx queue handles */ 27f29ffdb6SMintz, Yuval void *rss_ind_table[QED_RSS_IND_TABLE_SIZE]; 28f29ffdb6SMintz, Yuval u32 rss_key[QED_RSS_KEY_SIZE]; 29f29ffdb6SMintz, Yuval }; 30dacd88d6SYuval Mintz 3117b235c1SYuval Mintz struct qed_sge_tpa_params { 3217b235c1SYuval Mintz u8 max_buffers_per_cqe; 3317b235c1SYuval Mintz 3417b235c1SYuval Mintz u8 update_tpa_en_flg; 3517b235c1SYuval Mintz u8 tpa_ipv4_en_flg; 3617b235c1SYuval Mintz u8 tpa_ipv6_en_flg; 3717b235c1SYuval Mintz u8 tpa_ipv4_tunn_en_flg; 3817b235c1SYuval Mintz u8 tpa_ipv6_tunn_en_flg; 3917b235c1SYuval Mintz 4017b235c1SYuval Mintz u8 update_tpa_param_flg; 4117b235c1SYuval Mintz u8 tpa_pkt_split_flg; 4217b235c1SYuval Mintz u8 tpa_hdr_data_split_flg; 4317b235c1SYuval Mintz u8 tpa_gro_consistent_flg; 4417b235c1SYuval Mintz u8 tpa_max_aggs_num; 4517b235c1SYuval Mintz u16 tpa_max_size; 4617b235c1SYuval Mintz u16 tpa_min_size_to_start; 4717b235c1SYuval Mintz u16 tpa_min_size_to_cont; 4817b235c1SYuval Mintz }; 4917b235c1SYuval Mintz 50dacd88d6SYuval Mintz enum qed_filter_opcode { 51dacd88d6SYuval Mintz QED_FILTER_ADD, 52dacd88d6SYuval Mintz QED_FILTER_REMOVE, 53dacd88d6SYuval Mintz QED_FILTER_MOVE, 54dacd88d6SYuval Mintz QED_FILTER_REPLACE, /* Delete all MACs and add new one instead */ 55dacd88d6SYuval Mintz QED_FILTER_FLUSH, /* Removes all filters */ 56dacd88d6SYuval Mintz }; 57dacd88d6SYuval Mintz 58dacd88d6SYuval Mintz enum qed_filter_ucast_type { 59dacd88d6SYuval Mintz QED_FILTER_MAC, 60dacd88d6SYuval Mintz QED_FILTER_VLAN, 61dacd88d6SYuval Mintz QED_FILTER_MAC_VLAN, 62dacd88d6SYuval Mintz QED_FILTER_INNER_MAC, 63dacd88d6SYuval Mintz QED_FILTER_INNER_VLAN, 64dacd88d6SYuval Mintz QED_FILTER_INNER_PAIR, 65dacd88d6SYuval Mintz QED_FILTER_INNER_MAC_VNI_PAIR, 66dacd88d6SYuval Mintz QED_FILTER_MAC_VNI_PAIR, 67dacd88d6SYuval Mintz QED_FILTER_VNI, 68dacd88d6SYuval Mintz }; 69dacd88d6SYuval Mintz 70dacd88d6SYuval Mintz struct qed_filter_ucast { 71dacd88d6SYuval Mintz enum qed_filter_opcode opcode; 72dacd88d6SYuval Mintz enum qed_filter_ucast_type type; 73dacd88d6SYuval Mintz u8 is_rx_filter; 74dacd88d6SYuval Mintz u8 is_tx_filter; 75dacd88d6SYuval Mintz u8 vport_to_add_to; 76dacd88d6SYuval Mintz u8 vport_to_remove_from; 77dacd88d6SYuval Mintz unsigned char mac[ETH_ALEN]; 78dacd88d6SYuval Mintz u8 assert_on_error; 79dacd88d6SYuval Mintz u16 vlan; 80dacd88d6SYuval Mintz u32 vni; 81dacd88d6SYuval Mintz }; 82dacd88d6SYuval Mintz 83dacd88d6SYuval Mintz struct qed_filter_mcast { 84dacd88d6SYuval Mintz /* MOVE is not supported for multicast */ 85dacd88d6SYuval Mintz enum qed_filter_opcode opcode; 86dacd88d6SYuval Mintz u8 vport_to_add_to; 87dacd88d6SYuval Mintz u8 vport_to_remove_from; 88dacd88d6SYuval Mintz u8 num_mc_addrs; 89dacd88d6SYuval Mintz #define QED_MAX_MC_ADDRS 64 90dacd88d6SYuval Mintz unsigned char mac[QED_MAX_MC_ADDRS][ETH_ALEN]; 91dacd88d6SYuval Mintz }; 92dacd88d6SYuval Mintz 933da7a37aSMintz, Yuval /** 943da7a37aSMintz, Yuval * @brief qed_eth_rx_queue_stop - This ramrod closes an Rx queue 953da7a37aSMintz, Yuval * 963da7a37aSMintz, Yuval * @param p_hwfn 973da7a37aSMintz, Yuval * @param p_rxq Handler of queue to close 983da7a37aSMintz, Yuval * @param eq_completion_only If True completion will be on 993da7a37aSMintz, Yuval * EQe, if False completion will be 1003da7a37aSMintz, Yuval * on EQe if p_hwfn opaque 1013da7a37aSMintz, Yuval * different from the RXQ opaque 1023da7a37aSMintz, Yuval * otherwise on CQe. 1033da7a37aSMintz, Yuval * @param cqe_completion If True completion will be 1043da7a37aSMintz, Yuval * receive on CQe. 1053da7a37aSMintz, Yuval * @return int 1063da7a37aSMintz, Yuval */ 1073da7a37aSMintz, Yuval int 1083da7a37aSMintz, Yuval qed_eth_rx_queue_stop(struct qed_hwfn *p_hwfn, 1093da7a37aSMintz, Yuval void *p_rxq, 110dacd88d6SYuval Mintz bool eq_completion_only, bool cqe_completion); 111dacd88d6SYuval Mintz 1123da7a37aSMintz, Yuval /** 1133da7a37aSMintz, Yuval * @brief qed_eth_tx_queue_stop - closes a Tx queue 1143da7a37aSMintz, Yuval * 1153da7a37aSMintz, Yuval * @param p_hwfn 1163da7a37aSMintz, Yuval * @param p_txq - handle to Tx queue needed to be closed 1173da7a37aSMintz, Yuval * 1183da7a37aSMintz, Yuval * @return int 1193da7a37aSMintz, Yuval */ 1203da7a37aSMintz, Yuval int qed_eth_tx_queue_stop(struct qed_hwfn *p_hwfn, void *p_txq); 121dacd88d6SYuval Mintz 122dacd88d6SYuval Mintz enum qed_tpa_mode { 123dacd88d6SYuval Mintz QED_TPA_MODE_NONE, 124dacd88d6SYuval Mintz QED_TPA_MODE_UNUSED, 125dacd88d6SYuval Mintz QED_TPA_MODE_GRO, 126dacd88d6SYuval Mintz QED_TPA_MODE_MAX 127dacd88d6SYuval Mintz }; 128dacd88d6SYuval Mintz 129dacd88d6SYuval Mintz struct qed_sp_vport_start_params { 130dacd88d6SYuval Mintz enum qed_tpa_mode tpa_mode; 131dacd88d6SYuval Mintz bool remove_inner_vlan; 132831bfb0eSYuval Mintz bool tx_switching; 133c78c70faSSudarsana Reddy Kalluru bool handle_ptp_pkts; 13408feecd7SYuval Mintz bool only_untagged; 135dacd88d6SYuval Mintz bool drop_ttl0; 136dacd88d6SYuval Mintz u8 max_buffers_per_cqe; 137dacd88d6SYuval Mintz u32 concrete_fid; 138dacd88d6SYuval Mintz u16 opaque_fid; 139dacd88d6SYuval Mintz u8 vport_id; 140dacd88d6SYuval Mintz u16 mtu; 14111a85d75SYuval Mintz bool check_mac; 14211a85d75SYuval Mintz bool check_ethtype; 143dacd88d6SYuval Mintz }; 144dacd88d6SYuval Mintz 145dacd88d6SYuval Mintz int qed_sp_eth_vport_start(struct qed_hwfn *p_hwfn, 146dacd88d6SYuval Mintz struct qed_sp_vport_start_params *p_params); 147dacd88d6SYuval Mintz 148dacd88d6SYuval Mintz 149dacd88d6SYuval Mintz struct qed_filter_accept_flags { 150dacd88d6SYuval Mintz u8 update_rx_mode_config; 151dacd88d6SYuval Mintz u8 update_tx_mode_config; 152dacd88d6SYuval Mintz u8 rx_accept_filter; 153dacd88d6SYuval Mintz u8 tx_accept_filter; 154dacd88d6SYuval Mintz #define QED_ACCEPT_NONE 0x01 155dacd88d6SYuval Mintz #define QED_ACCEPT_UCAST_MATCHED 0x02 156dacd88d6SYuval Mintz #define QED_ACCEPT_UCAST_UNMATCHED 0x04 157dacd88d6SYuval Mintz #define QED_ACCEPT_MCAST_MATCHED 0x08 158dacd88d6SYuval Mintz #define QED_ACCEPT_MCAST_UNMATCHED 0x10 159dacd88d6SYuval Mintz #define QED_ACCEPT_BCAST 0x20 160d52c89f1SMichal Kalderon #define QED_ACCEPT_ANY_VNI 0x40 161dacd88d6SYuval Mintz }; 162dacd88d6SYuval Mintz 163d51e4af5SChopra, Manish struct qed_arfs_config_params { 164d51e4af5SChopra, Manish bool tcp; 165d51e4af5SChopra, Manish bool udp; 166d51e4af5SChopra, Manish bool ipv4; 167d51e4af5SChopra, Manish bool ipv6; 168da090917STomer Tayar enum qed_filter_config_mode mode; 169d51e4af5SChopra, Manish }; 170d51e4af5SChopra, Manish 171dacd88d6SYuval Mintz struct qed_sp_vport_update_params { 172dacd88d6SYuval Mintz u16 opaque_fid; 173dacd88d6SYuval Mintz u8 vport_id; 174dacd88d6SYuval Mintz u8 update_vport_active_rx_flg; 175dacd88d6SYuval Mintz u8 vport_active_rx_flg; 176dacd88d6SYuval Mintz u8 update_vport_active_tx_flg; 177dacd88d6SYuval Mintz u8 vport_active_tx_flg; 17817b235c1SYuval Mintz u8 update_inner_vlan_removal_flg; 17917b235c1SYuval Mintz u8 inner_vlan_removal_flg; 18008feecd7SYuval Mintz u8 silent_vlan_removal_flg; 18108feecd7SYuval Mintz u8 update_default_vlan_enable_flg; 18208feecd7SYuval Mintz u8 default_vlan_enable_flg; 18308feecd7SYuval Mintz u8 update_default_vlan_flg; 18408feecd7SYuval Mintz u16 default_vlan; 18517b235c1SYuval Mintz u8 update_tx_switching_flg; 18617b235c1SYuval Mintz u8 tx_switching_flg; 187dacd88d6SYuval Mintz u8 update_approx_mcast_flg; 1886ddc7608SYuval Mintz u8 update_anti_spoofing_en_flg; 1896ddc7608SYuval Mintz u8 anti_spoofing_en; 190dacd88d6SYuval Mintz u8 update_accept_any_vlan_flg; 191dacd88d6SYuval Mintz u8 accept_any_vlan; 19225c020a9SSudarsana Reddy Kalluru u32 bins[8]; 193dacd88d6SYuval Mintz struct qed_rss_params *rss_params; 194dacd88d6SYuval Mintz struct qed_filter_accept_flags accept_flags; 19517b235c1SYuval Mintz struct qed_sge_tpa_params *sge_tpa_params; 196ff929696SManish Chopra u8 update_ctl_frame_check; 197ff929696SManish Chopra u8 mac_chk_en; 198ff929696SManish Chopra u8 ethtype_chk_en; 199dacd88d6SYuval Mintz }; 200dacd88d6SYuval Mintz 201dacd88d6SYuval Mintz int qed_sp_vport_update(struct qed_hwfn *p_hwfn, 202dacd88d6SYuval Mintz struct qed_sp_vport_update_params *p_params, 203dacd88d6SYuval Mintz enum spq_mode comp_mode, 204dacd88d6SYuval Mintz struct qed_spq_comp_cb *p_comp_data); 205dacd88d6SYuval Mintz 206dacd88d6SYuval Mintz /** 207dacd88d6SYuval Mintz * @brief qed_sp_vport_stop - 208dacd88d6SYuval Mintz * 209dacd88d6SYuval Mintz * This ramrod closes a VPort after all its RX and TX queues are terminated. 210dacd88d6SYuval Mintz * An Assert is generated if any queues are left open. 211dacd88d6SYuval Mintz * 212dacd88d6SYuval Mintz * @param p_hwfn 213dacd88d6SYuval Mintz * @param opaque_fid 214dacd88d6SYuval Mintz * @param vport_id VPort ID 215dacd88d6SYuval Mintz * 216dacd88d6SYuval Mintz * @return int 217dacd88d6SYuval Mintz */ 218dacd88d6SYuval Mintz int qed_sp_vport_stop(struct qed_hwfn *p_hwfn, u16 opaque_fid, u8 vport_id); 219dacd88d6SYuval Mintz 220dacd88d6SYuval Mintz int qed_sp_eth_filter_ucast(struct qed_hwfn *p_hwfn, 221dacd88d6SYuval Mintz u16 opaque_fid, 222dacd88d6SYuval Mintz struct qed_filter_ucast *p_filter_cmd, 223dacd88d6SYuval Mintz enum spq_mode comp_mode, 224dacd88d6SYuval Mintz struct qed_spq_comp_cb *p_comp_data); 225dacd88d6SYuval Mintz 22617b235c1SYuval Mintz /** 22717b235c1SYuval Mintz * @brief qed_sp_rx_eth_queues_update - 22817b235c1SYuval Mintz * 22917b235c1SYuval Mintz * This ramrod updates an RX queue. It is used for setting the active state 23017b235c1SYuval Mintz * of the queue and updating the TPA and SGE parameters. 23117b235c1SYuval Mintz * 23217b235c1SYuval Mintz * @note At the moment - only used by non-linux VFs. 23317b235c1SYuval Mintz * 23417b235c1SYuval Mintz * @param p_hwfn 2353da7a37aSMintz, Yuval * @param pp_rxq_handlers An array of queue handlers to be updated. 2363da7a37aSMintz, Yuval * @param num_rxqs number of queues to update. 23717b235c1SYuval Mintz * @param complete_cqe_flg Post completion to the CQE Ring if set 23817b235c1SYuval Mintz * @param complete_event_flg Post completion to the Event Ring if set 2393da7a37aSMintz, Yuval * @param comp_mode 2403da7a37aSMintz, Yuval * @param p_comp_data 24117b235c1SYuval Mintz * 24217b235c1SYuval Mintz * @return int 24317b235c1SYuval Mintz */ 24417b235c1SYuval Mintz 24517b235c1SYuval Mintz int 24617b235c1SYuval Mintz qed_sp_eth_rx_queues_update(struct qed_hwfn *p_hwfn, 2473da7a37aSMintz, Yuval void **pp_rxq_handlers, 24817b235c1SYuval Mintz u8 num_rxqs, 24917b235c1SYuval Mintz u8 complete_cqe_flg, 25017b235c1SYuval Mintz u8 complete_event_flg, 25117b235c1SYuval Mintz enum spq_mode comp_mode, 25217b235c1SYuval Mintz struct qed_spq_comp_cb *p_comp_data); 25317b235c1SYuval Mintz 2546c754246SSudarsana Reddy Kalluru void qed_get_vport_stats(struct qed_dev *cdev, struct qed_eth_stats *stats); 2556c754246SSudarsana Reddy Kalluru 2563da7a37aSMintz, Yuval void qed_reset_vport_stats(struct qed_dev *cdev); 2573da7a37aSMintz, Yuval 258da090917STomer Tayar /** 259da090917STomer Tayar * *@brief qed_arfs_mode_configure - 260da090917STomer Tayar * 261da090917STomer Tayar **Enable or disable rfs mode. It must accept atleast one of tcp or udp true 262da090917STomer Tayar **and atleast one of ipv4 or ipv6 true to enable rfs mode. 263da090917STomer Tayar * 264da090917STomer Tayar **@param p_hwfn 265da090917STomer Tayar **@param p_ptt 266da090917STomer Tayar **@param p_cfg_params - arfs mode configuration parameters. 267da090917STomer Tayar * 268da090917STomer Tayar */ 269da090917STomer Tayar void qed_arfs_mode_configure(struct qed_hwfn *p_hwfn, 270da090917STomer Tayar struct qed_ptt *p_ptt, 271da090917STomer Tayar struct qed_arfs_config_params *p_cfg_params); 272da090917STomer Tayar 273da090917STomer Tayar /** 274da090917STomer Tayar * @brief - qed_configure_rfs_ntuple_filter 275da090917STomer Tayar * 276da090917STomer Tayar * This ramrod should be used to add or remove arfs hw filter 277da090917STomer Tayar * 278da090917STomer Tayar * @params p_hwfn 279da090917STomer Tayar * @params p_cb - Used for QED_SPQ_MODE_CB,where client would initialize 280da090917STomer Tayar * it with cookie and callback function address, if not 281da090917STomer Tayar * using this mode then client must pass NULL. 282da090917STomer Tayar * @params p_params 283da090917STomer Tayar */ 284da090917STomer Tayar int 285da090917STomer Tayar qed_configure_rfs_ntuple_filter(struct qed_hwfn *p_hwfn, 286da090917STomer Tayar struct qed_spq_comp_cb *p_cb, 287da090917STomer Tayar struct qed_ntuple_filter_params *p_params); 288da090917STomer Tayar 2890db711bbSMintz, Yuval #define MAX_QUEUES_PER_QZONE (sizeof(unsigned long) * 8) 2903946497aSMintz, Yuval #define QED_QUEUE_CID_SELF (0xff) 2910db711bbSMintz, Yuval 292f604b17dSMintz, Yuval /* Almost identical to the qed_queue_start_common_params, 293f604b17dSMintz, Yuval * but here we maintain the SB index in IGU CAM. 2943da7a37aSMintz, Yuval */ 295f604b17dSMintz, Yuval struct qed_queue_cid_params { 296f604b17dSMintz, Yuval u8 vport_id; 297f604b17dSMintz, Yuval u16 queue_id; 298f604b17dSMintz, Yuval u8 stats_id; 299f604b17dSMintz, Yuval }; 300f604b17dSMintz, Yuval 3013946497aSMintz, Yuval /* Additional parameters required for initialization of the queue_cid 3023946497aSMintz, Yuval * and are relevant only for a PF initializing one for its VFs. 3033946497aSMintz, Yuval */ 3043946497aSMintz, Yuval struct qed_queue_cid_vf_params { 3053946497aSMintz, Yuval /* Should match the VF's relative index */ 3063946497aSMintz, Yuval u8 vfid; 3073946497aSMintz, Yuval 3083946497aSMintz, Yuval /* 0-based queue index. Should reflect the relative qzone the 3093946497aSMintz, Yuval * VF thinks is associated with it [in its range]. 3103946497aSMintz, Yuval */ 3113946497aSMintz, Yuval u8 vf_qid; 3123946497aSMintz, Yuval 3133b19f478SMintz, Yuval /* Indicates a VF is legacy, making it differ in several things: 3143946497aSMintz, Yuval * - Producers would be placed in a different place. 3153b19f478SMintz, Yuval * - Makes assumptions regarding the CIDs. 3163946497aSMintz, Yuval */ 3173b19f478SMintz, Yuval u8 vf_legacy; 3183946497aSMintz, Yuval 319bbe3f233SMintz, Yuval u8 qid_usage_idx; 3203946497aSMintz, Yuval }; 3213946497aSMintz, Yuval 322f604b17dSMintz, Yuval struct qed_queue_cid { 323f604b17dSMintz, Yuval /* For stats-id, the `rel' is actually absolute as well */ 324f604b17dSMintz, Yuval struct qed_queue_cid_params rel; 325f604b17dSMintz, Yuval struct qed_queue_cid_params abs; 326f604b17dSMintz, Yuval 327f604b17dSMintz, Yuval /* These have no 'relative' meaning */ 328f604b17dSMintz, Yuval u16 sb_igu_id; 329f604b17dSMintz, Yuval u8 sb_idx; 330f604b17dSMintz, Yuval 3313da7a37aSMintz, Yuval u32 cid; 3323da7a37aSMintz, Yuval u16 opaque_fid; 3333da7a37aSMintz, Yuval 334007bc371SMintz, Yuval bool b_is_rx; 335007bc371SMintz, Yuval 3363da7a37aSMintz, Yuval /* VFs queues are mapped differently, so we need to know the 3373da7a37aSMintz, Yuval * relative queue associated with them [0-based]. 3383da7a37aSMintz, Yuval * Notice this is relevant on the *PF* queue-cid of its VF's queues, 3393da7a37aSMintz, Yuval * and not on the VF itself. 3403da7a37aSMintz, Yuval */ 3413946497aSMintz, Yuval u8 vfid; 3423da7a37aSMintz, Yuval u8 vf_qid; 3433da7a37aSMintz, Yuval 344bbe3f233SMintz, Yuval /* We need an additional index to differentiate between queues opened 345bbe3f233SMintz, Yuval * for same queue-zone, as VFs would have to communicate the info 346bbe3f233SMintz, Yuval * to the PF [otherwise PF has no way to differentiate]. 347bbe3f233SMintz, Yuval */ 348bbe3f233SMintz, Yuval u8 qid_usage_idx; 349bbe3f233SMintz, Yuval 3503b19f478SMintz, Yuval u8 vf_legacy; 3513b19f478SMintz, Yuval #define QED_QCID_LEGACY_VF_RX_PROD (BIT(0)) 3523b19f478SMintz, Yuval #define QED_QCID_LEGACY_VF_CID (BIT(1)) 353f29ffdb6SMintz, Yuval 354f29ffdb6SMintz, Yuval struct qed_hwfn *p_owner; 3553da7a37aSMintz, Yuval }; 3563da7a37aSMintz, Yuval 3570db711bbSMintz, Yuval int qed_l2_alloc(struct qed_hwfn *p_hwfn); 3580db711bbSMintz, Yuval void qed_l2_setup(struct qed_hwfn *p_hwfn); 3590db711bbSMintz, Yuval void qed_l2_free(struct qed_hwfn *p_hwfn); 3600db711bbSMintz, Yuval 3613da7a37aSMintz, Yuval void qed_eth_queue_cid_release(struct qed_hwfn *p_hwfn, 3623da7a37aSMintz, Yuval struct qed_queue_cid *p_cid); 3633da7a37aSMintz, Yuval 3643946497aSMintz, Yuval struct qed_queue_cid * 3653946497aSMintz, Yuval qed_eth_queue_to_cid(struct qed_hwfn *p_hwfn, 3663da7a37aSMintz, Yuval u16 opaque_fid, 3673946497aSMintz, Yuval struct qed_queue_start_common_params *p_params, 368007bc371SMintz, Yuval bool b_is_rx, 3693946497aSMintz, Yuval struct qed_queue_cid_vf_params *p_vf_params); 3703da7a37aSMintz, Yuval 3713da7a37aSMintz, Yuval int 3723da7a37aSMintz, Yuval qed_sp_eth_vport_start(struct qed_hwfn *p_hwfn, 373dacd88d6SYuval Mintz struct qed_sp_vport_start_params *p_params); 374dacd88d6SYuval Mintz 3753da7a37aSMintz, Yuval /** 3763da7a37aSMintz, Yuval * @brief - Starts an Rx queue, when queue_cid is already prepared 3773da7a37aSMintz, Yuval * 3783da7a37aSMintz, Yuval * @param p_hwfn 3793da7a37aSMintz, Yuval * @param p_cid 3803da7a37aSMintz, Yuval * @param bd_max_bytes 3813da7a37aSMintz, Yuval * @param bd_chain_phys_addr 3823da7a37aSMintz, Yuval * @param cqe_pbl_addr 3833da7a37aSMintz, Yuval * @param cqe_pbl_size 3843da7a37aSMintz, Yuval * 3853da7a37aSMintz, Yuval * @return int 3863da7a37aSMintz, Yuval */ 3873da7a37aSMintz, Yuval int 3883da7a37aSMintz, Yuval qed_eth_rxq_start_ramrod(struct qed_hwfn *p_hwfn, 3893da7a37aSMintz, Yuval struct qed_queue_cid *p_cid, 390dacd88d6SYuval Mintz u16 bd_max_bytes, 391dacd88d6SYuval Mintz dma_addr_t bd_chain_phys_addr, 3923da7a37aSMintz, Yuval dma_addr_t cqe_pbl_addr, u16 cqe_pbl_size); 393dacd88d6SYuval Mintz 3943da7a37aSMintz, Yuval /** 3953da7a37aSMintz, Yuval * @brief - Starts a Tx queue, where queue_cid is already prepared 3963da7a37aSMintz, Yuval * 3973da7a37aSMintz, Yuval * @param p_hwfn 3983da7a37aSMintz, Yuval * @param p_cid 3993da7a37aSMintz, Yuval * @param pbl_addr 4003da7a37aSMintz, Yuval * @param pbl_size 4013da7a37aSMintz, Yuval * @param p_pq_params - parameters for choosing the PQ for this Tx queue 4023da7a37aSMintz, Yuval * 4033da7a37aSMintz, Yuval * @return int 4043da7a37aSMintz, Yuval */ 4053da7a37aSMintz, Yuval int 4063da7a37aSMintz, Yuval qed_eth_txq_start_ramrod(struct qed_hwfn *p_hwfn, 4073da7a37aSMintz, Yuval struct qed_queue_cid *p_cid, 4083da7a37aSMintz, Yuval dma_addr_t pbl_addr, u16 pbl_size, u16 pq_id); 409dacd88d6SYuval Mintz 410dacd88d6SYuval Mintz u8 qed_mcast_bin_from_mac(u8 *mac); 411dacd88d6SYuval Mintz 412477f2d14SRahul Verma int qed_set_rxq_coalesce(struct qed_hwfn *p_hwfn, 413477f2d14SRahul Verma struct qed_ptt *p_ptt, 414477f2d14SRahul Verma u16 coalesce, struct qed_queue_cid *p_cid); 415477f2d14SRahul Verma 416477f2d14SRahul Verma int qed_set_txq_coalesce(struct qed_hwfn *p_hwfn, 417477f2d14SRahul Verma struct qed_ptt *p_ptt, 418477f2d14SRahul Verma u16 coalesce, struct qed_queue_cid *p_cid); 419bf5a94bfSRahul Verma 420bf5a94bfSRahul Verma int qed_get_rxq_coalesce(struct qed_hwfn *p_hwfn, 421bf5a94bfSRahul Verma struct qed_ptt *p_ptt, 422bf5a94bfSRahul Verma struct qed_queue_cid *p_cid, u16 *p_hw_coal); 423bf5a94bfSRahul Verma 424bf5a94bfSRahul Verma int qed_get_txq_coalesce(struct qed_hwfn *p_hwfn, 425bf5a94bfSRahul Verma struct qed_ptt *p_ptt, 426bf5a94bfSRahul Verma struct qed_queue_cid *p_cid, u16 *p_hw_coal); 427bf5a94bfSRahul Verma 428bf5a94bfSRahul Verma #endif 429