1dacd88d6SYuval Mintz /* QLogic qed NIC Driver 2dacd88d6SYuval Mintz * Copyright (c) 2015 QLogic Corporation 3dacd88d6SYuval Mintz * 4dacd88d6SYuval Mintz * This software is available under the terms of the GNU General Public License 5dacd88d6SYuval Mintz * (GPL) Version 2, available from the file COPYING in the main directory of 6dacd88d6SYuval Mintz * this source tree. 7dacd88d6SYuval Mintz */ 8dacd88d6SYuval Mintz #ifndef _QED_L2_H 9dacd88d6SYuval Mintz #define _QED_L2_H 10dacd88d6SYuval Mintz #include <linux/types.h> 11dacd88d6SYuval Mintz #include <linux/io.h> 12dacd88d6SYuval Mintz #include <linux/kernel.h> 13dacd88d6SYuval Mintz #include <linux/slab.h> 14dacd88d6SYuval Mintz #include <linux/qed/qed_eth_if.h> 15dacd88d6SYuval Mintz #include "qed.h" 16dacd88d6SYuval Mintz #include "qed_hw.h" 17dacd88d6SYuval Mintz #include "qed_sp.h" 18dacd88d6SYuval Mintz 1917b235c1SYuval Mintz struct qed_sge_tpa_params { 2017b235c1SYuval Mintz u8 max_buffers_per_cqe; 2117b235c1SYuval Mintz 2217b235c1SYuval Mintz u8 update_tpa_en_flg; 2317b235c1SYuval Mintz u8 tpa_ipv4_en_flg; 2417b235c1SYuval Mintz u8 tpa_ipv6_en_flg; 2517b235c1SYuval Mintz u8 tpa_ipv4_tunn_en_flg; 2617b235c1SYuval Mintz u8 tpa_ipv6_tunn_en_flg; 2717b235c1SYuval Mintz 2817b235c1SYuval Mintz u8 update_tpa_param_flg; 2917b235c1SYuval Mintz u8 tpa_pkt_split_flg; 3017b235c1SYuval Mintz u8 tpa_hdr_data_split_flg; 3117b235c1SYuval Mintz u8 tpa_gro_consistent_flg; 3217b235c1SYuval Mintz u8 tpa_max_aggs_num; 3317b235c1SYuval Mintz u16 tpa_max_size; 3417b235c1SYuval Mintz u16 tpa_min_size_to_start; 3517b235c1SYuval Mintz u16 tpa_min_size_to_cont; 3617b235c1SYuval Mintz }; 3717b235c1SYuval Mintz 38dacd88d6SYuval Mintz enum qed_filter_opcode { 39dacd88d6SYuval Mintz QED_FILTER_ADD, 40dacd88d6SYuval Mintz QED_FILTER_REMOVE, 41dacd88d6SYuval Mintz QED_FILTER_MOVE, 42dacd88d6SYuval Mintz QED_FILTER_REPLACE, /* Delete all MACs and add new one instead */ 43dacd88d6SYuval Mintz QED_FILTER_FLUSH, /* Removes all filters */ 44dacd88d6SYuval Mintz }; 45dacd88d6SYuval Mintz 46dacd88d6SYuval Mintz enum qed_filter_ucast_type { 47dacd88d6SYuval Mintz QED_FILTER_MAC, 48dacd88d6SYuval Mintz QED_FILTER_VLAN, 49dacd88d6SYuval Mintz QED_FILTER_MAC_VLAN, 50dacd88d6SYuval Mintz QED_FILTER_INNER_MAC, 51dacd88d6SYuval Mintz QED_FILTER_INNER_VLAN, 52dacd88d6SYuval Mintz QED_FILTER_INNER_PAIR, 53dacd88d6SYuval Mintz QED_FILTER_INNER_MAC_VNI_PAIR, 54dacd88d6SYuval Mintz QED_FILTER_MAC_VNI_PAIR, 55dacd88d6SYuval Mintz QED_FILTER_VNI, 56dacd88d6SYuval Mintz }; 57dacd88d6SYuval Mintz 58dacd88d6SYuval Mintz struct qed_filter_ucast { 59dacd88d6SYuval Mintz enum qed_filter_opcode opcode; 60dacd88d6SYuval Mintz enum qed_filter_ucast_type type; 61dacd88d6SYuval Mintz u8 is_rx_filter; 62dacd88d6SYuval Mintz u8 is_tx_filter; 63dacd88d6SYuval Mintz u8 vport_to_add_to; 64dacd88d6SYuval Mintz u8 vport_to_remove_from; 65dacd88d6SYuval Mintz unsigned char mac[ETH_ALEN]; 66dacd88d6SYuval Mintz u8 assert_on_error; 67dacd88d6SYuval Mintz u16 vlan; 68dacd88d6SYuval Mintz u32 vni; 69dacd88d6SYuval Mintz }; 70dacd88d6SYuval Mintz 71dacd88d6SYuval Mintz struct qed_filter_mcast { 72dacd88d6SYuval Mintz /* MOVE is not supported for multicast */ 73dacd88d6SYuval Mintz enum qed_filter_opcode opcode; 74dacd88d6SYuval Mintz u8 vport_to_add_to; 75dacd88d6SYuval Mintz u8 vport_to_remove_from; 76dacd88d6SYuval Mintz u8 num_mc_addrs; 77dacd88d6SYuval Mintz #define QED_MAX_MC_ADDRS 64 78dacd88d6SYuval Mintz unsigned char mac[QED_MAX_MC_ADDRS][ETH_ALEN]; 79dacd88d6SYuval Mintz }; 80dacd88d6SYuval Mintz 81dacd88d6SYuval Mintz int qed_sp_eth_rx_queue_stop(struct qed_hwfn *p_hwfn, 82dacd88d6SYuval Mintz u16 rx_queue_id, 83dacd88d6SYuval Mintz bool eq_completion_only, bool cqe_completion); 84dacd88d6SYuval Mintz 85dacd88d6SYuval Mintz int qed_sp_eth_tx_queue_stop(struct qed_hwfn *p_hwfn, u16 tx_queue_id); 86dacd88d6SYuval Mintz 87dacd88d6SYuval Mintz enum qed_tpa_mode { 88dacd88d6SYuval Mintz QED_TPA_MODE_NONE, 89dacd88d6SYuval Mintz QED_TPA_MODE_UNUSED, 90dacd88d6SYuval Mintz QED_TPA_MODE_GRO, 91dacd88d6SYuval Mintz QED_TPA_MODE_MAX 92dacd88d6SYuval Mintz }; 93dacd88d6SYuval Mintz 94dacd88d6SYuval Mintz struct qed_sp_vport_start_params { 95dacd88d6SYuval Mintz enum qed_tpa_mode tpa_mode; 96dacd88d6SYuval Mintz bool remove_inner_vlan; 97831bfb0eSYuval Mintz bool tx_switching; 9808feecd7SYuval Mintz bool only_untagged; 99dacd88d6SYuval Mintz bool drop_ttl0; 100dacd88d6SYuval Mintz u8 max_buffers_per_cqe; 101dacd88d6SYuval Mintz u32 concrete_fid; 102dacd88d6SYuval Mintz u16 opaque_fid; 103dacd88d6SYuval Mintz u8 vport_id; 104dacd88d6SYuval Mintz u16 mtu; 10511a85d75SYuval Mintz bool check_mac; 10611a85d75SYuval Mintz bool check_ethtype; 107dacd88d6SYuval Mintz }; 108dacd88d6SYuval Mintz 109dacd88d6SYuval Mintz int qed_sp_eth_vport_start(struct qed_hwfn *p_hwfn, 110dacd88d6SYuval Mintz struct qed_sp_vport_start_params *p_params); 111dacd88d6SYuval Mintz 112dacd88d6SYuval Mintz struct qed_rss_params { 113dacd88d6SYuval Mintz u8 update_rss_config; 114dacd88d6SYuval Mintz u8 rss_enable; 115dacd88d6SYuval Mintz u8 rss_eng_id; 116dacd88d6SYuval Mintz u8 update_rss_capabilities; 117dacd88d6SYuval Mintz u8 update_rss_ind_table; 118dacd88d6SYuval Mintz u8 update_rss_key; 119dacd88d6SYuval Mintz u8 rss_caps; 120dacd88d6SYuval Mintz u8 rss_table_size_log; 121dacd88d6SYuval Mintz u16 rss_ind_table[QED_RSS_IND_TABLE_SIZE]; 122dacd88d6SYuval Mintz u32 rss_key[QED_RSS_KEY_SIZE]; 123dacd88d6SYuval Mintz }; 124dacd88d6SYuval Mintz 125dacd88d6SYuval Mintz struct qed_filter_accept_flags { 126dacd88d6SYuval Mintz u8 update_rx_mode_config; 127dacd88d6SYuval Mintz u8 update_tx_mode_config; 128dacd88d6SYuval Mintz u8 rx_accept_filter; 129dacd88d6SYuval Mintz u8 tx_accept_filter; 130dacd88d6SYuval Mintz #define QED_ACCEPT_NONE 0x01 131dacd88d6SYuval Mintz #define QED_ACCEPT_UCAST_MATCHED 0x02 132dacd88d6SYuval Mintz #define QED_ACCEPT_UCAST_UNMATCHED 0x04 133dacd88d6SYuval Mintz #define QED_ACCEPT_MCAST_MATCHED 0x08 134dacd88d6SYuval Mintz #define QED_ACCEPT_MCAST_UNMATCHED 0x10 135dacd88d6SYuval Mintz #define QED_ACCEPT_BCAST 0x20 136dacd88d6SYuval Mintz }; 137dacd88d6SYuval Mintz 138dacd88d6SYuval Mintz struct qed_sp_vport_update_params { 139dacd88d6SYuval Mintz u16 opaque_fid; 140dacd88d6SYuval Mintz u8 vport_id; 141dacd88d6SYuval Mintz u8 update_vport_active_rx_flg; 142dacd88d6SYuval Mintz u8 vport_active_rx_flg; 143dacd88d6SYuval Mintz u8 update_vport_active_tx_flg; 144dacd88d6SYuval Mintz u8 vport_active_tx_flg; 14517b235c1SYuval Mintz u8 update_inner_vlan_removal_flg; 14617b235c1SYuval Mintz u8 inner_vlan_removal_flg; 14708feecd7SYuval Mintz u8 silent_vlan_removal_flg; 14808feecd7SYuval Mintz u8 update_default_vlan_enable_flg; 14908feecd7SYuval Mintz u8 default_vlan_enable_flg; 15008feecd7SYuval Mintz u8 update_default_vlan_flg; 15108feecd7SYuval Mintz u16 default_vlan; 15217b235c1SYuval Mintz u8 update_tx_switching_flg; 15317b235c1SYuval Mintz u8 tx_switching_flg; 154dacd88d6SYuval Mintz u8 update_approx_mcast_flg; 1556ddc7608SYuval Mintz u8 update_anti_spoofing_en_flg; 1566ddc7608SYuval Mintz u8 anti_spoofing_en; 157dacd88d6SYuval Mintz u8 update_accept_any_vlan_flg; 158dacd88d6SYuval Mintz u8 accept_any_vlan; 159dacd88d6SYuval Mintz unsigned long bins[8]; 160dacd88d6SYuval Mintz struct qed_rss_params *rss_params; 161dacd88d6SYuval Mintz struct qed_filter_accept_flags accept_flags; 16217b235c1SYuval Mintz struct qed_sge_tpa_params *sge_tpa_params; 163dacd88d6SYuval Mintz }; 164dacd88d6SYuval Mintz 165dacd88d6SYuval Mintz int qed_sp_vport_update(struct qed_hwfn *p_hwfn, 166dacd88d6SYuval Mintz struct qed_sp_vport_update_params *p_params, 167dacd88d6SYuval Mintz enum spq_mode comp_mode, 168dacd88d6SYuval Mintz struct qed_spq_comp_cb *p_comp_data); 169dacd88d6SYuval Mintz 170dacd88d6SYuval Mintz /** 171dacd88d6SYuval Mintz * @brief qed_sp_vport_stop - 172dacd88d6SYuval Mintz * 173dacd88d6SYuval Mintz * This ramrod closes a VPort after all its RX and TX queues are terminated. 174dacd88d6SYuval Mintz * An Assert is generated if any queues are left open. 175dacd88d6SYuval Mintz * 176dacd88d6SYuval Mintz * @param p_hwfn 177dacd88d6SYuval Mintz * @param opaque_fid 178dacd88d6SYuval Mintz * @param vport_id VPort ID 179dacd88d6SYuval Mintz * 180dacd88d6SYuval Mintz * @return int 181dacd88d6SYuval Mintz */ 182dacd88d6SYuval Mintz int qed_sp_vport_stop(struct qed_hwfn *p_hwfn, u16 opaque_fid, u8 vport_id); 183dacd88d6SYuval Mintz 184dacd88d6SYuval Mintz int qed_sp_eth_filter_ucast(struct qed_hwfn *p_hwfn, 185dacd88d6SYuval Mintz u16 opaque_fid, 186dacd88d6SYuval Mintz struct qed_filter_ucast *p_filter_cmd, 187dacd88d6SYuval Mintz enum spq_mode comp_mode, 188dacd88d6SYuval Mintz struct qed_spq_comp_cb *p_comp_data); 189dacd88d6SYuval Mintz 19017b235c1SYuval Mintz /** 19117b235c1SYuval Mintz * @brief qed_sp_rx_eth_queues_update - 19217b235c1SYuval Mintz * 19317b235c1SYuval Mintz * This ramrod updates an RX queue. It is used for setting the active state 19417b235c1SYuval Mintz * of the queue and updating the TPA and SGE parameters. 19517b235c1SYuval Mintz * 19617b235c1SYuval Mintz * @note At the moment - only used by non-linux VFs. 19717b235c1SYuval Mintz * 19817b235c1SYuval Mintz * @param p_hwfn 19917b235c1SYuval Mintz * @param rx_queue_id RX Queue ID 20017b235c1SYuval Mintz * @param num_rxqs Allow to update multiple rx 20117b235c1SYuval Mintz * queues, from rx_queue_id to 20217b235c1SYuval Mintz * (rx_queue_id + num_rxqs) 20317b235c1SYuval Mintz * @param complete_cqe_flg Post completion to the CQE Ring if set 20417b235c1SYuval Mintz * @param complete_event_flg Post completion to the Event Ring if set 20517b235c1SYuval Mintz * 20617b235c1SYuval Mintz * @return int 20717b235c1SYuval Mintz */ 20817b235c1SYuval Mintz 20917b235c1SYuval Mintz int 21017b235c1SYuval Mintz qed_sp_eth_rx_queues_update(struct qed_hwfn *p_hwfn, 21117b235c1SYuval Mintz u16 rx_queue_id, 21217b235c1SYuval Mintz u8 num_rxqs, 21317b235c1SYuval Mintz u8 complete_cqe_flg, 21417b235c1SYuval Mintz u8 complete_event_flg, 21517b235c1SYuval Mintz enum spq_mode comp_mode, 21617b235c1SYuval Mintz struct qed_spq_comp_cb *p_comp_data); 21717b235c1SYuval Mintz 2186c754246SSudarsana Reddy Kalluru void qed_get_vport_stats(struct qed_dev *cdev, struct qed_eth_stats *stats); 2196c754246SSudarsana Reddy Kalluru 220dacd88d6SYuval Mintz int qed_sp_eth_vport_start(struct qed_hwfn *p_hwfn, 221dacd88d6SYuval Mintz struct qed_sp_vport_start_params *p_params); 222dacd88d6SYuval Mintz 223dacd88d6SYuval Mintz int qed_sp_eth_rxq_start_ramrod(struct qed_hwfn *p_hwfn, 224dacd88d6SYuval Mintz u16 opaque_fid, 225dacd88d6SYuval Mintz u32 cid, 226dacd88d6SYuval Mintz struct qed_queue_start_common_params *params, 227dacd88d6SYuval Mintz u8 stats_id, 228dacd88d6SYuval Mintz u16 bd_max_bytes, 229dacd88d6SYuval Mintz dma_addr_t bd_chain_phys_addr, 230a044df83SYuval Mintz dma_addr_t cqe_pbl_addr, 231a044df83SYuval Mintz u16 cqe_pbl_size, bool b_use_zone_a_prod); 232dacd88d6SYuval Mintz 233dacd88d6SYuval Mintz int qed_sp_eth_txq_start_ramrod(struct qed_hwfn *p_hwfn, 234dacd88d6SYuval Mintz u16 opaque_fid, 235dacd88d6SYuval Mintz u32 cid, 236dacd88d6SYuval Mintz struct qed_queue_start_common_params *p_params, 237dacd88d6SYuval Mintz u8 stats_id, 238dacd88d6SYuval Mintz dma_addr_t pbl_addr, 239dacd88d6SYuval Mintz u16 pbl_size, 240dacd88d6SYuval Mintz union qed_qm_pq_params *p_pq_params); 241dacd88d6SYuval Mintz 242dacd88d6SYuval Mintz u8 qed_mcast_bin_from_mac(u8 *mac); 243dacd88d6SYuval Mintz 244dacd88d6SYuval Mintz #endif /* _QED_L2_H */ 245