1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <asm/param.h> 36 #include <linux/delay.h> 37 #include <linux/dma-mapping.h> 38 #include <linux/etherdevice.h> 39 #include <linux/interrupt.h> 40 #include <linux/kernel.h> 41 #include <linux/module.h> 42 #include <linux/pci.h> 43 #include <linux/slab.h> 44 #include <linux/stddef.h> 45 #include <linux/string.h> 46 #include <linux/version.h> 47 #include <linux/workqueue.h> 48 #include <linux/bitops.h> 49 #include <linux/bug.h> 50 #include <linux/vmalloc.h> 51 #include "qed.h" 52 #include <linux/qed/qed_chain.h> 53 #include "qed_cxt.h" 54 #include "qed_dev_api.h" 55 #include <linux/qed/qed_eth_if.h> 56 #include "qed_hsi.h" 57 #include "qed_hw.h" 58 #include "qed_int.h" 59 #include "qed_l2.h" 60 #include "qed_mcp.h" 61 #include "qed_reg_addr.h" 62 #include "qed_sp.h" 63 #include "qed_sriov.h" 64 65 66 #define QED_MAX_SGES_NUM 16 67 #define CRC32_POLY 0x1edc6f41 68 69 void qed_eth_queue_cid_release(struct qed_hwfn *p_hwfn, 70 struct qed_queue_cid *p_cid) 71 { 72 /* VFs' CIDs are 0-based in PF-view, and uninitialized on VF */ 73 if (!p_cid->is_vf && IS_PF(p_hwfn->cdev)) 74 qed_cxt_release_cid(p_hwfn, p_cid->cid); 75 vfree(p_cid); 76 } 77 78 /* The internal is only meant to be directly called by PFs initializeing CIDs 79 * for their VFs. 80 */ 81 struct qed_queue_cid * 82 _qed_eth_queue_to_cid(struct qed_hwfn *p_hwfn, 83 u16 opaque_fid, 84 u32 cid, 85 u8 vf_qid, 86 struct qed_queue_start_common_params *p_params) 87 { 88 bool b_is_same = (p_hwfn->hw_info.opaque_fid == opaque_fid); 89 struct qed_queue_cid *p_cid; 90 int rc; 91 92 p_cid = vmalloc(sizeof(*p_cid)); 93 if (!p_cid) 94 return NULL; 95 memset(p_cid, 0, sizeof(*p_cid)); 96 97 p_cid->opaque_fid = opaque_fid; 98 p_cid->cid = cid; 99 p_cid->vf_qid = vf_qid; 100 p_cid->rel = *p_params; 101 p_cid->p_owner = p_hwfn; 102 103 /* Don't try calculating the absolute indices for VFs */ 104 if (IS_VF(p_hwfn->cdev)) { 105 p_cid->abs = p_cid->rel; 106 goto out; 107 } 108 109 /* Calculate the engine-absolute indices of the resources. 110 * This would guarantee they're valid later on. 111 * In some cases [SBs] we already have the right values. 112 */ 113 rc = qed_fw_vport(p_hwfn, p_cid->rel.vport_id, &p_cid->abs.vport_id); 114 if (rc) 115 goto fail; 116 117 rc = qed_fw_l2_queue(p_hwfn, p_cid->rel.queue_id, &p_cid->abs.queue_id); 118 if (rc) 119 goto fail; 120 121 /* In case of a PF configuring its VF's queues, the stats-id is already 122 * absolute [since there's a single index that's suitable per-VF]. 123 */ 124 if (b_is_same) { 125 rc = qed_fw_vport(p_hwfn, p_cid->rel.stats_id, 126 &p_cid->abs.stats_id); 127 if (rc) 128 goto fail; 129 } else { 130 p_cid->abs.stats_id = p_cid->rel.stats_id; 131 } 132 133 /* SBs relevant information was already provided as absolute */ 134 p_cid->abs.sb = p_cid->rel.sb; 135 p_cid->abs.sb_idx = p_cid->rel.sb_idx; 136 137 /* This is tricky - we're actually interested in whehter this is a PF 138 * entry meant for the VF. 139 */ 140 if (!b_is_same) 141 p_cid->is_vf = true; 142 out: 143 DP_VERBOSE(p_hwfn, 144 QED_MSG_SP, 145 "opaque_fid: %04x CID %08x vport %02x [%02x] qzone %04x [%04x] stats %02x [%02x] SB %04x PI %02x\n", 146 p_cid->opaque_fid, 147 p_cid->cid, 148 p_cid->rel.vport_id, 149 p_cid->abs.vport_id, 150 p_cid->rel.queue_id, 151 p_cid->abs.queue_id, 152 p_cid->rel.stats_id, 153 p_cid->abs.stats_id, p_cid->abs.sb, p_cid->abs.sb_idx); 154 155 return p_cid; 156 157 fail: 158 vfree(p_cid); 159 return NULL; 160 } 161 162 static struct qed_queue_cid *qed_eth_queue_to_cid(struct qed_hwfn *p_hwfn, 163 u16 opaque_fid, struct 164 qed_queue_start_common_params 165 *p_params) 166 { 167 struct qed_queue_cid *p_cid; 168 u32 cid = 0; 169 170 /* Get a unique firmware CID for this queue, in case it's a PF. 171 * VF's don't need a CID as the queue configuration will be done 172 * by PF. 173 */ 174 if (IS_PF(p_hwfn->cdev)) { 175 if (qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_ETH, &cid)) { 176 DP_NOTICE(p_hwfn, "Failed to acquire cid\n"); 177 return NULL; 178 } 179 } 180 181 p_cid = _qed_eth_queue_to_cid(p_hwfn, opaque_fid, cid, 0, p_params); 182 if (!p_cid && IS_PF(p_hwfn->cdev)) 183 qed_cxt_release_cid(p_hwfn, cid); 184 185 return p_cid; 186 } 187 188 int qed_sp_eth_vport_start(struct qed_hwfn *p_hwfn, 189 struct qed_sp_vport_start_params *p_params) 190 { 191 struct vport_start_ramrod_data *p_ramrod = NULL; 192 struct qed_spq_entry *p_ent = NULL; 193 struct qed_sp_init_data init_data; 194 u8 abs_vport_id = 0; 195 int rc = -EINVAL; 196 u16 rx_mode = 0; 197 198 rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id); 199 if (rc) 200 return rc; 201 202 memset(&init_data, 0, sizeof(init_data)); 203 init_data.cid = qed_spq_get_cid(p_hwfn); 204 init_data.opaque_fid = p_params->opaque_fid; 205 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 206 207 rc = qed_sp_init_request(p_hwfn, &p_ent, 208 ETH_RAMROD_VPORT_START, 209 PROTOCOLID_ETH, &init_data); 210 if (rc) 211 return rc; 212 213 p_ramrod = &p_ent->ramrod.vport_start; 214 p_ramrod->vport_id = abs_vport_id; 215 216 p_ramrod->mtu = cpu_to_le16(p_params->mtu); 217 p_ramrod->handle_ptp_pkts = p_params->handle_ptp_pkts; 218 p_ramrod->inner_vlan_removal_en = p_params->remove_inner_vlan; 219 p_ramrod->drop_ttl0_en = p_params->drop_ttl0; 220 p_ramrod->untagged = p_params->only_untagged; 221 222 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 1); 223 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 1); 224 225 p_ramrod->rx_mode.state = cpu_to_le16(rx_mode); 226 227 /* TPA related fields */ 228 memset(&p_ramrod->tpa_param, 0, sizeof(struct eth_vport_tpa_param)); 229 230 p_ramrod->tpa_param.max_buff_num = p_params->max_buffers_per_cqe; 231 232 switch (p_params->tpa_mode) { 233 case QED_TPA_MODE_GRO: 234 p_ramrod->tpa_param.tpa_max_aggs_num = ETH_TPA_MAX_AGGS_NUM; 235 p_ramrod->tpa_param.tpa_max_size = (u16)-1; 236 p_ramrod->tpa_param.tpa_min_size_to_cont = p_params->mtu / 2; 237 p_ramrod->tpa_param.tpa_min_size_to_start = p_params->mtu / 2; 238 p_ramrod->tpa_param.tpa_ipv4_en_flg = 1; 239 p_ramrod->tpa_param.tpa_ipv6_en_flg = 1; 240 p_ramrod->tpa_param.tpa_pkt_split_flg = 1; 241 p_ramrod->tpa_param.tpa_gro_consistent_flg = 1; 242 break; 243 default: 244 break; 245 } 246 247 p_ramrod->tx_switching_en = p_params->tx_switching; 248 249 p_ramrod->ctl_frame_mac_check_en = !!p_params->check_mac; 250 p_ramrod->ctl_frame_ethtype_check_en = !!p_params->check_ethtype; 251 252 /* Software Function ID in hwfn (PFs are 0 - 15, VFs are 16 - 135) */ 253 p_ramrod->sw_fid = qed_concrete_to_sw_fid(p_hwfn->cdev, 254 p_params->concrete_fid); 255 256 return qed_spq_post(p_hwfn, p_ent, NULL); 257 } 258 259 static int qed_sp_vport_start(struct qed_hwfn *p_hwfn, 260 struct qed_sp_vport_start_params *p_params) 261 { 262 if (IS_VF(p_hwfn->cdev)) { 263 return qed_vf_pf_vport_start(p_hwfn, p_params->vport_id, 264 p_params->mtu, 265 p_params->remove_inner_vlan, 266 p_params->tpa_mode, 267 p_params->max_buffers_per_cqe, 268 p_params->only_untagged); 269 } 270 271 return qed_sp_eth_vport_start(p_hwfn, p_params); 272 } 273 274 static int 275 qed_sp_vport_update_rss(struct qed_hwfn *p_hwfn, 276 struct vport_update_ramrod_data *p_ramrod, 277 struct qed_rss_params *p_rss) 278 { 279 struct eth_vport_rss_config *p_config; 280 u16 capabilities = 0; 281 int i, table_size; 282 int rc = 0; 283 284 if (!p_rss) { 285 p_ramrod->common.update_rss_flg = 0; 286 return rc; 287 } 288 p_config = &p_ramrod->rss_config; 289 290 BUILD_BUG_ON(QED_RSS_IND_TABLE_SIZE != ETH_RSS_IND_TABLE_ENTRIES_NUM); 291 292 rc = qed_fw_rss_eng(p_hwfn, p_rss->rss_eng_id, &p_config->rss_id); 293 if (rc) 294 return rc; 295 296 p_ramrod->common.update_rss_flg = p_rss->update_rss_config; 297 p_config->update_rss_capabilities = p_rss->update_rss_capabilities; 298 p_config->update_rss_ind_table = p_rss->update_rss_ind_table; 299 p_config->update_rss_key = p_rss->update_rss_key; 300 301 p_config->rss_mode = p_rss->rss_enable ? 302 ETH_VPORT_RSS_MODE_REGULAR : 303 ETH_VPORT_RSS_MODE_DISABLED; 304 305 SET_FIELD(capabilities, 306 ETH_VPORT_RSS_CONFIG_IPV4_CAPABILITY, 307 !!(p_rss->rss_caps & QED_RSS_IPV4)); 308 SET_FIELD(capabilities, 309 ETH_VPORT_RSS_CONFIG_IPV6_CAPABILITY, 310 !!(p_rss->rss_caps & QED_RSS_IPV6)); 311 SET_FIELD(capabilities, 312 ETH_VPORT_RSS_CONFIG_IPV4_TCP_CAPABILITY, 313 !!(p_rss->rss_caps & QED_RSS_IPV4_TCP)); 314 SET_FIELD(capabilities, 315 ETH_VPORT_RSS_CONFIG_IPV6_TCP_CAPABILITY, 316 !!(p_rss->rss_caps & QED_RSS_IPV6_TCP)); 317 SET_FIELD(capabilities, 318 ETH_VPORT_RSS_CONFIG_IPV4_UDP_CAPABILITY, 319 !!(p_rss->rss_caps & QED_RSS_IPV4_UDP)); 320 SET_FIELD(capabilities, 321 ETH_VPORT_RSS_CONFIG_IPV6_UDP_CAPABILITY, 322 !!(p_rss->rss_caps & QED_RSS_IPV6_UDP)); 323 p_config->tbl_size = p_rss->rss_table_size_log; 324 325 p_config->capabilities = cpu_to_le16(capabilities); 326 327 DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP, 328 "update rss flag %d, rss_mode = %d, update_caps = %d, capabilities = %d, update_ind = %d, update_rss_key = %d\n", 329 p_ramrod->common.update_rss_flg, 330 p_config->rss_mode, 331 p_config->update_rss_capabilities, 332 p_config->capabilities, 333 p_config->update_rss_ind_table, p_config->update_rss_key); 334 335 table_size = min_t(int, QED_RSS_IND_TABLE_SIZE, 336 1 << p_config->tbl_size); 337 for (i = 0; i < table_size; i++) { 338 struct qed_queue_cid *p_queue = p_rss->rss_ind_table[i]; 339 340 if (!p_queue) 341 return -EINVAL; 342 343 p_config->indirection_table[i] = 344 cpu_to_le16(p_queue->abs.queue_id); 345 } 346 347 DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP, 348 "Configured RSS indirection table [%d entries]:\n", 349 table_size); 350 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i += 0x10) { 351 DP_VERBOSE(p_hwfn, 352 NETIF_MSG_IFUP, 353 "%04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x\n", 354 le16_to_cpu(p_config->indirection_table[i]), 355 le16_to_cpu(p_config->indirection_table[i + 1]), 356 le16_to_cpu(p_config->indirection_table[i + 2]), 357 le16_to_cpu(p_config->indirection_table[i + 3]), 358 le16_to_cpu(p_config->indirection_table[i + 4]), 359 le16_to_cpu(p_config->indirection_table[i + 5]), 360 le16_to_cpu(p_config->indirection_table[i + 6]), 361 le16_to_cpu(p_config->indirection_table[i + 7]), 362 le16_to_cpu(p_config->indirection_table[i + 8]), 363 le16_to_cpu(p_config->indirection_table[i + 9]), 364 le16_to_cpu(p_config->indirection_table[i + 10]), 365 le16_to_cpu(p_config->indirection_table[i + 11]), 366 le16_to_cpu(p_config->indirection_table[i + 12]), 367 le16_to_cpu(p_config->indirection_table[i + 13]), 368 le16_to_cpu(p_config->indirection_table[i + 14]), 369 le16_to_cpu(p_config->indirection_table[i + 15])); 370 } 371 372 for (i = 0; i < 10; i++) 373 p_config->rss_key[i] = cpu_to_le32(p_rss->rss_key[i]); 374 375 return rc; 376 } 377 378 static void 379 qed_sp_update_accept_mode(struct qed_hwfn *p_hwfn, 380 struct vport_update_ramrod_data *p_ramrod, 381 struct qed_filter_accept_flags accept_flags) 382 { 383 p_ramrod->common.update_rx_mode_flg = 384 accept_flags.update_rx_mode_config; 385 386 p_ramrod->common.update_tx_mode_flg = 387 accept_flags.update_tx_mode_config; 388 389 /* Set Rx mode accept flags */ 390 if (p_ramrod->common.update_rx_mode_flg) { 391 u8 accept_filter = accept_flags.rx_accept_filter; 392 u16 state = 0; 393 394 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 395 !(!!(accept_filter & QED_ACCEPT_UCAST_MATCHED) || 396 !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED))); 397 398 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_ACCEPT_UNMATCHED, 399 !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED)); 400 401 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 402 !(!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) || 403 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED))); 404 405 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_ACCEPT_ALL, 406 (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) && 407 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED))); 408 409 SET_FIELD(state, ETH_VPORT_RX_MODE_BCAST_ACCEPT_ALL, 410 !!(accept_filter & QED_ACCEPT_BCAST)); 411 412 p_ramrod->rx_mode.state = cpu_to_le16(state); 413 DP_VERBOSE(p_hwfn, QED_MSG_SP, 414 "p_ramrod->rx_mode.state = 0x%x\n", state); 415 } 416 417 /* Set Tx mode accept flags */ 418 if (p_ramrod->common.update_tx_mode_flg) { 419 u8 accept_filter = accept_flags.tx_accept_filter; 420 u16 state = 0; 421 422 SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_DROP_ALL, 423 !!(accept_filter & QED_ACCEPT_NONE)); 424 425 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_DROP_ALL, 426 !!(accept_filter & QED_ACCEPT_NONE)); 427 428 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_ACCEPT_ALL, 429 (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) && 430 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED))); 431 432 SET_FIELD(state, ETH_VPORT_TX_MODE_BCAST_ACCEPT_ALL, 433 !!(accept_filter & QED_ACCEPT_BCAST)); 434 435 p_ramrod->tx_mode.state = cpu_to_le16(state); 436 DP_VERBOSE(p_hwfn, QED_MSG_SP, 437 "p_ramrod->tx_mode.state = 0x%x\n", state); 438 } 439 } 440 441 static void 442 qed_sp_vport_update_sge_tpa(struct qed_hwfn *p_hwfn, 443 struct vport_update_ramrod_data *p_ramrod, 444 struct qed_sge_tpa_params *p_params) 445 { 446 struct eth_vport_tpa_param *p_tpa; 447 448 if (!p_params) { 449 p_ramrod->common.update_tpa_param_flg = 0; 450 p_ramrod->common.update_tpa_en_flg = 0; 451 p_ramrod->common.update_tpa_param_flg = 0; 452 return; 453 } 454 455 p_ramrod->common.update_tpa_en_flg = p_params->update_tpa_en_flg; 456 p_tpa = &p_ramrod->tpa_param; 457 p_tpa->tpa_ipv4_en_flg = p_params->tpa_ipv4_en_flg; 458 p_tpa->tpa_ipv6_en_flg = p_params->tpa_ipv6_en_flg; 459 p_tpa->tpa_ipv4_tunn_en_flg = p_params->tpa_ipv4_tunn_en_flg; 460 p_tpa->tpa_ipv6_tunn_en_flg = p_params->tpa_ipv6_tunn_en_flg; 461 462 p_ramrod->common.update_tpa_param_flg = p_params->update_tpa_param_flg; 463 p_tpa->max_buff_num = p_params->max_buffers_per_cqe; 464 p_tpa->tpa_pkt_split_flg = p_params->tpa_pkt_split_flg; 465 p_tpa->tpa_hdr_data_split_flg = p_params->tpa_hdr_data_split_flg; 466 p_tpa->tpa_gro_consistent_flg = p_params->tpa_gro_consistent_flg; 467 p_tpa->tpa_max_aggs_num = p_params->tpa_max_aggs_num; 468 p_tpa->tpa_max_size = p_params->tpa_max_size; 469 p_tpa->tpa_min_size_to_start = p_params->tpa_min_size_to_start; 470 p_tpa->tpa_min_size_to_cont = p_params->tpa_min_size_to_cont; 471 } 472 473 static void 474 qed_sp_update_mcast_bin(struct qed_hwfn *p_hwfn, 475 struct vport_update_ramrod_data *p_ramrod, 476 struct qed_sp_vport_update_params *p_params) 477 { 478 int i; 479 480 memset(&p_ramrod->approx_mcast.bins, 0, 481 sizeof(p_ramrod->approx_mcast.bins)); 482 483 if (!p_params->update_approx_mcast_flg) 484 return; 485 486 p_ramrod->common.update_approx_mcast_flg = 1; 487 for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) { 488 u32 *p_bins = (u32 *)p_params->bins; 489 490 p_ramrod->approx_mcast.bins[i] = cpu_to_le32(p_bins[i]); 491 } 492 } 493 494 int qed_sp_vport_update(struct qed_hwfn *p_hwfn, 495 struct qed_sp_vport_update_params *p_params, 496 enum spq_mode comp_mode, 497 struct qed_spq_comp_cb *p_comp_data) 498 { 499 struct qed_rss_params *p_rss_params = p_params->rss_params; 500 struct vport_update_ramrod_data_cmn *p_cmn; 501 struct qed_sp_init_data init_data; 502 struct vport_update_ramrod_data *p_ramrod = NULL; 503 struct qed_spq_entry *p_ent = NULL; 504 u8 abs_vport_id = 0, val; 505 int rc = -EINVAL; 506 507 if (IS_VF(p_hwfn->cdev)) { 508 rc = qed_vf_pf_vport_update(p_hwfn, p_params); 509 return rc; 510 } 511 512 rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id); 513 if (rc) 514 return rc; 515 516 memset(&init_data, 0, sizeof(init_data)); 517 init_data.cid = qed_spq_get_cid(p_hwfn); 518 init_data.opaque_fid = p_params->opaque_fid; 519 init_data.comp_mode = comp_mode; 520 init_data.p_comp_data = p_comp_data; 521 522 rc = qed_sp_init_request(p_hwfn, &p_ent, 523 ETH_RAMROD_VPORT_UPDATE, 524 PROTOCOLID_ETH, &init_data); 525 if (rc) 526 return rc; 527 528 /* Copy input params to ramrod according to FW struct */ 529 p_ramrod = &p_ent->ramrod.vport_update; 530 p_cmn = &p_ramrod->common; 531 532 p_cmn->vport_id = abs_vport_id; 533 p_cmn->rx_active_flg = p_params->vport_active_rx_flg; 534 p_cmn->update_rx_active_flg = p_params->update_vport_active_rx_flg; 535 p_cmn->tx_active_flg = p_params->vport_active_tx_flg; 536 p_cmn->update_tx_active_flg = p_params->update_vport_active_tx_flg; 537 p_cmn->accept_any_vlan = p_params->accept_any_vlan; 538 val = p_params->update_accept_any_vlan_flg; 539 p_cmn->update_accept_any_vlan_flg = val; 540 541 p_cmn->inner_vlan_removal_en = p_params->inner_vlan_removal_flg; 542 val = p_params->update_inner_vlan_removal_flg; 543 p_cmn->update_inner_vlan_removal_en_flg = val; 544 545 p_cmn->default_vlan_en = p_params->default_vlan_enable_flg; 546 val = p_params->update_default_vlan_enable_flg; 547 p_cmn->update_default_vlan_en_flg = val; 548 549 p_cmn->default_vlan = cpu_to_le16(p_params->default_vlan); 550 p_cmn->update_default_vlan_flg = p_params->update_default_vlan_flg; 551 552 p_cmn->silent_vlan_removal_en = p_params->silent_vlan_removal_flg; 553 554 p_ramrod->common.tx_switching_en = p_params->tx_switching_flg; 555 p_cmn->update_tx_switching_en_flg = p_params->update_tx_switching_flg; 556 557 p_cmn->anti_spoofing_en = p_params->anti_spoofing_en; 558 val = p_params->update_anti_spoofing_en_flg; 559 p_ramrod->common.update_anti_spoofing_en_flg = val; 560 561 rc = qed_sp_vport_update_rss(p_hwfn, p_ramrod, p_rss_params); 562 if (rc) { 563 /* Return spq entry which is taken in qed_sp_init_request()*/ 564 qed_spq_return_entry(p_hwfn, p_ent); 565 return rc; 566 } 567 568 /* Update mcast bins for VFs, PF doesn't use this functionality */ 569 qed_sp_update_mcast_bin(p_hwfn, p_ramrod, p_params); 570 571 qed_sp_update_accept_mode(p_hwfn, p_ramrod, p_params->accept_flags); 572 qed_sp_vport_update_sge_tpa(p_hwfn, p_ramrod, p_params->sge_tpa_params); 573 return qed_spq_post(p_hwfn, p_ent, NULL); 574 } 575 576 int qed_sp_vport_stop(struct qed_hwfn *p_hwfn, u16 opaque_fid, u8 vport_id) 577 { 578 struct vport_stop_ramrod_data *p_ramrod; 579 struct qed_sp_init_data init_data; 580 struct qed_spq_entry *p_ent; 581 u8 abs_vport_id = 0; 582 int rc; 583 584 if (IS_VF(p_hwfn->cdev)) 585 return qed_vf_pf_vport_stop(p_hwfn); 586 587 rc = qed_fw_vport(p_hwfn, vport_id, &abs_vport_id); 588 if (rc) 589 return rc; 590 591 memset(&init_data, 0, sizeof(init_data)); 592 init_data.cid = qed_spq_get_cid(p_hwfn); 593 init_data.opaque_fid = opaque_fid; 594 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 595 596 rc = qed_sp_init_request(p_hwfn, &p_ent, 597 ETH_RAMROD_VPORT_STOP, 598 PROTOCOLID_ETH, &init_data); 599 if (rc) 600 return rc; 601 602 p_ramrod = &p_ent->ramrod.vport_stop; 603 p_ramrod->vport_id = abs_vport_id; 604 605 return qed_spq_post(p_hwfn, p_ent, NULL); 606 } 607 608 static int 609 qed_vf_pf_accept_flags(struct qed_hwfn *p_hwfn, 610 struct qed_filter_accept_flags *p_accept_flags) 611 { 612 struct qed_sp_vport_update_params s_params; 613 614 memset(&s_params, 0, sizeof(s_params)); 615 memcpy(&s_params.accept_flags, p_accept_flags, 616 sizeof(struct qed_filter_accept_flags)); 617 618 return qed_vf_pf_vport_update(p_hwfn, &s_params); 619 } 620 621 static int qed_filter_accept_cmd(struct qed_dev *cdev, 622 u8 vport, 623 struct qed_filter_accept_flags accept_flags, 624 u8 update_accept_any_vlan, 625 u8 accept_any_vlan, 626 enum spq_mode comp_mode, 627 struct qed_spq_comp_cb *p_comp_data) 628 { 629 struct qed_sp_vport_update_params vport_update_params; 630 int i, rc; 631 632 /* Prepare and send the vport rx_mode change */ 633 memset(&vport_update_params, 0, sizeof(vport_update_params)); 634 vport_update_params.vport_id = vport; 635 vport_update_params.accept_flags = accept_flags; 636 vport_update_params.update_accept_any_vlan_flg = update_accept_any_vlan; 637 vport_update_params.accept_any_vlan = accept_any_vlan; 638 639 for_each_hwfn(cdev, i) { 640 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 641 642 vport_update_params.opaque_fid = p_hwfn->hw_info.opaque_fid; 643 644 if (IS_VF(cdev)) { 645 rc = qed_vf_pf_accept_flags(p_hwfn, &accept_flags); 646 if (rc) 647 return rc; 648 continue; 649 } 650 651 rc = qed_sp_vport_update(p_hwfn, &vport_update_params, 652 comp_mode, p_comp_data); 653 if (rc) { 654 DP_ERR(cdev, "Update rx_mode failed %d\n", rc); 655 return rc; 656 } 657 658 DP_VERBOSE(p_hwfn, QED_MSG_SP, 659 "Accept filter configured, flags = [Rx]%x [Tx]%x\n", 660 accept_flags.rx_accept_filter, 661 accept_flags.tx_accept_filter); 662 if (update_accept_any_vlan) 663 DP_VERBOSE(p_hwfn, QED_MSG_SP, 664 "accept_any_vlan=%d configured\n", 665 accept_any_vlan); 666 } 667 668 return 0; 669 } 670 671 int qed_eth_rxq_start_ramrod(struct qed_hwfn *p_hwfn, 672 struct qed_queue_cid *p_cid, 673 u16 bd_max_bytes, 674 dma_addr_t bd_chain_phys_addr, 675 dma_addr_t cqe_pbl_addr, u16 cqe_pbl_size) 676 { 677 struct rx_queue_start_ramrod_data *p_ramrod = NULL; 678 struct qed_spq_entry *p_ent = NULL; 679 struct qed_sp_init_data init_data; 680 int rc = -EINVAL; 681 682 DP_VERBOSE(p_hwfn, QED_MSG_SP, 683 "opaque_fid=0x%x, cid=0x%x, rx_qzone=0x%x, vport_id=0x%x, sb_id=0x%x\n", 684 p_cid->opaque_fid, p_cid->cid, 685 p_cid->abs.queue_id, p_cid->abs.vport_id, p_cid->abs.sb); 686 687 /* Get SPQ entry */ 688 memset(&init_data, 0, sizeof(init_data)); 689 init_data.cid = p_cid->cid; 690 init_data.opaque_fid = p_cid->opaque_fid; 691 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 692 693 rc = qed_sp_init_request(p_hwfn, &p_ent, 694 ETH_RAMROD_RX_QUEUE_START, 695 PROTOCOLID_ETH, &init_data); 696 if (rc) 697 return rc; 698 699 p_ramrod = &p_ent->ramrod.rx_queue_start; 700 701 p_ramrod->sb_id = cpu_to_le16(p_cid->abs.sb); 702 p_ramrod->sb_index = p_cid->abs.sb_idx; 703 p_ramrod->vport_id = p_cid->abs.vport_id; 704 p_ramrod->stats_counter_id = p_cid->abs.stats_id; 705 p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id); 706 p_ramrod->complete_cqe_flg = 0; 707 p_ramrod->complete_event_flg = 1; 708 709 p_ramrod->bd_max_bytes = cpu_to_le16(bd_max_bytes); 710 DMA_REGPAIR_LE(p_ramrod->bd_base, bd_chain_phys_addr); 711 712 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size); 713 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, cqe_pbl_addr); 714 715 if (p_cid->is_vf) { 716 p_ramrod->vf_rx_prod_index = p_cid->vf_qid; 717 DP_VERBOSE(p_hwfn, QED_MSG_SP, 718 "Queue%s is meant for VF rxq[%02x]\n", 719 !!p_cid->b_legacy_vf ? " [legacy]" : "", 720 p_cid->vf_qid); 721 p_ramrod->vf_rx_prod_use_zone_a = !!p_cid->b_legacy_vf; 722 } 723 724 return qed_spq_post(p_hwfn, p_ent, NULL); 725 } 726 727 static int 728 qed_eth_pf_rx_queue_start(struct qed_hwfn *p_hwfn, 729 struct qed_queue_cid *p_cid, 730 u16 bd_max_bytes, 731 dma_addr_t bd_chain_phys_addr, 732 dma_addr_t cqe_pbl_addr, 733 u16 cqe_pbl_size, void __iomem **pp_prod) 734 { 735 u32 init_prod_val = 0; 736 737 *pp_prod = p_hwfn->regview + 738 GTT_BAR0_MAP_REG_MSDM_RAM + 739 MSTORM_ETH_PF_PRODS_OFFSET(p_cid->abs.queue_id); 740 741 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */ 742 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32), 743 (u32 *)(&init_prod_val)); 744 745 return qed_eth_rxq_start_ramrod(p_hwfn, p_cid, 746 bd_max_bytes, 747 bd_chain_phys_addr, 748 cqe_pbl_addr, cqe_pbl_size); 749 } 750 751 static int 752 qed_eth_rx_queue_start(struct qed_hwfn *p_hwfn, 753 u16 opaque_fid, 754 struct qed_queue_start_common_params *p_params, 755 u16 bd_max_bytes, 756 dma_addr_t bd_chain_phys_addr, 757 dma_addr_t cqe_pbl_addr, 758 u16 cqe_pbl_size, 759 struct qed_rxq_start_ret_params *p_ret_params) 760 { 761 struct qed_queue_cid *p_cid; 762 int rc; 763 764 /* Allocate a CID for the queue */ 765 p_cid = qed_eth_queue_to_cid(p_hwfn, opaque_fid, p_params); 766 if (!p_cid) 767 return -ENOMEM; 768 769 if (IS_PF(p_hwfn->cdev)) { 770 rc = qed_eth_pf_rx_queue_start(p_hwfn, p_cid, 771 bd_max_bytes, 772 bd_chain_phys_addr, 773 cqe_pbl_addr, cqe_pbl_size, 774 &p_ret_params->p_prod); 775 } else { 776 rc = qed_vf_pf_rxq_start(p_hwfn, p_cid, 777 bd_max_bytes, 778 bd_chain_phys_addr, 779 cqe_pbl_addr, 780 cqe_pbl_size, &p_ret_params->p_prod); 781 } 782 783 /* Provide the caller with a reference to as handler */ 784 if (rc) 785 qed_eth_queue_cid_release(p_hwfn, p_cid); 786 else 787 p_ret_params->p_handle = (void *)p_cid; 788 789 return rc; 790 } 791 792 int qed_sp_eth_rx_queues_update(struct qed_hwfn *p_hwfn, 793 void **pp_rxq_handles, 794 u8 num_rxqs, 795 u8 complete_cqe_flg, 796 u8 complete_event_flg, 797 enum spq_mode comp_mode, 798 struct qed_spq_comp_cb *p_comp_data) 799 { 800 struct rx_queue_update_ramrod_data *p_ramrod = NULL; 801 struct qed_spq_entry *p_ent = NULL; 802 struct qed_sp_init_data init_data; 803 struct qed_queue_cid *p_cid; 804 int rc = -EINVAL; 805 u8 i; 806 807 memset(&init_data, 0, sizeof(init_data)); 808 init_data.comp_mode = comp_mode; 809 init_data.p_comp_data = p_comp_data; 810 811 for (i = 0; i < num_rxqs; i++) { 812 p_cid = ((struct qed_queue_cid **)pp_rxq_handles)[i]; 813 814 /* Get SPQ entry */ 815 init_data.cid = p_cid->cid; 816 init_data.opaque_fid = p_cid->opaque_fid; 817 818 rc = qed_sp_init_request(p_hwfn, &p_ent, 819 ETH_RAMROD_RX_QUEUE_UPDATE, 820 PROTOCOLID_ETH, &init_data); 821 if (rc) 822 return rc; 823 824 p_ramrod = &p_ent->ramrod.rx_queue_update; 825 p_ramrod->vport_id = p_cid->abs.vport_id; 826 827 p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id); 828 p_ramrod->complete_cqe_flg = complete_cqe_flg; 829 p_ramrod->complete_event_flg = complete_event_flg; 830 831 rc = qed_spq_post(p_hwfn, p_ent, NULL); 832 if (rc) 833 return rc; 834 } 835 836 return rc; 837 } 838 839 static int 840 qed_eth_pf_rx_queue_stop(struct qed_hwfn *p_hwfn, 841 struct qed_queue_cid *p_cid, 842 bool b_eq_completion_only, bool b_cqe_completion) 843 { 844 struct rx_queue_stop_ramrod_data *p_ramrod = NULL; 845 struct qed_spq_entry *p_ent = NULL; 846 struct qed_sp_init_data init_data; 847 int rc; 848 849 memset(&init_data, 0, sizeof(init_data)); 850 init_data.cid = p_cid->cid; 851 init_data.opaque_fid = p_cid->opaque_fid; 852 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 853 854 rc = qed_sp_init_request(p_hwfn, &p_ent, 855 ETH_RAMROD_RX_QUEUE_STOP, 856 PROTOCOLID_ETH, &init_data); 857 if (rc) 858 return rc; 859 860 p_ramrod = &p_ent->ramrod.rx_queue_stop; 861 p_ramrod->vport_id = p_cid->abs.vport_id; 862 p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id); 863 864 /* Cleaning the queue requires the completion to arrive there. 865 * In addition, VFs require the answer to come as eqe to PF. 866 */ 867 p_ramrod->complete_cqe_flg = (!p_cid->is_vf && 868 !b_eq_completion_only) || 869 b_cqe_completion; 870 p_ramrod->complete_event_flg = p_cid->is_vf || b_eq_completion_only; 871 872 return qed_spq_post(p_hwfn, p_ent, NULL); 873 } 874 875 int qed_eth_rx_queue_stop(struct qed_hwfn *p_hwfn, 876 void *p_rxq, 877 bool eq_completion_only, bool cqe_completion) 878 { 879 struct qed_queue_cid *p_cid = (struct qed_queue_cid *)p_rxq; 880 int rc = -EINVAL; 881 882 if (IS_PF(p_hwfn->cdev)) 883 rc = qed_eth_pf_rx_queue_stop(p_hwfn, p_cid, 884 eq_completion_only, 885 cqe_completion); 886 else 887 rc = qed_vf_pf_rxq_stop(p_hwfn, p_cid, cqe_completion); 888 889 if (!rc) 890 qed_eth_queue_cid_release(p_hwfn, p_cid); 891 return rc; 892 } 893 894 int 895 qed_eth_txq_start_ramrod(struct qed_hwfn *p_hwfn, 896 struct qed_queue_cid *p_cid, 897 dma_addr_t pbl_addr, u16 pbl_size, u16 pq_id) 898 { 899 struct tx_queue_start_ramrod_data *p_ramrod = NULL; 900 struct qed_spq_entry *p_ent = NULL; 901 struct qed_sp_init_data init_data; 902 int rc = -EINVAL; 903 904 /* Get SPQ entry */ 905 memset(&init_data, 0, sizeof(init_data)); 906 init_data.cid = p_cid->cid; 907 init_data.opaque_fid = p_cid->opaque_fid; 908 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 909 910 rc = qed_sp_init_request(p_hwfn, &p_ent, 911 ETH_RAMROD_TX_QUEUE_START, 912 PROTOCOLID_ETH, &init_data); 913 if (rc) 914 return rc; 915 916 p_ramrod = &p_ent->ramrod.tx_queue_start; 917 p_ramrod->vport_id = p_cid->abs.vport_id; 918 919 p_ramrod->sb_id = cpu_to_le16(p_cid->abs.sb); 920 p_ramrod->sb_index = p_cid->abs.sb_idx; 921 p_ramrod->stats_counter_id = p_cid->abs.stats_id; 922 923 p_ramrod->queue_zone_id = cpu_to_le16(p_cid->abs.queue_id); 924 p_ramrod->same_as_last_id = cpu_to_le16(p_cid->abs.queue_id); 925 926 p_ramrod->pbl_size = cpu_to_le16(pbl_size); 927 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, pbl_addr); 928 929 p_ramrod->qm_pq_id = cpu_to_le16(pq_id); 930 931 return qed_spq_post(p_hwfn, p_ent, NULL); 932 } 933 934 static int 935 qed_eth_pf_tx_queue_start(struct qed_hwfn *p_hwfn, 936 struct qed_queue_cid *p_cid, 937 u8 tc, 938 dma_addr_t pbl_addr, 939 u16 pbl_size, void __iomem **pp_doorbell) 940 { 941 int rc; 942 943 944 rc = qed_eth_txq_start_ramrod(p_hwfn, p_cid, 945 pbl_addr, pbl_size, 946 qed_get_cm_pq_idx_mcos(p_hwfn, tc)); 947 if (rc) 948 return rc; 949 950 /* Provide the caller with the necessary return values */ 951 *pp_doorbell = p_hwfn->doorbells + 952 qed_db_addr(p_cid->cid, DQ_DEMS_LEGACY); 953 954 return 0; 955 } 956 957 static int 958 qed_eth_tx_queue_start(struct qed_hwfn *p_hwfn, 959 u16 opaque_fid, 960 struct qed_queue_start_common_params *p_params, 961 u8 tc, 962 dma_addr_t pbl_addr, 963 u16 pbl_size, 964 struct qed_txq_start_ret_params *p_ret_params) 965 { 966 struct qed_queue_cid *p_cid; 967 int rc; 968 969 p_cid = qed_eth_queue_to_cid(p_hwfn, opaque_fid, p_params); 970 if (!p_cid) 971 return -EINVAL; 972 973 if (IS_PF(p_hwfn->cdev)) 974 rc = qed_eth_pf_tx_queue_start(p_hwfn, p_cid, tc, 975 pbl_addr, pbl_size, 976 &p_ret_params->p_doorbell); 977 else 978 rc = qed_vf_pf_txq_start(p_hwfn, p_cid, 979 pbl_addr, pbl_size, 980 &p_ret_params->p_doorbell); 981 982 if (rc) 983 qed_eth_queue_cid_release(p_hwfn, p_cid); 984 else 985 p_ret_params->p_handle = (void *)p_cid; 986 987 return rc; 988 } 989 990 static int 991 qed_eth_pf_tx_queue_stop(struct qed_hwfn *p_hwfn, struct qed_queue_cid *p_cid) 992 { 993 struct qed_spq_entry *p_ent = NULL; 994 struct qed_sp_init_data init_data; 995 int rc; 996 997 memset(&init_data, 0, sizeof(init_data)); 998 init_data.cid = p_cid->cid; 999 init_data.opaque_fid = p_cid->opaque_fid; 1000 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1001 1002 rc = qed_sp_init_request(p_hwfn, &p_ent, 1003 ETH_RAMROD_TX_QUEUE_STOP, 1004 PROTOCOLID_ETH, &init_data); 1005 if (rc) 1006 return rc; 1007 1008 return qed_spq_post(p_hwfn, p_ent, NULL); 1009 } 1010 1011 int qed_eth_tx_queue_stop(struct qed_hwfn *p_hwfn, void *p_handle) 1012 { 1013 struct qed_queue_cid *p_cid = (struct qed_queue_cid *)p_handle; 1014 int rc; 1015 1016 if (IS_PF(p_hwfn->cdev)) 1017 rc = qed_eth_pf_tx_queue_stop(p_hwfn, p_cid); 1018 else 1019 rc = qed_vf_pf_txq_stop(p_hwfn, p_cid); 1020 1021 if (!rc) 1022 qed_eth_queue_cid_release(p_hwfn, p_cid); 1023 return rc; 1024 } 1025 1026 static enum eth_filter_action qed_filter_action(enum qed_filter_opcode opcode) 1027 { 1028 enum eth_filter_action action = MAX_ETH_FILTER_ACTION; 1029 1030 switch (opcode) { 1031 case QED_FILTER_ADD: 1032 action = ETH_FILTER_ACTION_ADD; 1033 break; 1034 case QED_FILTER_REMOVE: 1035 action = ETH_FILTER_ACTION_REMOVE; 1036 break; 1037 case QED_FILTER_FLUSH: 1038 action = ETH_FILTER_ACTION_REMOVE_ALL; 1039 break; 1040 default: 1041 action = MAX_ETH_FILTER_ACTION; 1042 } 1043 1044 return action; 1045 } 1046 1047 static void qed_set_fw_mac_addr(__le16 *fw_msb, 1048 __le16 *fw_mid, 1049 __le16 *fw_lsb, 1050 u8 *mac) 1051 { 1052 ((u8 *)fw_msb)[0] = mac[1]; 1053 ((u8 *)fw_msb)[1] = mac[0]; 1054 ((u8 *)fw_mid)[0] = mac[3]; 1055 ((u8 *)fw_mid)[1] = mac[2]; 1056 ((u8 *)fw_lsb)[0] = mac[5]; 1057 ((u8 *)fw_lsb)[1] = mac[4]; 1058 } 1059 1060 static int 1061 qed_filter_ucast_common(struct qed_hwfn *p_hwfn, 1062 u16 opaque_fid, 1063 struct qed_filter_ucast *p_filter_cmd, 1064 struct vport_filter_update_ramrod_data **pp_ramrod, 1065 struct qed_spq_entry **pp_ent, 1066 enum spq_mode comp_mode, 1067 struct qed_spq_comp_cb *p_comp_data) 1068 { 1069 u8 vport_to_add_to = 0, vport_to_remove_from = 0; 1070 struct vport_filter_update_ramrod_data *p_ramrod; 1071 struct eth_filter_cmd *p_first_filter; 1072 struct eth_filter_cmd *p_second_filter; 1073 struct qed_sp_init_data init_data; 1074 enum eth_filter_action action; 1075 int rc; 1076 1077 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from, 1078 &vport_to_remove_from); 1079 if (rc) 1080 return rc; 1081 1082 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to, 1083 &vport_to_add_to); 1084 if (rc) 1085 return rc; 1086 1087 /* Get SPQ entry */ 1088 memset(&init_data, 0, sizeof(init_data)); 1089 init_data.cid = qed_spq_get_cid(p_hwfn); 1090 init_data.opaque_fid = opaque_fid; 1091 init_data.comp_mode = comp_mode; 1092 init_data.p_comp_data = p_comp_data; 1093 1094 rc = qed_sp_init_request(p_hwfn, pp_ent, 1095 ETH_RAMROD_FILTERS_UPDATE, 1096 PROTOCOLID_ETH, &init_data); 1097 if (rc) 1098 return rc; 1099 1100 *pp_ramrod = &(*pp_ent)->ramrod.vport_filter_update; 1101 p_ramrod = *pp_ramrod; 1102 p_ramrod->filter_cmd_hdr.rx = p_filter_cmd->is_rx_filter ? 1 : 0; 1103 p_ramrod->filter_cmd_hdr.tx = p_filter_cmd->is_tx_filter ? 1 : 0; 1104 1105 switch (p_filter_cmd->opcode) { 1106 case QED_FILTER_REPLACE: 1107 case QED_FILTER_MOVE: 1108 p_ramrod->filter_cmd_hdr.cmd_cnt = 2; break; 1109 default: 1110 p_ramrod->filter_cmd_hdr.cmd_cnt = 1; break; 1111 } 1112 1113 p_first_filter = &p_ramrod->filter_cmds[0]; 1114 p_second_filter = &p_ramrod->filter_cmds[1]; 1115 1116 switch (p_filter_cmd->type) { 1117 case QED_FILTER_MAC: 1118 p_first_filter->type = ETH_FILTER_TYPE_MAC; break; 1119 case QED_FILTER_VLAN: 1120 p_first_filter->type = ETH_FILTER_TYPE_VLAN; break; 1121 case QED_FILTER_MAC_VLAN: 1122 p_first_filter->type = ETH_FILTER_TYPE_PAIR; break; 1123 case QED_FILTER_INNER_MAC: 1124 p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC; break; 1125 case QED_FILTER_INNER_VLAN: 1126 p_first_filter->type = ETH_FILTER_TYPE_INNER_VLAN; break; 1127 case QED_FILTER_INNER_PAIR: 1128 p_first_filter->type = ETH_FILTER_TYPE_INNER_PAIR; break; 1129 case QED_FILTER_INNER_MAC_VNI_PAIR: 1130 p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR; 1131 break; 1132 case QED_FILTER_MAC_VNI_PAIR: 1133 p_first_filter->type = ETH_FILTER_TYPE_MAC_VNI_PAIR; break; 1134 case QED_FILTER_VNI: 1135 p_first_filter->type = ETH_FILTER_TYPE_VNI; break; 1136 } 1137 1138 if ((p_first_filter->type == ETH_FILTER_TYPE_MAC) || 1139 (p_first_filter->type == ETH_FILTER_TYPE_PAIR) || 1140 (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC) || 1141 (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR) || 1142 (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) || 1143 (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR)) { 1144 qed_set_fw_mac_addr(&p_first_filter->mac_msb, 1145 &p_first_filter->mac_mid, 1146 &p_first_filter->mac_lsb, 1147 (u8 *)p_filter_cmd->mac); 1148 } 1149 1150 if ((p_first_filter->type == ETH_FILTER_TYPE_VLAN) || 1151 (p_first_filter->type == ETH_FILTER_TYPE_PAIR) || 1152 (p_first_filter->type == ETH_FILTER_TYPE_INNER_VLAN) || 1153 (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR)) 1154 p_first_filter->vlan_id = cpu_to_le16(p_filter_cmd->vlan); 1155 1156 if ((p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) || 1157 (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR) || 1158 (p_first_filter->type == ETH_FILTER_TYPE_VNI)) 1159 p_first_filter->vni = cpu_to_le32(p_filter_cmd->vni); 1160 1161 if (p_filter_cmd->opcode == QED_FILTER_MOVE) { 1162 p_second_filter->type = p_first_filter->type; 1163 p_second_filter->mac_msb = p_first_filter->mac_msb; 1164 p_second_filter->mac_mid = p_first_filter->mac_mid; 1165 p_second_filter->mac_lsb = p_first_filter->mac_lsb; 1166 p_second_filter->vlan_id = p_first_filter->vlan_id; 1167 p_second_filter->vni = p_first_filter->vni; 1168 1169 p_first_filter->action = ETH_FILTER_ACTION_REMOVE; 1170 1171 p_first_filter->vport_id = vport_to_remove_from; 1172 1173 p_second_filter->action = ETH_FILTER_ACTION_ADD; 1174 p_second_filter->vport_id = vport_to_add_to; 1175 } else if (p_filter_cmd->opcode == QED_FILTER_REPLACE) { 1176 p_first_filter->vport_id = vport_to_add_to; 1177 memcpy(p_second_filter, p_first_filter, 1178 sizeof(*p_second_filter)); 1179 p_first_filter->action = ETH_FILTER_ACTION_REMOVE_ALL; 1180 p_second_filter->action = ETH_FILTER_ACTION_ADD; 1181 } else { 1182 action = qed_filter_action(p_filter_cmd->opcode); 1183 1184 if (action == MAX_ETH_FILTER_ACTION) { 1185 DP_NOTICE(p_hwfn, 1186 "%d is not supported yet\n", 1187 p_filter_cmd->opcode); 1188 return -EINVAL; 1189 } 1190 1191 p_first_filter->action = action; 1192 p_first_filter->vport_id = (p_filter_cmd->opcode == 1193 QED_FILTER_REMOVE) ? 1194 vport_to_remove_from : 1195 vport_to_add_to; 1196 } 1197 1198 return 0; 1199 } 1200 1201 int qed_sp_eth_filter_ucast(struct qed_hwfn *p_hwfn, 1202 u16 opaque_fid, 1203 struct qed_filter_ucast *p_filter_cmd, 1204 enum spq_mode comp_mode, 1205 struct qed_spq_comp_cb *p_comp_data) 1206 { 1207 struct vport_filter_update_ramrod_data *p_ramrod = NULL; 1208 struct qed_spq_entry *p_ent = NULL; 1209 struct eth_filter_cmd_header *p_header; 1210 int rc; 1211 1212 rc = qed_filter_ucast_common(p_hwfn, opaque_fid, p_filter_cmd, 1213 &p_ramrod, &p_ent, 1214 comp_mode, p_comp_data); 1215 if (rc) { 1216 DP_ERR(p_hwfn, "Uni. filter command failed %d\n", rc); 1217 return rc; 1218 } 1219 p_header = &p_ramrod->filter_cmd_hdr; 1220 p_header->assert_on_error = p_filter_cmd->assert_on_error; 1221 1222 rc = qed_spq_post(p_hwfn, p_ent, NULL); 1223 if (rc) { 1224 DP_ERR(p_hwfn, "Unicast filter ADD command failed %d\n", rc); 1225 return rc; 1226 } 1227 1228 DP_VERBOSE(p_hwfn, QED_MSG_SP, 1229 "Unicast filter configured, opcode = %s, type = %s, cmd_cnt = %d, is_rx_filter = %d, is_tx_filter = %d\n", 1230 (p_filter_cmd->opcode == QED_FILTER_ADD) ? "ADD" : 1231 ((p_filter_cmd->opcode == QED_FILTER_REMOVE) ? 1232 "REMOVE" : 1233 ((p_filter_cmd->opcode == QED_FILTER_MOVE) ? 1234 "MOVE" : "REPLACE")), 1235 (p_filter_cmd->type == QED_FILTER_MAC) ? "MAC" : 1236 ((p_filter_cmd->type == QED_FILTER_VLAN) ? 1237 "VLAN" : "MAC & VLAN"), 1238 p_ramrod->filter_cmd_hdr.cmd_cnt, 1239 p_filter_cmd->is_rx_filter, 1240 p_filter_cmd->is_tx_filter); 1241 DP_VERBOSE(p_hwfn, QED_MSG_SP, 1242 "vport_to_add_to = %d, vport_to_remove_from = %d, mac = %2x:%2x:%2x:%2x:%2x:%2x, vlan = %d\n", 1243 p_filter_cmd->vport_to_add_to, 1244 p_filter_cmd->vport_to_remove_from, 1245 p_filter_cmd->mac[0], 1246 p_filter_cmd->mac[1], 1247 p_filter_cmd->mac[2], 1248 p_filter_cmd->mac[3], 1249 p_filter_cmd->mac[4], 1250 p_filter_cmd->mac[5], 1251 p_filter_cmd->vlan); 1252 1253 return 0; 1254 } 1255 1256 /******************************************************************************* 1257 * Description: 1258 * Calculates crc 32 on a buffer 1259 * Note: crc32_length MUST be aligned to 8 1260 * Return: 1261 ******************************************************************************/ 1262 static u32 qed_calc_crc32c(u8 *crc32_packet, 1263 u32 crc32_length, u32 crc32_seed, u8 complement) 1264 { 1265 u32 byte = 0, bit = 0, crc32_result = crc32_seed; 1266 u8 msb = 0, current_byte = 0; 1267 1268 if ((!crc32_packet) || 1269 (crc32_length == 0) || 1270 ((crc32_length % 8) != 0)) 1271 return crc32_result; 1272 for (byte = 0; byte < crc32_length; byte++) { 1273 current_byte = crc32_packet[byte]; 1274 for (bit = 0; bit < 8; bit++) { 1275 msb = (u8)(crc32_result >> 31); 1276 crc32_result = crc32_result << 1; 1277 if (msb != (0x1 & (current_byte >> bit))) { 1278 crc32_result = crc32_result ^ CRC32_POLY; 1279 crc32_result |= 1; /*crc32_result[0] = 1;*/ 1280 } 1281 } 1282 } 1283 return crc32_result; 1284 } 1285 1286 static u32 qed_crc32c_le(u32 seed, u8 *mac, u32 len) 1287 { 1288 u32 packet_buf[2] = { 0 }; 1289 1290 memcpy((u8 *)(&packet_buf[0]), &mac[0], 6); 1291 return qed_calc_crc32c((u8 *)packet_buf, 8, seed, 0); 1292 } 1293 1294 u8 qed_mcast_bin_from_mac(u8 *mac) 1295 { 1296 u32 crc = qed_crc32c_le(ETH_MULTICAST_BIN_FROM_MAC_SEED, 1297 mac, ETH_ALEN); 1298 1299 return crc & 0xff; 1300 } 1301 1302 static int 1303 qed_sp_eth_filter_mcast(struct qed_hwfn *p_hwfn, 1304 u16 opaque_fid, 1305 struct qed_filter_mcast *p_filter_cmd, 1306 enum spq_mode comp_mode, 1307 struct qed_spq_comp_cb *p_comp_data) 1308 { 1309 unsigned long bins[ETH_MULTICAST_MAC_BINS_IN_REGS]; 1310 struct vport_update_ramrod_data *p_ramrod = NULL; 1311 struct qed_spq_entry *p_ent = NULL; 1312 struct qed_sp_init_data init_data; 1313 u8 abs_vport_id = 0; 1314 int rc, i; 1315 1316 if (p_filter_cmd->opcode == QED_FILTER_ADD) 1317 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to, 1318 &abs_vport_id); 1319 else 1320 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from, 1321 &abs_vport_id); 1322 if (rc) 1323 return rc; 1324 1325 /* Get SPQ entry */ 1326 memset(&init_data, 0, sizeof(init_data)); 1327 init_data.cid = qed_spq_get_cid(p_hwfn); 1328 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1329 init_data.comp_mode = comp_mode; 1330 init_data.p_comp_data = p_comp_data; 1331 1332 rc = qed_sp_init_request(p_hwfn, &p_ent, 1333 ETH_RAMROD_VPORT_UPDATE, 1334 PROTOCOLID_ETH, &init_data); 1335 if (rc) { 1336 DP_ERR(p_hwfn, "Multi-cast command failed %d\n", rc); 1337 return rc; 1338 } 1339 1340 p_ramrod = &p_ent->ramrod.vport_update; 1341 p_ramrod->common.update_approx_mcast_flg = 1; 1342 1343 /* explicitly clear out the entire vector */ 1344 memset(&p_ramrod->approx_mcast.bins, 0, 1345 sizeof(p_ramrod->approx_mcast.bins)); 1346 memset(bins, 0, sizeof(unsigned long) * 1347 ETH_MULTICAST_MAC_BINS_IN_REGS); 1348 /* filter ADD op is explicit set op and it removes 1349 * any existing filters for the vport 1350 */ 1351 if (p_filter_cmd->opcode == QED_FILTER_ADD) { 1352 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) { 1353 u32 bit; 1354 1355 bit = qed_mcast_bin_from_mac(p_filter_cmd->mac[i]); 1356 __set_bit(bit, bins); 1357 } 1358 1359 /* Convert to correct endianity */ 1360 for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) { 1361 struct vport_update_ramrod_mcast *p_ramrod_bins; 1362 u32 *p_bins = (u32 *)bins; 1363 1364 p_ramrod_bins = &p_ramrod->approx_mcast; 1365 p_ramrod_bins->bins[i] = cpu_to_le32(p_bins[i]); 1366 } 1367 } 1368 1369 p_ramrod->common.vport_id = abs_vport_id; 1370 1371 return qed_spq_post(p_hwfn, p_ent, NULL); 1372 } 1373 1374 static int qed_filter_mcast_cmd(struct qed_dev *cdev, 1375 struct qed_filter_mcast *p_filter_cmd, 1376 enum spq_mode comp_mode, 1377 struct qed_spq_comp_cb *p_comp_data) 1378 { 1379 int rc = 0; 1380 int i; 1381 1382 /* only ADD and REMOVE operations are supported for multi-cast */ 1383 if ((p_filter_cmd->opcode != QED_FILTER_ADD && 1384 (p_filter_cmd->opcode != QED_FILTER_REMOVE)) || 1385 (p_filter_cmd->num_mc_addrs > QED_MAX_MC_ADDRS)) 1386 return -EINVAL; 1387 1388 for_each_hwfn(cdev, i) { 1389 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1390 1391 u16 opaque_fid; 1392 1393 if (IS_VF(cdev)) { 1394 qed_vf_pf_filter_mcast(p_hwfn, p_filter_cmd); 1395 continue; 1396 } 1397 1398 opaque_fid = p_hwfn->hw_info.opaque_fid; 1399 1400 rc = qed_sp_eth_filter_mcast(p_hwfn, 1401 opaque_fid, 1402 p_filter_cmd, 1403 comp_mode, p_comp_data); 1404 } 1405 return rc; 1406 } 1407 1408 static int qed_filter_ucast_cmd(struct qed_dev *cdev, 1409 struct qed_filter_ucast *p_filter_cmd, 1410 enum spq_mode comp_mode, 1411 struct qed_spq_comp_cb *p_comp_data) 1412 { 1413 int rc = 0; 1414 int i; 1415 1416 for_each_hwfn(cdev, i) { 1417 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1418 u16 opaque_fid; 1419 1420 if (IS_VF(cdev)) { 1421 rc = qed_vf_pf_filter_ucast(p_hwfn, p_filter_cmd); 1422 continue; 1423 } 1424 1425 opaque_fid = p_hwfn->hw_info.opaque_fid; 1426 1427 rc = qed_sp_eth_filter_ucast(p_hwfn, 1428 opaque_fid, 1429 p_filter_cmd, 1430 comp_mode, p_comp_data); 1431 if (rc) 1432 break; 1433 } 1434 1435 return rc; 1436 } 1437 1438 /* Statistics related code */ 1439 static void __qed_get_vport_pstats_addrlen(struct qed_hwfn *p_hwfn, 1440 u32 *p_addr, 1441 u32 *p_len, u16 statistics_bin) 1442 { 1443 if (IS_PF(p_hwfn->cdev)) { 1444 *p_addr = BAR0_MAP_REG_PSDM_RAM + 1445 PSTORM_QUEUE_STAT_OFFSET(statistics_bin); 1446 *p_len = sizeof(struct eth_pstorm_per_queue_stat); 1447 } else { 1448 struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info; 1449 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp; 1450 1451 *p_addr = p_resp->pfdev_info.stats_info.pstats.address; 1452 *p_len = p_resp->pfdev_info.stats_info.pstats.len; 1453 } 1454 } 1455 1456 static void __qed_get_vport_pstats(struct qed_hwfn *p_hwfn, 1457 struct qed_ptt *p_ptt, 1458 struct qed_eth_stats *p_stats, 1459 u16 statistics_bin) 1460 { 1461 struct eth_pstorm_per_queue_stat pstats; 1462 u32 pstats_addr = 0, pstats_len = 0; 1463 1464 __qed_get_vport_pstats_addrlen(p_hwfn, &pstats_addr, &pstats_len, 1465 statistics_bin); 1466 1467 memset(&pstats, 0, sizeof(pstats)); 1468 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, pstats_len); 1469 1470 p_stats->common.tx_ucast_bytes += 1471 HILO_64_REGPAIR(pstats.sent_ucast_bytes); 1472 p_stats->common.tx_mcast_bytes += 1473 HILO_64_REGPAIR(pstats.sent_mcast_bytes); 1474 p_stats->common.tx_bcast_bytes += 1475 HILO_64_REGPAIR(pstats.sent_bcast_bytes); 1476 p_stats->common.tx_ucast_pkts += 1477 HILO_64_REGPAIR(pstats.sent_ucast_pkts); 1478 p_stats->common.tx_mcast_pkts += 1479 HILO_64_REGPAIR(pstats.sent_mcast_pkts); 1480 p_stats->common.tx_bcast_pkts += 1481 HILO_64_REGPAIR(pstats.sent_bcast_pkts); 1482 p_stats->common.tx_err_drop_pkts += 1483 HILO_64_REGPAIR(pstats.error_drop_pkts); 1484 } 1485 1486 static void __qed_get_vport_tstats(struct qed_hwfn *p_hwfn, 1487 struct qed_ptt *p_ptt, 1488 struct qed_eth_stats *p_stats, 1489 u16 statistics_bin) 1490 { 1491 struct tstorm_per_port_stat tstats; 1492 u32 tstats_addr, tstats_len; 1493 1494 if (IS_PF(p_hwfn->cdev)) { 1495 tstats_addr = BAR0_MAP_REG_TSDM_RAM + 1496 TSTORM_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)); 1497 tstats_len = sizeof(struct tstorm_per_port_stat); 1498 } else { 1499 struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info; 1500 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp; 1501 1502 tstats_addr = p_resp->pfdev_info.stats_info.tstats.address; 1503 tstats_len = p_resp->pfdev_info.stats_info.tstats.len; 1504 } 1505 1506 memset(&tstats, 0, sizeof(tstats)); 1507 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, tstats_len); 1508 1509 p_stats->common.mftag_filter_discards += 1510 HILO_64_REGPAIR(tstats.mftag_filter_discard); 1511 p_stats->common.mac_filter_discards += 1512 HILO_64_REGPAIR(tstats.eth_mac_filter_discard); 1513 } 1514 1515 static void __qed_get_vport_ustats_addrlen(struct qed_hwfn *p_hwfn, 1516 u32 *p_addr, 1517 u32 *p_len, u16 statistics_bin) 1518 { 1519 if (IS_PF(p_hwfn->cdev)) { 1520 *p_addr = BAR0_MAP_REG_USDM_RAM + 1521 USTORM_QUEUE_STAT_OFFSET(statistics_bin); 1522 *p_len = sizeof(struct eth_ustorm_per_queue_stat); 1523 } else { 1524 struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info; 1525 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp; 1526 1527 *p_addr = p_resp->pfdev_info.stats_info.ustats.address; 1528 *p_len = p_resp->pfdev_info.stats_info.ustats.len; 1529 } 1530 } 1531 1532 static void __qed_get_vport_ustats(struct qed_hwfn *p_hwfn, 1533 struct qed_ptt *p_ptt, 1534 struct qed_eth_stats *p_stats, 1535 u16 statistics_bin) 1536 { 1537 struct eth_ustorm_per_queue_stat ustats; 1538 u32 ustats_addr = 0, ustats_len = 0; 1539 1540 __qed_get_vport_ustats_addrlen(p_hwfn, &ustats_addr, &ustats_len, 1541 statistics_bin); 1542 1543 memset(&ustats, 0, sizeof(ustats)); 1544 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, ustats_len); 1545 1546 p_stats->common.rx_ucast_bytes += 1547 HILO_64_REGPAIR(ustats.rcv_ucast_bytes); 1548 p_stats->common.rx_mcast_bytes += 1549 HILO_64_REGPAIR(ustats.rcv_mcast_bytes); 1550 p_stats->common.rx_bcast_bytes += 1551 HILO_64_REGPAIR(ustats.rcv_bcast_bytes); 1552 p_stats->common.rx_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts); 1553 p_stats->common.rx_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts); 1554 p_stats->common.rx_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts); 1555 } 1556 1557 static void __qed_get_vport_mstats_addrlen(struct qed_hwfn *p_hwfn, 1558 u32 *p_addr, 1559 u32 *p_len, u16 statistics_bin) 1560 { 1561 if (IS_PF(p_hwfn->cdev)) { 1562 *p_addr = BAR0_MAP_REG_MSDM_RAM + 1563 MSTORM_QUEUE_STAT_OFFSET(statistics_bin); 1564 *p_len = sizeof(struct eth_mstorm_per_queue_stat); 1565 } else { 1566 struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info; 1567 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp; 1568 1569 *p_addr = p_resp->pfdev_info.stats_info.mstats.address; 1570 *p_len = p_resp->pfdev_info.stats_info.mstats.len; 1571 } 1572 } 1573 1574 static void __qed_get_vport_mstats(struct qed_hwfn *p_hwfn, 1575 struct qed_ptt *p_ptt, 1576 struct qed_eth_stats *p_stats, 1577 u16 statistics_bin) 1578 { 1579 struct eth_mstorm_per_queue_stat mstats; 1580 u32 mstats_addr = 0, mstats_len = 0; 1581 1582 __qed_get_vport_mstats_addrlen(p_hwfn, &mstats_addr, &mstats_len, 1583 statistics_bin); 1584 1585 memset(&mstats, 0, sizeof(mstats)); 1586 qed_memcpy_from(p_hwfn, p_ptt, &mstats, mstats_addr, mstats_len); 1587 1588 p_stats->common.no_buff_discards += 1589 HILO_64_REGPAIR(mstats.no_buff_discard); 1590 p_stats->common.packet_too_big_discard += 1591 HILO_64_REGPAIR(mstats.packet_too_big_discard); 1592 p_stats->common.ttl0_discard += HILO_64_REGPAIR(mstats.ttl0_discard); 1593 p_stats->common.tpa_coalesced_pkts += 1594 HILO_64_REGPAIR(mstats.tpa_coalesced_pkts); 1595 p_stats->common.tpa_coalesced_events += 1596 HILO_64_REGPAIR(mstats.tpa_coalesced_events); 1597 p_stats->common.tpa_aborts_num += 1598 HILO_64_REGPAIR(mstats.tpa_aborts_num); 1599 p_stats->common.tpa_coalesced_bytes += 1600 HILO_64_REGPAIR(mstats.tpa_coalesced_bytes); 1601 } 1602 1603 static void __qed_get_vport_port_stats(struct qed_hwfn *p_hwfn, 1604 struct qed_ptt *p_ptt, 1605 struct qed_eth_stats *p_stats) 1606 { 1607 struct qed_eth_stats_common *p_common = &p_stats->common; 1608 struct port_stats port_stats; 1609 int j; 1610 1611 memset(&port_stats, 0, sizeof(port_stats)); 1612 1613 qed_memcpy_from(p_hwfn, p_ptt, &port_stats, 1614 p_hwfn->mcp_info->port_addr + 1615 offsetof(struct public_port, stats), 1616 sizeof(port_stats)); 1617 1618 p_common->rx_64_byte_packets += port_stats.eth.r64; 1619 p_common->rx_65_to_127_byte_packets += port_stats.eth.r127; 1620 p_common->rx_128_to_255_byte_packets += port_stats.eth.r255; 1621 p_common->rx_256_to_511_byte_packets += port_stats.eth.r511; 1622 p_common->rx_512_to_1023_byte_packets += port_stats.eth.r1023; 1623 p_common->rx_1024_to_1518_byte_packets += port_stats.eth.r1518; 1624 p_common->rx_crc_errors += port_stats.eth.rfcs; 1625 p_common->rx_mac_crtl_frames += port_stats.eth.rxcf; 1626 p_common->rx_pause_frames += port_stats.eth.rxpf; 1627 p_common->rx_pfc_frames += port_stats.eth.rxpp; 1628 p_common->rx_align_errors += port_stats.eth.raln; 1629 p_common->rx_carrier_errors += port_stats.eth.rfcr; 1630 p_common->rx_oversize_packets += port_stats.eth.rovr; 1631 p_common->rx_jabbers += port_stats.eth.rjbr; 1632 p_common->rx_undersize_packets += port_stats.eth.rund; 1633 p_common->rx_fragments += port_stats.eth.rfrg; 1634 p_common->tx_64_byte_packets += port_stats.eth.t64; 1635 p_common->tx_65_to_127_byte_packets += port_stats.eth.t127; 1636 p_common->tx_128_to_255_byte_packets += port_stats.eth.t255; 1637 p_common->tx_256_to_511_byte_packets += port_stats.eth.t511; 1638 p_common->tx_512_to_1023_byte_packets += port_stats.eth.t1023; 1639 p_common->tx_1024_to_1518_byte_packets += port_stats.eth.t1518; 1640 p_common->tx_pause_frames += port_stats.eth.txpf; 1641 p_common->tx_pfc_frames += port_stats.eth.txpp; 1642 p_common->rx_mac_bytes += port_stats.eth.rbyte; 1643 p_common->rx_mac_uc_packets += port_stats.eth.rxuca; 1644 p_common->rx_mac_mc_packets += port_stats.eth.rxmca; 1645 p_common->rx_mac_bc_packets += port_stats.eth.rxbca; 1646 p_common->rx_mac_frames_ok += port_stats.eth.rxpok; 1647 p_common->tx_mac_bytes += port_stats.eth.tbyte; 1648 p_common->tx_mac_uc_packets += port_stats.eth.txuca; 1649 p_common->tx_mac_mc_packets += port_stats.eth.txmca; 1650 p_common->tx_mac_bc_packets += port_stats.eth.txbca; 1651 p_common->tx_mac_ctrl_frames += port_stats.eth.txcf; 1652 for (j = 0; j < 8; j++) { 1653 p_common->brb_truncates += port_stats.brb.brb_truncate[j]; 1654 p_common->brb_discards += port_stats.brb.brb_discard[j]; 1655 } 1656 1657 if (QED_IS_BB(p_hwfn->cdev)) { 1658 struct qed_eth_stats_bb *p_bb = &p_stats->bb; 1659 1660 p_bb->rx_1519_to_1522_byte_packets += 1661 port_stats.eth.u0.bb0.r1522; 1662 p_bb->rx_1519_to_2047_byte_packets += 1663 port_stats.eth.u0.bb0.r2047; 1664 p_bb->rx_2048_to_4095_byte_packets += 1665 port_stats.eth.u0.bb0.r4095; 1666 p_bb->rx_4096_to_9216_byte_packets += 1667 port_stats.eth.u0.bb0.r9216; 1668 p_bb->rx_9217_to_16383_byte_packets += 1669 port_stats.eth.u0.bb0.r16383; 1670 p_bb->tx_1519_to_2047_byte_packets += 1671 port_stats.eth.u1.bb1.t2047; 1672 p_bb->tx_2048_to_4095_byte_packets += 1673 port_stats.eth.u1.bb1.t4095; 1674 p_bb->tx_4096_to_9216_byte_packets += 1675 port_stats.eth.u1.bb1.t9216; 1676 p_bb->tx_9217_to_16383_byte_packets += 1677 port_stats.eth.u1.bb1.t16383; 1678 p_bb->tx_lpi_entry_count += port_stats.eth.u2.bb2.tlpiec; 1679 p_bb->tx_total_collisions += port_stats.eth.u2.bb2.tncl; 1680 } else { 1681 struct qed_eth_stats_ah *p_ah = &p_stats->ah; 1682 1683 p_ah->rx_1519_to_max_byte_packets += 1684 port_stats.eth.u0.ah0.r1519_to_max; 1685 p_ah->tx_1519_to_max_byte_packets = 1686 port_stats.eth.u1.ah1.t1519_to_max; 1687 } 1688 } 1689 1690 static void __qed_get_vport_stats(struct qed_hwfn *p_hwfn, 1691 struct qed_ptt *p_ptt, 1692 struct qed_eth_stats *stats, 1693 u16 statistics_bin, bool b_get_port_stats) 1694 { 1695 __qed_get_vport_mstats(p_hwfn, p_ptt, stats, statistics_bin); 1696 __qed_get_vport_ustats(p_hwfn, p_ptt, stats, statistics_bin); 1697 __qed_get_vport_tstats(p_hwfn, p_ptt, stats, statistics_bin); 1698 __qed_get_vport_pstats(p_hwfn, p_ptt, stats, statistics_bin); 1699 1700 if (b_get_port_stats && p_hwfn->mcp_info) 1701 __qed_get_vport_port_stats(p_hwfn, p_ptt, stats); 1702 } 1703 1704 static void _qed_get_vport_stats(struct qed_dev *cdev, 1705 struct qed_eth_stats *stats) 1706 { 1707 u8 fw_vport = 0; 1708 int i; 1709 1710 memset(stats, 0, sizeof(*stats)); 1711 1712 for_each_hwfn(cdev, i) { 1713 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1714 struct qed_ptt *p_ptt = IS_PF(cdev) ? qed_ptt_acquire(p_hwfn) 1715 : NULL; 1716 1717 if (IS_PF(cdev)) { 1718 /* The main vport index is relative first */ 1719 if (qed_fw_vport(p_hwfn, 0, &fw_vport)) { 1720 DP_ERR(p_hwfn, "No vport available!\n"); 1721 goto out; 1722 } 1723 } 1724 1725 if (IS_PF(cdev) && !p_ptt) { 1726 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 1727 continue; 1728 } 1729 1730 __qed_get_vport_stats(p_hwfn, p_ptt, stats, fw_vport, 1731 IS_PF(cdev) ? true : false); 1732 1733 out: 1734 if (IS_PF(cdev) && p_ptt) 1735 qed_ptt_release(p_hwfn, p_ptt); 1736 } 1737 } 1738 1739 void qed_get_vport_stats(struct qed_dev *cdev, struct qed_eth_stats *stats) 1740 { 1741 u32 i; 1742 1743 if (!cdev) { 1744 memset(stats, 0, sizeof(*stats)); 1745 return; 1746 } 1747 1748 _qed_get_vport_stats(cdev, stats); 1749 1750 if (!cdev->reset_stats) 1751 return; 1752 1753 /* Reduce the statistics baseline */ 1754 for (i = 0; i < sizeof(struct qed_eth_stats) / sizeof(u64); i++) 1755 ((u64 *)stats)[i] -= ((u64 *)cdev->reset_stats)[i]; 1756 } 1757 1758 /* zeroes V-PORT specific portion of stats (Port stats remains untouched) */ 1759 void qed_reset_vport_stats(struct qed_dev *cdev) 1760 { 1761 int i; 1762 1763 for_each_hwfn(cdev, i) { 1764 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1765 struct eth_mstorm_per_queue_stat mstats; 1766 struct eth_ustorm_per_queue_stat ustats; 1767 struct eth_pstorm_per_queue_stat pstats; 1768 struct qed_ptt *p_ptt = IS_PF(cdev) ? qed_ptt_acquire(p_hwfn) 1769 : NULL; 1770 u32 addr = 0, len = 0; 1771 1772 if (IS_PF(cdev) && !p_ptt) { 1773 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 1774 continue; 1775 } 1776 1777 memset(&mstats, 0, sizeof(mstats)); 1778 __qed_get_vport_mstats_addrlen(p_hwfn, &addr, &len, 0); 1779 qed_memcpy_to(p_hwfn, p_ptt, addr, &mstats, len); 1780 1781 memset(&ustats, 0, sizeof(ustats)); 1782 __qed_get_vport_ustats_addrlen(p_hwfn, &addr, &len, 0); 1783 qed_memcpy_to(p_hwfn, p_ptt, addr, &ustats, len); 1784 1785 memset(&pstats, 0, sizeof(pstats)); 1786 __qed_get_vport_pstats_addrlen(p_hwfn, &addr, &len, 0); 1787 qed_memcpy_to(p_hwfn, p_ptt, addr, &pstats, len); 1788 1789 if (IS_PF(cdev)) 1790 qed_ptt_release(p_hwfn, p_ptt); 1791 } 1792 1793 /* PORT statistics are not necessarily reset, so we need to 1794 * read and create a baseline for future statistics. 1795 */ 1796 if (!cdev->reset_stats) 1797 DP_INFO(cdev, "Reset stats not allocated\n"); 1798 else 1799 _qed_get_vport_stats(cdev, cdev->reset_stats); 1800 } 1801 1802 static void 1803 qed_arfs_mode_configure(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1804 struct qed_arfs_config_params *p_cfg_params) 1805 { 1806 if (p_cfg_params->arfs_enable) { 1807 qed_set_rfs_mode_enable(p_hwfn, p_ptt, p_hwfn->rel_pf_id, 1808 p_cfg_params->tcp, p_cfg_params->udp, 1809 p_cfg_params->ipv4, p_cfg_params->ipv6); 1810 DP_VERBOSE(p_hwfn, QED_MSG_SP, 1811 "tcp = %s, udp = %s, ipv4 = %s, ipv6 =%s\n", 1812 p_cfg_params->tcp ? "Enable" : "Disable", 1813 p_cfg_params->udp ? "Enable" : "Disable", 1814 p_cfg_params->ipv4 ? "Enable" : "Disable", 1815 p_cfg_params->ipv6 ? "Enable" : "Disable"); 1816 } else { 1817 qed_set_rfs_mode_disable(p_hwfn, p_ptt, p_hwfn->rel_pf_id); 1818 } 1819 1820 DP_VERBOSE(p_hwfn, QED_MSG_SP, "Configured ARFS mode : %s\n", 1821 p_cfg_params->arfs_enable ? "Enable" : "Disable"); 1822 } 1823 1824 static int 1825 qed_configure_rfs_ntuple_filter(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1826 struct qed_spq_comp_cb *p_cb, 1827 dma_addr_t p_addr, u16 length, u16 qid, 1828 u8 vport_id, bool b_is_add) 1829 { 1830 struct rx_update_gft_filter_data *p_ramrod = NULL; 1831 struct qed_spq_entry *p_ent = NULL; 1832 struct qed_sp_init_data init_data; 1833 u16 abs_rx_q_id = 0; 1834 u8 abs_vport_id = 0; 1835 int rc = -EINVAL; 1836 1837 rc = qed_fw_vport(p_hwfn, vport_id, &abs_vport_id); 1838 if (rc) 1839 return rc; 1840 1841 rc = qed_fw_l2_queue(p_hwfn, qid, &abs_rx_q_id); 1842 if (rc) 1843 return rc; 1844 1845 /* Get SPQ entry */ 1846 memset(&init_data, 0, sizeof(init_data)); 1847 init_data.cid = qed_spq_get_cid(p_hwfn); 1848 1849 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1850 1851 if (p_cb) { 1852 init_data.comp_mode = QED_SPQ_MODE_CB; 1853 init_data.p_comp_data = p_cb; 1854 } else { 1855 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1856 } 1857 1858 rc = qed_sp_init_request(p_hwfn, &p_ent, 1859 ETH_RAMROD_GFT_UPDATE_FILTER, 1860 PROTOCOLID_ETH, &init_data); 1861 if (rc) 1862 return rc; 1863 1864 p_ramrod = &p_ent->ramrod.rx_update_gft; 1865 DMA_REGPAIR_LE(p_ramrod->pkt_hdr_addr, p_addr); 1866 p_ramrod->pkt_hdr_length = cpu_to_le16(length); 1867 p_ramrod->rx_qid_or_action_icid = cpu_to_le16(abs_rx_q_id); 1868 p_ramrod->vport_id = abs_vport_id; 1869 p_ramrod->filter_type = RFS_FILTER_TYPE; 1870 p_ramrod->filter_action = b_is_add ? GFT_ADD_FILTER : GFT_DELETE_FILTER; 1871 1872 DP_VERBOSE(p_hwfn, QED_MSG_SP, 1873 "V[%0x], Q[%04x] - %s filter from 0x%llx [length %04xb]\n", 1874 abs_vport_id, abs_rx_q_id, 1875 b_is_add ? "Adding" : "Removing", (u64)p_addr, length); 1876 1877 return qed_spq_post(p_hwfn, p_ent, NULL); 1878 } 1879 1880 static int qed_fill_eth_dev_info(struct qed_dev *cdev, 1881 struct qed_dev_eth_info *info) 1882 { 1883 int i; 1884 1885 memset(info, 0, sizeof(*info)); 1886 1887 info->num_tc = 1; 1888 1889 if (IS_PF(cdev)) { 1890 int max_vf_vlan_filters = 0; 1891 int max_vf_mac_filters = 0; 1892 1893 if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) { 1894 u16 num_queues = 0; 1895 1896 /* Since the feature controls only queue-zones, 1897 * make sure we have the contexts [rx, tx, xdp] to 1898 * match. 1899 */ 1900 for_each_hwfn(cdev, i) { 1901 struct qed_hwfn *hwfn = &cdev->hwfns[i]; 1902 u16 l2_queues = (u16)FEAT_NUM(hwfn, 1903 QED_PF_L2_QUE); 1904 u16 cids; 1905 1906 cids = hwfn->pf_params.eth_pf_params.num_cons; 1907 num_queues += min_t(u16, l2_queues, cids / 3); 1908 } 1909 1910 /* queues might theoretically be >256, but interrupts' 1911 * upper-limit guarantes that it would fit in a u8. 1912 */ 1913 if (cdev->int_params.fp_msix_cnt) { 1914 u8 irqs = cdev->int_params.fp_msix_cnt; 1915 1916 info->num_queues = (u8)min_t(u16, 1917 num_queues, irqs); 1918 } 1919 } else { 1920 info->num_queues = cdev->num_hwfns; 1921 } 1922 1923 if (IS_QED_SRIOV(cdev)) { 1924 max_vf_vlan_filters = cdev->p_iov_info->total_vfs * 1925 QED_ETH_VF_NUM_VLAN_FILTERS; 1926 max_vf_mac_filters = cdev->p_iov_info->total_vfs * 1927 QED_ETH_VF_NUM_MAC_FILTERS; 1928 } 1929 info->num_vlan_filters = RESC_NUM(QED_LEADING_HWFN(cdev), 1930 QED_VLAN) - 1931 max_vf_vlan_filters; 1932 info->num_mac_filters = RESC_NUM(QED_LEADING_HWFN(cdev), 1933 QED_MAC) - 1934 max_vf_mac_filters; 1935 1936 ether_addr_copy(info->port_mac, 1937 cdev->hwfns[0].hw_info.hw_mac_addr); 1938 } else { 1939 qed_vf_get_num_rxqs(QED_LEADING_HWFN(cdev), &info->num_queues); 1940 if (cdev->num_hwfns > 1) { 1941 u8 queues = 0; 1942 1943 qed_vf_get_num_rxqs(&cdev->hwfns[1], &queues); 1944 info->num_queues += queues; 1945 } 1946 1947 qed_vf_get_num_vlan_filters(&cdev->hwfns[0], 1948 (u8 *)&info->num_vlan_filters); 1949 qed_vf_get_num_mac_filters(&cdev->hwfns[0], 1950 (u8 *)&info->num_mac_filters); 1951 qed_vf_get_port_mac(&cdev->hwfns[0], info->port_mac); 1952 1953 info->is_legacy = !!cdev->hwfns[0].vf_iov_info->b_pre_fp_hsi; 1954 } 1955 1956 qed_fill_dev_info(cdev, &info->common); 1957 1958 if (IS_VF(cdev)) 1959 eth_zero_addr(info->common.hw_mac); 1960 1961 return 0; 1962 } 1963 1964 static void qed_register_eth_ops(struct qed_dev *cdev, 1965 struct qed_eth_cb_ops *ops, void *cookie) 1966 { 1967 cdev->protocol_ops.eth = ops; 1968 cdev->ops_cookie = cookie; 1969 1970 /* For VF, we start bulletin reading */ 1971 if (IS_VF(cdev)) 1972 qed_vf_start_iov_wq(cdev); 1973 } 1974 1975 static bool qed_check_mac(struct qed_dev *cdev, u8 *mac) 1976 { 1977 if (IS_PF(cdev)) 1978 return true; 1979 1980 return qed_vf_check_mac(&cdev->hwfns[0], mac); 1981 } 1982 1983 static int qed_start_vport(struct qed_dev *cdev, 1984 struct qed_start_vport_params *params) 1985 { 1986 int rc, i; 1987 1988 for_each_hwfn(cdev, i) { 1989 struct qed_sp_vport_start_params start = { 0 }; 1990 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1991 1992 start.tpa_mode = params->gro_enable ? QED_TPA_MODE_GRO : 1993 QED_TPA_MODE_NONE; 1994 start.remove_inner_vlan = params->remove_inner_vlan; 1995 start.only_untagged = true; /* untagged only */ 1996 start.drop_ttl0 = params->drop_ttl0; 1997 start.opaque_fid = p_hwfn->hw_info.opaque_fid; 1998 start.concrete_fid = p_hwfn->hw_info.concrete_fid; 1999 start.handle_ptp_pkts = params->handle_ptp_pkts; 2000 start.vport_id = params->vport_id; 2001 start.max_buffers_per_cqe = 16; 2002 start.mtu = params->mtu; 2003 2004 rc = qed_sp_vport_start(p_hwfn, &start); 2005 if (rc) { 2006 DP_ERR(cdev, "Failed to start VPORT\n"); 2007 return rc; 2008 } 2009 2010 rc = qed_hw_start_fastpath(p_hwfn); 2011 if (rc) { 2012 DP_ERR(cdev, "Failed to start VPORT fastpath\n"); 2013 return rc; 2014 } 2015 2016 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP), 2017 "Started V-PORT %d with MTU %d\n", 2018 start.vport_id, start.mtu); 2019 } 2020 2021 if (params->clear_stats) 2022 qed_reset_vport_stats(cdev); 2023 2024 return 0; 2025 } 2026 2027 static int qed_stop_vport(struct qed_dev *cdev, u8 vport_id) 2028 { 2029 int rc, i; 2030 2031 for_each_hwfn(cdev, i) { 2032 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 2033 2034 rc = qed_sp_vport_stop(p_hwfn, 2035 p_hwfn->hw_info.opaque_fid, vport_id); 2036 2037 if (rc) { 2038 DP_ERR(cdev, "Failed to stop VPORT\n"); 2039 return rc; 2040 } 2041 } 2042 return 0; 2043 } 2044 2045 static int qed_update_vport_rss(struct qed_dev *cdev, 2046 struct qed_update_vport_rss_params *input, 2047 struct qed_rss_params *rss) 2048 { 2049 int i, fn; 2050 2051 /* Update configuration with what's correct regardless of CMT */ 2052 rss->update_rss_config = 1; 2053 rss->rss_enable = 1; 2054 rss->update_rss_capabilities = 1; 2055 rss->update_rss_ind_table = 1; 2056 rss->update_rss_key = 1; 2057 rss->rss_caps = input->rss_caps; 2058 memcpy(rss->rss_key, input->rss_key, QED_RSS_KEY_SIZE * sizeof(u32)); 2059 2060 /* In regular scenario, we'd simply need to take input handlers. 2061 * But in CMT, we'd have to split the handlers according to the 2062 * engine they were configured on. We'd then have to understand 2063 * whether RSS is really required, since 2-queues on CMT doesn't 2064 * require RSS. 2065 */ 2066 if (cdev->num_hwfns == 1) { 2067 memcpy(rss->rss_ind_table, 2068 input->rss_ind_table, 2069 QED_RSS_IND_TABLE_SIZE * sizeof(void *)); 2070 rss->rss_table_size_log = 7; 2071 return 0; 2072 } 2073 2074 /* Start by copying the non-spcific information to the 2nd copy */ 2075 memcpy(&rss[1], &rss[0], sizeof(struct qed_rss_params)); 2076 2077 /* CMT should be round-robin */ 2078 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { 2079 struct qed_queue_cid *cid = input->rss_ind_table[i]; 2080 struct qed_rss_params *t_rss; 2081 2082 if (cid->p_owner == QED_LEADING_HWFN(cdev)) 2083 t_rss = &rss[0]; 2084 else 2085 t_rss = &rss[1]; 2086 2087 t_rss->rss_ind_table[i / cdev->num_hwfns] = cid; 2088 } 2089 2090 /* Make sure RSS is actually required */ 2091 for_each_hwfn(cdev, fn) { 2092 for (i = 1; i < QED_RSS_IND_TABLE_SIZE / cdev->num_hwfns; i++) { 2093 if (rss[fn].rss_ind_table[i] != 2094 rss[fn].rss_ind_table[0]) 2095 break; 2096 } 2097 if (i == QED_RSS_IND_TABLE_SIZE / cdev->num_hwfns) { 2098 DP_VERBOSE(cdev, NETIF_MSG_IFUP, 2099 "CMT - 1 queue per-hwfn; Disabling RSS\n"); 2100 return -EINVAL; 2101 } 2102 rss[fn].rss_table_size_log = 6; 2103 } 2104 2105 return 0; 2106 } 2107 2108 static int qed_update_vport(struct qed_dev *cdev, 2109 struct qed_update_vport_params *params) 2110 { 2111 struct qed_sp_vport_update_params sp_params; 2112 struct qed_rss_params *rss; 2113 int rc = 0, i; 2114 2115 if (!cdev) 2116 return -ENODEV; 2117 2118 rss = vzalloc(sizeof(*rss) * cdev->num_hwfns); 2119 if (!rss) 2120 return -ENOMEM; 2121 2122 memset(&sp_params, 0, sizeof(sp_params)); 2123 2124 /* Translate protocol params into sp params */ 2125 sp_params.vport_id = params->vport_id; 2126 sp_params.update_vport_active_rx_flg = params->update_vport_active_flg; 2127 sp_params.update_vport_active_tx_flg = params->update_vport_active_flg; 2128 sp_params.vport_active_rx_flg = params->vport_active_flg; 2129 sp_params.vport_active_tx_flg = params->vport_active_flg; 2130 sp_params.update_tx_switching_flg = params->update_tx_switching_flg; 2131 sp_params.tx_switching_flg = params->tx_switching_flg; 2132 sp_params.accept_any_vlan = params->accept_any_vlan; 2133 sp_params.update_accept_any_vlan_flg = 2134 params->update_accept_any_vlan_flg; 2135 2136 /* Prepare the RSS configuration */ 2137 if (params->update_rss_flg) 2138 if (qed_update_vport_rss(cdev, ¶ms->rss_params, rss)) 2139 params->update_rss_flg = 0; 2140 2141 for_each_hwfn(cdev, i) { 2142 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 2143 2144 if (params->update_rss_flg) 2145 sp_params.rss_params = &rss[i]; 2146 2147 sp_params.opaque_fid = p_hwfn->hw_info.opaque_fid; 2148 rc = qed_sp_vport_update(p_hwfn, &sp_params, 2149 QED_SPQ_MODE_EBLOCK, 2150 NULL); 2151 if (rc) { 2152 DP_ERR(cdev, "Failed to update VPORT\n"); 2153 goto out; 2154 } 2155 2156 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP), 2157 "Updated V-PORT %d: active_flag %d [update %d]\n", 2158 params->vport_id, params->vport_active_flg, 2159 params->update_vport_active_flg); 2160 } 2161 2162 out: 2163 vfree(rss); 2164 return rc; 2165 } 2166 2167 static int qed_start_rxq(struct qed_dev *cdev, 2168 u8 rss_num, 2169 struct qed_queue_start_common_params *p_params, 2170 u16 bd_max_bytes, 2171 dma_addr_t bd_chain_phys_addr, 2172 dma_addr_t cqe_pbl_addr, 2173 u16 cqe_pbl_size, 2174 struct qed_rxq_start_ret_params *ret_params) 2175 { 2176 struct qed_hwfn *p_hwfn; 2177 int rc, hwfn_index; 2178 2179 hwfn_index = rss_num % cdev->num_hwfns; 2180 p_hwfn = &cdev->hwfns[hwfn_index]; 2181 2182 p_params->queue_id = p_params->queue_id / cdev->num_hwfns; 2183 p_params->stats_id = p_params->vport_id; 2184 2185 rc = qed_eth_rx_queue_start(p_hwfn, 2186 p_hwfn->hw_info.opaque_fid, 2187 p_params, 2188 bd_max_bytes, 2189 bd_chain_phys_addr, 2190 cqe_pbl_addr, cqe_pbl_size, ret_params); 2191 if (rc) { 2192 DP_ERR(cdev, "Failed to start RXQ#%d\n", p_params->queue_id); 2193 return rc; 2194 } 2195 2196 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP), 2197 "Started RX-Q %d [rss_num %d] on V-PORT %d and SB %d\n", 2198 p_params->queue_id, rss_num, p_params->vport_id, 2199 p_params->sb); 2200 2201 return 0; 2202 } 2203 2204 static int qed_stop_rxq(struct qed_dev *cdev, u8 rss_id, void *handle) 2205 { 2206 int rc, hwfn_index; 2207 struct qed_hwfn *p_hwfn; 2208 2209 hwfn_index = rss_id % cdev->num_hwfns; 2210 p_hwfn = &cdev->hwfns[hwfn_index]; 2211 2212 rc = qed_eth_rx_queue_stop(p_hwfn, handle, false, false); 2213 if (rc) { 2214 DP_ERR(cdev, "Failed to stop RXQ#%02x\n", rss_id); 2215 return rc; 2216 } 2217 2218 return 0; 2219 } 2220 2221 static int qed_start_txq(struct qed_dev *cdev, 2222 u8 rss_num, 2223 struct qed_queue_start_common_params *p_params, 2224 dma_addr_t pbl_addr, 2225 u16 pbl_size, 2226 struct qed_txq_start_ret_params *ret_params) 2227 { 2228 struct qed_hwfn *p_hwfn; 2229 int rc, hwfn_index; 2230 2231 hwfn_index = rss_num % cdev->num_hwfns; 2232 p_hwfn = &cdev->hwfns[hwfn_index]; 2233 p_params->queue_id = p_params->queue_id / cdev->num_hwfns; 2234 p_params->stats_id = p_params->vport_id; 2235 2236 rc = qed_eth_tx_queue_start(p_hwfn, 2237 p_hwfn->hw_info.opaque_fid, 2238 p_params, 0, 2239 pbl_addr, pbl_size, ret_params); 2240 2241 if (rc) { 2242 DP_ERR(cdev, "Failed to start TXQ#%d\n", p_params->queue_id); 2243 return rc; 2244 } 2245 2246 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP), 2247 "Started TX-Q %d [rss_num %d] on V-PORT %d and SB %d\n", 2248 p_params->queue_id, rss_num, p_params->vport_id, 2249 p_params->sb); 2250 2251 return 0; 2252 } 2253 2254 #define QED_HW_STOP_RETRY_LIMIT (10) 2255 static int qed_fastpath_stop(struct qed_dev *cdev) 2256 { 2257 int rc; 2258 2259 rc = qed_hw_stop_fastpath(cdev); 2260 if (rc) { 2261 DP_ERR(cdev, "Failed to stop Fastpath\n"); 2262 return rc; 2263 } 2264 2265 return 0; 2266 } 2267 2268 static int qed_stop_txq(struct qed_dev *cdev, u8 rss_id, void *handle) 2269 { 2270 struct qed_hwfn *p_hwfn; 2271 int rc, hwfn_index; 2272 2273 hwfn_index = rss_id % cdev->num_hwfns; 2274 p_hwfn = &cdev->hwfns[hwfn_index]; 2275 2276 rc = qed_eth_tx_queue_stop(p_hwfn, handle); 2277 if (rc) { 2278 DP_ERR(cdev, "Failed to stop TXQ#%02x\n", rss_id); 2279 return rc; 2280 } 2281 2282 return 0; 2283 } 2284 2285 static int qed_tunn_configure(struct qed_dev *cdev, 2286 struct qed_tunn_params *tunn_params) 2287 { 2288 struct qed_tunn_update_params tunn_info; 2289 int i, rc; 2290 2291 if (IS_VF(cdev)) 2292 return 0; 2293 2294 memset(&tunn_info, 0, sizeof(tunn_info)); 2295 if (tunn_params->update_vxlan_port == 1) { 2296 tunn_info.update_vxlan_udp_port = 1; 2297 tunn_info.vxlan_udp_port = tunn_params->vxlan_port; 2298 } 2299 2300 if (tunn_params->update_geneve_port == 1) { 2301 tunn_info.update_geneve_udp_port = 1; 2302 tunn_info.geneve_udp_port = tunn_params->geneve_port; 2303 } 2304 2305 for_each_hwfn(cdev, i) { 2306 struct qed_hwfn *hwfn = &cdev->hwfns[i]; 2307 2308 rc = qed_sp_pf_update_tunn_cfg(hwfn, &tunn_info, 2309 QED_SPQ_MODE_EBLOCK, NULL); 2310 2311 if (rc) 2312 return rc; 2313 } 2314 2315 return 0; 2316 } 2317 2318 static int qed_configure_filter_rx_mode(struct qed_dev *cdev, 2319 enum qed_filter_rx_mode_type type) 2320 { 2321 struct qed_filter_accept_flags accept_flags; 2322 2323 memset(&accept_flags, 0, sizeof(accept_flags)); 2324 2325 accept_flags.update_rx_mode_config = 1; 2326 accept_flags.update_tx_mode_config = 1; 2327 accept_flags.rx_accept_filter = QED_ACCEPT_UCAST_MATCHED | 2328 QED_ACCEPT_MCAST_MATCHED | 2329 QED_ACCEPT_BCAST; 2330 accept_flags.tx_accept_filter = QED_ACCEPT_UCAST_MATCHED | 2331 QED_ACCEPT_MCAST_MATCHED | 2332 QED_ACCEPT_BCAST; 2333 2334 if (type == QED_FILTER_RX_MODE_TYPE_PROMISC) { 2335 accept_flags.rx_accept_filter |= QED_ACCEPT_UCAST_UNMATCHED | 2336 QED_ACCEPT_MCAST_UNMATCHED; 2337 accept_flags.tx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED; 2338 } else if (type == QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC) { 2339 accept_flags.rx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED; 2340 accept_flags.tx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED; 2341 } 2342 2343 return qed_filter_accept_cmd(cdev, 0, accept_flags, false, false, 2344 QED_SPQ_MODE_CB, NULL); 2345 } 2346 2347 static int qed_configure_filter_ucast(struct qed_dev *cdev, 2348 struct qed_filter_ucast_params *params) 2349 { 2350 struct qed_filter_ucast ucast; 2351 2352 if (!params->vlan_valid && !params->mac_valid) { 2353 DP_NOTICE(cdev, 2354 "Tried configuring a unicast filter, but both MAC and VLAN are not set\n"); 2355 return -EINVAL; 2356 } 2357 2358 memset(&ucast, 0, sizeof(ucast)); 2359 switch (params->type) { 2360 case QED_FILTER_XCAST_TYPE_ADD: 2361 ucast.opcode = QED_FILTER_ADD; 2362 break; 2363 case QED_FILTER_XCAST_TYPE_DEL: 2364 ucast.opcode = QED_FILTER_REMOVE; 2365 break; 2366 case QED_FILTER_XCAST_TYPE_REPLACE: 2367 ucast.opcode = QED_FILTER_REPLACE; 2368 break; 2369 default: 2370 DP_NOTICE(cdev, "Unknown unicast filter type %d\n", 2371 params->type); 2372 } 2373 2374 if (params->vlan_valid && params->mac_valid) { 2375 ucast.type = QED_FILTER_MAC_VLAN; 2376 ether_addr_copy(ucast.mac, params->mac); 2377 ucast.vlan = params->vlan; 2378 } else if (params->mac_valid) { 2379 ucast.type = QED_FILTER_MAC; 2380 ether_addr_copy(ucast.mac, params->mac); 2381 } else { 2382 ucast.type = QED_FILTER_VLAN; 2383 ucast.vlan = params->vlan; 2384 } 2385 2386 ucast.is_rx_filter = true; 2387 ucast.is_tx_filter = true; 2388 2389 return qed_filter_ucast_cmd(cdev, &ucast, QED_SPQ_MODE_CB, NULL); 2390 } 2391 2392 static int qed_configure_filter_mcast(struct qed_dev *cdev, 2393 struct qed_filter_mcast_params *params) 2394 { 2395 struct qed_filter_mcast mcast; 2396 int i; 2397 2398 memset(&mcast, 0, sizeof(mcast)); 2399 switch (params->type) { 2400 case QED_FILTER_XCAST_TYPE_ADD: 2401 mcast.opcode = QED_FILTER_ADD; 2402 break; 2403 case QED_FILTER_XCAST_TYPE_DEL: 2404 mcast.opcode = QED_FILTER_REMOVE; 2405 break; 2406 default: 2407 DP_NOTICE(cdev, "Unknown multicast filter type %d\n", 2408 params->type); 2409 } 2410 2411 mcast.num_mc_addrs = params->num; 2412 for (i = 0; i < mcast.num_mc_addrs; i++) 2413 ether_addr_copy(mcast.mac[i], params->mac[i]); 2414 2415 return qed_filter_mcast_cmd(cdev, &mcast, QED_SPQ_MODE_CB, NULL); 2416 } 2417 2418 static int qed_configure_filter(struct qed_dev *cdev, 2419 struct qed_filter_params *params) 2420 { 2421 enum qed_filter_rx_mode_type accept_flags; 2422 2423 switch (params->type) { 2424 case QED_FILTER_TYPE_UCAST: 2425 return qed_configure_filter_ucast(cdev, ¶ms->filter.ucast); 2426 case QED_FILTER_TYPE_MCAST: 2427 return qed_configure_filter_mcast(cdev, ¶ms->filter.mcast); 2428 case QED_FILTER_TYPE_RX_MODE: 2429 accept_flags = params->filter.accept_flags; 2430 return qed_configure_filter_rx_mode(cdev, accept_flags); 2431 default: 2432 DP_NOTICE(cdev, "Unknown filter type %d\n", (int)params->type); 2433 return -EINVAL; 2434 } 2435 } 2436 2437 static int qed_configure_arfs_searcher(struct qed_dev *cdev, bool en_searcher) 2438 { 2439 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev); 2440 struct qed_arfs_config_params arfs_config_params; 2441 2442 memset(&arfs_config_params, 0, sizeof(arfs_config_params)); 2443 arfs_config_params.tcp = true; 2444 arfs_config_params.udp = true; 2445 arfs_config_params.ipv4 = true; 2446 arfs_config_params.ipv6 = true; 2447 arfs_config_params.arfs_enable = en_searcher; 2448 2449 qed_arfs_mode_configure(p_hwfn, p_hwfn->p_arfs_ptt, 2450 &arfs_config_params); 2451 return 0; 2452 } 2453 2454 static void 2455 qed_arfs_sp_response_handler(struct qed_hwfn *p_hwfn, 2456 void *cookie, union event_ring_data *data, 2457 u8 fw_return_code) 2458 { 2459 struct qed_common_cb_ops *op = p_hwfn->cdev->protocol_ops.common; 2460 void *dev = p_hwfn->cdev->ops_cookie; 2461 2462 op->arfs_filter_op(dev, cookie, fw_return_code); 2463 } 2464 2465 static int qed_ntuple_arfs_filter_config(struct qed_dev *cdev, void *cookie, 2466 dma_addr_t mapping, u16 length, 2467 u16 vport_id, u16 rx_queue_id, 2468 bool add_filter) 2469 { 2470 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev); 2471 struct qed_spq_comp_cb cb; 2472 int rc = -EINVAL; 2473 2474 cb.function = qed_arfs_sp_response_handler; 2475 cb.cookie = cookie; 2476 2477 rc = qed_configure_rfs_ntuple_filter(p_hwfn, p_hwfn->p_arfs_ptt, 2478 &cb, mapping, length, rx_queue_id, 2479 vport_id, add_filter); 2480 if (rc) 2481 DP_NOTICE(p_hwfn, 2482 "Failed to issue a-RFS filter configuration\n"); 2483 else 2484 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, 2485 "Successfully issued a-RFS filter configuration\n"); 2486 2487 return rc; 2488 } 2489 2490 static int qed_fp_cqe_completion(struct qed_dev *dev, 2491 u8 rss_id, struct eth_slow_path_rx_cqe *cqe) 2492 { 2493 return qed_eth_cqe_completion(&dev->hwfns[rss_id % dev->num_hwfns], 2494 cqe); 2495 } 2496 2497 #ifdef CONFIG_QED_SRIOV 2498 extern const struct qed_iov_hv_ops qed_iov_ops_pass; 2499 #endif 2500 2501 #ifdef CONFIG_DCB 2502 extern const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass; 2503 #endif 2504 2505 extern const struct qed_eth_ptp_ops qed_ptp_ops_pass; 2506 2507 static const struct qed_eth_ops qed_eth_ops_pass = { 2508 .common = &qed_common_ops_pass, 2509 #ifdef CONFIG_QED_SRIOV 2510 .iov = &qed_iov_ops_pass, 2511 #endif 2512 #ifdef CONFIG_DCB 2513 .dcb = &qed_dcbnl_ops_pass, 2514 #endif 2515 .ptp = &qed_ptp_ops_pass, 2516 .fill_dev_info = &qed_fill_eth_dev_info, 2517 .register_ops = &qed_register_eth_ops, 2518 .check_mac = &qed_check_mac, 2519 .vport_start = &qed_start_vport, 2520 .vport_stop = &qed_stop_vport, 2521 .vport_update = &qed_update_vport, 2522 .q_rx_start = &qed_start_rxq, 2523 .q_rx_stop = &qed_stop_rxq, 2524 .q_tx_start = &qed_start_txq, 2525 .q_tx_stop = &qed_stop_txq, 2526 .filter_config = &qed_configure_filter, 2527 .fastpath_stop = &qed_fastpath_stop, 2528 .eth_cqe_completion = &qed_fp_cqe_completion, 2529 .get_vport_stats = &qed_get_vport_stats, 2530 .tunn_config = &qed_tunn_configure, 2531 .ntuple_filter_config = &qed_ntuple_arfs_filter_config, 2532 .configure_arfs_searcher = &qed_configure_arfs_searcher, 2533 }; 2534 2535 const struct qed_eth_ops *qed_get_eth_ops(void) 2536 { 2537 return &qed_eth_ops_pass; 2538 } 2539 EXPORT_SYMBOL(qed_get_eth_ops); 2540 2541 void qed_put_eth_ops(void) 2542 { 2543 /* TODO - reference count for module? */ 2544 } 2545 EXPORT_SYMBOL(qed_put_eth_ops); 2546