1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <asm/param.h> 36 #include <linux/delay.h> 37 #include <linux/dma-mapping.h> 38 #include <linux/etherdevice.h> 39 #include <linux/interrupt.h> 40 #include <linux/kernel.h> 41 #include <linux/module.h> 42 #include <linux/pci.h> 43 #include <linux/slab.h> 44 #include <linux/stddef.h> 45 #include <linux/string.h> 46 #include <linux/version.h> 47 #include <linux/workqueue.h> 48 #include <linux/bitops.h> 49 #include <linux/bug.h> 50 #include <linux/vmalloc.h> 51 #include "qed.h" 52 #include <linux/qed/qed_chain.h> 53 #include "qed_cxt.h" 54 #include "qed_dev_api.h" 55 #include <linux/qed/qed_eth_if.h> 56 #include "qed_hsi.h" 57 #include "qed_hw.h" 58 #include "qed_int.h" 59 #include "qed_l2.h" 60 #include "qed_mcp.h" 61 #include "qed_reg_addr.h" 62 #include "qed_sp.h" 63 #include "qed_sriov.h" 64 65 66 #define QED_MAX_SGES_NUM 16 67 #define CRC32_POLY 0x1edc6f41 68 69 void qed_eth_queue_cid_release(struct qed_hwfn *p_hwfn, 70 struct qed_queue_cid *p_cid) 71 { 72 /* VFs' CIDs are 0-based in PF-view, and uninitialized on VF */ 73 if (!p_cid->is_vf && IS_PF(p_hwfn->cdev)) 74 qed_cxt_release_cid(p_hwfn, p_cid->cid); 75 vfree(p_cid); 76 } 77 78 /* The internal is only meant to be directly called by PFs initializeing CIDs 79 * for their VFs. 80 */ 81 struct qed_queue_cid * 82 _qed_eth_queue_to_cid(struct qed_hwfn *p_hwfn, 83 u16 opaque_fid, 84 u32 cid, 85 u8 vf_qid, 86 struct qed_queue_start_common_params *p_params) 87 { 88 bool b_is_same = (p_hwfn->hw_info.opaque_fid == opaque_fid); 89 struct qed_queue_cid *p_cid; 90 int rc; 91 92 p_cid = vmalloc(sizeof(*p_cid)); 93 if (!p_cid) 94 return NULL; 95 memset(p_cid, 0, sizeof(*p_cid)); 96 97 p_cid->opaque_fid = opaque_fid; 98 p_cid->cid = cid; 99 p_cid->vf_qid = vf_qid; 100 p_cid->rel = *p_params; 101 p_cid->p_owner = p_hwfn; 102 103 /* Don't try calculating the absolute indices for VFs */ 104 if (IS_VF(p_hwfn->cdev)) { 105 p_cid->abs = p_cid->rel; 106 goto out; 107 } 108 109 /* Calculate the engine-absolute indices of the resources. 110 * This would guarantee they're valid later on. 111 * In some cases [SBs] we already have the right values. 112 */ 113 rc = qed_fw_vport(p_hwfn, p_cid->rel.vport_id, &p_cid->abs.vport_id); 114 if (rc) 115 goto fail; 116 117 rc = qed_fw_l2_queue(p_hwfn, p_cid->rel.queue_id, &p_cid->abs.queue_id); 118 if (rc) 119 goto fail; 120 121 /* In case of a PF configuring its VF's queues, the stats-id is already 122 * absolute [since there's a single index that's suitable per-VF]. 123 */ 124 if (b_is_same) { 125 rc = qed_fw_vport(p_hwfn, p_cid->rel.stats_id, 126 &p_cid->abs.stats_id); 127 if (rc) 128 goto fail; 129 } else { 130 p_cid->abs.stats_id = p_cid->rel.stats_id; 131 } 132 133 /* SBs relevant information was already provided as absolute */ 134 p_cid->abs.sb = p_cid->rel.sb; 135 p_cid->abs.sb_idx = p_cid->rel.sb_idx; 136 137 /* This is tricky - we're actually interested in whehter this is a PF 138 * entry meant for the VF. 139 */ 140 if (!b_is_same) 141 p_cid->is_vf = true; 142 out: 143 DP_VERBOSE(p_hwfn, 144 QED_MSG_SP, 145 "opaque_fid: %04x CID %08x vport %02x [%02x] qzone %04x [%04x] stats %02x [%02x] SB %04x PI %02x\n", 146 p_cid->opaque_fid, 147 p_cid->cid, 148 p_cid->rel.vport_id, 149 p_cid->abs.vport_id, 150 p_cid->rel.queue_id, 151 p_cid->abs.queue_id, 152 p_cid->rel.stats_id, 153 p_cid->abs.stats_id, p_cid->abs.sb, p_cid->abs.sb_idx); 154 155 return p_cid; 156 157 fail: 158 vfree(p_cid); 159 return NULL; 160 } 161 162 static struct qed_queue_cid *qed_eth_queue_to_cid(struct qed_hwfn *p_hwfn, 163 u16 opaque_fid, struct 164 qed_queue_start_common_params 165 *p_params) 166 { 167 struct qed_queue_cid *p_cid; 168 u32 cid = 0; 169 170 /* Get a unique firmware CID for this queue, in case it's a PF. 171 * VF's don't need a CID as the queue configuration will be done 172 * by PF. 173 */ 174 if (IS_PF(p_hwfn->cdev)) { 175 if (qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_ETH, &cid)) { 176 DP_NOTICE(p_hwfn, "Failed to acquire cid\n"); 177 return NULL; 178 } 179 } 180 181 p_cid = _qed_eth_queue_to_cid(p_hwfn, opaque_fid, cid, 0, p_params); 182 if (!p_cid && IS_PF(p_hwfn->cdev)) 183 qed_cxt_release_cid(p_hwfn, cid); 184 185 return p_cid; 186 } 187 188 int qed_sp_eth_vport_start(struct qed_hwfn *p_hwfn, 189 struct qed_sp_vport_start_params *p_params) 190 { 191 struct vport_start_ramrod_data *p_ramrod = NULL; 192 struct qed_spq_entry *p_ent = NULL; 193 struct qed_sp_init_data init_data; 194 u8 abs_vport_id = 0; 195 int rc = -EINVAL; 196 u16 rx_mode = 0; 197 198 rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id); 199 if (rc) 200 return rc; 201 202 memset(&init_data, 0, sizeof(init_data)); 203 init_data.cid = qed_spq_get_cid(p_hwfn); 204 init_data.opaque_fid = p_params->opaque_fid; 205 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 206 207 rc = qed_sp_init_request(p_hwfn, &p_ent, 208 ETH_RAMROD_VPORT_START, 209 PROTOCOLID_ETH, &init_data); 210 if (rc) 211 return rc; 212 213 p_ramrod = &p_ent->ramrod.vport_start; 214 p_ramrod->vport_id = abs_vport_id; 215 216 p_ramrod->mtu = cpu_to_le16(p_params->mtu); 217 p_ramrod->handle_ptp_pkts = p_params->handle_ptp_pkts; 218 p_ramrod->inner_vlan_removal_en = p_params->remove_inner_vlan; 219 p_ramrod->drop_ttl0_en = p_params->drop_ttl0; 220 p_ramrod->untagged = p_params->only_untagged; 221 222 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 1); 223 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 1); 224 225 p_ramrod->rx_mode.state = cpu_to_le16(rx_mode); 226 227 /* TPA related fields */ 228 memset(&p_ramrod->tpa_param, 0, sizeof(struct eth_vport_tpa_param)); 229 230 p_ramrod->tpa_param.max_buff_num = p_params->max_buffers_per_cqe; 231 232 switch (p_params->tpa_mode) { 233 case QED_TPA_MODE_GRO: 234 p_ramrod->tpa_param.tpa_max_aggs_num = ETH_TPA_MAX_AGGS_NUM; 235 p_ramrod->tpa_param.tpa_max_size = (u16)-1; 236 p_ramrod->tpa_param.tpa_min_size_to_cont = p_params->mtu / 2; 237 p_ramrod->tpa_param.tpa_min_size_to_start = p_params->mtu / 2; 238 p_ramrod->tpa_param.tpa_ipv4_en_flg = 1; 239 p_ramrod->tpa_param.tpa_ipv6_en_flg = 1; 240 p_ramrod->tpa_param.tpa_pkt_split_flg = 1; 241 p_ramrod->tpa_param.tpa_gro_consistent_flg = 1; 242 break; 243 default: 244 break; 245 } 246 247 p_ramrod->tx_switching_en = p_params->tx_switching; 248 249 p_ramrod->ctl_frame_mac_check_en = !!p_params->check_mac; 250 p_ramrod->ctl_frame_ethtype_check_en = !!p_params->check_ethtype; 251 252 /* Software Function ID in hwfn (PFs are 0 - 15, VFs are 16 - 135) */ 253 p_ramrod->sw_fid = qed_concrete_to_sw_fid(p_hwfn->cdev, 254 p_params->concrete_fid); 255 256 return qed_spq_post(p_hwfn, p_ent, NULL); 257 } 258 259 static int qed_sp_vport_start(struct qed_hwfn *p_hwfn, 260 struct qed_sp_vport_start_params *p_params) 261 { 262 if (IS_VF(p_hwfn->cdev)) { 263 return qed_vf_pf_vport_start(p_hwfn, p_params->vport_id, 264 p_params->mtu, 265 p_params->remove_inner_vlan, 266 p_params->tpa_mode, 267 p_params->max_buffers_per_cqe, 268 p_params->only_untagged); 269 } 270 271 return qed_sp_eth_vport_start(p_hwfn, p_params); 272 } 273 274 static int 275 qed_sp_vport_update_rss(struct qed_hwfn *p_hwfn, 276 struct vport_update_ramrod_data *p_ramrod, 277 struct qed_rss_params *p_rss) 278 { 279 struct eth_vport_rss_config *p_config; 280 u16 capabilities = 0; 281 int i, table_size; 282 int rc = 0; 283 284 if (!p_rss) { 285 p_ramrod->common.update_rss_flg = 0; 286 return rc; 287 } 288 p_config = &p_ramrod->rss_config; 289 290 BUILD_BUG_ON(QED_RSS_IND_TABLE_SIZE != ETH_RSS_IND_TABLE_ENTRIES_NUM); 291 292 rc = qed_fw_rss_eng(p_hwfn, p_rss->rss_eng_id, &p_config->rss_id); 293 if (rc) 294 return rc; 295 296 p_ramrod->common.update_rss_flg = p_rss->update_rss_config; 297 p_config->update_rss_capabilities = p_rss->update_rss_capabilities; 298 p_config->update_rss_ind_table = p_rss->update_rss_ind_table; 299 p_config->update_rss_key = p_rss->update_rss_key; 300 301 p_config->rss_mode = p_rss->rss_enable ? 302 ETH_VPORT_RSS_MODE_REGULAR : 303 ETH_VPORT_RSS_MODE_DISABLED; 304 305 SET_FIELD(capabilities, 306 ETH_VPORT_RSS_CONFIG_IPV4_CAPABILITY, 307 !!(p_rss->rss_caps & QED_RSS_IPV4)); 308 SET_FIELD(capabilities, 309 ETH_VPORT_RSS_CONFIG_IPV6_CAPABILITY, 310 !!(p_rss->rss_caps & QED_RSS_IPV6)); 311 SET_FIELD(capabilities, 312 ETH_VPORT_RSS_CONFIG_IPV4_TCP_CAPABILITY, 313 !!(p_rss->rss_caps & QED_RSS_IPV4_TCP)); 314 SET_FIELD(capabilities, 315 ETH_VPORT_RSS_CONFIG_IPV6_TCP_CAPABILITY, 316 !!(p_rss->rss_caps & QED_RSS_IPV6_TCP)); 317 SET_FIELD(capabilities, 318 ETH_VPORT_RSS_CONFIG_IPV4_UDP_CAPABILITY, 319 !!(p_rss->rss_caps & QED_RSS_IPV4_UDP)); 320 SET_FIELD(capabilities, 321 ETH_VPORT_RSS_CONFIG_IPV6_UDP_CAPABILITY, 322 !!(p_rss->rss_caps & QED_RSS_IPV6_UDP)); 323 p_config->tbl_size = p_rss->rss_table_size_log; 324 325 p_config->capabilities = cpu_to_le16(capabilities); 326 327 DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP, 328 "update rss flag %d, rss_mode = %d, update_caps = %d, capabilities = %d, update_ind = %d, update_rss_key = %d\n", 329 p_ramrod->common.update_rss_flg, 330 p_config->rss_mode, 331 p_config->update_rss_capabilities, 332 p_config->capabilities, 333 p_config->update_rss_ind_table, p_config->update_rss_key); 334 335 table_size = min_t(int, QED_RSS_IND_TABLE_SIZE, 336 1 << p_config->tbl_size); 337 for (i = 0; i < table_size; i++) { 338 struct qed_queue_cid *p_queue = p_rss->rss_ind_table[i]; 339 340 if (!p_queue) 341 return -EINVAL; 342 343 p_config->indirection_table[i] = 344 cpu_to_le16(p_queue->abs.queue_id); 345 } 346 347 DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP, 348 "Configured RSS indirection table [%d entries]:\n", 349 table_size); 350 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i += 0x10) { 351 DP_VERBOSE(p_hwfn, 352 NETIF_MSG_IFUP, 353 "%04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x\n", 354 le16_to_cpu(p_config->indirection_table[i]), 355 le16_to_cpu(p_config->indirection_table[i + 1]), 356 le16_to_cpu(p_config->indirection_table[i + 2]), 357 le16_to_cpu(p_config->indirection_table[i + 3]), 358 le16_to_cpu(p_config->indirection_table[i + 4]), 359 le16_to_cpu(p_config->indirection_table[i + 5]), 360 le16_to_cpu(p_config->indirection_table[i + 6]), 361 le16_to_cpu(p_config->indirection_table[i + 7]), 362 le16_to_cpu(p_config->indirection_table[i + 8]), 363 le16_to_cpu(p_config->indirection_table[i + 9]), 364 le16_to_cpu(p_config->indirection_table[i + 10]), 365 le16_to_cpu(p_config->indirection_table[i + 11]), 366 le16_to_cpu(p_config->indirection_table[i + 12]), 367 le16_to_cpu(p_config->indirection_table[i + 13]), 368 le16_to_cpu(p_config->indirection_table[i + 14]), 369 le16_to_cpu(p_config->indirection_table[i + 15])); 370 } 371 372 for (i = 0; i < 10; i++) 373 p_config->rss_key[i] = cpu_to_le32(p_rss->rss_key[i]); 374 375 return rc; 376 } 377 378 static void 379 qed_sp_update_accept_mode(struct qed_hwfn *p_hwfn, 380 struct vport_update_ramrod_data *p_ramrod, 381 struct qed_filter_accept_flags accept_flags) 382 { 383 p_ramrod->common.update_rx_mode_flg = 384 accept_flags.update_rx_mode_config; 385 386 p_ramrod->common.update_tx_mode_flg = 387 accept_flags.update_tx_mode_config; 388 389 /* Set Rx mode accept flags */ 390 if (p_ramrod->common.update_rx_mode_flg) { 391 u8 accept_filter = accept_flags.rx_accept_filter; 392 u16 state = 0; 393 394 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 395 !(!!(accept_filter & QED_ACCEPT_UCAST_MATCHED) || 396 !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED))); 397 398 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_ACCEPT_UNMATCHED, 399 !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED)); 400 401 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 402 !(!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) || 403 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED))); 404 405 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_ACCEPT_ALL, 406 (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) && 407 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED))); 408 409 SET_FIELD(state, ETH_VPORT_RX_MODE_BCAST_ACCEPT_ALL, 410 !!(accept_filter & QED_ACCEPT_BCAST)); 411 412 p_ramrod->rx_mode.state = cpu_to_le16(state); 413 DP_VERBOSE(p_hwfn, QED_MSG_SP, 414 "p_ramrod->rx_mode.state = 0x%x\n", state); 415 } 416 417 /* Set Tx mode accept flags */ 418 if (p_ramrod->common.update_tx_mode_flg) { 419 u8 accept_filter = accept_flags.tx_accept_filter; 420 u16 state = 0; 421 422 SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_DROP_ALL, 423 !!(accept_filter & QED_ACCEPT_NONE)); 424 425 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_DROP_ALL, 426 !!(accept_filter & QED_ACCEPT_NONE)); 427 428 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_ACCEPT_ALL, 429 (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) && 430 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED))); 431 432 SET_FIELD(state, ETH_VPORT_TX_MODE_BCAST_ACCEPT_ALL, 433 !!(accept_filter & QED_ACCEPT_BCAST)); 434 435 p_ramrod->tx_mode.state = cpu_to_le16(state); 436 DP_VERBOSE(p_hwfn, QED_MSG_SP, 437 "p_ramrod->tx_mode.state = 0x%x\n", state); 438 } 439 } 440 441 static void 442 qed_sp_vport_update_sge_tpa(struct qed_hwfn *p_hwfn, 443 struct vport_update_ramrod_data *p_ramrod, 444 struct qed_sge_tpa_params *p_params) 445 { 446 struct eth_vport_tpa_param *p_tpa; 447 448 if (!p_params) { 449 p_ramrod->common.update_tpa_param_flg = 0; 450 p_ramrod->common.update_tpa_en_flg = 0; 451 p_ramrod->common.update_tpa_param_flg = 0; 452 return; 453 } 454 455 p_ramrod->common.update_tpa_en_flg = p_params->update_tpa_en_flg; 456 p_tpa = &p_ramrod->tpa_param; 457 p_tpa->tpa_ipv4_en_flg = p_params->tpa_ipv4_en_flg; 458 p_tpa->tpa_ipv6_en_flg = p_params->tpa_ipv6_en_flg; 459 p_tpa->tpa_ipv4_tunn_en_flg = p_params->tpa_ipv4_tunn_en_flg; 460 p_tpa->tpa_ipv6_tunn_en_flg = p_params->tpa_ipv6_tunn_en_flg; 461 462 p_ramrod->common.update_tpa_param_flg = p_params->update_tpa_param_flg; 463 p_tpa->max_buff_num = p_params->max_buffers_per_cqe; 464 p_tpa->tpa_pkt_split_flg = p_params->tpa_pkt_split_flg; 465 p_tpa->tpa_hdr_data_split_flg = p_params->tpa_hdr_data_split_flg; 466 p_tpa->tpa_gro_consistent_flg = p_params->tpa_gro_consistent_flg; 467 p_tpa->tpa_max_aggs_num = p_params->tpa_max_aggs_num; 468 p_tpa->tpa_max_size = p_params->tpa_max_size; 469 p_tpa->tpa_min_size_to_start = p_params->tpa_min_size_to_start; 470 p_tpa->tpa_min_size_to_cont = p_params->tpa_min_size_to_cont; 471 } 472 473 static void 474 qed_sp_update_mcast_bin(struct qed_hwfn *p_hwfn, 475 struct vport_update_ramrod_data *p_ramrod, 476 struct qed_sp_vport_update_params *p_params) 477 { 478 int i; 479 480 memset(&p_ramrod->approx_mcast.bins, 0, 481 sizeof(p_ramrod->approx_mcast.bins)); 482 483 if (!p_params->update_approx_mcast_flg) 484 return; 485 486 p_ramrod->common.update_approx_mcast_flg = 1; 487 for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) { 488 u32 *p_bins = (u32 *)p_params->bins; 489 490 p_ramrod->approx_mcast.bins[i] = cpu_to_le32(p_bins[i]); 491 } 492 } 493 494 int qed_sp_vport_update(struct qed_hwfn *p_hwfn, 495 struct qed_sp_vport_update_params *p_params, 496 enum spq_mode comp_mode, 497 struct qed_spq_comp_cb *p_comp_data) 498 { 499 struct qed_rss_params *p_rss_params = p_params->rss_params; 500 struct vport_update_ramrod_data_cmn *p_cmn; 501 struct qed_sp_init_data init_data; 502 struct vport_update_ramrod_data *p_ramrod = NULL; 503 struct qed_spq_entry *p_ent = NULL; 504 u8 abs_vport_id = 0, val; 505 int rc = -EINVAL; 506 507 if (IS_VF(p_hwfn->cdev)) { 508 rc = qed_vf_pf_vport_update(p_hwfn, p_params); 509 return rc; 510 } 511 512 rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id); 513 if (rc) 514 return rc; 515 516 memset(&init_data, 0, sizeof(init_data)); 517 init_data.cid = qed_spq_get_cid(p_hwfn); 518 init_data.opaque_fid = p_params->opaque_fid; 519 init_data.comp_mode = comp_mode; 520 init_data.p_comp_data = p_comp_data; 521 522 rc = qed_sp_init_request(p_hwfn, &p_ent, 523 ETH_RAMROD_VPORT_UPDATE, 524 PROTOCOLID_ETH, &init_data); 525 if (rc) 526 return rc; 527 528 /* Copy input params to ramrod according to FW struct */ 529 p_ramrod = &p_ent->ramrod.vport_update; 530 p_cmn = &p_ramrod->common; 531 532 p_cmn->vport_id = abs_vport_id; 533 p_cmn->rx_active_flg = p_params->vport_active_rx_flg; 534 p_cmn->update_rx_active_flg = p_params->update_vport_active_rx_flg; 535 p_cmn->tx_active_flg = p_params->vport_active_tx_flg; 536 p_cmn->update_tx_active_flg = p_params->update_vport_active_tx_flg; 537 p_cmn->accept_any_vlan = p_params->accept_any_vlan; 538 val = p_params->update_accept_any_vlan_flg; 539 p_cmn->update_accept_any_vlan_flg = val; 540 541 p_cmn->inner_vlan_removal_en = p_params->inner_vlan_removal_flg; 542 val = p_params->update_inner_vlan_removal_flg; 543 p_cmn->update_inner_vlan_removal_en_flg = val; 544 545 p_cmn->default_vlan_en = p_params->default_vlan_enable_flg; 546 val = p_params->update_default_vlan_enable_flg; 547 p_cmn->update_default_vlan_en_flg = val; 548 549 p_cmn->default_vlan = cpu_to_le16(p_params->default_vlan); 550 p_cmn->update_default_vlan_flg = p_params->update_default_vlan_flg; 551 552 p_cmn->silent_vlan_removal_en = p_params->silent_vlan_removal_flg; 553 554 p_ramrod->common.tx_switching_en = p_params->tx_switching_flg; 555 p_cmn->update_tx_switching_en_flg = p_params->update_tx_switching_flg; 556 557 p_cmn->anti_spoofing_en = p_params->anti_spoofing_en; 558 val = p_params->update_anti_spoofing_en_flg; 559 p_ramrod->common.update_anti_spoofing_en_flg = val; 560 561 rc = qed_sp_vport_update_rss(p_hwfn, p_ramrod, p_rss_params); 562 if (rc) { 563 /* Return spq entry which is taken in qed_sp_init_request()*/ 564 qed_spq_return_entry(p_hwfn, p_ent); 565 return rc; 566 } 567 568 /* Update mcast bins for VFs, PF doesn't use this functionality */ 569 qed_sp_update_mcast_bin(p_hwfn, p_ramrod, p_params); 570 571 qed_sp_update_accept_mode(p_hwfn, p_ramrod, p_params->accept_flags); 572 qed_sp_vport_update_sge_tpa(p_hwfn, p_ramrod, p_params->sge_tpa_params); 573 return qed_spq_post(p_hwfn, p_ent, NULL); 574 } 575 576 int qed_sp_vport_stop(struct qed_hwfn *p_hwfn, u16 opaque_fid, u8 vport_id) 577 { 578 struct vport_stop_ramrod_data *p_ramrod; 579 struct qed_sp_init_data init_data; 580 struct qed_spq_entry *p_ent; 581 u8 abs_vport_id = 0; 582 int rc; 583 584 if (IS_VF(p_hwfn->cdev)) 585 return qed_vf_pf_vport_stop(p_hwfn); 586 587 rc = qed_fw_vport(p_hwfn, vport_id, &abs_vport_id); 588 if (rc) 589 return rc; 590 591 memset(&init_data, 0, sizeof(init_data)); 592 init_data.cid = qed_spq_get_cid(p_hwfn); 593 init_data.opaque_fid = opaque_fid; 594 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 595 596 rc = qed_sp_init_request(p_hwfn, &p_ent, 597 ETH_RAMROD_VPORT_STOP, 598 PROTOCOLID_ETH, &init_data); 599 if (rc) 600 return rc; 601 602 p_ramrod = &p_ent->ramrod.vport_stop; 603 p_ramrod->vport_id = abs_vport_id; 604 605 return qed_spq_post(p_hwfn, p_ent, NULL); 606 } 607 608 static int 609 qed_vf_pf_accept_flags(struct qed_hwfn *p_hwfn, 610 struct qed_filter_accept_flags *p_accept_flags) 611 { 612 struct qed_sp_vport_update_params s_params; 613 614 memset(&s_params, 0, sizeof(s_params)); 615 memcpy(&s_params.accept_flags, p_accept_flags, 616 sizeof(struct qed_filter_accept_flags)); 617 618 return qed_vf_pf_vport_update(p_hwfn, &s_params); 619 } 620 621 static int qed_filter_accept_cmd(struct qed_dev *cdev, 622 u8 vport, 623 struct qed_filter_accept_flags accept_flags, 624 u8 update_accept_any_vlan, 625 u8 accept_any_vlan, 626 enum spq_mode comp_mode, 627 struct qed_spq_comp_cb *p_comp_data) 628 { 629 struct qed_sp_vport_update_params vport_update_params; 630 int i, rc; 631 632 /* Prepare and send the vport rx_mode change */ 633 memset(&vport_update_params, 0, sizeof(vport_update_params)); 634 vport_update_params.vport_id = vport; 635 vport_update_params.accept_flags = accept_flags; 636 vport_update_params.update_accept_any_vlan_flg = update_accept_any_vlan; 637 vport_update_params.accept_any_vlan = accept_any_vlan; 638 639 for_each_hwfn(cdev, i) { 640 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 641 642 vport_update_params.opaque_fid = p_hwfn->hw_info.opaque_fid; 643 644 if (IS_VF(cdev)) { 645 rc = qed_vf_pf_accept_flags(p_hwfn, &accept_flags); 646 if (rc) 647 return rc; 648 continue; 649 } 650 651 rc = qed_sp_vport_update(p_hwfn, &vport_update_params, 652 comp_mode, p_comp_data); 653 if (rc) { 654 DP_ERR(cdev, "Update rx_mode failed %d\n", rc); 655 return rc; 656 } 657 658 DP_VERBOSE(p_hwfn, QED_MSG_SP, 659 "Accept filter configured, flags = [Rx]%x [Tx]%x\n", 660 accept_flags.rx_accept_filter, 661 accept_flags.tx_accept_filter); 662 if (update_accept_any_vlan) 663 DP_VERBOSE(p_hwfn, QED_MSG_SP, 664 "accept_any_vlan=%d configured\n", 665 accept_any_vlan); 666 } 667 668 return 0; 669 } 670 671 int qed_eth_rxq_start_ramrod(struct qed_hwfn *p_hwfn, 672 struct qed_queue_cid *p_cid, 673 u16 bd_max_bytes, 674 dma_addr_t bd_chain_phys_addr, 675 dma_addr_t cqe_pbl_addr, u16 cqe_pbl_size) 676 { 677 struct rx_queue_start_ramrod_data *p_ramrod = NULL; 678 struct qed_spq_entry *p_ent = NULL; 679 struct qed_sp_init_data init_data; 680 int rc = -EINVAL; 681 682 DP_VERBOSE(p_hwfn, QED_MSG_SP, 683 "opaque_fid=0x%x, cid=0x%x, rx_qzone=0x%x, vport_id=0x%x, sb_id=0x%x\n", 684 p_cid->opaque_fid, p_cid->cid, 685 p_cid->abs.queue_id, p_cid->abs.vport_id, p_cid->abs.sb); 686 687 /* Get SPQ entry */ 688 memset(&init_data, 0, sizeof(init_data)); 689 init_data.cid = p_cid->cid; 690 init_data.opaque_fid = p_cid->opaque_fid; 691 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 692 693 rc = qed_sp_init_request(p_hwfn, &p_ent, 694 ETH_RAMROD_RX_QUEUE_START, 695 PROTOCOLID_ETH, &init_data); 696 if (rc) 697 return rc; 698 699 p_ramrod = &p_ent->ramrod.rx_queue_start; 700 701 p_ramrod->sb_id = cpu_to_le16(p_cid->abs.sb); 702 p_ramrod->sb_index = p_cid->abs.sb_idx; 703 p_ramrod->vport_id = p_cid->abs.vport_id; 704 p_ramrod->stats_counter_id = p_cid->abs.stats_id; 705 p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id); 706 p_ramrod->complete_cqe_flg = 0; 707 p_ramrod->complete_event_flg = 1; 708 709 p_ramrod->bd_max_bytes = cpu_to_le16(bd_max_bytes); 710 DMA_REGPAIR_LE(p_ramrod->bd_base, bd_chain_phys_addr); 711 712 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size); 713 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, cqe_pbl_addr); 714 715 if (p_cid->is_vf) { 716 p_ramrod->vf_rx_prod_index = p_cid->vf_qid; 717 DP_VERBOSE(p_hwfn, QED_MSG_SP, 718 "Queue%s is meant for VF rxq[%02x]\n", 719 !!p_cid->b_legacy_vf ? " [legacy]" : "", 720 p_cid->vf_qid); 721 p_ramrod->vf_rx_prod_use_zone_a = !!p_cid->b_legacy_vf; 722 } 723 724 return qed_spq_post(p_hwfn, p_ent, NULL); 725 } 726 727 static int 728 qed_eth_pf_rx_queue_start(struct qed_hwfn *p_hwfn, 729 struct qed_queue_cid *p_cid, 730 u16 bd_max_bytes, 731 dma_addr_t bd_chain_phys_addr, 732 dma_addr_t cqe_pbl_addr, 733 u16 cqe_pbl_size, void __iomem **pp_prod) 734 { 735 u32 init_prod_val = 0; 736 737 *pp_prod = p_hwfn->regview + 738 GTT_BAR0_MAP_REG_MSDM_RAM + 739 MSTORM_ETH_PF_PRODS_OFFSET(p_cid->abs.queue_id); 740 741 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */ 742 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32), 743 (u32 *)(&init_prod_val)); 744 745 return qed_eth_rxq_start_ramrod(p_hwfn, p_cid, 746 bd_max_bytes, 747 bd_chain_phys_addr, 748 cqe_pbl_addr, cqe_pbl_size); 749 } 750 751 static int 752 qed_eth_rx_queue_start(struct qed_hwfn *p_hwfn, 753 u16 opaque_fid, 754 struct qed_queue_start_common_params *p_params, 755 u16 bd_max_bytes, 756 dma_addr_t bd_chain_phys_addr, 757 dma_addr_t cqe_pbl_addr, 758 u16 cqe_pbl_size, 759 struct qed_rxq_start_ret_params *p_ret_params) 760 { 761 struct qed_queue_cid *p_cid; 762 int rc; 763 764 /* Allocate a CID for the queue */ 765 p_cid = qed_eth_queue_to_cid(p_hwfn, opaque_fid, p_params); 766 if (!p_cid) 767 return -ENOMEM; 768 769 if (IS_PF(p_hwfn->cdev)) { 770 rc = qed_eth_pf_rx_queue_start(p_hwfn, p_cid, 771 bd_max_bytes, 772 bd_chain_phys_addr, 773 cqe_pbl_addr, cqe_pbl_size, 774 &p_ret_params->p_prod); 775 } else { 776 rc = qed_vf_pf_rxq_start(p_hwfn, p_cid, 777 bd_max_bytes, 778 bd_chain_phys_addr, 779 cqe_pbl_addr, 780 cqe_pbl_size, &p_ret_params->p_prod); 781 } 782 783 /* Provide the caller with a reference to as handler */ 784 if (rc) 785 qed_eth_queue_cid_release(p_hwfn, p_cid); 786 else 787 p_ret_params->p_handle = (void *)p_cid; 788 789 return rc; 790 } 791 792 int qed_sp_eth_rx_queues_update(struct qed_hwfn *p_hwfn, 793 void **pp_rxq_handles, 794 u8 num_rxqs, 795 u8 complete_cqe_flg, 796 u8 complete_event_flg, 797 enum spq_mode comp_mode, 798 struct qed_spq_comp_cb *p_comp_data) 799 { 800 struct rx_queue_update_ramrod_data *p_ramrod = NULL; 801 struct qed_spq_entry *p_ent = NULL; 802 struct qed_sp_init_data init_data; 803 struct qed_queue_cid *p_cid; 804 int rc = -EINVAL; 805 u8 i; 806 807 memset(&init_data, 0, sizeof(init_data)); 808 init_data.comp_mode = comp_mode; 809 init_data.p_comp_data = p_comp_data; 810 811 for (i = 0; i < num_rxqs; i++) { 812 p_cid = ((struct qed_queue_cid **)pp_rxq_handles)[i]; 813 814 /* Get SPQ entry */ 815 init_data.cid = p_cid->cid; 816 init_data.opaque_fid = p_cid->opaque_fid; 817 818 rc = qed_sp_init_request(p_hwfn, &p_ent, 819 ETH_RAMROD_RX_QUEUE_UPDATE, 820 PROTOCOLID_ETH, &init_data); 821 if (rc) 822 return rc; 823 824 p_ramrod = &p_ent->ramrod.rx_queue_update; 825 p_ramrod->vport_id = p_cid->abs.vport_id; 826 827 p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id); 828 p_ramrod->complete_cqe_flg = complete_cqe_flg; 829 p_ramrod->complete_event_flg = complete_event_flg; 830 831 rc = qed_spq_post(p_hwfn, p_ent, NULL); 832 if (rc) 833 return rc; 834 } 835 836 return rc; 837 } 838 839 static int 840 qed_eth_pf_rx_queue_stop(struct qed_hwfn *p_hwfn, 841 struct qed_queue_cid *p_cid, 842 bool b_eq_completion_only, bool b_cqe_completion) 843 { 844 struct rx_queue_stop_ramrod_data *p_ramrod = NULL; 845 struct qed_spq_entry *p_ent = NULL; 846 struct qed_sp_init_data init_data; 847 int rc; 848 849 memset(&init_data, 0, sizeof(init_data)); 850 init_data.cid = p_cid->cid; 851 init_data.opaque_fid = p_cid->opaque_fid; 852 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 853 854 rc = qed_sp_init_request(p_hwfn, &p_ent, 855 ETH_RAMROD_RX_QUEUE_STOP, 856 PROTOCOLID_ETH, &init_data); 857 if (rc) 858 return rc; 859 860 p_ramrod = &p_ent->ramrod.rx_queue_stop; 861 p_ramrod->vport_id = p_cid->abs.vport_id; 862 p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id); 863 864 /* Cleaning the queue requires the completion to arrive there. 865 * In addition, VFs require the answer to come as eqe to PF. 866 */ 867 p_ramrod->complete_cqe_flg = (!p_cid->is_vf && 868 !b_eq_completion_only) || 869 b_cqe_completion; 870 p_ramrod->complete_event_flg = p_cid->is_vf || b_eq_completion_only; 871 872 return qed_spq_post(p_hwfn, p_ent, NULL); 873 } 874 875 int qed_eth_rx_queue_stop(struct qed_hwfn *p_hwfn, 876 void *p_rxq, 877 bool eq_completion_only, bool cqe_completion) 878 { 879 struct qed_queue_cid *p_cid = (struct qed_queue_cid *)p_rxq; 880 int rc = -EINVAL; 881 882 if (IS_PF(p_hwfn->cdev)) 883 rc = qed_eth_pf_rx_queue_stop(p_hwfn, p_cid, 884 eq_completion_only, 885 cqe_completion); 886 else 887 rc = qed_vf_pf_rxq_stop(p_hwfn, p_cid, cqe_completion); 888 889 if (!rc) 890 qed_eth_queue_cid_release(p_hwfn, p_cid); 891 return rc; 892 } 893 894 int 895 qed_eth_txq_start_ramrod(struct qed_hwfn *p_hwfn, 896 struct qed_queue_cid *p_cid, 897 dma_addr_t pbl_addr, u16 pbl_size, u16 pq_id) 898 { 899 struct tx_queue_start_ramrod_data *p_ramrod = NULL; 900 struct qed_spq_entry *p_ent = NULL; 901 struct qed_sp_init_data init_data; 902 int rc = -EINVAL; 903 904 /* Get SPQ entry */ 905 memset(&init_data, 0, sizeof(init_data)); 906 init_data.cid = p_cid->cid; 907 init_data.opaque_fid = p_cid->opaque_fid; 908 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 909 910 rc = qed_sp_init_request(p_hwfn, &p_ent, 911 ETH_RAMROD_TX_QUEUE_START, 912 PROTOCOLID_ETH, &init_data); 913 if (rc) 914 return rc; 915 916 p_ramrod = &p_ent->ramrod.tx_queue_start; 917 p_ramrod->vport_id = p_cid->abs.vport_id; 918 919 p_ramrod->sb_id = cpu_to_le16(p_cid->abs.sb); 920 p_ramrod->sb_index = p_cid->abs.sb_idx; 921 p_ramrod->stats_counter_id = p_cid->abs.stats_id; 922 923 p_ramrod->queue_zone_id = cpu_to_le16(p_cid->abs.queue_id); 924 p_ramrod->same_as_last_id = cpu_to_le16(p_cid->abs.queue_id); 925 926 p_ramrod->pbl_size = cpu_to_le16(pbl_size); 927 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, pbl_addr); 928 929 p_ramrod->qm_pq_id = cpu_to_le16(pq_id); 930 931 return qed_spq_post(p_hwfn, p_ent, NULL); 932 } 933 934 static int 935 qed_eth_pf_tx_queue_start(struct qed_hwfn *p_hwfn, 936 struct qed_queue_cid *p_cid, 937 u8 tc, 938 dma_addr_t pbl_addr, 939 u16 pbl_size, void __iomem **pp_doorbell) 940 { 941 union qed_qm_pq_params pq_params; 942 int rc; 943 944 memset(&pq_params, 0, sizeof(pq_params)); 945 946 rc = qed_eth_txq_start_ramrod(p_hwfn, p_cid, 947 pbl_addr, pbl_size, 948 qed_get_qm_pq(p_hwfn, PROTOCOLID_ETH, 949 &pq_params)); 950 if (rc) 951 return rc; 952 953 /* Provide the caller with the necessary return values */ 954 *pp_doorbell = p_hwfn->doorbells + 955 qed_db_addr(p_cid->cid, DQ_DEMS_LEGACY); 956 957 return 0; 958 } 959 960 static int 961 qed_eth_tx_queue_start(struct qed_hwfn *p_hwfn, 962 u16 opaque_fid, 963 struct qed_queue_start_common_params *p_params, 964 u8 tc, 965 dma_addr_t pbl_addr, 966 u16 pbl_size, 967 struct qed_txq_start_ret_params *p_ret_params) 968 { 969 struct qed_queue_cid *p_cid; 970 int rc; 971 972 p_cid = qed_eth_queue_to_cid(p_hwfn, opaque_fid, p_params); 973 if (!p_cid) 974 return -EINVAL; 975 976 if (IS_PF(p_hwfn->cdev)) 977 rc = qed_eth_pf_tx_queue_start(p_hwfn, p_cid, tc, 978 pbl_addr, pbl_size, 979 &p_ret_params->p_doorbell); 980 else 981 rc = qed_vf_pf_txq_start(p_hwfn, p_cid, 982 pbl_addr, pbl_size, 983 &p_ret_params->p_doorbell); 984 985 if (rc) 986 qed_eth_queue_cid_release(p_hwfn, p_cid); 987 else 988 p_ret_params->p_handle = (void *)p_cid; 989 990 return rc; 991 } 992 993 static int 994 qed_eth_pf_tx_queue_stop(struct qed_hwfn *p_hwfn, struct qed_queue_cid *p_cid) 995 { 996 struct qed_spq_entry *p_ent = NULL; 997 struct qed_sp_init_data init_data; 998 int rc; 999 1000 memset(&init_data, 0, sizeof(init_data)); 1001 init_data.cid = p_cid->cid; 1002 init_data.opaque_fid = p_cid->opaque_fid; 1003 init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1004 1005 rc = qed_sp_init_request(p_hwfn, &p_ent, 1006 ETH_RAMROD_TX_QUEUE_STOP, 1007 PROTOCOLID_ETH, &init_data); 1008 if (rc) 1009 return rc; 1010 1011 return qed_spq_post(p_hwfn, p_ent, NULL); 1012 } 1013 1014 int qed_eth_tx_queue_stop(struct qed_hwfn *p_hwfn, void *p_handle) 1015 { 1016 struct qed_queue_cid *p_cid = (struct qed_queue_cid *)p_handle; 1017 int rc; 1018 1019 if (IS_PF(p_hwfn->cdev)) 1020 rc = qed_eth_pf_tx_queue_stop(p_hwfn, p_cid); 1021 else 1022 rc = qed_vf_pf_txq_stop(p_hwfn, p_cid); 1023 1024 if (!rc) 1025 qed_eth_queue_cid_release(p_hwfn, p_cid); 1026 return rc; 1027 } 1028 1029 static enum eth_filter_action qed_filter_action(enum qed_filter_opcode opcode) 1030 { 1031 enum eth_filter_action action = MAX_ETH_FILTER_ACTION; 1032 1033 switch (opcode) { 1034 case QED_FILTER_ADD: 1035 action = ETH_FILTER_ACTION_ADD; 1036 break; 1037 case QED_FILTER_REMOVE: 1038 action = ETH_FILTER_ACTION_REMOVE; 1039 break; 1040 case QED_FILTER_FLUSH: 1041 action = ETH_FILTER_ACTION_REMOVE_ALL; 1042 break; 1043 default: 1044 action = MAX_ETH_FILTER_ACTION; 1045 } 1046 1047 return action; 1048 } 1049 1050 static void qed_set_fw_mac_addr(__le16 *fw_msb, 1051 __le16 *fw_mid, 1052 __le16 *fw_lsb, 1053 u8 *mac) 1054 { 1055 ((u8 *)fw_msb)[0] = mac[1]; 1056 ((u8 *)fw_msb)[1] = mac[0]; 1057 ((u8 *)fw_mid)[0] = mac[3]; 1058 ((u8 *)fw_mid)[1] = mac[2]; 1059 ((u8 *)fw_lsb)[0] = mac[5]; 1060 ((u8 *)fw_lsb)[1] = mac[4]; 1061 } 1062 1063 static int 1064 qed_filter_ucast_common(struct qed_hwfn *p_hwfn, 1065 u16 opaque_fid, 1066 struct qed_filter_ucast *p_filter_cmd, 1067 struct vport_filter_update_ramrod_data **pp_ramrod, 1068 struct qed_spq_entry **pp_ent, 1069 enum spq_mode comp_mode, 1070 struct qed_spq_comp_cb *p_comp_data) 1071 { 1072 u8 vport_to_add_to = 0, vport_to_remove_from = 0; 1073 struct vport_filter_update_ramrod_data *p_ramrod; 1074 struct eth_filter_cmd *p_first_filter; 1075 struct eth_filter_cmd *p_second_filter; 1076 struct qed_sp_init_data init_data; 1077 enum eth_filter_action action; 1078 int rc; 1079 1080 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from, 1081 &vport_to_remove_from); 1082 if (rc) 1083 return rc; 1084 1085 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to, 1086 &vport_to_add_to); 1087 if (rc) 1088 return rc; 1089 1090 /* Get SPQ entry */ 1091 memset(&init_data, 0, sizeof(init_data)); 1092 init_data.cid = qed_spq_get_cid(p_hwfn); 1093 init_data.opaque_fid = opaque_fid; 1094 init_data.comp_mode = comp_mode; 1095 init_data.p_comp_data = p_comp_data; 1096 1097 rc = qed_sp_init_request(p_hwfn, pp_ent, 1098 ETH_RAMROD_FILTERS_UPDATE, 1099 PROTOCOLID_ETH, &init_data); 1100 if (rc) 1101 return rc; 1102 1103 *pp_ramrod = &(*pp_ent)->ramrod.vport_filter_update; 1104 p_ramrod = *pp_ramrod; 1105 p_ramrod->filter_cmd_hdr.rx = p_filter_cmd->is_rx_filter ? 1 : 0; 1106 p_ramrod->filter_cmd_hdr.tx = p_filter_cmd->is_tx_filter ? 1 : 0; 1107 1108 switch (p_filter_cmd->opcode) { 1109 case QED_FILTER_REPLACE: 1110 case QED_FILTER_MOVE: 1111 p_ramrod->filter_cmd_hdr.cmd_cnt = 2; break; 1112 default: 1113 p_ramrod->filter_cmd_hdr.cmd_cnt = 1; break; 1114 } 1115 1116 p_first_filter = &p_ramrod->filter_cmds[0]; 1117 p_second_filter = &p_ramrod->filter_cmds[1]; 1118 1119 switch (p_filter_cmd->type) { 1120 case QED_FILTER_MAC: 1121 p_first_filter->type = ETH_FILTER_TYPE_MAC; break; 1122 case QED_FILTER_VLAN: 1123 p_first_filter->type = ETH_FILTER_TYPE_VLAN; break; 1124 case QED_FILTER_MAC_VLAN: 1125 p_first_filter->type = ETH_FILTER_TYPE_PAIR; break; 1126 case QED_FILTER_INNER_MAC: 1127 p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC; break; 1128 case QED_FILTER_INNER_VLAN: 1129 p_first_filter->type = ETH_FILTER_TYPE_INNER_VLAN; break; 1130 case QED_FILTER_INNER_PAIR: 1131 p_first_filter->type = ETH_FILTER_TYPE_INNER_PAIR; break; 1132 case QED_FILTER_INNER_MAC_VNI_PAIR: 1133 p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR; 1134 break; 1135 case QED_FILTER_MAC_VNI_PAIR: 1136 p_first_filter->type = ETH_FILTER_TYPE_MAC_VNI_PAIR; break; 1137 case QED_FILTER_VNI: 1138 p_first_filter->type = ETH_FILTER_TYPE_VNI; break; 1139 } 1140 1141 if ((p_first_filter->type == ETH_FILTER_TYPE_MAC) || 1142 (p_first_filter->type == ETH_FILTER_TYPE_PAIR) || 1143 (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC) || 1144 (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR) || 1145 (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) || 1146 (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR)) { 1147 qed_set_fw_mac_addr(&p_first_filter->mac_msb, 1148 &p_first_filter->mac_mid, 1149 &p_first_filter->mac_lsb, 1150 (u8 *)p_filter_cmd->mac); 1151 } 1152 1153 if ((p_first_filter->type == ETH_FILTER_TYPE_VLAN) || 1154 (p_first_filter->type == ETH_FILTER_TYPE_PAIR) || 1155 (p_first_filter->type == ETH_FILTER_TYPE_INNER_VLAN) || 1156 (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR)) 1157 p_first_filter->vlan_id = cpu_to_le16(p_filter_cmd->vlan); 1158 1159 if ((p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) || 1160 (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR) || 1161 (p_first_filter->type == ETH_FILTER_TYPE_VNI)) 1162 p_first_filter->vni = cpu_to_le32(p_filter_cmd->vni); 1163 1164 if (p_filter_cmd->opcode == QED_FILTER_MOVE) { 1165 p_second_filter->type = p_first_filter->type; 1166 p_second_filter->mac_msb = p_first_filter->mac_msb; 1167 p_second_filter->mac_mid = p_first_filter->mac_mid; 1168 p_second_filter->mac_lsb = p_first_filter->mac_lsb; 1169 p_second_filter->vlan_id = p_first_filter->vlan_id; 1170 p_second_filter->vni = p_first_filter->vni; 1171 1172 p_first_filter->action = ETH_FILTER_ACTION_REMOVE; 1173 1174 p_first_filter->vport_id = vport_to_remove_from; 1175 1176 p_second_filter->action = ETH_FILTER_ACTION_ADD; 1177 p_second_filter->vport_id = vport_to_add_to; 1178 } else if (p_filter_cmd->opcode == QED_FILTER_REPLACE) { 1179 p_first_filter->vport_id = vport_to_add_to; 1180 memcpy(p_second_filter, p_first_filter, 1181 sizeof(*p_second_filter)); 1182 p_first_filter->action = ETH_FILTER_ACTION_REMOVE_ALL; 1183 p_second_filter->action = ETH_FILTER_ACTION_ADD; 1184 } else { 1185 action = qed_filter_action(p_filter_cmd->opcode); 1186 1187 if (action == MAX_ETH_FILTER_ACTION) { 1188 DP_NOTICE(p_hwfn, 1189 "%d is not supported yet\n", 1190 p_filter_cmd->opcode); 1191 return -EINVAL; 1192 } 1193 1194 p_first_filter->action = action; 1195 p_first_filter->vport_id = (p_filter_cmd->opcode == 1196 QED_FILTER_REMOVE) ? 1197 vport_to_remove_from : 1198 vport_to_add_to; 1199 } 1200 1201 return 0; 1202 } 1203 1204 int qed_sp_eth_filter_ucast(struct qed_hwfn *p_hwfn, 1205 u16 opaque_fid, 1206 struct qed_filter_ucast *p_filter_cmd, 1207 enum spq_mode comp_mode, 1208 struct qed_spq_comp_cb *p_comp_data) 1209 { 1210 struct vport_filter_update_ramrod_data *p_ramrod = NULL; 1211 struct qed_spq_entry *p_ent = NULL; 1212 struct eth_filter_cmd_header *p_header; 1213 int rc; 1214 1215 rc = qed_filter_ucast_common(p_hwfn, opaque_fid, p_filter_cmd, 1216 &p_ramrod, &p_ent, 1217 comp_mode, p_comp_data); 1218 if (rc) { 1219 DP_ERR(p_hwfn, "Uni. filter command failed %d\n", rc); 1220 return rc; 1221 } 1222 p_header = &p_ramrod->filter_cmd_hdr; 1223 p_header->assert_on_error = p_filter_cmd->assert_on_error; 1224 1225 rc = qed_spq_post(p_hwfn, p_ent, NULL); 1226 if (rc) { 1227 DP_ERR(p_hwfn, "Unicast filter ADD command failed %d\n", rc); 1228 return rc; 1229 } 1230 1231 DP_VERBOSE(p_hwfn, QED_MSG_SP, 1232 "Unicast filter configured, opcode = %s, type = %s, cmd_cnt = %d, is_rx_filter = %d, is_tx_filter = %d\n", 1233 (p_filter_cmd->opcode == QED_FILTER_ADD) ? "ADD" : 1234 ((p_filter_cmd->opcode == QED_FILTER_REMOVE) ? 1235 "REMOVE" : 1236 ((p_filter_cmd->opcode == QED_FILTER_MOVE) ? 1237 "MOVE" : "REPLACE")), 1238 (p_filter_cmd->type == QED_FILTER_MAC) ? "MAC" : 1239 ((p_filter_cmd->type == QED_FILTER_VLAN) ? 1240 "VLAN" : "MAC & VLAN"), 1241 p_ramrod->filter_cmd_hdr.cmd_cnt, 1242 p_filter_cmd->is_rx_filter, 1243 p_filter_cmd->is_tx_filter); 1244 DP_VERBOSE(p_hwfn, QED_MSG_SP, 1245 "vport_to_add_to = %d, vport_to_remove_from = %d, mac = %2x:%2x:%2x:%2x:%2x:%2x, vlan = %d\n", 1246 p_filter_cmd->vport_to_add_to, 1247 p_filter_cmd->vport_to_remove_from, 1248 p_filter_cmd->mac[0], 1249 p_filter_cmd->mac[1], 1250 p_filter_cmd->mac[2], 1251 p_filter_cmd->mac[3], 1252 p_filter_cmd->mac[4], 1253 p_filter_cmd->mac[5], 1254 p_filter_cmd->vlan); 1255 1256 return 0; 1257 } 1258 1259 /******************************************************************************* 1260 * Description: 1261 * Calculates crc 32 on a buffer 1262 * Note: crc32_length MUST be aligned to 8 1263 * Return: 1264 ******************************************************************************/ 1265 static u32 qed_calc_crc32c(u8 *crc32_packet, 1266 u32 crc32_length, u32 crc32_seed, u8 complement) 1267 { 1268 u32 byte = 0, bit = 0, crc32_result = crc32_seed; 1269 u8 msb = 0, current_byte = 0; 1270 1271 if ((!crc32_packet) || 1272 (crc32_length == 0) || 1273 ((crc32_length % 8) != 0)) 1274 return crc32_result; 1275 for (byte = 0; byte < crc32_length; byte++) { 1276 current_byte = crc32_packet[byte]; 1277 for (bit = 0; bit < 8; bit++) { 1278 msb = (u8)(crc32_result >> 31); 1279 crc32_result = crc32_result << 1; 1280 if (msb != (0x1 & (current_byte >> bit))) { 1281 crc32_result = crc32_result ^ CRC32_POLY; 1282 crc32_result |= 1; /*crc32_result[0] = 1;*/ 1283 } 1284 } 1285 } 1286 return crc32_result; 1287 } 1288 1289 static u32 qed_crc32c_le(u32 seed, u8 *mac, u32 len) 1290 { 1291 u32 packet_buf[2] = { 0 }; 1292 1293 memcpy((u8 *)(&packet_buf[0]), &mac[0], 6); 1294 return qed_calc_crc32c((u8 *)packet_buf, 8, seed, 0); 1295 } 1296 1297 u8 qed_mcast_bin_from_mac(u8 *mac) 1298 { 1299 u32 crc = qed_crc32c_le(ETH_MULTICAST_BIN_FROM_MAC_SEED, 1300 mac, ETH_ALEN); 1301 1302 return crc & 0xff; 1303 } 1304 1305 static int 1306 qed_sp_eth_filter_mcast(struct qed_hwfn *p_hwfn, 1307 u16 opaque_fid, 1308 struct qed_filter_mcast *p_filter_cmd, 1309 enum spq_mode comp_mode, 1310 struct qed_spq_comp_cb *p_comp_data) 1311 { 1312 unsigned long bins[ETH_MULTICAST_MAC_BINS_IN_REGS]; 1313 struct vport_update_ramrod_data *p_ramrod = NULL; 1314 struct qed_spq_entry *p_ent = NULL; 1315 struct qed_sp_init_data init_data; 1316 u8 abs_vport_id = 0; 1317 int rc, i; 1318 1319 if (p_filter_cmd->opcode == QED_FILTER_ADD) 1320 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to, 1321 &abs_vport_id); 1322 else 1323 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from, 1324 &abs_vport_id); 1325 if (rc) 1326 return rc; 1327 1328 /* Get SPQ entry */ 1329 memset(&init_data, 0, sizeof(init_data)); 1330 init_data.cid = qed_spq_get_cid(p_hwfn); 1331 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; 1332 init_data.comp_mode = comp_mode; 1333 init_data.p_comp_data = p_comp_data; 1334 1335 rc = qed_sp_init_request(p_hwfn, &p_ent, 1336 ETH_RAMROD_VPORT_UPDATE, 1337 PROTOCOLID_ETH, &init_data); 1338 if (rc) { 1339 DP_ERR(p_hwfn, "Multi-cast command failed %d\n", rc); 1340 return rc; 1341 } 1342 1343 p_ramrod = &p_ent->ramrod.vport_update; 1344 p_ramrod->common.update_approx_mcast_flg = 1; 1345 1346 /* explicitly clear out the entire vector */ 1347 memset(&p_ramrod->approx_mcast.bins, 0, 1348 sizeof(p_ramrod->approx_mcast.bins)); 1349 memset(bins, 0, sizeof(unsigned long) * 1350 ETH_MULTICAST_MAC_BINS_IN_REGS); 1351 /* filter ADD op is explicit set op and it removes 1352 * any existing filters for the vport 1353 */ 1354 if (p_filter_cmd->opcode == QED_FILTER_ADD) { 1355 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) { 1356 u32 bit; 1357 1358 bit = qed_mcast_bin_from_mac(p_filter_cmd->mac[i]); 1359 __set_bit(bit, bins); 1360 } 1361 1362 /* Convert to correct endianity */ 1363 for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) { 1364 struct vport_update_ramrod_mcast *p_ramrod_bins; 1365 u32 *p_bins = (u32 *)bins; 1366 1367 p_ramrod_bins = &p_ramrod->approx_mcast; 1368 p_ramrod_bins->bins[i] = cpu_to_le32(p_bins[i]); 1369 } 1370 } 1371 1372 p_ramrod->common.vport_id = abs_vport_id; 1373 1374 return qed_spq_post(p_hwfn, p_ent, NULL); 1375 } 1376 1377 static int qed_filter_mcast_cmd(struct qed_dev *cdev, 1378 struct qed_filter_mcast *p_filter_cmd, 1379 enum spq_mode comp_mode, 1380 struct qed_spq_comp_cb *p_comp_data) 1381 { 1382 int rc = 0; 1383 int i; 1384 1385 /* only ADD and REMOVE operations are supported for multi-cast */ 1386 if ((p_filter_cmd->opcode != QED_FILTER_ADD && 1387 (p_filter_cmd->opcode != QED_FILTER_REMOVE)) || 1388 (p_filter_cmd->num_mc_addrs > QED_MAX_MC_ADDRS)) 1389 return -EINVAL; 1390 1391 for_each_hwfn(cdev, i) { 1392 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1393 1394 u16 opaque_fid; 1395 1396 if (IS_VF(cdev)) { 1397 qed_vf_pf_filter_mcast(p_hwfn, p_filter_cmd); 1398 continue; 1399 } 1400 1401 opaque_fid = p_hwfn->hw_info.opaque_fid; 1402 1403 rc = qed_sp_eth_filter_mcast(p_hwfn, 1404 opaque_fid, 1405 p_filter_cmd, 1406 comp_mode, p_comp_data); 1407 } 1408 return rc; 1409 } 1410 1411 static int qed_filter_ucast_cmd(struct qed_dev *cdev, 1412 struct qed_filter_ucast *p_filter_cmd, 1413 enum spq_mode comp_mode, 1414 struct qed_spq_comp_cb *p_comp_data) 1415 { 1416 int rc = 0; 1417 int i; 1418 1419 for_each_hwfn(cdev, i) { 1420 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1421 u16 opaque_fid; 1422 1423 if (IS_VF(cdev)) { 1424 rc = qed_vf_pf_filter_ucast(p_hwfn, p_filter_cmd); 1425 continue; 1426 } 1427 1428 opaque_fid = p_hwfn->hw_info.opaque_fid; 1429 1430 rc = qed_sp_eth_filter_ucast(p_hwfn, 1431 opaque_fid, 1432 p_filter_cmd, 1433 comp_mode, p_comp_data); 1434 if (rc) 1435 break; 1436 } 1437 1438 return rc; 1439 } 1440 1441 /* Statistics related code */ 1442 static void __qed_get_vport_pstats_addrlen(struct qed_hwfn *p_hwfn, 1443 u32 *p_addr, 1444 u32 *p_len, u16 statistics_bin) 1445 { 1446 if (IS_PF(p_hwfn->cdev)) { 1447 *p_addr = BAR0_MAP_REG_PSDM_RAM + 1448 PSTORM_QUEUE_STAT_OFFSET(statistics_bin); 1449 *p_len = sizeof(struct eth_pstorm_per_queue_stat); 1450 } else { 1451 struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info; 1452 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp; 1453 1454 *p_addr = p_resp->pfdev_info.stats_info.pstats.address; 1455 *p_len = p_resp->pfdev_info.stats_info.pstats.len; 1456 } 1457 } 1458 1459 static void __qed_get_vport_pstats(struct qed_hwfn *p_hwfn, 1460 struct qed_ptt *p_ptt, 1461 struct qed_eth_stats *p_stats, 1462 u16 statistics_bin) 1463 { 1464 struct eth_pstorm_per_queue_stat pstats; 1465 u32 pstats_addr = 0, pstats_len = 0; 1466 1467 __qed_get_vport_pstats_addrlen(p_hwfn, &pstats_addr, &pstats_len, 1468 statistics_bin); 1469 1470 memset(&pstats, 0, sizeof(pstats)); 1471 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, pstats_len); 1472 1473 p_stats->tx_ucast_bytes += HILO_64_REGPAIR(pstats.sent_ucast_bytes); 1474 p_stats->tx_mcast_bytes += HILO_64_REGPAIR(pstats.sent_mcast_bytes); 1475 p_stats->tx_bcast_bytes += HILO_64_REGPAIR(pstats.sent_bcast_bytes); 1476 p_stats->tx_ucast_pkts += HILO_64_REGPAIR(pstats.sent_ucast_pkts); 1477 p_stats->tx_mcast_pkts += HILO_64_REGPAIR(pstats.sent_mcast_pkts); 1478 p_stats->tx_bcast_pkts += HILO_64_REGPAIR(pstats.sent_bcast_pkts); 1479 p_stats->tx_err_drop_pkts += HILO_64_REGPAIR(pstats.error_drop_pkts); 1480 } 1481 1482 static void __qed_get_vport_tstats(struct qed_hwfn *p_hwfn, 1483 struct qed_ptt *p_ptt, 1484 struct qed_eth_stats *p_stats, 1485 u16 statistics_bin) 1486 { 1487 struct tstorm_per_port_stat tstats; 1488 u32 tstats_addr, tstats_len; 1489 1490 if (IS_PF(p_hwfn->cdev)) { 1491 tstats_addr = BAR0_MAP_REG_TSDM_RAM + 1492 TSTORM_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)); 1493 tstats_len = sizeof(struct tstorm_per_port_stat); 1494 } else { 1495 struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info; 1496 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp; 1497 1498 tstats_addr = p_resp->pfdev_info.stats_info.tstats.address; 1499 tstats_len = p_resp->pfdev_info.stats_info.tstats.len; 1500 } 1501 1502 memset(&tstats, 0, sizeof(tstats)); 1503 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, tstats_len); 1504 1505 p_stats->mftag_filter_discards += 1506 HILO_64_REGPAIR(tstats.mftag_filter_discard); 1507 p_stats->mac_filter_discards += 1508 HILO_64_REGPAIR(tstats.eth_mac_filter_discard); 1509 } 1510 1511 static void __qed_get_vport_ustats_addrlen(struct qed_hwfn *p_hwfn, 1512 u32 *p_addr, 1513 u32 *p_len, u16 statistics_bin) 1514 { 1515 if (IS_PF(p_hwfn->cdev)) { 1516 *p_addr = BAR0_MAP_REG_USDM_RAM + 1517 USTORM_QUEUE_STAT_OFFSET(statistics_bin); 1518 *p_len = sizeof(struct eth_ustorm_per_queue_stat); 1519 } else { 1520 struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info; 1521 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp; 1522 1523 *p_addr = p_resp->pfdev_info.stats_info.ustats.address; 1524 *p_len = p_resp->pfdev_info.stats_info.ustats.len; 1525 } 1526 } 1527 1528 static void __qed_get_vport_ustats(struct qed_hwfn *p_hwfn, 1529 struct qed_ptt *p_ptt, 1530 struct qed_eth_stats *p_stats, 1531 u16 statistics_bin) 1532 { 1533 struct eth_ustorm_per_queue_stat ustats; 1534 u32 ustats_addr = 0, ustats_len = 0; 1535 1536 __qed_get_vport_ustats_addrlen(p_hwfn, &ustats_addr, &ustats_len, 1537 statistics_bin); 1538 1539 memset(&ustats, 0, sizeof(ustats)); 1540 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, ustats_len); 1541 1542 p_stats->rx_ucast_bytes += HILO_64_REGPAIR(ustats.rcv_ucast_bytes); 1543 p_stats->rx_mcast_bytes += HILO_64_REGPAIR(ustats.rcv_mcast_bytes); 1544 p_stats->rx_bcast_bytes += HILO_64_REGPAIR(ustats.rcv_bcast_bytes); 1545 p_stats->rx_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts); 1546 p_stats->rx_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts); 1547 p_stats->rx_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts); 1548 } 1549 1550 static void __qed_get_vport_mstats_addrlen(struct qed_hwfn *p_hwfn, 1551 u32 *p_addr, 1552 u32 *p_len, u16 statistics_bin) 1553 { 1554 if (IS_PF(p_hwfn->cdev)) { 1555 *p_addr = BAR0_MAP_REG_MSDM_RAM + 1556 MSTORM_QUEUE_STAT_OFFSET(statistics_bin); 1557 *p_len = sizeof(struct eth_mstorm_per_queue_stat); 1558 } else { 1559 struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info; 1560 struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp; 1561 1562 *p_addr = p_resp->pfdev_info.stats_info.mstats.address; 1563 *p_len = p_resp->pfdev_info.stats_info.mstats.len; 1564 } 1565 } 1566 1567 static void __qed_get_vport_mstats(struct qed_hwfn *p_hwfn, 1568 struct qed_ptt *p_ptt, 1569 struct qed_eth_stats *p_stats, 1570 u16 statistics_bin) 1571 { 1572 struct eth_mstorm_per_queue_stat mstats; 1573 u32 mstats_addr = 0, mstats_len = 0; 1574 1575 __qed_get_vport_mstats_addrlen(p_hwfn, &mstats_addr, &mstats_len, 1576 statistics_bin); 1577 1578 memset(&mstats, 0, sizeof(mstats)); 1579 qed_memcpy_from(p_hwfn, p_ptt, &mstats, mstats_addr, mstats_len); 1580 1581 p_stats->no_buff_discards += HILO_64_REGPAIR(mstats.no_buff_discard); 1582 p_stats->packet_too_big_discard += 1583 HILO_64_REGPAIR(mstats.packet_too_big_discard); 1584 p_stats->ttl0_discard += HILO_64_REGPAIR(mstats.ttl0_discard); 1585 p_stats->tpa_coalesced_pkts += 1586 HILO_64_REGPAIR(mstats.tpa_coalesced_pkts); 1587 p_stats->tpa_coalesced_events += 1588 HILO_64_REGPAIR(mstats.tpa_coalesced_events); 1589 p_stats->tpa_aborts_num += HILO_64_REGPAIR(mstats.tpa_aborts_num); 1590 p_stats->tpa_coalesced_bytes += 1591 HILO_64_REGPAIR(mstats.tpa_coalesced_bytes); 1592 } 1593 1594 static void __qed_get_vport_port_stats(struct qed_hwfn *p_hwfn, 1595 struct qed_ptt *p_ptt, 1596 struct qed_eth_stats *p_stats) 1597 { 1598 struct port_stats port_stats; 1599 int j; 1600 1601 memset(&port_stats, 0, sizeof(port_stats)); 1602 1603 qed_memcpy_from(p_hwfn, p_ptt, &port_stats, 1604 p_hwfn->mcp_info->port_addr + 1605 offsetof(struct public_port, stats), 1606 sizeof(port_stats)); 1607 1608 p_stats->rx_64_byte_packets += port_stats.eth.r64; 1609 p_stats->rx_65_to_127_byte_packets += port_stats.eth.r127; 1610 p_stats->rx_128_to_255_byte_packets += port_stats.eth.r255; 1611 p_stats->rx_256_to_511_byte_packets += port_stats.eth.r511; 1612 p_stats->rx_512_to_1023_byte_packets += port_stats.eth.r1023; 1613 p_stats->rx_1024_to_1518_byte_packets += port_stats.eth.r1518; 1614 p_stats->rx_1519_to_1522_byte_packets += port_stats.eth.r1522; 1615 p_stats->rx_1519_to_2047_byte_packets += port_stats.eth.r2047; 1616 p_stats->rx_2048_to_4095_byte_packets += port_stats.eth.r4095; 1617 p_stats->rx_4096_to_9216_byte_packets += port_stats.eth.r9216; 1618 p_stats->rx_9217_to_16383_byte_packets += port_stats.eth.r16383; 1619 p_stats->rx_crc_errors += port_stats.eth.rfcs; 1620 p_stats->rx_mac_crtl_frames += port_stats.eth.rxcf; 1621 p_stats->rx_pause_frames += port_stats.eth.rxpf; 1622 p_stats->rx_pfc_frames += port_stats.eth.rxpp; 1623 p_stats->rx_align_errors += port_stats.eth.raln; 1624 p_stats->rx_carrier_errors += port_stats.eth.rfcr; 1625 p_stats->rx_oversize_packets += port_stats.eth.rovr; 1626 p_stats->rx_jabbers += port_stats.eth.rjbr; 1627 p_stats->rx_undersize_packets += port_stats.eth.rund; 1628 p_stats->rx_fragments += port_stats.eth.rfrg; 1629 p_stats->tx_64_byte_packets += port_stats.eth.t64; 1630 p_stats->tx_65_to_127_byte_packets += port_stats.eth.t127; 1631 p_stats->tx_128_to_255_byte_packets += port_stats.eth.t255; 1632 p_stats->tx_256_to_511_byte_packets += port_stats.eth.t511; 1633 p_stats->tx_512_to_1023_byte_packets += port_stats.eth.t1023; 1634 p_stats->tx_1024_to_1518_byte_packets += port_stats.eth.t1518; 1635 p_stats->tx_1519_to_2047_byte_packets += port_stats.eth.t2047; 1636 p_stats->tx_2048_to_4095_byte_packets += port_stats.eth.t4095; 1637 p_stats->tx_4096_to_9216_byte_packets += port_stats.eth.t9216; 1638 p_stats->tx_9217_to_16383_byte_packets += port_stats.eth.t16383; 1639 p_stats->tx_pause_frames += port_stats.eth.txpf; 1640 p_stats->tx_pfc_frames += port_stats.eth.txpp; 1641 p_stats->tx_lpi_entry_count += port_stats.eth.tlpiec; 1642 p_stats->tx_total_collisions += port_stats.eth.tncl; 1643 p_stats->rx_mac_bytes += port_stats.eth.rbyte; 1644 p_stats->rx_mac_uc_packets += port_stats.eth.rxuca; 1645 p_stats->rx_mac_mc_packets += port_stats.eth.rxmca; 1646 p_stats->rx_mac_bc_packets += port_stats.eth.rxbca; 1647 p_stats->rx_mac_frames_ok += port_stats.eth.rxpok; 1648 p_stats->tx_mac_bytes += port_stats.eth.tbyte; 1649 p_stats->tx_mac_uc_packets += port_stats.eth.txuca; 1650 p_stats->tx_mac_mc_packets += port_stats.eth.txmca; 1651 p_stats->tx_mac_bc_packets += port_stats.eth.txbca; 1652 p_stats->tx_mac_ctrl_frames += port_stats.eth.txcf; 1653 for (j = 0; j < 8; j++) { 1654 p_stats->brb_truncates += port_stats.brb.brb_truncate[j]; 1655 p_stats->brb_discards += port_stats.brb.brb_discard[j]; 1656 } 1657 } 1658 1659 static void __qed_get_vport_stats(struct qed_hwfn *p_hwfn, 1660 struct qed_ptt *p_ptt, 1661 struct qed_eth_stats *stats, 1662 u16 statistics_bin, bool b_get_port_stats) 1663 { 1664 __qed_get_vport_mstats(p_hwfn, p_ptt, stats, statistics_bin); 1665 __qed_get_vport_ustats(p_hwfn, p_ptt, stats, statistics_bin); 1666 __qed_get_vport_tstats(p_hwfn, p_ptt, stats, statistics_bin); 1667 __qed_get_vport_pstats(p_hwfn, p_ptt, stats, statistics_bin); 1668 1669 if (b_get_port_stats && p_hwfn->mcp_info) 1670 __qed_get_vport_port_stats(p_hwfn, p_ptt, stats); 1671 } 1672 1673 static void _qed_get_vport_stats(struct qed_dev *cdev, 1674 struct qed_eth_stats *stats) 1675 { 1676 u8 fw_vport = 0; 1677 int i; 1678 1679 memset(stats, 0, sizeof(*stats)); 1680 1681 for_each_hwfn(cdev, i) { 1682 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1683 struct qed_ptt *p_ptt = IS_PF(cdev) ? qed_ptt_acquire(p_hwfn) 1684 : NULL; 1685 1686 if (IS_PF(cdev)) { 1687 /* The main vport index is relative first */ 1688 if (qed_fw_vport(p_hwfn, 0, &fw_vport)) { 1689 DP_ERR(p_hwfn, "No vport available!\n"); 1690 goto out; 1691 } 1692 } 1693 1694 if (IS_PF(cdev) && !p_ptt) { 1695 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 1696 continue; 1697 } 1698 1699 __qed_get_vport_stats(p_hwfn, p_ptt, stats, fw_vport, 1700 IS_PF(cdev) ? true : false); 1701 1702 out: 1703 if (IS_PF(cdev) && p_ptt) 1704 qed_ptt_release(p_hwfn, p_ptt); 1705 } 1706 } 1707 1708 void qed_get_vport_stats(struct qed_dev *cdev, struct qed_eth_stats *stats) 1709 { 1710 u32 i; 1711 1712 if (!cdev) { 1713 memset(stats, 0, sizeof(*stats)); 1714 return; 1715 } 1716 1717 _qed_get_vport_stats(cdev, stats); 1718 1719 if (!cdev->reset_stats) 1720 return; 1721 1722 /* Reduce the statistics baseline */ 1723 for (i = 0; i < sizeof(struct qed_eth_stats) / sizeof(u64); i++) 1724 ((u64 *)stats)[i] -= ((u64 *)cdev->reset_stats)[i]; 1725 } 1726 1727 /* zeroes V-PORT specific portion of stats (Port stats remains untouched) */ 1728 void qed_reset_vport_stats(struct qed_dev *cdev) 1729 { 1730 int i; 1731 1732 for_each_hwfn(cdev, i) { 1733 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1734 struct eth_mstorm_per_queue_stat mstats; 1735 struct eth_ustorm_per_queue_stat ustats; 1736 struct eth_pstorm_per_queue_stat pstats; 1737 struct qed_ptt *p_ptt = IS_PF(cdev) ? qed_ptt_acquire(p_hwfn) 1738 : NULL; 1739 u32 addr = 0, len = 0; 1740 1741 if (IS_PF(cdev) && !p_ptt) { 1742 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 1743 continue; 1744 } 1745 1746 memset(&mstats, 0, sizeof(mstats)); 1747 __qed_get_vport_mstats_addrlen(p_hwfn, &addr, &len, 0); 1748 qed_memcpy_to(p_hwfn, p_ptt, addr, &mstats, len); 1749 1750 memset(&ustats, 0, sizeof(ustats)); 1751 __qed_get_vport_ustats_addrlen(p_hwfn, &addr, &len, 0); 1752 qed_memcpy_to(p_hwfn, p_ptt, addr, &ustats, len); 1753 1754 memset(&pstats, 0, sizeof(pstats)); 1755 __qed_get_vport_pstats_addrlen(p_hwfn, &addr, &len, 0); 1756 qed_memcpy_to(p_hwfn, p_ptt, addr, &pstats, len); 1757 1758 if (IS_PF(cdev)) 1759 qed_ptt_release(p_hwfn, p_ptt); 1760 } 1761 1762 /* PORT statistics are not necessarily reset, so we need to 1763 * read and create a baseline for future statistics. 1764 */ 1765 if (!cdev->reset_stats) 1766 DP_INFO(cdev, "Reset stats not allocated\n"); 1767 else 1768 _qed_get_vport_stats(cdev, cdev->reset_stats); 1769 } 1770 1771 static int qed_fill_eth_dev_info(struct qed_dev *cdev, 1772 struct qed_dev_eth_info *info) 1773 { 1774 int i; 1775 1776 memset(info, 0, sizeof(*info)); 1777 1778 info->num_tc = 1; 1779 1780 if (IS_PF(cdev)) { 1781 int max_vf_vlan_filters = 0; 1782 int max_vf_mac_filters = 0; 1783 1784 if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) { 1785 u16 num_queues = 0; 1786 1787 /* Since the feature controls only queue-zones, 1788 * make sure we have the contexts [rx, tx, xdp] to 1789 * match. 1790 */ 1791 for_each_hwfn(cdev, i) { 1792 struct qed_hwfn *hwfn = &cdev->hwfns[i]; 1793 u16 l2_queues = (u16)FEAT_NUM(hwfn, 1794 QED_PF_L2_QUE); 1795 u16 cids; 1796 1797 cids = hwfn->pf_params.eth_pf_params.num_cons; 1798 num_queues += min_t(u16, l2_queues, cids / 3); 1799 } 1800 1801 /* queues might theoretically be >256, but interrupts' 1802 * upper-limit guarantes that it would fit in a u8. 1803 */ 1804 if (cdev->int_params.fp_msix_cnt) { 1805 u8 irqs = cdev->int_params.fp_msix_cnt; 1806 1807 info->num_queues = (u8)min_t(u16, 1808 num_queues, irqs); 1809 } 1810 } else { 1811 info->num_queues = cdev->num_hwfns; 1812 } 1813 1814 if (IS_QED_SRIOV(cdev)) { 1815 max_vf_vlan_filters = cdev->p_iov_info->total_vfs * 1816 QED_ETH_VF_NUM_VLAN_FILTERS; 1817 max_vf_mac_filters = cdev->p_iov_info->total_vfs * 1818 QED_ETH_VF_NUM_MAC_FILTERS; 1819 } 1820 info->num_vlan_filters = RESC_NUM(QED_LEADING_HWFN(cdev), 1821 QED_VLAN) - 1822 max_vf_vlan_filters; 1823 info->num_mac_filters = RESC_NUM(QED_LEADING_HWFN(cdev), 1824 QED_MAC) - 1825 max_vf_mac_filters; 1826 1827 ether_addr_copy(info->port_mac, 1828 cdev->hwfns[0].hw_info.hw_mac_addr); 1829 } else { 1830 qed_vf_get_num_rxqs(QED_LEADING_HWFN(cdev), &info->num_queues); 1831 if (cdev->num_hwfns > 1) { 1832 u8 queues = 0; 1833 1834 qed_vf_get_num_rxqs(&cdev->hwfns[1], &queues); 1835 info->num_queues += queues; 1836 } 1837 1838 qed_vf_get_num_vlan_filters(&cdev->hwfns[0], 1839 (u8 *)&info->num_vlan_filters); 1840 qed_vf_get_num_mac_filters(&cdev->hwfns[0], 1841 (u8 *)&info->num_mac_filters); 1842 qed_vf_get_port_mac(&cdev->hwfns[0], info->port_mac); 1843 1844 info->is_legacy = !!cdev->hwfns[0].vf_iov_info->b_pre_fp_hsi; 1845 } 1846 1847 qed_fill_dev_info(cdev, &info->common); 1848 1849 if (IS_VF(cdev)) 1850 eth_zero_addr(info->common.hw_mac); 1851 1852 return 0; 1853 } 1854 1855 static void qed_register_eth_ops(struct qed_dev *cdev, 1856 struct qed_eth_cb_ops *ops, void *cookie) 1857 { 1858 cdev->protocol_ops.eth = ops; 1859 cdev->ops_cookie = cookie; 1860 1861 /* For VF, we start bulletin reading */ 1862 if (IS_VF(cdev)) 1863 qed_vf_start_iov_wq(cdev); 1864 } 1865 1866 static bool qed_check_mac(struct qed_dev *cdev, u8 *mac) 1867 { 1868 if (IS_PF(cdev)) 1869 return true; 1870 1871 return qed_vf_check_mac(&cdev->hwfns[0], mac); 1872 } 1873 1874 static int qed_start_vport(struct qed_dev *cdev, 1875 struct qed_start_vport_params *params) 1876 { 1877 int rc, i; 1878 1879 for_each_hwfn(cdev, i) { 1880 struct qed_sp_vport_start_params start = { 0 }; 1881 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1882 1883 start.tpa_mode = params->gro_enable ? QED_TPA_MODE_GRO : 1884 QED_TPA_MODE_NONE; 1885 start.remove_inner_vlan = params->remove_inner_vlan; 1886 start.only_untagged = true; /* untagged only */ 1887 start.drop_ttl0 = params->drop_ttl0; 1888 start.opaque_fid = p_hwfn->hw_info.opaque_fid; 1889 start.concrete_fid = p_hwfn->hw_info.concrete_fid; 1890 start.handle_ptp_pkts = params->handle_ptp_pkts; 1891 start.vport_id = params->vport_id; 1892 start.max_buffers_per_cqe = 16; 1893 start.mtu = params->mtu; 1894 1895 rc = qed_sp_vport_start(p_hwfn, &start); 1896 if (rc) { 1897 DP_ERR(cdev, "Failed to start VPORT\n"); 1898 return rc; 1899 } 1900 1901 qed_hw_start_fastpath(p_hwfn); 1902 1903 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP), 1904 "Started V-PORT %d with MTU %d\n", 1905 start.vport_id, start.mtu); 1906 } 1907 1908 if (params->clear_stats) 1909 qed_reset_vport_stats(cdev); 1910 1911 return 0; 1912 } 1913 1914 static int qed_stop_vport(struct qed_dev *cdev, u8 vport_id) 1915 { 1916 int rc, i; 1917 1918 for_each_hwfn(cdev, i) { 1919 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1920 1921 rc = qed_sp_vport_stop(p_hwfn, 1922 p_hwfn->hw_info.opaque_fid, vport_id); 1923 1924 if (rc) { 1925 DP_ERR(cdev, "Failed to stop VPORT\n"); 1926 return rc; 1927 } 1928 } 1929 return 0; 1930 } 1931 1932 static int qed_update_vport_rss(struct qed_dev *cdev, 1933 struct qed_update_vport_rss_params *input, 1934 struct qed_rss_params *rss) 1935 { 1936 int i, fn; 1937 1938 /* Update configuration with what's correct regardless of CMT */ 1939 rss->update_rss_config = 1; 1940 rss->rss_enable = 1; 1941 rss->update_rss_capabilities = 1; 1942 rss->update_rss_ind_table = 1; 1943 rss->update_rss_key = 1; 1944 rss->rss_caps = input->rss_caps; 1945 memcpy(rss->rss_key, input->rss_key, QED_RSS_KEY_SIZE * sizeof(u32)); 1946 1947 /* In regular scenario, we'd simply need to take input handlers. 1948 * But in CMT, we'd have to split the handlers according to the 1949 * engine they were configured on. We'd then have to understand 1950 * whether RSS is really required, since 2-queues on CMT doesn't 1951 * require RSS. 1952 */ 1953 if (cdev->num_hwfns == 1) { 1954 memcpy(rss->rss_ind_table, 1955 input->rss_ind_table, 1956 QED_RSS_IND_TABLE_SIZE * sizeof(void *)); 1957 rss->rss_table_size_log = 7; 1958 return 0; 1959 } 1960 1961 /* Start by copying the non-spcific information to the 2nd copy */ 1962 memcpy(&rss[1], &rss[0], sizeof(struct qed_rss_params)); 1963 1964 /* CMT should be round-robin */ 1965 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { 1966 struct qed_queue_cid *cid = input->rss_ind_table[i]; 1967 struct qed_rss_params *t_rss; 1968 1969 if (cid->p_owner == QED_LEADING_HWFN(cdev)) 1970 t_rss = &rss[0]; 1971 else 1972 t_rss = &rss[1]; 1973 1974 t_rss->rss_ind_table[i / cdev->num_hwfns] = cid; 1975 } 1976 1977 /* Make sure RSS is actually required */ 1978 for_each_hwfn(cdev, fn) { 1979 for (i = 1; i < QED_RSS_IND_TABLE_SIZE / cdev->num_hwfns; i++) { 1980 if (rss[fn].rss_ind_table[i] != 1981 rss[fn].rss_ind_table[0]) 1982 break; 1983 } 1984 if (i == QED_RSS_IND_TABLE_SIZE / cdev->num_hwfns) { 1985 DP_VERBOSE(cdev, NETIF_MSG_IFUP, 1986 "CMT - 1 queue per-hwfn; Disabling RSS\n"); 1987 return -EINVAL; 1988 } 1989 rss[fn].rss_table_size_log = 6; 1990 } 1991 1992 return 0; 1993 } 1994 1995 static int qed_update_vport(struct qed_dev *cdev, 1996 struct qed_update_vport_params *params) 1997 { 1998 struct qed_sp_vport_update_params sp_params; 1999 struct qed_rss_params *rss; 2000 int rc = 0, i; 2001 2002 if (!cdev) 2003 return -ENODEV; 2004 2005 rss = vzalloc(sizeof(*rss) * cdev->num_hwfns); 2006 if (!rss) 2007 return -ENOMEM; 2008 2009 memset(&sp_params, 0, sizeof(sp_params)); 2010 2011 /* Translate protocol params into sp params */ 2012 sp_params.vport_id = params->vport_id; 2013 sp_params.update_vport_active_rx_flg = params->update_vport_active_flg; 2014 sp_params.update_vport_active_tx_flg = params->update_vport_active_flg; 2015 sp_params.vport_active_rx_flg = params->vport_active_flg; 2016 sp_params.vport_active_tx_flg = params->vport_active_flg; 2017 sp_params.update_tx_switching_flg = params->update_tx_switching_flg; 2018 sp_params.tx_switching_flg = params->tx_switching_flg; 2019 sp_params.accept_any_vlan = params->accept_any_vlan; 2020 sp_params.update_accept_any_vlan_flg = 2021 params->update_accept_any_vlan_flg; 2022 2023 /* Prepare the RSS configuration */ 2024 if (params->update_rss_flg) 2025 if (qed_update_vport_rss(cdev, ¶ms->rss_params, rss)) 2026 params->update_rss_flg = 0; 2027 2028 for_each_hwfn(cdev, i) { 2029 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 2030 2031 if (params->update_rss_flg) 2032 sp_params.rss_params = &rss[i]; 2033 2034 sp_params.opaque_fid = p_hwfn->hw_info.opaque_fid; 2035 rc = qed_sp_vport_update(p_hwfn, &sp_params, 2036 QED_SPQ_MODE_EBLOCK, 2037 NULL); 2038 if (rc) { 2039 DP_ERR(cdev, "Failed to update VPORT\n"); 2040 goto out; 2041 } 2042 2043 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP), 2044 "Updated V-PORT %d: active_flag %d [update %d]\n", 2045 params->vport_id, params->vport_active_flg, 2046 params->update_vport_active_flg); 2047 } 2048 2049 out: 2050 vfree(rss); 2051 return rc; 2052 } 2053 2054 static int qed_start_rxq(struct qed_dev *cdev, 2055 u8 rss_num, 2056 struct qed_queue_start_common_params *p_params, 2057 u16 bd_max_bytes, 2058 dma_addr_t bd_chain_phys_addr, 2059 dma_addr_t cqe_pbl_addr, 2060 u16 cqe_pbl_size, 2061 struct qed_rxq_start_ret_params *ret_params) 2062 { 2063 struct qed_hwfn *p_hwfn; 2064 int rc, hwfn_index; 2065 2066 hwfn_index = rss_num % cdev->num_hwfns; 2067 p_hwfn = &cdev->hwfns[hwfn_index]; 2068 2069 p_params->queue_id = p_params->queue_id / cdev->num_hwfns; 2070 p_params->stats_id = p_params->vport_id; 2071 2072 rc = qed_eth_rx_queue_start(p_hwfn, 2073 p_hwfn->hw_info.opaque_fid, 2074 p_params, 2075 bd_max_bytes, 2076 bd_chain_phys_addr, 2077 cqe_pbl_addr, cqe_pbl_size, ret_params); 2078 if (rc) { 2079 DP_ERR(cdev, "Failed to start RXQ#%d\n", p_params->queue_id); 2080 return rc; 2081 } 2082 2083 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP), 2084 "Started RX-Q %d [rss_num %d] on V-PORT %d and SB %d\n", 2085 p_params->queue_id, rss_num, p_params->vport_id, 2086 p_params->sb); 2087 2088 return 0; 2089 } 2090 2091 static int qed_stop_rxq(struct qed_dev *cdev, u8 rss_id, void *handle) 2092 { 2093 int rc, hwfn_index; 2094 struct qed_hwfn *p_hwfn; 2095 2096 hwfn_index = rss_id % cdev->num_hwfns; 2097 p_hwfn = &cdev->hwfns[hwfn_index]; 2098 2099 rc = qed_eth_rx_queue_stop(p_hwfn, handle, false, false); 2100 if (rc) { 2101 DP_ERR(cdev, "Failed to stop RXQ#%02x\n", rss_id); 2102 return rc; 2103 } 2104 2105 return 0; 2106 } 2107 2108 static int qed_start_txq(struct qed_dev *cdev, 2109 u8 rss_num, 2110 struct qed_queue_start_common_params *p_params, 2111 dma_addr_t pbl_addr, 2112 u16 pbl_size, 2113 struct qed_txq_start_ret_params *ret_params) 2114 { 2115 struct qed_hwfn *p_hwfn; 2116 int rc, hwfn_index; 2117 2118 hwfn_index = rss_num % cdev->num_hwfns; 2119 p_hwfn = &cdev->hwfns[hwfn_index]; 2120 p_params->queue_id = p_params->queue_id / cdev->num_hwfns; 2121 p_params->stats_id = p_params->vport_id; 2122 2123 rc = qed_eth_tx_queue_start(p_hwfn, 2124 p_hwfn->hw_info.opaque_fid, 2125 p_params, 0, 2126 pbl_addr, pbl_size, ret_params); 2127 2128 if (rc) { 2129 DP_ERR(cdev, "Failed to start TXQ#%d\n", p_params->queue_id); 2130 return rc; 2131 } 2132 2133 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP), 2134 "Started TX-Q %d [rss_num %d] on V-PORT %d and SB %d\n", 2135 p_params->queue_id, rss_num, p_params->vport_id, 2136 p_params->sb); 2137 2138 return 0; 2139 } 2140 2141 #define QED_HW_STOP_RETRY_LIMIT (10) 2142 static int qed_fastpath_stop(struct qed_dev *cdev) 2143 { 2144 qed_hw_stop_fastpath(cdev); 2145 2146 return 0; 2147 } 2148 2149 static int qed_stop_txq(struct qed_dev *cdev, u8 rss_id, void *handle) 2150 { 2151 struct qed_hwfn *p_hwfn; 2152 int rc, hwfn_index; 2153 2154 hwfn_index = rss_id % cdev->num_hwfns; 2155 p_hwfn = &cdev->hwfns[hwfn_index]; 2156 2157 rc = qed_eth_tx_queue_stop(p_hwfn, handle); 2158 if (rc) { 2159 DP_ERR(cdev, "Failed to stop TXQ#%02x\n", rss_id); 2160 return rc; 2161 } 2162 2163 return 0; 2164 } 2165 2166 static int qed_tunn_configure(struct qed_dev *cdev, 2167 struct qed_tunn_params *tunn_params) 2168 { 2169 struct qed_tunn_update_params tunn_info; 2170 int i, rc; 2171 2172 if (IS_VF(cdev)) 2173 return 0; 2174 2175 memset(&tunn_info, 0, sizeof(tunn_info)); 2176 if (tunn_params->update_vxlan_port == 1) { 2177 tunn_info.update_vxlan_udp_port = 1; 2178 tunn_info.vxlan_udp_port = tunn_params->vxlan_port; 2179 } 2180 2181 if (tunn_params->update_geneve_port == 1) { 2182 tunn_info.update_geneve_udp_port = 1; 2183 tunn_info.geneve_udp_port = tunn_params->geneve_port; 2184 } 2185 2186 for_each_hwfn(cdev, i) { 2187 struct qed_hwfn *hwfn = &cdev->hwfns[i]; 2188 2189 rc = qed_sp_pf_update_tunn_cfg(hwfn, &tunn_info, 2190 QED_SPQ_MODE_EBLOCK, NULL); 2191 2192 if (rc) 2193 return rc; 2194 } 2195 2196 return 0; 2197 } 2198 2199 static int qed_configure_filter_rx_mode(struct qed_dev *cdev, 2200 enum qed_filter_rx_mode_type type) 2201 { 2202 struct qed_filter_accept_flags accept_flags; 2203 2204 memset(&accept_flags, 0, sizeof(accept_flags)); 2205 2206 accept_flags.update_rx_mode_config = 1; 2207 accept_flags.update_tx_mode_config = 1; 2208 accept_flags.rx_accept_filter = QED_ACCEPT_UCAST_MATCHED | 2209 QED_ACCEPT_MCAST_MATCHED | 2210 QED_ACCEPT_BCAST; 2211 accept_flags.tx_accept_filter = QED_ACCEPT_UCAST_MATCHED | 2212 QED_ACCEPT_MCAST_MATCHED | 2213 QED_ACCEPT_BCAST; 2214 2215 if (type == QED_FILTER_RX_MODE_TYPE_PROMISC) { 2216 accept_flags.rx_accept_filter |= QED_ACCEPT_UCAST_UNMATCHED | 2217 QED_ACCEPT_MCAST_UNMATCHED; 2218 accept_flags.tx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED; 2219 } else if (type == QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC) { 2220 accept_flags.rx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED; 2221 accept_flags.tx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED; 2222 } 2223 2224 return qed_filter_accept_cmd(cdev, 0, accept_flags, false, false, 2225 QED_SPQ_MODE_CB, NULL); 2226 } 2227 2228 static int qed_configure_filter_ucast(struct qed_dev *cdev, 2229 struct qed_filter_ucast_params *params) 2230 { 2231 struct qed_filter_ucast ucast; 2232 2233 if (!params->vlan_valid && !params->mac_valid) { 2234 DP_NOTICE(cdev, 2235 "Tried configuring a unicast filter, but both MAC and VLAN are not set\n"); 2236 return -EINVAL; 2237 } 2238 2239 memset(&ucast, 0, sizeof(ucast)); 2240 switch (params->type) { 2241 case QED_FILTER_XCAST_TYPE_ADD: 2242 ucast.opcode = QED_FILTER_ADD; 2243 break; 2244 case QED_FILTER_XCAST_TYPE_DEL: 2245 ucast.opcode = QED_FILTER_REMOVE; 2246 break; 2247 case QED_FILTER_XCAST_TYPE_REPLACE: 2248 ucast.opcode = QED_FILTER_REPLACE; 2249 break; 2250 default: 2251 DP_NOTICE(cdev, "Unknown unicast filter type %d\n", 2252 params->type); 2253 } 2254 2255 if (params->vlan_valid && params->mac_valid) { 2256 ucast.type = QED_FILTER_MAC_VLAN; 2257 ether_addr_copy(ucast.mac, params->mac); 2258 ucast.vlan = params->vlan; 2259 } else if (params->mac_valid) { 2260 ucast.type = QED_FILTER_MAC; 2261 ether_addr_copy(ucast.mac, params->mac); 2262 } else { 2263 ucast.type = QED_FILTER_VLAN; 2264 ucast.vlan = params->vlan; 2265 } 2266 2267 ucast.is_rx_filter = true; 2268 ucast.is_tx_filter = true; 2269 2270 return qed_filter_ucast_cmd(cdev, &ucast, QED_SPQ_MODE_CB, NULL); 2271 } 2272 2273 static int qed_configure_filter_mcast(struct qed_dev *cdev, 2274 struct qed_filter_mcast_params *params) 2275 { 2276 struct qed_filter_mcast mcast; 2277 int i; 2278 2279 memset(&mcast, 0, sizeof(mcast)); 2280 switch (params->type) { 2281 case QED_FILTER_XCAST_TYPE_ADD: 2282 mcast.opcode = QED_FILTER_ADD; 2283 break; 2284 case QED_FILTER_XCAST_TYPE_DEL: 2285 mcast.opcode = QED_FILTER_REMOVE; 2286 break; 2287 default: 2288 DP_NOTICE(cdev, "Unknown multicast filter type %d\n", 2289 params->type); 2290 } 2291 2292 mcast.num_mc_addrs = params->num; 2293 for (i = 0; i < mcast.num_mc_addrs; i++) 2294 ether_addr_copy(mcast.mac[i], params->mac[i]); 2295 2296 return qed_filter_mcast_cmd(cdev, &mcast, QED_SPQ_MODE_CB, NULL); 2297 } 2298 2299 static int qed_configure_filter(struct qed_dev *cdev, 2300 struct qed_filter_params *params) 2301 { 2302 enum qed_filter_rx_mode_type accept_flags; 2303 2304 switch (params->type) { 2305 case QED_FILTER_TYPE_UCAST: 2306 return qed_configure_filter_ucast(cdev, ¶ms->filter.ucast); 2307 case QED_FILTER_TYPE_MCAST: 2308 return qed_configure_filter_mcast(cdev, ¶ms->filter.mcast); 2309 case QED_FILTER_TYPE_RX_MODE: 2310 accept_flags = params->filter.accept_flags; 2311 return qed_configure_filter_rx_mode(cdev, accept_flags); 2312 default: 2313 DP_NOTICE(cdev, "Unknown filter type %d\n", (int)params->type); 2314 return -EINVAL; 2315 } 2316 } 2317 2318 static int qed_fp_cqe_completion(struct qed_dev *dev, 2319 u8 rss_id, struct eth_slow_path_rx_cqe *cqe) 2320 { 2321 return qed_eth_cqe_completion(&dev->hwfns[rss_id % dev->num_hwfns], 2322 cqe); 2323 } 2324 2325 #ifdef CONFIG_QED_SRIOV 2326 extern const struct qed_iov_hv_ops qed_iov_ops_pass; 2327 #endif 2328 2329 #ifdef CONFIG_DCB 2330 extern const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass; 2331 #endif 2332 2333 extern const struct qed_eth_ptp_ops qed_ptp_ops_pass; 2334 2335 static const struct qed_eth_ops qed_eth_ops_pass = { 2336 .common = &qed_common_ops_pass, 2337 #ifdef CONFIG_QED_SRIOV 2338 .iov = &qed_iov_ops_pass, 2339 #endif 2340 #ifdef CONFIG_DCB 2341 .dcb = &qed_dcbnl_ops_pass, 2342 #endif 2343 .ptp = &qed_ptp_ops_pass, 2344 .fill_dev_info = &qed_fill_eth_dev_info, 2345 .register_ops = &qed_register_eth_ops, 2346 .check_mac = &qed_check_mac, 2347 .vport_start = &qed_start_vport, 2348 .vport_stop = &qed_stop_vport, 2349 .vport_update = &qed_update_vport, 2350 .q_rx_start = &qed_start_rxq, 2351 .q_rx_stop = &qed_stop_rxq, 2352 .q_tx_start = &qed_start_txq, 2353 .q_tx_stop = &qed_stop_txq, 2354 .filter_config = &qed_configure_filter, 2355 .fastpath_stop = &qed_fastpath_stop, 2356 .eth_cqe_completion = &qed_fp_cqe_completion, 2357 .get_vport_stats = &qed_get_vport_stats, 2358 .tunn_config = &qed_tunn_configure, 2359 }; 2360 2361 const struct qed_eth_ops *qed_get_eth_ops(void) 2362 { 2363 return &qed_eth_ops_pass; 2364 } 2365 EXPORT_SYMBOL(qed_get_eth_ops); 2366 2367 void qed_put_eth_ops(void) 2368 { 2369 /* TODO - reference count for module? */ 2370 } 2371 EXPORT_SYMBOL(qed_put_eth_ops); 2372