11f4d4ed6SAlexander Lobakin // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 3e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 4663eacd8SAlexander Lobakin * Copyright (c) 2019-2020 Marvell International Ltd. 5fe56b9e6SYuval Mintz */ 6fe56b9e6SYuval Mintz 7fe56b9e6SYuval Mintz #include <linux/types.h> 8fe56b9e6SYuval Mintz #include <linux/io.h> 9fe56b9e6SYuval Mintz #include <linux/delay.h> 10fe56b9e6SYuval Mintz #include <linux/errno.h> 11fe56b9e6SYuval Mintz #include <linux/kernel.h> 12fe56b9e6SYuval Mintz #include <linux/slab.h> 13fe56b9e6SYuval Mintz #include <linux/string.h> 14fe56b9e6SYuval Mintz #include "qed.h" 15fe56b9e6SYuval Mintz #include "qed_hsi.h" 16fe56b9e6SYuval Mintz #include "qed_hw.h" 17fe56b9e6SYuval Mintz #include "qed_init_ops.h" 18fe56b9e6SYuval Mintz #include "qed_reg_addr.h" 191408cc1fSYuval Mintz #include "qed_sriov.h" 20fe56b9e6SYuval Mintz 21fe56b9e6SYuval Mintz #define QED_INIT_MAX_POLL_COUNT 100 22fe56b9e6SYuval Mintz #define QED_INIT_POLL_PERIOD_US 500 23fe56b9e6SYuval Mintz 24fe56b9e6SYuval Mintz static u32 pxp_global_win[] = { 25fe56b9e6SYuval Mintz 0, 26fe56b9e6SYuval Mintz 0, 27fe56b9e6SYuval Mintz 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */ 28fe56b9e6SYuval Mintz 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */ 29fe56b9e6SYuval Mintz 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */ 30fe56b9e6SYuval Mintz 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */ 316aebde8dSMichal Kalderon 0x1d02, /* win 6: addr=0x1d02000, size=4096 bytes */ 326aebde8dSMichal Kalderon 0x1d80, /* win 7: addr=0x1d80000, size=4096 bytes */ 336aebde8dSMichal Kalderon 0x1d81, /* win 8: addr=0x1d81000, size=4096 bytes */ 346aebde8dSMichal Kalderon 0x1d82, /* win 9: addr=0x1d82000, size=4096 bytes */ 356aebde8dSMichal Kalderon 0x1e00, /* win 10: addr=0x1e00000, size=4096 bytes */ 366aebde8dSMichal Kalderon 0x1e01, /* win 11: addr=0x1e01000, size=4096 bytes */ 376aebde8dSMichal Kalderon 0x1e80, /* win 12: addr=0x1e80000, size=4096 bytes */ 386aebde8dSMichal Kalderon 0x1f00, /* win 13: addr=0x1f00000, size=4096 bytes */ 396aebde8dSMichal Kalderon 0x1c08, /* win 14: addr=0x1c08000, size=4096 bytes */ 40fe56b9e6SYuval Mintz 0, 41fe56b9e6SYuval Mintz 0, 42fe56b9e6SYuval Mintz 0, 43fe56b9e6SYuval Mintz 0, 44fe56b9e6SYuval Mintz }; 45fe56b9e6SYuval Mintz 46fe56b9e6SYuval Mintz void qed_init_iro_array(struct qed_dev *cdev) 47fe56b9e6SYuval Mintz { 48fe56b9e6SYuval Mintz cdev->iro_arr = iro_arr; 49fe56b9e6SYuval Mintz } 50fe56b9e6SYuval Mintz 511a635e48SYuval Mintz void qed_init_store_rt_reg(struct qed_hwfn *p_hwfn, u32 rt_offset, u32 val) 52fe56b9e6SYuval Mintz { 53fc48b7a6SYuval Mintz p_hwfn->rt_data.init_val[rt_offset] = val; 54fc48b7a6SYuval Mintz p_hwfn->rt_data.b_valid[rt_offset] = true; 55fe56b9e6SYuval Mintz } 56fe56b9e6SYuval Mintz 57fe56b9e6SYuval Mintz void qed_init_store_rt_agg(struct qed_hwfn *p_hwfn, 581a635e48SYuval Mintz u32 rt_offset, u32 *p_val, size_t size) 59fe56b9e6SYuval Mintz { 60fe56b9e6SYuval Mintz size_t i; 61fe56b9e6SYuval Mintz 62fe56b9e6SYuval Mintz for (i = 0; i < size / sizeof(u32); i++) { 63fc48b7a6SYuval Mintz p_hwfn->rt_data.init_val[rt_offset + i] = p_val[i]; 64fc48b7a6SYuval Mintz p_hwfn->rt_data.b_valid[rt_offset + i] = true; 65fe56b9e6SYuval Mintz } 66fe56b9e6SYuval Mintz } 67fe56b9e6SYuval Mintz 68fc48b7a6SYuval Mintz static int qed_init_rt(struct qed_hwfn *p_hwfn, 69fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 701a635e48SYuval Mintz u32 addr, u16 rt_offset, u16 size, bool b_must_dmae) 71fe56b9e6SYuval Mintz { 72fc48b7a6SYuval Mintz u32 *p_init_val = &p_hwfn->rt_data.init_val[rt_offset]; 73fc48b7a6SYuval Mintz bool *p_valid = &p_hwfn->rt_data.b_valid[rt_offset]; 746bc82d9bSMichal Kalderon u16 i, j, segment; 75fc48b7a6SYuval Mintz int rc = 0; 76fe56b9e6SYuval Mintz 77fc48b7a6SYuval Mintz /* Since not all RT entries are initialized, go over the RT and 78fc48b7a6SYuval Mintz * for each segment of initialized values use DMA. 79fc48b7a6SYuval Mintz */ 80fe56b9e6SYuval Mintz for (i = 0; i < size; i++) { 81fc48b7a6SYuval Mintz if (!p_valid[i]) 82fe56b9e6SYuval Mintz continue; 83fc48b7a6SYuval Mintz 84fc48b7a6SYuval Mintz /* In case there isn't any wide-bus configuration here, 85fc48b7a6SYuval Mintz * simply write the data instead of using dmae. 86fc48b7a6SYuval Mintz */ 87fc48b7a6SYuval Mintz if (!b_must_dmae) { 881a635e48SYuval Mintz qed_wr(p_hwfn, p_ptt, addr + (i << 2), p_init_val[i]); 896bc82d9bSMichal Kalderon p_valid[i] = false; 90fc48b7a6SYuval Mintz continue; 91fe56b9e6SYuval Mintz } 92fc48b7a6SYuval Mintz 93fc48b7a6SYuval Mintz /* Start of a new segment */ 94fc48b7a6SYuval Mintz for (segment = 1; i + segment < size; segment++) 95fc48b7a6SYuval Mintz if (!p_valid[i + segment]) 96fc48b7a6SYuval Mintz break; 97fc48b7a6SYuval Mintz 98fc48b7a6SYuval Mintz rc = qed_dmae_host2grc(p_hwfn, p_ptt, 99fc48b7a6SYuval Mintz (uintptr_t)(p_init_val + i), 10083bf76e3SMichal Kalderon addr + (i << 2), segment, NULL); 1011a635e48SYuval Mintz if (rc) 102fc48b7a6SYuval Mintz return rc; 103fc48b7a6SYuval Mintz 1046bc82d9bSMichal Kalderon /* invalidate after writing */ 1056bc82d9bSMichal Kalderon for (j = i; j < i + segment; j++) 1066bc82d9bSMichal Kalderon p_valid[j] = false; 1076bc82d9bSMichal Kalderon 108fc48b7a6SYuval Mintz /* Jump over the entire segment, including invalid entry */ 109fc48b7a6SYuval Mintz i += segment; 110fc48b7a6SYuval Mintz } 111fc48b7a6SYuval Mintz 112fc48b7a6SYuval Mintz return rc; 113fe56b9e6SYuval Mintz } 114fe56b9e6SYuval Mintz 115fe56b9e6SYuval Mintz int qed_init_alloc(struct qed_hwfn *p_hwfn) 116fe56b9e6SYuval Mintz { 117fc48b7a6SYuval Mintz struct qed_rt_data *rt_data = &p_hwfn->rt_data; 118fe56b9e6SYuval Mintz 1191408cc1fSYuval Mintz if (IS_VF(p_hwfn->cdev)) 1201408cc1fSYuval Mintz return 0; 1211408cc1fSYuval Mintz 1226396bb22SKees Cook rt_data->b_valid = kcalloc(RUNTIME_ARRAY_SIZE, sizeof(bool), 123fc48b7a6SYuval Mintz GFP_KERNEL); 124fc48b7a6SYuval Mintz if (!rt_data->b_valid) 125fe56b9e6SYuval Mintz return -ENOMEM; 126fe56b9e6SYuval Mintz 1276396bb22SKees Cook rt_data->init_val = kcalloc(RUNTIME_ARRAY_SIZE, sizeof(u32), 128fc48b7a6SYuval Mintz GFP_KERNEL); 129fc48b7a6SYuval Mintz if (!rt_data->init_val) { 130fc48b7a6SYuval Mintz kfree(rt_data->b_valid); 1313587cb87STomer Tayar rt_data->b_valid = NULL; 132fc48b7a6SYuval Mintz return -ENOMEM; 133fc48b7a6SYuval Mintz } 134fe56b9e6SYuval Mintz 135fe56b9e6SYuval Mintz return 0; 136fe56b9e6SYuval Mintz } 137fe56b9e6SYuval Mintz 138fe56b9e6SYuval Mintz void qed_init_free(struct qed_hwfn *p_hwfn) 139fe56b9e6SYuval Mintz { 140fc48b7a6SYuval Mintz kfree(p_hwfn->rt_data.init_val); 1413587cb87STomer Tayar p_hwfn->rt_data.init_val = NULL; 142fc48b7a6SYuval Mintz kfree(p_hwfn->rt_data.b_valid); 1433587cb87STomer Tayar p_hwfn->rt_data.b_valid = NULL; 144fe56b9e6SYuval Mintz } 145fe56b9e6SYuval Mintz 146fe56b9e6SYuval Mintz static int qed_init_array_dmae(struct qed_hwfn *p_hwfn, 147fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 148fe56b9e6SYuval Mintz u32 addr, 149fe56b9e6SYuval Mintz u32 dmae_data_offset, 150fe56b9e6SYuval Mintz u32 size, 151fe56b9e6SYuval Mintz const u32 *buf, 152fe56b9e6SYuval Mintz bool b_must_dmae, 153fe56b9e6SYuval Mintz bool b_can_dmae) 154fe56b9e6SYuval Mintz { 155fe56b9e6SYuval Mintz int rc = 0; 156fe56b9e6SYuval Mintz 157fe56b9e6SYuval Mintz /* Perform DMAE only for lengthy enough sections or for wide-bus */ 158fe56b9e6SYuval Mintz if (!b_can_dmae || (!b_must_dmae && (size < 16))) { 159fe56b9e6SYuval Mintz const u32 *data = buf + dmae_data_offset; 160fe56b9e6SYuval Mintz u32 i; 161fe56b9e6SYuval Mintz 162fe56b9e6SYuval Mintz for (i = 0; i < size; i++) 163fe56b9e6SYuval Mintz qed_wr(p_hwfn, p_ptt, addr + (i << 2), data[i]); 164fe56b9e6SYuval Mintz } else { 165fe56b9e6SYuval Mintz rc = qed_dmae_host2grc(p_hwfn, p_ptt, 166fe56b9e6SYuval Mintz (uintptr_t)(buf + dmae_data_offset), 16783bf76e3SMichal Kalderon addr, size, NULL); 168fe56b9e6SYuval Mintz } 169fe56b9e6SYuval Mintz 170fe56b9e6SYuval Mintz return rc; 171fe56b9e6SYuval Mintz } 172fe56b9e6SYuval Mintz 173fe56b9e6SYuval Mintz static int qed_init_fill_dmae(struct qed_hwfn *p_hwfn, 174fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 1751a635e48SYuval Mintz u32 addr, u32 fill, u32 fill_count) 176fe56b9e6SYuval Mintz { 177fe56b9e6SYuval Mintz static u32 zero_buffer[DMAE_MAX_RW_SIZE]; 17883bf76e3SMichal Kalderon struct qed_dmae_params params = {}; 179fe56b9e6SYuval Mintz 180fe56b9e6SYuval Mintz memset(zero_buffer, 0, sizeof(u32) * DMAE_MAX_RW_SIZE); 181fe56b9e6SYuval Mintz 182fe56b9e6SYuval Mintz /* invoke the DMAE virtual/physical buffer API with 183fe56b9e6SYuval Mintz * 1. DMAE init channel 184fe56b9e6SYuval Mintz * 2. addr, 185fe56b9e6SYuval Mintz * 3. p_hwfb->temp_data, 186fe56b9e6SYuval Mintz * 4. fill_count 187fe56b9e6SYuval Mintz */ 188804c5702SMichal Kalderon SET_FIELD(params.flags, QED_DMAE_PARAMS_RW_REPL_SRC, 0x1); 189fe56b9e6SYuval Mintz return qed_dmae_host2grc(p_hwfn, p_ptt, 190fe56b9e6SYuval Mintz (uintptr_t)(&zero_buffer[0]), 19183bf76e3SMichal Kalderon addr, fill_count, ¶ms); 192fe56b9e6SYuval Mintz } 193fe56b9e6SYuval Mintz 194fe56b9e6SYuval Mintz static void qed_init_fill(struct qed_hwfn *p_hwfn, 195fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 1961a635e48SYuval Mintz u32 addr, u32 fill, u32 fill_count) 197fe56b9e6SYuval Mintz { 198fe56b9e6SYuval Mintz u32 i; 199fe56b9e6SYuval Mintz 200fe56b9e6SYuval Mintz for (i = 0; i < fill_count; i++, addr += sizeof(u32)) 201fe56b9e6SYuval Mintz qed_wr(p_hwfn, p_ptt, addr, fill); 202fe56b9e6SYuval Mintz } 203fe56b9e6SYuval Mintz 204fe56b9e6SYuval Mintz static int qed_init_cmd_array(struct qed_hwfn *p_hwfn, 205fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 206fe56b9e6SYuval Mintz struct init_write_op *cmd, 2071a635e48SYuval Mintz bool b_must_dmae, bool b_can_dmae) 208fe56b9e6SYuval Mintz { 2091a635e48SYuval Mintz u32 dmae_array_offset = le32_to_cpu(cmd->args.array_offset); 210fe56b9e6SYuval Mintz u32 data = le32_to_cpu(cmd->data); 211fe56b9e6SYuval Mintz u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2; 2121a635e48SYuval Mintz 213fe56b9e6SYuval Mintz u32 offset, output_len, input_len, max_size; 214fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 215fe56b9e6SYuval Mintz union init_array_hdr *hdr; 216fe56b9e6SYuval Mintz const u32 *array_data; 217fe56b9e6SYuval Mintz int rc = 0; 218fe56b9e6SYuval Mintz u32 size; 219fe56b9e6SYuval Mintz 220fe56b9e6SYuval Mintz array_data = cdev->fw_data->arr_data; 221fe56b9e6SYuval Mintz 2221a635e48SYuval Mintz hdr = (union init_array_hdr *)(array_data + dmae_array_offset); 223fe56b9e6SYuval Mintz data = le32_to_cpu(hdr->raw.data); 224fe56b9e6SYuval Mintz switch (GET_FIELD(data, INIT_ARRAY_RAW_HDR_TYPE)) { 225fe56b9e6SYuval Mintz case INIT_ARR_ZIPPED: 226fe56b9e6SYuval Mintz offset = dmae_array_offset + 1; 227fe56b9e6SYuval Mintz input_len = GET_FIELD(data, 228fe56b9e6SYuval Mintz INIT_ARRAY_ZIPPED_HDR_ZIPPED_SIZE); 229fe56b9e6SYuval Mintz max_size = MAX_ZIPPED_SIZE * 4; 230fe56b9e6SYuval Mintz memset(p_hwfn->unzip_buf, 0, max_size); 231fe56b9e6SYuval Mintz 232fe56b9e6SYuval Mintz output_len = qed_unzip_data(p_hwfn, input_len, 233fe56b9e6SYuval Mintz (u8 *)&array_data[offset], 234fe56b9e6SYuval Mintz max_size, (u8 *)p_hwfn->unzip_buf); 235fe56b9e6SYuval Mintz if (output_len) { 236fe56b9e6SYuval Mintz rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 0, 237fe56b9e6SYuval Mintz output_len, 238fe56b9e6SYuval Mintz p_hwfn->unzip_buf, 239fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 240fe56b9e6SYuval Mintz } else { 241fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Failed to unzip dmae data\n"); 242fe56b9e6SYuval Mintz rc = -EINVAL; 243fe56b9e6SYuval Mintz } 244fe56b9e6SYuval Mintz break; 245fe56b9e6SYuval Mintz case INIT_ARR_PATTERN: 246fe56b9e6SYuval Mintz { 247fe56b9e6SYuval Mintz u32 repeats = GET_FIELD(data, 248fe56b9e6SYuval Mintz INIT_ARRAY_PATTERN_HDR_REPETITIONS); 249fe56b9e6SYuval Mintz u32 i; 250fe56b9e6SYuval Mintz 251fe56b9e6SYuval Mintz size = GET_FIELD(data, INIT_ARRAY_PATTERN_HDR_PATTERN_SIZE); 252fe56b9e6SYuval Mintz 253fe56b9e6SYuval Mintz for (i = 0; i < repeats; i++, addr += size << 2) { 254fe56b9e6SYuval Mintz rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 255fe56b9e6SYuval Mintz dmae_array_offset + 1, 256fe56b9e6SYuval Mintz size, array_data, 257fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 258fe56b9e6SYuval Mintz if (rc) 259fe56b9e6SYuval Mintz break; 260fe56b9e6SYuval Mintz } 261fe56b9e6SYuval Mintz break; 262fe56b9e6SYuval Mintz } 263fe56b9e6SYuval Mintz case INIT_ARR_STANDARD: 264fe56b9e6SYuval Mintz size = GET_FIELD(data, INIT_ARRAY_STANDARD_HDR_SIZE); 265fe56b9e6SYuval Mintz rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 266fe56b9e6SYuval Mintz dmae_array_offset + 1, 267fe56b9e6SYuval Mintz size, array_data, 268fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 269fe56b9e6SYuval Mintz break; 270fe56b9e6SYuval Mintz } 271fe56b9e6SYuval Mintz 272fe56b9e6SYuval Mintz return rc; 273fe56b9e6SYuval Mintz } 274fe56b9e6SYuval Mintz 275fe56b9e6SYuval Mintz /* init_ops write command */ 276fe56b9e6SYuval Mintz static int qed_init_cmd_wr(struct qed_hwfn *p_hwfn, 277fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 2781a635e48SYuval Mintz struct init_write_op *p_cmd, bool b_can_dmae) 279fe56b9e6SYuval Mintz { 2801a635e48SYuval Mintz u32 data = le32_to_cpu(p_cmd->data); 281fe56b9e6SYuval Mintz bool b_must_dmae = GET_FIELD(data, INIT_WRITE_OP_WIDE_BUS); 2821a635e48SYuval Mintz u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2; 2831a635e48SYuval Mintz union init_write_args *arg = &p_cmd->args; 284fe56b9e6SYuval Mintz int rc = 0; 285fe56b9e6SYuval Mintz 286fe56b9e6SYuval Mintz /* Sanitize */ 287fe56b9e6SYuval Mintz if (b_must_dmae && !b_can_dmae) { 288fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, 289fe56b9e6SYuval Mintz "Need to write to %08x for Wide-bus but DMAE isn't allowed\n", 290fe56b9e6SYuval Mintz addr); 291fe56b9e6SYuval Mintz return -EINVAL; 292fe56b9e6SYuval Mintz } 293fe56b9e6SYuval Mintz 294fe56b9e6SYuval Mintz switch (GET_FIELD(data, INIT_WRITE_OP_SOURCE)) { 295fe56b9e6SYuval Mintz case INIT_SRC_INLINE: 29683aeb933SYuval Mintz data = le32_to_cpu(p_cmd->args.inline_val); 29783aeb933SYuval Mintz qed_wr(p_hwfn, p_ptt, addr, data); 298fe56b9e6SYuval Mintz break; 299fe56b9e6SYuval Mintz case INIT_SRC_ZEROS: 30083aeb933SYuval Mintz data = le32_to_cpu(p_cmd->args.zeros_count); 30183aeb933SYuval Mintz if (b_must_dmae || (b_can_dmae && (data >= 64))) 30283aeb933SYuval Mintz rc = qed_init_fill_dmae(p_hwfn, p_ptt, addr, 0, data); 303fe56b9e6SYuval Mintz else 30483aeb933SYuval Mintz qed_init_fill(p_hwfn, p_ptt, addr, 0, data); 305fe56b9e6SYuval Mintz break; 306fe56b9e6SYuval Mintz case INIT_SRC_ARRAY: 3071a635e48SYuval Mintz rc = qed_init_cmd_array(p_hwfn, p_ptt, p_cmd, 308fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 309fe56b9e6SYuval Mintz break; 310fe56b9e6SYuval Mintz case INIT_SRC_RUNTIME: 311fe56b9e6SYuval Mintz qed_init_rt(p_hwfn, p_ptt, addr, 312fe56b9e6SYuval Mintz le16_to_cpu(arg->runtime.offset), 313fc48b7a6SYuval Mintz le16_to_cpu(arg->runtime.size), 314fc48b7a6SYuval Mintz b_must_dmae); 315fe56b9e6SYuval Mintz break; 316fe56b9e6SYuval Mintz } 317fe56b9e6SYuval Mintz 318fe56b9e6SYuval Mintz return rc; 319fe56b9e6SYuval Mintz } 320fe56b9e6SYuval Mintz 321fe56b9e6SYuval Mintz static inline bool comp_eq(u32 val, u32 expected_val) 322fe56b9e6SYuval Mintz { 323fe56b9e6SYuval Mintz return val == expected_val; 324fe56b9e6SYuval Mintz } 325fe56b9e6SYuval Mintz 326fe56b9e6SYuval Mintz static inline bool comp_and(u32 val, u32 expected_val) 327fe56b9e6SYuval Mintz { 328fe56b9e6SYuval Mintz return (val & expected_val) == expected_val; 329fe56b9e6SYuval Mintz } 330fe56b9e6SYuval Mintz 331fe56b9e6SYuval Mintz static inline bool comp_or(u32 val, u32 expected_val) 332fe56b9e6SYuval Mintz { 333fe56b9e6SYuval Mintz return (val | expected_val) > 0; 334fe56b9e6SYuval Mintz } 335fe56b9e6SYuval Mintz 336fe56b9e6SYuval Mintz /* init_ops read/poll commands */ 337fe56b9e6SYuval Mintz static void qed_init_cmd_rd(struct qed_hwfn *p_hwfn, 3381a635e48SYuval Mintz struct qed_ptt *p_ptt, struct init_read_op *cmd) 339fe56b9e6SYuval Mintz { 340fc48b7a6SYuval Mintz bool (*comp_check)(u32 val, u32 expected_val); 341fe56b9e6SYuval Mintz u32 delay = QED_INIT_POLL_PERIOD_US, val; 342fc48b7a6SYuval Mintz u32 data, addr, poll; 343fc48b7a6SYuval Mintz int i; 344fc48b7a6SYuval Mintz 345fc48b7a6SYuval Mintz data = le32_to_cpu(cmd->op_data); 346fc48b7a6SYuval Mintz addr = GET_FIELD(data, INIT_READ_OP_ADDRESS) << 2; 347fc48b7a6SYuval Mintz poll = GET_FIELD(data, INIT_READ_OP_POLL_TYPE); 348fc48b7a6SYuval Mintz 349fe56b9e6SYuval Mintz 350fe56b9e6SYuval Mintz val = qed_rd(p_hwfn, p_ptt, addr); 351fe56b9e6SYuval Mintz 352fc48b7a6SYuval Mintz if (poll == INIT_POLL_NONE) 353fc48b7a6SYuval Mintz return; 354fe56b9e6SYuval Mintz 355fc48b7a6SYuval Mintz switch (poll) { 356fc48b7a6SYuval Mintz case INIT_POLL_EQ: 357fe56b9e6SYuval Mintz comp_check = comp_eq; 358fe56b9e6SYuval Mintz break; 359fc48b7a6SYuval Mintz case INIT_POLL_OR: 360fe56b9e6SYuval Mintz comp_check = comp_or; 361fe56b9e6SYuval Mintz break; 362fc48b7a6SYuval Mintz case INIT_POLL_AND: 363fe56b9e6SYuval Mintz comp_check = comp_and; 364fe56b9e6SYuval Mintz break; 365fe56b9e6SYuval Mintz default: 366fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Invalid poll comparison type %08x\n", 367fc48b7a6SYuval Mintz cmd->op_data); 368fe56b9e6SYuval Mintz return; 369fe56b9e6SYuval Mintz } 370fe56b9e6SYuval Mintz 371fc48b7a6SYuval Mintz data = le32_to_cpu(cmd->expected_val); 372fe56b9e6SYuval Mintz for (i = 0; 373fc48b7a6SYuval Mintz i < QED_INIT_MAX_POLL_COUNT && !comp_check(val, data); 374fe56b9e6SYuval Mintz i++) { 375fe56b9e6SYuval Mintz udelay(delay); 376fe56b9e6SYuval Mintz val = qed_rd(p_hwfn, p_ptt, addr); 377fe56b9e6SYuval Mintz } 378fe56b9e6SYuval Mintz 379fc48b7a6SYuval Mintz if (i == QED_INIT_MAX_POLL_COUNT) { 380fe56b9e6SYuval Mintz DP_ERR(p_hwfn, 381e75d039aSColin Ian King "Timeout when polling reg: 0x%08x [ Waiting-for: %08x Got: %08x (comparison %08x)]\n", 382fe56b9e6SYuval Mintz addr, le32_to_cpu(cmd->expected_val), 383fc48b7a6SYuval Mintz val, le32_to_cpu(cmd->op_data)); 384fe56b9e6SYuval Mintz } 385fe56b9e6SYuval Mintz } 386fe56b9e6SYuval Mintz 387fe56b9e6SYuval Mintz /* init_ops callbacks entry point */ 388da090917STomer Tayar static int qed_init_cmd_cb(struct qed_hwfn *p_hwfn, 389fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 390fe56b9e6SYuval Mintz struct init_callback_op *p_cmd) 391fe56b9e6SYuval Mintz { 392da090917STomer Tayar int rc; 393da090917STomer Tayar 394da090917STomer Tayar switch (p_cmd->callback_id) { 395da090917STomer Tayar case DMAE_READY_CB: 396da090917STomer Tayar rc = qed_dmae_sanity(p_hwfn, p_ptt, "engine_phase"); 397da090917STomer Tayar break; 398da090917STomer Tayar default: 399da090917STomer Tayar DP_NOTICE(p_hwfn, "Unexpected init op callback ID %d\n", 400da090917STomer Tayar p_cmd->callback_id); 401da090917STomer Tayar return -EINVAL; 402da090917STomer Tayar } 403da090917STomer Tayar 404da090917STomer Tayar return rc; 405fe56b9e6SYuval Mintz } 406fe56b9e6SYuval Mintz 407fe56b9e6SYuval Mintz static u8 qed_init_cmd_mode_match(struct qed_hwfn *p_hwfn, 4081a635e48SYuval Mintz u16 *p_offset, int modes) 409fe56b9e6SYuval Mintz { 410fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 411fe56b9e6SYuval Mintz const u8 *modes_tree_buf; 412fe56b9e6SYuval Mintz u8 arg1, arg2, tree_val; 413fe56b9e6SYuval Mintz 414fe56b9e6SYuval Mintz modes_tree_buf = cdev->fw_data->modes_tree_buf; 4151a635e48SYuval Mintz tree_val = modes_tree_buf[(*p_offset)++]; 416fe56b9e6SYuval Mintz switch (tree_val) { 417fe56b9e6SYuval Mintz case INIT_MODE_OP_NOT: 4181a635e48SYuval Mintz return qed_init_cmd_mode_match(p_hwfn, p_offset, modes) ^ 1; 419fe56b9e6SYuval Mintz case INIT_MODE_OP_OR: 4201a635e48SYuval Mintz arg1 = qed_init_cmd_mode_match(p_hwfn, p_offset, modes); 4211a635e48SYuval Mintz arg2 = qed_init_cmd_mode_match(p_hwfn, p_offset, modes); 422fe56b9e6SYuval Mintz return arg1 | arg2; 423fe56b9e6SYuval Mintz case INIT_MODE_OP_AND: 4241a635e48SYuval Mintz arg1 = qed_init_cmd_mode_match(p_hwfn, p_offset, modes); 4251a635e48SYuval Mintz arg2 = qed_init_cmd_mode_match(p_hwfn, p_offset, modes); 426fe56b9e6SYuval Mintz return arg1 & arg2; 427fe56b9e6SYuval Mintz default: 428fe56b9e6SYuval Mintz tree_val -= MAX_INIT_MODE_OPS; 4291a635e48SYuval Mintz return (modes & BIT(tree_val)) ? 1 : 0; 430fe56b9e6SYuval Mintz } 431fe56b9e6SYuval Mintz } 432fe56b9e6SYuval Mintz 433fe56b9e6SYuval Mintz static u32 qed_init_cmd_mode(struct qed_hwfn *p_hwfn, 4341a635e48SYuval Mintz struct init_if_mode_op *p_cmd, int modes) 435fe56b9e6SYuval Mintz { 436fe56b9e6SYuval Mintz u16 offset = le16_to_cpu(p_cmd->modes_buf_offset); 437fe56b9e6SYuval Mintz 438fe56b9e6SYuval Mintz if (qed_init_cmd_mode_match(p_hwfn, &offset, modes)) 439fe56b9e6SYuval Mintz return 0; 440fe56b9e6SYuval Mintz else 441fe56b9e6SYuval Mintz return GET_FIELD(le32_to_cpu(p_cmd->op_data), 442fe56b9e6SYuval Mintz INIT_IF_MODE_OP_CMD_OFFSET); 443fe56b9e6SYuval Mintz } 444fe56b9e6SYuval Mintz 445fe56b9e6SYuval Mintz static u32 qed_init_cmd_phase(struct qed_hwfn *p_hwfn, 446fe56b9e6SYuval Mintz struct init_if_phase_op *p_cmd, 4471a635e48SYuval Mintz u32 phase, u32 phase_id) 448fe56b9e6SYuval Mintz { 449fe56b9e6SYuval Mintz u32 data = le32_to_cpu(p_cmd->phase_data); 450fe56b9e6SYuval Mintz u32 op_data = le32_to_cpu(p_cmd->op_data); 451fe56b9e6SYuval Mintz 452fe56b9e6SYuval Mintz if (!(GET_FIELD(data, INIT_IF_PHASE_OP_PHASE) == phase && 453fe56b9e6SYuval Mintz (GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == ANY_PHASE_ID || 454fe56b9e6SYuval Mintz GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == phase_id))) 455fe56b9e6SYuval Mintz return GET_FIELD(op_data, INIT_IF_PHASE_OP_CMD_OFFSET); 456fe56b9e6SYuval Mintz else 457fe56b9e6SYuval Mintz return 0; 458fe56b9e6SYuval Mintz } 459fe56b9e6SYuval Mintz 460fe56b9e6SYuval Mintz int qed_init_run(struct qed_hwfn *p_hwfn, 4611a635e48SYuval Mintz struct qed_ptt *p_ptt, int phase, int phase_id, int modes) 462fe56b9e6SYuval Mintz { 4630500a70dSMichal Kalderon bool b_dmae = (phase != PHASE_ENGINE); 464fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 465fe56b9e6SYuval Mintz u32 cmd_num, num_init_ops; 466fe56b9e6SYuval Mintz union init_op *init_ops; 467fe56b9e6SYuval Mintz int rc = 0; 468fe56b9e6SYuval Mintz 469fe56b9e6SYuval Mintz num_init_ops = cdev->fw_data->init_ops_size; 470fe56b9e6SYuval Mintz init_ops = cdev->fw_data->init_ops; 471fe56b9e6SYuval Mintz 472fe56b9e6SYuval Mintz p_hwfn->unzip_buf = kzalloc(MAX_ZIPPED_SIZE * 4, GFP_ATOMIC); 4732591c280SJoe Perches if (!p_hwfn->unzip_buf) 474fe56b9e6SYuval Mintz return -ENOMEM; 475fe56b9e6SYuval Mintz 476fe56b9e6SYuval Mintz for (cmd_num = 0; cmd_num < num_init_ops; cmd_num++) { 477fe56b9e6SYuval Mintz union init_op *cmd = &init_ops[cmd_num]; 478fe56b9e6SYuval Mintz u32 data = le32_to_cpu(cmd->raw.op_data); 479fe56b9e6SYuval Mintz 480fe56b9e6SYuval Mintz switch (GET_FIELD(data, INIT_CALLBACK_OP_OP)) { 481fe56b9e6SYuval Mintz case INIT_OP_WRITE: 482fe56b9e6SYuval Mintz rc = qed_init_cmd_wr(p_hwfn, p_ptt, &cmd->write, 483fe56b9e6SYuval Mintz b_dmae); 484fe56b9e6SYuval Mintz break; 485fe56b9e6SYuval Mintz case INIT_OP_READ: 486fe56b9e6SYuval Mintz qed_init_cmd_rd(p_hwfn, p_ptt, &cmd->read); 487fe56b9e6SYuval Mintz break; 488fe56b9e6SYuval Mintz case INIT_OP_IF_MODE: 489fe56b9e6SYuval Mintz cmd_num += qed_init_cmd_mode(p_hwfn, &cmd->if_mode, 490fe56b9e6SYuval Mintz modes); 491fe56b9e6SYuval Mintz break; 492fe56b9e6SYuval Mintz case INIT_OP_IF_PHASE: 493fe56b9e6SYuval Mintz cmd_num += qed_init_cmd_phase(p_hwfn, &cmd->if_phase, 494fe56b9e6SYuval Mintz phase, phase_id); 495fe56b9e6SYuval Mintz break; 496fe56b9e6SYuval Mintz case INIT_OP_DELAY: 497fe56b9e6SYuval Mintz /* qed_init_run is always invoked from 498fe56b9e6SYuval Mintz * sleep-able context 499fe56b9e6SYuval Mintz */ 500fe56b9e6SYuval Mintz udelay(le32_to_cpu(cmd->delay.delay)); 501fe56b9e6SYuval Mintz break; 502fe56b9e6SYuval Mintz 503fe56b9e6SYuval Mintz case INIT_OP_CALLBACK: 504da090917STomer Tayar rc = qed_init_cmd_cb(p_hwfn, p_ptt, &cmd->callback); 5050500a70dSMichal Kalderon if (phase == PHASE_ENGINE && 5060500a70dSMichal Kalderon cmd->callback.callback_id == DMAE_READY_CB) 5070500a70dSMichal Kalderon b_dmae = true; 508fe56b9e6SYuval Mintz break; 509fe56b9e6SYuval Mintz } 510fe56b9e6SYuval Mintz 511fe56b9e6SYuval Mintz if (rc) 512fe56b9e6SYuval Mintz break; 513fe56b9e6SYuval Mintz } 514fe56b9e6SYuval Mintz 515fe56b9e6SYuval Mintz kfree(p_hwfn->unzip_buf); 5163587cb87STomer Tayar p_hwfn->unzip_buf = NULL; 517fe56b9e6SYuval Mintz return rc; 518fe56b9e6SYuval Mintz } 519fe56b9e6SYuval Mintz 520fe56b9e6SYuval Mintz void qed_gtt_init(struct qed_hwfn *p_hwfn) 521fe56b9e6SYuval Mintz { 522fe56b9e6SYuval Mintz u32 gtt_base; 523fe56b9e6SYuval Mintz u32 i; 524fe56b9e6SYuval Mintz 525fe56b9e6SYuval Mintz /* Set the global windows */ 526fe56b9e6SYuval Mintz gtt_base = PXP_PF_WINDOW_ADMIN_START + PXP_PF_WINDOW_ADMIN_GLOBAL_START; 527fe56b9e6SYuval Mintz 528fe56b9e6SYuval Mintz for (i = 0; i < ARRAY_SIZE(pxp_global_win); i++) 529fe56b9e6SYuval Mintz if (pxp_global_win[i]) 530fe56b9e6SYuval Mintz REG_WR(p_hwfn, gtt_base + i * PXP_GLOBAL_ENTRY_SIZE, 531fe56b9e6SYuval Mintz pxp_global_win[i]); 532fe56b9e6SYuval Mintz } 533fe56b9e6SYuval Mintz 534351a4dedSYuval Mintz int qed_init_fw_data(struct qed_dev *cdev, const u8 *data) 535fe56b9e6SYuval Mintz { 536fe56b9e6SYuval Mintz struct qed_fw_data *fw = cdev->fw_data; 537fe56b9e6SYuval Mintz struct bin_buffer_hdr *buf_hdr; 538fe56b9e6SYuval Mintz u32 offset, len; 539fe56b9e6SYuval Mintz 540fe56b9e6SYuval Mintz if (!data) { 541fe56b9e6SYuval Mintz DP_NOTICE(cdev, "Invalid fw data\n"); 542fe56b9e6SYuval Mintz return -EINVAL; 543fe56b9e6SYuval Mintz } 544fe56b9e6SYuval Mintz 545351a4dedSYuval Mintz /* First Dword contains metadata and should be skipped */ 546be086e7cSMintz, Yuval buf_hdr = (struct bin_buffer_hdr *)data; 547351a4dedSYuval Mintz 54805fafbfbSYuval Mintz offset = buf_hdr[BIN_BUF_INIT_FW_VER_INFO].offset; 549351a4dedSYuval Mintz fw->fw_ver_info = (struct fw_ver_info *)(data + offset); 550fe56b9e6SYuval Mintz 551fe56b9e6SYuval Mintz offset = buf_hdr[BIN_BUF_INIT_CMD].offset; 552fe56b9e6SYuval Mintz fw->init_ops = (union init_op *)(data + offset); 553fe56b9e6SYuval Mintz 554fe56b9e6SYuval Mintz offset = buf_hdr[BIN_BUF_INIT_VAL].offset; 555fe56b9e6SYuval Mintz fw->arr_data = (u32 *)(data + offset); 556fe56b9e6SYuval Mintz 557fe56b9e6SYuval Mintz offset = buf_hdr[BIN_BUF_INIT_MODE_TREE].offset; 558fe56b9e6SYuval Mintz fw->modes_tree_buf = (u8 *)(data + offset); 559fe56b9e6SYuval Mintz len = buf_hdr[BIN_BUF_INIT_CMD].length; 560fe56b9e6SYuval Mintz fw->init_ops_size = len / sizeof(struct init_raw_op); 561fe56b9e6SYuval Mintz 56230d5f858SMichal Kalderon offset = buf_hdr[BIN_BUF_INIT_OVERLAYS].offset; 56330d5f858SMichal Kalderon fw->fw_overlays = (u32 *)(data + offset); 56430d5f858SMichal Kalderon len = buf_hdr[BIN_BUF_INIT_OVERLAYS].length; 56530d5f858SMichal Kalderon fw->fw_overlays_len = len; 56630d5f858SMichal Kalderon 567fe56b9e6SYuval Mintz return 0; 568fe56b9e6SYuval Mintz } 569