1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 2fe56b9e6SYuval Mintz * Copyright (c) 2015 QLogic Corporation 3fe56b9e6SYuval Mintz * 4fe56b9e6SYuval Mintz * This software is available under the terms of the GNU General Public License 5fe56b9e6SYuval Mintz * (GPL) Version 2, available from the file COPYING in the main directory of 6fe56b9e6SYuval Mintz * this source tree. 7fe56b9e6SYuval Mintz */ 8fe56b9e6SYuval Mintz 9fe56b9e6SYuval Mintz #include <linux/types.h> 10fe56b9e6SYuval Mintz #include <linux/io.h> 11fe56b9e6SYuval Mintz #include <linux/delay.h> 12fe56b9e6SYuval Mintz #include <linux/errno.h> 13fe56b9e6SYuval Mintz #include <linux/kernel.h> 14fe56b9e6SYuval Mintz #include <linux/slab.h> 15fe56b9e6SYuval Mintz #include <linux/string.h> 16fe56b9e6SYuval Mintz #include "qed.h" 17fe56b9e6SYuval Mintz #include "qed_hsi.h" 18fe56b9e6SYuval Mintz #include "qed_hw.h" 19fe56b9e6SYuval Mintz #include "qed_init_ops.h" 20fe56b9e6SYuval Mintz #include "qed_reg_addr.h" 211408cc1fSYuval Mintz #include "qed_sriov.h" 22fe56b9e6SYuval Mintz 23fe56b9e6SYuval Mintz #define QED_INIT_MAX_POLL_COUNT 100 24fe56b9e6SYuval Mintz #define QED_INIT_POLL_PERIOD_US 500 25fe56b9e6SYuval Mintz 26fe56b9e6SYuval Mintz static u32 pxp_global_win[] = { 27fe56b9e6SYuval Mintz 0, 28fe56b9e6SYuval Mintz 0, 29fe56b9e6SYuval Mintz 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */ 30fe56b9e6SYuval Mintz 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */ 31fe56b9e6SYuval Mintz 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */ 32fe56b9e6SYuval Mintz 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */ 33fe56b9e6SYuval Mintz 0x1d80, /* win 6: addr=0x1d80000, size=4096 bytes */ 34fe56b9e6SYuval Mintz 0x1d81, /* win 7: addr=0x1d81000, size=4096 bytes */ 35fe56b9e6SYuval Mintz 0x1d82, /* win 8: addr=0x1d82000, size=4096 bytes */ 36fe56b9e6SYuval Mintz 0x1e00, /* win 9: addr=0x1e00000, size=4096 bytes */ 37fe56b9e6SYuval Mintz 0x1e80, /* win 10: addr=0x1e80000, size=4096 bytes */ 38fe56b9e6SYuval Mintz 0x1f00, /* win 11: addr=0x1f00000, size=4096 bytes */ 39fe56b9e6SYuval Mintz 0, 40fe56b9e6SYuval Mintz 0, 41fe56b9e6SYuval Mintz 0, 42fe56b9e6SYuval Mintz 0, 43fe56b9e6SYuval Mintz 0, 44fe56b9e6SYuval Mintz 0, 45fe56b9e6SYuval Mintz 0, 46fe56b9e6SYuval Mintz }; 47fe56b9e6SYuval Mintz 48fe56b9e6SYuval Mintz void qed_init_iro_array(struct qed_dev *cdev) 49fe56b9e6SYuval Mintz { 50fe56b9e6SYuval Mintz cdev->iro_arr = iro_arr; 51fe56b9e6SYuval Mintz } 52fe56b9e6SYuval Mintz 53fe56b9e6SYuval Mintz /* Runtime configuration helpers */ 54fe56b9e6SYuval Mintz void qed_init_clear_rt_data(struct qed_hwfn *p_hwfn) 55fe56b9e6SYuval Mintz { 56fe56b9e6SYuval Mintz int i; 57fe56b9e6SYuval Mintz 58fe56b9e6SYuval Mintz for (i = 0; i < RUNTIME_ARRAY_SIZE; i++) 59fc48b7a6SYuval Mintz p_hwfn->rt_data.b_valid[i] = false; 60fe56b9e6SYuval Mintz } 61fe56b9e6SYuval Mintz 621a635e48SYuval Mintz void qed_init_store_rt_reg(struct qed_hwfn *p_hwfn, u32 rt_offset, u32 val) 63fe56b9e6SYuval Mintz { 64fc48b7a6SYuval Mintz p_hwfn->rt_data.init_val[rt_offset] = val; 65fc48b7a6SYuval Mintz p_hwfn->rt_data.b_valid[rt_offset] = true; 66fe56b9e6SYuval Mintz } 67fe56b9e6SYuval Mintz 68fe56b9e6SYuval Mintz void qed_init_store_rt_agg(struct qed_hwfn *p_hwfn, 691a635e48SYuval Mintz u32 rt_offset, u32 *p_val, size_t size) 70fe56b9e6SYuval Mintz { 71fe56b9e6SYuval Mintz size_t i; 72fe56b9e6SYuval Mintz 73fe56b9e6SYuval Mintz for (i = 0; i < size / sizeof(u32); i++) { 74fc48b7a6SYuval Mintz p_hwfn->rt_data.init_val[rt_offset + i] = p_val[i]; 75fc48b7a6SYuval Mintz p_hwfn->rt_data.b_valid[rt_offset + i] = true; 76fe56b9e6SYuval Mintz } 77fe56b9e6SYuval Mintz } 78fe56b9e6SYuval Mintz 79fc48b7a6SYuval Mintz static int qed_init_rt(struct qed_hwfn *p_hwfn, 80fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 811a635e48SYuval Mintz u32 addr, u16 rt_offset, u16 size, bool b_must_dmae) 82fe56b9e6SYuval Mintz { 83fc48b7a6SYuval Mintz u32 *p_init_val = &p_hwfn->rt_data.init_val[rt_offset]; 84fc48b7a6SYuval Mintz bool *p_valid = &p_hwfn->rt_data.b_valid[rt_offset]; 85fc48b7a6SYuval Mintz u16 i, segment; 86fc48b7a6SYuval Mintz int rc = 0; 87fe56b9e6SYuval Mintz 88fc48b7a6SYuval Mintz /* Since not all RT entries are initialized, go over the RT and 89fc48b7a6SYuval Mintz * for each segment of initialized values use DMA. 90fc48b7a6SYuval Mintz */ 91fe56b9e6SYuval Mintz for (i = 0; i < size; i++) { 92fc48b7a6SYuval Mintz if (!p_valid[i]) 93fe56b9e6SYuval Mintz continue; 94fc48b7a6SYuval Mintz 95fc48b7a6SYuval Mintz /* In case there isn't any wide-bus configuration here, 96fc48b7a6SYuval Mintz * simply write the data instead of using dmae. 97fc48b7a6SYuval Mintz */ 98fc48b7a6SYuval Mintz if (!b_must_dmae) { 991a635e48SYuval Mintz qed_wr(p_hwfn, p_ptt, addr + (i << 2), p_init_val[i]); 100fc48b7a6SYuval Mintz continue; 101fe56b9e6SYuval Mintz } 102fc48b7a6SYuval Mintz 103fc48b7a6SYuval Mintz /* Start of a new segment */ 104fc48b7a6SYuval Mintz for (segment = 1; i + segment < size; segment++) 105fc48b7a6SYuval Mintz if (!p_valid[i + segment]) 106fc48b7a6SYuval Mintz break; 107fc48b7a6SYuval Mintz 108fc48b7a6SYuval Mintz rc = qed_dmae_host2grc(p_hwfn, p_ptt, 109fc48b7a6SYuval Mintz (uintptr_t)(p_init_val + i), 110fc48b7a6SYuval Mintz addr + (i << 2), segment, 0); 1111a635e48SYuval Mintz if (rc) 112fc48b7a6SYuval Mintz return rc; 113fc48b7a6SYuval Mintz 114fc48b7a6SYuval Mintz /* Jump over the entire segment, including invalid entry */ 115fc48b7a6SYuval Mintz i += segment; 116fc48b7a6SYuval Mintz } 117fc48b7a6SYuval Mintz 118fc48b7a6SYuval Mintz return rc; 119fe56b9e6SYuval Mintz } 120fe56b9e6SYuval Mintz 121fe56b9e6SYuval Mintz int qed_init_alloc(struct qed_hwfn *p_hwfn) 122fe56b9e6SYuval Mintz { 123fc48b7a6SYuval Mintz struct qed_rt_data *rt_data = &p_hwfn->rt_data; 124fe56b9e6SYuval Mintz 1251408cc1fSYuval Mintz if (IS_VF(p_hwfn->cdev)) 1261408cc1fSYuval Mintz return 0; 1271408cc1fSYuval Mintz 128fc48b7a6SYuval Mintz rt_data->b_valid = kzalloc(sizeof(bool) * RUNTIME_ARRAY_SIZE, 129fc48b7a6SYuval Mintz GFP_KERNEL); 130fc48b7a6SYuval Mintz if (!rt_data->b_valid) 131fe56b9e6SYuval Mintz return -ENOMEM; 132fe56b9e6SYuval Mintz 133fc48b7a6SYuval Mintz rt_data->init_val = kzalloc(sizeof(u32) * RUNTIME_ARRAY_SIZE, 134fc48b7a6SYuval Mintz GFP_KERNEL); 135fc48b7a6SYuval Mintz if (!rt_data->init_val) { 136fc48b7a6SYuval Mintz kfree(rt_data->b_valid); 137fc48b7a6SYuval Mintz return -ENOMEM; 138fc48b7a6SYuval Mintz } 139fe56b9e6SYuval Mintz 140fe56b9e6SYuval Mintz return 0; 141fe56b9e6SYuval Mintz } 142fe56b9e6SYuval Mintz 143fe56b9e6SYuval Mintz void qed_init_free(struct qed_hwfn *p_hwfn) 144fe56b9e6SYuval Mintz { 145fc48b7a6SYuval Mintz kfree(p_hwfn->rt_data.init_val); 146fc48b7a6SYuval Mintz kfree(p_hwfn->rt_data.b_valid); 147fe56b9e6SYuval Mintz } 148fe56b9e6SYuval Mintz 149fe56b9e6SYuval Mintz static int qed_init_array_dmae(struct qed_hwfn *p_hwfn, 150fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 151fe56b9e6SYuval Mintz u32 addr, 152fe56b9e6SYuval Mintz u32 dmae_data_offset, 153fe56b9e6SYuval Mintz u32 size, 154fe56b9e6SYuval Mintz const u32 *buf, 155fe56b9e6SYuval Mintz bool b_must_dmae, 156fe56b9e6SYuval Mintz bool b_can_dmae) 157fe56b9e6SYuval Mintz { 158fe56b9e6SYuval Mintz int rc = 0; 159fe56b9e6SYuval Mintz 160fe56b9e6SYuval Mintz /* Perform DMAE only for lengthy enough sections or for wide-bus */ 161fe56b9e6SYuval Mintz if (!b_can_dmae || (!b_must_dmae && (size < 16))) { 162fe56b9e6SYuval Mintz const u32 *data = buf + dmae_data_offset; 163fe56b9e6SYuval Mintz u32 i; 164fe56b9e6SYuval Mintz 165fe56b9e6SYuval Mintz for (i = 0; i < size; i++) 166fe56b9e6SYuval Mintz qed_wr(p_hwfn, p_ptt, addr + (i << 2), data[i]); 167fe56b9e6SYuval Mintz } else { 168fe56b9e6SYuval Mintz rc = qed_dmae_host2grc(p_hwfn, p_ptt, 169fe56b9e6SYuval Mintz (uintptr_t)(buf + dmae_data_offset), 170fe56b9e6SYuval Mintz addr, size, 0); 171fe56b9e6SYuval Mintz } 172fe56b9e6SYuval Mintz 173fe56b9e6SYuval Mintz return rc; 174fe56b9e6SYuval Mintz } 175fe56b9e6SYuval Mintz 176fe56b9e6SYuval Mintz static int qed_init_fill_dmae(struct qed_hwfn *p_hwfn, 177fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 1781a635e48SYuval Mintz u32 addr, u32 fill, u32 fill_count) 179fe56b9e6SYuval Mintz { 180fe56b9e6SYuval Mintz static u32 zero_buffer[DMAE_MAX_RW_SIZE]; 181fe56b9e6SYuval Mintz 182fe56b9e6SYuval Mintz memset(zero_buffer, 0, sizeof(u32) * DMAE_MAX_RW_SIZE); 183fe56b9e6SYuval Mintz 184fe56b9e6SYuval Mintz /* invoke the DMAE virtual/physical buffer API with 185fe56b9e6SYuval Mintz * 1. DMAE init channel 186fe56b9e6SYuval Mintz * 2. addr, 187fe56b9e6SYuval Mintz * 3. p_hwfb->temp_data, 188fe56b9e6SYuval Mintz * 4. fill_count 189fe56b9e6SYuval Mintz */ 190fe56b9e6SYuval Mintz 191fe56b9e6SYuval Mintz return qed_dmae_host2grc(p_hwfn, p_ptt, 192fe56b9e6SYuval Mintz (uintptr_t)(&zero_buffer[0]), 1931a635e48SYuval Mintz addr, fill_count, QED_DMAE_FLAG_RW_REPL_SRC); 194fe56b9e6SYuval Mintz } 195fe56b9e6SYuval Mintz 196fe56b9e6SYuval Mintz static void qed_init_fill(struct qed_hwfn *p_hwfn, 197fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 1981a635e48SYuval Mintz u32 addr, u32 fill, u32 fill_count) 199fe56b9e6SYuval Mintz { 200fe56b9e6SYuval Mintz u32 i; 201fe56b9e6SYuval Mintz 202fe56b9e6SYuval Mintz for (i = 0; i < fill_count; i++, addr += sizeof(u32)) 203fe56b9e6SYuval Mintz qed_wr(p_hwfn, p_ptt, addr, fill); 204fe56b9e6SYuval Mintz } 205fe56b9e6SYuval Mintz 206fe56b9e6SYuval Mintz static int qed_init_cmd_array(struct qed_hwfn *p_hwfn, 207fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 208fe56b9e6SYuval Mintz struct init_write_op *cmd, 2091a635e48SYuval Mintz bool b_must_dmae, bool b_can_dmae) 210fe56b9e6SYuval Mintz { 2111a635e48SYuval Mintz u32 dmae_array_offset = le32_to_cpu(cmd->args.array_offset); 212fe56b9e6SYuval Mintz u32 data = le32_to_cpu(cmd->data); 213fe56b9e6SYuval Mintz u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2; 2141a635e48SYuval Mintz 215fe56b9e6SYuval Mintz u32 offset, output_len, input_len, max_size; 216fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 217fe56b9e6SYuval Mintz union init_array_hdr *hdr; 218fe56b9e6SYuval Mintz const u32 *array_data; 219fe56b9e6SYuval Mintz int rc = 0; 220fe56b9e6SYuval Mintz u32 size; 221fe56b9e6SYuval Mintz 222fe56b9e6SYuval Mintz array_data = cdev->fw_data->arr_data; 223fe56b9e6SYuval Mintz 2241a635e48SYuval Mintz hdr = (union init_array_hdr *)(array_data + dmae_array_offset); 225fe56b9e6SYuval Mintz data = le32_to_cpu(hdr->raw.data); 226fe56b9e6SYuval Mintz switch (GET_FIELD(data, INIT_ARRAY_RAW_HDR_TYPE)) { 227fe56b9e6SYuval Mintz case INIT_ARR_ZIPPED: 228fe56b9e6SYuval Mintz offset = dmae_array_offset + 1; 229fe56b9e6SYuval Mintz input_len = GET_FIELD(data, 230fe56b9e6SYuval Mintz INIT_ARRAY_ZIPPED_HDR_ZIPPED_SIZE); 231fe56b9e6SYuval Mintz max_size = MAX_ZIPPED_SIZE * 4; 232fe56b9e6SYuval Mintz memset(p_hwfn->unzip_buf, 0, max_size); 233fe56b9e6SYuval Mintz 234fe56b9e6SYuval Mintz output_len = qed_unzip_data(p_hwfn, input_len, 235fe56b9e6SYuval Mintz (u8 *)&array_data[offset], 236fe56b9e6SYuval Mintz max_size, (u8 *)p_hwfn->unzip_buf); 237fe56b9e6SYuval Mintz if (output_len) { 238fe56b9e6SYuval Mintz rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 0, 239fe56b9e6SYuval Mintz output_len, 240fe56b9e6SYuval Mintz p_hwfn->unzip_buf, 241fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 242fe56b9e6SYuval Mintz } else { 243fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Failed to unzip dmae data\n"); 244fe56b9e6SYuval Mintz rc = -EINVAL; 245fe56b9e6SYuval Mintz } 246fe56b9e6SYuval Mintz break; 247fe56b9e6SYuval Mintz case INIT_ARR_PATTERN: 248fe56b9e6SYuval Mintz { 249fe56b9e6SYuval Mintz u32 repeats = GET_FIELD(data, 250fe56b9e6SYuval Mintz INIT_ARRAY_PATTERN_HDR_REPETITIONS); 251fe56b9e6SYuval Mintz u32 i; 252fe56b9e6SYuval Mintz 253fe56b9e6SYuval Mintz size = GET_FIELD(data, INIT_ARRAY_PATTERN_HDR_PATTERN_SIZE); 254fe56b9e6SYuval Mintz 255fe56b9e6SYuval Mintz for (i = 0; i < repeats; i++, addr += size << 2) { 256fe56b9e6SYuval Mintz rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 257fe56b9e6SYuval Mintz dmae_array_offset + 1, 258fe56b9e6SYuval Mintz size, array_data, 259fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 260fe56b9e6SYuval Mintz if (rc) 261fe56b9e6SYuval Mintz break; 262fe56b9e6SYuval Mintz } 263fe56b9e6SYuval Mintz break; 264fe56b9e6SYuval Mintz } 265fe56b9e6SYuval Mintz case INIT_ARR_STANDARD: 266fe56b9e6SYuval Mintz size = GET_FIELD(data, INIT_ARRAY_STANDARD_HDR_SIZE); 267fe56b9e6SYuval Mintz rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 268fe56b9e6SYuval Mintz dmae_array_offset + 1, 269fe56b9e6SYuval Mintz size, array_data, 270fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 271fe56b9e6SYuval Mintz break; 272fe56b9e6SYuval Mintz } 273fe56b9e6SYuval Mintz 274fe56b9e6SYuval Mintz return rc; 275fe56b9e6SYuval Mintz } 276fe56b9e6SYuval Mintz 277fe56b9e6SYuval Mintz /* init_ops write command */ 278fe56b9e6SYuval Mintz static int qed_init_cmd_wr(struct qed_hwfn *p_hwfn, 279fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 2801a635e48SYuval Mintz struct init_write_op *p_cmd, bool b_can_dmae) 281fe56b9e6SYuval Mintz { 2821a635e48SYuval Mintz u32 data = le32_to_cpu(p_cmd->data); 283fe56b9e6SYuval Mintz bool b_must_dmae = GET_FIELD(data, INIT_WRITE_OP_WIDE_BUS); 2841a635e48SYuval Mintz u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2; 2851a635e48SYuval Mintz union init_write_args *arg = &p_cmd->args; 286fe56b9e6SYuval Mintz int rc = 0; 287fe56b9e6SYuval Mintz 288fe56b9e6SYuval Mintz /* Sanitize */ 289fe56b9e6SYuval Mintz if (b_must_dmae && !b_can_dmae) { 290fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, 291fe56b9e6SYuval Mintz "Need to write to %08x for Wide-bus but DMAE isn't allowed\n", 292fe56b9e6SYuval Mintz addr); 293fe56b9e6SYuval Mintz return -EINVAL; 294fe56b9e6SYuval Mintz } 295fe56b9e6SYuval Mintz 296fe56b9e6SYuval Mintz switch (GET_FIELD(data, INIT_WRITE_OP_SOURCE)) { 297fe56b9e6SYuval Mintz case INIT_SRC_INLINE: 29883aeb933SYuval Mintz data = le32_to_cpu(p_cmd->args.inline_val); 29983aeb933SYuval Mintz qed_wr(p_hwfn, p_ptt, addr, data); 300fe56b9e6SYuval Mintz break; 301fe56b9e6SYuval Mintz case INIT_SRC_ZEROS: 30283aeb933SYuval Mintz data = le32_to_cpu(p_cmd->args.zeros_count); 30383aeb933SYuval Mintz if (b_must_dmae || (b_can_dmae && (data >= 64))) 30483aeb933SYuval Mintz rc = qed_init_fill_dmae(p_hwfn, p_ptt, addr, 0, data); 305fe56b9e6SYuval Mintz else 30683aeb933SYuval Mintz qed_init_fill(p_hwfn, p_ptt, addr, 0, data); 307fe56b9e6SYuval Mintz break; 308fe56b9e6SYuval Mintz case INIT_SRC_ARRAY: 3091a635e48SYuval Mintz rc = qed_init_cmd_array(p_hwfn, p_ptt, p_cmd, 310fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 311fe56b9e6SYuval Mintz break; 312fe56b9e6SYuval Mintz case INIT_SRC_RUNTIME: 313fe56b9e6SYuval Mintz qed_init_rt(p_hwfn, p_ptt, addr, 314fe56b9e6SYuval Mintz le16_to_cpu(arg->runtime.offset), 315fc48b7a6SYuval Mintz le16_to_cpu(arg->runtime.size), 316fc48b7a6SYuval Mintz b_must_dmae); 317fe56b9e6SYuval Mintz break; 318fe56b9e6SYuval Mintz } 319fe56b9e6SYuval Mintz 320fe56b9e6SYuval Mintz return rc; 321fe56b9e6SYuval Mintz } 322fe56b9e6SYuval Mintz 323fe56b9e6SYuval Mintz static inline bool comp_eq(u32 val, u32 expected_val) 324fe56b9e6SYuval Mintz { 325fe56b9e6SYuval Mintz return val == expected_val; 326fe56b9e6SYuval Mintz } 327fe56b9e6SYuval Mintz 328fe56b9e6SYuval Mintz static inline bool comp_and(u32 val, u32 expected_val) 329fe56b9e6SYuval Mintz { 330fe56b9e6SYuval Mintz return (val & expected_val) == expected_val; 331fe56b9e6SYuval Mintz } 332fe56b9e6SYuval Mintz 333fe56b9e6SYuval Mintz static inline bool comp_or(u32 val, u32 expected_val) 334fe56b9e6SYuval Mintz { 335fe56b9e6SYuval Mintz return (val | expected_val) > 0; 336fe56b9e6SYuval Mintz } 337fe56b9e6SYuval Mintz 338fe56b9e6SYuval Mintz /* init_ops read/poll commands */ 339fe56b9e6SYuval Mintz static void qed_init_cmd_rd(struct qed_hwfn *p_hwfn, 3401a635e48SYuval Mintz struct qed_ptt *p_ptt, struct init_read_op *cmd) 341fe56b9e6SYuval Mintz { 342fc48b7a6SYuval Mintz bool (*comp_check)(u32 val, u32 expected_val); 343fe56b9e6SYuval Mintz u32 delay = QED_INIT_POLL_PERIOD_US, val; 344fc48b7a6SYuval Mintz u32 data, addr, poll; 345fc48b7a6SYuval Mintz int i; 346fc48b7a6SYuval Mintz 347fc48b7a6SYuval Mintz data = le32_to_cpu(cmd->op_data); 348fc48b7a6SYuval Mintz addr = GET_FIELD(data, INIT_READ_OP_ADDRESS) << 2; 349fc48b7a6SYuval Mintz poll = GET_FIELD(data, INIT_READ_OP_POLL_TYPE); 350fc48b7a6SYuval Mintz 351fe56b9e6SYuval Mintz 352fe56b9e6SYuval Mintz val = qed_rd(p_hwfn, p_ptt, addr); 353fe56b9e6SYuval Mintz 354fc48b7a6SYuval Mintz if (poll == INIT_POLL_NONE) 355fc48b7a6SYuval Mintz return; 356fe56b9e6SYuval Mintz 357fc48b7a6SYuval Mintz switch (poll) { 358fc48b7a6SYuval Mintz case INIT_POLL_EQ: 359fe56b9e6SYuval Mintz comp_check = comp_eq; 360fe56b9e6SYuval Mintz break; 361fc48b7a6SYuval Mintz case INIT_POLL_OR: 362fe56b9e6SYuval Mintz comp_check = comp_or; 363fe56b9e6SYuval Mintz break; 364fc48b7a6SYuval Mintz case INIT_POLL_AND: 365fe56b9e6SYuval Mintz comp_check = comp_and; 366fe56b9e6SYuval Mintz break; 367fe56b9e6SYuval Mintz default: 368fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Invalid poll comparison type %08x\n", 369fc48b7a6SYuval Mintz cmd->op_data); 370fe56b9e6SYuval Mintz return; 371fe56b9e6SYuval Mintz } 372fe56b9e6SYuval Mintz 373fc48b7a6SYuval Mintz data = le32_to_cpu(cmd->expected_val); 374fe56b9e6SYuval Mintz for (i = 0; 375fc48b7a6SYuval Mintz i < QED_INIT_MAX_POLL_COUNT && !comp_check(val, data); 376fe56b9e6SYuval Mintz i++) { 377fe56b9e6SYuval Mintz udelay(delay); 378fe56b9e6SYuval Mintz val = qed_rd(p_hwfn, p_ptt, addr); 379fe56b9e6SYuval Mintz } 380fe56b9e6SYuval Mintz 381fc48b7a6SYuval Mintz if (i == QED_INIT_MAX_POLL_COUNT) { 382fe56b9e6SYuval Mintz DP_ERR(p_hwfn, 383fe56b9e6SYuval Mintz "Timeout when polling reg: 0x%08x [ Waiting-for: %08x Got: %08x (comparsion %08x)]\n", 384fe56b9e6SYuval Mintz addr, le32_to_cpu(cmd->expected_val), 385fc48b7a6SYuval Mintz val, le32_to_cpu(cmd->op_data)); 386fe56b9e6SYuval Mintz } 387fe56b9e6SYuval Mintz } 388fe56b9e6SYuval Mintz 389fe56b9e6SYuval Mintz /* init_ops callbacks entry point */ 390fe56b9e6SYuval Mintz static void qed_init_cmd_cb(struct qed_hwfn *p_hwfn, 391fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 392fe56b9e6SYuval Mintz struct init_callback_op *p_cmd) 393fe56b9e6SYuval Mintz { 394fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Currently init values have no need of callbacks\n"); 395fe56b9e6SYuval Mintz } 396fe56b9e6SYuval Mintz 397fe56b9e6SYuval Mintz static u8 qed_init_cmd_mode_match(struct qed_hwfn *p_hwfn, 3981a635e48SYuval Mintz u16 *p_offset, int modes) 399fe56b9e6SYuval Mintz { 400fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 401fe56b9e6SYuval Mintz const u8 *modes_tree_buf; 402fe56b9e6SYuval Mintz u8 arg1, arg2, tree_val; 403fe56b9e6SYuval Mintz 404fe56b9e6SYuval Mintz modes_tree_buf = cdev->fw_data->modes_tree_buf; 4051a635e48SYuval Mintz tree_val = modes_tree_buf[(*p_offset)++]; 406fe56b9e6SYuval Mintz switch (tree_val) { 407fe56b9e6SYuval Mintz case INIT_MODE_OP_NOT: 4081a635e48SYuval Mintz return qed_init_cmd_mode_match(p_hwfn, p_offset, modes) ^ 1; 409fe56b9e6SYuval Mintz case INIT_MODE_OP_OR: 4101a635e48SYuval Mintz arg1 = qed_init_cmd_mode_match(p_hwfn, p_offset, modes); 4111a635e48SYuval Mintz arg2 = qed_init_cmd_mode_match(p_hwfn, p_offset, modes); 412fe56b9e6SYuval Mintz return arg1 | arg2; 413fe56b9e6SYuval Mintz case INIT_MODE_OP_AND: 4141a635e48SYuval Mintz arg1 = qed_init_cmd_mode_match(p_hwfn, p_offset, modes); 4151a635e48SYuval Mintz arg2 = qed_init_cmd_mode_match(p_hwfn, p_offset, modes); 416fe56b9e6SYuval Mintz return arg1 & arg2; 417fe56b9e6SYuval Mintz default: 418fe56b9e6SYuval Mintz tree_val -= MAX_INIT_MODE_OPS; 4191a635e48SYuval Mintz return (modes & BIT(tree_val)) ? 1 : 0; 420fe56b9e6SYuval Mintz } 421fe56b9e6SYuval Mintz } 422fe56b9e6SYuval Mintz 423fe56b9e6SYuval Mintz static u32 qed_init_cmd_mode(struct qed_hwfn *p_hwfn, 4241a635e48SYuval Mintz struct init_if_mode_op *p_cmd, int modes) 425fe56b9e6SYuval Mintz { 426fe56b9e6SYuval Mintz u16 offset = le16_to_cpu(p_cmd->modes_buf_offset); 427fe56b9e6SYuval Mintz 428fe56b9e6SYuval Mintz if (qed_init_cmd_mode_match(p_hwfn, &offset, modes)) 429fe56b9e6SYuval Mintz return 0; 430fe56b9e6SYuval Mintz else 431fe56b9e6SYuval Mintz return GET_FIELD(le32_to_cpu(p_cmd->op_data), 432fe56b9e6SYuval Mintz INIT_IF_MODE_OP_CMD_OFFSET); 433fe56b9e6SYuval Mintz } 434fe56b9e6SYuval Mintz 435fe56b9e6SYuval Mintz static u32 qed_init_cmd_phase(struct qed_hwfn *p_hwfn, 436fe56b9e6SYuval Mintz struct init_if_phase_op *p_cmd, 4371a635e48SYuval Mintz u32 phase, u32 phase_id) 438fe56b9e6SYuval Mintz { 439fe56b9e6SYuval Mintz u32 data = le32_to_cpu(p_cmd->phase_data); 440fe56b9e6SYuval Mintz u32 op_data = le32_to_cpu(p_cmd->op_data); 441fe56b9e6SYuval Mintz 442fe56b9e6SYuval Mintz if (!(GET_FIELD(data, INIT_IF_PHASE_OP_PHASE) == phase && 443fe56b9e6SYuval Mintz (GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == ANY_PHASE_ID || 444fe56b9e6SYuval Mintz GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == phase_id))) 445fe56b9e6SYuval Mintz return GET_FIELD(op_data, INIT_IF_PHASE_OP_CMD_OFFSET); 446fe56b9e6SYuval Mintz else 447fe56b9e6SYuval Mintz return 0; 448fe56b9e6SYuval Mintz } 449fe56b9e6SYuval Mintz 450fe56b9e6SYuval Mintz int qed_init_run(struct qed_hwfn *p_hwfn, 4511a635e48SYuval Mintz struct qed_ptt *p_ptt, int phase, int phase_id, int modes) 452fe56b9e6SYuval Mintz { 453fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 454fe56b9e6SYuval Mintz u32 cmd_num, num_init_ops; 455fe56b9e6SYuval Mintz union init_op *init_ops; 456fe56b9e6SYuval Mintz bool b_dmae = false; 457fe56b9e6SYuval Mintz int rc = 0; 458fe56b9e6SYuval Mintz 459fe56b9e6SYuval Mintz num_init_ops = cdev->fw_data->init_ops_size; 460fe56b9e6SYuval Mintz init_ops = cdev->fw_data->init_ops; 461fe56b9e6SYuval Mintz 462fe56b9e6SYuval Mintz p_hwfn->unzip_buf = kzalloc(MAX_ZIPPED_SIZE * 4, GFP_ATOMIC); 4632591c280SJoe Perches if (!p_hwfn->unzip_buf) 464fe56b9e6SYuval Mintz return -ENOMEM; 465fe56b9e6SYuval Mintz 466fe56b9e6SYuval Mintz for (cmd_num = 0; cmd_num < num_init_ops; cmd_num++) { 467fe56b9e6SYuval Mintz union init_op *cmd = &init_ops[cmd_num]; 468fe56b9e6SYuval Mintz u32 data = le32_to_cpu(cmd->raw.op_data); 469fe56b9e6SYuval Mintz 470fe56b9e6SYuval Mintz switch (GET_FIELD(data, INIT_CALLBACK_OP_OP)) { 471fe56b9e6SYuval Mintz case INIT_OP_WRITE: 472fe56b9e6SYuval Mintz rc = qed_init_cmd_wr(p_hwfn, p_ptt, &cmd->write, 473fe56b9e6SYuval Mintz b_dmae); 474fe56b9e6SYuval Mintz break; 475fe56b9e6SYuval Mintz case INIT_OP_READ: 476fe56b9e6SYuval Mintz qed_init_cmd_rd(p_hwfn, p_ptt, &cmd->read); 477fe56b9e6SYuval Mintz break; 478fe56b9e6SYuval Mintz case INIT_OP_IF_MODE: 479fe56b9e6SYuval Mintz cmd_num += qed_init_cmd_mode(p_hwfn, &cmd->if_mode, 480fe56b9e6SYuval Mintz modes); 481fe56b9e6SYuval Mintz break; 482fe56b9e6SYuval Mintz case INIT_OP_IF_PHASE: 483fe56b9e6SYuval Mintz cmd_num += qed_init_cmd_phase(p_hwfn, &cmd->if_phase, 484fe56b9e6SYuval Mintz phase, phase_id); 485fe56b9e6SYuval Mintz b_dmae = GET_FIELD(data, INIT_IF_PHASE_OP_DMAE_ENABLE); 486fe56b9e6SYuval Mintz break; 487fe56b9e6SYuval Mintz case INIT_OP_DELAY: 488fe56b9e6SYuval Mintz /* qed_init_run is always invoked from 489fe56b9e6SYuval Mintz * sleep-able context 490fe56b9e6SYuval Mintz */ 491fe56b9e6SYuval Mintz udelay(le32_to_cpu(cmd->delay.delay)); 492fe56b9e6SYuval Mintz break; 493fe56b9e6SYuval Mintz 494fe56b9e6SYuval Mintz case INIT_OP_CALLBACK: 495fe56b9e6SYuval Mintz qed_init_cmd_cb(p_hwfn, p_ptt, &cmd->callback); 496fe56b9e6SYuval Mintz break; 497fe56b9e6SYuval Mintz } 498fe56b9e6SYuval Mintz 499fe56b9e6SYuval Mintz if (rc) 500fe56b9e6SYuval Mintz break; 501fe56b9e6SYuval Mintz } 502fe56b9e6SYuval Mintz 503fe56b9e6SYuval Mintz kfree(p_hwfn->unzip_buf); 504fe56b9e6SYuval Mintz return rc; 505fe56b9e6SYuval Mintz } 506fe56b9e6SYuval Mintz 507fe56b9e6SYuval Mintz void qed_gtt_init(struct qed_hwfn *p_hwfn) 508fe56b9e6SYuval Mintz { 509fe56b9e6SYuval Mintz u32 gtt_base; 510fe56b9e6SYuval Mintz u32 i; 511fe56b9e6SYuval Mintz 512fe56b9e6SYuval Mintz /* Set the global windows */ 513fe56b9e6SYuval Mintz gtt_base = PXP_PF_WINDOW_ADMIN_START + PXP_PF_WINDOW_ADMIN_GLOBAL_START; 514fe56b9e6SYuval Mintz 515fe56b9e6SYuval Mintz for (i = 0; i < ARRAY_SIZE(pxp_global_win); i++) 516fe56b9e6SYuval Mintz if (pxp_global_win[i]) 517fe56b9e6SYuval Mintz REG_WR(p_hwfn, gtt_base + i * PXP_GLOBAL_ENTRY_SIZE, 518fe56b9e6SYuval Mintz pxp_global_win[i]); 519fe56b9e6SYuval Mintz } 520fe56b9e6SYuval Mintz 521351a4dedSYuval Mintz int qed_init_fw_data(struct qed_dev *cdev, const u8 *data) 522fe56b9e6SYuval Mintz { 523fe56b9e6SYuval Mintz struct qed_fw_data *fw = cdev->fw_data; 524fe56b9e6SYuval Mintz struct bin_buffer_hdr *buf_hdr; 525fe56b9e6SYuval Mintz u32 offset, len; 526fe56b9e6SYuval Mintz 527fe56b9e6SYuval Mintz if (!data) { 528fe56b9e6SYuval Mintz DP_NOTICE(cdev, "Invalid fw data\n"); 529fe56b9e6SYuval Mintz return -EINVAL; 530fe56b9e6SYuval Mintz } 531fe56b9e6SYuval Mintz 532351a4dedSYuval Mintz /* First Dword contains metadata and should be skipped */ 533351a4dedSYuval Mintz buf_hdr = (struct bin_buffer_hdr *)(data + sizeof(u32)); 534351a4dedSYuval Mintz 53505fafbfbSYuval Mintz offset = buf_hdr[BIN_BUF_INIT_FW_VER_INFO].offset; 536351a4dedSYuval Mintz fw->fw_ver_info = (struct fw_ver_info *)(data + offset); 537fe56b9e6SYuval Mintz 538fe56b9e6SYuval Mintz offset = buf_hdr[BIN_BUF_INIT_CMD].offset; 539fe56b9e6SYuval Mintz fw->init_ops = (union init_op *)(data + offset); 540fe56b9e6SYuval Mintz 541fe56b9e6SYuval Mintz offset = buf_hdr[BIN_BUF_INIT_VAL].offset; 542fe56b9e6SYuval Mintz fw->arr_data = (u32 *)(data + offset); 543fe56b9e6SYuval Mintz 544fe56b9e6SYuval Mintz offset = buf_hdr[BIN_BUF_INIT_MODE_TREE].offset; 545fe56b9e6SYuval Mintz fw->modes_tree_buf = (u8 *)(data + offset); 546fe56b9e6SYuval Mintz len = buf_hdr[BIN_BUF_INIT_CMD].length; 547fe56b9e6SYuval Mintz fw->init_ops_size = len / sizeof(struct init_raw_op); 548fe56b9e6SYuval Mintz 549fe56b9e6SYuval Mintz return 0; 550fe56b9e6SYuval Mintz } 551