1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 2fe56b9e6SYuval Mintz * Copyright (c) 2015 QLogic Corporation 3fe56b9e6SYuval Mintz * 4fe56b9e6SYuval Mintz * This software is available under the terms of the GNU General Public License 5fe56b9e6SYuval Mintz * (GPL) Version 2, available from the file COPYING in the main directory of 6fe56b9e6SYuval Mintz * this source tree. 7fe56b9e6SYuval Mintz */ 8fe56b9e6SYuval Mintz 9fe56b9e6SYuval Mintz #include <linux/types.h> 10fe56b9e6SYuval Mintz #include <linux/io.h> 11fe56b9e6SYuval Mintz #include <linux/delay.h> 12fe56b9e6SYuval Mintz #include <linux/errno.h> 13fe56b9e6SYuval Mintz #include <linux/kernel.h> 14fe56b9e6SYuval Mintz #include <linux/slab.h> 15fe56b9e6SYuval Mintz #include <linux/string.h> 16fe56b9e6SYuval Mintz #include "qed.h" 17fe56b9e6SYuval Mintz #include "qed_hsi.h" 18fe56b9e6SYuval Mintz #include "qed_hw.h" 19fe56b9e6SYuval Mintz #include "qed_init_ops.h" 20fe56b9e6SYuval Mintz #include "qed_reg_addr.h" 211408cc1fSYuval Mintz #include "qed_sriov.h" 22fe56b9e6SYuval Mintz 23fe56b9e6SYuval Mintz #define QED_INIT_MAX_POLL_COUNT 100 24fe56b9e6SYuval Mintz #define QED_INIT_POLL_PERIOD_US 500 25fe56b9e6SYuval Mintz 26fe56b9e6SYuval Mintz static u32 pxp_global_win[] = { 27fe56b9e6SYuval Mintz 0, 28fe56b9e6SYuval Mintz 0, 29fe56b9e6SYuval Mintz 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */ 30fe56b9e6SYuval Mintz 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */ 31fe56b9e6SYuval Mintz 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */ 32fe56b9e6SYuval Mintz 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */ 33fe56b9e6SYuval Mintz 0x1d80, /* win 6: addr=0x1d80000, size=4096 bytes */ 34fe56b9e6SYuval Mintz 0x1d81, /* win 7: addr=0x1d81000, size=4096 bytes */ 35fe56b9e6SYuval Mintz 0x1d82, /* win 8: addr=0x1d82000, size=4096 bytes */ 36fe56b9e6SYuval Mintz 0x1e00, /* win 9: addr=0x1e00000, size=4096 bytes */ 37fe56b9e6SYuval Mintz 0x1e80, /* win 10: addr=0x1e80000, size=4096 bytes */ 38fe56b9e6SYuval Mintz 0x1f00, /* win 11: addr=0x1f00000, size=4096 bytes */ 39fe56b9e6SYuval Mintz 0, 40fe56b9e6SYuval Mintz 0, 41fe56b9e6SYuval Mintz 0, 42fe56b9e6SYuval Mintz 0, 43fe56b9e6SYuval Mintz 0, 44fe56b9e6SYuval Mintz 0, 45fe56b9e6SYuval Mintz 0, 46fe56b9e6SYuval Mintz }; 47fe56b9e6SYuval Mintz 48fe56b9e6SYuval Mintz void qed_init_iro_array(struct qed_dev *cdev) 49fe56b9e6SYuval Mintz { 50fe56b9e6SYuval Mintz cdev->iro_arr = iro_arr; 51fe56b9e6SYuval Mintz } 52fe56b9e6SYuval Mintz 53fe56b9e6SYuval Mintz /* Runtime configuration helpers */ 54fe56b9e6SYuval Mintz void qed_init_clear_rt_data(struct qed_hwfn *p_hwfn) 55fe56b9e6SYuval Mintz { 56fe56b9e6SYuval Mintz int i; 57fe56b9e6SYuval Mintz 58fe56b9e6SYuval Mintz for (i = 0; i < RUNTIME_ARRAY_SIZE; i++) 59fc48b7a6SYuval Mintz p_hwfn->rt_data.b_valid[i] = false; 60fe56b9e6SYuval Mintz } 61fe56b9e6SYuval Mintz 62fe56b9e6SYuval Mintz void qed_init_store_rt_reg(struct qed_hwfn *p_hwfn, 63fe56b9e6SYuval Mintz u32 rt_offset, 64fe56b9e6SYuval Mintz u32 val) 65fe56b9e6SYuval Mintz { 66fc48b7a6SYuval Mintz p_hwfn->rt_data.init_val[rt_offset] = val; 67fc48b7a6SYuval Mintz p_hwfn->rt_data.b_valid[rt_offset] = true; 68fe56b9e6SYuval Mintz } 69fe56b9e6SYuval Mintz 70fe56b9e6SYuval Mintz void qed_init_store_rt_agg(struct qed_hwfn *p_hwfn, 71fc48b7a6SYuval Mintz u32 rt_offset, u32 *p_val, 72fe56b9e6SYuval Mintz size_t size) 73fe56b9e6SYuval Mintz { 74fe56b9e6SYuval Mintz size_t i; 75fe56b9e6SYuval Mintz 76fe56b9e6SYuval Mintz for (i = 0; i < size / sizeof(u32); i++) { 77fc48b7a6SYuval Mintz p_hwfn->rt_data.init_val[rt_offset + i] = p_val[i]; 78fc48b7a6SYuval Mintz p_hwfn->rt_data.b_valid[rt_offset + i] = true; 79fe56b9e6SYuval Mintz } 80fe56b9e6SYuval Mintz } 81fe56b9e6SYuval Mintz 82fc48b7a6SYuval Mintz static int qed_init_rt(struct qed_hwfn *p_hwfn, 83fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 84fe56b9e6SYuval Mintz u32 addr, 85fc48b7a6SYuval Mintz u16 rt_offset, 86fc48b7a6SYuval Mintz u16 size, 87fc48b7a6SYuval Mintz bool b_must_dmae) 88fe56b9e6SYuval Mintz { 89fc48b7a6SYuval Mintz u32 *p_init_val = &p_hwfn->rt_data.init_val[rt_offset]; 90fc48b7a6SYuval Mintz bool *p_valid = &p_hwfn->rt_data.b_valid[rt_offset]; 91fc48b7a6SYuval Mintz u16 i, segment; 92fc48b7a6SYuval Mintz int rc = 0; 93fe56b9e6SYuval Mintz 94fc48b7a6SYuval Mintz /* Since not all RT entries are initialized, go over the RT and 95fc48b7a6SYuval Mintz * for each segment of initialized values use DMA. 96fc48b7a6SYuval Mintz */ 97fe56b9e6SYuval Mintz for (i = 0; i < size; i++) { 98fc48b7a6SYuval Mintz if (!p_valid[i]) 99fe56b9e6SYuval Mintz continue; 100fc48b7a6SYuval Mintz 101fc48b7a6SYuval Mintz /* In case there isn't any wide-bus configuration here, 102fc48b7a6SYuval Mintz * simply write the data instead of using dmae. 103fc48b7a6SYuval Mintz */ 104fc48b7a6SYuval Mintz if (!b_must_dmae) { 105fc48b7a6SYuval Mintz qed_wr(p_hwfn, p_ptt, addr + (i << 2), 106fc48b7a6SYuval Mintz p_init_val[i]); 107fc48b7a6SYuval Mintz continue; 108fe56b9e6SYuval Mintz } 109fc48b7a6SYuval Mintz 110fc48b7a6SYuval Mintz /* Start of a new segment */ 111fc48b7a6SYuval Mintz for (segment = 1; i + segment < size; segment++) 112fc48b7a6SYuval Mintz if (!p_valid[i + segment]) 113fc48b7a6SYuval Mintz break; 114fc48b7a6SYuval Mintz 115fc48b7a6SYuval Mintz rc = qed_dmae_host2grc(p_hwfn, p_ptt, 116fc48b7a6SYuval Mintz (uintptr_t)(p_init_val + i), 117fc48b7a6SYuval Mintz addr + (i << 2), segment, 0); 118fc48b7a6SYuval Mintz if (rc != 0) 119fc48b7a6SYuval Mintz return rc; 120fc48b7a6SYuval Mintz 121fc48b7a6SYuval Mintz /* Jump over the entire segment, including invalid entry */ 122fc48b7a6SYuval Mintz i += segment; 123fc48b7a6SYuval Mintz } 124fc48b7a6SYuval Mintz 125fc48b7a6SYuval Mintz return rc; 126fe56b9e6SYuval Mintz } 127fe56b9e6SYuval Mintz 128fe56b9e6SYuval Mintz int qed_init_alloc(struct qed_hwfn *p_hwfn) 129fe56b9e6SYuval Mintz { 130fc48b7a6SYuval Mintz struct qed_rt_data *rt_data = &p_hwfn->rt_data; 131fe56b9e6SYuval Mintz 1321408cc1fSYuval Mintz if (IS_VF(p_hwfn->cdev)) 1331408cc1fSYuval Mintz return 0; 1341408cc1fSYuval Mintz 135fc48b7a6SYuval Mintz rt_data->b_valid = kzalloc(sizeof(bool) * RUNTIME_ARRAY_SIZE, 136fc48b7a6SYuval Mintz GFP_KERNEL); 137fc48b7a6SYuval Mintz if (!rt_data->b_valid) 138fe56b9e6SYuval Mintz return -ENOMEM; 139fe56b9e6SYuval Mintz 140fc48b7a6SYuval Mintz rt_data->init_val = kzalloc(sizeof(u32) * RUNTIME_ARRAY_SIZE, 141fc48b7a6SYuval Mintz GFP_KERNEL); 142fc48b7a6SYuval Mintz if (!rt_data->init_val) { 143fc48b7a6SYuval Mintz kfree(rt_data->b_valid); 144fc48b7a6SYuval Mintz return -ENOMEM; 145fc48b7a6SYuval Mintz } 146fe56b9e6SYuval Mintz 147fe56b9e6SYuval Mintz return 0; 148fe56b9e6SYuval Mintz } 149fe56b9e6SYuval Mintz 150fe56b9e6SYuval Mintz void qed_init_free(struct qed_hwfn *p_hwfn) 151fe56b9e6SYuval Mintz { 152fc48b7a6SYuval Mintz kfree(p_hwfn->rt_data.init_val); 153fc48b7a6SYuval Mintz kfree(p_hwfn->rt_data.b_valid); 154fe56b9e6SYuval Mintz } 155fe56b9e6SYuval Mintz 156fe56b9e6SYuval Mintz static int qed_init_array_dmae(struct qed_hwfn *p_hwfn, 157fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 158fe56b9e6SYuval Mintz u32 addr, 159fe56b9e6SYuval Mintz u32 dmae_data_offset, 160fe56b9e6SYuval Mintz u32 size, 161fe56b9e6SYuval Mintz const u32 *buf, 162fe56b9e6SYuval Mintz bool b_must_dmae, 163fe56b9e6SYuval Mintz bool b_can_dmae) 164fe56b9e6SYuval Mintz { 165fe56b9e6SYuval Mintz int rc = 0; 166fe56b9e6SYuval Mintz 167fe56b9e6SYuval Mintz /* Perform DMAE only for lengthy enough sections or for wide-bus */ 168fe56b9e6SYuval Mintz if (!b_can_dmae || (!b_must_dmae && (size < 16))) { 169fe56b9e6SYuval Mintz const u32 *data = buf + dmae_data_offset; 170fe56b9e6SYuval Mintz u32 i; 171fe56b9e6SYuval Mintz 172fe56b9e6SYuval Mintz for (i = 0; i < size; i++) 173fe56b9e6SYuval Mintz qed_wr(p_hwfn, p_ptt, addr + (i << 2), data[i]); 174fe56b9e6SYuval Mintz } else { 175fe56b9e6SYuval Mintz rc = qed_dmae_host2grc(p_hwfn, p_ptt, 176fe56b9e6SYuval Mintz (uintptr_t)(buf + dmae_data_offset), 177fe56b9e6SYuval Mintz addr, size, 0); 178fe56b9e6SYuval Mintz } 179fe56b9e6SYuval Mintz 180fe56b9e6SYuval Mintz return rc; 181fe56b9e6SYuval Mintz } 182fe56b9e6SYuval Mintz 183fe56b9e6SYuval Mintz static int qed_init_fill_dmae(struct qed_hwfn *p_hwfn, 184fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 185fe56b9e6SYuval Mintz u32 addr, 186fe56b9e6SYuval Mintz u32 fill, 187fe56b9e6SYuval Mintz u32 fill_count) 188fe56b9e6SYuval Mintz { 189fe56b9e6SYuval Mintz static u32 zero_buffer[DMAE_MAX_RW_SIZE]; 190fe56b9e6SYuval Mintz 191fe56b9e6SYuval Mintz memset(zero_buffer, 0, sizeof(u32) * DMAE_MAX_RW_SIZE); 192fe56b9e6SYuval Mintz 193fe56b9e6SYuval Mintz /* invoke the DMAE virtual/physical buffer API with 194fe56b9e6SYuval Mintz * 1. DMAE init channel 195fe56b9e6SYuval Mintz * 2. addr, 196fe56b9e6SYuval Mintz * 3. p_hwfb->temp_data, 197fe56b9e6SYuval Mintz * 4. fill_count 198fe56b9e6SYuval Mintz */ 199fe56b9e6SYuval Mintz 200fe56b9e6SYuval Mintz return qed_dmae_host2grc(p_hwfn, p_ptt, 201fe56b9e6SYuval Mintz (uintptr_t)(&zero_buffer[0]), 202fe56b9e6SYuval Mintz addr, fill_count, 203fe56b9e6SYuval Mintz QED_DMAE_FLAG_RW_REPL_SRC); 204fe56b9e6SYuval Mintz } 205fe56b9e6SYuval Mintz 206fe56b9e6SYuval Mintz static void qed_init_fill(struct qed_hwfn *p_hwfn, 207fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 208fe56b9e6SYuval Mintz u32 addr, 209fe56b9e6SYuval Mintz u32 fill, 210fe56b9e6SYuval Mintz u32 fill_count) 211fe56b9e6SYuval Mintz { 212fe56b9e6SYuval Mintz u32 i; 213fe56b9e6SYuval Mintz 214fe56b9e6SYuval Mintz for (i = 0; i < fill_count; i++, addr += sizeof(u32)) 215fe56b9e6SYuval Mintz qed_wr(p_hwfn, p_ptt, addr, fill); 216fe56b9e6SYuval Mintz } 217fe56b9e6SYuval Mintz 218fe56b9e6SYuval Mintz static int qed_init_cmd_array(struct qed_hwfn *p_hwfn, 219fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 220fe56b9e6SYuval Mintz struct init_write_op *cmd, 221fe56b9e6SYuval Mintz bool b_must_dmae, 222fe56b9e6SYuval Mintz bool b_can_dmae) 223fe56b9e6SYuval Mintz { 224fe56b9e6SYuval Mintz u32 data = le32_to_cpu(cmd->data); 225fe56b9e6SYuval Mintz u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2; 226fe56b9e6SYuval Mintz u32 dmae_array_offset = le32_to_cpu(cmd->args.array_offset); 227fe56b9e6SYuval Mintz u32 offset, output_len, input_len, max_size; 228fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 229fe56b9e6SYuval Mintz union init_array_hdr *hdr; 230fe56b9e6SYuval Mintz const u32 *array_data; 231fe56b9e6SYuval Mintz int rc = 0; 232fe56b9e6SYuval Mintz u32 size; 233fe56b9e6SYuval Mintz 234fe56b9e6SYuval Mintz array_data = cdev->fw_data->arr_data; 235fe56b9e6SYuval Mintz 236fe56b9e6SYuval Mintz hdr = (union init_array_hdr *)(array_data + 237fe56b9e6SYuval Mintz dmae_array_offset); 238fe56b9e6SYuval Mintz data = le32_to_cpu(hdr->raw.data); 239fe56b9e6SYuval Mintz switch (GET_FIELD(data, INIT_ARRAY_RAW_HDR_TYPE)) { 240fe56b9e6SYuval Mintz case INIT_ARR_ZIPPED: 241fe56b9e6SYuval Mintz offset = dmae_array_offset + 1; 242fe56b9e6SYuval Mintz input_len = GET_FIELD(data, 243fe56b9e6SYuval Mintz INIT_ARRAY_ZIPPED_HDR_ZIPPED_SIZE); 244fe56b9e6SYuval Mintz max_size = MAX_ZIPPED_SIZE * 4; 245fe56b9e6SYuval Mintz memset(p_hwfn->unzip_buf, 0, max_size); 246fe56b9e6SYuval Mintz 247fe56b9e6SYuval Mintz output_len = qed_unzip_data(p_hwfn, input_len, 248fe56b9e6SYuval Mintz (u8 *)&array_data[offset], 249fe56b9e6SYuval Mintz max_size, (u8 *)p_hwfn->unzip_buf); 250fe56b9e6SYuval Mintz if (output_len) { 251fe56b9e6SYuval Mintz rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 0, 252fe56b9e6SYuval Mintz output_len, 253fe56b9e6SYuval Mintz p_hwfn->unzip_buf, 254fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 255fe56b9e6SYuval Mintz } else { 256fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Failed to unzip dmae data\n"); 257fe56b9e6SYuval Mintz rc = -EINVAL; 258fe56b9e6SYuval Mintz } 259fe56b9e6SYuval Mintz break; 260fe56b9e6SYuval Mintz case INIT_ARR_PATTERN: 261fe56b9e6SYuval Mintz { 262fe56b9e6SYuval Mintz u32 repeats = GET_FIELD(data, 263fe56b9e6SYuval Mintz INIT_ARRAY_PATTERN_HDR_REPETITIONS); 264fe56b9e6SYuval Mintz u32 i; 265fe56b9e6SYuval Mintz 266fe56b9e6SYuval Mintz size = GET_FIELD(data, INIT_ARRAY_PATTERN_HDR_PATTERN_SIZE); 267fe56b9e6SYuval Mintz 268fe56b9e6SYuval Mintz for (i = 0; i < repeats; i++, addr += size << 2) { 269fe56b9e6SYuval Mintz rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 270fe56b9e6SYuval Mintz dmae_array_offset + 1, 271fe56b9e6SYuval Mintz size, array_data, 272fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 273fe56b9e6SYuval Mintz if (rc) 274fe56b9e6SYuval Mintz break; 275fe56b9e6SYuval Mintz } 276fe56b9e6SYuval Mintz break; 277fe56b9e6SYuval Mintz } 278fe56b9e6SYuval Mintz case INIT_ARR_STANDARD: 279fe56b9e6SYuval Mintz size = GET_FIELD(data, INIT_ARRAY_STANDARD_HDR_SIZE); 280fe56b9e6SYuval Mintz rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 281fe56b9e6SYuval Mintz dmae_array_offset + 1, 282fe56b9e6SYuval Mintz size, array_data, 283fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 284fe56b9e6SYuval Mintz break; 285fe56b9e6SYuval Mintz } 286fe56b9e6SYuval Mintz 287fe56b9e6SYuval Mintz return rc; 288fe56b9e6SYuval Mintz } 289fe56b9e6SYuval Mintz 290fe56b9e6SYuval Mintz /* init_ops write command */ 291fe56b9e6SYuval Mintz static int qed_init_cmd_wr(struct qed_hwfn *p_hwfn, 292fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 293fe56b9e6SYuval Mintz struct init_write_op *cmd, 294fe56b9e6SYuval Mintz bool b_can_dmae) 295fe56b9e6SYuval Mintz { 296fe56b9e6SYuval Mintz u32 data = le32_to_cpu(cmd->data); 297fe56b9e6SYuval Mintz u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2; 298fe56b9e6SYuval Mintz bool b_must_dmae = GET_FIELD(data, INIT_WRITE_OP_WIDE_BUS); 299fe56b9e6SYuval Mintz union init_write_args *arg = &cmd->args; 300fe56b9e6SYuval Mintz int rc = 0; 301fe56b9e6SYuval Mintz 302fe56b9e6SYuval Mintz /* Sanitize */ 303fe56b9e6SYuval Mintz if (b_must_dmae && !b_can_dmae) { 304fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, 305fe56b9e6SYuval Mintz "Need to write to %08x for Wide-bus but DMAE isn't allowed\n", 306fe56b9e6SYuval Mintz addr); 307fe56b9e6SYuval Mintz return -EINVAL; 308fe56b9e6SYuval Mintz } 309fe56b9e6SYuval Mintz 310fe56b9e6SYuval Mintz switch (GET_FIELD(data, INIT_WRITE_OP_SOURCE)) { 311fe56b9e6SYuval Mintz case INIT_SRC_INLINE: 312fe56b9e6SYuval Mintz qed_wr(p_hwfn, p_ptt, addr, 313fe56b9e6SYuval Mintz le32_to_cpu(arg->inline_val)); 314fe56b9e6SYuval Mintz break; 315fe56b9e6SYuval Mintz case INIT_SRC_ZEROS: 316fe56b9e6SYuval Mintz if (b_must_dmae || 317fe56b9e6SYuval Mintz (b_can_dmae && (le32_to_cpu(arg->zeros_count) >= 64))) 318fe56b9e6SYuval Mintz rc = qed_init_fill_dmae(p_hwfn, p_ptt, addr, 0, 319fe56b9e6SYuval Mintz le32_to_cpu(arg->zeros_count)); 320fe56b9e6SYuval Mintz else 321fe56b9e6SYuval Mintz qed_init_fill(p_hwfn, p_ptt, addr, 0, 322fe56b9e6SYuval Mintz le32_to_cpu(arg->zeros_count)); 323fe56b9e6SYuval Mintz break; 324fe56b9e6SYuval Mintz case INIT_SRC_ARRAY: 325fe56b9e6SYuval Mintz rc = qed_init_cmd_array(p_hwfn, p_ptt, cmd, 326fe56b9e6SYuval Mintz b_must_dmae, b_can_dmae); 327fe56b9e6SYuval Mintz break; 328fe56b9e6SYuval Mintz case INIT_SRC_RUNTIME: 329fe56b9e6SYuval Mintz qed_init_rt(p_hwfn, p_ptt, addr, 330fe56b9e6SYuval Mintz le16_to_cpu(arg->runtime.offset), 331fc48b7a6SYuval Mintz le16_to_cpu(arg->runtime.size), 332fc48b7a6SYuval Mintz b_must_dmae); 333fe56b9e6SYuval Mintz break; 334fe56b9e6SYuval Mintz } 335fe56b9e6SYuval Mintz 336fe56b9e6SYuval Mintz return rc; 337fe56b9e6SYuval Mintz } 338fe56b9e6SYuval Mintz 339fe56b9e6SYuval Mintz static inline bool comp_eq(u32 val, u32 expected_val) 340fe56b9e6SYuval Mintz { 341fe56b9e6SYuval Mintz return val == expected_val; 342fe56b9e6SYuval Mintz } 343fe56b9e6SYuval Mintz 344fe56b9e6SYuval Mintz static inline bool comp_and(u32 val, u32 expected_val) 345fe56b9e6SYuval Mintz { 346fe56b9e6SYuval Mintz return (val & expected_val) == expected_val; 347fe56b9e6SYuval Mintz } 348fe56b9e6SYuval Mintz 349fe56b9e6SYuval Mintz static inline bool comp_or(u32 val, u32 expected_val) 350fe56b9e6SYuval Mintz { 351fe56b9e6SYuval Mintz return (val | expected_val) > 0; 352fe56b9e6SYuval Mintz } 353fe56b9e6SYuval Mintz 354fe56b9e6SYuval Mintz /* init_ops read/poll commands */ 355fe56b9e6SYuval Mintz static void qed_init_cmd_rd(struct qed_hwfn *p_hwfn, 356fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 357fe56b9e6SYuval Mintz struct init_read_op *cmd) 358fe56b9e6SYuval Mintz { 359fc48b7a6SYuval Mintz bool (*comp_check)(u32 val, u32 expected_val); 360fe56b9e6SYuval Mintz u32 delay = QED_INIT_POLL_PERIOD_US, val; 361fc48b7a6SYuval Mintz u32 data, addr, poll; 362fc48b7a6SYuval Mintz int i; 363fc48b7a6SYuval Mintz 364fc48b7a6SYuval Mintz data = le32_to_cpu(cmd->op_data); 365fc48b7a6SYuval Mintz addr = GET_FIELD(data, INIT_READ_OP_ADDRESS) << 2; 366fc48b7a6SYuval Mintz poll = GET_FIELD(data, INIT_READ_OP_POLL_TYPE); 367fc48b7a6SYuval Mintz 368fe56b9e6SYuval Mintz 369fe56b9e6SYuval Mintz val = qed_rd(p_hwfn, p_ptt, addr); 370fe56b9e6SYuval Mintz 371fc48b7a6SYuval Mintz if (poll == INIT_POLL_NONE) 372fc48b7a6SYuval Mintz return; 373fe56b9e6SYuval Mintz 374fc48b7a6SYuval Mintz switch (poll) { 375fc48b7a6SYuval Mintz case INIT_POLL_EQ: 376fe56b9e6SYuval Mintz comp_check = comp_eq; 377fe56b9e6SYuval Mintz break; 378fc48b7a6SYuval Mintz case INIT_POLL_OR: 379fe56b9e6SYuval Mintz comp_check = comp_or; 380fe56b9e6SYuval Mintz break; 381fc48b7a6SYuval Mintz case INIT_POLL_AND: 382fe56b9e6SYuval Mintz comp_check = comp_and; 383fe56b9e6SYuval Mintz break; 384fe56b9e6SYuval Mintz default: 385fe56b9e6SYuval Mintz DP_ERR(p_hwfn, "Invalid poll comparison type %08x\n", 386fc48b7a6SYuval Mintz cmd->op_data); 387fe56b9e6SYuval Mintz return; 388fe56b9e6SYuval Mintz } 389fe56b9e6SYuval Mintz 390fc48b7a6SYuval Mintz data = le32_to_cpu(cmd->expected_val); 391fe56b9e6SYuval Mintz for (i = 0; 392fc48b7a6SYuval Mintz i < QED_INIT_MAX_POLL_COUNT && !comp_check(val, data); 393fe56b9e6SYuval Mintz i++) { 394fe56b9e6SYuval Mintz udelay(delay); 395fe56b9e6SYuval Mintz val = qed_rd(p_hwfn, p_ptt, addr); 396fe56b9e6SYuval Mintz } 397fe56b9e6SYuval Mintz 398fc48b7a6SYuval Mintz if (i == QED_INIT_MAX_POLL_COUNT) { 399fe56b9e6SYuval Mintz DP_ERR(p_hwfn, 400fe56b9e6SYuval Mintz "Timeout when polling reg: 0x%08x [ Waiting-for: %08x Got: %08x (comparsion %08x)]\n", 401fe56b9e6SYuval Mintz addr, le32_to_cpu(cmd->expected_val), 402fc48b7a6SYuval Mintz val, le32_to_cpu(cmd->op_data)); 403fe56b9e6SYuval Mintz } 404fe56b9e6SYuval Mintz } 405fe56b9e6SYuval Mintz 406fe56b9e6SYuval Mintz /* init_ops callbacks entry point */ 407fe56b9e6SYuval Mintz static void qed_init_cmd_cb(struct qed_hwfn *p_hwfn, 408fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 409fe56b9e6SYuval Mintz struct init_callback_op *p_cmd) 410fe56b9e6SYuval Mintz { 411fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Currently init values have no need of callbacks\n"); 412fe56b9e6SYuval Mintz } 413fe56b9e6SYuval Mintz 414fe56b9e6SYuval Mintz static u8 qed_init_cmd_mode_match(struct qed_hwfn *p_hwfn, 415fe56b9e6SYuval Mintz u16 *offset, 416fe56b9e6SYuval Mintz int modes) 417fe56b9e6SYuval Mintz { 418fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 419fe56b9e6SYuval Mintz const u8 *modes_tree_buf; 420fe56b9e6SYuval Mintz u8 arg1, arg2, tree_val; 421fe56b9e6SYuval Mintz 422fe56b9e6SYuval Mintz modes_tree_buf = cdev->fw_data->modes_tree_buf; 423fe56b9e6SYuval Mintz tree_val = modes_tree_buf[(*offset)++]; 424fe56b9e6SYuval Mintz switch (tree_val) { 425fe56b9e6SYuval Mintz case INIT_MODE_OP_NOT: 426fe56b9e6SYuval Mintz return qed_init_cmd_mode_match(p_hwfn, offset, modes) ^ 1; 427fe56b9e6SYuval Mintz case INIT_MODE_OP_OR: 428fe56b9e6SYuval Mintz arg1 = qed_init_cmd_mode_match(p_hwfn, offset, modes); 429fe56b9e6SYuval Mintz arg2 = qed_init_cmd_mode_match(p_hwfn, offset, modes); 430fe56b9e6SYuval Mintz return arg1 | arg2; 431fe56b9e6SYuval Mintz case INIT_MODE_OP_AND: 432fe56b9e6SYuval Mintz arg1 = qed_init_cmd_mode_match(p_hwfn, offset, modes); 433fe56b9e6SYuval Mintz arg2 = qed_init_cmd_mode_match(p_hwfn, offset, modes); 434fe56b9e6SYuval Mintz return arg1 & arg2; 435fe56b9e6SYuval Mintz default: 436fe56b9e6SYuval Mintz tree_val -= MAX_INIT_MODE_OPS; 437fe56b9e6SYuval Mintz return (modes & (1 << tree_val)) ? 1 : 0; 438fe56b9e6SYuval Mintz } 439fe56b9e6SYuval Mintz } 440fe56b9e6SYuval Mintz 441fe56b9e6SYuval Mintz static u32 qed_init_cmd_mode(struct qed_hwfn *p_hwfn, 442fe56b9e6SYuval Mintz struct init_if_mode_op *p_cmd, 443fe56b9e6SYuval Mintz int modes) 444fe56b9e6SYuval Mintz { 445fe56b9e6SYuval Mintz u16 offset = le16_to_cpu(p_cmd->modes_buf_offset); 446fe56b9e6SYuval Mintz 447fe56b9e6SYuval Mintz if (qed_init_cmd_mode_match(p_hwfn, &offset, modes)) 448fe56b9e6SYuval Mintz return 0; 449fe56b9e6SYuval Mintz else 450fe56b9e6SYuval Mintz return GET_FIELD(le32_to_cpu(p_cmd->op_data), 451fe56b9e6SYuval Mintz INIT_IF_MODE_OP_CMD_OFFSET); 452fe56b9e6SYuval Mintz } 453fe56b9e6SYuval Mintz 454fe56b9e6SYuval Mintz static u32 qed_init_cmd_phase(struct qed_hwfn *p_hwfn, 455fe56b9e6SYuval Mintz struct init_if_phase_op *p_cmd, 456fe56b9e6SYuval Mintz u32 phase, 457fe56b9e6SYuval Mintz u32 phase_id) 458fe56b9e6SYuval Mintz { 459fe56b9e6SYuval Mintz u32 data = le32_to_cpu(p_cmd->phase_data); 460fe56b9e6SYuval Mintz u32 op_data = le32_to_cpu(p_cmd->op_data); 461fe56b9e6SYuval Mintz 462fe56b9e6SYuval Mintz if (!(GET_FIELD(data, INIT_IF_PHASE_OP_PHASE) == phase && 463fe56b9e6SYuval Mintz (GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == ANY_PHASE_ID || 464fe56b9e6SYuval Mintz GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == phase_id))) 465fe56b9e6SYuval Mintz return GET_FIELD(op_data, INIT_IF_PHASE_OP_CMD_OFFSET); 466fe56b9e6SYuval Mintz else 467fe56b9e6SYuval Mintz return 0; 468fe56b9e6SYuval Mintz } 469fe56b9e6SYuval Mintz 470fe56b9e6SYuval Mintz int qed_init_run(struct qed_hwfn *p_hwfn, 471fe56b9e6SYuval Mintz struct qed_ptt *p_ptt, 472fe56b9e6SYuval Mintz int phase, 473fe56b9e6SYuval Mintz int phase_id, 474fe56b9e6SYuval Mintz int modes) 475fe56b9e6SYuval Mintz { 476fe56b9e6SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 477fe56b9e6SYuval Mintz u32 cmd_num, num_init_ops; 478fe56b9e6SYuval Mintz union init_op *init_ops; 479fe56b9e6SYuval Mintz bool b_dmae = false; 480fe56b9e6SYuval Mintz int rc = 0; 481fe56b9e6SYuval Mintz 482fe56b9e6SYuval Mintz num_init_ops = cdev->fw_data->init_ops_size; 483fe56b9e6SYuval Mintz init_ops = cdev->fw_data->init_ops; 484fe56b9e6SYuval Mintz 485fe56b9e6SYuval Mintz p_hwfn->unzip_buf = kzalloc(MAX_ZIPPED_SIZE * 4, GFP_ATOMIC); 486fe56b9e6SYuval Mintz if (!p_hwfn->unzip_buf) { 487fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Failed to allocate unzip buffer\n"); 488fe56b9e6SYuval Mintz return -ENOMEM; 489fe56b9e6SYuval Mintz } 490fe56b9e6SYuval Mintz 491fe56b9e6SYuval Mintz for (cmd_num = 0; cmd_num < num_init_ops; cmd_num++) { 492fe56b9e6SYuval Mintz union init_op *cmd = &init_ops[cmd_num]; 493fe56b9e6SYuval Mintz u32 data = le32_to_cpu(cmd->raw.op_data); 494fe56b9e6SYuval Mintz 495fe56b9e6SYuval Mintz switch (GET_FIELD(data, INIT_CALLBACK_OP_OP)) { 496fe56b9e6SYuval Mintz case INIT_OP_WRITE: 497fe56b9e6SYuval Mintz rc = qed_init_cmd_wr(p_hwfn, p_ptt, &cmd->write, 498fe56b9e6SYuval Mintz b_dmae); 499fe56b9e6SYuval Mintz break; 500fe56b9e6SYuval Mintz case INIT_OP_READ: 501fe56b9e6SYuval Mintz qed_init_cmd_rd(p_hwfn, p_ptt, &cmd->read); 502fe56b9e6SYuval Mintz break; 503fe56b9e6SYuval Mintz case INIT_OP_IF_MODE: 504fe56b9e6SYuval Mintz cmd_num += qed_init_cmd_mode(p_hwfn, &cmd->if_mode, 505fe56b9e6SYuval Mintz modes); 506fe56b9e6SYuval Mintz break; 507fe56b9e6SYuval Mintz case INIT_OP_IF_PHASE: 508fe56b9e6SYuval Mintz cmd_num += qed_init_cmd_phase(p_hwfn, &cmd->if_phase, 509fe56b9e6SYuval Mintz phase, phase_id); 510fe56b9e6SYuval Mintz b_dmae = GET_FIELD(data, INIT_IF_PHASE_OP_DMAE_ENABLE); 511fe56b9e6SYuval Mintz break; 512fe56b9e6SYuval Mintz case INIT_OP_DELAY: 513fe56b9e6SYuval Mintz /* qed_init_run is always invoked from 514fe56b9e6SYuval Mintz * sleep-able context 515fe56b9e6SYuval Mintz */ 516fe56b9e6SYuval Mintz udelay(le32_to_cpu(cmd->delay.delay)); 517fe56b9e6SYuval Mintz break; 518fe56b9e6SYuval Mintz 519fe56b9e6SYuval Mintz case INIT_OP_CALLBACK: 520fe56b9e6SYuval Mintz qed_init_cmd_cb(p_hwfn, p_ptt, &cmd->callback); 521fe56b9e6SYuval Mintz break; 522fe56b9e6SYuval Mintz } 523fe56b9e6SYuval Mintz 524fe56b9e6SYuval Mintz if (rc) 525fe56b9e6SYuval Mintz break; 526fe56b9e6SYuval Mintz } 527fe56b9e6SYuval Mintz 528fe56b9e6SYuval Mintz kfree(p_hwfn->unzip_buf); 529fe56b9e6SYuval Mintz return rc; 530fe56b9e6SYuval Mintz } 531fe56b9e6SYuval Mintz 532fe56b9e6SYuval Mintz void qed_gtt_init(struct qed_hwfn *p_hwfn) 533fe56b9e6SYuval Mintz { 534fe56b9e6SYuval Mintz u32 gtt_base; 535fe56b9e6SYuval Mintz u32 i; 536fe56b9e6SYuval Mintz 537fe56b9e6SYuval Mintz /* Set the global windows */ 538fe56b9e6SYuval Mintz gtt_base = PXP_PF_WINDOW_ADMIN_START + PXP_PF_WINDOW_ADMIN_GLOBAL_START; 539fe56b9e6SYuval Mintz 540fe56b9e6SYuval Mintz for (i = 0; i < ARRAY_SIZE(pxp_global_win); i++) 541fe56b9e6SYuval Mintz if (pxp_global_win[i]) 542fe56b9e6SYuval Mintz REG_WR(p_hwfn, gtt_base + i * PXP_GLOBAL_ENTRY_SIZE, 543fe56b9e6SYuval Mintz pxp_global_win[i]); 544fe56b9e6SYuval Mintz } 545fe56b9e6SYuval Mintz 546fe56b9e6SYuval Mintz int qed_init_fw_data(struct qed_dev *cdev, 547fe56b9e6SYuval Mintz const u8 *data) 548fe56b9e6SYuval Mintz { 549fe56b9e6SYuval Mintz struct qed_fw_data *fw = cdev->fw_data; 550fe56b9e6SYuval Mintz struct bin_buffer_hdr *buf_hdr; 551fe56b9e6SYuval Mintz u32 offset, len; 552fe56b9e6SYuval Mintz 553fe56b9e6SYuval Mintz if (!data) { 554fe56b9e6SYuval Mintz DP_NOTICE(cdev, "Invalid fw data\n"); 555fe56b9e6SYuval Mintz return -EINVAL; 556fe56b9e6SYuval Mintz } 557fe56b9e6SYuval Mintz 558fe56b9e6SYuval Mintz buf_hdr = (struct bin_buffer_hdr *)data; 559fe56b9e6SYuval Mintz 560fe56b9e6SYuval Mintz offset = buf_hdr[BIN_BUF_INIT_CMD].offset; 561fe56b9e6SYuval Mintz fw->init_ops = (union init_op *)(data + offset); 562fe56b9e6SYuval Mintz 563fe56b9e6SYuval Mintz offset = buf_hdr[BIN_BUF_INIT_VAL].offset; 564fe56b9e6SYuval Mintz fw->arr_data = (u32 *)(data + offset); 565fe56b9e6SYuval Mintz 566fe56b9e6SYuval Mintz offset = buf_hdr[BIN_BUF_INIT_MODE_TREE].offset; 567fe56b9e6SYuval Mintz fw->modes_tree_buf = (u8 *)(data + offset); 568fe56b9e6SYuval Mintz len = buf_hdr[BIN_BUF_INIT_CMD].length; 569fe56b9e6SYuval Mintz fw->init_ops_size = len / sizeof(struct init_raw_op); 570fe56b9e6SYuval Mintz 571fe56b9e6SYuval Mintz return 0; 572fe56b9e6SYuval Mintz } 573