1c965db44STomer Tayar /* QLogic qed NIC Driver 2c965db44STomer Tayar * Copyright (c) 2015 QLogic Corporation 3c965db44STomer Tayar * 4c965db44STomer Tayar * This software is available under the terms of the GNU General Public License 5c965db44STomer Tayar * (GPL) Version 2, available from the file COPYING in the main directory of 6c965db44STomer Tayar * this source tree. 7c965db44STomer Tayar */ 8c965db44STomer Tayar 9c965db44STomer Tayar #include <linux/module.h> 10c965db44STomer Tayar #include <linux/vmalloc.h> 11c965db44STomer Tayar #include <linux/crc32.h> 12c965db44STomer Tayar #include "qed.h" 13c965db44STomer Tayar #include "qed_hsi.h" 14c965db44STomer Tayar #include "qed_hw.h" 15c965db44STomer Tayar #include "qed_mcp.h" 16c965db44STomer Tayar #include "qed_reg_addr.h" 17c965db44STomer Tayar 18c965db44STomer Tayar /* Chip IDs enum */ 19c965db44STomer Tayar enum chip_ids { 20c965db44STomer Tayar CHIP_BB_B0, 21c965db44STomer Tayar CHIP_K2, 22c965db44STomer Tayar MAX_CHIP_IDS 23c965db44STomer Tayar }; 24c965db44STomer Tayar 25c965db44STomer Tayar /* Memory groups enum */ 26c965db44STomer Tayar enum mem_groups { 27c965db44STomer Tayar MEM_GROUP_PXP_MEM, 28c965db44STomer Tayar MEM_GROUP_DMAE_MEM, 29c965db44STomer Tayar MEM_GROUP_CM_MEM, 30c965db44STomer Tayar MEM_GROUP_QM_MEM, 31c965db44STomer Tayar MEM_GROUP_TM_MEM, 32c965db44STomer Tayar MEM_GROUP_BRB_RAM, 33c965db44STomer Tayar MEM_GROUP_BRB_MEM, 34c965db44STomer Tayar MEM_GROUP_PRS_MEM, 35c965db44STomer Tayar MEM_GROUP_SDM_MEM, 36c965db44STomer Tayar MEM_GROUP_PBUF, 37c965db44STomer Tayar MEM_GROUP_IOR, 38c965db44STomer Tayar MEM_GROUP_RAM, 39c965db44STomer Tayar MEM_GROUP_BTB_RAM, 40c965db44STomer Tayar MEM_GROUP_RDIF_CTX, 41c965db44STomer Tayar MEM_GROUP_TDIF_CTX, 42be086e7cSMintz, Yuval MEM_GROUP_CFC_MEM, 43c965db44STomer Tayar MEM_GROUP_CONN_CFC_MEM, 44c965db44STomer Tayar MEM_GROUP_TASK_CFC_MEM, 45c965db44STomer Tayar MEM_GROUP_CAU_PI, 46c965db44STomer Tayar MEM_GROUP_CAU_MEM, 47c965db44STomer Tayar MEM_GROUP_PXP_ILT, 48c965db44STomer Tayar MEM_GROUP_MULD_MEM, 49c965db44STomer Tayar MEM_GROUP_BTB_MEM, 50c965db44STomer Tayar MEM_GROUP_IGU_MEM, 51c965db44STomer Tayar MEM_GROUP_IGU_MSIX, 52c965db44STomer Tayar MEM_GROUP_CAU_SB, 53c965db44STomer Tayar MEM_GROUP_BMB_RAM, 54c965db44STomer Tayar MEM_GROUP_BMB_MEM, 55c965db44STomer Tayar MEM_GROUPS_NUM 56c965db44STomer Tayar }; 57c965db44STomer Tayar 58c965db44STomer Tayar /* Memory groups names */ 59c965db44STomer Tayar static const char * const s_mem_group_names[] = { 60c965db44STomer Tayar "PXP_MEM", 61c965db44STomer Tayar "DMAE_MEM", 62c965db44STomer Tayar "CM_MEM", 63c965db44STomer Tayar "QM_MEM", 64c965db44STomer Tayar "TM_MEM", 65c965db44STomer Tayar "BRB_RAM", 66c965db44STomer Tayar "BRB_MEM", 67c965db44STomer Tayar "PRS_MEM", 68c965db44STomer Tayar "SDM_MEM", 69c965db44STomer Tayar "PBUF", 70c965db44STomer Tayar "IOR", 71c965db44STomer Tayar "RAM", 72c965db44STomer Tayar "BTB_RAM", 73c965db44STomer Tayar "RDIF_CTX", 74c965db44STomer Tayar "TDIF_CTX", 75be086e7cSMintz, Yuval "CFC_MEM", 76c965db44STomer Tayar "CONN_CFC_MEM", 77c965db44STomer Tayar "TASK_CFC_MEM", 78c965db44STomer Tayar "CAU_PI", 79c965db44STomer Tayar "CAU_MEM", 80c965db44STomer Tayar "PXP_ILT", 81c965db44STomer Tayar "MULD_MEM", 82c965db44STomer Tayar "BTB_MEM", 83c965db44STomer Tayar "IGU_MEM", 84c965db44STomer Tayar "IGU_MSIX", 85c965db44STomer Tayar "CAU_SB", 86c965db44STomer Tayar "BMB_RAM", 87c965db44STomer Tayar "BMB_MEM", 88c965db44STomer Tayar }; 89c965db44STomer Tayar 90c965db44STomer Tayar /* Idle check conditions */ 91c965db44STomer Tayar static u32 cond4(const u32 *r, const u32 *imm) 92c965db44STomer Tayar { 93c965db44STomer Tayar return ((r[0] & imm[0]) != imm[1]) && ((r[1] & imm[2]) != imm[3]); 94c965db44STomer Tayar } 95c965db44STomer Tayar 96c965db44STomer Tayar static u32 cond6(const u32 *r, const u32 *imm) 97c965db44STomer Tayar { 98c965db44STomer Tayar return ((r[0] >> imm[0]) & imm[1]) != imm[2]; 99c965db44STomer Tayar } 100c965db44STomer Tayar 101c965db44STomer Tayar static u32 cond5(const u32 *r, const u32 *imm) 102c965db44STomer Tayar { 103c965db44STomer Tayar return (r[0] & imm[0]) != imm[1]; 104c965db44STomer Tayar } 105c965db44STomer Tayar 106c965db44STomer Tayar static u32 cond8(const u32 *r, const u32 *imm) 107c965db44STomer Tayar { 108c965db44STomer Tayar return ((r[0] & imm[0]) >> imm[1]) != 109c965db44STomer Tayar (((r[0] & imm[2]) >> imm[3]) | ((r[1] & imm[4]) << imm[5])); 110c965db44STomer Tayar } 111c965db44STomer Tayar 112c965db44STomer Tayar static u32 cond9(const u32 *r, const u32 *imm) 113c965db44STomer Tayar { 114c965db44STomer Tayar return ((r[0] & imm[0]) >> imm[1]) != (r[0] & imm[2]); 115c965db44STomer Tayar } 116c965db44STomer Tayar 117c965db44STomer Tayar static u32 cond1(const u32 *r, const u32 *imm) 118c965db44STomer Tayar { 119c965db44STomer Tayar return (r[0] & ~imm[0]) != imm[1]; 120c965db44STomer Tayar } 121c965db44STomer Tayar 122c965db44STomer Tayar static u32 cond0(const u32 *r, const u32 *imm) 123c965db44STomer Tayar { 124c965db44STomer Tayar return r[0] != imm[0]; 125c965db44STomer Tayar } 126c965db44STomer Tayar 127c965db44STomer Tayar static u32 cond10(const u32 *r, const u32 *imm) 128c965db44STomer Tayar { 129c965db44STomer Tayar return r[0] != r[1] && r[2] == imm[0]; 130c965db44STomer Tayar } 131c965db44STomer Tayar 132c965db44STomer Tayar static u32 cond11(const u32 *r, const u32 *imm) 133c965db44STomer Tayar { 134c965db44STomer Tayar return r[0] != r[1] && r[2] > imm[0]; 135c965db44STomer Tayar } 136c965db44STomer Tayar 137c965db44STomer Tayar static u32 cond3(const u32 *r, const u32 *imm) 138c965db44STomer Tayar { 139c965db44STomer Tayar return r[0] != r[1]; 140c965db44STomer Tayar } 141c965db44STomer Tayar 142c965db44STomer Tayar static u32 cond12(const u32 *r, const u32 *imm) 143c965db44STomer Tayar { 144c965db44STomer Tayar return r[0] & imm[0]; 145c965db44STomer Tayar } 146c965db44STomer Tayar 147c965db44STomer Tayar static u32 cond7(const u32 *r, const u32 *imm) 148c965db44STomer Tayar { 149c965db44STomer Tayar return r[0] < (r[1] - imm[0]); 150c965db44STomer Tayar } 151c965db44STomer Tayar 152c965db44STomer Tayar static u32 cond2(const u32 *r, const u32 *imm) 153c965db44STomer Tayar { 154c965db44STomer Tayar return r[0] > imm[0]; 155c965db44STomer Tayar } 156c965db44STomer Tayar 157c965db44STomer Tayar /* Array of Idle Check conditions */ 158c965db44STomer Tayar static u32(*cond_arr[]) (const u32 *r, const u32 *imm) = { 159c965db44STomer Tayar cond0, 160c965db44STomer Tayar cond1, 161c965db44STomer Tayar cond2, 162c965db44STomer Tayar cond3, 163c965db44STomer Tayar cond4, 164c965db44STomer Tayar cond5, 165c965db44STomer Tayar cond6, 166c965db44STomer Tayar cond7, 167c965db44STomer Tayar cond8, 168c965db44STomer Tayar cond9, 169c965db44STomer Tayar cond10, 170c965db44STomer Tayar cond11, 171c965db44STomer Tayar cond12, 172c965db44STomer Tayar }; 173c965db44STomer Tayar 174c965db44STomer Tayar /******************************* Data Types **********************************/ 175c965db44STomer Tayar 176c965db44STomer Tayar enum platform_ids { 177c965db44STomer Tayar PLATFORM_ASIC, 178c965db44STomer Tayar PLATFORM_RESERVED, 179c965db44STomer Tayar PLATFORM_RESERVED2, 180c965db44STomer Tayar PLATFORM_RESERVED3, 181c965db44STomer Tayar MAX_PLATFORM_IDS 182c965db44STomer Tayar }; 183c965db44STomer Tayar 184c965db44STomer Tayar struct dbg_array { 185c965db44STomer Tayar const u32 *ptr; 186c965db44STomer Tayar u32 size_in_dwords; 187c965db44STomer Tayar }; 188c965db44STomer Tayar 189be086e7cSMintz, Yuval struct chip_platform_defs { 190be086e7cSMintz, Yuval u8 num_ports; 191be086e7cSMintz, Yuval u8 num_pfs; 192be086e7cSMintz, Yuval u8 num_vfs; 193be086e7cSMintz, Yuval }; 194be086e7cSMintz, Yuval 195c965db44STomer Tayar /* Chip constant definitions */ 196c965db44STomer Tayar struct chip_defs { 197c965db44STomer Tayar const char *name; 198be086e7cSMintz, Yuval struct chip_platform_defs per_platform[MAX_PLATFORM_IDS]; 199c965db44STomer Tayar }; 200c965db44STomer Tayar 201c965db44STomer Tayar /* Platform constant definitions */ 202c965db44STomer Tayar struct platform_defs { 203c965db44STomer Tayar const char *name; 204c965db44STomer Tayar u32 delay_factor; 205c965db44STomer Tayar }; 206c965db44STomer Tayar 207c965db44STomer Tayar /* Storm constant definitions */ 208c965db44STomer Tayar struct storm_defs { 209c965db44STomer Tayar char letter; 210c965db44STomer Tayar enum block_id block_id; 211c965db44STomer Tayar enum dbg_bus_clients dbg_client_id[MAX_CHIP_IDS]; 212c965db44STomer Tayar bool has_vfc; 213c965db44STomer Tayar u32 sem_fast_mem_addr; 214c965db44STomer Tayar u32 sem_frame_mode_addr; 215c965db44STomer Tayar u32 sem_slow_enable_addr; 216c965db44STomer Tayar u32 sem_slow_mode_addr; 217c965db44STomer Tayar u32 sem_slow_mode1_conf_addr; 218c965db44STomer Tayar u32 sem_sync_dbg_empty_addr; 219c965db44STomer Tayar u32 sem_slow_dbg_empty_addr; 220c965db44STomer Tayar u32 cm_ctx_wr_addr; 221c965db44STomer Tayar u32 cm_conn_ag_ctx_lid_size; /* In quad-regs */ 222c965db44STomer Tayar u32 cm_conn_ag_ctx_rd_addr; 223c965db44STomer Tayar u32 cm_conn_st_ctx_lid_size; /* In quad-regs */ 224c965db44STomer Tayar u32 cm_conn_st_ctx_rd_addr; 225c965db44STomer Tayar u32 cm_task_ag_ctx_lid_size; /* In quad-regs */ 226c965db44STomer Tayar u32 cm_task_ag_ctx_rd_addr; 227c965db44STomer Tayar u32 cm_task_st_ctx_lid_size; /* In quad-regs */ 228c965db44STomer Tayar u32 cm_task_st_ctx_rd_addr; 229c965db44STomer Tayar }; 230c965db44STomer Tayar 231c965db44STomer Tayar /* Block constant definitions */ 232c965db44STomer Tayar struct block_defs { 233c965db44STomer Tayar const char *name; 234c965db44STomer Tayar bool has_dbg_bus[MAX_CHIP_IDS]; 235c965db44STomer Tayar bool associated_to_storm; 236c965db44STomer Tayar u32 storm_id; /* Valid only if associated_to_storm is true */ 237c965db44STomer Tayar enum dbg_bus_clients dbg_client_id[MAX_CHIP_IDS]; 238c965db44STomer Tayar u32 dbg_select_addr; 239c965db44STomer Tayar u32 dbg_cycle_enable_addr; 240c965db44STomer Tayar u32 dbg_shift_addr; 241c965db44STomer Tayar u32 dbg_force_valid_addr; 242c965db44STomer Tayar u32 dbg_force_frame_addr; 243c965db44STomer Tayar bool has_reset_bit; 244c965db44STomer Tayar bool unreset; /* If true, the block is taken out of reset before dump */ 245c965db44STomer Tayar enum dbg_reset_regs reset_reg; 246c965db44STomer Tayar u8 reset_bit_offset; /* Bit offset in reset register */ 247c965db44STomer Tayar }; 248c965db44STomer Tayar 249c965db44STomer Tayar /* Reset register definitions */ 250c965db44STomer Tayar struct reset_reg_defs { 251c965db44STomer Tayar u32 addr; 252c965db44STomer Tayar u32 unreset_val; 253c965db44STomer Tayar bool exists[MAX_CHIP_IDS]; 254c965db44STomer Tayar }; 255c965db44STomer Tayar 256c965db44STomer Tayar struct grc_param_defs { 257c965db44STomer Tayar u32 default_val[MAX_CHIP_IDS]; 258c965db44STomer Tayar u32 min; 259c965db44STomer Tayar u32 max; 260c965db44STomer Tayar bool is_preset; 261c965db44STomer Tayar u32 exclude_all_preset_val; 262c965db44STomer Tayar u32 crash_preset_val; 263c965db44STomer Tayar }; 264c965db44STomer Tayar 265c965db44STomer Tayar struct rss_mem_defs { 266c965db44STomer Tayar const char *mem_name; 267c965db44STomer Tayar const char *type_name; 268c965db44STomer Tayar u32 addr; /* In 128b units */ 269c965db44STomer Tayar u32 num_entries[MAX_CHIP_IDS]; 270c965db44STomer Tayar u32 entry_width[MAX_CHIP_IDS]; /* In bits */ 271c965db44STomer Tayar }; 272c965db44STomer Tayar 273c965db44STomer Tayar struct vfc_ram_defs { 274c965db44STomer Tayar const char *mem_name; 275c965db44STomer Tayar const char *type_name; 276c965db44STomer Tayar u32 base_row; 277c965db44STomer Tayar u32 num_rows; 278c965db44STomer Tayar }; 279c965db44STomer Tayar 280c965db44STomer Tayar struct big_ram_defs { 281c965db44STomer Tayar const char *instance_name; 282c965db44STomer Tayar enum mem_groups mem_group_id; 283c965db44STomer Tayar enum mem_groups ram_mem_group_id; 284c965db44STomer Tayar enum dbg_grc_params grc_param; 285c965db44STomer Tayar u32 addr_reg_addr; 286c965db44STomer Tayar u32 data_reg_addr; 287c965db44STomer Tayar u32 num_of_blocks[MAX_CHIP_IDS]; 288c965db44STomer Tayar }; 289c965db44STomer Tayar 290c965db44STomer Tayar struct phy_defs { 291c965db44STomer Tayar const char *phy_name; 292c965db44STomer Tayar u32 base_addr; 293c965db44STomer Tayar u32 tbus_addr_lo_addr; 294c965db44STomer Tayar u32 tbus_addr_hi_addr; 295c965db44STomer Tayar u32 tbus_data_lo_addr; 296c965db44STomer Tayar u32 tbus_data_hi_addr; 297c965db44STomer Tayar }; 298c965db44STomer Tayar 299c965db44STomer Tayar /******************************** Constants **********************************/ 300c965db44STomer Tayar 301c965db44STomer Tayar #define MAX_LCIDS 320 302c965db44STomer Tayar #define MAX_LTIDS 320 303c965db44STomer Tayar #define NUM_IOR_SETS 2 304c965db44STomer Tayar #define IORS_PER_SET 176 305c965db44STomer Tayar #define IOR_SET_OFFSET(set_id) ((set_id) * 256) 306c965db44STomer Tayar #define BYTES_IN_DWORD sizeof(u32) 307c965db44STomer Tayar 308c965db44STomer Tayar /* In the macros below, size and offset are specified in bits */ 309c965db44STomer Tayar #define CEIL_DWORDS(size) DIV_ROUND_UP(size, 32) 310c965db44STomer Tayar #define FIELD_BIT_OFFSET(type, field) type ## _ ## field ## _ ## OFFSET 311c965db44STomer Tayar #define FIELD_BIT_SIZE(type, field) type ## _ ## field ## _ ## SIZE 312c965db44STomer Tayar #define FIELD_DWORD_OFFSET(type, field) \ 313c965db44STomer Tayar (int)(FIELD_BIT_OFFSET(type, field) / 32) 314c965db44STomer Tayar #define FIELD_DWORD_SHIFT(type, field) (FIELD_BIT_OFFSET(type, field) % 32) 315c965db44STomer Tayar #define FIELD_BIT_MASK(type, field) \ 316c965db44STomer Tayar (((1 << FIELD_BIT_SIZE(type, field)) - 1) << \ 317c965db44STomer Tayar FIELD_DWORD_SHIFT(type, field)) 318c965db44STomer Tayar #define SET_VAR_FIELD(var, type, field, val) \ 319c965db44STomer Tayar do { \ 320c965db44STomer Tayar var[FIELD_DWORD_OFFSET(type, field)] &= \ 321c965db44STomer Tayar (~FIELD_BIT_MASK(type, field)); \ 322c965db44STomer Tayar var[FIELD_DWORD_OFFSET(type, field)] |= \ 323c965db44STomer Tayar (val) << FIELD_DWORD_SHIFT(type, field); \ 324c965db44STomer Tayar } while (0) 325c965db44STomer Tayar #define ARR_REG_WR(dev, ptt, addr, arr, arr_size) \ 326c965db44STomer Tayar do { \ 327c965db44STomer Tayar for (i = 0; i < (arr_size); i++) \ 328c965db44STomer Tayar qed_wr(dev, ptt, addr, (arr)[i]); \ 329c965db44STomer Tayar } while (0) 330c965db44STomer Tayar #define ARR_REG_RD(dev, ptt, addr, arr, arr_size) \ 331c965db44STomer Tayar do { \ 332c965db44STomer Tayar for (i = 0; i < (arr_size); i++) \ 333c965db44STomer Tayar (arr)[i] = qed_rd(dev, ptt, addr); \ 334c965db44STomer Tayar } while (0) 335c965db44STomer Tayar 336c965db44STomer Tayar #define DWORDS_TO_BYTES(dwords) ((dwords) * BYTES_IN_DWORD) 337c965db44STomer Tayar #define BYTES_TO_DWORDS(bytes) ((bytes) / BYTES_IN_DWORD) 338c965db44STomer Tayar #define RAM_LINES_TO_DWORDS(lines) ((lines) * 2) 339c965db44STomer Tayar #define RAM_LINES_TO_BYTES(lines) \ 340c965db44STomer Tayar DWORDS_TO_BYTES(RAM_LINES_TO_DWORDS(lines)) 341c965db44STomer Tayar #define REG_DUMP_LEN_SHIFT 24 342c965db44STomer Tayar #define MEM_DUMP_ENTRY_SIZE_DWORDS \ 343c965db44STomer Tayar BYTES_TO_DWORDS(sizeof(struct dbg_dump_mem)) 344c965db44STomer Tayar #define IDLE_CHK_RULE_SIZE_DWORDS \ 345c965db44STomer Tayar BYTES_TO_DWORDS(sizeof(struct dbg_idle_chk_rule)) 346c965db44STomer Tayar #define IDLE_CHK_RESULT_HDR_DWORDS \ 347c965db44STomer Tayar BYTES_TO_DWORDS(sizeof(struct dbg_idle_chk_result_hdr)) 348c965db44STomer Tayar #define IDLE_CHK_RESULT_REG_HDR_DWORDS \ 349c965db44STomer Tayar BYTES_TO_DWORDS(sizeof(struct dbg_idle_chk_result_reg_hdr)) 350c965db44STomer Tayar #define IDLE_CHK_MAX_ENTRIES_SIZE 32 351c965db44STomer Tayar 352c965db44STomer Tayar /* The sizes and offsets below are specified in bits */ 353c965db44STomer Tayar #define VFC_CAM_CMD_STRUCT_SIZE 64 354c965db44STomer Tayar #define VFC_CAM_CMD_ROW_OFFSET 48 355c965db44STomer Tayar #define VFC_CAM_CMD_ROW_SIZE 9 356c965db44STomer Tayar #define VFC_CAM_ADDR_STRUCT_SIZE 16 357c965db44STomer Tayar #define VFC_CAM_ADDR_OP_OFFSET 0 358c965db44STomer Tayar #define VFC_CAM_ADDR_OP_SIZE 4 359c965db44STomer Tayar #define VFC_CAM_RESP_STRUCT_SIZE 256 360c965db44STomer Tayar #define VFC_RAM_ADDR_STRUCT_SIZE 16 361c965db44STomer Tayar #define VFC_RAM_ADDR_OP_OFFSET 0 362c965db44STomer Tayar #define VFC_RAM_ADDR_OP_SIZE 2 363c965db44STomer Tayar #define VFC_RAM_ADDR_ROW_OFFSET 2 364c965db44STomer Tayar #define VFC_RAM_ADDR_ROW_SIZE 10 365c965db44STomer Tayar #define VFC_RAM_RESP_STRUCT_SIZE 256 366c965db44STomer Tayar #define VFC_CAM_CMD_DWORDS CEIL_DWORDS(VFC_CAM_CMD_STRUCT_SIZE) 367c965db44STomer Tayar #define VFC_CAM_ADDR_DWORDS CEIL_DWORDS(VFC_CAM_ADDR_STRUCT_SIZE) 368c965db44STomer Tayar #define VFC_CAM_RESP_DWORDS CEIL_DWORDS(VFC_CAM_RESP_STRUCT_SIZE) 369c965db44STomer Tayar #define VFC_RAM_CMD_DWORDS VFC_CAM_CMD_DWORDS 370c965db44STomer Tayar #define VFC_RAM_ADDR_DWORDS CEIL_DWORDS(VFC_RAM_ADDR_STRUCT_SIZE) 371c965db44STomer Tayar #define VFC_RAM_RESP_DWORDS CEIL_DWORDS(VFC_RAM_RESP_STRUCT_SIZE) 372c965db44STomer Tayar #define NUM_VFC_RAM_TYPES 4 373c965db44STomer Tayar #define VFC_CAM_NUM_ROWS 512 374c965db44STomer Tayar #define VFC_OPCODE_CAM_RD 14 375c965db44STomer Tayar #define VFC_OPCODE_RAM_RD 0 376c965db44STomer Tayar #define NUM_RSS_MEM_TYPES 5 377c965db44STomer Tayar #define NUM_BIG_RAM_TYPES 3 378c965db44STomer Tayar #define BIG_RAM_BLOCK_SIZE_BYTES 128 379c965db44STomer Tayar #define BIG_RAM_BLOCK_SIZE_DWORDS \ 380c965db44STomer Tayar BYTES_TO_DWORDS(BIG_RAM_BLOCK_SIZE_BYTES) 381c965db44STomer Tayar #define NUM_PHY_TBUS_ADDRESSES 2048 382c965db44STomer Tayar #define PHY_DUMP_SIZE_DWORDS (NUM_PHY_TBUS_ADDRESSES / 2) 383c965db44STomer Tayar #define RESET_REG_UNRESET_OFFSET 4 384c965db44STomer Tayar #define STALL_DELAY_MS 500 385c965db44STomer Tayar #define STATIC_DEBUG_LINE_DWORDS 9 386c965db44STomer Tayar #define NUM_DBG_BUS_LINES 256 387c965db44STomer Tayar #define NUM_COMMON_GLOBAL_PARAMS 8 388c965db44STomer Tayar #define FW_IMG_MAIN 1 389c965db44STomer Tayar #define REG_FIFO_DEPTH_ELEMENTS 32 390c965db44STomer Tayar #define REG_FIFO_ELEMENT_DWORDS 2 391c965db44STomer Tayar #define REG_FIFO_DEPTH_DWORDS \ 392c965db44STomer Tayar (REG_FIFO_ELEMENT_DWORDS * REG_FIFO_DEPTH_ELEMENTS) 393c965db44STomer Tayar #define IGU_FIFO_DEPTH_ELEMENTS 64 394c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORDS 4 395c965db44STomer Tayar #define IGU_FIFO_DEPTH_DWORDS \ 396c965db44STomer Tayar (IGU_FIFO_ELEMENT_DWORDS * IGU_FIFO_DEPTH_ELEMENTS) 397c965db44STomer Tayar #define PROTECTION_OVERRIDE_DEPTH_ELEMENTS 20 398c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_DWORDS 2 399c965db44STomer Tayar #define PROTECTION_OVERRIDE_DEPTH_DWORDS \ 400c965db44STomer Tayar (PROTECTION_OVERRIDE_DEPTH_ELEMENTS * \ 401c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_DWORDS) 402c965db44STomer Tayar #define MCP_SPAD_TRACE_OFFSIZE_ADDR \ 403c965db44STomer Tayar (MCP_REG_SCRATCH + \ 404c965db44STomer Tayar offsetof(struct static_init, sections[SPAD_SECTION_TRACE])) 405c965db44STomer Tayar #define MCP_TRACE_META_IMAGE_SIGNATURE 0x669955aa 406c965db44STomer Tayar #define EMPTY_FW_VERSION_STR "???_???_???_???" 407c965db44STomer Tayar #define EMPTY_FW_IMAGE_STR "???????????????" 408c965db44STomer Tayar 409c965db44STomer Tayar /***************************** Constant Arrays *******************************/ 410c965db44STomer Tayar 411c965db44STomer Tayar /* Debug arrays */ 412be086e7cSMintz, Yuval static struct dbg_array s_dbg_arrays[MAX_BIN_DBG_BUFFER_TYPE] = { {0} }; 413c965db44STomer Tayar 414c965db44STomer Tayar /* Chip constant definitions array */ 415c965db44STomer Tayar static struct chip_defs s_chip_defs[MAX_CHIP_IDS] = { 416c965db44STomer Tayar { "bb_b0", 417be086e7cSMintz, Yuval { {MAX_NUM_PORTS_BB, MAX_NUM_PFS_BB, MAX_NUM_VFS_BB}, {0, 0, 0}, 418be086e7cSMintz, Yuval {0, 0, 0}, {0, 0, 0} } }, 419be086e7cSMintz, Yuval { "k2", 420be086e7cSMintz, Yuval { {MAX_NUM_PORTS_K2, MAX_NUM_PFS_K2, MAX_NUM_VFS_K2}, {0, 0, 0}, 421be086e7cSMintz, Yuval {0, 0, 0}, {0, 0, 0} } } 422c965db44STomer Tayar }; 423c965db44STomer Tayar 424c965db44STomer Tayar /* Storm constant definitions array */ 425c965db44STomer Tayar static struct storm_defs s_storm_defs[] = { 426c965db44STomer Tayar /* Tstorm */ 427c965db44STomer Tayar {'T', BLOCK_TSEM, 428be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT}, true, 429c965db44STomer Tayar TSEM_REG_FAST_MEMORY, 430c965db44STomer Tayar TSEM_REG_DBG_FRAME_MODE, TSEM_REG_SLOW_DBG_ACTIVE, 431c965db44STomer Tayar TSEM_REG_SLOW_DBG_MODE, TSEM_REG_DBG_MODE1_CFG, 432c965db44STomer Tayar TSEM_REG_SYNC_DBG_EMPTY, TSEM_REG_SLOW_DBG_EMPTY, 433c965db44STomer Tayar TCM_REG_CTX_RBC_ACCS, 434c965db44STomer Tayar 4, TCM_REG_AGG_CON_CTX, 435c965db44STomer Tayar 16, TCM_REG_SM_CON_CTX, 436c965db44STomer Tayar 2, TCM_REG_AGG_TASK_CTX, 437c965db44STomer Tayar 4, TCM_REG_SM_TASK_CTX}, 438c965db44STomer Tayar /* Mstorm */ 439c965db44STomer Tayar {'M', BLOCK_MSEM, 440be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM}, false, 441c965db44STomer Tayar MSEM_REG_FAST_MEMORY, 442c965db44STomer Tayar MSEM_REG_DBG_FRAME_MODE, MSEM_REG_SLOW_DBG_ACTIVE, 443c965db44STomer Tayar MSEM_REG_SLOW_DBG_MODE, MSEM_REG_DBG_MODE1_CFG, 444c965db44STomer Tayar MSEM_REG_SYNC_DBG_EMPTY, MSEM_REG_SLOW_DBG_EMPTY, 445c965db44STomer Tayar MCM_REG_CTX_RBC_ACCS, 446c965db44STomer Tayar 1, MCM_REG_AGG_CON_CTX, 447c965db44STomer Tayar 10, MCM_REG_SM_CON_CTX, 448c965db44STomer Tayar 2, MCM_REG_AGG_TASK_CTX, 449c965db44STomer Tayar 7, MCM_REG_SM_TASK_CTX}, 450c965db44STomer Tayar /* Ustorm */ 451c965db44STomer Tayar {'U', BLOCK_USEM, 452be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU}, false, 453c965db44STomer Tayar USEM_REG_FAST_MEMORY, 454c965db44STomer Tayar USEM_REG_DBG_FRAME_MODE, USEM_REG_SLOW_DBG_ACTIVE, 455c965db44STomer Tayar USEM_REG_SLOW_DBG_MODE, USEM_REG_DBG_MODE1_CFG, 456c965db44STomer Tayar USEM_REG_SYNC_DBG_EMPTY, USEM_REG_SLOW_DBG_EMPTY, 457c965db44STomer Tayar UCM_REG_CTX_RBC_ACCS, 458c965db44STomer Tayar 2, UCM_REG_AGG_CON_CTX, 459c965db44STomer Tayar 13, UCM_REG_SM_CON_CTX, 460c965db44STomer Tayar 3, UCM_REG_AGG_TASK_CTX, 461c965db44STomer Tayar 3, UCM_REG_SM_TASK_CTX}, 462c965db44STomer Tayar /* Xstorm */ 463c965db44STomer Tayar {'X', BLOCK_XSEM, 464be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX}, false, 465c965db44STomer Tayar XSEM_REG_FAST_MEMORY, 466c965db44STomer Tayar XSEM_REG_DBG_FRAME_MODE, XSEM_REG_SLOW_DBG_ACTIVE, 467c965db44STomer Tayar XSEM_REG_SLOW_DBG_MODE, XSEM_REG_DBG_MODE1_CFG, 468c965db44STomer Tayar XSEM_REG_SYNC_DBG_EMPTY, XSEM_REG_SLOW_DBG_EMPTY, 469c965db44STomer Tayar XCM_REG_CTX_RBC_ACCS, 470c965db44STomer Tayar 9, XCM_REG_AGG_CON_CTX, 471c965db44STomer Tayar 15, XCM_REG_SM_CON_CTX, 472c965db44STomer Tayar 0, 0, 473c965db44STomer Tayar 0, 0}, 474c965db44STomer Tayar /* Ystorm */ 475c965db44STomer Tayar {'Y', BLOCK_YSEM, 476be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY}, false, 477c965db44STomer Tayar YSEM_REG_FAST_MEMORY, 478c965db44STomer Tayar YSEM_REG_DBG_FRAME_MODE, YSEM_REG_SLOW_DBG_ACTIVE, 479c965db44STomer Tayar YSEM_REG_SLOW_DBG_MODE, YSEM_REG_DBG_MODE1_CFG, 480c965db44STomer Tayar YSEM_REG_SYNC_DBG_EMPTY, TSEM_REG_SLOW_DBG_EMPTY, 481c965db44STomer Tayar YCM_REG_CTX_RBC_ACCS, 482c965db44STomer Tayar 2, YCM_REG_AGG_CON_CTX, 483c965db44STomer Tayar 3, YCM_REG_SM_CON_CTX, 484c965db44STomer Tayar 2, YCM_REG_AGG_TASK_CTX, 485c965db44STomer Tayar 12, YCM_REG_SM_TASK_CTX}, 486c965db44STomer Tayar /* Pstorm */ 487c965db44STomer Tayar {'P', BLOCK_PSEM, 488be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, true, 489c965db44STomer Tayar PSEM_REG_FAST_MEMORY, 490c965db44STomer Tayar PSEM_REG_DBG_FRAME_MODE, PSEM_REG_SLOW_DBG_ACTIVE, 491c965db44STomer Tayar PSEM_REG_SLOW_DBG_MODE, PSEM_REG_DBG_MODE1_CFG, 492c965db44STomer Tayar PSEM_REG_SYNC_DBG_EMPTY, PSEM_REG_SLOW_DBG_EMPTY, 493c965db44STomer Tayar PCM_REG_CTX_RBC_ACCS, 494c965db44STomer Tayar 0, 0, 495c965db44STomer Tayar 10, PCM_REG_SM_CON_CTX, 496c965db44STomer Tayar 0, 0, 497c965db44STomer Tayar 0, 0} 498c965db44STomer Tayar }; 499c965db44STomer Tayar 500c965db44STomer Tayar /* Block definitions array */ 501c965db44STomer Tayar static struct block_defs block_grc_defs = { 502be086e7cSMintz, Yuval "grc", 503be086e7cSMintz, Yuval {true, true}, false, 0, 504be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCN, DBG_BUS_CLIENT_RBCN}, 505c965db44STomer Tayar GRC_REG_DBG_SELECT, GRC_REG_DBG_DWORD_ENABLE, 506c965db44STomer Tayar GRC_REG_DBG_SHIFT, GRC_REG_DBG_FORCE_VALID, 507c965db44STomer Tayar GRC_REG_DBG_FORCE_FRAME, 508c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_UA, 1 509c965db44STomer Tayar }; 510c965db44STomer Tayar 511c965db44STomer Tayar static struct block_defs block_miscs_defs = { 512be086e7cSMintz, Yuval "miscs", {false, false}, false, 0, 513be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 514c965db44STomer Tayar 0, 0, 0, 0, 0, 515c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 516c965db44STomer Tayar }; 517c965db44STomer Tayar 518c965db44STomer Tayar static struct block_defs block_misc_defs = { 519be086e7cSMintz, Yuval "misc", {false, false}, false, 0, 520be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 521c965db44STomer Tayar 0, 0, 0, 0, 0, 522c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 523c965db44STomer Tayar }; 524c965db44STomer Tayar 525c965db44STomer Tayar static struct block_defs block_dbu_defs = { 526be086e7cSMintz, Yuval "dbu", {false, false}, false, 0, 527be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 528c965db44STomer Tayar 0, 0, 0, 0, 0, 529c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 530c965db44STomer Tayar }; 531c965db44STomer Tayar 532c965db44STomer Tayar static struct block_defs block_pglue_b_defs = { 533be086e7cSMintz, Yuval "pglue_b", 534be086e7cSMintz, Yuval {true, true}, false, 0, 535be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCH, DBG_BUS_CLIENT_RBCH}, 536c965db44STomer Tayar PGLUE_B_REG_DBG_SELECT, PGLUE_B_REG_DBG_DWORD_ENABLE, 537c965db44STomer Tayar PGLUE_B_REG_DBG_SHIFT, PGLUE_B_REG_DBG_FORCE_VALID, 538c965db44STomer Tayar PGLUE_B_REG_DBG_FORCE_FRAME, 539c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 1 540c965db44STomer Tayar }; 541c965db44STomer Tayar 542c965db44STomer Tayar static struct block_defs block_cnig_defs = { 543be086e7cSMintz, Yuval "cnig", 544be086e7cSMintz, Yuval {false, true}, false, 0, 545be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCW}, 546c965db44STomer Tayar CNIG_REG_DBG_SELECT_K2, CNIG_REG_DBG_DWORD_ENABLE_K2, 547c965db44STomer Tayar CNIG_REG_DBG_SHIFT_K2, CNIG_REG_DBG_FORCE_VALID_K2, 548c965db44STomer Tayar CNIG_REG_DBG_FORCE_FRAME_K2, 549c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 0 550c965db44STomer Tayar }; 551c965db44STomer Tayar 552c965db44STomer Tayar static struct block_defs block_cpmu_defs = { 553be086e7cSMintz, Yuval "cpmu", {false, false}, false, 0, 554be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 555c965db44STomer Tayar 0, 0, 0, 0, 0, 556c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 8 557c965db44STomer Tayar }; 558c965db44STomer Tayar 559c965db44STomer Tayar static struct block_defs block_ncsi_defs = { 560be086e7cSMintz, Yuval "ncsi", 561be086e7cSMintz, Yuval {true, true}, false, 0, 562be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ}, 563c965db44STomer Tayar NCSI_REG_DBG_SELECT, NCSI_REG_DBG_DWORD_ENABLE, 564c965db44STomer Tayar NCSI_REG_DBG_SHIFT, NCSI_REG_DBG_FORCE_VALID, 565c965db44STomer Tayar NCSI_REG_DBG_FORCE_FRAME, 566c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 5 567c965db44STomer Tayar }; 568c965db44STomer Tayar 569c965db44STomer Tayar static struct block_defs block_opte_defs = { 570be086e7cSMintz, Yuval "opte", {false, false}, false, 0, 571be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 572c965db44STomer Tayar 0, 0, 0, 0, 0, 573c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 4 574c965db44STomer Tayar }; 575c965db44STomer Tayar 576c965db44STomer Tayar static struct block_defs block_bmb_defs = { 577be086e7cSMintz, Yuval "bmb", 578be086e7cSMintz, Yuval {true, true}, false, 0, 579be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCB}, 580c965db44STomer Tayar BMB_REG_DBG_SELECT, BMB_REG_DBG_DWORD_ENABLE, 581c965db44STomer Tayar BMB_REG_DBG_SHIFT, BMB_REG_DBG_FORCE_VALID, 582c965db44STomer Tayar BMB_REG_DBG_FORCE_FRAME, 583c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_UA, 7 584c965db44STomer Tayar }; 585c965db44STomer Tayar 586c965db44STomer Tayar static struct block_defs block_pcie_defs = { 587be086e7cSMintz, Yuval "pcie", 588be086e7cSMintz, Yuval {false, true}, false, 0, 589be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH}, 590c965db44STomer Tayar PCIE_REG_DBG_COMMON_SELECT, PCIE_REG_DBG_COMMON_DWORD_ENABLE, 591c965db44STomer Tayar PCIE_REG_DBG_COMMON_SHIFT, PCIE_REG_DBG_COMMON_FORCE_VALID, 592c965db44STomer Tayar PCIE_REG_DBG_COMMON_FORCE_FRAME, 593c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 594c965db44STomer Tayar }; 595c965db44STomer Tayar 596c965db44STomer Tayar static struct block_defs block_mcp_defs = { 597be086e7cSMintz, Yuval "mcp", {false, false}, false, 0, 598be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 599c965db44STomer Tayar 0, 0, 0, 0, 0, 600c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 601c965db44STomer Tayar }; 602c965db44STomer Tayar 603c965db44STomer Tayar static struct block_defs block_mcp2_defs = { 604be086e7cSMintz, Yuval "mcp2", 605be086e7cSMintz, Yuval {true, true}, false, 0, 606be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ}, 607c965db44STomer Tayar MCP2_REG_DBG_SELECT, MCP2_REG_DBG_DWORD_ENABLE, 608c965db44STomer Tayar MCP2_REG_DBG_SHIFT, MCP2_REG_DBG_FORCE_VALID, 609c965db44STomer Tayar MCP2_REG_DBG_FORCE_FRAME, 610c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 611c965db44STomer Tayar }; 612c965db44STomer Tayar 613c965db44STomer Tayar static struct block_defs block_pswhst_defs = { 614be086e7cSMintz, Yuval "pswhst", 615be086e7cSMintz, Yuval {true, true}, false, 0, 616be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 617c965db44STomer Tayar PSWHST_REG_DBG_SELECT, PSWHST_REG_DBG_DWORD_ENABLE, 618c965db44STomer Tayar PSWHST_REG_DBG_SHIFT, PSWHST_REG_DBG_FORCE_VALID, 619c965db44STomer Tayar PSWHST_REG_DBG_FORCE_FRAME, 620c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 0 621c965db44STomer Tayar }; 622c965db44STomer Tayar 623c965db44STomer Tayar static struct block_defs block_pswhst2_defs = { 624be086e7cSMintz, Yuval "pswhst2", 625be086e7cSMintz, Yuval {true, true}, false, 0, 626be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 627c965db44STomer Tayar PSWHST2_REG_DBG_SELECT, PSWHST2_REG_DBG_DWORD_ENABLE, 628c965db44STomer Tayar PSWHST2_REG_DBG_SHIFT, PSWHST2_REG_DBG_FORCE_VALID, 629c965db44STomer Tayar PSWHST2_REG_DBG_FORCE_FRAME, 630c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 0 631c965db44STomer Tayar }; 632c965db44STomer Tayar 633c965db44STomer Tayar static struct block_defs block_pswrd_defs = { 634be086e7cSMintz, Yuval "pswrd", 635be086e7cSMintz, Yuval {true, true}, false, 0, 636be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 637c965db44STomer Tayar PSWRD_REG_DBG_SELECT, PSWRD_REG_DBG_DWORD_ENABLE, 638c965db44STomer Tayar PSWRD_REG_DBG_SHIFT, PSWRD_REG_DBG_FORCE_VALID, 639c965db44STomer Tayar PSWRD_REG_DBG_FORCE_FRAME, 640c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 2 641c965db44STomer Tayar }; 642c965db44STomer Tayar 643c965db44STomer Tayar static struct block_defs block_pswrd2_defs = { 644be086e7cSMintz, Yuval "pswrd2", 645be086e7cSMintz, Yuval {true, true}, false, 0, 646be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 647c965db44STomer Tayar PSWRD2_REG_DBG_SELECT, PSWRD2_REG_DBG_DWORD_ENABLE, 648c965db44STomer Tayar PSWRD2_REG_DBG_SHIFT, PSWRD2_REG_DBG_FORCE_VALID, 649c965db44STomer Tayar PSWRD2_REG_DBG_FORCE_FRAME, 650c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 2 651c965db44STomer Tayar }; 652c965db44STomer Tayar 653c965db44STomer Tayar static struct block_defs block_pswwr_defs = { 654be086e7cSMintz, Yuval "pswwr", 655be086e7cSMintz, Yuval {true, true}, false, 0, 656be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 657c965db44STomer Tayar PSWWR_REG_DBG_SELECT, PSWWR_REG_DBG_DWORD_ENABLE, 658c965db44STomer Tayar PSWWR_REG_DBG_SHIFT, PSWWR_REG_DBG_FORCE_VALID, 659c965db44STomer Tayar PSWWR_REG_DBG_FORCE_FRAME, 660c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 3 661c965db44STomer Tayar }; 662c965db44STomer Tayar 663c965db44STomer Tayar static struct block_defs block_pswwr2_defs = { 664be086e7cSMintz, Yuval "pswwr2", {false, false}, false, 0, 665be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 666c965db44STomer Tayar 0, 0, 0, 0, 0, 667c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 3 668c965db44STomer Tayar }; 669c965db44STomer Tayar 670c965db44STomer Tayar static struct block_defs block_pswrq_defs = { 671be086e7cSMintz, Yuval "pswrq", 672be086e7cSMintz, Yuval {true, true}, false, 0, 673be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 674c965db44STomer Tayar PSWRQ_REG_DBG_SELECT, PSWRQ_REG_DBG_DWORD_ENABLE, 675c965db44STomer Tayar PSWRQ_REG_DBG_SHIFT, PSWRQ_REG_DBG_FORCE_VALID, 676c965db44STomer Tayar PSWRQ_REG_DBG_FORCE_FRAME, 677c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 1 678c965db44STomer Tayar }; 679c965db44STomer Tayar 680c965db44STomer Tayar static struct block_defs block_pswrq2_defs = { 681be086e7cSMintz, Yuval "pswrq2", 682be086e7cSMintz, Yuval {true, true}, false, 0, 683be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 684c965db44STomer Tayar PSWRQ2_REG_DBG_SELECT, PSWRQ2_REG_DBG_DWORD_ENABLE, 685c965db44STomer Tayar PSWRQ2_REG_DBG_SHIFT, PSWRQ2_REG_DBG_FORCE_VALID, 686c965db44STomer Tayar PSWRQ2_REG_DBG_FORCE_FRAME, 687c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 1 688c965db44STomer Tayar }; 689c965db44STomer Tayar 690c965db44STomer Tayar static struct block_defs block_pglcs_defs = { 691be086e7cSMintz, Yuval "pglcs", 692be086e7cSMintz, Yuval {false, true}, false, 0, 693be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH}, 694c965db44STomer Tayar PGLCS_REG_DBG_SELECT, PGLCS_REG_DBG_DWORD_ENABLE, 695c965db44STomer Tayar PGLCS_REG_DBG_SHIFT, PGLCS_REG_DBG_FORCE_VALID, 696c965db44STomer Tayar PGLCS_REG_DBG_FORCE_FRAME, 697c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 2 698c965db44STomer Tayar }; 699c965db44STomer Tayar 700c965db44STomer Tayar static struct block_defs block_ptu_defs = { 701be086e7cSMintz, Yuval "ptu", 702be086e7cSMintz, Yuval {true, true}, false, 0, 703be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 704c965db44STomer Tayar PTU_REG_DBG_SELECT, PTU_REG_DBG_DWORD_ENABLE, 705c965db44STomer Tayar PTU_REG_DBG_SHIFT, PTU_REG_DBG_FORCE_VALID, 706c965db44STomer Tayar PTU_REG_DBG_FORCE_FRAME, 707c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 20 708c965db44STomer Tayar }; 709c965db44STomer Tayar 710c965db44STomer Tayar static struct block_defs block_dmae_defs = { 711be086e7cSMintz, Yuval "dmae", 712be086e7cSMintz, Yuval {true, true}, false, 0, 713be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 714c965db44STomer Tayar DMAE_REG_DBG_SELECT, DMAE_REG_DBG_DWORD_ENABLE, 715c965db44STomer Tayar DMAE_REG_DBG_SHIFT, DMAE_REG_DBG_FORCE_VALID, 716c965db44STomer Tayar DMAE_REG_DBG_FORCE_FRAME, 717c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 28 718c965db44STomer Tayar }; 719c965db44STomer Tayar 720c965db44STomer Tayar static struct block_defs block_tcm_defs = { 721be086e7cSMintz, Yuval "tcm", 722be086e7cSMintz, Yuval {true, true}, true, DBG_TSTORM_ID, 723be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT}, 724c965db44STomer Tayar TCM_REG_DBG_SELECT, TCM_REG_DBG_DWORD_ENABLE, 725c965db44STomer Tayar TCM_REG_DBG_SHIFT, TCM_REG_DBG_FORCE_VALID, 726c965db44STomer Tayar TCM_REG_DBG_FORCE_FRAME, 727c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 5 728c965db44STomer Tayar }; 729c965db44STomer Tayar 730c965db44STomer Tayar static struct block_defs block_mcm_defs = { 731be086e7cSMintz, Yuval "mcm", 732be086e7cSMintz, Yuval {true, true}, true, DBG_MSTORM_ID, 733be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM}, 734c965db44STomer Tayar MCM_REG_DBG_SELECT, MCM_REG_DBG_DWORD_ENABLE, 735c965db44STomer Tayar MCM_REG_DBG_SHIFT, MCM_REG_DBG_FORCE_VALID, 736c965db44STomer Tayar MCM_REG_DBG_FORCE_FRAME, 737c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 3 738c965db44STomer Tayar }; 739c965db44STomer Tayar 740c965db44STomer Tayar static struct block_defs block_ucm_defs = { 741be086e7cSMintz, Yuval "ucm", 742be086e7cSMintz, Yuval {true, true}, true, DBG_USTORM_ID, 743be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU}, 744c965db44STomer Tayar UCM_REG_DBG_SELECT, UCM_REG_DBG_DWORD_ENABLE, 745c965db44STomer Tayar UCM_REG_DBG_SHIFT, UCM_REG_DBG_FORCE_VALID, 746c965db44STomer Tayar UCM_REG_DBG_FORCE_FRAME, 747c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 8 748c965db44STomer Tayar }; 749c965db44STomer Tayar 750c965db44STomer Tayar static struct block_defs block_xcm_defs = { 751be086e7cSMintz, Yuval "xcm", 752be086e7cSMintz, Yuval {true, true}, true, DBG_XSTORM_ID, 753be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX}, 754c965db44STomer Tayar XCM_REG_DBG_SELECT, XCM_REG_DBG_DWORD_ENABLE, 755c965db44STomer Tayar XCM_REG_DBG_SHIFT, XCM_REG_DBG_FORCE_VALID, 756c965db44STomer Tayar XCM_REG_DBG_FORCE_FRAME, 757c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 19 758c965db44STomer Tayar }; 759c965db44STomer Tayar 760c965db44STomer Tayar static struct block_defs block_ycm_defs = { 761be086e7cSMintz, Yuval "ycm", 762be086e7cSMintz, Yuval {true, true}, true, DBG_YSTORM_ID, 763be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY}, 764c965db44STomer Tayar YCM_REG_DBG_SELECT, YCM_REG_DBG_DWORD_ENABLE, 765c965db44STomer Tayar YCM_REG_DBG_SHIFT, YCM_REG_DBG_FORCE_VALID, 766c965db44STomer Tayar YCM_REG_DBG_FORCE_FRAME, 767c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 5 768c965db44STomer Tayar }; 769c965db44STomer Tayar 770c965db44STomer Tayar static struct block_defs block_pcm_defs = { 771be086e7cSMintz, Yuval "pcm", 772be086e7cSMintz, Yuval {true, true}, true, DBG_PSTORM_ID, 773be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, 774c965db44STomer Tayar PCM_REG_DBG_SELECT, PCM_REG_DBG_DWORD_ENABLE, 775c965db44STomer Tayar PCM_REG_DBG_SHIFT, PCM_REG_DBG_FORCE_VALID, 776c965db44STomer Tayar PCM_REG_DBG_FORCE_FRAME, 777c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 4 778c965db44STomer Tayar }; 779c965db44STomer Tayar 780c965db44STomer Tayar static struct block_defs block_qm_defs = { 781be086e7cSMintz, Yuval "qm", 782be086e7cSMintz, Yuval {true, true}, false, 0, 783be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCQ}, 784c965db44STomer Tayar QM_REG_DBG_SELECT, QM_REG_DBG_DWORD_ENABLE, 785c965db44STomer Tayar QM_REG_DBG_SHIFT, QM_REG_DBG_FORCE_VALID, 786c965db44STomer Tayar QM_REG_DBG_FORCE_FRAME, 787c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 16 788c965db44STomer Tayar }; 789c965db44STomer Tayar 790c965db44STomer Tayar static struct block_defs block_tm_defs = { 791be086e7cSMintz, Yuval "tm", 792be086e7cSMintz, Yuval {true, true}, false, 0, 793be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, 794c965db44STomer Tayar TM_REG_DBG_SELECT, TM_REG_DBG_DWORD_ENABLE, 795c965db44STomer Tayar TM_REG_DBG_SHIFT, TM_REG_DBG_FORCE_VALID, 796c965db44STomer Tayar TM_REG_DBG_FORCE_FRAME, 797c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 17 798c965db44STomer Tayar }; 799c965db44STomer Tayar 800c965db44STomer Tayar static struct block_defs block_dorq_defs = { 801be086e7cSMintz, Yuval "dorq", 802be086e7cSMintz, Yuval {true, true}, false, 0, 803be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY}, 804c965db44STomer Tayar DORQ_REG_DBG_SELECT, DORQ_REG_DBG_DWORD_ENABLE, 805c965db44STomer Tayar DORQ_REG_DBG_SHIFT, DORQ_REG_DBG_FORCE_VALID, 806c965db44STomer Tayar DORQ_REG_DBG_FORCE_FRAME, 807c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 18 808c965db44STomer Tayar }; 809c965db44STomer Tayar 810c965db44STomer Tayar static struct block_defs block_brb_defs = { 811be086e7cSMintz, Yuval "brb", 812be086e7cSMintz, Yuval {true, true}, false, 0, 813be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCR}, 814c965db44STomer Tayar BRB_REG_DBG_SELECT, BRB_REG_DBG_DWORD_ENABLE, 815c965db44STomer Tayar BRB_REG_DBG_SHIFT, BRB_REG_DBG_FORCE_VALID, 816c965db44STomer Tayar BRB_REG_DBG_FORCE_FRAME, 817c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 0 818c965db44STomer Tayar }; 819c965db44STomer Tayar 820c965db44STomer Tayar static struct block_defs block_src_defs = { 821be086e7cSMintz, Yuval "src", 822be086e7cSMintz, Yuval {true, true}, false, 0, 823be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF}, 824c965db44STomer Tayar SRC_REG_DBG_SELECT, SRC_REG_DBG_DWORD_ENABLE, 825c965db44STomer Tayar SRC_REG_DBG_SHIFT, SRC_REG_DBG_FORCE_VALID, 826c965db44STomer Tayar SRC_REG_DBG_FORCE_FRAME, 827c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 2 828c965db44STomer Tayar }; 829c965db44STomer Tayar 830c965db44STomer Tayar static struct block_defs block_prs_defs = { 831be086e7cSMintz, Yuval "prs", 832be086e7cSMintz, Yuval {true, true}, false, 0, 833be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCR}, 834c965db44STomer Tayar PRS_REG_DBG_SELECT, PRS_REG_DBG_DWORD_ENABLE, 835c965db44STomer Tayar PRS_REG_DBG_SHIFT, PRS_REG_DBG_FORCE_VALID, 836c965db44STomer Tayar PRS_REG_DBG_FORCE_FRAME, 837c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 1 838c965db44STomer Tayar }; 839c965db44STomer Tayar 840c965db44STomer Tayar static struct block_defs block_tsdm_defs = { 841be086e7cSMintz, Yuval "tsdm", 842be086e7cSMintz, Yuval {true, true}, true, DBG_TSTORM_ID, 843be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT}, 844c965db44STomer Tayar TSDM_REG_DBG_SELECT, TSDM_REG_DBG_DWORD_ENABLE, 845c965db44STomer Tayar TSDM_REG_DBG_SHIFT, TSDM_REG_DBG_FORCE_VALID, 846c965db44STomer Tayar TSDM_REG_DBG_FORCE_FRAME, 847c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 3 848c965db44STomer Tayar }; 849c965db44STomer Tayar 850c965db44STomer Tayar static struct block_defs block_msdm_defs = { 851be086e7cSMintz, Yuval "msdm", 852be086e7cSMintz, Yuval {true, true}, true, DBG_MSTORM_ID, 853be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM}, 854c965db44STomer Tayar MSDM_REG_DBG_SELECT, MSDM_REG_DBG_DWORD_ENABLE, 855c965db44STomer Tayar MSDM_REG_DBG_SHIFT, MSDM_REG_DBG_FORCE_VALID, 856c965db44STomer Tayar MSDM_REG_DBG_FORCE_FRAME, 857c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 6 858c965db44STomer Tayar }; 859c965db44STomer Tayar 860c965db44STomer Tayar static struct block_defs block_usdm_defs = { 861be086e7cSMintz, Yuval "usdm", 862be086e7cSMintz, Yuval {true, true}, true, DBG_USTORM_ID, 863be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU}, 864c965db44STomer Tayar USDM_REG_DBG_SELECT, USDM_REG_DBG_DWORD_ENABLE, 865c965db44STomer Tayar USDM_REG_DBG_SHIFT, USDM_REG_DBG_FORCE_VALID, 866c965db44STomer Tayar USDM_REG_DBG_FORCE_FRAME, 867c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 7 868c965db44STomer Tayar }; 869c965db44STomer Tayar 870c965db44STomer Tayar static struct block_defs block_xsdm_defs = { 871be086e7cSMintz, Yuval "xsdm", 872be086e7cSMintz, Yuval {true, true}, true, DBG_XSTORM_ID, 873be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX}, 874c965db44STomer Tayar XSDM_REG_DBG_SELECT, XSDM_REG_DBG_DWORD_ENABLE, 875c965db44STomer Tayar XSDM_REG_DBG_SHIFT, XSDM_REG_DBG_FORCE_VALID, 876c965db44STomer Tayar XSDM_REG_DBG_FORCE_FRAME, 877c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 20 878c965db44STomer Tayar }; 879c965db44STomer Tayar 880c965db44STomer Tayar static struct block_defs block_ysdm_defs = { 881be086e7cSMintz, Yuval "ysdm", 882be086e7cSMintz, Yuval {true, true}, true, DBG_YSTORM_ID, 883be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY}, 884c965db44STomer Tayar YSDM_REG_DBG_SELECT, YSDM_REG_DBG_DWORD_ENABLE, 885c965db44STomer Tayar YSDM_REG_DBG_SHIFT, YSDM_REG_DBG_FORCE_VALID, 886c965db44STomer Tayar YSDM_REG_DBG_FORCE_FRAME, 887c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 8 888c965db44STomer Tayar }; 889c965db44STomer Tayar 890c965db44STomer Tayar static struct block_defs block_psdm_defs = { 891be086e7cSMintz, Yuval "psdm", 892be086e7cSMintz, Yuval {true, true}, true, DBG_PSTORM_ID, 893be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, 894c965db44STomer Tayar PSDM_REG_DBG_SELECT, PSDM_REG_DBG_DWORD_ENABLE, 895c965db44STomer Tayar PSDM_REG_DBG_SHIFT, PSDM_REG_DBG_FORCE_VALID, 896c965db44STomer Tayar PSDM_REG_DBG_FORCE_FRAME, 897c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 7 898c965db44STomer Tayar }; 899c965db44STomer Tayar 900c965db44STomer Tayar static struct block_defs block_tsem_defs = { 901be086e7cSMintz, Yuval "tsem", 902be086e7cSMintz, Yuval {true, true}, true, DBG_TSTORM_ID, 903be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT}, 904c965db44STomer Tayar TSEM_REG_DBG_SELECT, TSEM_REG_DBG_DWORD_ENABLE, 905c965db44STomer Tayar TSEM_REG_DBG_SHIFT, TSEM_REG_DBG_FORCE_VALID, 906c965db44STomer Tayar TSEM_REG_DBG_FORCE_FRAME, 907c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 4 908c965db44STomer Tayar }; 909c965db44STomer Tayar 910c965db44STomer Tayar static struct block_defs block_msem_defs = { 911be086e7cSMintz, Yuval "msem", 912be086e7cSMintz, Yuval {true, true}, true, DBG_MSTORM_ID, 913be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM}, 914c965db44STomer Tayar MSEM_REG_DBG_SELECT, MSEM_REG_DBG_DWORD_ENABLE, 915c965db44STomer Tayar MSEM_REG_DBG_SHIFT, MSEM_REG_DBG_FORCE_VALID, 916c965db44STomer Tayar MSEM_REG_DBG_FORCE_FRAME, 917c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 9 918c965db44STomer Tayar }; 919c965db44STomer Tayar 920c965db44STomer Tayar static struct block_defs block_usem_defs = { 921be086e7cSMintz, Yuval "usem", 922be086e7cSMintz, Yuval {true, true}, true, DBG_USTORM_ID, 923be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU}, 924c965db44STomer Tayar USEM_REG_DBG_SELECT, USEM_REG_DBG_DWORD_ENABLE, 925c965db44STomer Tayar USEM_REG_DBG_SHIFT, USEM_REG_DBG_FORCE_VALID, 926c965db44STomer Tayar USEM_REG_DBG_FORCE_FRAME, 927c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 9 928c965db44STomer Tayar }; 929c965db44STomer Tayar 930c965db44STomer Tayar static struct block_defs block_xsem_defs = { 931be086e7cSMintz, Yuval "xsem", 932be086e7cSMintz, Yuval {true, true}, true, DBG_XSTORM_ID, 933be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX}, 934c965db44STomer Tayar XSEM_REG_DBG_SELECT, XSEM_REG_DBG_DWORD_ENABLE, 935c965db44STomer Tayar XSEM_REG_DBG_SHIFT, XSEM_REG_DBG_FORCE_VALID, 936c965db44STomer Tayar XSEM_REG_DBG_FORCE_FRAME, 937c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 21 938c965db44STomer Tayar }; 939c965db44STomer Tayar 940c965db44STomer Tayar static struct block_defs block_ysem_defs = { 941be086e7cSMintz, Yuval "ysem", 942be086e7cSMintz, Yuval {true, true}, true, DBG_YSTORM_ID, 943be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY}, 944c965db44STomer Tayar YSEM_REG_DBG_SELECT, YSEM_REG_DBG_DWORD_ENABLE, 945c965db44STomer Tayar YSEM_REG_DBG_SHIFT, YSEM_REG_DBG_FORCE_VALID, 946c965db44STomer Tayar YSEM_REG_DBG_FORCE_FRAME, 947c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 11 948c965db44STomer Tayar }; 949c965db44STomer Tayar 950c965db44STomer Tayar static struct block_defs block_psem_defs = { 951be086e7cSMintz, Yuval "psem", 952be086e7cSMintz, Yuval {true, true}, true, DBG_PSTORM_ID, 953be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, 954c965db44STomer Tayar PSEM_REG_DBG_SELECT, PSEM_REG_DBG_DWORD_ENABLE, 955c965db44STomer Tayar PSEM_REG_DBG_SHIFT, PSEM_REG_DBG_FORCE_VALID, 956c965db44STomer Tayar PSEM_REG_DBG_FORCE_FRAME, 957c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 10 958c965db44STomer Tayar }; 959c965db44STomer Tayar 960c965db44STomer Tayar static struct block_defs block_rss_defs = { 961be086e7cSMintz, Yuval "rss", 962be086e7cSMintz, Yuval {true, true}, false, 0, 963be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT}, 964c965db44STomer Tayar RSS_REG_DBG_SELECT, RSS_REG_DBG_DWORD_ENABLE, 965c965db44STomer Tayar RSS_REG_DBG_SHIFT, RSS_REG_DBG_FORCE_VALID, 966c965db44STomer Tayar RSS_REG_DBG_FORCE_FRAME, 967c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 18 968c965db44STomer Tayar }; 969c965db44STomer Tayar 970c965db44STomer Tayar static struct block_defs block_tmld_defs = { 971be086e7cSMintz, Yuval "tmld", 972be086e7cSMintz, Yuval {true, true}, false, 0, 973be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM}, 974c965db44STomer Tayar TMLD_REG_DBG_SELECT, TMLD_REG_DBG_DWORD_ENABLE, 975c965db44STomer Tayar TMLD_REG_DBG_SHIFT, TMLD_REG_DBG_FORCE_VALID, 976c965db44STomer Tayar TMLD_REG_DBG_FORCE_FRAME, 977c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 13 978c965db44STomer Tayar }; 979c965db44STomer Tayar 980c965db44STomer Tayar static struct block_defs block_muld_defs = { 981be086e7cSMintz, Yuval "muld", 982be086e7cSMintz, Yuval {true, true}, false, 0, 983be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU}, 984c965db44STomer Tayar MULD_REG_DBG_SELECT, MULD_REG_DBG_DWORD_ENABLE, 985c965db44STomer Tayar MULD_REG_DBG_SHIFT, MULD_REG_DBG_FORCE_VALID, 986c965db44STomer Tayar MULD_REG_DBG_FORCE_FRAME, 987c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 14 988c965db44STomer Tayar }; 989c965db44STomer Tayar 990c965db44STomer Tayar static struct block_defs block_yuld_defs = { 991be086e7cSMintz, Yuval "yuld", 992be086e7cSMintz, Yuval {true, true}, false, 0, 993be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU}, 994c965db44STomer Tayar YULD_REG_DBG_SELECT, YULD_REG_DBG_DWORD_ENABLE, 995c965db44STomer Tayar YULD_REG_DBG_SHIFT, YULD_REG_DBG_FORCE_VALID, 996c965db44STomer Tayar YULD_REG_DBG_FORCE_FRAME, 997c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 15 998c965db44STomer Tayar }; 999c965db44STomer Tayar 1000c965db44STomer Tayar static struct block_defs block_xyld_defs = { 1001be086e7cSMintz, Yuval "xyld", 1002be086e7cSMintz, Yuval {true, true}, false, 0, 1003be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX}, 1004c965db44STomer Tayar XYLD_REG_DBG_SELECT, XYLD_REG_DBG_DWORD_ENABLE, 1005c965db44STomer Tayar XYLD_REG_DBG_SHIFT, XYLD_REG_DBG_FORCE_VALID, 1006c965db44STomer Tayar XYLD_REG_DBG_FORCE_FRAME, 1007c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 12 1008c965db44STomer Tayar }; 1009c965db44STomer Tayar 1010c965db44STomer Tayar static struct block_defs block_prm_defs = { 1011be086e7cSMintz, Yuval "prm", 1012be086e7cSMintz, Yuval {true, true}, false, 0, 1013be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM}, 1014c965db44STomer Tayar PRM_REG_DBG_SELECT, PRM_REG_DBG_DWORD_ENABLE, 1015c965db44STomer Tayar PRM_REG_DBG_SHIFT, PRM_REG_DBG_FORCE_VALID, 1016c965db44STomer Tayar PRM_REG_DBG_FORCE_FRAME, 1017c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 21 1018c965db44STomer Tayar }; 1019c965db44STomer Tayar 1020c965db44STomer Tayar static struct block_defs block_pbf_pb1_defs = { 1021be086e7cSMintz, Yuval "pbf_pb1", 1022be086e7cSMintz, Yuval {true, true}, false, 0, 1023be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCV}, 1024c965db44STomer Tayar PBF_PB1_REG_DBG_SELECT, PBF_PB1_REG_DBG_DWORD_ENABLE, 1025c965db44STomer Tayar PBF_PB1_REG_DBG_SHIFT, PBF_PB1_REG_DBG_FORCE_VALID, 1026c965db44STomer Tayar PBF_PB1_REG_DBG_FORCE_FRAME, 1027c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 1028c965db44STomer Tayar 11 1029c965db44STomer Tayar }; 1030c965db44STomer Tayar 1031c965db44STomer Tayar static struct block_defs block_pbf_pb2_defs = { 1032be086e7cSMintz, Yuval "pbf_pb2", 1033be086e7cSMintz, Yuval {true, true}, false, 0, 1034be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCV}, 1035c965db44STomer Tayar PBF_PB2_REG_DBG_SELECT, PBF_PB2_REG_DBG_DWORD_ENABLE, 1036c965db44STomer Tayar PBF_PB2_REG_DBG_SHIFT, PBF_PB2_REG_DBG_FORCE_VALID, 1037c965db44STomer Tayar PBF_PB2_REG_DBG_FORCE_FRAME, 1038c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 1039c965db44STomer Tayar 12 1040c965db44STomer Tayar }; 1041c965db44STomer Tayar 1042c965db44STomer Tayar static struct block_defs block_rpb_defs = { 1043be086e7cSMintz, Yuval "rpb", 1044be086e7cSMintz, Yuval {true, true}, false, 0, 1045be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM}, 1046c965db44STomer Tayar RPB_REG_DBG_SELECT, RPB_REG_DBG_DWORD_ENABLE, 1047c965db44STomer Tayar RPB_REG_DBG_SHIFT, RPB_REG_DBG_FORCE_VALID, 1048c965db44STomer Tayar RPB_REG_DBG_FORCE_FRAME, 1049c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 13 1050c965db44STomer Tayar }; 1051c965db44STomer Tayar 1052c965db44STomer Tayar static struct block_defs block_btb_defs = { 1053be086e7cSMintz, Yuval "btb", 1054be086e7cSMintz, Yuval {true, true}, false, 0, 1055be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCV}, 1056c965db44STomer Tayar BTB_REG_DBG_SELECT, BTB_REG_DBG_DWORD_ENABLE, 1057c965db44STomer Tayar BTB_REG_DBG_SHIFT, BTB_REG_DBG_FORCE_VALID, 1058c965db44STomer Tayar BTB_REG_DBG_FORCE_FRAME, 1059c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 10 1060c965db44STomer Tayar }; 1061c965db44STomer Tayar 1062c965db44STomer Tayar static struct block_defs block_pbf_defs = { 1063be086e7cSMintz, Yuval "pbf", 1064be086e7cSMintz, Yuval {true, true}, false, 0, 1065be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCV}, 1066c965db44STomer Tayar PBF_REG_DBG_SELECT, PBF_REG_DBG_DWORD_ENABLE, 1067c965db44STomer Tayar PBF_REG_DBG_SHIFT, PBF_REG_DBG_FORCE_VALID, 1068c965db44STomer Tayar PBF_REG_DBG_FORCE_FRAME, 1069c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 15 1070c965db44STomer Tayar }; 1071c965db44STomer Tayar 1072c965db44STomer Tayar static struct block_defs block_rdif_defs = { 1073be086e7cSMintz, Yuval "rdif", 1074be086e7cSMintz, Yuval {true, true}, false, 0, 1075be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM}, 1076c965db44STomer Tayar RDIF_REG_DBG_SELECT, RDIF_REG_DBG_DWORD_ENABLE, 1077c965db44STomer Tayar RDIF_REG_DBG_SHIFT, RDIF_REG_DBG_FORCE_VALID, 1078c965db44STomer Tayar RDIF_REG_DBG_FORCE_FRAME, 1079c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 16 1080c965db44STomer Tayar }; 1081c965db44STomer Tayar 1082c965db44STomer Tayar static struct block_defs block_tdif_defs = { 1083be086e7cSMintz, Yuval "tdif", 1084be086e7cSMintz, Yuval {true, true}, false, 0, 1085be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, 1086c965db44STomer Tayar TDIF_REG_DBG_SELECT, TDIF_REG_DBG_DWORD_ENABLE, 1087c965db44STomer Tayar TDIF_REG_DBG_SHIFT, TDIF_REG_DBG_FORCE_VALID, 1088c965db44STomer Tayar TDIF_REG_DBG_FORCE_FRAME, 1089c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 17 1090c965db44STomer Tayar }; 1091c965db44STomer Tayar 1092c965db44STomer Tayar static struct block_defs block_cdu_defs = { 1093be086e7cSMintz, Yuval "cdu", 1094be086e7cSMintz, Yuval {true, true}, false, 0, 1095be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF}, 1096c965db44STomer Tayar CDU_REG_DBG_SELECT, CDU_REG_DBG_DWORD_ENABLE, 1097c965db44STomer Tayar CDU_REG_DBG_SHIFT, CDU_REG_DBG_FORCE_VALID, 1098c965db44STomer Tayar CDU_REG_DBG_FORCE_FRAME, 1099c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 23 1100c965db44STomer Tayar }; 1101c965db44STomer Tayar 1102c965db44STomer Tayar static struct block_defs block_ccfc_defs = { 1103be086e7cSMintz, Yuval "ccfc", 1104be086e7cSMintz, Yuval {true, true}, false, 0, 1105be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF}, 1106c965db44STomer Tayar CCFC_REG_DBG_SELECT, CCFC_REG_DBG_DWORD_ENABLE, 1107c965db44STomer Tayar CCFC_REG_DBG_SHIFT, CCFC_REG_DBG_FORCE_VALID, 1108c965db44STomer Tayar CCFC_REG_DBG_FORCE_FRAME, 1109c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 24 1110c965db44STomer Tayar }; 1111c965db44STomer Tayar 1112c965db44STomer Tayar static struct block_defs block_tcfc_defs = { 1113be086e7cSMintz, Yuval "tcfc", 1114be086e7cSMintz, Yuval {true, true}, false, 0, 1115be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF}, 1116c965db44STomer Tayar TCFC_REG_DBG_SELECT, TCFC_REG_DBG_DWORD_ENABLE, 1117c965db44STomer Tayar TCFC_REG_DBG_SHIFT, TCFC_REG_DBG_FORCE_VALID, 1118c965db44STomer Tayar TCFC_REG_DBG_FORCE_FRAME, 1119c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 25 1120c965db44STomer Tayar }; 1121c965db44STomer Tayar 1122c965db44STomer Tayar static struct block_defs block_igu_defs = { 1123be086e7cSMintz, Yuval "igu", 1124be086e7cSMintz, Yuval {true, true}, false, 0, 1125be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 1126c965db44STomer Tayar IGU_REG_DBG_SELECT, IGU_REG_DBG_DWORD_ENABLE, 1127c965db44STomer Tayar IGU_REG_DBG_SHIFT, IGU_REG_DBG_FORCE_VALID, 1128c965db44STomer Tayar IGU_REG_DBG_FORCE_FRAME, 1129c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 27 1130c965db44STomer Tayar }; 1131c965db44STomer Tayar 1132c965db44STomer Tayar static struct block_defs block_cau_defs = { 1133be086e7cSMintz, Yuval "cau", 1134be086e7cSMintz, Yuval {true, true}, false, 0, 1135be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 1136c965db44STomer Tayar CAU_REG_DBG_SELECT, CAU_REG_DBG_DWORD_ENABLE, 1137c965db44STomer Tayar CAU_REG_DBG_SHIFT, CAU_REG_DBG_FORCE_VALID, 1138c965db44STomer Tayar CAU_REG_DBG_FORCE_FRAME, 1139c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 19 1140c965db44STomer Tayar }; 1141c965db44STomer Tayar 1142c965db44STomer Tayar static struct block_defs block_umac_defs = { 1143be086e7cSMintz, Yuval "umac", 1144be086e7cSMintz, Yuval {false, true}, false, 0, 1145be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCZ}, 1146c965db44STomer Tayar UMAC_REG_DBG_SELECT, UMAC_REG_DBG_DWORD_ENABLE, 1147c965db44STomer Tayar UMAC_REG_DBG_SHIFT, UMAC_REG_DBG_FORCE_VALID, 1148c965db44STomer Tayar UMAC_REG_DBG_FORCE_FRAME, 1149c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 6 1150c965db44STomer Tayar }; 1151c965db44STomer Tayar 1152c965db44STomer Tayar static struct block_defs block_xmac_defs = { 1153be086e7cSMintz, Yuval "xmac", {false, false}, false, 0, 1154be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1155c965db44STomer Tayar 0, 0, 0, 0, 0, 1156c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1157c965db44STomer Tayar }; 1158c965db44STomer Tayar 1159c965db44STomer Tayar static struct block_defs block_dbg_defs = { 1160be086e7cSMintz, Yuval "dbg", {false, false}, false, 0, 1161be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1162c965db44STomer Tayar 0, 0, 0, 0, 0, 1163c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VAUX, 3 1164c965db44STomer Tayar }; 1165c965db44STomer Tayar 1166c965db44STomer Tayar static struct block_defs block_nig_defs = { 1167be086e7cSMintz, Yuval "nig", 1168be086e7cSMintz, Yuval {true, true}, false, 0, 1169be086e7cSMintz, Yuval {DBG_BUS_CLIENT_RBCN, DBG_BUS_CLIENT_RBCN}, 1170c965db44STomer Tayar NIG_REG_DBG_SELECT, NIG_REG_DBG_DWORD_ENABLE, 1171c965db44STomer Tayar NIG_REG_DBG_SHIFT, NIG_REG_DBG_FORCE_VALID, 1172c965db44STomer Tayar NIG_REG_DBG_FORCE_FRAME, 1173c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VAUX, 0 1174c965db44STomer Tayar }; 1175c965db44STomer Tayar 1176c965db44STomer Tayar static struct block_defs block_wol_defs = { 1177be086e7cSMintz, Yuval "wol", 1178be086e7cSMintz, Yuval {false, true}, false, 0, 1179be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCZ}, 1180c965db44STomer Tayar WOL_REG_DBG_SELECT, WOL_REG_DBG_DWORD_ENABLE, 1181c965db44STomer Tayar WOL_REG_DBG_SHIFT, WOL_REG_DBG_FORCE_VALID, 1182c965db44STomer Tayar WOL_REG_DBG_FORCE_FRAME, 1183c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VAUX, 7 1184c965db44STomer Tayar }; 1185c965db44STomer Tayar 1186c965db44STomer Tayar static struct block_defs block_bmbn_defs = { 1187be086e7cSMintz, Yuval "bmbn", 1188be086e7cSMintz, Yuval {false, true}, false, 0, 1189be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCB}, 1190c965db44STomer Tayar BMBN_REG_DBG_SELECT, BMBN_REG_DBG_DWORD_ENABLE, 1191c965db44STomer Tayar BMBN_REG_DBG_SHIFT, BMBN_REG_DBG_FORCE_VALID, 1192c965db44STomer Tayar BMBN_REG_DBG_FORCE_FRAME, 1193c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1194c965db44STomer Tayar }; 1195c965db44STomer Tayar 1196c965db44STomer Tayar static struct block_defs block_ipc_defs = { 1197be086e7cSMintz, Yuval "ipc", {false, false}, false, 0, 1198be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1199c965db44STomer Tayar 0, 0, 0, 0, 0, 1200c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_UA, 8 1201c965db44STomer Tayar }; 1202c965db44STomer Tayar 1203c965db44STomer Tayar static struct block_defs block_nwm_defs = { 1204be086e7cSMintz, Yuval "nwm", 1205be086e7cSMintz, Yuval {false, true}, false, 0, 1206be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCW}, 1207c965db44STomer Tayar NWM_REG_DBG_SELECT, NWM_REG_DBG_DWORD_ENABLE, 1208c965db44STomer Tayar NWM_REG_DBG_SHIFT, NWM_REG_DBG_FORCE_VALID, 1209c965db44STomer Tayar NWM_REG_DBG_FORCE_FRAME, 1210c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV_2, 0 1211c965db44STomer Tayar }; 1212c965db44STomer Tayar 1213c965db44STomer Tayar static struct block_defs block_nws_defs = { 1214be086e7cSMintz, Yuval "nws", 1215be086e7cSMintz, Yuval {false, true}, false, 0, 1216be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCW}, 1217be086e7cSMintz, Yuval NWS_REG_DBG_SELECT, NWS_REG_DBG_DWORD_ENABLE, 1218be086e7cSMintz, Yuval NWS_REG_DBG_SHIFT, NWS_REG_DBG_FORCE_VALID, 1219be086e7cSMintz, Yuval NWS_REG_DBG_FORCE_FRAME, 1220c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 12 1221c965db44STomer Tayar }; 1222c965db44STomer Tayar 1223c965db44STomer Tayar static struct block_defs block_ms_defs = { 1224be086e7cSMintz, Yuval "ms", 1225be086e7cSMintz, Yuval {false, true}, false, 0, 1226be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCZ}, 1227be086e7cSMintz, Yuval MS_REG_DBG_SELECT, MS_REG_DBG_DWORD_ENABLE, 1228be086e7cSMintz, Yuval MS_REG_DBG_SHIFT, MS_REG_DBG_FORCE_VALID, 1229be086e7cSMintz, Yuval MS_REG_DBG_FORCE_FRAME, 1230c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 13 1231c965db44STomer Tayar }; 1232c965db44STomer Tayar 1233c965db44STomer Tayar static struct block_defs block_phy_pcie_defs = { 1234be086e7cSMintz, Yuval "phy_pcie", 1235be086e7cSMintz, Yuval {false, true}, false, 0, 1236be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH}, 1237c965db44STomer Tayar PCIE_REG_DBG_COMMON_SELECT, PCIE_REG_DBG_COMMON_DWORD_ENABLE, 1238c965db44STomer Tayar PCIE_REG_DBG_COMMON_SHIFT, PCIE_REG_DBG_COMMON_FORCE_VALID, 1239c965db44STomer Tayar PCIE_REG_DBG_COMMON_FORCE_FRAME, 1240c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1241c965db44STomer Tayar }; 1242c965db44STomer Tayar 1243c965db44STomer Tayar static struct block_defs block_led_defs = { 1244be086e7cSMintz, Yuval "led", {false, false}, false, 0, 1245be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1246c965db44STomer Tayar 0, 0, 0, 0, 0, 1247be086e7cSMintz, Yuval true, false, DBG_RESET_REG_MISCS_PL_HV, 14 1248be086e7cSMintz, Yuval }; 1249be086e7cSMintz, Yuval 1250be086e7cSMintz, Yuval static struct block_defs block_avs_wrap_defs = { 1251be086e7cSMintz, Yuval "avs_wrap", {false, false}, false, 0, 1252be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1253be086e7cSMintz, Yuval 0, 0, 0, 0, 0, 1254be086e7cSMintz, Yuval true, false, DBG_RESET_REG_MISCS_PL_UA, 11 1255be086e7cSMintz, Yuval }; 1256be086e7cSMintz, Yuval 1257be086e7cSMintz, Yuval static struct block_defs block_rgfs_defs = { 1258be086e7cSMintz, Yuval "rgfs", {false, false}, false, 0, 1259be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1260be086e7cSMintz, Yuval 0, 0, 0, 0, 0, 1261be086e7cSMintz, Yuval false, false, MAX_DBG_RESET_REGS, 0 1262be086e7cSMintz, Yuval }; 1263be086e7cSMintz, Yuval 1264be086e7cSMintz, Yuval static struct block_defs block_tgfs_defs = { 1265be086e7cSMintz, Yuval "tgfs", {false, false}, false, 0, 1266be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1267be086e7cSMintz, Yuval 0, 0, 0, 0, 0, 1268be086e7cSMintz, Yuval false, false, MAX_DBG_RESET_REGS, 0 1269be086e7cSMintz, Yuval }; 1270be086e7cSMintz, Yuval 1271be086e7cSMintz, Yuval static struct block_defs block_ptld_defs = { 1272be086e7cSMintz, Yuval "ptld", {false, false}, false, 0, 1273be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1274be086e7cSMintz, Yuval 0, 0, 0, 0, 0, 1275be086e7cSMintz, Yuval false, false, MAX_DBG_RESET_REGS, 0 1276be086e7cSMintz, Yuval }; 1277be086e7cSMintz, Yuval 1278be086e7cSMintz, Yuval static struct block_defs block_ypld_defs = { 1279be086e7cSMintz, Yuval "ypld", {false, false}, false, 0, 1280be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1281be086e7cSMintz, Yuval 0, 0, 0, 0, 0, 1282be086e7cSMintz, Yuval false, false, MAX_DBG_RESET_REGS, 0 1283c965db44STomer Tayar }; 1284c965db44STomer Tayar 1285c965db44STomer Tayar static struct block_defs block_misc_aeu_defs = { 1286be086e7cSMintz, Yuval "misc_aeu", {false, false}, false, 0, 1287be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1288c965db44STomer Tayar 0, 0, 0, 0, 0, 1289c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1290c965db44STomer Tayar }; 1291c965db44STomer Tayar 1292c965db44STomer Tayar static struct block_defs block_bar0_map_defs = { 1293be086e7cSMintz, Yuval "bar0_map", {false, false}, false, 0, 1294be086e7cSMintz, Yuval {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1295c965db44STomer Tayar 0, 0, 0, 0, 0, 1296c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1297c965db44STomer Tayar }; 1298c965db44STomer Tayar 1299c965db44STomer Tayar static struct block_defs *s_block_defs[MAX_BLOCK_ID] = { 1300c965db44STomer Tayar &block_grc_defs, 1301c965db44STomer Tayar &block_miscs_defs, 1302c965db44STomer Tayar &block_misc_defs, 1303c965db44STomer Tayar &block_dbu_defs, 1304c965db44STomer Tayar &block_pglue_b_defs, 1305c965db44STomer Tayar &block_cnig_defs, 1306c965db44STomer Tayar &block_cpmu_defs, 1307c965db44STomer Tayar &block_ncsi_defs, 1308c965db44STomer Tayar &block_opte_defs, 1309c965db44STomer Tayar &block_bmb_defs, 1310c965db44STomer Tayar &block_pcie_defs, 1311c965db44STomer Tayar &block_mcp_defs, 1312c965db44STomer Tayar &block_mcp2_defs, 1313c965db44STomer Tayar &block_pswhst_defs, 1314c965db44STomer Tayar &block_pswhst2_defs, 1315c965db44STomer Tayar &block_pswrd_defs, 1316c965db44STomer Tayar &block_pswrd2_defs, 1317c965db44STomer Tayar &block_pswwr_defs, 1318c965db44STomer Tayar &block_pswwr2_defs, 1319c965db44STomer Tayar &block_pswrq_defs, 1320c965db44STomer Tayar &block_pswrq2_defs, 1321c965db44STomer Tayar &block_pglcs_defs, 1322c965db44STomer Tayar &block_dmae_defs, 1323c965db44STomer Tayar &block_ptu_defs, 1324c965db44STomer Tayar &block_tcm_defs, 1325c965db44STomer Tayar &block_mcm_defs, 1326c965db44STomer Tayar &block_ucm_defs, 1327c965db44STomer Tayar &block_xcm_defs, 1328c965db44STomer Tayar &block_ycm_defs, 1329c965db44STomer Tayar &block_pcm_defs, 1330c965db44STomer Tayar &block_qm_defs, 1331c965db44STomer Tayar &block_tm_defs, 1332c965db44STomer Tayar &block_dorq_defs, 1333c965db44STomer Tayar &block_brb_defs, 1334c965db44STomer Tayar &block_src_defs, 1335c965db44STomer Tayar &block_prs_defs, 1336c965db44STomer Tayar &block_tsdm_defs, 1337c965db44STomer Tayar &block_msdm_defs, 1338c965db44STomer Tayar &block_usdm_defs, 1339c965db44STomer Tayar &block_xsdm_defs, 1340c965db44STomer Tayar &block_ysdm_defs, 1341c965db44STomer Tayar &block_psdm_defs, 1342c965db44STomer Tayar &block_tsem_defs, 1343c965db44STomer Tayar &block_msem_defs, 1344c965db44STomer Tayar &block_usem_defs, 1345c965db44STomer Tayar &block_xsem_defs, 1346c965db44STomer Tayar &block_ysem_defs, 1347c965db44STomer Tayar &block_psem_defs, 1348c965db44STomer Tayar &block_rss_defs, 1349c965db44STomer Tayar &block_tmld_defs, 1350c965db44STomer Tayar &block_muld_defs, 1351c965db44STomer Tayar &block_yuld_defs, 1352c965db44STomer Tayar &block_xyld_defs, 1353c965db44STomer Tayar &block_prm_defs, 1354c965db44STomer Tayar &block_pbf_pb1_defs, 1355c965db44STomer Tayar &block_pbf_pb2_defs, 1356c965db44STomer Tayar &block_rpb_defs, 1357c965db44STomer Tayar &block_btb_defs, 1358c965db44STomer Tayar &block_pbf_defs, 1359c965db44STomer Tayar &block_rdif_defs, 1360c965db44STomer Tayar &block_tdif_defs, 1361c965db44STomer Tayar &block_cdu_defs, 1362c965db44STomer Tayar &block_ccfc_defs, 1363c965db44STomer Tayar &block_tcfc_defs, 1364c965db44STomer Tayar &block_igu_defs, 1365c965db44STomer Tayar &block_cau_defs, 1366c965db44STomer Tayar &block_umac_defs, 1367c965db44STomer Tayar &block_xmac_defs, 1368c965db44STomer Tayar &block_dbg_defs, 1369c965db44STomer Tayar &block_nig_defs, 1370c965db44STomer Tayar &block_wol_defs, 1371c965db44STomer Tayar &block_bmbn_defs, 1372c965db44STomer Tayar &block_ipc_defs, 1373c965db44STomer Tayar &block_nwm_defs, 1374c965db44STomer Tayar &block_nws_defs, 1375c965db44STomer Tayar &block_ms_defs, 1376c965db44STomer Tayar &block_phy_pcie_defs, 1377c965db44STomer Tayar &block_led_defs, 1378be086e7cSMintz, Yuval &block_avs_wrap_defs, 1379be086e7cSMintz, Yuval &block_rgfs_defs, 1380be086e7cSMintz, Yuval &block_tgfs_defs, 1381be086e7cSMintz, Yuval &block_ptld_defs, 1382be086e7cSMintz, Yuval &block_ypld_defs, 1383c965db44STomer Tayar &block_misc_aeu_defs, 1384c965db44STomer Tayar &block_bar0_map_defs, 1385c965db44STomer Tayar }; 1386c965db44STomer Tayar 1387c965db44STomer Tayar static struct platform_defs s_platform_defs[] = { 1388c965db44STomer Tayar {"asic", 1}, 1389c965db44STomer Tayar {"reserved", 0}, 1390c965db44STomer Tayar {"reserved2", 0}, 1391c965db44STomer Tayar {"reserved3", 0} 1392c965db44STomer Tayar }; 1393c965db44STomer Tayar 1394c965db44STomer Tayar static struct grc_param_defs s_grc_param_defs[] = { 1395be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 1, 1}, /* DBG_GRC_PARAM_DUMP_TSTORM */ 1396be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 1, 1}, /* DBG_GRC_PARAM_DUMP_MSTORM */ 1397be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 1, 1}, /* DBG_GRC_PARAM_DUMP_USTORM */ 1398be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 1, 1}, /* DBG_GRC_PARAM_DUMP_XSTORM */ 1399be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 1, 1}, /* DBG_GRC_PARAM_DUMP_YSTORM */ 1400be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 1, 1}, /* DBG_GRC_PARAM_DUMP_PSTORM */ 1401be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_REGS */ 1402be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_RAM */ 1403be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_PBUF */ 1404be086e7cSMintz, Yuval {{0, 0}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_IOR */ 1405be086e7cSMintz, Yuval {{0, 0}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_VFC */ 1406be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_CM_CTX */ 1407be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_ILT */ 1408be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_RSS */ 1409be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_CAU */ 1410be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_QM */ 1411be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_MCP */ 1412be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_RESERVED */ 1413be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_CFC */ 1414be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_IGU */ 1415be086e7cSMintz, Yuval {{0, 0}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_BRB */ 1416be086e7cSMintz, Yuval {{0, 0}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_BTB */ 1417be086e7cSMintz, Yuval {{0, 0}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_BMB */ 1418be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_NIG */ 1419be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_MULD */ 1420be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_PRS */ 1421be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_DMAE */ 1422be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_TM */ 1423be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_SDM */ 1424be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_DIF */ 1425be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_STATIC */ 1426be086e7cSMintz, Yuval {{0, 0}, 0, 1, false, 0, 0}, /* DBG_GRC_PARAM_UNSTALL */ 1427be086e7cSMintz, Yuval {{MAX_LCIDS, MAX_LCIDS}, 1, MAX_LCIDS, false, MAX_LCIDS, 1428c965db44STomer Tayar MAX_LCIDS}, /* DBG_GRC_PARAM_NUM_LCIDS */ 1429be086e7cSMintz, Yuval {{MAX_LTIDS, MAX_LTIDS}, 1, MAX_LTIDS, false, MAX_LTIDS, 1430c965db44STomer Tayar MAX_LTIDS}, /* DBG_GRC_PARAM_NUM_LTIDS */ 1431be086e7cSMintz, Yuval {{0, 0}, 0, 1, true, 0, 0}, /* DBG_GRC_PARAM_EXCLUDE_ALL */ 1432be086e7cSMintz, Yuval {{0, 0}, 0, 1, true, 0, 0}, /* DBG_GRC_PARAM_CRASH */ 1433be086e7cSMintz, Yuval {{0, 0}, 0, 1, false, 1, 0}, /* DBG_GRC_PARAM_PARITY_SAFE */ 1434be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_CM */ 1435be086e7cSMintz, Yuval {{1, 1}, 0, 1, false, 0, 1}, /* DBG_GRC_PARAM_DUMP_PHY */ 1436be086e7cSMintz, Yuval {{0, 0}, 0, 1, false, 0, 0}, /* DBG_GRC_PARAM_NO_MCP */ 1437be086e7cSMintz, Yuval {{0, 0}, 0, 1, false, 0, 0} /* DBG_GRC_PARAM_NO_FW_VER */ 1438c965db44STomer Tayar }; 1439c965db44STomer Tayar 1440c965db44STomer Tayar static struct rss_mem_defs s_rss_mem_defs[] = { 1441c965db44STomer Tayar { "rss_mem_cid", "rss_cid", 0, 1442be086e7cSMintz, Yuval {256, 320}, 1443be086e7cSMintz, Yuval {32, 32} }, 1444c965db44STomer Tayar { "rss_mem_key_msb", "rss_key", 1024, 1445be086e7cSMintz, Yuval {128, 208}, 1446be086e7cSMintz, Yuval {256, 256} }, 1447c965db44STomer Tayar { "rss_mem_key_lsb", "rss_key", 2048, 1448be086e7cSMintz, Yuval {128, 208}, 1449be086e7cSMintz, Yuval {64, 64} }, 1450c965db44STomer Tayar { "rss_mem_info", "rss_info", 3072, 1451be086e7cSMintz, Yuval {128, 208}, 1452be086e7cSMintz, Yuval {16, 16} }, 1453c965db44STomer Tayar { "rss_mem_ind", "rss_ind", 4096, 1454be086e7cSMintz, Yuval {(128 * 128), (128 * 208)}, 1455be086e7cSMintz, Yuval {16, 16} } 1456c965db44STomer Tayar }; 1457c965db44STomer Tayar 1458c965db44STomer Tayar static struct vfc_ram_defs s_vfc_ram_defs[] = { 1459c965db44STomer Tayar {"vfc_ram_tt1", "vfc_ram", 0, 512}, 1460c965db44STomer Tayar {"vfc_ram_mtt2", "vfc_ram", 512, 128}, 1461c965db44STomer Tayar {"vfc_ram_stt2", "vfc_ram", 640, 32}, 1462c965db44STomer Tayar {"vfc_ram_ro_vect", "vfc_ram", 672, 32} 1463c965db44STomer Tayar }; 1464c965db44STomer Tayar 1465c965db44STomer Tayar static struct big_ram_defs s_big_ram_defs[] = { 1466c965db44STomer Tayar { "BRB", MEM_GROUP_BRB_MEM, MEM_GROUP_BRB_RAM, DBG_GRC_PARAM_DUMP_BRB, 1467c965db44STomer Tayar BRB_REG_BIG_RAM_ADDRESS, BRB_REG_BIG_RAM_DATA, 1468be086e7cSMintz, Yuval {4800, 5632} }, 1469c965db44STomer Tayar { "BTB", MEM_GROUP_BTB_MEM, MEM_GROUP_BTB_RAM, DBG_GRC_PARAM_DUMP_BTB, 1470c965db44STomer Tayar BTB_REG_BIG_RAM_ADDRESS, BTB_REG_BIG_RAM_DATA, 1471be086e7cSMintz, Yuval {2880, 3680} }, 1472c965db44STomer Tayar { "BMB", MEM_GROUP_BMB_MEM, MEM_GROUP_BMB_RAM, DBG_GRC_PARAM_DUMP_BMB, 1473c965db44STomer Tayar BMB_REG_BIG_RAM_ADDRESS, BMB_REG_BIG_RAM_DATA, 1474be086e7cSMintz, Yuval {1152, 1152} } 1475c965db44STomer Tayar }; 1476c965db44STomer Tayar 1477c965db44STomer Tayar static struct reset_reg_defs s_reset_regs_defs[] = { 1478c965db44STomer Tayar { MISCS_REG_RESET_PL_UA, 0x0, 1479be086e7cSMintz, Yuval {true, true} }, /* DBG_RESET_REG_MISCS_PL_UA */ 1480c965db44STomer Tayar { MISCS_REG_RESET_PL_HV, 0x0, 1481be086e7cSMintz, Yuval {true, true} }, /* DBG_RESET_REG_MISCS_PL_HV */ 1482c965db44STomer Tayar { MISCS_REG_RESET_PL_HV_2, 0x0, 1483be086e7cSMintz, Yuval {false, true} }, /* DBG_RESET_REG_MISCS_PL_HV_2 */ 1484c965db44STomer Tayar { MISC_REG_RESET_PL_UA, 0x0, 1485be086e7cSMintz, Yuval {true, true} }, /* DBG_RESET_REG_MISC_PL_UA */ 1486c965db44STomer Tayar { MISC_REG_RESET_PL_HV, 0x0, 1487be086e7cSMintz, Yuval {true, true} }, /* DBG_RESET_REG_MISC_PL_HV */ 1488c965db44STomer Tayar { MISC_REG_RESET_PL_PDA_VMAIN_1, 0x4404040, 1489be086e7cSMintz, Yuval {true, true} }, /* DBG_RESET_REG_MISC_PL_PDA_VMAIN_1 */ 1490c965db44STomer Tayar { MISC_REG_RESET_PL_PDA_VMAIN_2, 0x7c00007, 1491be086e7cSMintz, Yuval {true, true} }, /* DBG_RESET_REG_MISC_PL_PDA_VMAIN_2 */ 1492c965db44STomer Tayar { MISC_REG_RESET_PL_PDA_VAUX, 0x2, 1493be086e7cSMintz, Yuval {true, true} }, /* DBG_RESET_REG_MISC_PL_PDA_VAUX */ 1494c965db44STomer Tayar }; 1495c965db44STomer Tayar 1496c965db44STomer Tayar static struct phy_defs s_phy_defs[] = { 1497c965db44STomer Tayar {"nw_phy", NWS_REG_NWS_CMU, PHY_NW_IP_REG_PHY0_TOP_TBUS_ADDR_7_0, 1498c965db44STomer Tayar PHY_NW_IP_REG_PHY0_TOP_TBUS_ADDR_15_8, 1499c965db44STomer Tayar PHY_NW_IP_REG_PHY0_TOP_TBUS_DATA_7_0, 1500c965db44STomer Tayar PHY_NW_IP_REG_PHY0_TOP_TBUS_DATA_11_8}, 1501c965db44STomer Tayar {"sgmii_phy", MS_REG_MS_CMU, PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X132, 1502c965db44STomer Tayar PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X133, 1503c965db44STomer Tayar PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X130, 1504c965db44STomer Tayar PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X131}, 1505c965db44STomer Tayar {"pcie_phy0", PHY_PCIE_REG_PHY0, PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X132, 1506c965db44STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X133, 1507c965db44STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X130, 1508c965db44STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X131}, 1509c965db44STomer Tayar {"pcie_phy1", PHY_PCIE_REG_PHY1, PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X132, 1510c965db44STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X133, 1511c965db44STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X130, 1512c965db44STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X131}, 1513c965db44STomer Tayar }; 1514c965db44STomer Tayar 1515c965db44STomer Tayar /**************************** Private Functions ******************************/ 1516c965db44STomer Tayar 1517c965db44STomer Tayar /* Reads and returns a single dword from the specified unaligned buffer */ 1518c965db44STomer Tayar static u32 qed_read_unaligned_dword(u8 *buf) 1519c965db44STomer Tayar { 1520c965db44STomer Tayar u32 dword; 1521c965db44STomer Tayar 1522c965db44STomer Tayar memcpy((u8 *)&dword, buf, sizeof(dword)); 1523c965db44STomer Tayar return dword; 1524c965db44STomer Tayar } 1525c965db44STomer Tayar 1526be086e7cSMintz, Yuval /* Returns the value of the specified GRC param */ 1527be086e7cSMintz, Yuval static u32 qed_grc_get_param(struct qed_hwfn *p_hwfn, 1528be086e7cSMintz, Yuval enum dbg_grc_params grc_param) 1529be086e7cSMintz, Yuval { 1530be086e7cSMintz, Yuval struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 1531be086e7cSMintz, Yuval 1532be086e7cSMintz, Yuval return dev_data->grc.param_val[grc_param]; 1533be086e7cSMintz, Yuval } 1534be086e7cSMintz, Yuval 1535be086e7cSMintz, Yuval /* Initializes the GRC parameters */ 1536be086e7cSMintz, Yuval static void qed_dbg_grc_init_params(struct qed_hwfn *p_hwfn) 1537be086e7cSMintz, Yuval { 1538be086e7cSMintz, Yuval struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 1539be086e7cSMintz, Yuval 1540be086e7cSMintz, Yuval if (!dev_data->grc.params_initialized) { 1541be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 1542be086e7cSMintz, Yuval dev_data->grc.params_initialized = 1; 1543be086e7cSMintz, Yuval } 1544be086e7cSMintz, Yuval } 1545be086e7cSMintz, Yuval 1546c965db44STomer Tayar /* Initializes debug data for the specified device */ 1547c965db44STomer Tayar static enum dbg_status qed_dbg_dev_init(struct qed_hwfn *p_hwfn, 1548c965db44STomer Tayar struct qed_ptt *p_ptt) 1549c965db44STomer Tayar { 1550c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 1551c965db44STomer Tayar 1552c965db44STomer Tayar if (dev_data->initialized) 1553c965db44STomer Tayar return DBG_STATUS_OK; 1554c965db44STomer Tayar 1555c965db44STomer Tayar if (QED_IS_K2(p_hwfn->cdev)) { 1556c965db44STomer Tayar dev_data->chip_id = CHIP_K2; 1557c965db44STomer Tayar dev_data->mode_enable[MODE_K2] = 1; 1558c965db44STomer Tayar } else if (QED_IS_BB_B0(p_hwfn->cdev)) { 1559c965db44STomer Tayar dev_data->chip_id = CHIP_BB_B0; 1560c965db44STomer Tayar dev_data->mode_enable[MODE_BB_B0] = 1; 1561c965db44STomer Tayar } else { 1562c965db44STomer Tayar return DBG_STATUS_UNKNOWN_CHIP; 1563c965db44STomer Tayar } 1564c965db44STomer Tayar 1565c965db44STomer Tayar dev_data->platform_id = PLATFORM_ASIC; 1566c965db44STomer Tayar dev_data->mode_enable[MODE_ASIC] = 1; 1567be086e7cSMintz, Yuval 1568be086e7cSMintz, Yuval /* Initializes the GRC parameters */ 1569be086e7cSMintz, Yuval qed_dbg_grc_init_params(p_hwfn); 1570be086e7cSMintz, Yuval 1571c965db44STomer Tayar dev_data->initialized = true; 1572c965db44STomer Tayar return DBG_STATUS_OK; 1573c965db44STomer Tayar } 1574c965db44STomer Tayar 1575c965db44STomer Tayar /* Reads the FW info structure for the specified Storm from the chip, 1576c965db44STomer Tayar * and writes it to the specified fw_info pointer. 1577c965db44STomer Tayar */ 1578c965db44STomer Tayar static void qed_read_fw_info(struct qed_hwfn *p_hwfn, 1579c965db44STomer Tayar struct qed_ptt *p_ptt, 1580c965db44STomer Tayar u8 storm_id, struct fw_info *fw_info) 1581c965db44STomer Tayar { 1582c965db44STomer Tayar /* Read first the address that points to fw_info location. 1583c965db44STomer Tayar * The address is located in the last line of the Storm RAM. 1584c965db44STomer Tayar */ 1585c965db44STomer Tayar u32 addr = s_storm_defs[storm_id].sem_fast_mem_addr + 1586c965db44STomer Tayar SEM_FAST_REG_INT_RAM + 1587c965db44STomer Tayar DWORDS_TO_BYTES(SEM_FAST_REG_INT_RAM_SIZE) - 1588c965db44STomer Tayar sizeof(struct fw_info_location); 1589c965db44STomer Tayar struct fw_info_location fw_info_location; 1590c965db44STomer Tayar u32 *dest = (u32 *)&fw_info_location; 1591c965db44STomer Tayar u32 i; 1592c965db44STomer Tayar 1593c965db44STomer Tayar memset(&fw_info_location, 0, sizeof(fw_info_location)); 1594c965db44STomer Tayar memset(fw_info, 0, sizeof(*fw_info)); 1595c965db44STomer Tayar for (i = 0; i < BYTES_TO_DWORDS(sizeof(fw_info_location)); 1596c965db44STomer Tayar i++, addr += BYTES_IN_DWORD) 1597c965db44STomer Tayar dest[i] = qed_rd(p_hwfn, p_ptt, addr); 1598c965db44STomer Tayar if (fw_info_location.size > 0 && fw_info_location.size <= 1599c965db44STomer Tayar sizeof(*fw_info)) { 1600c965db44STomer Tayar /* Read FW version info from Storm RAM */ 1601c965db44STomer Tayar addr = fw_info_location.grc_addr; 1602c965db44STomer Tayar dest = (u32 *)fw_info; 1603c965db44STomer Tayar for (i = 0; i < BYTES_TO_DWORDS(fw_info_location.size); 1604c965db44STomer Tayar i++, addr += BYTES_IN_DWORD) 1605c965db44STomer Tayar dest[i] = qed_rd(p_hwfn, p_ptt, addr); 1606c965db44STomer Tayar } 1607c965db44STomer Tayar } 1608c965db44STomer Tayar 1609c965db44STomer Tayar /* Dumps the specified string to the specified buffer. Returns the dumped size 1610c965db44STomer Tayar * in bytes (actual length + 1 for the null character termination). 1611c965db44STomer Tayar */ 1612c965db44STomer Tayar static u32 qed_dump_str(char *dump_buf, bool dump, const char *str) 1613c965db44STomer Tayar { 1614c965db44STomer Tayar if (dump) 1615c965db44STomer Tayar strcpy(dump_buf, str); 1616c965db44STomer Tayar return (u32)strlen(str) + 1; 1617c965db44STomer Tayar } 1618c965db44STomer Tayar 1619c965db44STomer Tayar /* Dumps zeros to align the specified buffer to dwords. Returns the dumped size 1620c965db44STomer Tayar * in bytes. 1621c965db44STomer Tayar */ 1622c965db44STomer Tayar static u32 qed_dump_align(char *dump_buf, bool dump, u32 byte_offset) 1623c965db44STomer Tayar { 1624c965db44STomer Tayar u8 offset_in_dword = (u8)(byte_offset & 0x3), align_size; 1625c965db44STomer Tayar 1626c965db44STomer Tayar align_size = offset_in_dword ? BYTES_IN_DWORD - offset_in_dword : 0; 1627c965db44STomer Tayar 1628c965db44STomer Tayar if (dump && align_size) 1629c965db44STomer Tayar memset(dump_buf, 0, align_size); 1630c965db44STomer Tayar return align_size; 1631c965db44STomer Tayar } 1632c965db44STomer Tayar 1633c965db44STomer Tayar /* Writes the specified string param to the specified buffer. 1634c965db44STomer Tayar * Returns the dumped size in dwords. 1635c965db44STomer Tayar */ 1636c965db44STomer Tayar static u32 qed_dump_str_param(u32 *dump_buf, 1637c965db44STomer Tayar bool dump, 1638c965db44STomer Tayar const char *param_name, const char *param_val) 1639c965db44STomer Tayar { 1640c965db44STomer Tayar char *char_buf = (char *)dump_buf; 1641c965db44STomer Tayar u32 offset = 0; 1642c965db44STomer Tayar 1643c965db44STomer Tayar /* Dump param name */ 1644c965db44STomer Tayar offset += qed_dump_str(char_buf + offset, dump, param_name); 1645c965db44STomer Tayar 1646c965db44STomer Tayar /* Indicate a string param value */ 1647c965db44STomer Tayar if (dump) 1648c965db44STomer Tayar *(char_buf + offset) = 1; 1649c965db44STomer Tayar offset++; 1650c965db44STomer Tayar 1651c965db44STomer Tayar /* Dump param value */ 1652c965db44STomer Tayar offset += qed_dump_str(char_buf + offset, dump, param_val); 1653c965db44STomer Tayar 1654c965db44STomer Tayar /* Align buffer to next dword */ 1655c965db44STomer Tayar offset += qed_dump_align(char_buf + offset, dump, offset); 1656c965db44STomer Tayar return BYTES_TO_DWORDS(offset); 1657c965db44STomer Tayar } 1658c965db44STomer Tayar 1659c965db44STomer Tayar /* Writes the specified numeric param to the specified buffer. 1660c965db44STomer Tayar * Returns the dumped size in dwords. 1661c965db44STomer Tayar */ 1662c965db44STomer Tayar static u32 qed_dump_num_param(u32 *dump_buf, 1663c965db44STomer Tayar bool dump, const char *param_name, u32 param_val) 1664c965db44STomer Tayar { 1665c965db44STomer Tayar char *char_buf = (char *)dump_buf; 1666c965db44STomer Tayar u32 offset = 0; 1667c965db44STomer Tayar 1668c965db44STomer Tayar /* Dump param name */ 1669c965db44STomer Tayar offset += qed_dump_str(char_buf + offset, dump, param_name); 1670c965db44STomer Tayar 1671c965db44STomer Tayar /* Indicate a numeric param value */ 1672c965db44STomer Tayar if (dump) 1673c965db44STomer Tayar *(char_buf + offset) = 0; 1674c965db44STomer Tayar offset++; 1675c965db44STomer Tayar 1676c965db44STomer Tayar /* Align buffer to next dword */ 1677c965db44STomer Tayar offset += qed_dump_align(char_buf + offset, dump, offset); 1678c965db44STomer Tayar 1679c965db44STomer Tayar /* Dump param value (and change offset from bytes to dwords) */ 1680c965db44STomer Tayar offset = BYTES_TO_DWORDS(offset); 1681c965db44STomer Tayar if (dump) 1682c965db44STomer Tayar *(dump_buf + offset) = param_val; 1683c965db44STomer Tayar offset++; 1684c965db44STomer Tayar return offset; 1685c965db44STomer Tayar } 1686c965db44STomer Tayar 1687c965db44STomer Tayar /* Reads the FW version and writes it as a param to the specified buffer. 1688c965db44STomer Tayar * Returns the dumped size in dwords. 1689c965db44STomer Tayar */ 1690c965db44STomer Tayar static u32 qed_dump_fw_ver_param(struct qed_hwfn *p_hwfn, 1691c965db44STomer Tayar struct qed_ptt *p_ptt, 1692c965db44STomer Tayar u32 *dump_buf, bool dump) 1693c965db44STomer Tayar { 1694c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 1695c965db44STomer Tayar char fw_ver_str[16] = EMPTY_FW_VERSION_STR; 1696c965db44STomer Tayar char fw_img_str[16] = EMPTY_FW_IMAGE_STR; 1697c965db44STomer Tayar struct fw_info fw_info = { {0}, {0} }; 1698c965db44STomer Tayar int printed_chars; 1699c965db44STomer Tayar u32 offset = 0; 1700c965db44STomer Tayar 1701be086e7cSMintz, Yuval if (dump && !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_FW_VER)) { 1702c965db44STomer Tayar /* Read FW image/version from PRAM in a non-reset SEMI */ 1703c965db44STomer Tayar bool found = false; 1704c965db44STomer Tayar u8 storm_id; 1705c965db44STomer Tayar 1706c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS && !found; 1707c965db44STomer Tayar storm_id++) { 1708c965db44STomer Tayar /* Read FW version/image */ 1709c965db44STomer Tayar if (!dev_data->block_in_reset 1710c965db44STomer Tayar [s_storm_defs[storm_id].block_id]) { 1711c965db44STomer Tayar /* read FW info for the current Storm */ 1712c965db44STomer Tayar qed_read_fw_info(p_hwfn, 1713c965db44STomer Tayar p_ptt, storm_id, &fw_info); 1714c965db44STomer Tayar 1715c965db44STomer Tayar /* Create FW version/image strings */ 1716c965db44STomer Tayar printed_chars = 1717c965db44STomer Tayar snprintf(fw_ver_str, 1718c965db44STomer Tayar sizeof(fw_ver_str), 1719c965db44STomer Tayar "%d_%d_%d_%d", 1720c965db44STomer Tayar fw_info.ver.num.major, 1721c965db44STomer Tayar fw_info.ver.num.minor, 1722c965db44STomer Tayar fw_info.ver.num.rev, 1723c965db44STomer Tayar fw_info.ver.num.eng); 1724c965db44STomer Tayar if (printed_chars < 0 || printed_chars >= 1725c965db44STomer Tayar sizeof(fw_ver_str)) 1726c965db44STomer Tayar DP_NOTICE(p_hwfn, 1727c965db44STomer Tayar "Unexpected debug error: invalid FW version string\n"); 1728c965db44STomer Tayar switch (fw_info.ver.image_id) { 1729c965db44STomer Tayar case FW_IMG_MAIN: 1730c965db44STomer Tayar strcpy(fw_img_str, "main"); 1731c965db44STomer Tayar break; 1732c965db44STomer Tayar default: 1733c965db44STomer Tayar strcpy(fw_img_str, "unknown"); 1734c965db44STomer Tayar break; 1735c965db44STomer Tayar } 1736c965db44STomer Tayar 1737c965db44STomer Tayar found = true; 1738c965db44STomer Tayar } 1739c965db44STomer Tayar } 1740c965db44STomer Tayar } 1741c965db44STomer Tayar 1742c965db44STomer Tayar /* Dump FW version, image and timestamp */ 1743c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 1744c965db44STomer Tayar dump, "fw-version", fw_ver_str); 1745c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 1746c965db44STomer Tayar dump, "fw-image", fw_img_str); 1747c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 1748c965db44STomer Tayar dump, 1749c965db44STomer Tayar "fw-timestamp", fw_info.ver.timestamp); 1750c965db44STomer Tayar return offset; 1751c965db44STomer Tayar } 1752c965db44STomer Tayar 1753c965db44STomer Tayar /* Reads the MFW version and writes it as a param to the specified buffer. 1754c965db44STomer Tayar * Returns the dumped size in dwords. 1755c965db44STomer Tayar */ 1756c965db44STomer Tayar static u32 qed_dump_mfw_ver_param(struct qed_hwfn *p_hwfn, 1757c965db44STomer Tayar struct qed_ptt *p_ptt, 1758c965db44STomer Tayar u32 *dump_buf, bool dump) 1759c965db44STomer Tayar { 1760c965db44STomer Tayar char mfw_ver_str[16] = EMPTY_FW_VERSION_STR; 1761c965db44STomer Tayar 1762be086e7cSMintz, Yuval if (dump && !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_FW_VER)) { 1763c965db44STomer Tayar u32 global_section_offsize, global_section_addr, mfw_ver; 1764c965db44STomer Tayar u32 public_data_addr, global_section_offsize_addr; 1765c965db44STomer Tayar int printed_chars; 1766c965db44STomer Tayar 1767c965db44STomer Tayar /* Find MCP public data GRC address. 1768c965db44STomer Tayar * Needs to be ORed with MCP_REG_SCRATCH due to a HW bug. 1769c965db44STomer Tayar */ 1770c965db44STomer Tayar public_data_addr = qed_rd(p_hwfn, p_ptt, 1771c965db44STomer Tayar MISC_REG_SHARED_MEM_ADDR) | 1772c965db44STomer Tayar MCP_REG_SCRATCH; 1773c965db44STomer Tayar 1774c965db44STomer Tayar /* Find MCP public global section offset */ 1775c965db44STomer Tayar global_section_offsize_addr = public_data_addr + 1776c965db44STomer Tayar offsetof(struct mcp_public_data, 1777c965db44STomer Tayar sections) + 1778c965db44STomer Tayar sizeof(offsize_t) * PUBLIC_GLOBAL; 1779c965db44STomer Tayar global_section_offsize = qed_rd(p_hwfn, p_ptt, 1780c965db44STomer Tayar global_section_offsize_addr); 1781c965db44STomer Tayar global_section_addr = MCP_REG_SCRATCH + 1782c965db44STomer Tayar (global_section_offsize & 1783c965db44STomer Tayar OFFSIZE_OFFSET_MASK) * 4; 1784c965db44STomer Tayar 1785c965db44STomer Tayar /* Read MFW version from MCP public global section */ 1786c965db44STomer Tayar mfw_ver = qed_rd(p_hwfn, p_ptt, 1787c965db44STomer Tayar global_section_addr + 1788c965db44STomer Tayar offsetof(struct public_global, mfw_ver)); 1789c965db44STomer Tayar 1790c965db44STomer Tayar /* Dump MFW version param */ 1791c965db44STomer Tayar printed_chars = snprintf(mfw_ver_str, sizeof(mfw_ver_str), 1792c965db44STomer Tayar "%d_%d_%d_%d", 1793c965db44STomer Tayar (u8) (mfw_ver >> 24), 1794c965db44STomer Tayar (u8) (mfw_ver >> 16), 1795c965db44STomer Tayar (u8) (mfw_ver >> 8), 1796c965db44STomer Tayar (u8) mfw_ver); 1797c965db44STomer Tayar if (printed_chars < 0 || printed_chars >= sizeof(mfw_ver_str)) 1798c965db44STomer Tayar DP_NOTICE(p_hwfn, 1799c965db44STomer Tayar "Unexpected debug error: invalid MFW version string\n"); 1800c965db44STomer Tayar } 1801c965db44STomer Tayar 1802c965db44STomer Tayar return qed_dump_str_param(dump_buf, dump, "mfw-version", mfw_ver_str); 1803c965db44STomer Tayar } 1804c965db44STomer Tayar 1805c965db44STomer Tayar /* Writes a section header to the specified buffer. 1806c965db44STomer Tayar * Returns the dumped size in dwords. 1807c965db44STomer Tayar */ 1808c965db44STomer Tayar static u32 qed_dump_section_hdr(u32 *dump_buf, 1809c965db44STomer Tayar bool dump, const char *name, u32 num_params) 1810c965db44STomer Tayar { 1811c965db44STomer Tayar return qed_dump_num_param(dump_buf, dump, name, num_params); 1812c965db44STomer Tayar } 1813c965db44STomer Tayar 1814c965db44STomer Tayar /* Writes the common global params to the specified buffer. 1815c965db44STomer Tayar * Returns the dumped size in dwords. 1816c965db44STomer Tayar */ 1817c965db44STomer Tayar static u32 qed_dump_common_global_params(struct qed_hwfn *p_hwfn, 1818c965db44STomer Tayar struct qed_ptt *p_ptt, 1819c965db44STomer Tayar u32 *dump_buf, 1820c965db44STomer Tayar bool dump, 1821c965db44STomer Tayar u8 num_specific_global_params) 1822c965db44STomer Tayar { 1823be086e7cSMintz, Yuval u8 num_params = NUM_COMMON_GLOBAL_PARAMS + num_specific_global_params; 1824c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 1825c965db44STomer Tayar u32 offset = 0; 1826c965db44STomer Tayar 1827c965db44STomer Tayar /* Find platform string and dump global params section header */ 1828c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 1829be086e7cSMintz, Yuval dump, "global_params", num_params); 1830c965db44STomer Tayar 1831c965db44STomer Tayar /* Store params */ 1832c965db44STomer Tayar offset += qed_dump_fw_ver_param(p_hwfn, p_ptt, dump_buf + offset, dump); 1833c965db44STomer Tayar offset += qed_dump_mfw_ver_param(p_hwfn, 1834c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 1835c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 1836c965db44STomer Tayar dump, "tools-version", TOOLS_VERSION); 1837c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 1838c965db44STomer Tayar dump, 1839c965db44STomer Tayar "chip", 1840c965db44STomer Tayar s_chip_defs[dev_data->chip_id].name); 1841c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 1842c965db44STomer Tayar dump, 1843c965db44STomer Tayar "platform", 1844c965db44STomer Tayar s_platform_defs[dev_data->platform_id]. 1845c965db44STomer Tayar name); 1846c965db44STomer Tayar offset += 1847c965db44STomer Tayar qed_dump_num_param(dump_buf + offset, dump, "pci-func", 1848c965db44STomer Tayar p_hwfn->abs_pf_id); 1849c965db44STomer Tayar return offset; 1850c965db44STomer Tayar } 1851c965db44STomer Tayar 1852c965db44STomer Tayar /* Writes the last section to the specified buffer at the given offset. 1853c965db44STomer Tayar * Returns the dumped size in dwords. 1854c965db44STomer Tayar */ 1855c965db44STomer Tayar static u32 qed_dump_last_section(u32 *dump_buf, u32 offset, bool dump) 1856c965db44STomer Tayar { 1857c965db44STomer Tayar u32 start_offset = offset, crc = ~0; 1858c965db44STomer Tayar 1859c965db44STomer Tayar /* Dump CRC section header */ 1860c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, dump, "last", 0); 1861c965db44STomer Tayar 1862c965db44STomer Tayar /* Calculate CRC32 and add it to the dword following the "last" section. 1863c965db44STomer Tayar */ 1864c965db44STomer Tayar if (dump) 1865c965db44STomer Tayar *(dump_buf + offset) = ~crc32(crc, (u8 *)dump_buf, 1866c965db44STomer Tayar DWORDS_TO_BYTES(offset)); 1867c965db44STomer Tayar offset++; 1868c965db44STomer Tayar return offset - start_offset; 1869c965db44STomer Tayar } 1870c965db44STomer Tayar 1871c965db44STomer Tayar /* Update blocks reset state */ 1872c965db44STomer Tayar static void qed_update_blocks_reset_state(struct qed_hwfn *p_hwfn, 1873c965db44STomer Tayar struct qed_ptt *p_ptt) 1874c965db44STomer Tayar { 1875c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 1876c965db44STomer Tayar u32 reg_val[MAX_DBG_RESET_REGS] = { 0 }; 1877c965db44STomer Tayar u32 i; 1878c965db44STomer Tayar 1879c965db44STomer Tayar /* Read reset registers */ 1880c965db44STomer Tayar for (i = 0; i < MAX_DBG_RESET_REGS; i++) 1881c965db44STomer Tayar if (s_reset_regs_defs[i].exists[dev_data->chip_id]) 1882c965db44STomer Tayar reg_val[i] = qed_rd(p_hwfn, 1883c965db44STomer Tayar p_ptt, s_reset_regs_defs[i].addr); 1884c965db44STomer Tayar 1885c965db44STomer Tayar /* Check if blocks are in reset */ 1886c965db44STomer Tayar for (i = 0; i < MAX_BLOCK_ID; i++) 1887c965db44STomer Tayar dev_data->block_in_reset[i] = 1888c965db44STomer Tayar s_block_defs[i]->has_reset_bit && 1889c965db44STomer Tayar !(reg_val[s_block_defs[i]->reset_reg] & 1890c965db44STomer Tayar BIT(s_block_defs[i]->reset_bit_offset)); 1891c965db44STomer Tayar } 1892c965db44STomer Tayar 1893c965db44STomer Tayar /* Enable / disable the Debug block */ 1894c965db44STomer Tayar static void qed_bus_enable_dbg_block(struct qed_hwfn *p_hwfn, 1895c965db44STomer Tayar struct qed_ptt *p_ptt, bool enable) 1896c965db44STomer Tayar { 1897c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, DBG_REG_DBG_BLOCK_ON, enable ? 1 : 0); 1898c965db44STomer Tayar } 1899c965db44STomer Tayar 1900c965db44STomer Tayar /* Resets the Debug block */ 1901c965db44STomer Tayar static void qed_bus_reset_dbg_block(struct qed_hwfn *p_hwfn, 1902c965db44STomer Tayar struct qed_ptt *p_ptt) 1903c965db44STomer Tayar { 1904c965db44STomer Tayar u32 dbg_reset_reg_addr, old_reset_reg_val, new_reset_reg_val; 1905c965db44STomer Tayar 1906c965db44STomer Tayar dbg_reset_reg_addr = 1907c965db44STomer Tayar s_reset_regs_defs[s_block_defs[BLOCK_DBG]->reset_reg].addr; 1908c965db44STomer Tayar old_reset_reg_val = qed_rd(p_hwfn, p_ptt, dbg_reset_reg_addr); 1909c965db44STomer Tayar new_reset_reg_val = old_reset_reg_val & 1910c965db44STomer Tayar ~BIT(s_block_defs[BLOCK_DBG]->reset_bit_offset); 1911c965db44STomer Tayar 1912c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, dbg_reset_reg_addr, new_reset_reg_val); 1913c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, dbg_reset_reg_addr, old_reset_reg_val); 1914c965db44STomer Tayar } 1915c965db44STomer Tayar 1916c965db44STomer Tayar static void qed_bus_set_framing_mode(struct qed_hwfn *p_hwfn, 1917c965db44STomer Tayar struct qed_ptt *p_ptt, 1918c965db44STomer Tayar enum dbg_bus_frame_modes mode) 1919c965db44STomer Tayar { 1920c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, DBG_REG_FRAMING_MODE, (u8)mode); 1921c965db44STomer Tayar } 1922c965db44STomer Tayar 1923c965db44STomer Tayar /* Enable / disable Debug Bus clients according to the specified mask. 1924c965db44STomer Tayar * (1 = enable, 0 = disable) 1925c965db44STomer Tayar */ 1926c965db44STomer Tayar static void qed_bus_enable_clients(struct qed_hwfn *p_hwfn, 1927c965db44STomer Tayar struct qed_ptt *p_ptt, u32 client_mask) 1928c965db44STomer Tayar { 1929c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, DBG_REG_CLIENT_ENABLE, client_mask); 1930c965db44STomer Tayar } 1931c965db44STomer Tayar 1932c965db44STomer Tayar static bool qed_is_mode_match(struct qed_hwfn *p_hwfn, u16 *modes_buf_offset) 1933c965db44STomer Tayar { 1934c965db44STomer Tayar const u32 *ptr = s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr; 1935c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 1936c965db44STomer Tayar u8 tree_val = ((u8 *)ptr)[(*modes_buf_offset)++]; 1937c965db44STomer Tayar bool arg1, arg2; 1938c965db44STomer Tayar 1939c965db44STomer Tayar switch (tree_val) { 1940c965db44STomer Tayar case INIT_MODE_OP_NOT: 1941c965db44STomer Tayar return !qed_is_mode_match(p_hwfn, modes_buf_offset); 1942c965db44STomer Tayar case INIT_MODE_OP_OR: 1943c965db44STomer Tayar case INIT_MODE_OP_AND: 1944c965db44STomer Tayar arg1 = qed_is_mode_match(p_hwfn, modes_buf_offset); 1945c965db44STomer Tayar arg2 = qed_is_mode_match(p_hwfn, modes_buf_offset); 1946c965db44STomer Tayar return (tree_val == INIT_MODE_OP_OR) ? (arg1 || 1947c965db44STomer Tayar arg2) : (arg1 && arg2); 1948c965db44STomer Tayar default: 1949c965db44STomer Tayar return dev_data->mode_enable[tree_val - MAX_INIT_MODE_OPS] > 0; 1950c965db44STomer Tayar } 1951c965db44STomer Tayar } 1952c965db44STomer Tayar 1953c965db44STomer Tayar /* Returns true if the specified entity (indicated by GRC param) should be 1954c965db44STomer Tayar * included in the dump, false otherwise. 1955c965db44STomer Tayar */ 1956c965db44STomer Tayar static bool qed_grc_is_included(struct qed_hwfn *p_hwfn, 1957c965db44STomer Tayar enum dbg_grc_params grc_param) 1958c965db44STomer Tayar { 1959c965db44STomer Tayar return qed_grc_get_param(p_hwfn, grc_param) > 0; 1960c965db44STomer Tayar } 1961c965db44STomer Tayar 1962c965db44STomer Tayar /* Returns true of the specified Storm should be included in the dump, false 1963c965db44STomer Tayar * otherwise. 1964c965db44STomer Tayar */ 1965c965db44STomer Tayar static bool qed_grc_is_storm_included(struct qed_hwfn *p_hwfn, 1966c965db44STomer Tayar enum dbg_storms storm) 1967c965db44STomer Tayar { 1968c965db44STomer Tayar return qed_grc_get_param(p_hwfn, (enum dbg_grc_params)storm) > 0; 1969c965db44STomer Tayar } 1970c965db44STomer Tayar 1971c965db44STomer Tayar /* Returns true if the specified memory should be included in the dump, false 1972c965db44STomer Tayar * otherwise. 1973c965db44STomer Tayar */ 1974c965db44STomer Tayar static bool qed_grc_is_mem_included(struct qed_hwfn *p_hwfn, 1975c965db44STomer Tayar enum block_id block_id, u8 mem_group_id) 1976c965db44STomer Tayar { 1977c965db44STomer Tayar u8 i; 1978c965db44STomer Tayar 1979c965db44STomer Tayar /* Check Storm match */ 1980c965db44STomer Tayar if (s_block_defs[block_id]->associated_to_storm && 1981c965db44STomer Tayar !qed_grc_is_storm_included(p_hwfn, 1982c965db44STomer Tayar (enum dbg_storms)s_block_defs[block_id]->storm_id)) 1983c965db44STomer Tayar return false; 1984c965db44STomer Tayar 1985c965db44STomer Tayar for (i = 0; i < NUM_BIG_RAM_TYPES; i++) 1986c965db44STomer Tayar if (mem_group_id == s_big_ram_defs[i].mem_group_id || 1987c965db44STomer Tayar mem_group_id == s_big_ram_defs[i].ram_mem_group_id) 1988c965db44STomer Tayar return qed_grc_is_included(p_hwfn, 1989c965db44STomer Tayar s_big_ram_defs[i].grc_param); 1990c965db44STomer Tayar if (mem_group_id == MEM_GROUP_PXP_ILT || mem_group_id == 1991c965db44STomer Tayar MEM_GROUP_PXP_MEM) 1992c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_PXP); 1993c965db44STomer Tayar if (mem_group_id == MEM_GROUP_RAM) 1994c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_RAM); 1995c965db44STomer Tayar if (mem_group_id == MEM_GROUP_PBUF) 1996c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_PBUF); 1997c965db44STomer Tayar if (mem_group_id == MEM_GROUP_CAU_MEM || 1998c965db44STomer Tayar mem_group_id == MEM_GROUP_CAU_SB || 1999c965db44STomer Tayar mem_group_id == MEM_GROUP_CAU_PI) 2000c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CAU); 2001c965db44STomer Tayar if (mem_group_id == MEM_GROUP_QM_MEM) 2002c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_QM); 2003c965db44STomer Tayar if (mem_group_id == MEM_GROUP_CONN_CFC_MEM || 2004c965db44STomer Tayar mem_group_id == MEM_GROUP_TASK_CFC_MEM) 2005c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CFC); 2006c965db44STomer Tayar if (mem_group_id == MEM_GROUP_IGU_MEM || mem_group_id == 2007c965db44STomer Tayar MEM_GROUP_IGU_MSIX) 2008c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_IGU); 2009c965db44STomer Tayar if (mem_group_id == MEM_GROUP_MULD_MEM) 2010c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_MULD); 2011c965db44STomer Tayar if (mem_group_id == MEM_GROUP_PRS_MEM) 2012c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_PRS); 2013c965db44STomer Tayar if (mem_group_id == MEM_GROUP_DMAE_MEM) 2014c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_DMAE); 2015c965db44STomer Tayar if (mem_group_id == MEM_GROUP_TM_MEM) 2016c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_TM); 2017c965db44STomer Tayar if (mem_group_id == MEM_GROUP_SDM_MEM) 2018c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_SDM); 2019c965db44STomer Tayar if (mem_group_id == MEM_GROUP_TDIF_CTX || mem_group_id == 2020c965db44STomer Tayar MEM_GROUP_RDIF_CTX) 2021c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_DIF); 2022c965db44STomer Tayar if (mem_group_id == MEM_GROUP_CM_MEM) 2023c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CM); 2024c965db44STomer Tayar if (mem_group_id == MEM_GROUP_IOR) 2025c965db44STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_IOR); 2026c965db44STomer Tayar 2027c965db44STomer Tayar return true; 2028c965db44STomer Tayar } 2029c965db44STomer Tayar 2030c965db44STomer Tayar /* Stalls all Storms */ 2031c965db44STomer Tayar static void qed_grc_stall_storms(struct qed_hwfn *p_hwfn, 2032c965db44STomer Tayar struct qed_ptt *p_ptt, bool stall) 2033c965db44STomer Tayar { 2034c965db44STomer Tayar u8 reg_val = stall ? 1 : 0; 2035c965db44STomer Tayar u8 storm_id; 2036c965db44STomer Tayar 2037c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 2038c965db44STomer Tayar if (qed_grc_is_storm_included(p_hwfn, 2039c965db44STomer Tayar (enum dbg_storms)storm_id)) { 2040c965db44STomer Tayar u32 reg_addr = 2041c965db44STomer Tayar s_storm_defs[storm_id].sem_fast_mem_addr + 2042c965db44STomer Tayar SEM_FAST_REG_STALL_0; 2043c965db44STomer Tayar 2044c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, reg_addr, reg_val); 2045c965db44STomer Tayar } 2046c965db44STomer Tayar } 2047c965db44STomer Tayar 2048c965db44STomer Tayar msleep(STALL_DELAY_MS); 2049c965db44STomer Tayar } 2050c965db44STomer Tayar 2051c965db44STomer Tayar /* Takes all blocks out of reset */ 2052c965db44STomer Tayar static void qed_grc_unreset_blocks(struct qed_hwfn *p_hwfn, 2053c965db44STomer Tayar struct qed_ptt *p_ptt) 2054c965db44STomer Tayar { 2055c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2056c965db44STomer Tayar u32 reg_val[MAX_DBG_RESET_REGS] = { 0 }; 2057c965db44STomer Tayar u32 i; 2058c965db44STomer Tayar 2059c965db44STomer Tayar /* Fill reset regs values */ 2060c965db44STomer Tayar for (i = 0; i < MAX_BLOCK_ID; i++) 2061c965db44STomer Tayar if (s_block_defs[i]->has_reset_bit && s_block_defs[i]->unreset) 2062c965db44STomer Tayar reg_val[s_block_defs[i]->reset_reg] |= 2063c965db44STomer Tayar BIT(s_block_defs[i]->reset_bit_offset); 2064c965db44STomer Tayar 2065c965db44STomer Tayar /* Write reset registers */ 2066c965db44STomer Tayar for (i = 0; i < MAX_DBG_RESET_REGS; i++) { 2067c965db44STomer Tayar if (s_reset_regs_defs[i].exists[dev_data->chip_id]) { 2068c965db44STomer Tayar reg_val[i] |= s_reset_regs_defs[i].unreset_val; 2069c965db44STomer Tayar if (reg_val[i]) 2070c965db44STomer Tayar qed_wr(p_hwfn, 2071c965db44STomer Tayar p_ptt, 2072c965db44STomer Tayar s_reset_regs_defs[i].addr + 2073c965db44STomer Tayar RESET_REG_UNRESET_OFFSET, reg_val[i]); 2074c965db44STomer Tayar } 2075c965db44STomer Tayar } 2076c965db44STomer Tayar } 2077c965db44STomer Tayar 2078be086e7cSMintz, Yuval /* Returns the attention block data of the specified block */ 2079c965db44STomer Tayar static const struct dbg_attn_block_type_data * 2080c965db44STomer Tayar qed_get_block_attn_data(enum block_id block_id, enum dbg_attn_type attn_type) 2081c965db44STomer Tayar { 2082c965db44STomer Tayar const struct dbg_attn_block *base_attn_block_arr = 2083c965db44STomer Tayar (const struct dbg_attn_block *) 2084c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_ATTN_BLOCKS].ptr; 2085c965db44STomer Tayar 2086c965db44STomer Tayar return &base_attn_block_arr[block_id].per_type_data[attn_type]; 2087c965db44STomer Tayar } 2088c965db44STomer Tayar 2089c965db44STomer Tayar /* Returns the attention registers of the specified block */ 2090c965db44STomer Tayar static const struct dbg_attn_reg * 2091c965db44STomer Tayar qed_get_block_attn_regs(enum block_id block_id, enum dbg_attn_type attn_type, 2092c965db44STomer Tayar u8 *num_attn_regs) 2093c965db44STomer Tayar { 2094c965db44STomer Tayar const struct dbg_attn_block_type_data *block_type_data = 2095c965db44STomer Tayar qed_get_block_attn_data(block_id, attn_type); 2096c965db44STomer Tayar 2097c965db44STomer Tayar *num_attn_regs = block_type_data->num_regs; 2098c965db44STomer Tayar return &((const struct dbg_attn_reg *) 2099c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_ATTN_REGS].ptr)[block_type_data-> 2100c965db44STomer Tayar regs_offset]; 2101c965db44STomer Tayar } 2102c965db44STomer Tayar 2103c965db44STomer Tayar /* For each block, clear the status of all parities */ 2104c965db44STomer Tayar static void qed_grc_clear_all_prty(struct qed_hwfn *p_hwfn, 2105c965db44STomer Tayar struct qed_ptt *p_ptt) 2106c965db44STomer Tayar { 2107c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2108c965db44STomer Tayar u8 reg_idx, num_attn_regs; 2109c965db44STomer Tayar u32 block_id; 2110c965db44STomer Tayar 2111c965db44STomer Tayar for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { 2112c965db44STomer Tayar const struct dbg_attn_reg *attn_reg_arr; 2113c965db44STomer Tayar 2114c965db44STomer Tayar if (dev_data->block_in_reset[block_id]) 2115c965db44STomer Tayar continue; 2116c965db44STomer Tayar 2117c965db44STomer Tayar attn_reg_arr = qed_get_block_attn_regs((enum block_id)block_id, 2118c965db44STomer Tayar ATTN_TYPE_PARITY, 2119c965db44STomer Tayar &num_attn_regs); 2120c965db44STomer Tayar for (reg_idx = 0; reg_idx < num_attn_regs; reg_idx++) { 2121c965db44STomer Tayar const struct dbg_attn_reg *reg_data = 2122c965db44STomer Tayar &attn_reg_arr[reg_idx]; 2123c965db44STomer Tayar 2124c965db44STomer Tayar /* Check mode */ 2125c965db44STomer Tayar bool eval_mode = GET_FIELD(reg_data->mode.data, 2126c965db44STomer Tayar DBG_MODE_HDR_EVAL_MODE) > 0; 2127c965db44STomer Tayar u16 modes_buf_offset = 2128c965db44STomer Tayar GET_FIELD(reg_data->mode.data, 2129c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 2130c965db44STomer Tayar 2131c965db44STomer Tayar if (!eval_mode || 2132c965db44STomer Tayar qed_is_mode_match(p_hwfn, &modes_buf_offset)) 2133c965db44STomer Tayar /* Mode match - read parity status read-clear 2134c965db44STomer Tayar * register. 2135c965db44STomer Tayar */ 2136c965db44STomer Tayar qed_rd(p_hwfn, p_ptt, 2137c965db44STomer Tayar DWORDS_TO_BYTES(reg_data-> 2138c965db44STomer Tayar sts_clr_address)); 2139c965db44STomer Tayar } 2140c965db44STomer Tayar } 2141c965db44STomer Tayar } 2142c965db44STomer Tayar 2143c965db44STomer Tayar /* Dumps GRC registers section header. Returns the dumped size in dwords. 2144c965db44STomer Tayar * The following parameters are dumped: 2145c965db44STomer Tayar * - 'count' = num_dumped_entries 2146c965db44STomer Tayar * - 'split' = split_type 2147be086e7cSMintz, Yuval * - 'id' = split_id (dumped only if split_id >= 0) 2148c965db44STomer Tayar * - 'param_name' = param_val (user param, dumped only if param_name != NULL and 2149c965db44STomer Tayar * param_val != NULL) 2150c965db44STomer Tayar */ 2151c965db44STomer Tayar static u32 qed_grc_dump_regs_hdr(u32 *dump_buf, 2152c965db44STomer Tayar bool dump, 2153c965db44STomer Tayar u32 num_reg_entries, 2154c965db44STomer Tayar const char *split_type, 2155c965db44STomer Tayar int split_id, 2156c965db44STomer Tayar const char *param_name, const char *param_val) 2157c965db44STomer Tayar { 2158c965db44STomer Tayar u8 num_params = 2 + (split_id >= 0 ? 1 : 0) + (param_name ? 1 : 0); 2159c965db44STomer Tayar u32 offset = 0; 2160c965db44STomer Tayar 2161c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 2162c965db44STomer Tayar dump, "grc_regs", num_params); 2163c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 2164c965db44STomer Tayar dump, "count", num_reg_entries); 2165c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 2166c965db44STomer Tayar dump, "split", split_type); 2167c965db44STomer Tayar if (split_id >= 0) 2168c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 2169c965db44STomer Tayar dump, "id", split_id); 2170c965db44STomer Tayar if (param_name && param_val) 2171c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 2172c965db44STomer Tayar dump, param_name, param_val); 2173c965db44STomer Tayar return offset; 2174c965db44STomer Tayar } 2175c965db44STomer Tayar 2176be086e7cSMintz, Yuval /* Dumps the GRC registers in the specified address range. 2177be086e7cSMintz, Yuval * Returns the dumped size in dwords. 2178be086e7cSMintz, Yuval */ 2179be086e7cSMintz, Yuval static u32 qed_grc_dump_addr_range(struct qed_hwfn *p_hwfn, 2180be086e7cSMintz, Yuval struct qed_ptt *p_ptt, u32 *dump_buf, 2181be086e7cSMintz, Yuval bool dump, u32 addr, u32 len) 2182be086e7cSMintz, Yuval { 2183be086e7cSMintz, Yuval u32 byte_addr = DWORDS_TO_BYTES(addr), offset = 0, i; 2184be086e7cSMintz, Yuval 2185be086e7cSMintz, Yuval if (dump) 2186be086e7cSMintz, Yuval for (i = 0; i < len; i++, byte_addr += BYTES_IN_DWORD, offset++) 2187be086e7cSMintz, Yuval *(dump_buf + offset) = qed_rd(p_hwfn, p_ptt, byte_addr); 2188be086e7cSMintz, Yuval else 2189be086e7cSMintz, Yuval offset += len; 2190be086e7cSMintz, Yuval return offset; 2191be086e7cSMintz, Yuval } 2192be086e7cSMintz, Yuval 2193be086e7cSMintz, Yuval /* Dumps GRC registers sequence header. Returns the dumped size in dwords. */ 2194be086e7cSMintz, Yuval static u32 qed_grc_dump_reg_entry_hdr(u32 *dump_buf, bool dump, u32 addr, 2195be086e7cSMintz, Yuval u32 len) 2196be086e7cSMintz, Yuval { 2197be086e7cSMintz, Yuval if (dump) 2198be086e7cSMintz, Yuval *dump_buf = addr | (len << REG_DUMP_LEN_SHIFT); 2199be086e7cSMintz, Yuval return 1; 2200be086e7cSMintz, Yuval } 2201be086e7cSMintz, Yuval 2202be086e7cSMintz, Yuval /* Dumps GRC registers sequence. Returns the dumped size in dwords. */ 2203c965db44STomer Tayar static u32 qed_grc_dump_reg_entry(struct qed_hwfn *p_hwfn, 2204c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, 2205c965db44STomer Tayar bool dump, u32 addr, u32 len) 2206c965db44STomer Tayar { 2207be086e7cSMintz, Yuval u32 offset = 0; 2208c965db44STomer Tayar 2209be086e7cSMintz, Yuval offset += qed_grc_dump_reg_entry_hdr(dump_buf, dump, addr, len); 2210be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 2211c965db44STomer Tayar p_ptt, 2212be086e7cSMintz, Yuval dump_buf + offset, dump, addr, len); 2213be086e7cSMintz, Yuval return offset; 2214be086e7cSMintz, Yuval } 2215be086e7cSMintz, Yuval 2216be086e7cSMintz, Yuval /* Dumps GRC registers sequence with skip cycle. 2217be086e7cSMintz, Yuval * Returns the dumped size in dwords. 2218be086e7cSMintz, Yuval */ 2219be086e7cSMintz, Yuval static u32 qed_grc_dump_reg_entry_skip(struct qed_hwfn *p_hwfn, 2220be086e7cSMintz, Yuval struct qed_ptt *p_ptt, u32 *dump_buf, 2221be086e7cSMintz, Yuval bool dump, u32 addr, u32 total_len, 2222be086e7cSMintz, Yuval u32 read_len, u32 skip_len) 2223be086e7cSMintz, Yuval { 2224be086e7cSMintz, Yuval u32 offset = 0, reg_offset = 0; 2225be086e7cSMintz, Yuval 2226be086e7cSMintz, Yuval offset += qed_grc_dump_reg_entry_hdr(dump_buf, dump, addr, total_len); 2227be086e7cSMintz, Yuval if (dump) { 2228be086e7cSMintz, Yuval while (reg_offset < total_len) { 2229be086e7cSMintz, Yuval u32 curr_len = min_t(u32, 2230be086e7cSMintz, Yuval read_len, 2231be086e7cSMintz, Yuval total_len - reg_offset); 2232be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 2233be086e7cSMintz, Yuval p_ptt, 2234be086e7cSMintz, Yuval dump_buf + offset, 2235be086e7cSMintz, Yuval dump, addr, curr_len); 2236be086e7cSMintz, Yuval reg_offset += curr_len; 2237be086e7cSMintz, Yuval addr += curr_len; 2238be086e7cSMintz, Yuval if (reg_offset < total_len) { 2239be086e7cSMintz, Yuval curr_len = min_t(u32, 2240be086e7cSMintz, Yuval skip_len, 2241be086e7cSMintz, Yuval total_len - skip_len); 2242be086e7cSMintz, Yuval memset(dump_buf + offset, 0, 2243be086e7cSMintz, Yuval DWORDS_TO_BYTES(curr_len)); 2244be086e7cSMintz, Yuval offset += curr_len; 2245be086e7cSMintz, Yuval reg_offset += curr_len; 2246be086e7cSMintz, Yuval addr += curr_len; 2247be086e7cSMintz, Yuval } 2248be086e7cSMintz, Yuval } 2249c965db44STomer Tayar } else { 2250be086e7cSMintz, Yuval offset += total_len; 2251c965db44STomer Tayar } 2252c965db44STomer Tayar 2253c965db44STomer Tayar return offset; 2254c965db44STomer Tayar } 2255c965db44STomer Tayar 2256c965db44STomer Tayar /* Dumps GRC registers entries. Returns the dumped size in dwords. */ 2257c965db44STomer Tayar static u32 qed_grc_dump_regs_entries(struct qed_hwfn *p_hwfn, 2258c965db44STomer Tayar struct qed_ptt *p_ptt, 2259c965db44STomer Tayar struct dbg_array input_regs_arr, 2260c965db44STomer Tayar u32 *dump_buf, 2261c965db44STomer Tayar bool dump, 2262c965db44STomer Tayar bool block_enable[MAX_BLOCK_ID], 2263c965db44STomer Tayar u32 *num_dumped_reg_entries) 2264c965db44STomer Tayar { 2265c965db44STomer Tayar u32 i, offset = 0, input_offset = 0; 2266c965db44STomer Tayar bool mode_match = true; 2267c965db44STomer Tayar 2268c965db44STomer Tayar *num_dumped_reg_entries = 0; 2269c965db44STomer Tayar while (input_offset < input_regs_arr.size_in_dwords) { 2270c965db44STomer Tayar const struct dbg_dump_cond_hdr *cond_hdr = 2271c965db44STomer Tayar (const struct dbg_dump_cond_hdr *) 2272c965db44STomer Tayar &input_regs_arr.ptr[input_offset++]; 2273c965db44STomer Tayar bool eval_mode = GET_FIELD(cond_hdr->mode.data, 2274c965db44STomer Tayar DBG_MODE_HDR_EVAL_MODE) > 0; 2275c965db44STomer Tayar 2276c965db44STomer Tayar /* Check mode/block */ 2277c965db44STomer Tayar if (eval_mode) { 2278c965db44STomer Tayar u16 modes_buf_offset = 2279c965db44STomer Tayar GET_FIELD(cond_hdr->mode.data, 2280c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 2281c965db44STomer Tayar mode_match = qed_is_mode_match(p_hwfn, 2282c965db44STomer Tayar &modes_buf_offset); 2283c965db44STomer Tayar } 2284c965db44STomer Tayar 2285c965db44STomer Tayar if (mode_match && block_enable[cond_hdr->block_id]) { 2286c965db44STomer Tayar for (i = 0; i < cond_hdr->data_size; 2287c965db44STomer Tayar i++, input_offset++) { 2288c965db44STomer Tayar const struct dbg_dump_reg *reg = 2289c965db44STomer Tayar (const struct dbg_dump_reg *) 2290c965db44STomer Tayar &input_regs_arr.ptr[input_offset]; 2291be086e7cSMintz, Yuval u32 addr, len; 2292c965db44STomer Tayar 2293be086e7cSMintz, Yuval addr = GET_FIELD(reg->data, 2294be086e7cSMintz, Yuval DBG_DUMP_REG_ADDRESS); 2295be086e7cSMintz, Yuval len = GET_FIELD(reg->data, DBG_DUMP_REG_LENGTH); 2296c965db44STomer Tayar offset += 2297c965db44STomer Tayar qed_grc_dump_reg_entry(p_hwfn, p_ptt, 2298be086e7cSMintz, Yuval dump_buf + offset, 2299be086e7cSMintz, Yuval dump, 2300be086e7cSMintz, Yuval addr, 2301be086e7cSMintz, Yuval len); 2302c965db44STomer Tayar (*num_dumped_reg_entries)++; 2303c965db44STomer Tayar } 2304c965db44STomer Tayar } else { 2305c965db44STomer Tayar input_offset += cond_hdr->data_size; 2306c965db44STomer Tayar } 2307c965db44STomer Tayar } 2308c965db44STomer Tayar 2309c965db44STomer Tayar return offset; 2310c965db44STomer Tayar } 2311c965db44STomer Tayar 2312c965db44STomer Tayar /* Dumps GRC registers entries. Returns the dumped size in dwords. */ 2313c965db44STomer Tayar static u32 qed_grc_dump_split_data(struct qed_hwfn *p_hwfn, 2314c965db44STomer Tayar struct qed_ptt *p_ptt, 2315c965db44STomer Tayar struct dbg_array input_regs_arr, 2316c965db44STomer Tayar u32 *dump_buf, 2317c965db44STomer Tayar bool dump, 2318c965db44STomer Tayar bool block_enable[MAX_BLOCK_ID], 2319c965db44STomer Tayar const char *split_type_name, 2320c965db44STomer Tayar u32 split_id, 2321c965db44STomer Tayar const char *param_name, 2322c965db44STomer Tayar const char *param_val) 2323c965db44STomer Tayar { 2324c965db44STomer Tayar u32 num_dumped_reg_entries, offset; 2325c965db44STomer Tayar 2326c965db44STomer Tayar /* Calculate register dump header size (and skip it for now) */ 2327c965db44STomer Tayar offset = qed_grc_dump_regs_hdr(dump_buf, 2328c965db44STomer Tayar false, 2329c965db44STomer Tayar 0, 2330c965db44STomer Tayar split_type_name, 2331c965db44STomer Tayar split_id, param_name, param_val); 2332c965db44STomer Tayar 2333c965db44STomer Tayar /* Dump registers */ 2334c965db44STomer Tayar offset += qed_grc_dump_regs_entries(p_hwfn, 2335c965db44STomer Tayar p_ptt, 2336c965db44STomer Tayar input_regs_arr, 2337c965db44STomer Tayar dump_buf + offset, 2338c965db44STomer Tayar dump, 2339c965db44STomer Tayar block_enable, 2340c965db44STomer Tayar &num_dumped_reg_entries); 2341c965db44STomer Tayar 2342c965db44STomer Tayar /* Write register dump header */ 2343c965db44STomer Tayar if (dump && num_dumped_reg_entries > 0) 2344c965db44STomer Tayar qed_grc_dump_regs_hdr(dump_buf, 2345c965db44STomer Tayar dump, 2346c965db44STomer Tayar num_dumped_reg_entries, 2347c965db44STomer Tayar split_type_name, 2348c965db44STomer Tayar split_id, param_name, param_val); 2349c965db44STomer Tayar 2350c965db44STomer Tayar return num_dumped_reg_entries > 0 ? offset : 0; 2351c965db44STomer Tayar } 2352c965db44STomer Tayar 2353c965db44STomer Tayar /* Dumps registers according to the input registers array. 2354c965db44STomer Tayar * Returns the dumped size in dwords. 2355c965db44STomer Tayar */ 2356c965db44STomer Tayar static u32 qed_grc_dump_registers(struct qed_hwfn *p_hwfn, 2357c965db44STomer Tayar struct qed_ptt *p_ptt, 2358c965db44STomer Tayar u32 *dump_buf, 2359c965db44STomer Tayar bool dump, 2360c965db44STomer Tayar bool block_enable[MAX_BLOCK_ID], 2361c965db44STomer Tayar const char *param_name, const char *param_val) 2362c965db44STomer Tayar { 2363c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2364be086e7cSMintz, Yuval struct chip_platform_defs *p_platform_defs; 2365c965db44STomer Tayar u32 offset = 0, input_offset = 0; 2366be086e7cSMintz, Yuval struct chip_defs *p_chip_defs; 2367be086e7cSMintz, Yuval u8 port_id, pf_id, vf_id; 2368be086e7cSMintz, Yuval u16 fid; 2369be086e7cSMintz, Yuval 2370be086e7cSMintz, Yuval p_chip_defs = &s_chip_defs[dev_data->chip_id]; 2371be086e7cSMintz, Yuval p_platform_defs = &p_chip_defs->per_platform[dev_data->platform_id]; 2372c965db44STomer Tayar 2373c965db44STomer Tayar if (dump) 2374c965db44STomer Tayar DP_VERBOSE(p_hwfn, QED_MSG_DEBUG, "Dumping registers...\n"); 2375c965db44STomer Tayar while (input_offset < 2376c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].size_in_dwords) { 2377c965db44STomer Tayar const struct dbg_dump_split_hdr *split_hdr = 2378c965db44STomer Tayar (const struct dbg_dump_split_hdr *) 2379c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].ptr[input_offset++]; 2380c965db44STomer Tayar u8 split_type_id = GET_FIELD(split_hdr->hdr, 2381c965db44STomer Tayar DBG_DUMP_SPLIT_HDR_SPLIT_TYPE_ID); 2382c965db44STomer Tayar u32 split_data_size = GET_FIELD(split_hdr->hdr, 2383c965db44STomer Tayar DBG_DUMP_SPLIT_HDR_DATA_SIZE); 2384c965db44STomer Tayar struct dbg_array curr_input_regs_arr = { 2385c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].ptr[input_offset], 2386c965db44STomer Tayar split_data_size}; 2387c965db44STomer Tayar 2388c965db44STomer Tayar switch (split_type_id) { 2389c965db44STomer Tayar case SPLIT_TYPE_NONE: 2390c965db44STomer Tayar offset += qed_grc_dump_split_data(p_hwfn, 2391c965db44STomer Tayar p_ptt, 2392c965db44STomer Tayar curr_input_regs_arr, 2393c965db44STomer Tayar dump_buf + offset, 2394c965db44STomer Tayar dump, 2395c965db44STomer Tayar block_enable, 2396c965db44STomer Tayar "eng", 2397c965db44STomer Tayar (u32)(-1), 2398c965db44STomer Tayar param_name, 2399c965db44STomer Tayar param_val); 2400c965db44STomer Tayar break; 2401c965db44STomer Tayar case SPLIT_TYPE_PORT: 2402be086e7cSMintz, Yuval for (port_id = 0; port_id < p_platform_defs->num_ports; 2403c965db44STomer Tayar port_id++) { 2404c965db44STomer Tayar if (dump) 2405c965db44STomer Tayar qed_port_pretend(p_hwfn, p_ptt, 2406c965db44STomer Tayar port_id); 2407c965db44STomer Tayar offset += 2408c965db44STomer Tayar qed_grc_dump_split_data(p_hwfn, p_ptt, 2409c965db44STomer Tayar curr_input_regs_arr, 2410c965db44STomer Tayar dump_buf + offset, 2411c965db44STomer Tayar dump, block_enable, 2412c965db44STomer Tayar "port", port_id, 2413c965db44STomer Tayar param_name, 2414c965db44STomer Tayar param_val); 2415c965db44STomer Tayar } 2416c965db44STomer Tayar break; 2417c965db44STomer Tayar case SPLIT_TYPE_PF: 2418c965db44STomer Tayar case SPLIT_TYPE_PORT_PF: 2419be086e7cSMintz, Yuval for (pf_id = 0; pf_id < p_platform_defs->num_pfs; 2420c965db44STomer Tayar pf_id++) { 2421be086e7cSMintz, Yuval u8 pfid_shift = 2422be086e7cSMintz, Yuval PXP_PRETEND_CONCRETE_FID_PFID_SHIFT; 2423be086e7cSMintz, Yuval 2424be086e7cSMintz, Yuval if (dump) { 2425be086e7cSMintz, Yuval fid = pf_id << pfid_shift; 2426be086e7cSMintz, Yuval qed_fid_pretend(p_hwfn, p_ptt, fid); 2427be086e7cSMintz, Yuval } 2428be086e7cSMintz, Yuval 2429be086e7cSMintz, Yuval offset += 2430be086e7cSMintz, Yuval qed_grc_dump_split_data(p_hwfn, p_ptt, 2431c965db44STomer Tayar curr_input_regs_arr, 2432c965db44STomer Tayar dump_buf + offset, 2433c965db44STomer Tayar dump, block_enable, 2434be086e7cSMintz, Yuval "pf", pf_id, 2435be086e7cSMintz, Yuval param_name, 2436be086e7cSMintz, Yuval param_val); 2437be086e7cSMintz, Yuval } 2438be086e7cSMintz, Yuval break; 2439be086e7cSMintz, Yuval case SPLIT_TYPE_VF: 2440be086e7cSMintz, Yuval for (vf_id = 0; vf_id < p_platform_defs->num_vfs; 2441be086e7cSMintz, Yuval vf_id++) { 2442be086e7cSMintz, Yuval u8 vfvalid_shift = 2443be086e7cSMintz, Yuval PXP_PRETEND_CONCRETE_FID_VFVALID_SHIFT; 2444be086e7cSMintz, Yuval u8 vfid_shift = 2445be086e7cSMintz, Yuval PXP_PRETEND_CONCRETE_FID_VFID_SHIFT; 2446be086e7cSMintz, Yuval 2447be086e7cSMintz, Yuval if (dump) { 2448be086e7cSMintz, Yuval fid = BIT(vfvalid_shift) | 2449be086e7cSMintz, Yuval (vf_id << vfid_shift); 2450be086e7cSMintz, Yuval qed_fid_pretend(p_hwfn, p_ptt, fid); 2451be086e7cSMintz, Yuval } 2452be086e7cSMintz, Yuval 2453be086e7cSMintz, Yuval offset += 2454be086e7cSMintz, Yuval qed_grc_dump_split_data(p_hwfn, p_ptt, 2455be086e7cSMintz, Yuval curr_input_regs_arr, 2456be086e7cSMintz, Yuval dump_buf + offset, 2457be086e7cSMintz, Yuval dump, block_enable, 2458be086e7cSMintz, Yuval "vf", vf_id, 2459be086e7cSMintz, Yuval param_name, 2460c965db44STomer Tayar param_val); 2461c965db44STomer Tayar } 2462c965db44STomer Tayar break; 2463c965db44STomer Tayar default: 2464c965db44STomer Tayar break; 2465c965db44STomer Tayar } 2466c965db44STomer Tayar 2467c965db44STomer Tayar input_offset += split_data_size; 2468c965db44STomer Tayar } 2469c965db44STomer Tayar 2470c965db44STomer Tayar /* Pretend to original PF */ 2471be086e7cSMintz, Yuval if (dump) { 2472be086e7cSMintz, Yuval fid = p_hwfn->rel_pf_id << PXP_PRETEND_CONCRETE_FID_PFID_SHIFT; 2473be086e7cSMintz, Yuval qed_fid_pretend(p_hwfn, p_ptt, fid); 2474be086e7cSMintz, Yuval } 2475be086e7cSMintz, Yuval 2476c965db44STomer Tayar return offset; 2477c965db44STomer Tayar } 2478c965db44STomer Tayar 2479c965db44STomer Tayar /* Dump reset registers. Returns the dumped size in dwords. */ 2480c965db44STomer Tayar static u32 qed_grc_dump_reset_regs(struct qed_hwfn *p_hwfn, 2481c965db44STomer Tayar struct qed_ptt *p_ptt, 2482c965db44STomer Tayar u32 *dump_buf, bool dump) 2483c965db44STomer Tayar { 2484c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2485c965db44STomer Tayar u32 i, offset = 0, num_regs = 0; 2486c965db44STomer Tayar 2487c965db44STomer Tayar /* Calculate header size */ 2488c965db44STomer Tayar offset += qed_grc_dump_regs_hdr(dump_buf, 2489c965db44STomer Tayar false, 0, "eng", -1, NULL, NULL); 2490c965db44STomer Tayar 2491c965db44STomer Tayar /* Write reset registers */ 2492c965db44STomer Tayar for (i = 0; i < MAX_DBG_RESET_REGS; i++) { 2493c965db44STomer Tayar if (s_reset_regs_defs[i].exists[dev_data->chip_id]) { 2494be086e7cSMintz, Yuval u32 addr = BYTES_TO_DWORDS(s_reset_regs_defs[i].addr); 2495be086e7cSMintz, Yuval 2496c965db44STomer Tayar offset += qed_grc_dump_reg_entry(p_hwfn, 2497c965db44STomer Tayar p_ptt, 2498c965db44STomer Tayar dump_buf + offset, 2499c965db44STomer Tayar dump, 2500be086e7cSMintz, Yuval addr, 2501be086e7cSMintz, Yuval 1); 2502c965db44STomer Tayar num_regs++; 2503c965db44STomer Tayar } 2504c965db44STomer Tayar } 2505c965db44STomer Tayar 2506c965db44STomer Tayar /* Write header */ 2507c965db44STomer Tayar if (dump) 2508c965db44STomer Tayar qed_grc_dump_regs_hdr(dump_buf, 2509c965db44STomer Tayar true, num_regs, "eng", -1, NULL, NULL); 2510c965db44STomer Tayar return offset; 2511c965db44STomer Tayar } 2512c965db44STomer Tayar 2513c965db44STomer Tayar /* Dump registers that are modified during GRC Dump and therefore must be dumped 2514c965db44STomer Tayar * first. Returns the dumped size in dwords. 2515c965db44STomer Tayar */ 2516c965db44STomer Tayar static u32 qed_grc_dump_modified_regs(struct qed_hwfn *p_hwfn, 2517c965db44STomer Tayar struct qed_ptt *p_ptt, 2518c965db44STomer Tayar u32 *dump_buf, bool dump) 2519c965db44STomer Tayar { 2520c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2521c965db44STomer Tayar u32 offset = 0, num_reg_entries = 0, block_id; 2522c965db44STomer Tayar u8 storm_id, reg_idx, num_attn_regs; 2523c965db44STomer Tayar 2524c965db44STomer Tayar /* Calculate header size */ 2525c965db44STomer Tayar offset += qed_grc_dump_regs_hdr(dump_buf, 2526c965db44STomer Tayar false, 0, "eng", -1, NULL, NULL); 2527c965db44STomer Tayar 2528c965db44STomer Tayar /* Write parity registers */ 2529c965db44STomer Tayar for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { 2530c965db44STomer Tayar const struct dbg_attn_reg *attn_reg_arr; 2531c965db44STomer Tayar 2532c965db44STomer Tayar if (dev_data->block_in_reset[block_id] && dump) 2533c965db44STomer Tayar continue; 2534c965db44STomer Tayar 2535c965db44STomer Tayar attn_reg_arr = qed_get_block_attn_regs((enum block_id)block_id, 2536c965db44STomer Tayar ATTN_TYPE_PARITY, 2537c965db44STomer Tayar &num_attn_regs); 2538c965db44STomer Tayar for (reg_idx = 0; reg_idx < num_attn_regs; reg_idx++) { 2539c965db44STomer Tayar const struct dbg_attn_reg *reg_data = 2540c965db44STomer Tayar &attn_reg_arr[reg_idx]; 2541c965db44STomer Tayar u16 modes_buf_offset; 2542c965db44STomer Tayar bool eval_mode; 2543be086e7cSMintz, Yuval u32 addr; 2544c965db44STomer Tayar 2545c965db44STomer Tayar /* Check mode */ 2546c965db44STomer Tayar eval_mode = GET_FIELD(reg_data->mode.data, 2547c965db44STomer Tayar DBG_MODE_HDR_EVAL_MODE) > 0; 2548c965db44STomer Tayar modes_buf_offset = 2549c965db44STomer Tayar GET_FIELD(reg_data->mode.data, 2550c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 2551c965db44STomer Tayar if (!eval_mode || 2552c965db44STomer Tayar qed_is_mode_match(p_hwfn, &modes_buf_offset)) { 2553c965db44STomer Tayar /* Mode match - read and dump registers */ 2554be086e7cSMintz, Yuval addr = reg_data->mask_address; 2555be086e7cSMintz, Yuval offset += 2556be086e7cSMintz, Yuval qed_grc_dump_reg_entry(p_hwfn, 2557c965db44STomer Tayar p_ptt, 2558c965db44STomer Tayar dump_buf + offset, 2559c965db44STomer Tayar dump, 2560be086e7cSMintz, Yuval addr, 2561c965db44STomer Tayar 1); 2562be086e7cSMintz, Yuval addr = GET_FIELD(reg_data->data, 2563be086e7cSMintz, Yuval DBG_ATTN_REG_STS_ADDRESS); 2564be086e7cSMintz, Yuval offset += 2565be086e7cSMintz, Yuval qed_grc_dump_reg_entry(p_hwfn, 2566c965db44STomer Tayar p_ptt, 2567c965db44STomer Tayar dump_buf + offset, 2568c965db44STomer Tayar dump, 2569be086e7cSMintz, Yuval addr, 2570c965db44STomer Tayar 1); 2571c965db44STomer Tayar num_reg_entries += 2; 2572c965db44STomer Tayar } 2573c965db44STomer Tayar } 2574c965db44STomer Tayar } 2575c965db44STomer Tayar 2576c965db44STomer Tayar /* Write storm stall status registers */ 2577c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 2578be086e7cSMintz, Yuval u32 addr; 2579be086e7cSMintz, Yuval 2580c965db44STomer Tayar if (dev_data->block_in_reset[s_storm_defs[storm_id].block_id] && 2581c965db44STomer Tayar dump) 2582c965db44STomer Tayar continue; 2583c965db44STomer Tayar 2584be086e7cSMintz, Yuval addr = 2585be086e7cSMintz, Yuval BYTES_TO_DWORDS(s_storm_defs[storm_id].sem_fast_mem_addr + 2586be086e7cSMintz, Yuval SEM_FAST_REG_STALLED); 2587c965db44STomer Tayar offset += qed_grc_dump_reg_entry(p_hwfn, 2588c965db44STomer Tayar p_ptt, 2589c965db44STomer Tayar dump_buf + offset, 2590c965db44STomer Tayar dump, 2591be086e7cSMintz, Yuval addr, 2592c965db44STomer Tayar 1); 2593c965db44STomer Tayar num_reg_entries++; 2594c965db44STomer Tayar } 2595c965db44STomer Tayar 2596c965db44STomer Tayar /* Write header */ 2597c965db44STomer Tayar if (dump) 2598c965db44STomer Tayar qed_grc_dump_regs_hdr(dump_buf, 2599c965db44STomer Tayar true, 2600c965db44STomer Tayar num_reg_entries, "eng", -1, NULL, NULL); 2601c965db44STomer Tayar return offset; 2602c965db44STomer Tayar } 2603c965db44STomer Tayar 2604be086e7cSMintz, Yuval /* Dumps registers that can't be represented in the debug arrays */ 2605be086e7cSMintz, Yuval static u32 qed_grc_dump_special_regs(struct qed_hwfn *p_hwfn, 2606be086e7cSMintz, Yuval struct qed_ptt *p_ptt, 2607be086e7cSMintz, Yuval u32 *dump_buf, bool dump) 2608be086e7cSMintz, Yuval { 2609be086e7cSMintz, Yuval u32 offset = 0, addr; 2610be086e7cSMintz, Yuval 2611be086e7cSMintz, Yuval offset += qed_grc_dump_regs_hdr(dump_buf, 2612be086e7cSMintz, Yuval dump, 2, "eng", -1, NULL, NULL); 2613be086e7cSMintz, Yuval 2614be086e7cSMintz, Yuval /* Dump R/TDIF_REG_DEBUG_ERROR_INFO_SIZE (every 8'th register should be 2615be086e7cSMintz, Yuval * skipped). 2616be086e7cSMintz, Yuval */ 2617be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(RDIF_REG_DEBUG_ERROR_INFO); 2618be086e7cSMintz, Yuval offset += qed_grc_dump_reg_entry_skip(p_hwfn, 2619be086e7cSMintz, Yuval p_ptt, 2620be086e7cSMintz, Yuval dump_buf + offset, 2621be086e7cSMintz, Yuval dump, 2622be086e7cSMintz, Yuval addr, 2623be086e7cSMintz, Yuval RDIF_REG_DEBUG_ERROR_INFO_SIZE, 2624be086e7cSMintz, Yuval 7, 2625be086e7cSMintz, Yuval 1); 2626be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(TDIF_REG_DEBUG_ERROR_INFO); 2627be086e7cSMintz, Yuval offset += 2628be086e7cSMintz, Yuval qed_grc_dump_reg_entry_skip(p_hwfn, 2629be086e7cSMintz, Yuval p_ptt, 2630be086e7cSMintz, Yuval dump_buf + offset, 2631be086e7cSMintz, Yuval dump, 2632be086e7cSMintz, Yuval addr, 2633be086e7cSMintz, Yuval TDIF_REG_DEBUG_ERROR_INFO_SIZE, 2634be086e7cSMintz, Yuval 7, 2635be086e7cSMintz, Yuval 1); 2636be086e7cSMintz, Yuval 2637be086e7cSMintz, Yuval return offset; 2638be086e7cSMintz, Yuval } 2639be086e7cSMintz, Yuval 2640c965db44STomer Tayar /* Dumps a GRC memory header (section and params). 2641c965db44STomer Tayar * The following parameters are dumped: 2642c965db44STomer Tayar * name - name is dumped only if it's not NULL. 2643be086e7cSMintz, Yuval * addr - addr is dumped only if name is NULL. 2644be086e7cSMintz, Yuval * len - len is always dumped. 2645c965db44STomer Tayar * width - bit_width is dumped if it's not zero. 2646c965db44STomer Tayar * packed - packed=1 is dumped if it's not false. 2647c965db44STomer Tayar * mem_group - mem_group is always dumped. 2648c965db44STomer Tayar * is_storm - true only if the memory is related to a Storm. 2649c965db44STomer Tayar * storm_letter - storm letter (valid only if is_storm is true). 2650c965db44STomer Tayar * Returns the dumped size in dwords. 2651c965db44STomer Tayar */ 2652c965db44STomer Tayar static u32 qed_grc_dump_mem_hdr(struct qed_hwfn *p_hwfn, 2653c965db44STomer Tayar u32 *dump_buf, 2654c965db44STomer Tayar bool dump, 2655c965db44STomer Tayar const char *name, 2656be086e7cSMintz, Yuval u32 addr, 2657be086e7cSMintz, Yuval u32 len, 2658c965db44STomer Tayar u32 bit_width, 2659c965db44STomer Tayar bool packed, 2660c965db44STomer Tayar const char *mem_group, 2661c965db44STomer Tayar bool is_storm, char storm_letter) 2662c965db44STomer Tayar { 2663c965db44STomer Tayar u8 num_params = 3; 2664c965db44STomer Tayar u32 offset = 0; 2665c965db44STomer Tayar char buf[64]; 2666c965db44STomer Tayar 2667be086e7cSMintz, Yuval if (!len) 2668c965db44STomer Tayar DP_NOTICE(p_hwfn, 2669c965db44STomer Tayar "Unexpected GRC Dump error: dumped memory size must be non-zero\n"); 2670c965db44STomer Tayar if (bit_width) 2671c965db44STomer Tayar num_params++; 2672c965db44STomer Tayar if (packed) 2673c965db44STomer Tayar num_params++; 2674c965db44STomer Tayar 2675c965db44STomer Tayar /* Dump section header */ 2676c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 2677c965db44STomer Tayar dump, "grc_mem", num_params); 2678c965db44STomer Tayar if (name) { 2679c965db44STomer Tayar /* Dump name */ 2680c965db44STomer Tayar if (is_storm) { 2681c965db44STomer Tayar strcpy(buf, "?STORM_"); 2682c965db44STomer Tayar buf[0] = storm_letter; 2683c965db44STomer Tayar strcpy(buf + strlen(buf), name); 2684c965db44STomer Tayar } else { 2685c965db44STomer Tayar strcpy(buf, name); 2686c965db44STomer Tayar } 2687c965db44STomer Tayar 2688c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 2689c965db44STomer Tayar dump, "name", buf); 2690c965db44STomer Tayar if (dump) 2691c965db44STomer Tayar DP_VERBOSE(p_hwfn, 2692c965db44STomer Tayar QED_MSG_DEBUG, 2693c965db44STomer Tayar "Dumping %d registers from %s...\n", 2694be086e7cSMintz, Yuval len, buf); 2695c965db44STomer Tayar } else { 2696c965db44STomer Tayar /* Dump address */ 2697c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 2698be086e7cSMintz, Yuval dump, "addr", 2699be086e7cSMintz, Yuval DWORDS_TO_BYTES(addr)); 2700be086e7cSMintz, Yuval if (dump && len > 64) 2701c965db44STomer Tayar DP_VERBOSE(p_hwfn, 2702c965db44STomer Tayar QED_MSG_DEBUG, 2703c965db44STomer Tayar "Dumping %d registers from address 0x%x...\n", 2704be086e7cSMintz, Yuval len, (u32)DWORDS_TO_BYTES(addr)); 2705c965db44STomer Tayar } 2706c965db44STomer Tayar 2707c965db44STomer Tayar /* Dump len */ 2708be086e7cSMintz, Yuval offset += qed_dump_num_param(dump_buf + offset, dump, "len", len); 2709c965db44STomer Tayar 2710c965db44STomer Tayar /* Dump bit width */ 2711c965db44STomer Tayar if (bit_width) 2712c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 2713c965db44STomer Tayar dump, "width", bit_width); 2714c965db44STomer Tayar 2715c965db44STomer Tayar /* Dump packed */ 2716c965db44STomer Tayar if (packed) 2717c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 2718c965db44STomer Tayar dump, "packed", 1); 2719c965db44STomer Tayar 2720c965db44STomer Tayar /* Dump reg type */ 2721c965db44STomer Tayar if (is_storm) { 2722c965db44STomer Tayar strcpy(buf, "?STORM_"); 2723c965db44STomer Tayar buf[0] = storm_letter; 2724c965db44STomer Tayar strcpy(buf + strlen(buf), mem_group); 2725c965db44STomer Tayar } else { 2726c965db44STomer Tayar strcpy(buf, mem_group); 2727c965db44STomer Tayar } 2728c965db44STomer Tayar 2729c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, dump, "type", buf); 2730c965db44STomer Tayar return offset; 2731c965db44STomer Tayar } 2732c965db44STomer Tayar 2733c965db44STomer Tayar /* Dumps a single GRC memory. If name is NULL, the memory is stored by address. 2734c965db44STomer Tayar * Returns the dumped size in dwords. 2735c965db44STomer Tayar */ 2736c965db44STomer Tayar static u32 qed_grc_dump_mem(struct qed_hwfn *p_hwfn, 2737c965db44STomer Tayar struct qed_ptt *p_ptt, 2738c965db44STomer Tayar u32 *dump_buf, 2739c965db44STomer Tayar bool dump, 2740c965db44STomer Tayar const char *name, 2741be086e7cSMintz, Yuval u32 addr, 2742be086e7cSMintz, Yuval u32 len, 2743c965db44STomer Tayar u32 bit_width, 2744c965db44STomer Tayar bool packed, 2745c965db44STomer Tayar const char *mem_group, 2746c965db44STomer Tayar bool is_storm, char storm_letter) 2747c965db44STomer Tayar { 2748c965db44STomer Tayar u32 offset = 0; 2749c965db44STomer Tayar 2750c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 2751c965db44STomer Tayar dump_buf + offset, 2752c965db44STomer Tayar dump, 2753c965db44STomer Tayar name, 2754be086e7cSMintz, Yuval addr, 2755be086e7cSMintz, Yuval len, 2756c965db44STomer Tayar bit_width, 2757c965db44STomer Tayar packed, 2758c965db44STomer Tayar mem_group, is_storm, storm_letter); 2759be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 2760be086e7cSMintz, Yuval p_ptt, 2761be086e7cSMintz, Yuval dump_buf + offset, dump, addr, len); 2762c965db44STomer Tayar return offset; 2763c965db44STomer Tayar } 2764c965db44STomer Tayar 2765c965db44STomer Tayar /* Dumps GRC memories entries. Returns the dumped size in dwords. */ 2766c965db44STomer Tayar static u32 qed_grc_dump_mem_entries(struct qed_hwfn *p_hwfn, 2767c965db44STomer Tayar struct qed_ptt *p_ptt, 2768c965db44STomer Tayar struct dbg_array input_mems_arr, 2769c965db44STomer Tayar u32 *dump_buf, bool dump) 2770c965db44STomer Tayar { 2771c965db44STomer Tayar u32 i, offset = 0, input_offset = 0; 2772c965db44STomer Tayar bool mode_match = true; 2773c965db44STomer Tayar 2774c965db44STomer Tayar while (input_offset < input_mems_arr.size_in_dwords) { 2775c965db44STomer Tayar const struct dbg_dump_cond_hdr *cond_hdr; 2776c965db44STomer Tayar u32 num_entries; 2777c965db44STomer Tayar bool eval_mode; 2778c965db44STomer Tayar 2779c965db44STomer Tayar cond_hdr = (const struct dbg_dump_cond_hdr *) 2780c965db44STomer Tayar &input_mems_arr.ptr[input_offset++]; 2781c965db44STomer Tayar eval_mode = GET_FIELD(cond_hdr->mode.data, 2782c965db44STomer Tayar DBG_MODE_HDR_EVAL_MODE) > 0; 2783c965db44STomer Tayar 2784c965db44STomer Tayar /* Check required mode */ 2785c965db44STomer Tayar if (eval_mode) { 2786c965db44STomer Tayar u16 modes_buf_offset = 2787c965db44STomer Tayar GET_FIELD(cond_hdr->mode.data, 2788c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 2789c965db44STomer Tayar 2790c965db44STomer Tayar mode_match = qed_is_mode_match(p_hwfn, 2791c965db44STomer Tayar &modes_buf_offset); 2792c965db44STomer Tayar } 2793c965db44STomer Tayar 2794c965db44STomer Tayar if (!mode_match) { 2795c965db44STomer Tayar input_offset += cond_hdr->data_size; 2796c965db44STomer Tayar continue; 2797c965db44STomer Tayar } 2798c965db44STomer Tayar 2799c965db44STomer Tayar num_entries = cond_hdr->data_size / MEM_DUMP_ENTRY_SIZE_DWORDS; 2800c965db44STomer Tayar for (i = 0; i < num_entries; 2801c965db44STomer Tayar i++, input_offset += MEM_DUMP_ENTRY_SIZE_DWORDS) { 2802c965db44STomer Tayar const struct dbg_dump_mem *mem = 2803c965db44STomer Tayar (const struct dbg_dump_mem *) 2804c965db44STomer Tayar &input_mems_arr.ptr[input_offset]; 2805c965db44STomer Tayar u8 mem_group_id; 2806c965db44STomer Tayar 2807c965db44STomer Tayar mem_group_id = GET_FIELD(mem->dword0, 2808c965db44STomer Tayar DBG_DUMP_MEM_MEM_GROUP_ID); 2809c965db44STomer Tayar if (mem_group_id >= MEM_GROUPS_NUM) { 2810c965db44STomer Tayar DP_NOTICE(p_hwfn, "Invalid mem_group_id\n"); 2811c965db44STomer Tayar return 0; 2812c965db44STomer Tayar } 2813c965db44STomer Tayar 2814c965db44STomer Tayar if (qed_grc_is_mem_included(p_hwfn, 2815c965db44STomer Tayar (enum block_id)cond_hdr->block_id, 2816c965db44STomer Tayar mem_group_id)) { 2817be086e7cSMintz, Yuval u32 mem_addr = GET_FIELD(mem->dword0, 2818be086e7cSMintz, Yuval DBG_DUMP_MEM_ADDRESS); 2819c965db44STomer Tayar u32 mem_len = GET_FIELD(mem->dword1, 2820c965db44STomer Tayar DBG_DUMP_MEM_LENGTH); 2821be086e7cSMintz, Yuval enum dbg_grc_params grc_param; 2822c965db44STomer Tayar char storm_letter = 'a'; 2823c965db44STomer Tayar bool is_storm = false; 2824c965db44STomer Tayar 2825c965db44STomer Tayar /* Update memory length for CCFC/TCFC memories 2826c965db44STomer Tayar * according to number of LCIDs/LTIDs. 2827c965db44STomer Tayar */ 2828be086e7cSMintz, Yuval if (mem_group_id == MEM_GROUP_CONN_CFC_MEM) { 2829be086e7cSMintz, Yuval if (mem_len % MAX_LCIDS != 0) { 2830be086e7cSMintz, Yuval DP_NOTICE(p_hwfn, 2831be086e7cSMintz, Yuval "Invalid CCFC connection memory size\n"); 2832be086e7cSMintz, Yuval return 0; 2833be086e7cSMintz, Yuval } 2834be086e7cSMintz, Yuval 2835be086e7cSMintz, Yuval grc_param = DBG_GRC_PARAM_NUM_LCIDS; 2836c965db44STomer Tayar mem_len = qed_grc_get_param(p_hwfn, 2837be086e7cSMintz, Yuval grc_param) * 2838be086e7cSMintz, Yuval (mem_len / MAX_LCIDS); 2839be086e7cSMintz, Yuval } else if (mem_group_id == 2840be086e7cSMintz, Yuval MEM_GROUP_TASK_CFC_MEM) { 2841be086e7cSMintz, Yuval if (mem_len % MAX_LTIDS != 0) { 2842be086e7cSMintz, Yuval DP_NOTICE(p_hwfn, 2843be086e7cSMintz, Yuval "Invalid TCFC task memory size\n"); 2844be086e7cSMintz, Yuval return 0; 2845be086e7cSMintz, Yuval } 2846be086e7cSMintz, Yuval 2847be086e7cSMintz, Yuval grc_param = DBG_GRC_PARAM_NUM_LTIDS; 2848c965db44STomer Tayar mem_len = qed_grc_get_param(p_hwfn, 2849be086e7cSMintz, Yuval grc_param) * 2850be086e7cSMintz, Yuval (mem_len / MAX_LTIDS); 2851be086e7cSMintz, Yuval } 2852c965db44STomer Tayar 2853c965db44STomer Tayar /* If memory is associated with Storm, update 2854c965db44STomer Tayar * Storm details. 2855c965db44STomer Tayar */ 2856c965db44STomer Tayar if (s_block_defs[cond_hdr->block_id]-> 2857c965db44STomer Tayar associated_to_storm) { 2858c965db44STomer Tayar is_storm = true; 2859c965db44STomer Tayar storm_letter = 2860c965db44STomer Tayar s_storm_defs[s_block_defs[ 2861c965db44STomer Tayar cond_hdr->block_id]-> 2862c965db44STomer Tayar storm_id].letter; 2863c965db44STomer Tayar } 2864c965db44STomer Tayar 2865c965db44STomer Tayar /* Dump memory */ 2866c965db44STomer Tayar offset += qed_grc_dump_mem(p_hwfn, p_ptt, 2867c965db44STomer Tayar dump_buf + offset, dump, NULL, 2868be086e7cSMintz, Yuval mem_addr, mem_len, 0, 2869c965db44STomer Tayar false, 2870c965db44STomer Tayar s_mem_group_names[mem_group_id], 2871c965db44STomer Tayar is_storm, storm_letter); 2872c965db44STomer Tayar } 2873c965db44STomer Tayar } 2874c965db44STomer Tayar } 2875c965db44STomer Tayar 2876c965db44STomer Tayar return offset; 2877c965db44STomer Tayar } 2878c965db44STomer Tayar 2879c965db44STomer Tayar /* Dumps GRC memories according to the input array dump_mem. 2880c965db44STomer Tayar * Returns the dumped size in dwords. 2881c965db44STomer Tayar */ 2882c965db44STomer Tayar static u32 qed_grc_dump_memories(struct qed_hwfn *p_hwfn, 2883c965db44STomer Tayar struct qed_ptt *p_ptt, 2884c965db44STomer Tayar u32 *dump_buf, bool dump) 2885c965db44STomer Tayar { 2886c965db44STomer Tayar u32 offset = 0, input_offset = 0; 2887c965db44STomer Tayar 2888c965db44STomer Tayar while (input_offset < 2889c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].size_in_dwords) { 2890c965db44STomer Tayar const struct dbg_dump_split_hdr *split_hdr = 2891c965db44STomer Tayar (const struct dbg_dump_split_hdr *) 2892c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].ptr[input_offset++]; 2893c965db44STomer Tayar u8 split_type_id = GET_FIELD(split_hdr->hdr, 2894c965db44STomer Tayar DBG_DUMP_SPLIT_HDR_SPLIT_TYPE_ID); 2895c965db44STomer Tayar u32 split_data_size = GET_FIELD(split_hdr->hdr, 2896c965db44STomer Tayar DBG_DUMP_SPLIT_HDR_DATA_SIZE); 2897c965db44STomer Tayar struct dbg_array curr_input_mems_arr = { 2898c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].ptr[input_offset], 2899c965db44STomer Tayar split_data_size}; 2900c965db44STomer Tayar 2901c965db44STomer Tayar switch (split_type_id) { 2902c965db44STomer Tayar case SPLIT_TYPE_NONE: 2903c965db44STomer Tayar offset += qed_grc_dump_mem_entries(p_hwfn, 2904c965db44STomer Tayar p_ptt, 2905c965db44STomer Tayar curr_input_mems_arr, 2906c965db44STomer Tayar dump_buf + offset, 2907c965db44STomer Tayar dump); 2908c965db44STomer Tayar break; 2909c965db44STomer Tayar default: 2910c965db44STomer Tayar DP_NOTICE(p_hwfn, 2911c965db44STomer Tayar "Dumping split memories is currently not supported\n"); 2912c965db44STomer Tayar break; 2913c965db44STomer Tayar } 2914c965db44STomer Tayar 2915c965db44STomer Tayar input_offset += split_data_size; 2916c965db44STomer Tayar } 2917c965db44STomer Tayar 2918c965db44STomer Tayar return offset; 2919c965db44STomer Tayar } 2920c965db44STomer Tayar 2921c965db44STomer Tayar /* Dumps GRC context data for the specified Storm. 2922c965db44STomer Tayar * Returns the dumped size in dwords. 2923c965db44STomer Tayar */ 2924c965db44STomer Tayar static u32 qed_grc_dump_ctx_data(struct qed_hwfn *p_hwfn, 2925c965db44STomer Tayar struct qed_ptt *p_ptt, 2926c965db44STomer Tayar u32 *dump_buf, 2927c965db44STomer Tayar bool dump, 2928c965db44STomer Tayar const char *name, 2929c965db44STomer Tayar u32 num_lids, 2930c965db44STomer Tayar u32 lid_size, 2931c965db44STomer Tayar u32 rd_reg_addr, 2932c965db44STomer Tayar u8 storm_id) 2933c965db44STomer Tayar { 2934c965db44STomer Tayar u32 i, lid, total_size; 2935c965db44STomer Tayar u32 offset = 0; 2936c965db44STomer Tayar 2937c965db44STomer Tayar if (!lid_size) 2938c965db44STomer Tayar return 0; 2939c965db44STomer Tayar lid_size *= BYTES_IN_DWORD; 2940c965db44STomer Tayar total_size = num_lids * lid_size; 2941c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 2942c965db44STomer Tayar dump_buf + offset, 2943c965db44STomer Tayar dump, 2944c965db44STomer Tayar name, 2945c965db44STomer Tayar 0, 2946c965db44STomer Tayar total_size, 2947c965db44STomer Tayar lid_size * 32, 2948c965db44STomer Tayar false, 2949c965db44STomer Tayar name, 2950c965db44STomer Tayar true, s_storm_defs[storm_id].letter); 2951c965db44STomer Tayar 2952c965db44STomer Tayar /* Dump context data */ 2953c965db44STomer Tayar if (dump) { 2954c965db44STomer Tayar for (lid = 0; lid < num_lids; lid++) { 2955c965db44STomer Tayar for (i = 0; i < lid_size; i++, offset++) { 2956c965db44STomer Tayar qed_wr(p_hwfn, 2957c965db44STomer Tayar p_ptt, 2958c965db44STomer Tayar s_storm_defs[storm_id].cm_ctx_wr_addr, 2959c965db44STomer Tayar BIT(9) | lid); 2960c965db44STomer Tayar *(dump_buf + offset) = qed_rd(p_hwfn, 2961c965db44STomer Tayar p_ptt, 2962c965db44STomer Tayar rd_reg_addr); 2963c965db44STomer Tayar } 2964c965db44STomer Tayar } 2965c965db44STomer Tayar } else { 2966c965db44STomer Tayar offset += total_size; 2967c965db44STomer Tayar } 2968c965db44STomer Tayar 2969c965db44STomer Tayar return offset; 2970c965db44STomer Tayar } 2971c965db44STomer Tayar 2972c965db44STomer Tayar /* Dumps GRC contexts. Returns the dumped size in dwords. */ 2973c965db44STomer Tayar static u32 qed_grc_dump_ctx(struct qed_hwfn *p_hwfn, 2974c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 2975c965db44STomer Tayar { 2976c965db44STomer Tayar u32 offset = 0; 2977c965db44STomer Tayar u8 storm_id; 2978c965db44STomer Tayar 2979c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 2980c965db44STomer Tayar if (!qed_grc_is_storm_included(p_hwfn, 2981c965db44STomer Tayar (enum dbg_storms)storm_id)) 2982c965db44STomer Tayar continue; 2983c965db44STomer Tayar 2984c965db44STomer Tayar /* Dump Conn AG context size */ 2985c965db44STomer Tayar offset += 2986c965db44STomer Tayar qed_grc_dump_ctx_data(p_hwfn, 2987c965db44STomer Tayar p_ptt, 2988c965db44STomer Tayar dump_buf + offset, 2989c965db44STomer Tayar dump, 2990c965db44STomer Tayar "CONN_AG_CTX", 2991c965db44STomer Tayar qed_grc_get_param(p_hwfn, 2992c965db44STomer Tayar DBG_GRC_PARAM_NUM_LCIDS), 2993c965db44STomer Tayar s_storm_defs[storm_id]. 2994c965db44STomer Tayar cm_conn_ag_ctx_lid_size, 2995c965db44STomer Tayar s_storm_defs[storm_id]. 2996c965db44STomer Tayar cm_conn_ag_ctx_rd_addr, 2997c965db44STomer Tayar storm_id); 2998c965db44STomer Tayar 2999c965db44STomer Tayar /* Dump Conn ST context size */ 3000c965db44STomer Tayar offset += 3001c965db44STomer Tayar qed_grc_dump_ctx_data(p_hwfn, 3002c965db44STomer Tayar p_ptt, 3003c965db44STomer Tayar dump_buf + offset, 3004c965db44STomer Tayar dump, 3005c965db44STomer Tayar "CONN_ST_CTX", 3006c965db44STomer Tayar qed_grc_get_param(p_hwfn, 3007c965db44STomer Tayar DBG_GRC_PARAM_NUM_LCIDS), 3008c965db44STomer Tayar s_storm_defs[storm_id]. 3009c965db44STomer Tayar cm_conn_st_ctx_lid_size, 3010c965db44STomer Tayar s_storm_defs[storm_id]. 3011c965db44STomer Tayar cm_conn_st_ctx_rd_addr, 3012c965db44STomer Tayar storm_id); 3013c965db44STomer Tayar 3014c965db44STomer Tayar /* Dump Task AG context size */ 3015c965db44STomer Tayar offset += 3016c965db44STomer Tayar qed_grc_dump_ctx_data(p_hwfn, 3017c965db44STomer Tayar p_ptt, 3018c965db44STomer Tayar dump_buf + offset, 3019c965db44STomer Tayar dump, 3020c965db44STomer Tayar "TASK_AG_CTX", 3021c965db44STomer Tayar qed_grc_get_param(p_hwfn, 3022c965db44STomer Tayar DBG_GRC_PARAM_NUM_LTIDS), 3023c965db44STomer Tayar s_storm_defs[storm_id]. 3024c965db44STomer Tayar cm_task_ag_ctx_lid_size, 3025c965db44STomer Tayar s_storm_defs[storm_id]. 3026c965db44STomer Tayar cm_task_ag_ctx_rd_addr, 3027c965db44STomer Tayar storm_id); 3028c965db44STomer Tayar 3029c965db44STomer Tayar /* Dump Task ST context size */ 3030c965db44STomer Tayar offset += 3031c965db44STomer Tayar qed_grc_dump_ctx_data(p_hwfn, 3032c965db44STomer Tayar p_ptt, 3033c965db44STomer Tayar dump_buf + offset, 3034c965db44STomer Tayar dump, 3035c965db44STomer Tayar "TASK_ST_CTX", 3036c965db44STomer Tayar qed_grc_get_param(p_hwfn, 3037c965db44STomer Tayar DBG_GRC_PARAM_NUM_LTIDS), 3038c965db44STomer Tayar s_storm_defs[storm_id]. 3039c965db44STomer Tayar cm_task_st_ctx_lid_size, 3040c965db44STomer Tayar s_storm_defs[storm_id]. 3041c965db44STomer Tayar cm_task_st_ctx_rd_addr, 3042c965db44STomer Tayar storm_id); 3043c965db44STomer Tayar } 3044c965db44STomer Tayar 3045c965db44STomer Tayar return offset; 3046c965db44STomer Tayar } 3047c965db44STomer Tayar 3048c965db44STomer Tayar /* Dumps GRC IORs data. Returns the dumped size in dwords. */ 3049c965db44STomer Tayar static u32 qed_grc_dump_iors(struct qed_hwfn *p_hwfn, 3050c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3051c965db44STomer Tayar { 3052c965db44STomer Tayar char buf[10] = "IOR_SET_?"; 3053c965db44STomer Tayar u8 storm_id, set_id; 3054c965db44STomer Tayar u32 offset = 0; 3055c965db44STomer Tayar 3056c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 3057be086e7cSMintz, Yuval struct storm_defs *storm = &s_storm_defs[storm_id]; 3058c965db44STomer Tayar 3059be086e7cSMintz, Yuval if (!qed_grc_is_storm_included(p_hwfn, 3060be086e7cSMintz, Yuval (enum dbg_storms)storm_id)) 3061be086e7cSMintz, Yuval continue; 3062be086e7cSMintz, Yuval 3063be086e7cSMintz, Yuval for (set_id = 0; set_id < NUM_IOR_SETS; set_id++) { 3064be086e7cSMintz, Yuval u32 dwords, addr; 3065be086e7cSMintz, Yuval 3066be086e7cSMintz, Yuval dwords = storm->sem_fast_mem_addr + 3067be086e7cSMintz, Yuval SEM_FAST_REG_STORM_REG_FILE; 3068be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(dwords) + IOR_SET_OFFSET(set_id); 3069c965db44STomer Tayar buf[strlen(buf) - 1] = '0' + set_id; 3070c965db44STomer Tayar offset += qed_grc_dump_mem(p_hwfn, 3071c965db44STomer Tayar p_ptt, 3072c965db44STomer Tayar dump_buf + offset, 3073c965db44STomer Tayar dump, 3074c965db44STomer Tayar buf, 3075c965db44STomer Tayar addr, 3076c965db44STomer Tayar IORS_PER_SET, 3077c965db44STomer Tayar 32, 3078c965db44STomer Tayar false, 3079c965db44STomer Tayar "ior", 3080c965db44STomer Tayar true, 3081be086e7cSMintz, Yuval storm->letter); 3082c965db44STomer Tayar } 3083c965db44STomer Tayar } 3084c965db44STomer Tayar 3085c965db44STomer Tayar return offset; 3086c965db44STomer Tayar } 3087c965db44STomer Tayar 3088c965db44STomer Tayar /* Dump VFC CAM. Returns the dumped size in dwords. */ 3089c965db44STomer Tayar static u32 qed_grc_dump_vfc_cam(struct qed_hwfn *p_hwfn, 3090c965db44STomer Tayar struct qed_ptt *p_ptt, 3091c965db44STomer Tayar u32 *dump_buf, bool dump, u8 storm_id) 3092c965db44STomer Tayar { 3093c965db44STomer Tayar u32 total_size = VFC_CAM_NUM_ROWS * VFC_CAM_RESP_DWORDS; 3094c965db44STomer Tayar u32 cam_addr[VFC_CAM_ADDR_DWORDS] = { 0 }; 3095c965db44STomer Tayar u32 cam_cmd[VFC_CAM_CMD_DWORDS] = { 0 }; 3096c965db44STomer Tayar u32 offset = 0; 3097c965db44STomer Tayar u32 row, i; 3098c965db44STomer Tayar 3099c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3100c965db44STomer Tayar dump_buf + offset, 3101c965db44STomer Tayar dump, 3102c965db44STomer Tayar "vfc_cam", 3103c965db44STomer Tayar 0, 3104c965db44STomer Tayar total_size, 3105c965db44STomer Tayar 256, 3106c965db44STomer Tayar false, 3107c965db44STomer Tayar "vfc_cam", 3108c965db44STomer Tayar true, s_storm_defs[storm_id].letter); 3109c965db44STomer Tayar if (dump) { 3110c965db44STomer Tayar /* Prepare CAM address */ 3111c965db44STomer Tayar SET_VAR_FIELD(cam_addr, VFC_CAM_ADDR, OP, VFC_OPCODE_CAM_RD); 3112c965db44STomer Tayar for (row = 0; row < VFC_CAM_NUM_ROWS; 3113c965db44STomer Tayar row++, offset += VFC_CAM_RESP_DWORDS) { 3114c965db44STomer Tayar /* Write VFC CAM command */ 3115c965db44STomer Tayar SET_VAR_FIELD(cam_cmd, VFC_CAM_CMD, ROW, row); 3116c965db44STomer Tayar ARR_REG_WR(p_hwfn, 3117c965db44STomer Tayar p_ptt, 3118c965db44STomer Tayar s_storm_defs[storm_id].sem_fast_mem_addr + 3119c965db44STomer Tayar SEM_FAST_REG_VFC_DATA_WR, 3120c965db44STomer Tayar cam_cmd, VFC_CAM_CMD_DWORDS); 3121c965db44STomer Tayar 3122c965db44STomer Tayar /* Write VFC CAM address */ 3123c965db44STomer Tayar ARR_REG_WR(p_hwfn, 3124c965db44STomer Tayar p_ptt, 3125c965db44STomer Tayar s_storm_defs[storm_id].sem_fast_mem_addr + 3126c965db44STomer Tayar SEM_FAST_REG_VFC_ADDR, 3127c965db44STomer Tayar cam_addr, VFC_CAM_ADDR_DWORDS); 3128c965db44STomer Tayar 3129c965db44STomer Tayar /* Read VFC CAM read response */ 3130c965db44STomer Tayar ARR_REG_RD(p_hwfn, 3131c965db44STomer Tayar p_ptt, 3132c965db44STomer Tayar s_storm_defs[storm_id].sem_fast_mem_addr + 3133c965db44STomer Tayar SEM_FAST_REG_VFC_DATA_RD, 3134c965db44STomer Tayar dump_buf + offset, VFC_CAM_RESP_DWORDS); 3135c965db44STomer Tayar } 3136c965db44STomer Tayar } else { 3137c965db44STomer Tayar offset += total_size; 3138c965db44STomer Tayar } 3139c965db44STomer Tayar 3140c965db44STomer Tayar return offset; 3141c965db44STomer Tayar } 3142c965db44STomer Tayar 3143c965db44STomer Tayar /* Dump VFC RAM. Returns the dumped size in dwords. */ 3144c965db44STomer Tayar static u32 qed_grc_dump_vfc_ram(struct qed_hwfn *p_hwfn, 3145c965db44STomer Tayar struct qed_ptt *p_ptt, 3146c965db44STomer Tayar u32 *dump_buf, 3147c965db44STomer Tayar bool dump, 3148c965db44STomer Tayar u8 storm_id, struct vfc_ram_defs *ram_defs) 3149c965db44STomer Tayar { 3150c965db44STomer Tayar u32 total_size = ram_defs->num_rows * VFC_RAM_RESP_DWORDS; 3151c965db44STomer Tayar u32 ram_addr[VFC_RAM_ADDR_DWORDS] = { 0 }; 3152c965db44STomer Tayar u32 ram_cmd[VFC_RAM_CMD_DWORDS] = { 0 }; 3153c965db44STomer Tayar u32 offset = 0; 3154c965db44STomer Tayar u32 row, i; 3155c965db44STomer Tayar 3156c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3157c965db44STomer Tayar dump_buf + offset, 3158c965db44STomer Tayar dump, 3159c965db44STomer Tayar ram_defs->mem_name, 3160c965db44STomer Tayar 0, 3161c965db44STomer Tayar total_size, 3162c965db44STomer Tayar 256, 3163c965db44STomer Tayar false, 3164c965db44STomer Tayar ram_defs->type_name, 3165c965db44STomer Tayar true, s_storm_defs[storm_id].letter); 3166c965db44STomer Tayar 3167c965db44STomer Tayar /* Prepare RAM address */ 3168c965db44STomer Tayar SET_VAR_FIELD(ram_addr, VFC_RAM_ADDR, OP, VFC_OPCODE_RAM_RD); 3169c965db44STomer Tayar 3170c965db44STomer Tayar if (!dump) 3171c965db44STomer Tayar return offset + total_size; 3172c965db44STomer Tayar 3173c965db44STomer Tayar for (row = ram_defs->base_row; 3174c965db44STomer Tayar row < ram_defs->base_row + ram_defs->num_rows; 3175c965db44STomer Tayar row++, offset += VFC_RAM_RESP_DWORDS) { 3176c965db44STomer Tayar /* Write VFC RAM command */ 3177c965db44STomer Tayar ARR_REG_WR(p_hwfn, 3178c965db44STomer Tayar p_ptt, 3179c965db44STomer Tayar s_storm_defs[storm_id].sem_fast_mem_addr + 3180c965db44STomer Tayar SEM_FAST_REG_VFC_DATA_WR, 3181c965db44STomer Tayar ram_cmd, VFC_RAM_CMD_DWORDS); 3182c965db44STomer Tayar 3183c965db44STomer Tayar /* Write VFC RAM address */ 3184c965db44STomer Tayar SET_VAR_FIELD(ram_addr, VFC_RAM_ADDR, ROW, row); 3185c965db44STomer Tayar ARR_REG_WR(p_hwfn, 3186c965db44STomer Tayar p_ptt, 3187c965db44STomer Tayar s_storm_defs[storm_id].sem_fast_mem_addr + 3188c965db44STomer Tayar SEM_FAST_REG_VFC_ADDR, 3189c965db44STomer Tayar ram_addr, VFC_RAM_ADDR_DWORDS); 3190c965db44STomer Tayar 3191c965db44STomer Tayar /* Read VFC RAM read response */ 3192c965db44STomer Tayar ARR_REG_RD(p_hwfn, 3193c965db44STomer Tayar p_ptt, 3194c965db44STomer Tayar s_storm_defs[storm_id].sem_fast_mem_addr + 3195c965db44STomer Tayar SEM_FAST_REG_VFC_DATA_RD, 3196c965db44STomer Tayar dump_buf + offset, VFC_RAM_RESP_DWORDS); 3197c965db44STomer Tayar } 3198c965db44STomer Tayar 3199c965db44STomer Tayar return offset; 3200c965db44STomer Tayar } 3201c965db44STomer Tayar 3202c965db44STomer Tayar /* Dumps GRC VFC data. Returns the dumped size in dwords. */ 3203c965db44STomer Tayar static u32 qed_grc_dump_vfc(struct qed_hwfn *p_hwfn, 3204c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3205c965db44STomer Tayar { 3206c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 3207c965db44STomer Tayar u8 storm_id, i; 3208c965db44STomer Tayar u32 offset = 0; 3209c965db44STomer Tayar 3210c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 3211c965db44STomer Tayar if (qed_grc_is_storm_included(p_hwfn, 3212c965db44STomer Tayar (enum dbg_storms)storm_id) && 3213c965db44STomer Tayar s_storm_defs[storm_id].has_vfc && 3214c965db44STomer Tayar (storm_id != DBG_PSTORM_ID || 3215c965db44STomer Tayar dev_data->platform_id == PLATFORM_ASIC)) { 3216c965db44STomer Tayar /* Read CAM */ 3217c965db44STomer Tayar offset += qed_grc_dump_vfc_cam(p_hwfn, 3218c965db44STomer Tayar p_ptt, 3219c965db44STomer Tayar dump_buf + offset, 3220c965db44STomer Tayar dump, storm_id); 3221c965db44STomer Tayar 3222c965db44STomer Tayar /* Read RAM */ 3223c965db44STomer Tayar for (i = 0; i < NUM_VFC_RAM_TYPES; i++) 3224c965db44STomer Tayar offset += qed_grc_dump_vfc_ram(p_hwfn, 3225c965db44STomer Tayar p_ptt, 3226c965db44STomer Tayar dump_buf + 3227c965db44STomer Tayar offset, 3228c965db44STomer Tayar dump, 3229c965db44STomer Tayar storm_id, 3230c965db44STomer Tayar &s_vfc_ram_defs 3231c965db44STomer Tayar [i]); 3232c965db44STomer Tayar } 3233c965db44STomer Tayar } 3234c965db44STomer Tayar 3235c965db44STomer Tayar return offset; 3236c965db44STomer Tayar } 3237c965db44STomer Tayar 3238c965db44STomer Tayar /* Dumps GRC RSS data. Returns the dumped size in dwords. */ 3239c965db44STomer Tayar static u32 qed_grc_dump_rss(struct qed_hwfn *p_hwfn, 3240c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3241c965db44STomer Tayar { 3242c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 3243c965db44STomer Tayar u32 offset = 0; 3244c965db44STomer Tayar u8 rss_mem_id; 3245c965db44STomer Tayar 3246c965db44STomer Tayar for (rss_mem_id = 0; rss_mem_id < NUM_RSS_MEM_TYPES; rss_mem_id++) { 3247c965db44STomer Tayar struct rss_mem_defs *rss_defs = &s_rss_mem_defs[rss_mem_id]; 3248c965db44STomer Tayar u32 num_entries = rss_defs->num_entries[dev_data->chip_id]; 3249c965db44STomer Tayar u32 entry_width = rss_defs->entry_width[dev_data->chip_id]; 3250be086e7cSMintz, Yuval u32 total_dwords = (num_entries * entry_width) / 32; 3251be086e7cSMintz, Yuval u32 size = RSS_REG_RSS_RAM_DATA_SIZE; 3252c965db44STomer Tayar bool packed = (entry_width == 16); 3253be086e7cSMintz, Yuval u32 rss_addr = rss_defs->addr; 3254be086e7cSMintz, Yuval u32 i, addr; 3255c965db44STomer Tayar 3256c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3257c965db44STomer Tayar dump_buf + offset, 3258c965db44STomer Tayar dump, 3259c965db44STomer Tayar rss_defs->mem_name, 3260be086e7cSMintz, Yuval 0, 3261be086e7cSMintz, Yuval total_dwords, 3262c965db44STomer Tayar entry_width, 3263c965db44STomer Tayar packed, 3264c965db44STomer Tayar rss_defs->type_name, false, 0); 3265c965db44STomer Tayar 3266c965db44STomer Tayar if (!dump) { 3267be086e7cSMintz, Yuval offset += total_dwords; 3268c965db44STomer Tayar continue; 3269c965db44STomer Tayar } 3270c965db44STomer Tayar 3271c965db44STomer Tayar /* Dump RSS data */ 3272be086e7cSMintz, Yuval for (i = 0; i < total_dwords; 3273be086e7cSMintz, Yuval i += RSS_REG_RSS_RAM_DATA_SIZE, rss_addr++) { 3274be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(RSS_REG_RSS_RAM_DATA); 3275be086e7cSMintz, Yuval qed_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_ADDR, rss_addr); 3276be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 3277be086e7cSMintz, Yuval p_ptt, 3278be086e7cSMintz, Yuval dump_buf + 3279be086e7cSMintz, Yuval offset, 3280be086e7cSMintz, Yuval dump, 3281be086e7cSMintz, Yuval addr, 3282be086e7cSMintz, Yuval size); 3283c965db44STomer Tayar } 3284c965db44STomer Tayar } 3285c965db44STomer Tayar 3286c965db44STomer Tayar return offset; 3287c965db44STomer Tayar } 3288c965db44STomer Tayar 3289c965db44STomer Tayar /* Dumps GRC Big RAM. Returns the dumped size in dwords. */ 3290c965db44STomer Tayar static u32 qed_grc_dump_big_ram(struct qed_hwfn *p_hwfn, 3291c965db44STomer Tayar struct qed_ptt *p_ptt, 3292c965db44STomer Tayar u32 *dump_buf, bool dump, u8 big_ram_id) 3293c965db44STomer Tayar { 3294c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 3295be086e7cSMintz, Yuval u32 total_blocks, ram_size, offset = 0, i; 3296c965db44STomer Tayar char mem_name[12] = "???_BIG_RAM"; 3297c965db44STomer Tayar char type_name[8] = "???_RAM"; 3298be086e7cSMintz, Yuval struct big_ram_defs *big_ram; 3299c965db44STomer Tayar 3300be086e7cSMintz, Yuval big_ram = &s_big_ram_defs[big_ram_id]; 3301be086e7cSMintz, Yuval total_blocks = big_ram->num_of_blocks[dev_data->chip_id]; 3302c965db44STomer Tayar ram_size = total_blocks * BIG_RAM_BLOCK_SIZE_DWORDS; 3303c965db44STomer Tayar 3304be086e7cSMintz, Yuval strncpy(type_name, big_ram->instance_name, 3305be086e7cSMintz, Yuval strlen(big_ram->instance_name)); 3306be086e7cSMintz, Yuval strncpy(mem_name, big_ram->instance_name, 3307be086e7cSMintz, Yuval strlen(big_ram->instance_name)); 3308c965db44STomer Tayar 3309c965db44STomer Tayar /* Dump memory header */ 3310c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3311c965db44STomer Tayar dump_buf + offset, 3312c965db44STomer Tayar dump, 3313c965db44STomer Tayar mem_name, 3314c965db44STomer Tayar 0, 3315c965db44STomer Tayar ram_size, 3316c965db44STomer Tayar BIG_RAM_BLOCK_SIZE_BYTES * 8, 3317c965db44STomer Tayar false, type_name, false, 0); 3318c965db44STomer Tayar 3319c965db44STomer Tayar if (!dump) 3320c965db44STomer Tayar return offset + ram_size; 3321c965db44STomer Tayar 3322c965db44STomer Tayar /* Read and dump Big RAM data */ 3323c965db44STomer Tayar for (i = 0; i < total_blocks / 2; i++) { 3324be086e7cSMintz, Yuval u32 addr, len; 3325be086e7cSMintz, Yuval 3326be086e7cSMintz, Yuval qed_wr(p_hwfn, p_ptt, big_ram->addr_reg_addr, i); 3327be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(big_ram->data_reg_addr); 3328be086e7cSMintz, Yuval len = 2 * BIG_RAM_BLOCK_SIZE_DWORDS; 3329be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 3330be086e7cSMintz, Yuval p_ptt, 3331be086e7cSMintz, Yuval dump_buf + offset, 3332be086e7cSMintz, Yuval dump, 3333be086e7cSMintz, Yuval addr, 3334be086e7cSMintz, Yuval len); 3335c965db44STomer Tayar } 3336c965db44STomer Tayar 3337c965db44STomer Tayar return offset; 3338c965db44STomer Tayar } 3339c965db44STomer Tayar 3340c965db44STomer Tayar static u32 qed_grc_dump_mcp(struct qed_hwfn *p_hwfn, 3341c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3342c965db44STomer Tayar { 3343c965db44STomer Tayar bool block_enable[MAX_BLOCK_ID] = { 0 }; 3344be086e7cSMintz, Yuval u32 offset = 0, addr; 3345c965db44STomer Tayar bool halted = false; 3346c965db44STomer Tayar 3347c965db44STomer Tayar /* Halt MCP */ 3348be086e7cSMintz, Yuval if (dump && !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP)) { 3349c965db44STomer Tayar halted = !qed_mcp_halt(p_hwfn, p_ptt); 3350c965db44STomer Tayar if (!halted) 3351c965db44STomer Tayar DP_NOTICE(p_hwfn, "MCP halt failed!\n"); 3352c965db44STomer Tayar } 3353c965db44STomer Tayar 3354c965db44STomer Tayar /* Dump MCP scratchpad */ 3355c965db44STomer Tayar offset += qed_grc_dump_mem(p_hwfn, 3356c965db44STomer Tayar p_ptt, 3357c965db44STomer Tayar dump_buf + offset, 3358c965db44STomer Tayar dump, 3359c965db44STomer Tayar NULL, 3360be086e7cSMintz, Yuval BYTES_TO_DWORDS(MCP_REG_SCRATCH), 3361c965db44STomer Tayar MCP_REG_SCRATCH_SIZE, 3362c965db44STomer Tayar 0, false, "MCP", false, 0); 3363c965db44STomer Tayar 3364c965db44STomer Tayar /* Dump MCP cpu_reg_file */ 3365c965db44STomer Tayar offset += qed_grc_dump_mem(p_hwfn, 3366c965db44STomer Tayar p_ptt, 3367c965db44STomer Tayar dump_buf + offset, 3368c965db44STomer Tayar dump, 3369c965db44STomer Tayar NULL, 3370be086e7cSMintz, Yuval BYTES_TO_DWORDS(MCP_REG_CPU_REG_FILE), 3371c965db44STomer Tayar MCP_REG_CPU_REG_FILE_SIZE, 3372c965db44STomer Tayar 0, false, "MCP", false, 0); 3373c965db44STomer Tayar 3374c965db44STomer Tayar /* Dump MCP registers */ 3375c965db44STomer Tayar block_enable[BLOCK_MCP] = true; 3376c965db44STomer Tayar offset += qed_grc_dump_registers(p_hwfn, 3377c965db44STomer Tayar p_ptt, 3378c965db44STomer Tayar dump_buf + offset, 3379c965db44STomer Tayar dump, block_enable, "block", "MCP"); 3380c965db44STomer Tayar 3381c965db44STomer Tayar /* Dump required non-MCP registers */ 3382c965db44STomer Tayar offset += qed_grc_dump_regs_hdr(dump_buf + offset, 3383c965db44STomer Tayar dump, 1, "eng", -1, "block", "MCP"); 3384be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(MISC_REG_SHARED_MEM_ADDR); 3385c965db44STomer Tayar offset += qed_grc_dump_reg_entry(p_hwfn, 3386c965db44STomer Tayar p_ptt, 3387c965db44STomer Tayar dump_buf + offset, 3388c965db44STomer Tayar dump, 3389be086e7cSMintz, Yuval addr, 3390be086e7cSMintz, Yuval 1); 3391c965db44STomer Tayar 3392c965db44STomer Tayar /* Release MCP */ 3393c965db44STomer Tayar if (halted && qed_mcp_resume(p_hwfn, p_ptt)) 3394c965db44STomer Tayar DP_NOTICE(p_hwfn, "Failed to resume MCP after halt!\n"); 3395c965db44STomer Tayar return offset; 3396c965db44STomer Tayar } 3397c965db44STomer Tayar 3398c965db44STomer Tayar /* Dumps the tbus indirect memory for all PHYs. */ 3399c965db44STomer Tayar static u32 qed_grc_dump_phy(struct qed_hwfn *p_hwfn, 3400c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3401c965db44STomer Tayar { 3402c965db44STomer Tayar u32 offset = 0, tbus_lo_offset, tbus_hi_offset; 3403c965db44STomer Tayar char mem_name[32]; 3404c965db44STomer Tayar u8 phy_id; 3405c965db44STomer Tayar 3406c965db44STomer Tayar for (phy_id = 0; phy_id < ARRAY_SIZE(s_phy_defs); phy_id++) { 3407c965db44STomer Tayar struct phy_defs *phy_defs = &s_phy_defs[phy_id]; 3408c965db44STomer Tayar int printed_chars; 3409c965db44STomer Tayar 3410c965db44STomer Tayar printed_chars = snprintf(mem_name, sizeof(mem_name), "tbus_%s", 3411c965db44STomer Tayar phy_defs->phy_name); 3412c965db44STomer Tayar if (printed_chars < 0 || printed_chars >= sizeof(mem_name)) 3413c965db44STomer Tayar DP_NOTICE(p_hwfn, 3414c965db44STomer Tayar "Unexpected debug error: invalid PHY memory name\n"); 3415c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3416c965db44STomer Tayar dump_buf + offset, 3417c965db44STomer Tayar dump, 3418c965db44STomer Tayar mem_name, 3419c965db44STomer Tayar 0, 3420c965db44STomer Tayar PHY_DUMP_SIZE_DWORDS, 3421c965db44STomer Tayar 16, true, mem_name, false, 0); 3422c965db44STomer Tayar if (dump) { 3423c965db44STomer Tayar u32 addr_lo_addr = phy_defs->base_addr + 3424c965db44STomer Tayar phy_defs->tbus_addr_lo_addr; 3425c965db44STomer Tayar u32 addr_hi_addr = phy_defs->base_addr + 3426c965db44STomer Tayar phy_defs->tbus_addr_hi_addr; 3427c965db44STomer Tayar u32 data_lo_addr = phy_defs->base_addr + 3428c965db44STomer Tayar phy_defs->tbus_data_lo_addr; 3429c965db44STomer Tayar u32 data_hi_addr = phy_defs->base_addr + 3430c965db44STomer Tayar phy_defs->tbus_data_hi_addr; 3431c965db44STomer Tayar u8 *bytes_buf = (u8 *)(dump_buf + offset); 3432c965db44STomer Tayar 3433c965db44STomer Tayar for (tbus_hi_offset = 0; 3434c965db44STomer Tayar tbus_hi_offset < (NUM_PHY_TBUS_ADDRESSES >> 8); 3435c965db44STomer Tayar tbus_hi_offset++) { 3436c965db44STomer Tayar qed_wr(p_hwfn, 3437c965db44STomer Tayar p_ptt, addr_hi_addr, tbus_hi_offset); 3438c965db44STomer Tayar for (tbus_lo_offset = 0; tbus_lo_offset < 256; 3439c965db44STomer Tayar tbus_lo_offset++) { 3440c965db44STomer Tayar qed_wr(p_hwfn, 3441c965db44STomer Tayar p_ptt, 3442c965db44STomer Tayar addr_lo_addr, tbus_lo_offset); 3443c965db44STomer Tayar *(bytes_buf++) = 3444c965db44STomer Tayar (u8)qed_rd(p_hwfn, p_ptt, 3445c965db44STomer Tayar data_lo_addr); 3446c965db44STomer Tayar *(bytes_buf++) = 3447c965db44STomer Tayar (u8)qed_rd(p_hwfn, p_ptt, 3448c965db44STomer Tayar data_hi_addr); 3449c965db44STomer Tayar } 3450c965db44STomer Tayar } 3451c965db44STomer Tayar } 3452c965db44STomer Tayar 3453c965db44STomer Tayar offset += PHY_DUMP_SIZE_DWORDS; 3454c965db44STomer Tayar } 3455c965db44STomer Tayar 3456c965db44STomer Tayar return offset; 3457c965db44STomer Tayar } 3458c965db44STomer Tayar 3459c965db44STomer Tayar static void qed_config_dbg_line(struct qed_hwfn *p_hwfn, 3460c965db44STomer Tayar struct qed_ptt *p_ptt, 3461c965db44STomer Tayar enum block_id block_id, 3462c965db44STomer Tayar u8 line_id, 3463c965db44STomer Tayar u8 cycle_en, 3464c965db44STomer Tayar u8 right_shift, u8 force_valid, u8 force_frame) 3465c965db44STomer Tayar { 3466c965db44STomer Tayar struct block_defs *p_block_defs = s_block_defs[block_id]; 3467c965db44STomer Tayar 3468c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, p_block_defs->dbg_select_addr, line_id); 3469c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, p_block_defs->dbg_cycle_enable_addr, cycle_en); 3470c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, p_block_defs->dbg_shift_addr, right_shift); 3471c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, p_block_defs->dbg_force_valid_addr, force_valid); 3472c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, p_block_defs->dbg_force_frame_addr, force_frame); 3473c965db44STomer Tayar } 3474c965db44STomer Tayar 3475c965db44STomer Tayar /* Dumps Static Debug data. Returns the dumped size in dwords. */ 3476c965db44STomer Tayar static u32 qed_grc_dump_static_debug(struct qed_hwfn *p_hwfn, 3477c965db44STomer Tayar struct qed_ptt *p_ptt, 3478c965db44STomer Tayar u32 *dump_buf, bool dump) 3479c965db44STomer Tayar { 3480c965db44STomer Tayar u32 block_dwords = NUM_DBG_BUS_LINES * STATIC_DEBUG_LINE_DWORDS; 3481c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 3482be086e7cSMintz, Yuval u32 offset = 0, block_id, line_id; 3483c965db44STomer Tayar struct block_defs *p_block_defs; 3484c965db44STomer Tayar 3485c965db44STomer Tayar if (dump) { 3486c965db44STomer Tayar DP_VERBOSE(p_hwfn, 3487c965db44STomer Tayar QED_MSG_DEBUG, "Dumping static debug data...\n"); 3488c965db44STomer Tayar 3489c965db44STomer Tayar /* Disable all blocks debug output */ 3490c965db44STomer Tayar for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { 3491c965db44STomer Tayar p_block_defs = s_block_defs[block_id]; 3492c965db44STomer Tayar 3493c965db44STomer Tayar if (p_block_defs->has_dbg_bus[dev_data->chip_id]) 3494c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, 3495c965db44STomer Tayar p_block_defs->dbg_cycle_enable_addr, 0); 3496c965db44STomer Tayar } 3497c965db44STomer Tayar 3498c965db44STomer Tayar qed_bus_reset_dbg_block(p_hwfn, p_ptt); 3499c965db44STomer Tayar qed_bus_set_framing_mode(p_hwfn, 3500c965db44STomer Tayar p_ptt, DBG_BUS_FRAME_MODE_8HW_0ST); 3501c965db44STomer Tayar qed_wr(p_hwfn, 3502c965db44STomer Tayar p_ptt, DBG_REG_DEBUG_TARGET, DBG_BUS_TARGET_ID_INT_BUF); 3503c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, DBG_REG_FULL_MODE, 1); 3504c965db44STomer Tayar qed_bus_enable_dbg_block(p_hwfn, p_ptt, true); 3505c965db44STomer Tayar } 3506c965db44STomer Tayar 3507c965db44STomer Tayar /* Dump all static debug lines for each relevant block */ 3508c965db44STomer Tayar for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { 3509c965db44STomer Tayar p_block_defs = s_block_defs[block_id]; 3510c965db44STomer Tayar 3511c965db44STomer Tayar if (!p_block_defs->has_dbg_bus[dev_data->chip_id]) 3512c965db44STomer Tayar continue; 3513c965db44STomer Tayar 3514c965db44STomer Tayar /* Dump static section params */ 3515c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3516c965db44STomer Tayar dump_buf + offset, 3517c965db44STomer Tayar dump, 3518c965db44STomer Tayar p_block_defs->name, 0, 3519c965db44STomer Tayar block_dwords, 32, false, 3520c965db44STomer Tayar "STATIC", false, 0); 3521c965db44STomer Tayar 3522c965db44STomer Tayar if (dump && !dev_data->block_in_reset[block_id]) { 3523c965db44STomer Tayar u8 dbg_client_id = 3524c965db44STomer Tayar p_block_defs->dbg_client_id[dev_data->chip_id]; 3525be086e7cSMintz, Yuval u32 addr = BYTES_TO_DWORDS(DBG_REG_CALENDAR_OUT_DATA); 3526be086e7cSMintz, Yuval u32 len = STATIC_DEBUG_LINE_DWORDS; 3527c965db44STomer Tayar 3528c965db44STomer Tayar /* Enable block's client */ 3529c965db44STomer Tayar qed_bus_enable_clients(p_hwfn, p_ptt, 3530c965db44STomer Tayar BIT(dbg_client_id)); 3531c965db44STomer Tayar 3532c965db44STomer Tayar for (line_id = 0; line_id < NUM_DBG_BUS_LINES; 3533c965db44STomer Tayar line_id++) { 3534c965db44STomer Tayar /* Configure debug line ID */ 3535c965db44STomer Tayar qed_config_dbg_line(p_hwfn, 3536c965db44STomer Tayar p_ptt, 3537c965db44STomer Tayar (enum block_id)block_id, 3538c965db44STomer Tayar (u8)line_id, 3539c965db44STomer Tayar 0xf, 0, 0, 0); 3540c965db44STomer Tayar 3541c965db44STomer Tayar /* Read debug line info */ 3542be086e7cSMintz, Yuval offset += 3543be086e7cSMintz, Yuval qed_grc_dump_addr_range(p_hwfn, 3544be086e7cSMintz, Yuval p_ptt, 3545be086e7cSMintz, Yuval dump_buf + offset, 3546be086e7cSMintz, Yuval dump, 3547be086e7cSMintz, Yuval addr, 3548be086e7cSMintz, Yuval len); 3549c965db44STomer Tayar } 3550c965db44STomer Tayar 3551c965db44STomer Tayar /* Disable block's client and debug output */ 3552c965db44STomer Tayar qed_bus_enable_clients(p_hwfn, p_ptt, 0); 3553c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, 3554c965db44STomer Tayar p_block_defs->dbg_cycle_enable_addr, 0); 3555c965db44STomer Tayar } else { 3556c965db44STomer Tayar /* All lines are invalid - dump zeros */ 3557c965db44STomer Tayar if (dump) 3558c965db44STomer Tayar memset(dump_buf + offset, 0, 3559c965db44STomer Tayar DWORDS_TO_BYTES(block_dwords)); 3560c965db44STomer Tayar offset += block_dwords; 3561c965db44STomer Tayar } 3562c965db44STomer Tayar } 3563c965db44STomer Tayar 3564c965db44STomer Tayar if (dump) { 3565c965db44STomer Tayar qed_bus_enable_dbg_block(p_hwfn, p_ptt, false); 3566c965db44STomer Tayar qed_bus_enable_clients(p_hwfn, p_ptt, 0); 3567c965db44STomer Tayar } 3568c965db44STomer Tayar 3569c965db44STomer Tayar return offset; 3570c965db44STomer Tayar } 3571c965db44STomer Tayar 3572c965db44STomer Tayar /* Performs GRC Dump to the specified buffer. 3573c965db44STomer Tayar * Returns the dumped size in dwords. 3574c965db44STomer Tayar */ 3575c965db44STomer Tayar static enum dbg_status qed_grc_dump(struct qed_hwfn *p_hwfn, 3576c965db44STomer Tayar struct qed_ptt *p_ptt, 3577c965db44STomer Tayar u32 *dump_buf, 3578c965db44STomer Tayar bool dump, u32 *num_dumped_dwords) 3579c965db44STomer Tayar { 3580c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 3581c965db44STomer Tayar bool parities_masked = false; 3582c965db44STomer Tayar u8 i, port_mode = 0; 3583c965db44STomer Tayar u32 offset = 0; 3584c965db44STomer Tayar 3585c965db44STomer Tayar *num_dumped_dwords = 0; 3586c965db44STomer Tayar 3587c965db44STomer Tayar /* Find port mode */ 3588c965db44STomer Tayar if (dump) { 3589c965db44STomer Tayar switch (qed_rd(p_hwfn, p_ptt, MISC_REG_PORT_MODE)) { 3590c965db44STomer Tayar case 0: 3591c965db44STomer Tayar port_mode = 1; 3592c965db44STomer Tayar break; 3593c965db44STomer Tayar case 1: 3594c965db44STomer Tayar port_mode = 2; 3595c965db44STomer Tayar break; 3596c965db44STomer Tayar case 2: 3597c965db44STomer Tayar port_mode = 4; 3598c965db44STomer Tayar break; 3599c965db44STomer Tayar } 3600c965db44STomer Tayar } 3601c965db44STomer Tayar 3602c965db44STomer Tayar /* Update reset state */ 3603c965db44STomer Tayar if (dump) 3604c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 3605c965db44STomer Tayar 3606c965db44STomer Tayar /* Dump global params */ 3607c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 3608c965db44STomer Tayar p_ptt, 3609c965db44STomer Tayar dump_buf + offset, dump, 4); 3610c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 3611c965db44STomer Tayar dump, "dump-type", "grc-dump"); 3612c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 3613c965db44STomer Tayar dump, 3614c965db44STomer Tayar "num-lcids", 3615c965db44STomer Tayar qed_grc_get_param(p_hwfn, 3616c965db44STomer Tayar DBG_GRC_PARAM_NUM_LCIDS)); 3617c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 3618c965db44STomer Tayar dump, 3619c965db44STomer Tayar "num-ltids", 3620c965db44STomer Tayar qed_grc_get_param(p_hwfn, 3621c965db44STomer Tayar DBG_GRC_PARAM_NUM_LTIDS)); 3622c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 3623c965db44STomer Tayar dump, "num-ports", port_mode); 3624c965db44STomer Tayar 3625c965db44STomer Tayar /* Dump reset registers (dumped before taking blocks out of reset ) */ 3626c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_REGS)) 3627c965db44STomer Tayar offset += qed_grc_dump_reset_regs(p_hwfn, 3628c965db44STomer Tayar p_ptt, 3629c965db44STomer Tayar dump_buf + offset, dump); 3630c965db44STomer Tayar 3631c965db44STomer Tayar /* Take all blocks out of reset (using reset registers) */ 3632c965db44STomer Tayar if (dump) { 3633c965db44STomer Tayar qed_grc_unreset_blocks(p_hwfn, p_ptt); 3634c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 3635c965db44STomer Tayar } 3636c965db44STomer Tayar 3637c965db44STomer Tayar /* Disable all parities using MFW command */ 3638be086e7cSMintz, Yuval if (dump && !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP)) { 3639c965db44STomer Tayar parities_masked = !qed_mcp_mask_parities(p_hwfn, p_ptt, 1); 3640c965db44STomer Tayar if (!parities_masked) { 3641be086e7cSMintz, Yuval DP_NOTICE(p_hwfn, 3642be086e7cSMintz, Yuval "Failed to mask parities using MFW\n"); 3643c965db44STomer Tayar if (qed_grc_get_param 3644c965db44STomer Tayar (p_hwfn, DBG_GRC_PARAM_PARITY_SAFE)) 3645c965db44STomer Tayar return DBG_STATUS_MCP_COULD_NOT_MASK_PRTY; 3646c965db44STomer Tayar } 3647c965db44STomer Tayar } 3648c965db44STomer Tayar 3649c965db44STomer Tayar /* Dump modified registers (dumped before modifying them) */ 3650c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_REGS)) 3651c965db44STomer Tayar offset += qed_grc_dump_modified_regs(p_hwfn, 3652c965db44STomer Tayar p_ptt, 3653c965db44STomer Tayar dump_buf + offset, dump); 3654c965db44STomer Tayar 3655c965db44STomer Tayar /* Stall storms */ 3656c965db44STomer Tayar if (dump && 3657c965db44STomer Tayar (qed_grc_is_included(p_hwfn, 3658c965db44STomer Tayar DBG_GRC_PARAM_DUMP_IOR) || 3659c965db44STomer Tayar qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_VFC))) 3660c965db44STomer Tayar qed_grc_stall_storms(p_hwfn, p_ptt, true); 3661c965db44STomer Tayar 3662c965db44STomer Tayar /* Dump all regs */ 3663c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_REGS)) { 3664c965db44STomer Tayar /* Dump all blocks except MCP */ 3665c965db44STomer Tayar bool block_enable[MAX_BLOCK_ID]; 3666c965db44STomer Tayar 3667c965db44STomer Tayar for (i = 0; i < MAX_BLOCK_ID; i++) 3668c965db44STomer Tayar block_enable[i] = true; 3669c965db44STomer Tayar block_enable[BLOCK_MCP] = false; 3670c965db44STomer Tayar offset += qed_grc_dump_registers(p_hwfn, 3671c965db44STomer Tayar p_ptt, 3672c965db44STomer Tayar dump_buf + 3673c965db44STomer Tayar offset, 3674c965db44STomer Tayar dump, 3675c965db44STomer Tayar block_enable, NULL, NULL); 3676be086e7cSMintz, Yuval 3677be086e7cSMintz, Yuval /* Dump special registers */ 3678be086e7cSMintz, Yuval offset += qed_grc_dump_special_regs(p_hwfn, 3679be086e7cSMintz, Yuval p_ptt, 3680be086e7cSMintz, Yuval dump_buf + offset, dump); 3681c965db44STomer Tayar } 3682c965db44STomer Tayar 3683c965db44STomer Tayar /* Dump memories */ 3684c965db44STomer Tayar offset += qed_grc_dump_memories(p_hwfn, p_ptt, dump_buf + offset, dump); 3685c965db44STomer Tayar 3686c965db44STomer Tayar /* Dump MCP */ 3687c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_MCP)) 3688c965db44STomer Tayar offset += qed_grc_dump_mcp(p_hwfn, 3689c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 3690c965db44STomer Tayar 3691c965db44STomer Tayar /* Dump context */ 3692c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CM_CTX)) 3693c965db44STomer Tayar offset += qed_grc_dump_ctx(p_hwfn, 3694c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 3695c965db44STomer Tayar 3696c965db44STomer Tayar /* Dump RSS memories */ 3697c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_RSS)) 3698c965db44STomer Tayar offset += qed_grc_dump_rss(p_hwfn, 3699c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 3700c965db44STomer Tayar 3701c965db44STomer Tayar /* Dump Big RAM */ 3702c965db44STomer Tayar for (i = 0; i < NUM_BIG_RAM_TYPES; i++) 3703c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, s_big_ram_defs[i].grc_param)) 3704c965db44STomer Tayar offset += qed_grc_dump_big_ram(p_hwfn, 3705c965db44STomer Tayar p_ptt, 3706c965db44STomer Tayar dump_buf + offset, 3707c965db44STomer Tayar dump, i); 3708c965db44STomer Tayar 3709c965db44STomer Tayar /* Dump IORs */ 3710c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_IOR)) 3711c965db44STomer Tayar offset += qed_grc_dump_iors(p_hwfn, 3712c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 3713c965db44STomer Tayar 3714c965db44STomer Tayar /* Dump VFC */ 3715c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_VFC)) 3716c965db44STomer Tayar offset += qed_grc_dump_vfc(p_hwfn, 3717c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 3718c965db44STomer Tayar 3719c965db44STomer Tayar /* Dump PHY tbus */ 3720c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, 3721c965db44STomer Tayar DBG_GRC_PARAM_DUMP_PHY) && dev_data->chip_id == 3722c965db44STomer Tayar CHIP_K2 && dev_data->platform_id == PLATFORM_ASIC) 3723c965db44STomer Tayar offset += qed_grc_dump_phy(p_hwfn, 3724c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 3725c965db44STomer Tayar 3726c965db44STomer Tayar /* Dump static debug data */ 3727c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, 3728c965db44STomer Tayar DBG_GRC_PARAM_DUMP_STATIC) && 3729c965db44STomer Tayar dev_data->bus.state == DBG_BUS_STATE_IDLE) 3730c965db44STomer Tayar offset += qed_grc_dump_static_debug(p_hwfn, 3731c965db44STomer Tayar p_ptt, 3732c965db44STomer Tayar dump_buf + offset, dump); 3733c965db44STomer Tayar 3734c965db44STomer Tayar /* Dump last section */ 3735c965db44STomer Tayar offset += qed_dump_last_section(dump_buf, offset, dump); 3736c965db44STomer Tayar if (dump) { 3737c965db44STomer Tayar /* Unstall storms */ 3738c965db44STomer Tayar if (qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_UNSTALL)) 3739c965db44STomer Tayar qed_grc_stall_storms(p_hwfn, p_ptt, false); 3740c965db44STomer Tayar 3741c965db44STomer Tayar /* Clear parity status */ 3742c965db44STomer Tayar qed_grc_clear_all_prty(p_hwfn, p_ptt); 3743c965db44STomer Tayar 3744c965db44STomer Tayar /* Enable all parities using MFW command */ 3745c965db44STomer Tayar if (parities_masked) 3746c965db44STomer Tayar qed_mcp_mask_parities(p_hwfn, p_ptt, 0); 3747c965db44STomer Tayar } 3748c965db44STomer Tayar 3749c965db44STomer Tayar *num_dumped_dwords = offset; 3750c965db44STomer Tayar 3751c965db44STomer Tayar return DBG_STATUS_OK; 3752c965db44STomer Tayar } 3753c965db44STomer Tayar 3754c965db44STomer Tayar /* Writes the specified failing Idle Check rule to the specified buffer. 3755c965db44STomer Tayar * Returns the dumped size in dwords. 3756c965db44STomer Tayar */ 3757c965db44STomer Tayar static u32 qed_idle_chk_dump_failure(struct qed_hwfn *p_hwfn, 3758c965db44STomer Tayar struct qed_ptt *p_ptt, 3759c965db44STomer Tayar u32 * 3760c965db44STomer Tayar dump_buf, 3761c965db44STomer Tayar bool dump, 3762c965db44STomer Tayar u16 rule_id, 3763c965db44STomer Tayar const struct dbg_idle_chk_rule *rule, 3764c965db44STomer Tayar u16 fail_entry_id, u32 *cond_reg_values) 3765c965db44STomer Tayar { 3766c965db44STomer Tayar const union dbg_idle_chk_reg *regs = &((const union dbg_idle_chk_reg *) 3767c965db44STomer Tayar s_dbg_arrays 3768c965db44STomer Tayar [BIN_BUF_DBG_IDLE_CHK_REGS]. 3769c965db44STomer Tayar ptr)[rule->reg_offset]; 3770c965db44STomer Tayar const struct dbg_idle_chk_cond_reg *cond_regs = ®s[0].cond_reg; 3771c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 3772c965db44STomer Tayar struct dbg_idle_chk_result_hdr *hdr = 3773c965db44STomer Tayar (struct dbg_idle_chk_result_hdr *)dump_buf; 3774c965db44STomer Tayar const struct dbg_idle_chk_info_reg *info_regs = 3775c965db44STomer Tayar ®s[rule->num_cond_regs].info_reg; 3776c965db44STomer Tayar u32 next_reg_offset = 0, i, offset = 0; 3777c965db44STomer Tayar u8 reg_id; 3778c965db44STomer Tayar 3779c965db44STomer Tayar /* Dump rule data */ 3780c965db44STomer Tayar if (dump) { 3781c965db44STomer Tayar memset(hdr, 0, sizeof(*hdr)); 3782c965db44STomer Tayar hdr->rule_id = rule_id; 3783c965db44STomer Tayar hdr->mem_entry_id = fail_entry_id; 3784c965db44STomer Tayar hdr->severity = rule->severity; 3785c965db44STomer Tayar hdr->num_dumped_cond_regs = rule->num_cond_regs; 3786c965db44STomer Tayar } 3787c965db44STomer Tayar 3788c965db44STomer Tayar offset += IDLE_CHK_RESULT_HDR_DWORDS; 3789c965db44STomer Tayar 3790c965db44STomer Tayar /* Dump condition register values */ 3791c965db44STomer Tayar for (reg_id = 0; reg_id < rule->num_cond_regs; reg_id++) { 3792c965db44STomer Tayar const struct dbg_idle_chk_cond_reg *reg = &cond_regs[reg_id]; 3793c965db44STomer Tayar 3794c965db44STomer Tayar /* Write register header */ 3795c965db44STomer Tayar if (dump) { 3796c965db44STomer Tayar struct dbg_idle_chk_result_reg_hdr *reg_hdr = 3797c965db44STomer Tayar (struct dbg_idle_chk_result_reg_hdr *)(dump_buf 3798c965db44STomer Tayar + offset); 3799c965db44STomer Tayar offset += IDLE_CHK_RESULT_REG_HDR_DWORDS; 3800c965db44STomer Tayar memset(reg_hdr, 0, 3801c965db44STomer Tayar sizeof(struct dbg_idle_chk_result_reg_hdr)); 3802c965db44STomer Tayar reg_hdr->start_entry = reg->start_entry; 3803c965db44STomer Tayar reg_hdr->size = reg->entry_size; 3804c965db44STomer Tayar SET_FIELD(reg_hdr->data, 3805c965db44STomer Tayar DBG_IDLE_CHK_RESULT_REG_HDR_IS_MEM, 3806c965db44STomer Tayar reg->num_entries > 1 || reg->start_entry > 0 3807c965db44STomer Tayar ? 1 : 0); 3808c965db44STomer Tayar SET_FIELD(reg_hdr->data, 3809c965db44STomer Tayar DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID, reg_id); 3810c965db44STomer Tayar 3811c965db44STomer Tayar /* Write register values */ 3812c965db44STomer Tayar for (i = 0; i < reg_hdr->size; 3813c965db44STomer Tayar i++, next_reg_offset++, offset++) 3814c965db44STomer Tayar dump_buf[offset] = 3815c965db44STomer Tayar cond_reg_values[next_reg_offset]; 3816c965db44STomer Tayar } else { 3817c965db44STomer Tayar offset += IDLE_CHK_RESULT_REG_HDR_DWORDS + 3818c965db44STomer Tayar reg->entry_size; 3819c965db44STomer Tayar } 3820c965db44STomer Tayar } 3821c965db44STomer Tayar 3822c965db44STomer Tayar /* Dump info register values */ 3823c965db44STomer Tayar for (reg_id = 0; reg_id < rule->num_info_regs; reg_id++) { 3824c965db44STomer Tayar const struct dbg_idle_chk_info_reg *reg = &info_regs[reg_id]; 3825c965db44STomer Tayar u32 block_id; 3826c965db44STomer Tayar 3827c965db44STomer Tayar if (!dump) { 3828c965db44STomer Tayar offset += IDLE_CHK_RESULT_REG_HDR_DWORDS + reg->size; 3829c965db44STomer Tayar continue; 3830c965db44STomer Tayar } 3831c965db44STomer Tayar 3832c965db44STomer Tayar /* Check if register's block is in reset */ 3833c965db44STomer Tayar block_id = GET_FIELD(reg->data, DBG_IDLE_CHK_INFO_REG_BLOCK_ID); 3834c965db44STomer Tayar if (block_id >= MAX_BLOCK_ID) { 3835c965db44STomer Tayar DP_NOTICE(p_hwfn, "Invalid block_id\n"); 3836c965db44STomer Tayar return 0; 3837c965db44STomer Tayar } 3838c965db44STomer Tayar 3839c965db44STomer Tayar if (!dev_data->block_in_reset[block_id]) { 3840c965db44STomer Tayar bool eval_mode = GET_FIELD(reg->mode.data, 3841c965db44STomer Tayar DBG_MODE_HDR_EVAL_MODE) > 0; 3842c965db44STomer Tayar bool mode_match = true; 3843c965db44STomer Tayar 3844c965db44STomer Tayar /* Check mode */ 3845c965db44STomer Tayar if (eval_mode) { 3846c965db44STomer Tayar u16 modes_buf_offset = 3847c965db44STomer Tayar GET_FIELD(reg->mode.data, 3848c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 3849c965db44STomer Tayar mode_match = 3850c965db44STomer Tayar qed_is_mode_match(p_hwfn, 3851c965db44STomer Tayar &modes_buf_offset); 3852c965db44STomer Tayar } 3853c965db44STomer Tayar 3854c965db44STomer Tayar if (mode_match) { 3855be086e7cSMintz, Yuval u32 addr = 3856be086e7cSMintz, Yuval GET_FIELD(reg->data, 3857be086e7cSMintz, Yuval DBG_IDLE_CHK_INFO_REG_ADDRESS); 3858c965db44STomer Tayar 3859c965db44STomer Tayar /* Write register header */ 3860c965db44STomer Tayar struct dbg_idle_chk_result_reg_hdr *reg_hdr = 3861c965db44STomer Tayar (struct dbg_idle_chk_result_reg_hdr *) 3862c965db44STomer Tayar (dump_buf + offset); 3863c965db44STomer Tayar 3864c965db44STomer Tayar offset += IDLE_CHK_RESULT_REG_HDR_DWORDS; 3865c965db44STomer Tayar hdr->num_dumped_info_regs++; 3866c965db44STomer Tayar memset(reg_hdr, 0, sizeof(*reg_hdr)); 3867c965db44STomer Tayar reg_hdr->size = reg->size; 3868c965db44STomer Tayar SET_FIELD(reg_hdr->data, 3869c965db44STomer Tayar DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID, 3870c965db44STomer Tayar rule->num_cond_regs + reg_id); 3871c965db44STomer Tayar 3872c965db44STomer Tayar /* Write register values */ 3873be086e7cSMintz, Yuval offset += 3874be086e7cSMintz, Yuval qed_grc_dump_addr_range(p_hwfn, 3875be086e7cSMintz, Yuval p_ptt, 3876be086e7cSMintz, Yuval dump_buf + offset, 3877be086e7cSMintz, Yuval dump, 3878be086e7cSMintz, Yuval addr, 3879be086e7cSMintz, Yuval reg->size); 3880c965db44STomer Tayar } 3881c965db44STomer Tayar } 3882c965db44STomer Tayar } 3883c965db44STomer Tayar 3884c965db44STomer Tayar return offset; 3885c965db44STomer Tayar } 3886c965db44STomer Tayar 3887c965db44STomer Tayar /* Dumps idle check rule entries. Returns the dumped size in dwords. */ 3888c965db44STomer Tayar static u32 3889c965db44STomer Tayar qed_idle_chk_dump_rule_entries(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 3890c965db44STomer Tayar u32 *dump_buf, bool dump, 3891c965db44STomer Tayar const struct dbg_idle_chk_rule *input_rules, 3892c965db44STomer Tayar u32 num_input_rules, u32 *num_failing_rules) 3893c965db44STomer Tayar { 3894c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 3895c965db44STomer Tayar u32 cond_reg_values[IDLE_CHK_MAX_ENTRIES_SIZE]; 3896be086e7cSMintz, Yuval u32 i, offset = 0; 3897c965db44STomer Tayar u16 entry_id; 3898c965db44STomer Tayar u8 reg_id; 3899c965db44STomer Tayar 3900c965db44STomer Tayar *num_failing_rules = 0; 3901c965db44STomer Tayar for (i = 0; i < num_input_rules; i++) { 3902c965db44STomer Tayar const struct dbg_idle_chk_cond_reg *cond_regs; 3903c965db44STomer Tayar const struct dbg_idle_chk_rule *rule; 3904c965db44STomer Tayar const union dbg_idle_chk_reg *regs; 3905c965db44STomer Tayar u16 num_reg_entries = 1; 3906c965db44STomer Tayar bool check_rule = true; 3907c965db44STomer Tayar const u32 *imm_values; 3908c965db44STomer Tayar 3909c965db44STomer Tayar rule = &input_rules[i]; 3910c965db44STomer Tayar regs = &((const union dbg_idle_chk_reg *) 3911c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr) 3912c965db44STomer Tayar [rule->reg_offset]; 3913c965db44STomer Tayar cond_regs = ®s[0].cond_reg; 3914c965db44STomer Tayar imm_values = &s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_IMMS].ptr 3915c965db44STomer Tayar [rule->imm_offset]; 3916c965db44STomer Tayar 3917c965db44STomer Tayar /* Check if all condition register blocks are out of reset, and 3918c965db44STomer Tayar * find maximal number of entries (all condition registers that 3919c965db44STomer Tayar * are memories must have the same size, which is > 1). 3920c965db44STomer Tayar */ 3921c965db44STomer Tayar for (reg_id = 0; reg_id < rule->num_cond_regs && check_rule; 3922c965db44STomer Tayar reg_id++) { 3923c965db44STomer Tayar u32 block_id = GET_FIELD(cond_regs[reg_id].data, 3924c965db44STomer Tayar DBG_IDLE_CHK_COND_REG_BLOCK_ID); 3925c965db44STomer Tayar 3926c965db44STomer Tayar if (block_id >= MAX_BLOCK_ID) { 3927c965db44STomer Tayar DP_NOTICE(p_hwfn, "Invalid block_id\n"); 3928c965db44STomer Tayar return 0; 3929c965db44STomer Tayar } 3930c965db44STomer Tayar 3931c965db44STomer Tayar check_rule = !dev_data->block_in_reset[block_id]; 3932c965db44STomer Tayar if (cond_regs[reg_id].num_entries > num_reg_entries) 3933c965db44STomer Tayar num_reg_entries = cond_regs[reg_id].num_entries; 3934c965db44STomer Tayar } 3935c965db44STomer Tayar 3936c965db44STomer Tayar if (!check_rule && dump) 3937c965db44STomer Tayar continue; 3938c965db44STomer Tayar 3939be086e7cSMintz, Yuval if (!dump) { 3940be086e7cSMintz, Yuval u32 entry_dump_size = 3941be086e7cSMintz, Yuval qed_idle_chk_dump_failure(p_hwfn, 3942be086e7cSMintz, Yuval p_ptt, 3943be086e7cSMintz, Yuval dump_buf + offset, 3944be086e7cSMintz, Yuval false, 3945be086e7cSMintz, Yuval rule->rule_id, 3946be086e7cSMintz, Yuval rule, 3947be086e7cSMintz, Yuval 0, 3948be086e7cSMintz, Yuval NULL); 3949be086e7cSMintz, Yuval 3950be086e7cSMintz, Yuval offset += num_reg_entries * entry_dump_size; 3951be086e7cSMintz, Yuval (*num_failing_rules) += num_reg_entries; 3952be086e7cSMintz, Yuval continue; 3953be086e7cSMintz, Yuval } 3954be086e7cSMintz, Yuval 3955c965db44STomer Tayar /* Go over all register entries (number of entries is the same 3956c965db44STomer Tayar * for all condition registers). 3957c965db44STomer Tayar */ 3958c965db44STomer Tayar for (entry_id = 0; entry_id < num_reg_entries; entry_id++) { 3959c965db44STomer Tayar /* Read current entry of all condition registers */ 3960c965db44STomer Tayar u32 next_reg_offset = 0; 3961c965db44STomer Tayar 3962be086e7cSMintz, Yuval for (reg_id = 0; reg_id < rule->num_cond_regs; 3963c965db44STomer Tayar reg_id++) { 3964be086e7cSMintz, Yuval const struct dbg_idle_chk_cond_reg *reg = 3965be086e7cSMintz, Yuval &cond_regs[reg_id]; 3966c965db44STomer Tayar 3967be086e7cSMintz, Yuval /* Find GRC address (if it's a memory,the 3968be086e7cSMintz, Yuval * address of the specific entry is calculated). 3969c965db44STomer Tayar */ 3970be086e7cSMintz, Yuval u32 addr = 3971c965db44STomer Tayar GET_FIELD(reg->data, 3972be086e7cSMintz, Yuval DBG_IDLE_CHK_COND_REG_ADDRESS); 3973c965db44STomer Tayar 3974c965db44STomer Tayar if (reg->num_entries > 1 || 3975c965db44STomer Tayar reg->start_entry > 0) { 3976c965db44STomer Tayar u32 padded_entry_size = 3977c965db44STomer Tayar reg->entry_size > 1 ? 3978be086e7cSMintz, Yuval roundup_pow_of_two(reg->entry_size) : 3979be086e7cSMintz, Yuval 1; 3980c965db44STomer Tayar 3981be086e7cSMintz, Yuval addr += (reg->start_entry + entry_id) * 3982be086e7cSMintz, Yuval padded_entry_size; 3983c965db44STomer Tayar } 3984c965db44STomer Tayar 3985c965db44STomer Tayar /* Read registers */ 3986c965db44STomer Tayar if (next_reg_offset + reg->entry_size >= 3987c965db44STomer Tayar IDLE_CHK_MAX_ENTRIES_SIZE) { 3988c965db44STomer Tayar DP_NOTICE(p_hwfn, 3989c965db44STomer Tayar "idle check registers entry is too large\n"); 3990c965db44STomer Tayar return 0; 3991c965db44STomer Tayar } 3992c965db44STomer Tayar 3993be086e7cSMintz, Yuval next_reg_offset += 3994be086e7cSMintz, Yuval qed_grc_dump_addr_range(p_hwfn, 3995be086e7cSMintz, Yuval p_ptt, 3996be086e7cSMintz, Yuval cond_reg_values + 3997be086e7cSMintz, Yuval next_reg_offset, 3998be086e7cSMintz, Yuval dump, addr, 3999be086e7cSMintz, Yuval reg->entry_size); 4000c965db44STomer Tayar } 4001c965db44STomer Tayar 4002c965db44STomer Tayar /* Call rule's condition function - a return value of 4003c965db44STomer Tayar * true indicates failure. 4004c965db44STomer Tayar */ 4005c965db44STomer Tayar if ((*cond_arr[rule->cond_id])(cond_reg_values, 4006be086e7cSMintz, Yuval imm_values)) { 4007c965db44STomer Tayar offset += 4008c965db44STomer Tayar qed_idle_chk_dump_failure(p_hwfn, 4009c965db44STomer Tayar p_ptt, 4010c965db44STomer Tayar dump_buf + offset, 4011c965db44STomer Tayar dump, 4012c965db44STomer Tayar rule->rule_id, 4013c965db44STomer Tayar rule, 4014c965db44STomer Tayar entry_id, 4015c965db44STomer Tayar cond_reg_values); 4016c965db44STomer Tayar (*num_failing_rules)++; 4017c965db44STomer Tayar break; 4018c965db44STomer Tayar } 4019c965db44STomer Tayar } 4020c965db44STomer Tayar } 4021c965db44STomer Tayar 4022c965db44STomer Tayar return offset; 4023c965db44STomer Tayar } 4024c965db44STomer Tayar 4025c965db44STomer Tayar /* Performs Idle Check Dump to the specified buffer. 4026c965db44STomer Tayar * Returns the dumped size in dwords. 4027c965db44STomer Tayar */ 4028c965db44STomer Tayar static u32 qed_idle_chk_dump(struct qed_hwfn *p_hwfn, 4029c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 4030c965db44STomer Tayar { 4031c965db44STomer Tayar u32 offset = 0, input_offset = 0, num_failing_rules = 0; 4032c965db44STomer Tayar u32 num_failing_rules_offset; 4033c965db44STomer Tayar 4034c965db44STomer Tayar /* Dump global params */ 4035c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4036c965db44STomer Tayar p_ptt, 4037c965db44STomer Tayar dump_buf + offset, dump, 1); 4038c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4039c965db44STomer Tayar dump, "dump-type", "idle-chk"); 4040c965db44STomer Tayar 4041c965db44STomer Tayar /* Dump idle check section header with a single parameter */ 4042c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, dump, "idle_chk", 1); 4043c965db44STomer Tayar num_failing_rules_offset = offset; 4044c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, dump, "num_rules", 0); 4045c965db44STomer Tayar while (input_offset < 4046c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES].size_in_dwords) { 4047c965db44STomer Tayar const struct dbg_idle_chk_cond_hdr *cond_hdr = 4048c965db44STomer Tayar (const struct dbg_idle_chk_cond_hdr *) 4049c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES].ptr 4050c965db44STomer Tayar [input_offset++]; 4051c965db44STomer Tayar bool eval_mode = GET_FIELD(cond_hdr->mode.data, 4052c965db44STomer Tayar DBG_MODE_HDR_EVAL_MODE) > 0; 4053c965db44STomer Tayar bool mode_match = true; 4054c965db44STomer Tayar 4055c965db44STomer Tayar /* Check mode */ 4056c965db44STomer Tayar if (eval_mode) { 4057c965db44STomer Tayar u16 modes_buf_offset = 4058c965db44STomer Tayar GET_FIELD(cond_hdr->mode.data, 4059c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 4060c965db44STomer Tayar 4061c965db44STomer Tayar mode_match = qed_is_mode_match(p_hwfn, 4062c965db44STomer Tayar &modes_buf_offset); 4063c965db44STomer Tayar } 4064c965db44STomer Tayar 4065c965db44STomer Tayar if (mode_match) { 4066c965db44STomer Tayar u32 curr_failing_rules; 4067c965db44STomer Tayar 4068c965db44STomer Tayar offset += 4069c965db44STomer Tayar qed_idle_chk_dump_rule_entries(p_hwfn, 4070c965db44STomer Tayar p_ptt, 4071c965db44STomer Tayar dump_buf + offset, 4072c965db44STomer Tayar dump, 4073c965db44STomer Tayar (const struct dbg_idle_chk_rule *) 4074c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES]. 4075c965db44STomer Tayar ptr[input_offset], 4076c965db44STomer Tayar cond_hdr->data_size / IDLE_CHK_RULE_SIZE_DWORDS, 4077c965db44STomer Tayar &curr_failing_rules); 4078c965db44STomer Tayar num_failing_rules += curr_failing_rules; 4079c965db44STomer Tayar } 4080c965db44STomer Tayar 4081c965db44STomer Tayar input_offset += cond_hdr->data_size; 4082c965db44STomer Tayar } 4083c965db44STomer Tayar 4084c965db44STomer Tayar /* Overwrite num_rules parameter */ 4085c965db44STomer Tayar if (dump) 4086c965db44STomer Tayar qed_dump_num_param(dump_buf + num_failing_rules_offset, 4087c965db44STomer Tayar dump, "num_rules", num_failing_rules); 4088c965db44STomer Tayar 4089c965db44STomer Tayar return offset; 4090c965db44STomer Tayar } 4091c965db44STomer Tayar 4092c965db44STomer Tayar /* Finds the meta data image in NVRAM. */ 4093c965db44STomer Tayar static enum dbg_status qed_find_nvram_image(struct qed_hwfn *p_hwfn, 4094c965db44STomer Tayar struct qed_ptt *p_ptt, 4095c965db44STomer Tayar u32 image_type, 4096c965db44STomer Tayar u32 *nvram_offset_bytes, 4097c965db44STomer Tayar u32 *nvram_size_bytes) 4098c965db44STomer Tayar { 4099c965db44STomer Tayar u32 ret_mcp_resp, ret_mcp_param, ret_txn_size; 4100c965db44STomer Tayar struct mcp_file_att file_att; 4101c965db44STomer Tayar 4102c965db44STomer Tayar /* Call NVRAM get file command */ 4103be086e7cSMintz, Yuval int nvm_result = qed_mcp_nvm_rd_cmd(p_hwfn, 4104be086e7cSMintz, Yuval p_ptt, 4105be086e7cSMintz, Yuval DRV_MSG_CODE_NVM_GET_FILE_ATT, 4106be086e7cSMintz, Yuval image_type, 4107be086e7cSMintz, Yuval &ret_mcp_resp, 4108be086e7cSMintz, Yuval &ret_mcp_param, 4109be086e7cSMintz, Yuval &ret_txn_size, 4110be086e7cSMintz, Yuval (u32 *)&file_att); 4111c965db44STomer Tayar 4112c965db44STomer Tayar /* Check response */ 4113be086e7cSMintz, Yuval if (nvm_result || 4114be086e7cSMintz, Yuval (ret_mcp_resp & FW_MSG_CODE_MASK) != FW_MSG_CODE_NVM_OK) 4115c965db44STomer Tayar return DBG_STATUS_NVRAM_GET_IMAGE_FAILED; 4116c965db44STomer Tayar 4117c965db44STomer Tayar /* Update return values */ 4118c965db44STomer Tayar *nvram_offset_bytes = file_att.nvm_start_addr; 4119c965db44STomer Tayar *nvram_size_bytes = file_att.len; 4120c965db44STomer Tayar DP_VERBOSE(p_hwfn, 4121c965db44STomer Tayar QED_MSG_DEBUG, 4122c965db44STomer Tayar "find_nvram_image: found NVRAM image of type %d in NVRAM offset %d bytes with size %d bytes\n", 4123c965db44STomer Tayar image_type, *nvram_offset_bytes, *nvram_size_bytes); 4124c965db44STomer Tayar 4125c965db44STomer Tayar /* Check alignment */ 4126c965db44STomer Tayar if (*nvram_size_bytes & 0x3) 4127c965db44STomer Tayar return DBG_STATUS_NON_ALIGNED_NVRAM_IMAGE; 4128c965db44STomer Tayar return DBG_STATUS_OK; 4129c965db44STomer Tayar } 4130c965db44STomer Tayar 4131c965db44STomer Tayar static enum dbg_status qed_nvram_read(struct qed_hwfn *p_hwfn, 4132c965db44STomer Tayar struct qed_ptt *p_ptt, 4133c965db44STomer Tayar u32 nvram_offset_bytes, 4134c965db44STomer Tayar u32 nvram_size_bytes, u32 *ret_buf) 4135c965db44STomer Tayar { 4136c965db44STomer Tayar u32 ret_mcp_resp, ret_mcp_param, ret_read_size; 4137c965db44STomer Tayar u32 bytes_to_copy, read_offset = 0; 4138c965db44STomer Tayar s32 bytes_left = nvram_size_bytes; 4139c965db44STomer Tayar 4140c965db44STomer Tayar DP_VERBOSE(p_hwfn, 4141c965db44STomer Tayar QED_MSG_DEBUG, 4142c965db44STomer Tayar "nvram_read: reading image of size %d bytes from NVRAM\n", 4143c965db44STomer Tayar nvram_size_bytes); 4144c965db44STomer Tayar do { 4145c965db44STomer Tayar bytes_to_copy = 4146c965db44STomer Tayar (bytes_left > 4147c965db44STomer Tayar MCP_DRV_NVM_BUF_LEN) ? MCP_DRV_NVM_BUF_LEN : bytes_left; 4148c965db44STomer Tayar 4149c965db44STomer Tayar /* Call NVRAM read command */ 4150c965db44STomer Tayar if (qed_mcp_nvm_rd_cmd(p_hwfn, p_ptt, 4151c965db44STomer Tayar DRV_MSG_CODE_NVM_READ_NVRAM, 4152c965db44STomer Tayar (nvram_offset_bytes + 4153c965db44STomer Tayar read_offset) | 4154c965db44STomer Tayar (bytes_to_copy << 4155c965db44STomer Tayar DRV_MB_PARAM_NVM_LEN_SHIFT), 4156c965db44STomer Tayar &ret_mcp_resp, &ret_mcp_param, 4157c965db44STomer Tayar &ret_read_size, 4158c965db44STomer Tayar (u32 *)((u8 *)ret_buf + 4159c965db44STomer Tayar read_offset)) != 0) 4160c965db44STomer Tayar return DBG_STATUS_NVRAM_READ_FAILED; 4161c965db44STomer Tayar 4162c965db44STomer Tayar /* Check response */ 4163c965db44STomer Tayar if ((ret_mcp_resp & FW_MSG_CODE_MASK) != FW_MSG_CODE_NVM_OK) 4164c965db44STomer Tayar return DBG_STATUS_NVRAM_READ_FAILED; 4165c965db44STomer Tayar 4166c965db44STomer Tayar /* Update read offset */ 4167c965db44STomer Tayar read_offset += ret_read_size; 4168c965db44STomer Tayar bytes_left -= ret_read_size; 4169c965db44STomer Tayar } while (bytes_left > 0); 4170c965db44STomer Tayar 4171c965db44STomer Tayar return DBG_STATUS_OK; 4172c965db44STomer Tayar } 4173c965db44STomer Tayar 4174c965db44STomer Tayar /* Get info on the MCP Trace data in the scratchpad: 4175c965db44STomer Tayar * - trace_data_grc_addr - the GRC address of the trace data 4176c965db44STomer Tayar * - trace_data_size_bytes - the size in bytes of the MCP Trace data (without 4177c965db44STomer Tayar * the header) 4178c965db44STomer Tayar */ 4179c965db44STomer Tayar static enum dbg_status qed_mcp_trace_get_data_info(struct qed_hwfn *p_hwfn, 4180c965db44STomer Tayar struct qed_ptt *p_ptt, 4181c965db44STomer Tayar u32 *trace_data_grc_addr, 4182c965db44STomer Tayar u32 *trace_data_size_bytes) 4183c965db44STomer Tayar { 4184c965db44STomer Tayar /* Read MCP trace section offsize structure from MCP scratchpad */ 4185c965db44STomer Tayar u32 spad_trace_offsize = qed_rd(p_hwfn, 4186c965db44STomer Tayar p_ptt, 4187c965db44STomer Tayar MCP_SPAD_TRACE_OFFSIZE_ADDR); 4188c965db44STomer Tayar u32 signature; 4189c965db44STomer Tayar 4190c965db44STomer Tayar /* Extract MCP trace section GRC address from offsize structure (within 4191c965db44STomer Tayar * scratchpad). 4192c965db44STomer Tayar */ 4193c965db44STomer Tayar *trace_data_grc_addr = 4194c965db44STomer Tayar MCP_REG_SCRATCH + SECTION_OFFSET(spad_trace_offsize); 4195c965db44STomer Tayar 4196c965db44STomer Tayar /* Read signature from MCP trace section */ 4197c965db44STomer Tayar signature = qed_rd(p_hwfn, p_ptt, 4198c965db44STomer Tayar *trace_data_grc_addr + 4199c965db44STomer Tayar offsetof(struct mcp_trace, signature)); 4200c965db44STomer Tayar if (signature != MFW_TRACE_SIGNATURE) 4201c965db44STomer Tayar return DBG_STATUS_INVALID_TRACE_SIGNATURE; 4202c965db44STomer Tayar 4203c965db44STomer Tayar /* Read trace size from MCP trace section */ 4204c965db44STomer Tayar *trace_data_size_bytes = qed_rd(p_hwfn, 4205c965db44STomer Tayar p_ptt, 4206c965db44STomer Tayar *trace_data_grc_addr + 4207c965db44STomer Tayar offsetof(struct mcp_trace, size)); 4208c965db44STomer Tayar return DBG_STATUS_OK; 4209c965db44STomer Tayar } 4210c965db44STomer Tayar 4211c965db44STomer Tayar /* Reads MCP trace meta data image from NVRAM. 4212c965db44STomer Tayar * - running_bundle_id (OUT) - the running bundle ID (invalid when loaded from 4213c965db44STomer Tayar * file) 4214c965db44STomer Tayar * - trace_meta_offset_bytes (OUT) - the NVRAM offset in bytes in which the MCP 4215c965db44STomer Tayar * Trace meta data starts (invalid when loaded from file) 4216c965db44STomer Tayar * - trace_meta_size_bytes (OUT) - the size in bytes of the MCP Trace meta data 4217c965db44STomer Tayar */ 4218c965db44STomer Tayar static enum dbg_status qed_mcp_trace_get_meta_info(struct qed_hwfn *p_hwfn, 4219c965db44STomer Tayar struct qed_ptt *p_ptt, 4220c965db44STomer Tayar u32 trace_data_size_bytes, 4221c965db44STomer Tayar u32 *running_bundle_id, 4222c965db44STomer Tayar u32 *trace_meta_offset_bytes, 4223c965db44STomer Tayar u32 *trace_meta_size_bytes) 4224c965db44STomer Tayar { 4225c965db44STomer Tayar /* Read MCP trace section offsize structure from MCP scratchpad */ 4226c965db44STomer Tayar u32 spad_trace_offsize = qed_rd(p_hwfn, 4227c965db44STomer Tayar p_ptt, 4228c965db44STomer Tayar MCP_SPAD_TRACE_OFFSIZE_ADDR); 4229c965db44STomer Tayar 4230c965db44STomer Tayar /* Find running bundle ID */ 4231c965db44STomer Tayar u32 running_mfw_addr = 4232c965db44STomer Tayar MCP_REG_SCRATCH + SECTION_OFFSET(spad_trace_offsize) + 4233c965db44STomer Tayar QED_SECTION_SIZE(spad_trace_offsize) + trace_data_size_bytes; 4234c965db44STomer Tayar u32 nvram_image_type; 4235c965db44STomer Tayar 4236c965db44STomer Tayar *running_bundle_id = qed_rd(p_hwfn, p_ptt, running_mfw_addr); 4237c965db44STomer Tayar if (*running_bundle_id > 1) 4238c965db44STomer Tayar return DBG_STATUS_INVALID_NVRAM_BUNDLE; 4239c965db44STomer Tayar 4240c965db44STomer Tayar /* Find image in NVRAM */ 4241c965db44STomer Tayar nvram_image_type = 4242c965db44STomer Tayar (*running_bundle_id == 4243c965db44STomer Tayar DIR_ID_1) ? NVM_TYPE_MFW_TRACE1 : NVM_TYPE_MFW_TRACE2; 4244be086e7cSMintz, Yuval 4245be086e7cSMintz, Yuval return qed_find_nvram_image(p_hwfn, 4246c965db44STomer Tayar p_ptt, 4247c965db44STomer Tayar nvram_image_type, 4248c965db44STomer Tayar trace_meta_offset_bytes, 4249c965db44STomer Tayar trace_meta_size_bytes); 4250c965db44STomer Tayar } 4251c965db44STomer Tayar 4252c965db44STomer Tayar /* Reads the MCP Trace meta data (from NVRAM or buffer) into the specified 4253c965db44STomer Tayar * buffer. 4254c965db44STomer Tayar */ 4255c965db44STomer Tayar static enum dbg_status qed_mcp_trace_read_meta(struct qed_hwfn *p_hwfn, 4256c965db44STomer Tayar struct qed_ptt *p_ptt, 4257c965db44STomer Tayar u32 nvram_offset_in_bytes, 4258c965db44STomer Tayar u32 size_in_bytes, u32 *buf) 4259c965db44STomer Tayar { 4260c965db44STomer Tayar u8 *byte_buf = (u8 *)buf; 4261c965db44STomer Tayar u8 modules_num, i; 4262c965db44STomer Tayar u32 signature; 4263c965db44STomer Tayar 4264c965db44STomer Tayar /* Read meta data from NVRAM */ 4265c965db44STomer Tayar enum dbg_status status = qed_nvram_read(p_hwfn, 4266c965db44STomer Tayar p_ptt, 4267c965db44STomer Tayar nvram_offset_in_bytes, 4268c965db44STomer Tayar size_in_bytes, 4269c965db44STomer Tayar buf); 4270c965db44STomer Tayar 4271c965db44STomer Tayar if (status != DBG_STATUS_OK) 4272c965db44STomer Tayar return status; 4273c965db44STomer Tayar 4274c965db44STomer Tayar /* Extract and check first signature */ 4275c965db44STomer Tayar signature = qed_read_unaligned_dword(byte_buf); 4276c965db44STomer Tayar byte_buf += sizeof(u32); 4277c965db44STomer Tayar if (signature != MCP_TRACE_META_IMAGE_SIGNATURE) 4278c965db44STomer Tayar return DBG_STATUS_INVALID_TRACE_SIGNATURE; 4279c965db44STomer Tayar 4280c965db44STomer Tayar /* Extract number of modules */ 4281c965db44STomer Tayar modules_num = *(byte_buf++); 4282c965db44STomer Tayar 4283c965db44STomer Tayar /* Skip all modules */ 4284c965db44STomer Tayar for (i = 0; i < modules_num; i++) { 4285c965db44STomer Tayar u8 module_len = *(byte_buf++); 4286c965db44STomer Tayar 4287c965db44STomer Tayar byte_buf += module_len; 4288c965db44STomer Tayar } 4289c965db44STomer Tayar 4290c965db44STomer Tayar /* Extract and check second signature */ 4291c965db44STomer Tayar signature = qed_read_unaligned_dword(byte_buf); 4292c965db44STomer Tayar byte_buf += sizeof(u32); 4293c965db44STomer Tayar if (signature != MCP_TRACE_META_IMAGE_SIGNATURE) 4294c965db44STomer Tayar return DBG_STATUS_INVALID_TRACE_SIGNATURE; 4295c965db44STomer Tayar return DBG_STATUS_OK; 4296c965db44STomer Tayar } 4297c965db44STomer Tayar 4298c965db44STomer Tayar /* Dump MCP Trace */ 42998c93beafSYuval Mintz static enum dbg_status qed_mcp_trace_dump(struct qed_hwfn *p_hwfn, 4300c965db44STomer Tayar struct qed_ptt *p_ptt, 4301c965db44STomer Tayar u32 *dump_buf, 4302c965db44STomer Tayar bool dump, u32 *num_dumped_dwords) 4303c965db44STomer Tayar { 4304c965db44STomer Tayar u32 trace_data_grc_addr, trace_data_size_bytes, trace_data_size_dwords; 4305be086e7cSMintz, Yuval u32 trace_meta_size_dwords = 0, running_bundle_id, offset = 0; 4306be086e7cSMintz, Yuval u32 trace_meta_offset_bytes = 0, trace_meta_size_bytes = 0; 4307c965db44STomer Tayar enum dbg_status status; 4308be086e7cSMintz, Yuval bool mcp_access; 4309c965db44STomer Tayar int halted = 0; 4310c965db44STomer Tayar 4311be086e7cSMintz, Yuval mcp_access = !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP); 4312be086e7cSMintz, Yuval 4313c965db44STomer Tayar *num_dumped_dwords = 0; 4314c965db44STomer Tayar 4315c965db44STomer Tayar /* Get trace data info */ 4316c965db44STomer Tayar status = qed_mcp_trace_get_data_info(p_hwfn, 4317c965db44STomer Tayar p_ptt, 4318c965db44STomer Tayar &trace_data_grc_addr, 4319c965db44STomer Tayar &trace_data_size_bytes); 4320c965db44STomer Tayar if (status != DBG_STATUS_OK) 4321c965db44STomer Tayar return status; 4322c965db44STomer Tayar 4323c965db44STomer Tayar /* Dump global params */ 4324c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4325c965db44STomer Tayar p_ptt, 4326c965db44STomer Tayar dump_buf + offset, dump, 1); 4327c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4328c965db44STomer Tayar dump, "dump-type", "mcp-trace"); 4329c965db44STomer Tayar 4330c965db44STomer Tayar /* Halt MCP while reading from scratchpad so the read data will be 4331c965db44STomer Tayar * consistent if halt fails, MCP trace is taken anyway, with a small 4332c965db44STomer Tayar * risk that it may be corrupt. 4333c965db44STomer Tayar */ 4334be086e7cSMintz, Yuval if (dump && mcp_access) { 4335c965db44STomer Tayar halted = !qed_mcp_halt(p_hwfn, p_ptt); 4336c965db44STomer Tayar if (!halted) 4337c965db44STomer Tayar DP_NOTICE(p_hwfn, "MCP halt failed!\n"); 4338c965db44STomer Tayar } 4339c965db44STomer Tayar 4340c965db44STomer Tayar /* Find trace data size */ 4341c965db44STomer Tayar trace_data_size_dwords = 4342c965db44STomer Tayar DIV_ROUND_UP(trace_data_size_bytes + sizeof(struct mcp_trace), 4343c965db44STomer Tayar BYTES_IN_DWORD); 4344c965db44STomer Tayar 4345c965db44STomer Tayar /* Dump trace data section header and param */ 4346c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 4347c965db44STomer Tayar dump, "mcp_trace_data", 1); 4348c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 4349c965db44STomer Tayar dump, "size", trace_data_size_dwords); 4350c965db44STomer Tayar 4351c965db44STomer Tayar /* Read trace data from scratchpad into dump buffer */ 4352be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 4353c965db44STomer Tayar p_ptt, 4354be086e7cSMintz, Yuval dump_buf + offset, 4355be086e7cSMintz, Yuval dump, 4356be086e7cSMintz, Yuval BYTES_TO_DWORDS(trace_data_grc_addr), 4357be086e7cSMintz, Yuval trace_data_size_dwords); 4358c965db44STomer Tayar 4359c965db44STomer Tayar /* Resume MCP (only if halt succeeded) */ 4360c965db44STomer Tayar if (halted && qed_mcp_resume(p_hwfn, p_ptt) != 0) 4361c965db44STomer Tayar DP_NOTICE(p_hwfn, "Failed to resume MCP after halt!\n"); 4362c965db44STomer Tayar 4363c965db44STomer Tayar /* Dump trace meta section header */ 4364c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 4365c965db44STomer Tayar dump, "mcp_trace_meta", 1); 4366c965db44STomer Tayar 4367c965db44STomer Tayar /* Read trace meta info */ 4368be086e7cSMintz, Yuval if (mcp_access) { 4369c965db44STomer Tayar status = qed_mcp_trace_get_meta_info(p_hwfn, 4370c965db44STomer Tayar p_ptt, 4371c965db44STomer Tayar trace_data_size_bytes, 4372c965db44STomer Tayar &running_bundle_id, 4373c965db44STomer Tayar &trace_meta_offset_bytes, 4374c965db44STomer Tayar &trace_meta_size_bytes); 4375be086e7cSMintz, Yuval if (status == DBG_STATUS_OK) 4376be086e7cSMintz, Yuval trace_meta_size_dwords = 4377be086e7cSMintz, Yuval BYTES_TO_DWORDS(trace_meta_size_bytes); 4378be086e7cSMintz, Yuval } 4379c965db44STomer Tayar 4380be086e7cSMintz, Yuval /* Dump trace meta size param */ 4381be086e7cSMintz, Yuval offset += qed_dump_num_param(dump_buf + offset, 4382be086e7cSMintz, Yuval dump, "size", trace_meta_size_dwords); 4383c965db44STomer Tayar 4384c965db44STomer Tayar /* Read trace meta image into dump buffer */ 4385be086e7cSMintz, Yuval if (dump && trace_meta_size_dwords) 4386c965db44STomer Tayar status = qed_mcp_trace_read_meta(p_hwfn, 4387c965db44STomer Tayar p_ptt, 4388c965db44STomer Tayar trace_meta_offset_bytes, 4389c965db44STomer Tayar trace_meta_size_bytes, 4390c965db44STomer Tayar dump_buf + offset); 4391be086e7cSMintz, Yuval if (status == DBG_STATUS_OK) 4392c965db44STomer Tayar offset += trace_meta_size_dwords; 4393c965db44STomer Tayar 4394c965db44STomer Tayar *num_dumped_dwords = offset; 4395c965db44STomer Tayar 4396be086e7cSMintz, Yuval /* If no mcp access, indicate that the dump doesn't contain the meta 4397be086e7cSMintz, Yuval * data from NVRAM. 4398be086e7cSMintz, Yuval */ 4399be086e7cSMintz, Yuval return mcp_access ? status : DBG_STATUS_NVRAM_GET_IMAGE_FAILED; 4400c965db44STomer Tayar } 4401c965db44STomer Tayar 4402c965db44STomer Tayar /* Dump GRC FIFO */ 44038c93beafSYuval Mintz static enum dbg_status qed_reg_fifo_dump(struct qed_hwfn *p_hwfn, 4404c965db44STomer Tayar struct qed_ptt *p_ptt, 4405c965db44STomer Tayar u32 *dump_buf, 4406c965db44STomer Tayar bool dump, u32 *num_dumped_dwords) 4407c965db44STomer Tayar { 4408c965db44STomer Tayar u32 offset = 0, dwords_read, size_param_offset; 4409c965db44STomer Tayar bool fifo_has_data; 4410c965db44STomer Tayar 4411c965db44STomer Tayar *num_dumped_dwords = 0; 4412c965db44STomer Tayar 4413c965db44STomer Tayar /* Dump global params */ 4414c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4415c965db44STomer Tayar p_ptt, 4416c965db44STomer Tayar dump_buf + offset, dump, 1); 4417c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4418c965db44STomer Tayar dump, "dump-type", "reg-fifo"); 4419c965db44STomer Tayar 4420c965db44STomer Tayar /* Dump fifo data section header and param. The size param is 0 for now, 4421c965db44STomer Tayar * and is overwritten after reading the FIFO. 4422c965db44STomer Tayar */ 4423c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 4424c965db44STomer Tayar dump, "reg_fifo_data", 1); 4425c965db44STomer Tayar size_param_offset = offset; 4426c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, dump, "size", 0); 4427c965db44STomer Tayar 4428c965db44STomer Tayar if (!dump) { 4429c965db44STomer Tayar /* FIFO max size is REG_FIFO_DEPTH_DWORDS. There is no way to 4430c965db44STomer Tayar * test how much data is available, except for reading it. 4431c965db44STomer Tayar */ 4432c965db44STomer Tayar offset += REG_FIFO_DEPTH_DWORDS; 4433c965db44STomer Tayar *num_dumped_dwords = offset; 4434c965db44STomer Tayar return DBG_STATUS_OK; 4435c965db44STomer Tayar } 4436c965db44STomer Tayar 4437c965db44STomer Tayar fifo_has_data = qed_rd(p_hwfn, p_ptt, 4438c965db44STomer Tayar GRC_REG_TRACE_FIFO_VALID_DATA) > 0; 4439c965db44STomer Tayar 4440c965db44STomer Tayar /* Pull available data from fifo. Use DMAE since this is widebus memory 4441c965db44STomer Tayar * and must be accessed atomically. Test for dwords_read not passing 4442c965db44STomer Tayar * buffer size since more entries could be added to the buffer as we are 4443c965db44STomer Tayar * emptying it. 4444c965db44STomer Tayar */ 4445c965db44STomer Tayar for (dwords_read = 0; 4446c965db44STomer Tayar fifo_has_data && dwords_read < REG_FIFO_DEPTH_DWORDS; 4447c965db44STomer Tayar dwords_read += REG_FIFO_ELEMENT_DWORDS, offset += 4448c965db44STomer Tayar REG_FIFO_ELEMENT_DWORDS) { 4449c965db44STomer Tayar if (qed_dmae_grc2host(p_hwfn, p_ptt, GRC_REG_TRACE_FIFO, 4450c965db44STomer Tayar (u64)(uintptr_t)(&dump_buf[offset]), 4451c965db44STomer Tayar REG_FIFO_ELEMENT_DWORDS, 0)) 4452c965db44STomer Tayar return DBG_STATUS_DMAE_FAILED; 4453c965db44STomer Tayar fifo_has_data = qed_rd(p_hwfn, p_ptt, 4454c965db44STomer Tayar GRC_REG_TRACE_FIFO_VALID_DATA) > 0; 4455c965db44STomer Tayar } 4456c965db44STomer Tayar 4457c965db44STomer Tayar qed_dump_num_param(dump_buf + size_param_offset, dump, "size", 4458c965db44STomer Tayar dwords_read); 4459c965db44STomer Tayar 4460c965db44STomer Tayar *num_dumped_dwords = offset; 4461c965db44STomer Tayar return DBG_STATUS_OK; 4462c965db44STomer Tayar } 4463c965db44STomer Tayar 4464c965db44STomer Tayar /* Dump IGU FIFO */ 44658c93beafSYuval Mintz static enum dbg_status qed_igu_fifo_dump(struct qed_hwfn *p_hwfn, 4466c965db44STomer Tayar struct qed_ptt *p_ptt, 4467c965db44STomer Tayar u32 *dump_buf, 4468c965db44STomer Tayar bool dump, u32 *num_dumped_dwords) 4469c965db44STomer Tayar { 4470c965db44STomer Tayar u32 offset = 0, dwords_read, size_param_offset; 4471c965db44STomer Tayar bool fifo_has_data; 4472c965db44STomer Tayar 4473c965db44STomer Tayar *num_dumped_dwords = 0; 4474c965db44STomer Tayar 4475c965db44STomer Tayar /* Dump global params */ 4476c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4477c965db44STomer Tayar p_ptt, 4478c965db44STomer Tayar dump_buf + offset, dump, 1); 4479c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4480c965db44STomer Tayar dump, "dump-type", "igu-fifo"); 4481c965db44STomer Tayar 4482c965db44STomer Tayar /* Dump fifo data section header and param. The size param is 0 for now, 4483c965db44STomer Tayar * and is overwritten after reading the FIFO. 4484c965db44STomer Tayar */ 4485c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 4486c965db44STomer Tayar dump, "igu_fifo_data", 1); 4487c965db44STomer Tayar size_param_offset = offset; 4488c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, dump, "size", 0); 4489c965db44STomer Tayar 4490c965db44STomer Tayar if (!dump) { 4491c965db44STomer Tayar /* FIFO max size is IGU_FIFO_DEPTH_DWORDS. There is no way to 4492c965db44STomer Tayar * test how much data is available, except for reading it. 4493c965db44STomer Tayar */ 4494c965db44STomer Tayar offset += IGU_FIFO_DEPTH_DWORDS; 4495c965db44STomer Tayar *num_dumped_dwords = offset; 4496c965db44STomer Tayar return DBG_STATUS_OK; 4497c965db44STomer Tayar } 4498c965db44STomer Tayar 4499c965db44STomer Tayar fifo_has_data = qed_rd(p_hwfn, p_ptt, 4500c965db44STomer Tayar IGU_REG_ERROR_HANDLING_DATA_VALID) > 0; 4501c965db44STomer Tayar 4502c965db44STomer Tayar /* Pull available data from fifo. Use DMAE since this is widebus memory 4503c965db44STomer Tayar * and must be accessed atomically. Test for dwords_read not passing 4504c965db44STomer Tayar * buffer size since more entries could be added to the buffer as we are 4505c965db44STomer Tayar * emptying it. 4506c965db44STomer Tayar */ 4507c965db44STomer Tayar for (dwords_read = 0; 4508c965db44STomer Tayar fifo_has_data && dwords_read < IGU_FIFO_DEPTH_DWORDS; 4509c965db44STomer Tayar dwords_read += IGU_FIFO_ELEMENT_DWORDS, offset += 4510c965db44STomer Tayar IGU_FIFO_ELEMENT_DWORDS) { 4511c965db44STomer Tayar if (qed_dmae_grc2host(p_hwfn, p_ptt, 4512c965db44STomer Tayar IGU_REG_ERROR_HANDLING_MEMORY, 4513c965db44STomer Tayar (u64)(uintptr_t)(&dump_buf[offset]), 4514c965db44STomer Tayar IGU_FIFO_ELEMENT_DWORDS, 0)) 4515c965db44STomer Tayar return DBG_STATUS_DMAE_FAILED; 4516c965db44STomer Tayar fifo_has_data = qed_rd(p_hwfn, p_ptt, 4517c965db44STomer Tayar IGU_REG_ERROR_HANDLING_DATA_VALID) > 0; 4518c965db44STomer Tayar } 4519c965db44STomer Tayar 4520c965db44STomer Tayar qed_dump_num_param(dump_buf + size_param_offset, dump, "size", 4521c965db44STomer Tayar dwords_read); 4522c965db44STomer Tayar 4523c965db44STomer Tayar *num_dumped_dwords = offset; 4524c965db44STomer Tayar return DBG_STATUS_OK; 4525c965db44STomer Tayar } 4526c965db44STomer Tayar 4527c965db44STomer Tayar /* Protection Override dump */ 45288c93beafSYuval Mintz static enum dbg_status qed_protection_override_dump(struct qed_hwfn *p_hwfn, 4529c965db44STomer Tayar struct qed_ptt *p_ptt, 4530c965db44STomer Tayar u32 *dump_buf, 45318c93beafSYuval Mintz bool dump, 45328c93beafSYuval Mintz u32 *num_dumped_dwords) 4533c965db44STomer Tayar { 4534c965db44STomer Tayar u32 offset = 0, size_param_offset, override_window_dwords; 4535c965db44STomer Tayar 4536c965db44STomer Tayar *num_dumped_dwords = 0; 4537c965db44STomer Tayar 4538c965db44STomer Tayar /* Dump global params */ 4539c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4540c965db44STomer Tayar p_ptt, 4541c965db44STomer Tayar dump_buf + offset, dump, 1); 4542c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4543c965db44STomer Tayar dump, "dump-type", "protection-override"); 4544c965db44STomer Tayar 4545c965db44STomer Tayar /* Dump data section header and param. The size param is 0 for now, and 4546c965db44STomer Tayar * is overwritten after reading the data. 4547c965db44STomer Tayar */ 4548c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 4549c965db44STomer Tayar dump, "protection_override_data", 1); 4550c965db44STomer Tayar size_param_offset = offset; 4551c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, dump, "size", 0); 4552c965db44STomer Tayar 4553c965db44STomer Tayar if (!dump) { 4554c965db44STomer Tayar offset += PROTECTION_OVERRIDE_DEPTH_DWORDS; 4555c965db44STomer Tayar *num_dumped_dwords = offset; 4556c965db44STomer Tayar return DBG_STATUS_OK; 4557c965db44STomer Tayar } 4558c965db44STomer Tayar 4559c965db44STomer Tayar /* Add override window info to buffer */ 4560c965db44STomer Tayar override_window_dwords = 4561c965db44STomer Tayar qed_rd(p_hwfn, p_ptt, 4562c965db44STomer Tayar GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW) * 4563c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_DWORDS; 4564c965db44STomer Tayar if (qed_dmae_grc2host(p_hwfn, p_ptt, 4565c965db44STomer Tayar GRC_REG_PROTECTION_OVERRIDE_WINDOW, 4566c965db44STomer Tayar (u64)(uintptr_t)(dump_buf + offset), 4567c965db44STomer Tayar override_window_dwords, 0)) 4568c965db44STomer Tayar return DBG_STATUS_DMAE_FAILED; 4569c965db44STomer Tayar offset += override_window_dwords; 4570c965db44STomer Tayar qed_dump_num_param(dump_buf + size_param_offset, dump, "size", 4571c965db44STomer Tayar override_window_dwords); 4572c965db44STomer Tayar 4573c965db44STomer Tayar *num_dumped_dwords = offset; 4574c965db44STomer Tayar return DBG_STATUS_OK; 4575c965db44STomer Tayar } 4576c965db44STomer Tayar 4577c965db44STomer Tayar /* Performs FW Asserts Dump to the specified buffer. 4578c965db44STomer Tayar * Returns the dumped size in dwords. 4579c965db44STomer Tayar */ 4580c965db44STomer Tayar static u32 qed_fw_asserts_dump(struct qed_hwfn *p_hwfn, 4581c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 4582c965db44STomer Tayar { 4583c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 4584be086e7cSMintz, Yuval struct fw_asserts_ram_section *asserts; 4585c965db44STomer Tayar char storm_letter_str[2] = "?"; 4586c965db44STomer Tayar struct fw_info fw_info; 4587be086e7cSMintz, Yuval u32 offset = 0; 4588c965db44STomer Tayar u8 storm_id; 4589c965db44STomer Tayar 4590c965db44STomer Tayar /* Dump global params */ 4591c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4592c965db44STomer Tayar p_ptt, 4593c965db44STomer Tayar dump_buf + offset, dump, 1); 4594c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4595c965db44STomer Tayar dump, "dump-type", "fw-asserts"); 4596c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 4597be086e7cSMintz, Yuval u32 fw_asserts_section_addr, next_list_idx_addr, next_list_idx; 4598be086e7cSMintz, Yuval u32 last_list_idx, addr; 4599c965db44STomer Tayar 4600c965db44STomer Tayar if (dev_data->block_in_reset[s_storm_defs[storm_id].block_id]) 4601c965db44STomer Tayar continue; 4602c965db44STomer Tayar 4603c965db44STomer Tayar /* Read FW info for the current Storm */ 4604c965db44STomer Tayar qed_read_fw_info(p_hwfn, p_ptt, storm_id, &fw_info); 4605c965db44STomer Tayar 4606be086e7cSMintz, Yuval asserts = &fw_info.fw_asserts_section; 4607be086e7cSMintz, Yuval 4608c965db44STomer Tayar /* Dump FW Asserts section header and params */ 4609c965db44STomer Tayar storm_letter_str[0] = s_storm_defs[storm_id].letter; 4610c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, dump, 4611c965db44STomer Tayar "fw_asserts", 2); 4612c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, dump, "storm", 4613c965db44STomer Tayar storm_letter_str); 4614c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, dump, "size", 4615be086e7cSMintz, Yuval asserts->list_element_dword_size); 4616c965db44STomer Tayar 4617c965db44STomer Tayar if (!dump) { 4618be086e7cSMintz, Yuval offset += asserts->list_element_dword_size; 4619c965db44STomer Tayar continue; 4620c965db44STomer Tayar } 4621c965db44STomer Tayar 4622c965db44STomer Tayar /* Read and dump FW Asserts data */ 4623c965db44STomer Tayar fw_asserts_section_addr = 4624c965db44STomer Tayar s_storm_defs[storm_id].sem_fast_mem_addr + 4625c965db44STomer Tayar SEM_FAST_REG_INT_RAM + 4626be086e7cSMintz, Yuval RAM_LINES_TO_BYTES(asserts->section_ram_line_offset); 4627c965db44STomer Tayar next_list_idx_addr = 4628c965db44STomer Tayar fw_asserts_section_addr + 4629be086e7cSMintz, Yuval DWORDS_TO_BYTES(asserts->list_next_index_dword_offset); 4630c965db44STomer Tayar next_list_idx = qed_rd(p_hwfn, p_ptt, next_list_idx_addr); 4631c965db44STomer Tayar last_list_idx = (next_list_idx > 0 4632c965db44STomer Tayar ? next_list_idx 4633be086e7cSMintz, Yuval : asserts->list_num_elements) - 1; 4634be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(fw_asserts_section_addr) + 4635be086e7cSMintz, Yuval asserts->list_dword_offset + 4636be086e7cSMintz, Yuval last_list_idx * asserts->list_element_dword_size; 4637be086e7cSMintz, Yuval offset += 4638be086e7cSMintz, Yuval qed_grc_dump_addr_range(p_hwfn, p_ptt, 4639be086e7cSMintz, Yuval dump_buf + offset, 4640be086e7cSMintz, Yuval dump, addr, 4641be086e7cSMintz, Yuval asserts->list_element_dword_size); 4642c965db44STomer Tayar } 4643c965db44STomer Tayar 4644c965db44STomer Tayar /* Dump last section */ 4645c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, dump, "last", 0); 4646c965db44STomer Tayar return offset; 4647c965db44STomer Tayar } 4648c965db44STomer Tayar 4649c965db44STomer Tayar /***************************** Public Functions *******************************/ 4650c965db44STomer Tayar 4651c965db44STomer Tayar enum dbg_status qed_dbg_set_bin_ptr(const u8 * const bin_ptr) 4652c965db44STomer Tayar { 4653c965db44STomer Tayar /* Convert binary data to debug arrays */ 4654be086e7cSMintz, Yuval struct bin_buffer_hdr *buf_array = (struct bin_buffer_hdr *)bin_ptr; 4655c965db44STomer Tayar u8 buf_id; 4656c965db44STomer Tayar 4657be086e7cSMintz, Yuval for (buf_id = 0; buf_id < MAX_BIN_DBG_BUFFER_TYPE; buf_id++) { 4658c965db44STomer Tayar s_dbg_arrays[buf_id].ptr = 4659c965db44STomer Tayar (u32 *)(bin_ptr + buf_array[buf_id].offset); 4660c965db44STomer Tayar s_dbg_arrays[buf_id].size_in_dwords = 4661c965db44STomer Tayar BYTES_TO_DWORDS(buf_array[buf_id].length); 4662c965db44STomer Tayar } 4663c965db44STomer Tayar 4664c965db44STomer Tayar return DBG_STATUS_OK; 4665c965db44STomer Tayar } 4666c965db44STomer Tayar 4667be086e7cSMintz, Yuval /* Assign default GRC param values */ 4668be086e7cSMintz, Yuval void qed_dbg_grc_set_params_default(struct qed_hwfn *p_hwfn) 4669be086e7cSMintz, Yuval { 4670be086e7cSMintz, Yuval struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 4671be086e7cSMintz, Yuval u32 i; 4672be086e7cSMintz, Yuval 4673be086e7cSMintz, Yuval for (i = 0; i < MAX_DBG_GRC_PARAMS; i++) 4674be086e7cSMintz, Yuval dev_data->grc.param_val[i] = 4675be086e7cSMintz, Yuval s_grc_param_defs[i].default_val[dev_data->chip_id]; 4676be086e7cSMintz, Yuval } 4677be086e7cSMintz, Yuval 4678c965db44STomer Tayar enum dbg_status qed_dbg_grc_get_dump_buf_size(struct qed_hwfn *p_hwfn, 4679c965db44STomer Tayar struct qed_ptt *p_ptt, 4680c965db44STomer Tayar u32 *buf_size) 4681c965db44STomer Tayar { 4682c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 4683c965db44STomer Tayar 4684c965db44STomer Tayar *buf_size = 0; 4685c965db44STomer Tayar if (status != DBG_STATUS_OK) 4686c965db44STomer Tayar return status; 4687c965db44STomer Tayar if (!s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr || 4688c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].ptr || 4689c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].ptr || 4690c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_ATTN_BLOCKS].ptr || 4691c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_ATTN_REGS].ptr) 4692c965db44STomer Tayar return DBG_STATUS_DBG_ARRAY_NOT_SET; 4693c965db44STomer Tayar return qed_grc_dump(p_hwfn, p_ptt, NULL, false, buf_size); 4694c965db44STomer Tayar } 4695c965db44STomer Tayar 4696c965db44STomer Tayar enum dbg_status qed_dbg_grc_dump(struct qed_hwfn *p_hwfn, 4697c965db44STomer Tayar struct qed_ptt *p_ptt, 4698c965db44STomer Tayar u32 *dump_buf, 4699c965db44STomer Tayar u32 buf_size_in_dwords, 4700c965db44STomer Tayar u32 *num_dumped_dwords) 4701c965db44STomer Tayar { 4702c965db44STomer Tayar u32 needed_buf_size_in_dwords; 4703c965db44STomer Tayar enum dbg_status status; 4704c965db44STomer Tayar 4705c965db44STomer Tayar status = qed_dbg_grc_get_dump_buf_size(p_hwfn, p_ptt, 4706c965db44STomer Tayar &needed_buf_size_in_dwords); 4707c965db44STomer Tayar 4708c965db44STomer Tayar *num_dumped_dwords = 0; 4709c965db44STomer Tayar if (status != DBG_STATUS_OK) 4710c965db44STomer Tayar return status; 4711c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 4712c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 4713c965db44STomer Tayar 4714c965db44STomer Tayar /* GRC Dump */ 4715c965db44STomer Tayar status = qed_grc_dump(p_hwfn, p_ptt, dump_buf, true, num_dumped_dwords); 4716c965db44STomer Tayar 4717be086e7cSMintz, Yuval /* Revert GRC params to their default */ 4718be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 4719be086e7cSMintz, Yuval 4720c965db44STomer Tayar return status; 4721c965db44STomer Tayar } 4722c965db44STomer Tayar 4723c965db44STomer Tayar enum dbg_status qed_dbg_idle_chk_get_dump_buf_size(struct qed_hwfn *p_hwfn, 4724c965db44STomer Tayar struct qed_ptt *p_ptt, 4725c965db44STomer Tayar u32 *buf_size) 4726c965db44STomer Tayar { 4727c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 4728c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 4729c965db44STomer Tayar 4730c965db44STomer Tayar *buf_size = 0; 4731c965db44STomer Tayar if (status != DBG_STATUS_OK) 4732c965db44STomer Tayar return status; 4733c965db44STomer Tayar if (!s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr || 4734c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr || 4735c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_IMMS].ptr || 4736c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES].ptr) 4737c965db44STomer Tayar return DBG_STATUS_DBG_ARRAY_NOT_SET; 4738c965db44STomer Tayar if (!dev_data->idle_chk.buf_size_set) { 4739c965db44STomer Tayar dev_data->idle_chk.buf_size = qed_idle_chk_dump(p_hwfn, 4740c965db44STomer Tayar p_ptt, 4741c965db44STomer Tayar NULL, false); 4742c965db44STomer Tayar dev_data->idle_chk.buf_size_set = true; 4743c965db44STomer Tayar } 4744c965db44STomer Tayar 4745c965db44STomer Tayar *buf_size = dev_data->idle_chk.buf_size; 4746c965db44STomer Tayar return DBG_STATUS_OK; 4747c965db44STomer Tayar } 4748c965db44STomer Tayar 4749c965db44STomer Tayar enum dbg_status qed_dbg_idle_chk_dump(struct qed_hwfn *p_hwfn, 4750c965db44STomer Tayar struct qed_ptt *p_ptt, 4751c965db44STomer Tayar u32 *dump_buf, 4752c965db44STomer Tayar u32 buf_size_in_dwords, 4753c965db44STomer Tayar u32 *num_dumped_dwords) 4754c965db44STomer Tayar { 4755c965db44STomer Tayar u32 needed_buf_size_in_dwords; 4756c965db44STomer Tayar enum dbg_status status; 4757c965db44STomer Tayar 4758c965db44STomer Tayar status = qed_dbg_idle_chk_get_dump_buf_size(p_hwfn, p_ptt, 4759c965db44STomer Tayar &needed_buf_size_in_dwords); 4760c965db44STomer Tayar 4761c965db44STomer Tayar *num_dumped_dwords = 0; 4762c965db44STomer Tayar if (status != DBG_STATUS_OK) 4763c965db44STomer Tayar return status; 4764c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 4765c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 4766c965db44STomer Tayar 4767c965db44STomer Tayar /* Update reset state */ 4768c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 4769c965db44STomer Tayar 4770c965db44STomer Tayar /* Idle Check Dump */ 4771c965db44STomer Tayar *num_dumped_dwords = qed_idle_chk_dump(p_hwfn, p_ptt, dump_buf, true); 4772be086e7cSMintz, Yuval 4773be086e7cSMintz, Yuval /* Revert GRC params to their default */ 4774be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 4775be086e7cSMintz, Yuval 4776c965db44STomer Tayar return DBG_STATUS_OK; 4777c965db44STomer Tayar } 4778c965db44STomer Tayar 4779c965db44STomer Tayar enum dbg_status qed_dbg_mcp_trace_get_dump_buf_size(struct qed_hwfn *p_hwfn, 4780c965db44STomer Tayar struct qed_ptt *p_ptt, 4781c965db44STomer Tayar u32 *buf_size) 4782c965db44STomer Tayar { 4783c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 4784c965db44STomer Tayar 4785c965db44STomer Tayar *buf_size = 0; 4786c965db44STomer Tayar if (status != DBG_STATUS_OK) 4787c965db44STomer Tayar return status; 4788c965db44STomer Tayar return qed_mcp_trace_dump(p_hwfn, p_ptt, NULL, false, buf_size); 4789c965db44STomer Tayar } 4790c965db44STomer Tayar 4791c965db44STomer Tayar enum dbg_status qed_dbg_mcp_trace_dump(struct qed_hwfn *p_hwfn, 4792c965db44STomer Tayar struct qed_ptt *p_ptt, 4793c965db44STomer Tayar u32 *dump_buf, 4794c965db44STomer Tayar u32 buf_size_in_dwords, 4795c965db44STomer Tayar u32 *num_dumped_dwords) 4796c965db44STomer Tayar { 4797c965db44STomer Tayar u32 needed_buf_size_in_dwords; 4798c965db44STomer Tayar enum dbg_status status; 4799c965db44STomer Tayar 4800be086e7cSMintz, Yuval /* validate buffer size */ 4801be086e7cSMintz, Yuval status = 4802be086e7cSMintz, Yuval qed_dbg_mcp_trace_get_dump_buf_size(p_hwfn, p_ptt, 4803c965db44STomer Tayar &needed_buf_size_in_dwords); 4804c965db44STomer Tayar 4805be086e7cSMintz, Yuval if (status != DBG_STATUS_OK && 4806be086e7cSMintz, Yuval status != DBG_STATUS_NVRAM_GET_IMAGE_FAILED) 4807c965db44STomer Tayar return status; 4808be086e7cSMintz, Yuval 4809c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 4810c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 4811c965db44STomer Tayar 4812c965db44STomer Tayar /* Update reset state */ 4813c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 4814c965db44STomer Tayar 4815c965db44STomer Tayar /* Perform dump */ 4816be086e7cSMintz, Yuval status = qed_mcp_trace_dump(p_hwfn, 4817c965db44STomer Tayar p_ptt, dump_buf, true, num_dumped_dwords); 4818be086e7cSMintz, Yuval 4819be086e7cSMintz, Yuval /* Revert GRC params to their default */ 4820be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 4821be086e7cSMintz, Yuval 4822be086e7cSMintz, Yuval return status; 4823c965db44STomer Tayar } 4824c965db44STomer Tayar 4825c965db44STomer Tayar enum dbg_status qed_dbg_reg_fifo_get_dump_buf_size(struct qed_hwfn *p_hwfn, 4826c965db44STomer Tayar struct qed_ptt *p_ptt, 4827c965db44STomer Tayar u32 *buf_size) 4828c965db44STomer Tayar { 4829c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 4830c965db44STomer Tayar 4831c965db44STomer Tayar *buf_size = 0; 4832c965db44STomer Tayar if (status != DBG_STATUS_OK) 4833c965db44STomer Tayar return status; 4834c965db44STomer Tayar return qed_reg_fifo_dump(p_hwfn, p_ptt, NULL, false, buf_size); 4835c965db44STomer Tayar } 4836c965db44STomer Tayar 4837c965db44STomer Tayar enum dbg_status qed_dbg_reg_fifo_dump(struct qed_hwfn *p_hwfn, 4838c965db44STomer Tayar struct qed_ptt *p_ptt, 4839c965db44STomer Tayar u32 *dump_buf, 4840c965db44STomer Tayar u32 buf_size_in_dwords, 4841c965db44STomer Tayar u32 *num_dumped_dwords) 4842c965db44STomer Tayar { 4843c965db44STomer Tayar u32 needed_buf_size_in_dwords; 4844c965db44STomer Tayar enum dbg_status status; 4845c965db44STomer Tayar 4846c965db44STomer Tayar status = qed_dbg_reg_fifo_get_dump_buf_size(p_hwfn, p_ptt, 4847c965db44STomer Tayar &needed_buf_size_in_dwords); 4848c965db44STomer Tayar 4849c965db44STomer Tayar *num_dumped_dwords = 0; 4850c965db44STomer Tayar if (status != DBG_STATUS_OK) 4851c965db44STomer Tayar return status; 4852c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 4853c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 4854c965db44STomer Tayar 4855c965db44STomer Tayar /* Update reset state */ 4856c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 4857be086e7cSMintz, Yuval 4858be086e7cSMintz, Yuval status = qed_reg_fifo_dump(p_hwfn, 4859c965db44STomer Tayar p_ptt, dump_buf, true, num_dumped_dwords); 4860be086e7cSMintz, Yuval 4861be086e7cSMintz, Yuval /* Revert GRC params to their default */ 4862be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 4863be086e7cSMintz, Yuval 4864be086e7cSMintz, Yuval return status; 4865c965db44STomer Tayar } 4866c965db44STomer Tayar 4867c965db44STomer Tayar enum dbg_status qed_dbg_igu_fifo_get_dump_buf_size(struct qed_hwfn *p_hwfn, 4868c965db44STomer Tayar struct qed_ptt *p_ptt, 4869c965db44STomer Tayar u32 *buf_size) 4870c965db44STomer Tayar { 4871c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 4872c965db44STomer Tayar 4873c965db44STomer Tayar *buf_size = 0; 4874c965db44STomer Tayar if (status != DBG_STATUS_OK) 4875c965db44STomer Tayar return status; 4876c965db44STomer Tayar return qed_igu_fifo_dump(p_hwfn, p_ptt, NULL, false, buf_size); 4877c965db44STomer Tayar } 4878c965db44STomer Tayar 4879c965db44STomer Tayar enum dbg_status qed_dbg_igu_fifo_dump(struct qed_hwfn *p_hwfn, 4880c965db44STomer Tayar struct qed_ptt *p_ptt, 4881c965db44STomer Tayar u32 *dump_buf, 4882c965db44STomer Tayar u32 buf_size_in_dwords, 4883c965db44STomer Tayar u32 *num_dumped_dwords) 4884c965db44STomer Tayar { 4885c965db44STomer Tayar u32 needed_buf_size_in_dwords; 4886c965db44STomer Tayar enum dbg_status status; 4887c965db44STomer Tayar 4888c965db44STomer Tayar status = qed_dbg_igu_fifo_get_dump_buf_size(p_hwfn, p_ptt, 4889c965db44STomer Tayar &needed_buf_size_in_dwords); 4890c965db44STomer Tayar 4891c965db44STomer Tayar *num_dumped_dwords = 0; 4892c965db44STomer Tayar if (status != DBG_STATUS_OK) 4893c965db44STomer Tayar return status; 4894c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 4895c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 4896c965db44STomer Tayar 4897c965db44STomer Tayar /* Update reset state */ 4898c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 4899be086e7cSMintz, Yuval 4900be086e7cSMintz, Yuval status = qed_igu_fifo_dump(p_hwfn, 4901c965db44STomer Tayar p_ptt, dump_buf, true, num_dumped_dwords); 4902be086e7cSMintz, Yuval /* Revert GRC params to their default */ 4903be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 4904be086e7cSMintz, Yuval 4905be086e7cSMintz, Yuval return status; 4906c965db44STomer Tayar } 4907c965db44STomer Tayar 4908c965db44STomer Tayar enum dbg_status 4909c965db44STomer Tayar qed_dbg_protection_override_get_dump_buf_size(struct qed_hwfn *p_hwfn, 4910c965db44STomer Tayar struct qed_ptt *p_ptt, 4911c965db44STomer Tayar u32 *buf_size) 4912c965db44STomer Tayar { 4913c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 4914c965db44STomer Tayar 4915c965db44STomer Tayar *buf_size = 0; 4916c965db44STomer Tayar if (status != DBG_STATUS_OK) 4917c965db44STomer Tayar return status; 4918c965db44STomer Tayar return qed_protection_override_dump(p_hwfn, 4919c965db44STomer Tayar p_ptt, NULL, false, buf_size); 4920c965db44STomer Tayar } 4921c965db44STomer Tayar 4922c965db44STomer Tayar enum dbg_status qed_dbg_protection_override_dump(struct qed_hwfn *p_hwfn, 4923c965db44STomer Tayar struct qed_ptt *p_ptt, 4924c965db44STomer Tayar u32 *dump_buf, 4925c965db44STomer Tayar u32 buf_size_in_dwords, 4926c965db44STomer Tayar u32 *num_dumped_dwords) 4927c965db44STomer Tayar { 4928c965db44STomer Tayar u32 needed_buf_size_in_dwords; 4929c965db44STomer Tayar enum dbg_status status; 4930c965db44STomer Tayar 4931c965db44STomer Tayar status = qed_dbg_protection_override_get_dump_buf_size(p_hwfn, p_ptt, 4932c965db44STomer Tayar &needed_buf_size_in_dwords); 4933c965db44STomer Tayar 4934c965db44STomer Tayar *num_dumped_dwords = 0; 4935c965db44STomer Tayar if (status != DBG_STATUS_OK) 4936c965db44STomer Tayar return status; 4937c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 4938c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 4939c965db44STomer Tayar 4940c965db44STomer Tayar /* Update reset state */ 4941c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 4942be086e7cSMintz, Yuval 4943be086e7cSMintz, Yuval status = qed_protection_override_dump(p_hwfn, 4944c965db44STomer Tayar p_ptt, 4945be086e7cSMintz, Yuval dump_buf, 4946be086e7cSMintz, Yuval true, num_dumped_dwords); 4947be086e7cSMintz, Yuval 4948be086e7cSMintz, Yuval /* Revert GRC params to their default */ 4949be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 4950be086e7cSMintz, Yuval 4951be086e7cSMintz, Yuval return status; 4952c965db44STomer Tayar } 4953c965db44STomer Tayar 4954c965db44STomer Tayar enum dbg_status qed_dbg_fw_asserts_get_dump_buf_size(struct qed_hwfn *p_hwfn, 4955c965db44STomer Tayar struct qed_ptt *p_ptt, 4956c965db44STomer Tayar u32 *buf_size) 4957c965db44STomer Tayar { 4958c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 4959c965db44STomer Tayar 4960c965db44STomer Tayar *buf_size = 0; 4961c965db44STomer Tayar if (status != DBG_STATUS_OK) 4962c965db44STomer Tayar return status; 4963c965db44STomer Tayar 4964c965db44STomer Tayar /* Update reset state */ 4965c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 4966c965db44STomer Tayar *buf_size = qed_fw_asserts_dump(p_hwfn, p_ptt, NULL, false); 4967c965db44STomer Tayar return DBG_STATUS_OK; 4968c965db44STomer Tayar } 4969c965db44STomer Tayar 4970c965db44STomer Tayar enum dbg_status qed_dbg_fw_asserts_dump(struct qed_hwfn *p_hwfn, 4971c965db44STomer Tayar struct qed_ptt *p_ptt, 4972c965db44STomer Tayar u32 *dump_buf, 4973c965db44STomer Tayar u32 buf_size_in_dwords, 4974c965db44STomer Tayar u32 *num_dumped_dwords) 4975c965db44STomer Tayar { 4976c965db44STomer Tayar u32 needed_buf_size_in_dwords; 4977c965db44STomer Tayar enum dbg_status status; 4978c965db44STomer Tayar 4979c965db44STomer Tayar status = qed_dbg_fw_asserts_get_dump_buf_size(p_hwfn, p_ptt, 4980c965db44STomer Tayar &needed_buf_size_in_dwords); 4981c965db44STomer Tayar 4982c965db44STomer Tayar *num_dumped_dwords = 0; 4983c965db44STomer Tayar if (status != DBG_STATUS_OK) 4984c965db44STomer Tayar return status; 4985c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 4986c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 4987c965db44STomer Tayar 4988c965db44STomer Tayar *num_dumped_dwords = qed_fw_asserts_dump(p_hwfn, p_ptt, dump_buf, true); 4989c965db44STomer Tayar return DBG_STATUS_OK; 4990c965db44STomer Tayar } 4991c965db44STomer Tayar 4992c965db44STomer Tayar /******************************* Data Types **********************************/ 4993c965db44STomer Tayar 4994c965db44STomer Tayar struct mcp_trace_format { 4995c965db44STomer Tayar u32 data; 4996c965db44STomer Tayar #define MCP_TRACE_FORMAT_MODULE_MASK 0x0000ffff 4997c965db44STomer Tayar #define MCP_TRACE_FORMAT_MODULE_SHIFT 0 4998c965db44STomer Tayar #define MCP_TRACE_FORMAT_LEVEL_MASK 0x00030000 4999c965db44STomer Tayar #define MCP_TRACE_FORMAT_LEVEL_SHIFT 16 5000c965db44STomer Tayar #define MCP_TRACE_FORMAT_P1_SIZE_MASK 0x000c0000 5001c965db44STomer Tayar #define MCP_TRACE_FORMAT_P1_SIZE_SHIFT 18 5002c965db44STomer Tayar #define MCP_TRACE_FORMAT_P2_SIZE_MASK 0x00300000 5003c965db44STomer Tayar #define MCP_TRACE_FORMAT_P2_SIZE_SHIFT 20 5004c965db44STomer Tayar #define MCP_TRACE_FORMAT_P3_SIZE_MASK 0x00c00000 5005c965db44STomer Tayar #define MCP_TRACE_FORMAT_P3_SIZE_SHIFT 22 5006c965db44STomer Tayar #define MCP_TRACE_FORMAT_LEN_MASK 0xff000000 5007c965db44STomer Tayar #define MCP_TRACE_FORMAT_LEN_SHIFT 24 5008c965db44STomer Tayar char *format_str; 5009c965db44STomer Tayar }; 5010c965db44STomer Tayar 5011c965db44STomer Tayar struct mcp_trace_meta { 5012c965db44STomer Tayar u32 modules_num; 5013c965db44STomer Tayar char **modules; 5014c965db44STomer Tayar u32 formats_num; 5015c965db44STomer Tayar struct mcp_trace_format *formats; 5016c965db44STomer Tayar }; 5017c965db44STomer Tayar 5018c965db44STomer Tayar /* Reg fifo element */ 5019c965db44STomer Tayar struct reg_fifo_element { 5020c965db44STomer Tayar u64 data; 5021c965db44STomer Tayar #define REG_FIFO_ELEMENT_ADDRESS_SHIFT 0 5022c965db44STomer Tayar #define REG_FIFO_ELEMENT_ADDRESS_MASK 0x7fffff 5023c965db44STomer Tayar #define REG_FIFO_ELEMENT_ACCESS_SHIFT 23 5024c965db44STomer Tayar #define REG_FIFO_ELEMENT_ACCESS_MASK 0x1 5025c965db44STomer Tayar #define REG_FIFO_ELEMENT_PF_SHIFT 24 5026c965db44STomer Tayar #define REG_FIFO_ELEMENT_PF_MASK 0xf 5027c965db44STomer Tayar #define REG_FIFO_ELEMENT_VF_SHIFT 28 5028c965db44STomer Tayar #define REG_FIFO_ELEMENT_VF_MASK 0xff 5029c965db44STomer Tayar #define REG_FIFO_ELEMENT_PORT_SHIFT 36 5030c965db44STomer Tayar #define REG_FIFO_ELEMENT_PORT_MASK 0x3 5031c965db44STomer Tayar #define REG_FIFO_ELEMENT_PRIVILEGE_SHIFT 38 5032c965db44STomer Tayar #define REG_FIFO_ELEMENT_PRIVILEGE_MASK 0x3 5033c965db44STomer Tayar #define REG_FIFO_ELEMENT_PROTECTION_SHIFT 40 5034c965db44STomer Tayar #define REG_FIFO_ELEMENT_PROTECTION_MASK 0x7 5035c965db44STomer Tayar #define REG_FIFO_ELEMENT_MASTER_SHIFT 43 5036c965db44STomer Tayar #define REG_FIFO_ELEMENT_MASTER_MASK 0xf 5037c965db44STomer Tayar #define REG_FIFO_ELEMENT_ERROR_SHIFT 47 5038c965db44STomer Tayar #define REG_FIFO_ELEMENT_ERROR_MASK 0x1f 5039c965db44STomer Tayar }; 5040c965db44STomer Tayar 5041c965db44STomer Tayar /* IGU fifo element */ 5042c965db44STomer Tayar struct igu_fifo_element { 5043c965db44STomer Tayar u32 dword0; 5044c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_FID_SHIFT 0 5045c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_FID_MASK 0xff 5046c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_IS_PF_SHIFT 8 5047c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_IS_PF_MASK 0x1 5048c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_SOURCE_SHIFT 9 5049c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_SOURCE_MASK 0xf 5050c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_ERR_TYPE_SHIFT 13 5051c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_ERR_TYPE_MASK 0xf 5052c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_CMD_ADDR_SHIFT 17 5053c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_CMD_ADDR_MASK 0x7fff 5054c965db44STomer Tayar u32 dword1; 5055c965db44STomer Tayar u32 dword2; 5056c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD12_IS_WR_CMD_SHIFT 0 5057c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD12_IS_WR_CMD_MASK 0x1 5058c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD12_WR_DATA_SHIFT 1 5059c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD12_WR_DATA_MASK 0xffffffff 5060c965db44STomer Tayar u32 reserved; 5061c965db44STomer Tayar }; 5062c965db44STomer Tayar 5063c965db44STomer Tayar struct igu_fifo_wr_data { 5064c965db44STomer Tayar u32 data; 5065c965db44STomer Tayar #define IGU_FIFO_WR_DATA_PROD_CONS_SHIFT 0 5066c965db44STomer Tayar #define IGU_FIFO_WR_DATA_PROD_CONS_MASK 0xffffff 5067c965db44STomer Tayar #define IGU_FIFO_WR_DATA_UPDATE_FLAG_SHIFT 24 5068c965db44STomer Tayar #define IGU_FIFO_WR_DATA_UPDATE_FLAG_MASK 0x1 5069c965db44STomer Tayar #define IGU_FIFO_WR_DATA_EN_DIS_INT_FOR_SB_SHIFT 25 5070c965db44STomer Tayar #define IGU_FIFO_WR_DATA_EN_DIS_INT_FOR_SB_MASK 0x3 5071c965db44STomer Tayar #define IGU_FIFO_WR_DATA_SEGMENT_SHIFT 27 5072c965db44STomer Tayar #define IGU_FIFO_WR_DATA_SEGMENT_MASK 0x1 5073c965db44STomer Tayar #define IGU_FIFO_WR_DATA_TIMER_MASK_SHIFT 28 5074c965db44STomer Tayar #define IGU_FIFO_WR_DATA_TIMER_MASK_MASK 0x1 5075c965db44STomer Tayar #define IGU_FIFO_WR_DATA_CMD_TYPE_SHIFT 31 5076c965db44STomer Tayar #define IGU_FIFO_WR_DATA_CMD_TYPE_MASK 0x1 5077c965db44STomer Tayar }; 5078c965db44STomer Tayar 5079c965db44STomer Tayar struct igu_fifo_cleanup_wr_data { 5080c965db44STomer Tayar u32 data; 5081c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_RESERVED_SHIFT 0 5082c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_RESERVED_MASK 0x7ffffff 5083c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_VAL_SHIFT 27 5084c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_VAL_MASK 0x1 5085c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_TYPE_SHIFT 28 5086c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_TYPE_MASK 0x7 5087c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CMD_TYPE_SHIFT 31 5088c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CMD_TYPE_MASK 0x1 5089c965db44STomer Tayar }; 5090c965db44STomer Tayar 5091c965db44STomer Tayar /* Protection override element */ 5092c965db44STomer Tayar struct protection_override_element { 5093c965db44STomer Tayar u64 data; 5094c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_ADDRESS_SHIFT 0 5095c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_ADDRESS_MASK 0x7fffff 5096c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WINDOW_SIZE_SHIFT 23 5097c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WINDOW_SIZE_MASK 0xffffff 5098c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_READ_SHIFT 47 5099c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_READ_MASK 0x1 5100c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WRITE_SHIFT 48 5101c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WRITE_MASK 0x1 5102c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_READ_PROTECTION_SHIFT 49 5103c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_READ_PROTECTION_MASK 0x7 5104c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WRITE_PROTECTION_SHIFT 52 5105c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WRITE_PROTECTION_MASK 0x7 5106c965db44STomer Tayar }; 5107c965db44STomer Tayar 5108c965db44STomer Tayar enum igu_fifo_sources { 5109c965db44STomer Tayar IGU_SRC_PXP0, 5110c965db44STomer Tayar IGU_SRC_PXP1, 5111c965db44STomer Tayar IGU_SRC_PXP2, 5112c965db44STomer Tayar IGU_SRC_PXP3, 5113c965db44STomer Tayar IGU_SRC_PXP4, 5114c965db44STomer Tayar IGU_SRC_PXP5, 5115c965db44STomer Tayar IGU_SRC_PXP6, 5116c965db44STomer Tayar IGU_SRC_PXP7, 5117c965db44STomer Tayar IGU_SRC_CAU, 5118c965db44STomer Tayar IGU_SRC_ATTN, 5119c965db44STomer Tayar IGU_SRC_GRC 5120c965db44STomer Tayar }; 5121c965db44STomer Tayar 5122c965db44STomer Tayar enum igu_fifo_addr_types { 5123c965db44STomer Tayar IGU_ADDR_TYPE_MSIX_MEM, 5124c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_PBA, 5125c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_INT_ACK, 5126c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_ATTN_BITS, 5127c965db44STomer Tayar IGU_ADDR_TYPE_READ_INT, 5128c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_PROD_UPDATE, 5129c965db44STomer Tayar IGU_ADDR_TYPE_RESERVED 5130c965db44STomer Tayar }; 5131c965db44STomer Tayar 5132c965db44STomer Tayar struct igu_fifo_addr_data { 5133c965db44STomer Tayar u16 start_addr; 5134c965db44STomer Tayar u16 end_addr; 5135c965db44STomer Tayar char *desc; 5136c965db44STomer Tayar char *vf_desc; 5137c965db44STomer Tayar enum igu_fifo_addr_types type; 5138c965db44STomer Tayar }; 5139c965db44STomer Tayar 5140c965db44STomer Tayar /******************************** Constants **********************************/ 5141c965db44STomer Tayar 5142c965db44STomer Tayar #define MAX_MSG_LEN 1024 5143c965db44STomer Tayar #define MCP_TRACE_MAX_MODULE_LEN 8 5144c965db44STomer Tayar #define MCP_TRACE_FORMAT_MAX_PARAMS 3 5145c965db44STomer Tayar #define MCP_TRACE_FORMAT_PARAM_WIDTH \ 5146c965db44STomer Tayar (MCP_TRACE_FORMAT_P2_SIZE_SHIFT - MCP_TRACE_FORMAT_P1_SIZE_SHIFT) 5147c965db44STomer Tayar #define REG_FIFO_ELEMENT_ADDR_FACTOR 4 5148c965db44STomer Tayar #define REG_FIFO_ELEMENT_IS_PF_VF_VAL 127 5149c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_ADDR_FACTOR 4 5150c965db44STomer Tayar 5151c965db44STomer Tayar /********************************* Macros ************************************/ 5152c965db44STomer Tayar 5153c965db44STomer Tayar #define BYTES_TO_DWORDS(bytes) ((bytes) / BYTES_IN_DWORD) 5154c965db44STomer Tayar 5155c965db44STomer Tayar /***************************** Constant Arrays *******************************/ 5156c965db44STomer Tayar 5157c965db44STomer Tayar /* Status string array */ 5158c965db44STomer Tayar static const char * const s_status_str[] = { 5159c965db44STomer Tayar "Operation completed successfully", 5160c965db44STomer Tayar "Debug application version wasn't set", 5161c965db44STomer Tayar "Unsupported debug application version", 5162c965db44STomer Tayar "The debug block wasn't reset since the last recording", 5163c965db44STomer Tayar "Invalid arguments", 5164c965db44STomer Tayar "The debug output was already set", 5165c965db44STomer Tayar "Invalid PCI buffer size", 5166c965db44STomer Tayar "PCI buffer allocation failed", 5167c965db44STomer Tayar "A PCI buffer wasn't allocated", 5168c965db44STomer Tayar "Too many inputs were enabled. Enabled less inputs, or set 'unifyInputs' to true", 5169c965db44STomer Tayar "GRC/Timestamp input overlap in cycle dword 0", 5170c965db44STomer Tayar "Cannot record Storm data since the entire recording cycle is used by HW", 5171c965db44STomer Tayar "The Storm was already enabled", 5172c965db44STomer Tayar "The specified Storm wasn't enabled", 5173c965db44STomer Tayar "The block was already enabled", 5174c965db44STomer Tayar "The specified block wasn't enabled", 5175c965db44STomer Tayar "No input was enabled for recording", 5176c965db44STomer Tayar "Filters and triggers are not allowed when recording in 64b units", 5177c965db44STomer Tayar "The filter was already enabled", 5178c965db44STomer Tayar "The trigger was already enabled", 5179c965db44STomer Tayar "The trigger wasn't enabled", 5180c965db44STomer Tayar "A constraint can be added only after a filter was enabled or a trigger state was added", 5181c965db44STomer Tayar "Cannot add more than 3 trigger states", 5182c965db44STomer Tayar "Cannot add more than 4 constraints per filter or trigger state", 5183c965db44STomer Tayar "The recording wasn't started", 5184c965db44STomer Tayar "A trigger was configured, but it didn't trigger", 5185c965db44STomer Tayar "No data was recorded", 5186c965db44STomer Tayar "Dump buffer is too small", 5187c965db44STomer Tayar "Dumped data is not aligned to chunks", 5188c965db44STomer Tayar "Unknown chip", 5189c965db44STomer Tayar "Failed allocating virtual memory", 5190c965db44STomer Tayar "The input block is in reset", 5191c965db44STomer Tayar "Invalid MCP trace signature found in NVRAM", 5192c965db44STomer Tayar "Invalid bundle ID found in NVRAM", 5193c965db44STomer Tayar "Failed getting NVRAM image", 5194c965db44STomer Tayar "NVRAM image is not dword-aligned", 5195c965db44STomer Tayar "Failed reading from NVRAM", 5196c965db44STomer Tayar "Idle check parsing failed", 5197c965db44STomer Tayar "MCP Trace data is corrupt", 5198c965db44STomer Tayar "Dump doesn't contain meta data - it must be provided in an image file", 5199c965db44STomer Tayar "Failed to halt MCP", 5200c965db44STomer Tayar "Failed to resume MCP after halt", 5201c965db44STomer Tayar "DMAE transaction failed", 5202c965db44STomer Tayar "Failed to empty SEMI sync FIFO", 5203c965db44STomer Tayar "IGU FIFO data is corrupt", 5204c965db44STomer Tayar "MCP failed to mask parities", 5205c965db44STomer Tayar "FW Asserts parsing failed", 5206c965db44STomer Tayar "GRC FIFO data is corrupt", 5207c965db44STomer Tayar "Protection Override data is corrupt", 5208c965db44STomer Tayar "Debug arrays were not set (when using binary files, dbg_set_bin_ptr must be called)", 5209c965db44STomer Tayar "When a block is filtered, no other blocks can be recorded unless inputs are unified (due to a HW bug)" 5210c965db44STomer Tayar }; 5211c965db44STomer Tayar 5212c965db44STomer Tayar /* Idle check severity names array */ 5213c965db44STomer Tayar static const char * const s_idle_chk_severity_str[] = { 5214c965db44STomer Tayar "Error", 5215c965db44STomer Tayar "Error if no traffic", 5216c965db44STomer Tayar "Warning" 5217c965db44STomer Tayar }; 5218c965db44STomer Tayar 5219c965db44STomer Tayar /* MCP Trace level names array */ 5220c965db44STomer Tayar static const char * const s_mcp_trace_level_str[] = { 5221c965db44STomer Tayar "ERROR", 5222c965db44STomer Tayar "TRACE", 5223c965db44STomer Tayar "DEBUG" 5224c965db44STomer Tayar }; 5225c965db44STomer Tayar 5226c965db44STomer Tayar /* Parsing strings */ 5227c965db44STomer Tayar static const char * const s_access_strs[] = { 5228c965db44STomer Tayar "read", 5229c965db44STomer Tayar "write" 5230c965db44STomer Tayar }; 5231c965db44STomer Tayar 5232c965db44STomer Tayar static const char * const s_privilege_strs[] = { 5233c965db44STomer Tayar "VF", 5234c965db44STomer Tayar "PDA", 5235c965db44STomer Tayar "HV", 5236c965db44STomer Tayar "UA" 5237c965db44STomer Tayar }; 5238c965db44STomer Tayar 5239c965db44STomer Tayar static const char * const s_protection_strs[] = { 5240c965db44STomer Tayar "(default)", 5241c965db44STomer Tayar "(default)", 5242c965db44STomer Tayar "(default)", 5243c965db44STomer Tayar "(default)", 5244c965db44STomer Tayar "override VF", 5245c965db44STomer Tayar "override PDA", 5246c965db44STomer Tayar "override HV", 5247c965db44STomer Tayar "override UA" 5248c965db44STomer Tayar }; 5249c965db44STomer Tayar 5250c965db44STomer Tayar static const char * const s_master_strs[] = { 5251c965db44STomer Tayar "???", 5252c965db44STomer Tayar "pxp", 5253c965db44STomer Tayar "mcp", 5254c965db44STomer Tayar "msdm", 5255c965db44STomer Tayar "psdm", 5256c965db44STomer Tayar "ysdm", 5257c965db44STomer Tayar "usdm", 5258c965db44STomer Tayar "tsdm", 5259c965db44STomer Tayar "xsdm", 5260c965db44STomer Tayar "dbu", 5261c965db44STomer Tayar "dmae", 5262c965db44STomer Tayar "???", 5263c965db44STomer Tayar "???", 5264c965db44STomer Tayar "???", 5265c965db44STomer Tayar "???", 5266c965db44STomer Tayar "???" 5267c965db44STomer Tayar }; 5268c965db44STomer Tayar 5269c965db44STomer Tayar static const char * const s_reg_fifo_error_strs[] = { 5270c965db44STomer Tayar "grc timeout", 5271c965db44STomer Tayar "address doesn't belong to any block", 5272c965db44STomer Tayar "reserved address in block or write to read-only address", 5273c965db44STomer Tayar "privilege/protection mismatch", 5274c965db44STomer Tayar "path isolation error" 5275c965db44STomer Tayar }; 5276c965db44STomer Tayar 5277c965db44STomer Tayar static const char * const s_igu_fifo_source_strs[] = { 5278c965db44STomer Tayar "TSTORM", 5279c965db44STomer Tayar "MSTORM", 5280c965db44STomer Tayar "USTORM", 5281c965db44STomer Tayar "XSTORM", 5282c965db44STomer Tayar "YSTORM", 5283c965db44STomer Tayar "PSTORM", 5284c965db44STomer Tayar "PCIE", 5285c965db44STomer Tayar "NIG_QM_PBF", 5286c965db44STomer Tayar "CAU", 5287c965db44STomer Tayar "ATTN", 5288c965db44STomer Tayar "GRC", 5289c965db44STomer Tayar }; 5290c965db44STomer Tayar 5291c965db44STomer Tayar static const char * const s_igu_fifo_error_strs[] = { 5292c965db44STomer Tayar "no error", 5293c965db44STomer Tayar "length error", 5294c965db44STomer Tayar "function disabled", 5295c965db44STomer Tayar "VF sent command to attnetion address", 5296c965db44STomer Tayar "host sent prod update command", 5297c965db44STomer Tayar "read of during interrupt register while in MIMD mode", 5298c965db44STomer Tayar "access to PXP BAR reserved address", 5299c965db44STomer Tayar "producer update command to attention index", 5300c965db44STomer Tayar "unknown error", 5301c965db44STomer Tayar "SB index not valid", 5302c965db44STomer Tayar "SB relative index and FID not found", 5303c965db44STomer Tayar "FID not match", 5304c965db44STomer Tayar "command with error flag asserted (PCI error or CAU discard)", 5305c965db44STomer Tayar "VF sent cleanup and RF cleanup is disabled", 5306c965db44STomer Tayar "cleanup command on type bigger than 4" 5307c965db44STomer Tayar }; 5308c965db44STomer Tayar 5309c965db44STomer Tayar /* IGU FIFO address data */ 5310c965db44STomer Tayar static const struct igu_fifo_addr_data s_igu_fifo_addr_data[] = { 5311c965db44STomer Tayar {0x0, 0x101, "MSI-X Memory", NULL, IGU_ADDR_TYPE_MSIX_MEM}, 5312c965db44STomer Tayar {0x102, 0x1ff, "reserved", NULL, IGU_ADDR_TYPE_RESERVED}, 5313c965db44STomer Tayar {0x200, 0x200, "Write PBA[0:63]", NULL, IGU_ADDR_TYPE_WRITE_PBA}, 5314c965db44STomer Tayar {0x201, 0x201, "Write PBA[64:127]", "reserved", 5315c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_PBA}, 5316c965db44STomer Tayar {0x202, 0x202, "Write PBA[128]", "reserved", IGU_ADDR_TYPE_WRITE_PBA}, 5317c965db44STomer Tayar {0x203, 0x3ff, "reserved", NULL, IGU_ADDR_TYPE_RESERVED}, 5318c965db44STomer Tayar {0x400, 0x5ef, "Write interrupt acknowledgment", NULL, 5319c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_INT_ACK}, 5320c965db44STomer Tayar {0x5f0, 0x5f0, "Attention bits update", NULL, 5321c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_ATTN_BITS}, 5322c965db44STomer Tayar {0x5f1, 0x5f1, "Attention bits set", NULL, 5323c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_ATTN_BITS}, 5324c965db44STomer Tayar {0x5f2, 0x5f2, "Attention bits clear", NULL, 5325c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_ATTN_BITS}, 5326c965db44STomer Tayar {0x5f3, 0x5f3, "Read interrupt 0:63 with mask", NULL, 5327c965db44STomer Tayar IGU_ADDR_TYPE_READ_INT}, 5328c965db44STomer Tayar {0x5f4, 0x5f4, "Read interrupt 0:31 with mask", NULL, 5329c965db44STomer Tayar IGU_ADDR_TYPE_READ_INT}, 5330c965db44STomer Tayar {0x5f5, 0x5f5, "Read interrupt 32:63 with mask", NULL, 5331c965db44STomer Tayar IGU_ADDR_TYPE_READ_INT}, 5332c965db44STomer Tayar {0x5f6, 0x5f6, "Read interrupt 0:63 without mask", NULL, 5333c965db44STomer Tayar IGU_ADDR_TYPE_READ_INT}, 5334c965db44STomer Tayar {0x5f7, 0x5ff, "reserved", NULL, IGU_ADDR_TYPE_RESERVED}, 5335c965db44STomer Tayar {0x600, 0x7ff, "Producer update", NULL, IGU_ADDR_TYPE_WRITE_PROD_UPDATE} 5336c965db44STomer Tayar }; 5337c965db44STomer Tayar 5338c965db44STomer Tayar /******************************** Variables **********************************/ 5339c965db44STomer Tayar 5340c965db44STomer Tayar /* MCP Trace meta data - used in case the dump doesn't contain the meta data 5341c965db44STomer Tayar * (e.g. due to no NVRAM access). 5342c965db44STomer Tayar */ 5343c965db44STomer Tayar static struct dbg_array s_mcp_trace_meta = { NULL, 0 }; 5344c965db44STomer Tayar 5345c965db44STomer Tayar /* Temporary buffer, used for print size calculations */ 5346c965db44STomer Tayar static char s_temp_buf[MAX_MSG_LEN]; 5347c965db44STomer Tayar 5348c965db44STomer Tayar /***************************** Public Functions *******************************/ 5349c965db44STomer Tayar 5350c965db44STomer Tayar enum dbg_status qed_dbg_user_set_bin_ptr(const u8 * const bin_ptr) 5351c965db44STomer Tayar { 5352c965db44STomer Tayar /* Convert binary data to debug arrays */ 5353be086e7cSMintz, Yuval struct bin_buffer_hdr *buf_array = (struct bin_buffer_hdr *)bin_ptr; 5354c965db44STomer Tayar u8 buf_id; 5355c965db44STomer Tayar 5356be086e7cSMintz, Yuval for (buf_id = 0; buf_id < MAX_BIN_DBG_BUFFER_TYPE; buf_id++) { 5357c965db44STomer Tayar s_dbg_arrays[buf_id].ptr = 5358c965db44STomer Tayar (u32 *)(bin_ptr + buf_array[buf_id].offset); 5359c965db44STomer Tayar s_dbg_arrays[buf_id].size_in_dwords = 5360c965db44STomer Tayar BYTES_TO_DWORDS(buf_array[buf_id].length); 5361c965db44STomer Tayar } 5362c965db44STomer Tayar 5363c965db44STomer Tayar return DBG_STATUS_OK; 5364c965db44STomer Tayar } 5365c965db44STomer Tayar 5366c965db44STomer Tayar static u32 qed_cyclic_add(u32 a, u32 b, u32 size) 5367c965db44STomer Tayar { 5368c965db44STomer Tayar return (a + b) % size; 5369c965db44STomer Tayar } 5370c965db44STomer Tayar 5371c965db44STomer Tayar static u32 qed_cyclic_sub(u32 a, u32 b, u32 size) 5372c965db44STomer Tayar { 5373c965db44STomer Tayar return (size + a - b) % size; 5374c965db44STomer Tayar } 5375c965db44STomer Tayar 5376c965db44STomer Tayar /* Reads the specified number of bytes from the specified cyclic buffer (up to 4 5377c965db44STomer Tayar * bytes) and returns them as a dword value. the specified buffer offset is 5378c965db44STomer Tayar * updated. 5379c965db44STomer Tayar */ 5380c965db44STomer Tayar static u32 qed_read_from_cyclic_buf(void *buf, 5381c965db44STomer Tayar u32 *offset, 5382c965db44STomer Tayar u32 buf_size, u8 num_bytes_to_read) 5383c965db44STomer Tayar { 5384c965db44STomer Tayar u8 *bytes_buf = (u8 *)buf; 5385c965db44STomer Tayar u8 *val_ptr; 5386c965db44STomer Tayar u32 val = 0; 5387c965db44STomer Tayar u8 i; 5388c965db44STomer Tayar 5389c965db44STomer Tayar val_ptr = (u8 *)&val; 5390c965db44STomer Tayar 5391c965db44STomer Tayar for (i = 0; i < num_bytes_to_read; i++) { 5392c965db44STomer Tayar val_ptr[i] = bytes_buf[*offset]; 5393c965db44STomer Tayar *offset = qed_cyclic_add(*offset, 1, buf_size); 5394c965db44STomer Tayar } 5395c965db44STomer Tayar 5396c965db44STomer Tayar return val; 5397c965db44STomer Tayar } 5398c965db44STomer Tayar 5399c965db44STomer Tayar /* Reads and returns the next byte from the specified buffer. 5400c965db44STomer Tayar * The specified buffer offset is updated. 5401c965db44STomer Tayar */ 5402c965db44STomer Tayar static u8 qed_read_byte_from_buf(void *buf, u32 *offset) 5403c965db44STomer Tayar { 5404c965db44STomer Tayar return ((u8 *)buf)[(*offset)++]; 5405c965db44STomer Tayar } 5406c965db44STomer Tayar 5407c965db44STomer Tayar /* Reads and returns the next dword from the specified buffer. 5408c965db44STomer Tayar * The specified buffer offset is updated. 5409c965db44STomer Tayar */ 5410c965db44STomer Tayar static u32 qed_read_dword_from_buf(void *buf, u32 *offset) 5411c965db44STomer Tayar { 5412c965db44STomer Tayar u32 dword_val = *(u32 *)&((u8 *)buf)[*offset]; 5413c965db44STomer Tayar 5414c965db44STomer Tayar *offset += 4; 5415c965db44STomer Tayar return dword_val; 5416c965db44STomer Tayar } 5417c965db44STomer Tayar 5418c965db44STomer Tayar /* Reads the next string from the specified buffer, and copies it to the 5419c965db44STomer Tayar * specified pointer. The specified buffer offset is updated. 5420c965db44STomer Tayar */ 5421c965db44STomer Tayar static void qed_read_str_from_buf(void *buf, u32 *offset, u32 size, char *dest) 5422c965db44STomer Tayar { 5423c965db44STomer Tayar const char *source_str = &((const char *)buf)[*offset]; 5424c965db44STomer Tayar 5425c965db44STomer Tayar strncpy(dest, source_str, size); 5426c965db44STomer Tayar dest[size - 1] = '\0'; 5427c965db44STomer Tayar *offset += size; 5428c965db44STomer Tayar } 5429c965db44STomer Tayar 5430c965db44STomer Tayar /* Returns a pointer to the specified offset (in bytes) of the specified buffer. 5431c965db44STomer Tayar * If the specified buffer in NULL, a temporary buffer pointer is returned. 5432c965db44STomer Tayar */ 5433c965db44STomer Tayar static char *qed_get_buf_ptr(void *buf, u32 offset) 5434c965db44STomer Tayar { 5435c965db44STomer Tayar return buf ? (char *)buf + offset : s_temp_buf; 5436c965db44STomer Tayar } 5437c965db44STomer Tayar 5438c965db44STomer Tayar /* Reads a param from the specified buffer. Returns the number of dwords read. 5439c965db44STomer Tayar * If the returned str_param is NULL, the param is numeric and its value is 5440c965db44STomer Tayar * returned in num_param. 5441c965db44STomer Tayar * Otheriwise, the param is a string and its pointer is returned in str_param. 5442c965db44STomer Tayar */ 5443c965db44STomer Tayar static u32 qed_read_param(u32 *dump_buf, 5444c965db44STomer Tayar const char **param_name, 5445c965db44STomer Tayar const char **param_str_val, u32 *param_num_val) 5446c965db44STomer Tayar { 5447c965db44STomer Tayar char *char_buf = (char *)dump_buf; 5448c965db44STomer Tayar u32 offset = 0; /* In bytes */ 5449c965db44STomer Tayar 5450c965db44STomer Tayar /* Extract param name */ 5451c965db44STomer Tayar *param_name = char_buf; 5452c965db44STomer Tayar offset += strlen(*param_name) + 1; 5453c965db44STomer Tayar 5454c965db44STomer Tayar /* Check param type */ 5455c965db44STomer Tayar if (*(char_buf + offset++)) { 5456c965db44STomer Tayar /* String param */ 5457c965db44STomer Tayar *param_str_val = char_buf + offset; 5458c965db44STomer Tayar offset += strlen(*param_str_val) + 1; 5459c965db44STomer Tayar if (offset & 0x3) 5460c965db44STomer Tayar offset += (4 - (offset & 0x3)); 5461c965db44STomer Tayar } else { 5462c965db44STomer Tayar /* Numeric param */ 5463c965db44STomer Tayar *param_str_val = NULL; 5464c965db44STomer Tayar if (offset & 0x3) 5465c965db44STomer Tayar offset += (4 - (offset & 0x3)); 5466c965db44STomer Tayar *param_num_val = *(u32 *)(char_buf + offset); 5467c965db44STomer Tayar offset += 4; 5468c965db44STomer Tayar } 5469c965db44STomer Tayar 5470c965db44STomer Tayar return offset / 4; 5471c965db44STomer Tayar } 5472c965db44STomer Tayar 5473c965db44STomer Tayar /* Reads a section header from the specified buffer. 5474c965db44STomer Tayar * Returns the number of dwords read. 5475c965db44STomer Tayar */ 5476c965db44STomer Tayar static u32 qed_read_section_hdr(u32 *dump_buf, 5477c965db44STomer Tayar const char **section_name, 5478c965db44STomer Tayar u32 *num_section_params) 5479c965db44STomer Tayar { 5480c965db44STomer Tayar const char *param_str_val; 5481c965db44STomer Tayar 5482c965db44STomer Tayar return qed_read_param(dump_buf, 5483c965db44STomer Tayar section_name, ¶m_str_val, num_section_params); 5484c965db44STomer Tayar } 5485c965db44STomer Tayar 5486c965db44STomer Tayar /* Reads section params from the specified buffer and prints them to the results 5487c965db44STomer Tayar * buffer. Returns the number of dwords read. 5488c965db44STomer Tayar */ 5489c965db44STomer Tayar static u32 qed_print_section_params(u32 *dump_buf, 5490c965db44STomer Tayar u32 num_section_params, 5491c965db44STomer Tayar char *results_buf, u32 *num_chars_printed) 5492c965db44STomer Tayar { 5493c965db44STomer Tayar u32 i, dump_offset = 0, results_offset = 0; 5494c965db44STomer Tayar 5495c965db44STomer Tayar for (i = 0; i < num_section_params; i++) { 5496c965db44STomer Tayar const char *param_name; 5497c965db44STomer Tayar const char *param_str_val; 5498c965db44STomer Tayar u32 param_num_val = 0; 5499c965db44STomer Tayar 5500c965db44STomer Tayar dump_offset += qed_read_param(dump_buf + dump_offset, 5501c965db44STomer Tayar ¶m_name, 5502c965db44STomer Tayar ¶m_str_val, ¶m_num_val); 5503c965db44STomer Tayar if (param_str_val) 5504c965db44STomer Tayar /* String param */ 5505c965db44STomer Tayar results_offset += 5506c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5507c965db44STomer Tayar results_offset), 5508c965db44STomer Tayar "%s: %s\n", param_name, param_str_val); 5509c965db44STomer Tayar else if (strcmp(param_name, "fw-timestamp")) 5510c965db44STomer Tayar /* Numeric param */ 5511c965db44STomer Tayar results_offset += 5512c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5513c965db44STomer Tayar results_offset), 5514c965db44STomer Tayar "%s: %d\n", param_name, param_num_val); 5515c965db44STomer Tayar } 5516c965db44STomer Tayar 5517c965db44STomer Tayar results_offset += 5518c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, results_offset), "\n"); 5519c965db44STomer Tayar *num_chars_printed = results_offset; 5520c965db44STomer Tayar return dump_offset; 5521c965db44STomer Tayar } 5522c965db44STomer Tayar 5523c965db44STomer Tayar const char *qed_dbg_get_status_str(enum dbg_status status) 5524c965db44STomer Tayar { 5525c965db44STomer Tayar return (status < 5526c965db44STomer Tayar MAX_DBG_STATUS) ? s_status_str[status] : "Invalid debug status"; 5527c965db44STomer Tayar } 5528c965db44STomer Tayar 5529c965db44STomer Tayar /* Parses the idle check rules and returns the number of characters printed. 5530c965db44STomer Tayar * In case of parsing error, returns 0. 5531c965db44STomer Tayar */ 5532c965db44STomer Tayar static u32 qed_parse_idle_chk_dump_rules(struct qed_hwfn *p_hwfn, 5533c965db44STomer Tayar u32 *dump_buf, 5534c965db44STomer Tayar u32 *dump_buf_end, 5535c965db44STomer Tayar u32 num_rules, 5536c965db44STomer Tayar bool print_fw_idle_chk, 5537c965db44STomer Tayar char *results_buf, 5538c965db44STomer Tayar u32 *num_errors, u32 *num_warnings) 5539c965db44STomer Tayar { 5540c965db44STomer Tayar u32 rule_idx, results_offset = 0; /* Offset in results_buf in bytes */ 5541c965db44STomer Tayar u16 i, j; 5542c965db44STomer Tayar 5543c965db44STomer Tayar *num_errors = 0; 5544c965db44STomer Tayar *num_warnings = 0; 5545c965db44STomer Tayar 5546c965db44STomer Tayar /* Go over dumped results */ 5547c965db44STomer Tayar for (rule_idx = 0; rule_idx < num_rules && dump_buf < dump_buf_end; 5548c965db44STomer Tayar rule_idx++) { 5549c965db44STomer Tayar const struct dbg_idle_chk_rule_parsing_data *rule_parsing_data; 5550c965db44STomer Tayar struct dbg_idle_chk_result_hdr *hdr; 5551c965db44STomer Tayar const char *parsing_str; 5552c965db44STomer Tayar u32 parsing_str_offset; 5553c965db44STomer Tayar const char *lsi_msg; 5554c965db44STomer Tayar u8 curr_reg_id = 0; 5555c965db44STomer Tayar bool has_fw_msg; 5556c965db44STomer Tayar 5557c965db44STomer Tayar hdr = (struct dbg_idle_chk_result_hdr *)dump_buf; 5558c965db44STomer Tayar rule_parsing_data = 5559c965db44STomer Tayar (const struct dbg_idle_chk_rule_parsing_data *) 5560c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_PARSING_DATA]. 5561c965db44STomer Tayar ptr[hdr->rule_id]; 5562c965db44STomer Tayar parsing_str_offset = 5563c965db44STomer Tayar GET_FIELD(rule_parsing_data->data, 5564c965db44STomer Tayar DBG_IDLE_CHK_RULE_PARSING_DATA_STR_OFFSET); 5565c965db44STomer Tayar has_fw_msg = 5566c965db44STomer Tayar GET_FIELD(rule_parsing_data->data, 5567c965db44STomer Tayar DBG_IDLE_CHK_RULE_PARSING_DATA_HAS_FW_MSG) > 0; 5568c965db44STomer Tayar parsing_str = &((const char *) 5569c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_PARSING_STRINGS].ptr) 5570c965db44STomer Tayar [parsing_str_offset]; 5571c965db44STomer Tayar lsi_msg = parsing_str; 5572c965db44STomer Tayar 5573c965db44STomer Tayar if (hdr->severity >= MAX_DBG_IDLE_CHK_SEVERITY_TYPES) 5574c965db44STomer Tayar return 0; 5575c965db44STomer Tayar 5576c965db44STomer Tayar /* Skip rule header */ 5577c965db44STomer Tayar dump_buf += (sizeof(struct dbg_idle_chk_result_hdr) / 4); 5578c965db44STomer Tayar 5579c965db44STomer Tayar /* Update errors/warnings count */ 5580c965db44STomer Tayar if (hdr->severity == IDLE_CHK_SEVERITY_ERROR || 5581c965db44STomer Tayar hdr->severity == IDLE_CHK_SEVERITY_ERROR_NO_TRAFFIC) 5582c965db44STomer Tayar (*num_errors)++; 5583c965db44STomer Tayar else 5584c965db44STomer Tayar (*num_warnings)++; 5585c965db44STomer Tayar 5586c965db44STomer Tayar /* Print rule severity */ 5587c965db44STomer Tayar results_offset += 5588c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5589c965db44STomer Tayar results_offset), "%s: ", 5590c965db44STomer Tayar s_idle_chk_severity_str[hdr->severity]); 5591c965db44STomer Tayar 5592c965db44STomer Tayar /* Print rule message */ 5593c965db44STomer Tayar if (has_fw_msg) 5594c965db44STomer Tayar parsing_str += strlen(parsing_str) + 1; 5595c965db44STomer Tayar results_offset += 5596c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5597c965db44STomer Tayar results_offset), "%s.", 5598c965db44STomer Tayar has_fw_msg && 5599c965db44STomer Tayar print_fw_idle_chk ? parsing_str : lsi_msg); 5600c965db44STomer Tayar parsing_str += strlen(parsing_str) + 1; 5601c965db44STomer Tayar 5602c965db44STomer Tayar /* Print register values */ 5603c965db44STomer Tayar results_offset += 5604c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5605c965db44STomer Tayar results_offset), " Registers:"); 5606c965db44STomer Tayar for (i = 0; 5607c965db44STomer Tayar i < hdr->num_dumped_cond_regs + hdr->num_dumped_info_regs; 5608c965db44STomer Tayar i++) { 5609c965db44STomer Tayar struct dbg_idle_chk_result_reg_hdr *reg_hdr 5610c965db44STomer Tayar = (struct dbg_idle_chk_result_reg_hdr *) 5611c965db44STomer Tayar dump_buf; 5612c965db44STomer Tayar bool is_mem = 5613c965db44STomer Tayar GET_FIELD(reg_hdr->data, 5614c965db44STomer Tayar DBG_IDLE_CHK_RESULT_REG_HDR_IS_MEM); 5615c965db44STomer Tayar u8 reg_id = 5616c965db44STomer Tayar GET_FIELD(reg_hdr->data, 5617c965db44STomer Tayar DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID); 5618c965db44STomer Tayar 5619c965db44STomer Tayar /* Skip reg header */ 5620c965db44STomer Tayar dump_buf += 5621c965db44STomer Tayar (sizeof(struct dbg_idle_chk_result_reg_hdr) / 4); 5622c965db44STomer Tayar 5623c965db44STomer Tayar /* Skip register names until the required reg_id is 5624c965db44STomer Tayar * reached. 5625c965db44STomer Tayar */ 5626c965db44STomer Tayar for (; reg_id > curr_reg_id; 5627c965db44STomer Tayar curr_reg_id++, 5628c965db44STomer Tayar parsing_str += strlen(parsing_str) + 1); 5629c965db44STomer Tayar 5630c965db44STomer Tayar results_offset += 5631c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5632c965db44STomer Tayar results_offset), " %s", 5633c965db44STomer Tayar parsing_str); 5634c965db44STomer Tayar if (i < hdr->num_dumped_cond_regs && is_mem) 5635c965db44STomer Tayar results_offset += 5636c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5637c965db44STomer Tayar results_offset), 5638c965db44STomer Tayar "[%d]", hdr->mem_entry_id + 5639c965db44STomer Tayar reg_hdr->start_entry); 5640c965db44STomer Tayar results_offset += 5641c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5642c965db44STomer Tayar results_offset), "="); 5643c965db44STomer Tayar for (j = 0; j < reg_hdr->size; j++, dump_buf++) { 5644c965db44STomer Tayar results_offset += 5645c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5646c965db44STomer Tayar results_offset), 5647c965db44STomer Tayar "0x%x", *dump_buf); 5648c965db44STomer Tayar if (j < reg_hdr->size - 1) 5649c965db44STomer Tayar results_offset += 5650c965db44STomer Tayar sprintf(qed_get_buf_ptr 5651c965db44STomer Tayar (results_buf, 5652c965db44STomer Tayar results_offset), ","); 5653c965db44STomer Tayar } 5654c965db44STomer Tayar } 5655c965db44STomer Tayar 5656c965db44STomer Tayar results_offset += 5657c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, results_offset), "\n"); 5658c965db44STomer Tayar } 5659c965db44STomer Tayar 5660c965db44STomer Tayar /* Check if end of dump buffer was exceeded */ 5661c965db44STomer Tayar if (dump_buf > dump_buf_end) 5662c965db44STomer Tayar return 0; 5663c965db44STomer Tayar return results_offset; 5664c965db44STomer Tayar } 5665c965db44STomer Tayar 5666c965db44STomer Tayar /* Parses an idle check dump buffer. 5667c965db44STomer Tayar * If result_buf is not NULL, the idle check results are printed to it. 5668c965db44STomer Tayar * In any case, the required results buffer size is assigned to 5669c965db44STomer Tayar * parsed_results_bytes. 5670c965db44STomer Tayar * The parsing status is returned. 5671c965db44STomer Tayar */ 5672c965db44STomer Tayar static enum dbg_status qed_parse_idle_chk_dump(struct qed_hwfn *p_hwfn, 5673c965db44STomer Tayar u32 *dump_buf, 5674c965db44STomer Tayar u32 num_dumped_dwords, 5675c965db44STomer Tayar char *results_buf, 5676c965db44STomer Tayar u32 *parsed_results_bytes, 5677c965db44STomer Tayar u32 *num_errors, 5678c965db44STomer Tayar u32 *num_warnings) 5679c965db44STomer Tayar { 5680c965db44STomer Tayar const char *section_name, *param_name, *param_str_val; 5681c965db44STomer Tayar u32 *dump_buf_end = dump_buf + num_dumped_dwords; 5682c965db44STomer Tayar u32 num_section_params = 0, num_rules; 5683c965db44STomer Tayar u32 results_offset = 0; /* Offset in results_buf in bytes */ 5684c965db44STomer Tayar 5685c965db44STomer Tayar *parsed_results_bytes = 0; 5686c965db44STomer Tayar *num_errors = 0; 5687c965db44STomer Tayar *num_warnings = 0; 5688c965db44STomer Tayar if (!s_dbg_arrays[BIN_BUF_DBG_PARSING_STRINGS].ptr || 5689c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_PARSING_DATA].ptr) 5690c965db44STomer Tayar return DBG_STATUS_DBG_ARRAY_NOT_SET; 5691c965db44STomer Tayar 5692c965db44STomer Tayar /* Read global_params section */ 5693c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 5694c965db44STomer Tayar §ion_name, &num_section_params); 5695c965db44STomer Tayar if (strcmp(section_name, "global_params")) 5696c965db44STomer Tayar return DBG_STATUS_IDLE_CHK_PARSE_FAILED; 5697c965db44STomer Tayar 5698c965db44STomer Tayar /* Print global params */ 5699c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 5700c965db44STomer Tayar num_section_params, 5701c965db44STomer Tayar results_buf, &results_offset); 5702c965db44STomer Tayar 5703c965db44STomer Tayar /* Read idle_chk section */ 5704c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 5705c965db44STomer Tayar §ion_name, &num_section_params); 5706c965db44STomer Tayar if (strcmp(section_name, "idle_chk") || num_section_params != 1) 5707c965db44STomer Tayar return DBG_STATUS_IDLE_CHK_PARSE_FAILED; 5708c965db44STomer Tayar 5709c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 5710c965db44STomer Tayar ¶m_name, ¶m_str_val, &num_rules); 5711c965db44STomer Tayar if (strcmp(param_name, "num_rules") != 0) 5712c965db44STomer Tayar return DBG_STATUS_IDLE_CHK_PARSE_FAILED; 5713c965db44STomer Tayar 5714c965db44STomer Tayar if (num_rules) { 5715c965db44STomer Tayar u32 rules_print_size; 5716c965db44STomer Tayar 5717c965db44STomer Tayar /* Print FW output */ 5718c965db44STomer Tayar results_offset += 5719c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5720c965db44STomer Tayar results_offset), 5721c965db44STomer Tayar "FW_IDLE_CHECK:\n"); 5722c965db44STomer Tayar rules_print_size = 5723c965db44STomer Tayar qed_parse_idle_chk_dump_rules(p_hwfn, dump_buf, 5724c965db44STomer Tayar dump_buf_end, num_rules, 5725c965db44STomer Tayar true, 5726c965db44STomer Tayar results_buf ? 5727c965db44STomer Tayar results_buf + 5728c965db44STomer Tayar results_offset : NULL, 5729c965db44STomer Tayar num_errors, num_warnings); 5730c965db44STomer Tayar results_offset += rules_print_size; 5731c965db44STomer Tayar if (rules_print_size == 0) 5732c965db44STomer Tayar return DBG_STATUS_IDLE_CHK_PARSE_FAILED; 5733c965db44STomer Tayar 5734c965db44STomer Tayar /* Print LSI output */ 5735c965db44STomer Tayar results_offset += 5736c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5737c965db44STomer Tayar results_offset), 5738c965db44STomer Tayar "\nLSI_IDLE_CHECK:\n"); 5739c965db44STomer Tayar rules_print_size = 5740c965db44STomer Tayar qed_parse_idle_chk_dump_rules(p_hwfn, dump_buf, 5741c965db44STomer Tayar dump_buf_end, num_rules, 5742c965db44STomer Tayar false, 5743c965db44STomer Tayar results_buf ? 5744c965db44STomer Tayar results_buf + 5745c965db44STomer Tayar results_offset : NULL, 5746c965db44STomer Tayar num_errors, num_warnings); 5747c965db44STomer Tayar results_offset += rules_print_size; 5748c965db44STomer Tayar if (rules_print_size == 0) 5749c965db44STomer Tayar return DBG_STATUS_IDLE_CHK_PARSE_FAILED; 5750c965db44STomer Tayar } 5751c965db44STomer Tayar 5752c965db44STomer Tayar /* Print errors/warnings count */ 5753c965db44STomer Tayar if (*num_errors) { 5754c965db44STomer Tayar results_offset += 5755c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5756c965db44STomer Tayar results_offset), 5757c965db44STomer Tayar "\nIdle Check failed!!! (with %d errors and %d warnings)\n", 5758c965db44STomer Tayar *num_errors, *num_warnings); 5759c965db44STomer Tayar } else if (*num_warnings) { 5760c965db44STomer Tayar results_offset += 5761c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5762c965db44STomer Tayar results_offset), 5763c965db44STomer Tayar "\nIdle Check completed successfuly (with %d warnings)\n", 5764c965db44STomer Tayar *num_warnings); 5765c965db44STomer Tayar } else { 5766c965db44STomer Tayar results_offset += 5767c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 5768c965db44STomer Tayar results_offset), 5769c965db44STomer Tayar "\nIdle Check completed successfuly\n"); 5770c965db44STomer Tayar } 5771c965db44STomer Tayar 5772c965db44STomer Tayar /* Add 1 for string NULL termination */ 5773c965db44STomer Tayar *parsed_results_bytes = results_offset + 1; 5774c965db44STomer Tayar return DBG_STATUS_OK; 5775c965db44STomer Tayar } 5776c965db44STomer Tayar 5777c965db44STomer Tayar enum dbg_status qed_get_idle_chk_results_buf_size(struct qed_hwfn *p_hwfn, 5778c965db44STomer Tayar u32 *dump_buf, 5779c965db44STomer Tayar u32 num_dumped_dwords, 5780c965db44STomer Tayar u32 *results_buf_size) 5781c965db44STomer Tayar { 5782c965db44STomer Tayar u32 num_errors, num_warnings; 5783c965db44STomer Tayar 5784c965db44STomer Tayar return qed_parse_idle_chk_dump(p_hwfn, 5785c965db44STomer Tayar dump_buf, 5786c965db44STomer Tayar num_dumped_dwords, 5787c965db44STomer Tayar NULL, 5788c965db44STomer Tayar results_buf_size, 5789c965db44STomer Tayar &num_errors, &num_warnings); 5790c965db44STomer Tayar } 5791c965db44STomer Tayar 5792c965db44STomer Tayar enum dbg_status qed_print_idle_chk_results(struct qed_hwfn *p_hwfn, 5793c965db44STomer Tayar u32 *dump_buf, 5794c965db44STomer Tayar u32 num_dumped_dwords, 5795c965db44STomer Tayar char *results_buf, 5796c965db44STomer Tayar u32 *num_errors, u32 *num_warnings) 5797c965db44STomer Tayar { 5798c965db44STomer Tayar u32 parsed_buf_size; 5799c965db44STomer Tayar 5800c965db44STomer Tayar return qed_parse_idle_chk_dump(p_hwfn, 5801c965db44STomer Tayar dump_buf, 5802c965db44STomer Tayar num_dumped_dwords, 5803c965db44STomer Tayar results_buf, 5804c965db44STomer Tayar &parsed_buf_size, 5805c965db44STomer Tayar num_errors, num_warnings); 5806c965db44STomer Tayar } 5807c965db44STomer Tayar 5808c965db44STomer Tayar /* Frees the specified MCP Trace meta data */ 5809c965db44STomer Tayar static void qed_mcp_trace_free_meta(struct qed_hwfn *p_hwfn, 5810c965db44STomer Tayar struct mcp_trace_meta *meta) 5811c965db44STomer Tayar { 5812c965db44STomer Tayar u32 i; 5813c965db44STomer Tayar 5814c965db44STomer Tayar /* Release modules */ 5815c965db44STomer Tayar if (meta->modules) { 5816c965db44STomer Tayar for (i = 0; i < meta->modules_num; i++) 5817c965db44STomer Tayar kfree(meta->modules[i]); 5818c965db44STomer Tayar kfree(meta->modules); 5819c965db44STomer Tayar } 5820c965db44STomer Tayar 5821c965db44STomer Tayar /* Release formats */ 5822c965db44STomer Tayar if (meta->formats) { 5823c965db44STomer Tayar for (i = 0; i < meta->formats_num; i++) 5824c965db44STomer Tayar kfree(meta->formats[i].format_str); 5825c965db44STomer Tayar kfree(meta->formats); 5826c965db44STomer Tayar } 5827c965db44STomer Tayar } 5828c965db44STomer Tayar 5829c965db44STomer Tayar /* Allocates and fills MCP Trace meta data based on the specified meta data 5830c965db44STomer Tayar * dump buffer. 5831c965db44STomer Tayar * Returns debug status code. 5832c965db44STomer Tayar */ 5833c965db44STomer Tayar static enum dbg_status qed_mcp_trace_alloc_meta(struct qed_hwfn *p_hwfn, 5834c965db44STomer Tayar const u32 *meta_buf, 5835c965db44STomer Tayar struct mcp_trace_meta *meta) 5836c965db44STomer Tayar { 5837c965db44STomer Tayar u8 *meta_buf_bytes = (u8 *)meta_buf; 5838c965db44STomer Tayar u32 offset = 0, signature, i; 5839c965db44STomer Tayar 5840c965db44STomer Tayar memset(meta, 0, sizeof(*meta)); 5841c965db44STomer Tayar 5842c965db44STomer Tayar /* Read first signature */ 5843c965db44STomer Tayar signature = qed_read_dword_from_buf(meta_buf_bytes, &offset); 5844c965db44STomer Tayar if (signature != MCP_TRACE_META_IMAGE_SIGNATURE) 5845c965db44STomer Tayar return DBG_STATUS_INVALID_TRACE_SIGNATURE; 5846c965db44STomer Tayar 5847c965db44STomer Tayar /* Read number of modules and allocate memory for all the modules 5848c965db44STomer Tayar * pointers. 5849c965db44STomer Tayar */ 5850c965db44STomer Tayar meta->modules_num = qed_read_byte_from_buf(meta_buf_bytes, &offset); 5851c965db44STomer Tayar meta->modules = kzalloc(meta->modules_num * sizeof(char *), GFP_KERNEL); 5852c965db44STomer Tayar if (!meta->modules) 5853c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 5854c965db44STomer Tayar 5855c965db44STomer Tayar /* Allocate and read all module strings */ 5856c965db44STomer Tayar for (i = 0; i < meta->modules_num; i++) { 5857c965db44STomer Tayar u8 module_len = qed_read_byte_from_buf(meta_buf_bytes, &offset); 5858c965db44STomer Tayar 5859c965db44STomer Tayar *(meta->modules + i) = kzalloc(module_len, GFP_KERNEL); 5860c965db44STomer Tayar if (!(*(meta->modules + i))) { 5861c965db44STomer Tayar /* Update number of modules to be released */ 5862c965db44STomer Tayar meta->modules_num = i ? i - 1 : 0; 5863c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 5864c965db44STomer Tayar } 5865c965db44STomer Tayar 5866c965db44STomer Tayar qed_read_str_from_buf(meta_buf_bytes, &offset, module_len, 5867c965db44STomer Tayar *(meta->modules + i)); 5868c965db44STomer Tayar if (module_len > MCP_TRACE_MAX_MODULE_LEN) 5869c965db44STomer Tayar (*(meta->modules + i))[MCP_TRACE_MAX_MODULE_LEN] = '\0'; 5870c965db44STomer Tayar } 5871c965db44STomer Tayar 5872c965db44STomer Tayar /* Read second signature */ 5873c965db44STomer Tayar signature = qed_read_dword_from_buf(meta_buf_bytes, &offset); 5874c965db44STomer Tayar if (signature != MCP_TRACE_META_IMAGE_SIGNATURE) 5875c965db44STomer Tayar return DBG_STATUS_INVALID_TRACE_SIGNATURE; 5876c965db44STomer Tayar 5877c965db44STomer Tayar /* Read number of formats and allocate memory for all formats */ 5878c965db44STomer Tayar meta->formats_num = qed_read_dword_from_buf(meta_buf_bytes, &offset); 5879c965db44STomer Tayar meta->formats = kzalloc(meta->formats_num * 5880c965db44STomer Tayar sizeof(struct mcp_trace_format), 5881c965db44STomer Tayar GFP_KERNEL); 5882c965db44STomer Tayar if (!meta->formats) 5883c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 5884c965db44STomer Tayar 5885c965db44STomer Tayar /* Allocate and read all strings */ 5886c965db44STomer Tayar for (i = 0; i < meta->formats_num; i++) { 5887c965db44STomer Tayar struct mcp_trace_format *format_ptr = &meta->formats[i]; 5888c965db44STomer Tayar u8 format_len; 5889c965db44STomer Tayar 5890c965db44STomer Tayar format_ptr->data = qed_read_dword_from_buf(meta_buf_bytes, 5891c965db44STomer Tayar &offset); 5892c965db44STomer Tayar format_len = 5893c965db44STomer Tayar (format_ptr->data & 5894c965db44STomer Tayar MCP_TRACE_FORMAT_LEN_MASK) >> MCP_TRACE_FORMAT_LEN_SHIFT; 5895c965db44STomer Tayar format_ptr->format_str = kzalloc(format_len, GFP_KERNEL); 5896c965db44STomer Tayar if (!format_ptr->format_str) { 5897c965db44STomer Tayar /* Update number of modules to be released */ 5898c965db44STomer Tayar meta->formats_num = i ? i - 1 : 0; 5899c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 5900c965db44STomer Tayar } 5901c965db44STomer Tayar 5902c965db44STomer Tayar qed_read_str_from_buf(meta_buf_bytes, 5903c965db44STomer Tayar &offset, 5904c965db44STomer Tayar format_len, format_ptr->format_str); 5905c965db44STomer Tayar } 5906c965db44STomer Tayar 5907c965db44STomer Tayar return DBG_STATUS_OK; 5908c965db44STomer Tayar } 5909c965db44STomer Tayar 5910c965db44STomer Tayar /* Parses an MCP Trace dump buffer. 5911c965db44STomer Tayar * If result_buf is not NULL, the MCP Trace results are printed to it. 5912c965db44STomer Tayar * In any case, the required results buffer size is assigned to 5913c965db44STomer Tayar * parsed_results_bytes. 5914c965db44STomer Tayar * The parsing status is returned. 5915c965db44STomer Tayar */ 5916c965db44STomer Tayar static enum dbg_status qed_parse_mcp_trace_dump(struct qed_hwfn *p_hwfn, 5917c965db44STomer Tayar u32 *dump_buf, 5918c965db44STomer Tayar u32 num_dumped_dwords, 5919c965db44STomer Tayar char *results_buf, 5920c965db44STomer Tayar u32 *parsed_results_bytes) 5921c965db44STomer Tayar { 5922c965db44STomer Tayar u32 results_offset = 0, param_mask, param_shift, param_num_val; 5923c965db44STomer Tayar u32 num_section_params, offset, end_offset, bytes_left; 5924c965db44STomer Tayar const char *section_name, *param_name, *param_str_val; 5925c965db44STomer Tayar u32 trace_data_dwords, trace_meta_dwords; 5926c965db44STomer Tayar struct mcp_trace_meta meta; 5927c965db44STomer Tayar struct mcp_trace *trace; 5928c965db44STomer Tayar enum dbg_status status; 5929c965db44STomer Tayar const u32 *meta_buf; 5930c965db44STomer Tayar u8 *trace_buf; 5931c965db44STomer Tayar 5932c965db44STomer Tayar *parsed_results_bytes = 0; 5933c965db44STomer Tayar 5934c965db44STomer Tayar /* Read global_params section */ 5935c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 5936c965db44STomer Tayar §ion_name, &num_section_params); 5937c965db44STomer Tayar if (strcmp(section_name, "global_params")) 5938c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_BAD_DATA; 5939c965db44STomer Tayar 5940c965db44STomer Tayar /* Print global params */ 5941c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 5942c965db44STomer Tayar num_section_params, 5943c965db44STomer Tayar results_buf, &results_offset); 5944c965db44STomer Tayar 5945c965db44STomer Tayar /* Read trace_data section */ 5946c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 5947c965db44STomer Tayar §ion_name, &num_section_params); 5948c965db44STomer Tayar if (strcmp(section_name, "mcp_trace_data") || num_section_params != 1) 5949c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_BAD_DATA; 5950c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 5951c965db44STomer Tayar ¶m_name, ¶m_str_val, ¶m_num_val); 5952c965db44STomer Tayar if (strcmp(param_name, "size")) 5953c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_BAD_DATA; 5954c965db44STomer Tayar trace_data_dwords = param_num_val; 5955c965db44STomer Tayar 5956c965db44STomer Tayar /* Prepare trace info */ 5957c965db44STomer Tayar trace = (struct mcp_trace *)dump_buf; 5958c965db44STomer Tayar trace_buf = (u8 *)dump_buf + sizeof(struct mcp_trace); 5959c965db44STomer Tayar offset = trace->trace_oldest; 5960c965db44STomer Tayar end_offset = trace->trace_prod; 5961c965db44STomer Tayar bytes_left = qed_cyclic_sub(end_offset, offset, trace->size); 5962c965db44STomer Tayar dump_buf += trace_data_dwords; 5963c965db44STomer Tayar 5964c965db44STomer Tayar /* Read meta_data section */ 5965c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 5966c965db44STomer Tayar §ion_name, &num_section_params); 5967c965db44STomer Tayar if (strcmp(section_name, "mcp_trace_meta")) 5968c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_BAD_DATA; 5969c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 5970c965db44STomer Tayar ¶m_name, ¶m_str_val, ¶m_num_val); 5971c965db44STomer Tayar if (strcmp(param_name, "size") != 0) 5972c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_BAD_DATA; 5973c965db44STomer Tayar trace_meta_dwords = param_num_val; 5974c965db44STomer Tayar 5975c965db44STomer Tayar /* Choose meta data buffer */ 5976c965db44STomer Tayar if (!trace_meta_dwords) { 5977c965db44STomer Tayar /* Dump doesn't include meta data */ 5978c965db44STomer Tayar if (!s_mcp_trace_meta.ptr) 5979c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_NO_META; 5980c965db44STomer Tayar meta_buf = s_mcp_trace_meta.ptr; 5981c965db44STomer Tayar } else { 5982c965db44STomer Tayar /* Dump includes meta data */ 5983c965db44STomer Tayar meta_buf = dump_buf; 5984c965db44STomer Tayar } 5985c965db44STomer Tayar 5986c965db44STomer Tayar /* Allocate meta data memory */ 5987c965db44STomer Tayar status = qed_mcp_trace_alloc_meta(p_hwfn, meta_buf, &meta); 5988c965db44STomer Tayar if (status != DBG_STATUS_OK) 5989c965db44STomer Tayar goto free_mem; 5990c965db44STomer Tayar 5991c965db44STomer Tayar /* Ignore the level and modules masks - just print everything that is 5992c965db44STomer Tayar * already in the buffer. 5993c965db44STomer Tayar */ 5994c965db44STomer Tayar while (bytes_left) { 5995c965db44STomer Tayar struct mcp_trace_format *format_ptr; 5996c965db44STomer Tayar u8 format_level, format_module; 5997c965db44STomer Tayar u32 params[3] = { 0, 0, 0 }; 5998c965db44STomer Tayar u32 header, format_idx, i; 5999c965db44STomer Tayar 6000c965db44STomer Tayar if (bytes_left < MFW_TRACE_ENTRY_SIZE) { 6001c965db44STomer Tayar status = DBG_STATUS_MCP_TRACE_BAD_DATA; 6002c965db44STomer Tayar goto free_mem; 6003c965db44STomer Tayar } 6004c965db44STomer Tayar 6005c965db44STomer Tayar header = qed_read_from_cyclic_buf(trace_buf, 6006c965db44STomer Tayar &offset, 6007c965db44STomer Tayar trace->size, 6008c965db44STomer Tayar MFW_TRACE_ENTRY_SIZE); 6009c965db44STomer Tayar bytes_left -= MFW_TRACE_ENTRY_SIZE; 6010c965db44STomer Tayar format_idx = header & MFW_TRACE_EVENTID_MASK; 6011c965db44STomer Tayar 6012c965db44STomer Tayar /* Skip message if its index doesn't exist in the meta data */ 6013c965db44STomer Tayar if (format_idx > meta.formats_num) { 6014c965db44STomer Tayar u8 format_size = 6015c965db44STomer Tayar (u8)((header & 6016c965db44STomer Tayar MFW_TRACE_PRM_SIZE_MASK) >> 6017c965db44STomer Tayar MFW_TRACE_PRM_SIZE_SHIFT); 6018c965db44STomer Tayar 6019c965db44STomer Tayar if (bytes_left < format_size) { 6020c965db44STomer Tayar status = DBG_STATUS_MCP_TRACE_BAD_DATA; 6021c965db44STomer Tayar goto free_mem; 6022c965db44STomer Tayar } 6023c965db44STomer Tayar 6024c965db44STomer Tayar offset = qed_cyclic_add(offset, 6025c965db44STomer Tayar format_size, trace->size); 6026c965db44STomer Tayar bytes_left -= format_size; 6027c965db44STomer Tayar continue; 6028c965db44STomer Tayar } 6029c965db44STomer Tayar 6030c965db44STomer Tayar format_ptr = &meta.formats[format_idx]; 6031c965db44STomer Tayar for (i = 0, 6032c965db44STomer Tayar param_mask = MCP_TRACE_FORMAT_P1_SIZE_MASK, param_shift = 6033c965db44STomer Tayar MCP_TRACE_FORMAT_P1_SIZE_SHIFT; 6034c965db44STomer Tayar i < MCP_TRACE_FORMAT_MAX_PARAMS; 6035c965db44STomer Tayar i++, param_mask <<= MCP_TRACE_FORMAT_PARAM_WIDTH, 6036c965db44STomer Tayar param_shift += MCP_TRACE_FORMAT_PARAM_WIDTH) { 6037c965db44STomer Tayar /* Extract param size (0..3) */ 6038c965db44STomer Tayar u8 param_size = 6039c965db44STomer Tayar (u8)((format_ptr->data & 6040c965db44STomer Tayar param_mask) >> param_shift); 6041c965db44STomer Tayar 6042c965db44STomer Tayar /* If the param size is zero, there are no other 6043c965db44STomer Tayar * parameters. 6044c965db44STomer Tayar */ 6045c965db44STomer Tayar if (!param_size) 6046c965db44STomer Tayar break; 6047c965db44STomer Tayar 6048c965db44STomer Tayar /* Size is encoded using 2 bits, where 3 is used to 6049c965db44STomer Tayar * encode 4. 6050c965db44STomer Tayar */ 6051c965db44STomer Tayar if (param_size == 3) 6052c965db44STomer Tayar param_size = 4; 6053c965db44STomer Tayar if (bytes_left < param_size) { 6054c965db44STomer Tayar status = DBG_STATUS_MCP_TRACE_BAD_DATA; 6055c965db44STomer Tayar goto free_mem; 6056c965db44STomer Tayar } 6057c965db44STomer Tayar 6058c965db44STomer Tayar params[i] = qed_read_from_cyclic_buf(trace_buf, 6059c965db44STomer Tayar &offset, 6060c965db44STomer Tayar trace->size, 6061c965db44STomer Tayar param_size); 6062c965db44STomer Tayar bytes_left -= param_size; 6063c965db44STomer Tayar } 6064c965db44STomer Tayar 6065c965db44STomer Tayar format_level = 6066c965db44STomer Tayar (u8)((format_ptr->data & 6067c965db44STomer Tayar MCP_TRACE_FORMAT_LEVEL_MASK) >> 6068c965db44STomer Tayar MCP_TRACE_FORMAT_LEVEL_SHIFT); 6069c965db44STomer Tayar format_module = 6070c965db44STomer Tayar (u8)((format_ptr->data & 6071c965db44STomer Tayar MCP_TRACE_FORMAT_MODULE_MASK) >> 6072c965db44STomer Tayar MCP_TRACE_FORMAT_MODULE_SHIFT); 6073c965db44STomer Tayar if (format_level >= ARRAY_SIZE(s_mcp_trace_level_str)) { 6074c965db44STomer Tayar status = DBG_STATUS_MCP_TRACE_BAD_DATA; 6075c965db44STomer Tayar goto free_mem; 6076c965db44STomer Tayar } 6077c965db44STomer Tayar 6078c965db44STomer Tayar /* Print current message to results buffer */ 6079c965db44STomer Tayar results_offset += 6080c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6081c965db44STomer Tayar results_offset), "%s %-8s: ", 6082c965db44STomer Tayar s_mcp_trace_level_str[format_level], 6083c965db44STomer Tayar meta.modules[format_module]); 6084c965db44STomer Tayar results_offset += 6085c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6086c965db44STomer Tayar results_offset), 6087c965db44STomer Tayar format_ptr->format_str, params[0], params[1], 6088c965db44STomer Tayar params[2]); 6089c965db44STomer Tayar } 6090c965db44STomer Tayar 6091c965db44STomer Tayar free_mem: 6092c965db44STomer Tayar *parsed_results_bytes = results_offset + 1; 6093c965db44STomer Tayar qed_mcp_trace_free_meta(p_hwfn, &meta); 6094c965db44STomer Tayar return status; 6095c965db44STomer Tayar } 6096c965db44STomer Tayar 6097c965db44STomer Tayar enum dbg_status qed_get_mcp_trace_results_buf_size(struct qed_hwfn *p_hwfn, 6098c965db44STomer Tayar u32 *dump_buf, 6099c965db44STomer Tayar u32 num_dumped_dwords, 6100c965db44STomer Tayar u32 *results_buf_size) 6101c965db44STomer Tayar { 6102c965db44STomer Tayar return qed_parse_mcp_trace_dump(p_hwfn, 6103c965db44STomer Tayar dump_buf, 6104c965db44STomer Tayar num_dumped_dwords, 6105c965db44STomer Tayar NULL, results_buf_size); 6106c965db44STomer Tayar } 6107c965db44STomer Tayar 6108c965db44STomer Tayar enum dbg_status qed_print_mcp_trace_results(struct qed_hwfn *p_hwfn, 6109c965db44STomer Tayar u32 *dump_buf, 6110c965db44STomer Tayar u32 num_dumped_dwords, 6111c965db44STomer Tayar char *results_buf) 6112c965db44STomer Tayar { 6113c965db44STomer Tayar u32 parsed_buf_size; 6114c965db44STomer Tayar 6115c965db44STomer Tayar return qed_parse_mcp_trace_dump(p_hwfn, 6116c965db44STomer Tayar dump_buf, 6117c965db44STomer Tayar num_dumped_dwords, 6118c965db44STomer Tayar results_buf, &parsed_buf_size); 6119c965db44STomer Tayar } 6120c965db44STomer Tayar 6121c965db44STomer Tayar /* Parses a Reg FIFO dump buffer. 6122c965db44STomer Tayar * If result_buf is not NULL, the Reg FIFO results are printed to it. 6123c965db44STomer Tayar * In any case, the required results buffer size is assigned to 6124c965db44STomer Tayar * parsed_results_bytes. 6125c965db44STomer Tayar * The parsing status is returned. 6126c965db44STomer Tayar */ 6127c965db44STomer Tayar static enum dbg_status qed_parse_reg_fifo_dump(struct qed_hwfn *p_hwfn, 6128c965db44STomer Tayar u32 *dump_buf, 6129c965db44STomer Tayar u32 num_dumped_dwords, 6130c965db44STomer Tayar char *results_buf, 6131c965db44STomer Tayar u32 *parsed_results_bytes) 6132c965db44STomer Tayar { 6133c965db44STomer Tayar u32 results_offset = 0, param_num_val, num_section_params, num_elements; 6134c965db44STomer Tayar const char *section_name, *param_name, *param_str_val; 6135c965db44STomer Tayar struct reg_fifo_element *elements; 6136c965db44STomer Tayar u8 i, j, err_val, vf_val; 6137c965db44STomer Tayar char vf_str[4]; 6138c965db44STomer Tayar 6139c965db44STomer Tayar /* Read global_params section */ 6140c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 6141c965db44STomer Tayar §ion_name, &num_section_params); 6142c965db44STomer Tayar if (strcmp(section_name, "global_params")) 6143c965db44STomer Tayar return DBG_STATUS_REG_FIFO_BAD_DATA; 6144c965db44STomer Tayar 6145c965db44STomer Tayar /* Print global params */ 6146c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 6147c965db44STomer Tayar num_section_params, 6148c965db44STomer Tayar results_buf, &results_offset); 6149c965db44STomer Tayar 6150c965db44STomer Tayar /* Read reg_fifo_data section */ 6151c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 6152c965db44STomer Tayar §ion_name, &num_section_params); 6153c965db44STomer Tayar if (strcmp(section_name, "reg_fifo_data")) 6154c965db44STomer Tayar return DBG_STATUS_REG_FIFO_BAD_DATA; 6155c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 6156c965db44STomer Tayar ¶m_name, ¶m_str_val, ¶m_num_val); 6157c965db44STomer Tayar if (strcmp(param_name, "size")) 6158c965db44STomer Tayar return DBG_STATUS_REG_FIFO_BAD_DATA; 6159c965db44STomer Tayar if (param_num_val % REG_FIFO_ELEMENT_DWORDS) 6160c965db44STomer Tayar return DBG_STATUS_REG_FIFO_BAD_DATA; 6161c965db44STomer Tayar num_elements = param_num_val / REG_FIFO_ELEMENT_DWORDS; 6162c965db44STomer Tayar elements = (struct reg_fifo_element *)dump_buf; 6163c965db44STomer Tayar 6164c965db44STomer Tayar /* Decode elements */ 6165c965db44STomer Tayar for (i = 0; i < num_elements; i++) { 6166c965db44STomer Tayar bool err_printed = false; 6167c965db44STomer Tayar 6168c965db44STomer Tayar /* Discover if element belongs to a VF or a PF */ 6169c965db44STomer Tayar vf_val = GET_FIELD(elements[i].data, REG_FIFO_ELEMENT_VF); 6170c965db44STomer Tayar if (vf_val == REG_FIFO_ELEMENT_IS_PF_VF_VAL) 6171c965db44STomer Tayar sprintf(vf_str, "%s", "N/A"); 6172c965db44STomer Tayar else 6173c965db44STomer Tayar sprintf(vf_str, "%d", vf_val); 6174c965db44STomer Tayar 6175c965db44STomer Tayar /* Add parsed element to parsed buffer */ 6176c965db44STomer Tayar results_offset += 6177c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6178c965db44STomer Tayar results_offset), 6179be086e7cSMintz, Yuval "raw: 0x%016llx, address: 0x%07x, access: %-5s, pf: %2d, vf: %s, port: %d, privilege: %-3s, protection: %-12s, master: %-4s, errors: ", 6180c965db44STomer Tayar elements[i].data, 6181be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 6182c965db44STomer Tayar REG_FIFO_ELEMENT_ADDRESS) * 6183c965db44STomer Tayar REG_FIFO_ELEMENT_ADDR_FACTOR, 6184c965db44STomer Tayar s_access_strs[GET_FIELD(elements[i].data, 6185c965db44STomer Tayar REG_FIFO_ELEMENT_ACCESS)], 6186be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 6187c965db44STomer Tayar REG_FIFO_ELEMENT_PF), vf_str, 6188be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 6189c965db44STomer Tayar REG_FIFO_ELEMENT_PORT), 6190c965db44STomer Tayar s_privilege_strs[GET_FIELD(elements[i]. 6191c965db44STomer Tayar data, 6192c965db44STomer Tayar REG_FIFO_ELEMENT_PRIVILEGE)], 6193c965db44STomer Tayar s_protection_strs[GET_FIELD(elements[i].data, 6194c965db44STomer Tayar REG_FIFO_ELEMENT_PROTECTION)], 6195c965db44STomer Tayar s_master_strs[GET_FIELD(elements[i].data, 6196c965db44STomer Tayar REG_FIFO_ELEMENT_MASTER)]); 6197c965db44STomer Tayar 6198c965db44STomer Tayar /* Print errors */ 6199c965db44STomer Tayar for (j = 0, 6200c965db44STomer Tayar err_val = GET_FIELD(elements[i].data, 6201c965db44STomer Tayar REG_FIFO_ELEMENT_ERROR); 6202c965db44STomer Tayar j < ARRAY_SIZE(s_reg_fifo_error_strs); 6203c965db44STomer Tayar j++, err_val >>= 1) { 6204c965db44STomer Tayar if (!(err_val & 0x1)) 6205c965db44STomer Tayar continue; 6206c965db44STomer Tayar if (err_printed) 6207c965db44STomer Tayar results_offset += 6208c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6209c965db44STomer Tayar results_offset), 6210c965db44STomer Tayar ", "); 6211c965db44STomer Tayar results_offset += 6212c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6213c965db44STomer Tayar results_offset), "%s", 6214c965db44STomer Tayar s_reg_fifo_error_strs[j]); 6215c965db44STomer Tayar err_printed = true; 6216c965db44STomer Tayar } 6217c965db44STomer Tayar 6218c965db44STomer Tayar results_offset += 6219c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, results_offset), "\n"); 6220c965db44STomer Tayar } 6221c965db44STomer Tayar 6222c965db44STomer Tayar results_offset += sprintf(qed_get_buf_ptr(results_buf, 6223c965db44STomer Tayar results_offset), 6224c965db44STomer Tayar "fifo contained %d elements", num_elements); 6225c965db44STomer Tayar 6226c965db44STomer Tayar /* Add 1 for string NULL termination */ 6227c965db44STomer Tayar *parsed_results_bytes = results_offset + 1; 6228c965db44STomer Tayar return DBG_STATUS_OK; 6229c965db44STomer Tayar } 6230c965db44STomer Tayar 6231c965db44STomer Tayar enum dbg_status qed_get_reg_fifo_results_buf_size(struct qed_hwfn *p_hwfn, 6232c965db44STomer Tayar u32 *dump_buf, 6233c965db44STomer Tayar u32 num_dumped_dwords, 6234c965db44STomer Tayar u32 *results_buf_size) 6235c965db44STomer Tayar { 6236c965db44STomer Tayar return qed_parse_reg_fifo_dump(p_hwfn, 6237c965db44STomer Tayar dump_buf, 6238c965db44STomer Tayar num_dumped_dwords, 6239c965db44STomer Tayar NULL, results_buf_size); 6240c965db44STomer Tayar } 6241c965db44STomer Tayar 6242c965db44STomer Tayar enum dbg_status qed_print_reg_fifo_results(struct qed_hwfn *p_hwfn, 6243c965db44STomer Tayar u32 *dump_buf, 6244c965db44STomer Tayar u32 num_dumped_dwords, 6245c965db44STomer Tayar char *results_buf) 6246c965db44STomer Tayar { 6247c965db44STomer Tayar u32 parsed_buf_size; 6248c965db44STomer Tayar 6249c965db44STomer Tayar return qed_parse_reg_fifo_dump(p_hwfn, 6250c965db44STomer Tayar dump_buf, 6251c965db44STomer Tayar num_dumped_dwords, 6252c965db44STomer Tayar results_buf, &parsed_buf_size); 6253c965db44STomer Tayar } 6254c965db44STomer Tayar 6255c965db44STomer Tayar /* Parses an IGU FIFO dump buffer. 6256c965db44STomer Tayar * If result_buf is not NULL, the IGU FIFO results are printed to it. 6257c965db44STomer Tayar * In any case, the required results buffer size is assigned to 6258c965db44STomer Tayar * parsed_results_bytes. 6259c965db44STomer Tayar * The parsing status is returned. 6260c965db44STomer Tayar */ 6261c965db44STomer Tayar static enum dbg_status qed_parse_igu_fifo_dump(struct qed_hwfn *p_hwfn, 6262c965db44STomer Tayar u32 *dump_buf, 6263c965db44STomer Tayar u32 num_dumped_dwords, 6264c965db44STomer Tayar char *results_buf, 6265c965db44STomer Tayar u32 *parsed_results_bytes) 6266c965db44STomer Tayar { 6267c965db44STomer Tayar u32 results_offset = 0, param_num_val, num_section_params, num_elements; 6268c965db44STomer Tayar const char *section_name, *param_name, *param_str_val; 6269c965db44STomer Tayar struct igu_fifo_element *elements; 6270c965db44STomer Tayar char parsed_addr_data[32]; 6271c965db44STomer Tayar char parsed_wr_data[256]; 6272c965db44STomer Tayar u8 i, j; 6273c965db44STomer Tayar 6274c965db44STomer Tayar /* Read global_params section */ 6275c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 6276c965db44STomer Tayar §ion_name, &num_section_params); 6277c965db44STomer Tayar if (strcmp(section_name, "global_params")) 6278c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 6279c965db44STomer Tayar 6280c965db44STomer Tayar /* Print global params */ 6281c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 6282c965db44STomer Tayar num_section_params, 6283c965db44STomer Tayar results_buf, &results_offset); 6284c965db44STomer Tayar 6285c965db44STomer Tayar /* Read igu_fifo_data section */ 6286c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 6287c965db44STomer Tayar §ion_name, &num_section_params); 6288c965db44STomer Tayar if (strcmp(section_name, "igu_fifo_data")) 6289c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 6290c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 6291c965db44STomer Tayar ¶m_name, ¶m_str_val, ¶m_num_val); 6292c965db44STomer Tayar if (strcmp(param_name, "size")) 6293c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 6294c965db44STomer Tayar if (param_num_val % IGU_FIFO_ELEMENT_DWORDS) 6295c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 6296c965db44STomer Tayar num_elements = param_num_val / IGU_FIFO_ELEMENT_DWORDS; 6297c965db44STomer Tayar elements = (struct igu_fifo_element *)dump_buf; 6298c965db44STomer Tayar 6299c965db44STomer Tayar /* Decode elements */ 6300c965db44STomer Tayar for (i = 0; i < num_elements; i++) { 6301c965db44STomer Tayar /* dword12 (dword index 1 and 2) contains bits 32..95 of the 6302c965db44STomer Tayar * FIFO element. 6303c965db44STomer Tayar */ 6304c965db44STomer Tayar u64 dword12 = 6305c965db44STomer Tayar ((u64)elements[i].dword2 << 32) | elements[i].dword1; 6306c965db44STomer Tayar bool is_wr_cmd = GET_FIELD(dword12, 6307c965db44STomer Tayar IGU_FIFO_ELEMENT_DWORD12_IS_WR_CMD); 6308c965db44STomer Tayar bool is_pf = GET_FIELD(elements[i].dword0, 6309c965db44STomer Tayar IGU_FIFO_ELEMENT_DWORD0_IS_PF); 6310c965db44STomer Tayar u16 cmd_addr = GET_FIELD(elements[i].dword0, 6311c965db44STomer Tayar IGU_FIFO_ELEMENT_DWORD0_CMD_ADDR); 6312c965db44STomer Tayar u8 source = GET_FIELD(elements[i].dword0, 6313c965db44STomer Tayar IGU_FIFO_ELEMENT_DWORD0_SOURCE); 6314c965db44STomer Tayar u8 err_type = GET_FIELD(elements[i].dword0, 6315c965db44STomer Tayar IGU_FIFO_ELEMENT_DWORD0_ERR_TYPE); 6316c965db44STomer Tayar const struct igu_fifo_addr_data *addr_data = NULL; 6317c965db44STomer Tayar 6318c965db44STomer Tayar if (source >= ARRAY_SIZE(s_igu_fifo_source_strs)) 6319c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 6320c965db44STomer Tayar if (err_type >= ARRAY_SIZE(s_igu_fifo_error_strs)) 6321c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 6322c965db44STomer Tayar 6323c965db44STomer Tayar /* Find address data */ 6324c965db44STomer Tayar for (j = 0; j < ARRAY_SIZE(s_igu_fifo_addr_data) && !addr_data; 6325c965db44STomer Tayar j++) 6326c965db44STomer Tayar if (cmd_addr >= s_igu_fifo_addr_data[j].start_addr && 6327c965db44STomer Tayar cmd_addr <= s_igu_fifo_addr_data[j].end_addr) 6328c965db44STomer Tayar addr_data = &s_igu_fifo_addr_data[j]; 6329c965db44STomer Tayar if (!addr_data) 6330c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 6331c965db44STomer Tayar 6332c965db44STomer Tayar /* Prepare parsed address data */ 6333c965db44STomer Tayar switch (addr_data->type) { 6334c965db44STomer Tayar case IGU_ADDR_TYPE_MSIX_MEM: 6335c965db44STomer Tayar sprintf(parsed_addr_data, 6336c965db44STomer Tayar " vector_num=0x%x", cmd_addr / 2); 6337c965db44STomer Tayar break; 6338c965db44STomer Tayar case IGU_ADDR_TYPE_WRITE_INT_ACK: 6339c965db44STomer Tayar case IGU_ADDR_TYPE_WRITE_PROD_UPDATE: 6340c965db44STomer Tayar sprintf(parsed_addr_data, 6341c965db44STomer Tayar " SB=0x%x", cmd_addr - addr_data->start_addr); 6342c965db44STomer Tayar break; 6343c965db44STomer Tayar default: 6344c965db44STomer Tayar parsed_addr_data[0] = '\0'; 6345c965db44STomer Tayar } 6346c965db44STomer Tayar 6347c965db44STomer Tayar /* Prepare parsed write data */ 6348c965db44STomer Tayar if (is_wr_cmd) { 6349c965db44STomer Tayar u32 wr_data = GET_FIELD(dword12, 6350c965db44STomer Tayar IGU_FIFO_ELEMENT_DWORD12_WR_DATA); 6351c965db44STomer Tayar u32 prod_cons = GET_FIELD(wr_data, 6352c965db44STomer Tayar IGU_FIFO_WR_DATA_PROD_CONS); 6353c965db44STomer Tayar u8 is_cleanup = GET_FIELD(wr_data, 6354c965db44STomer Tayar IGU_FIFO_WR_DATA_CMD_TYPE); 6355c965db44STomer Tayar 6356c965db44STomer Tayar if (source == IGU_SRC_ATTN) { 6357c965db44STomer Tayar sprintf(parsed_wr_data, 6358c965db44STomer Tayar "prod: 0x%x, ", prod_cons); 6359c965db44STomer Tayar } else { 6360c965db44STomer Tayar if (is_cleanup) { 6361c965db44STomer Tayar u8 cleanup_val = GET_FIELD(wr_data, 6362c965db44STomer Tayar IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_VAL); 6363c965db44STomer Tayar u8 cleanup_type = GET_FIELD(wr_data, 6364c965db44STomer Tayar IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_TYPE); 6365c965db44STomer Tayar 6366c965db44STomer Tayar sprintf(parsed_wr_data, 6367c965db44STomer Tayar "cmd_type: cleanup, cleanup_val: %s, cleanup_type: %d, ", 6368c965db44STomer Tayar cleanup_val ? "set" : "clear", 6369c965db44STomer Tayar cleanup_type); 6370c965db44STomer Tayar } else { 6371c965db44STomer Tayar u8 update_flag = GET_FIELD(wr_data, 6372c965db44STomer Tayar IGU_FIFO_WR_DATA_UPDATE_FLAG); 6373c965db44STomer Tayar u8 en_dis_int_for_sb = 6374c965db44STomer Tayar GET_FIELD(wr_data, 6375c965db44STomer Tayar IGU_FIFO_WR_DATA_EN_DIS_INT_FOR_SB); 6376c965db44STomer Tayar u8 segment = GET_FIELD(wr_data, 6377c965db44STomer Tayar IGU_FIFO_WR_DATA_SEGMENT); 6378c965db44STomer Tayar u8 timer_mask = GET_FIELD(wr_data, 6379c965db44STomer Tayar IGU_FIFO_WR_DATA_TIMER_MASK); 6380c965db44STomer Tayar 6381c965db44STomer Tayar sprintf(parsed_wr_data, 6382c965db44STomer Tayar "cmd_type: prod/cons update, prod/cons: 0x%x, update_flag: %s, en_dis_int_for_sb: %s, segment: %s, timer_mask=%d, ", 6383c965db44STomer Tayar prod_cons, 6384c965db44STomer Tayar update_flag ? "update" : "nop", 6385c965db44STomer Tayar en_dis_int_for_sb 6386c965db44STomer Tayar ? (en_dis_int_for_sb == 6387c965db44STomer Tayar 1 ? "disable" : "nop") : 6388c965db44STomer Tayar "enable", 6389c965db44STomer Tayar segment ? "attn" : "regular", 6390c965db44STomer Tayar timer_mask); 6391c965db44STomer Tayar } 6392c965db44STomer Tayar } 6393c965db44STomer Tayar } else { 6394c965db44STomer Tayar parsed_wr_data[0] = '\0'; 6395c965db44STomer Tayar } 6396c965db44STomer Tayar 6397c965db44STomer Tayar /* Add parsed element to parsed buffer */ 6398c965db44STomer Tayar results_offset += 6399c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6400c965db44STomer Tayar results_offset), 6401c965db44STomer Tayar "raw: 0x%01x%08x%08x, %s: %d, source: %s, type: %s, cmd_addr: 0x%x (%s%s), %serror: %s\n", 6402c965db44STomer Tayar elements[i].dword2, elements[i].dword1, 6403c965db44STomer Tayar elements[i].dword0, 6404c965db44STomer Tayar is_pf ? "pf" : "vf", 6405c965db44STomer Tayar GET_FIELD(elements[i].dword0, 6406c965db44STomer Tayar IGU_FIFO_ELEMENT_DWORD0_FID), 6407c965db44STomer Tayar s_igu_fifo_source_strs[source], 6408c965db44STomer Tayar is_wr_cmd ? "wr" : "rd", cmd_addr, 6409c965db44STomer Tayar (!is_pf && addr_data->vf_desc) 6410c965db44STomer Tayar ? addr_data->vf_desc : addr_data->desc, 6411c965db44STomer Tayar parsed_addr_data, parsed_wr_data, 6412c965db44STomer Tayar s_igu_fifo_error_strs[err_type]); 6413c965db44STomer Tayar } 6414c965db44STomer Tayar 6415c965db44STomer Tayar results_offset += sprintf(qed_get_buf_ptr(results_buf, 6416c965db44STomer Tayar results_offset), 6417c965db44STomer Tayar "fifo contained %d elements", num_elements); 6418c965db44STomer Tayar 6419c965db44STomer Tayar /* Add 1 for string NULL termination */ 6420c965db44STomer Tayar *parsed_results_bytes = results_offset + 1; 6421c965db44STomer Tayar return DBG_STATUS_OK; 6422c965db44STomer Tayar } 6423c965db44STomer Tayar 6424c965db44STomer Tayar enum dbg_status qed_get_igu_fifo_results_buf_size(struct qed_hwfn *p_hwfn, 6425c965db44STomer Tayar u32 *dump_buf, 6426c965db44STomer Tayar u32 num_dumped_dwords, 6427c965db44STomer Tayar u32 *results_buf_size) 6428c965db44STomer Tayar { 6429c965db44STomer Tayar return qed_parse_igu_fifo_dump(p_hwfn, 6430c965db44STomer Tayar dump_buf, 6431c965db44STomer Tayar num_dumped_dwords, 6432c965db44STomer Tayar NULL, results_buf_size); 6433c965db44STomer Tayar } 6434c965db44STomer Tayar 6435c965db44STomer Tayar enum dbg_status qed_print_igu_fifo_results(struct qed_hwfn *p_hwfn, 6436c965db44STomer Tayar u32 *dump_buf, 6437c965db44STomer Tayar u32 num_dumped_dwords, 6438c965db44STomer Tayar char *results_buf) 6439c965db44STomer Tayar { 6440c965db44STomer Tayar u32 parsed_buf_size; 6441c965db44STomer Tayar 6442c965db44STomer Tayar return qed_parse_igu_fifo_dump(p_hwfn, 6443c965db44STomer Tayar dump_buf, 6444c965db44STomer Tayar num_dumped_dwords, 6445c965db44STomer Tayar results_buf, &parsed_buf_size); 6446c965db44STomer Tayar } 6447c965db44STomer Tayar 6448c965db44STomer Tayar static enum dbg_status 6449c965db44STomer Tayar qed_parse_protection_override_dump(struct qed_hwfn *p_hwfn, 6450c965db44STomer Tayar u32 *dump_buf, 6451c965db44STomer Tayar u32 num_dumped_dwords, 6452c965db44STomer Tayar char *results_buf, 6453c965db44STomer Tayar u32 *parsed_results_bytes) 6454c965db44STomer Tayar { 6455c965db44STomer Tayar u32 results_offset = 0, param_num_val, num_section_params, num_elements; 6456c965db44STomer Tayar const char *section_name, *param_name, *param_str_val; 6457c965db44STomer Tayar struct protection_override_element *elements; 6458c965db44STomer Tayar u8 i; 6459c965db44STomer Tayar 6460c965db44STomer Tayar /* Read global_params section */ 6461c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 6462c965db44STomer Tayar §ion_name, &num_section_params); 6463c965db44STomer Tayar if (strcmp(section_name, "global_params")) 6464c965db44STomer Tayar return DBG_STATUS_PROTECTION_OVERRIDE_BAD_DATA; 6465c965db44STomer Tayar 6466c965db44STomer Tayar /* Print global params */ 6467c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 6468c965db44STomer Tayar num_section_params, 6469c965db44STomer Tayar results_buf, &results_offset); 6470c965db44STomer Tayar 6471c965db44STomer Tayar /* Read protection_override_data section */ 6472c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 6473c965db44STomer Tayar §ion_name, &num_section_params); 6474c965db44STomer Tayar if (strcmp(section_name, "protection_override_data")) 6475c965db44STomer Tayar return DBG_STATUS_PROTECTION_OVERRIDE_BAD_DATA; 6476c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 6477c965db44STomer Tayar ¶m_name, ¶m_str_val, ¶m_num_val); 6478c965db44STomer Tayar if (strcmp(param_name, "size")) 6479c965db44STomer Tayar return DBG_STATUS_PROTECTION_OVERRIDE_BAD_DATA; 6480c965db44STomer Tayar if (param_num_val % PROTECTION_OVERRIDE_ELEMENT_DWORDS != 0) 6481c965db44STomer Tayar return DBG_STATUS_PROTECTION_OVERRIDE_BAD_DATA; 6482c965db44STomer Tayar num_elements = param_num_val / PROTECTION_OVERRIDE_ELEMENT_DWORDS; 6483c965db44STomer Tayar elements = (struct protection_override_element *)dump_buf; 6484c965db44STomer Tayar 6485c965db44STomer Tayar /* Decode elements */ 6486c965db44STomer Tayar for (i = 0; i < num_elements; i++) { 6487c965db44STomer Tayar u32 address = GET_FIELD(elements[i].data, 6488c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_ADDRESS) * 6489c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_ADDR_FACTOR; 6490c965db44STomer Tayar 6491c965db44STomer Tayar results_offset += 6492c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6493c965db44STomer Tayar results_offset), 6494be086e7cSMintz, Yuval "window %2d, address: 0x%07x, size: %7d regs, read: %d, write: %d, read protection: %-12s, write protection: %-12s\n", 6495c965db44STomer Tayar i, address, 6496be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 6497c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_WINDOW_SIZE), 6498be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 6499c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_READ), 6500be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 6501c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_WRITE), 6502c965db44STomer Tayar s_protection_strs[GET_FIELD(elements[i].data, 6503c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_READ_PROTECTION)], 6504c965db44STomer Tayar s_protection_strs[GET_FIELD(elements[i].data, 6505c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_WRITE_PROTECTION)]); 6506c965db44STomer Tayar } 6507c965db44STomer Tayar 6508c965db44STomer Tayar results_offset += sprintf(qed_get_buf_ptr(results_buf, 6509c965db44STomer Tayar results_offset), 6510c965db44STomer Tayar "protection override contained %d elements", 6511c965db44STomer Tayar num_elements); 6512c965db44STomer Tayar 6513c965db44STomer Tayar /* Add 1 for string NULL termination */ 6514c965db44STomer Tayar *parsed_results_bytes = results_offset + 1; 6515c965db44STomer Tayar return DBG_STATUS_OK; 6516c965db44STomer Tayar } 6517c965db44STomer Tayar 6518c965db44STomer Tayar enum dbg_status 6519c965db44STomer Tayar qed_get_protection_override_results_buf_size(struct qed_hwfn *p_hwfn, 6520c965db44STomer Tayar u32 *dump_buf, 6521c965db44STomer Tayar u32 num_dumped_dwords, 6522c965db44STomer Tayar u32 *results_buf_size) 6523c965db44STomer Tayar { 6524c965db44STomer Tayar return qed_parse_protection_override_dump(p_hwfn, 6525c965db44STomer Tayar dump_buf, 6526c965db44STomer Tayar num_dumped_dwords, 6527c965db44STomer Tayar NULL, results_buf_size); 6528c965db44STomer Tayar } 6529c965db44STomer Tayar 6530c965db44STomer Tayar enum dbg_status qed_print_protection_override_results(struct qed_hwfn *p_hwfn, 6531c965db44STomer Tayar u32 *dump_buf, 6532c965db44STomer Tayar u32 num_dumped_dwords, 6533c965db44STomer Tayar char *results_buf) 6534c965db44STomer Tayar { 6535c965db44STomer Tayar u32 parsed_buf_size; 6536c965db44STomer Tayar 6537c965db44STomer Tayar return qed_parse_protection_override_dump(p_hwfn, 6538c965db44STomer Tayar dump_buf, 6539c965db44STomer Tayar num_dumped_dwords, 6540c965db44STomer Tayar results_buf, 6541c965db44STomer Tayar &parsed_buf_size); 6542c965db44STomer Tayar } 6543c965db44STomer Tayar 6544c965db44STomer Tayar /* Parses a FW Asserts dump buffer. 6545c965db44STomer Tayar * If result_buf is not NULL, the FW Asserts results are printed to it. 6546c965db44STomer Tayar * In any case, the required results buffer size is assigned to 6547c965db44STomer Tayar * parsed_results_bytes. 6548c965db44STomer Tayar * The parsing status is returned. 6549c965db44STomer Tayar */ 6550c965db44STomer Tayar static enum dbg_status qed_parse_fw_asserts_dump(struct qed_hwfn *p_hwfn, 6551c965db44STomer Tayar u32 *dump_buf, 6552c965db44STomer Tayar u32 num_dumped_dwords, 6553c965db44STomer Tayar char *results_buf, 6554c965db44STomer Tayar u32 *parsed_results_bytes) 6555c965db44STomer Tayar { 6556c965db44STomer Tayar u32 results_offset = 0, num_section_params, param_num_val, i; 6557c965db44STomer Tayar const char *param_name, *param_str_val, *section_name; 6558c965db44STomer Tayar bool last_section_found = false; 6559c965db44STomer Tayar 6560c965db44STomer Tayar *parsed_results_bytes = 0; 6561c965db44STomer Tayar 6562c965db44STomer Tayar /* Read global_params section */ 6563c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 6564c965db44STomer Tayar §ion_name, &num_section_params); 6565c965db44STomer Tayar if (strcmp(section_name, "global_params")) 6566c965db44STomer Tayar return DBG_STATUS_FW_ASSERTS_PARSE_FAILED; 6567c965db44STomer Tayar 6568c965db44STomer Tayar /* Print global params */ 6569c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 6570c965db44STomer Tayar num_section_params, 6571c965db44STomer Tayar results_buf, &results_offset); 6572c965db44STomer Tayar while (!last_section_found) { 6573c965db44STomer Tayar const char *storm_letter = NULL; 6574c965db44STomer Tayar u32 storm_dump_size = 0; 6575c965db44STomer Tayar 6576c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 6577c965db44STomer Tayar §ion_name, 6578c965db44STomer Tayar &num_section_params); 6579c965db44STomer Tayar if (!strcmp(section_name, "last")) { 6580c965db44STomer Tayar last_section_found = true; 6581c965db44STomer Tayar continue; 6582c965db44STomer Tayar } else if (strcmp(section_name, "fw_asserts")) { 6583c965db44STomer Tayar return DBG_STATUS_FW_ASSERTS_PARSE_FAILED; 6584c965db44STomer Tayar } 6585c965db44STomer Tayar 6586c965db44STomer Tayar /* Extract params */ 6587c965db44STomer Tayar for (i = 0; i < num_section_params; i++) { 6588c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 6589c965db44STomer Tayar ¶m_name, 6590c965db44STomer Tayar ¶m_str_val, 6591c965db44STomer Tayar ¶m_num_val); 6592c965db44STomer Tayar if (!strcmp(param_name, "storm")) 6593c965db44STomer Tayar storm_letter = param_str_val; 6594c965db44STomer Tayar else if (!strcmp(param_name, "size")) 6595c965db44STomer Tayar storm_dump_size = param_num_val; 6596c965db44STomer Tayar else 6597c965db44STomer Tayar return DBG_STATUS_FW_ASSERTS_PARSE_FAILED; 6598c965db44STomer Tayar } 6599c965db44STomer Tayar 6600c965db44STomer Tayar if (!storm_letter || !storm_dump_size) 6601c965db44STomer Tayar return DBG_STATUS_FW_ASSERTS_PARSE_FAILED; 6602c965db44STomer Tayar 6603c965db44STomer Tayar /* Print data */ 6604c965db44STomer Tayar results_offset += sprintf(qed_get_buf_ptr(results_buf, 6605c965db44STomer Tayar results_offset), 6606c965db44STomer Tayar "\n%sSTORM_ASSERT: size=%d\n", 6607c965db44STomer Tayar storm_letter, storm_dump_size); 6608c965db44STomer Tayar for (i = 0; i < storm_dump_size; i++, dump_buf++) 6609c965db44STomer Tayar results_offset += 6610c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6611c965db44STomer Tayar results_offset), 6612c965db44STomer Tayar "%08x\n", *dump_buf); 6613c965db44STomer Tayar } 6614c965db44STomer Tayar 6615c965db44STomer Tayar /* Add 1 for string NULL termination */ 6616c965db44STomer Tayar *parsed_results_bytes = results_offset + 1; 6617c965db44STomer Tayar return DBG_STATUS_OK; 6618c965db44STomer Tayar } 6619c965db44STomer Tayar 6620c965db44STomer Tayar enum dbg_status qed_get_fw_asserts_results_buf_size(struct qed_hwfn *p_hwfn, 6621c965db44STomer Tayar u32 *dump_buf, 6622c965db44STomer Tayar u32 num_dumped_dwords, 6623c965db44STomer Tayar u32 *results_buf_size) 6624c965db44STomer Tayar { 6625c965db44STomer Tayar return qed_parse_fw_asserts_dump(p_hwfn, 6626c965db44STomer Tayar dump_buf, 6627c965db44STomer Tayar num_dumped_dwords, 6628c965db44STomer Tayar NULL, results_buf_size); 6629c965db44STomer Tayar } 6630c965db44STomer Tayar 6631c965db44STomer Tayar enum dbg_status qed_print_fw_asserts_results(struct qed_hwfn *p_hwfn, 6632c965db44STomer Tayar u32 *dump_buf, 6633c965db44STomer Tayar u32 num_dumped_dwords, 6634c965db44STomer Tayar char *results_buf) 6635c965db44STomer Tayar { 6636c965db44STomer Tayar u32 parsed_buf_size; 6637c965db44STomer Tayar 6638c965db44STomer Tayar return qed_parse_fw_asserts_dump(p_hwfn, 6639c965db44STomer Tayar dump_buf, 6640c965db44STomer Tayar num_dumped_dwords, 6641c965db44STomer Tayar results_buf, &parsed_buf_size); 6642c965db44STomer Tayar } 6643c965db44STomer Tayar 6644c965db44STomer Tayar /* Wrapper for unifying the idle_chk and mcp_trace api */ 66458c93beafSYuval Mintz static enum dbg_status 66468c93beafSYuval Mintz qed_print_idle_chk_results_wrapper(struct qed_hwfn *p_hwfn, 6647c965db44STomer Tayar u32 *dump_buf, 6648c965db44STomer Tayar u32 num_dumped_dwords, 6649c965db44STomer Tayar char *results_buf) 6650c965db44STomer Tayar { 6651c965db44STomer Tayar u32 num_errors, num_warnnings; 6652c965db44STomer Tayar 6653c965db44STomer Tayar return qed_print_idle_chk_results(p_hwfn, dump_buf, num_dumped_dwords, 6654c965db44STomer Tayar results_buf, &num_errors, 6655c965db44STomer Tayar &num_warnnings); 6656c965db44STomer Tayar } 6657c965db44STomer Tayar 6658c965db44STomer Tayar /* Feature meta data lookup table */ 6659c965db44STomer Tayar static struct { 6660c965db44STomer Tayar char *name; 6661c965db44STomer Tayar enum dbg_status (*get_size)(struct qed_hwfn *p_hwfn, 6662c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *size); 6663c965db44STomer Tayar enum dbg_status (*perform_dump)(struct qed_hwfn *p_hwfn, 6664c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, 6665c965db44STomer Tayar u32 buf_size, u32 *dumped_dwords); 6666c965db44STomer Tayar enum dbg_status (*print_results)(struct qed_hwfn *p_hwfn, 6667c965db44STomer Tayar u32 *dump_buf, u32 num_dumped_dwords, 6668c965db44STomer Tayar char *results_buf); 6669c965db44STomer Tayar enum dbg_status (*results_buf_size)(struct qed_hwfn *p_hwfn, 6670c965db44STomer Tayar u32 *dump_buf, 6671c965db44STomer Tayar u32 num_dumped_dwords, 6672c965db44STomer Tayar u32 *results_buf_size); 6673c965db44STomer Tayar } qed_features_lookup[] = { 6674c965db44STomer Tayar { 6675c965db44STomer Tayar "grc", qed_dbg_grc_get_dump_buf_size, 6676c965db44STomer Tayar qed_dbg_grc_dump, NULL, NULL}, { 6677c965db44STomer Tayar "idle_chk", 6678c965db44STomer Tayar qed_dbg_idle_chk_get_dump_buf_size, 6679c965db44STomer Tayar qed_dbg_idle_chk_dump, 6680c965db44STomer Tayar qed_print_idle_chk_results_wrapper, 6681c965db44STomer Tayar qed_get_idle_chk_results_buf_size}, { 6682c965db44STomer Tayar "mcp_trace", 6683c965db44STomer Tayar qed_dbg_mcp_trace_get_dump_buf_size, 6684c965db44STomer Tayar qed_dbg_mcp_trace_dump, qed_print_mcp_trace_results, 6685c965db44STomer Tayar qed_get_mcp_trace_results_buf_size}, { 6686c965db44STomer Tayar "reg_fifo", 6687c965db44STomer Tayar qed_dbg_reg_fifo_get_dump_buf_size, 6688c965db44STomer Tayar qed_dbg_reg_fifo_dump, qed_print_reg_fifo_results, 6689c965db44STomer Tayar qed_get_reg_fifo_results_buf_size}, { 6690c965db44STomer Tayar "igu_fifo", 6691c965db44STomer Tayar qed_dbg_igu_fifo_get_dump_buf_size, 6692c965db44STomer Tayar qed_dbg_igu_fifo_dump, qed_print_igu_fifo_results, 6693c965db44STomer Tayar qed_get_igu_fifo_results_buf_size}, { 6694c965db44STomer Tayar "protection_override", 6695c965db44STomer Tayar qed_dbg_protection_override_get_dump_buf_size, 6696c965db44STomer Tayar qed_dbg_protection_override_dump, 6697c965db44STomer Tayar qed_print_protection_override_results, 6698c965db44STomer Tayar qed_get_protection_override_results_buf_size}, { 6699c965db44STomer Tayar "fw_asserts", 6700c965db44STomer Tayar qed_dbg_fw_asserts_get_dump_buf_size, 6701c965db44STomer Tayar qed_dbg_fw_asserts_dump, 6702c965db44STomer Tayar qed_print_fw_asserts_results, 6703c965db44STomer Tayar qed_get_fw_asserts_results_buf_size},}; 6704c965db44STomer Tayar 6705c965db44STomer Tayar static void qed_dbg_print_feature(u8 *p_text_buf, u32 text_size) 6706c965db44STomer Tayar { 6707c965db44STomer Tayar u32 i, precision = 80; 6708c965db44STomer Tayar 6709c965db44STomer Tayar if (!p_text_buf) 6710c965db44STomer Tayar return; 6711c965db44STomer Tayar 6712c965db44STomer Tayar pr_notice("\n%.*s", precision, p_text_buf); 6713c965db44STomer Tayar for (i = precision; i < text_size; i += precision) 6714c965db44STomer Tayar pr_cont("%.*s", precision, p_text_buf + i); 6715c965db44STomer Tayar pr_cont("\n"); 6716c965db44STomer Tayar } 6717c965db44STomer Tayar 6718c965db44STomer Tayar #define QED_RESULTS_BUF_MIN_SIZE 16 6719c965db44STomer Tayar /* Generic function for decoding debug feature info */ 67208c93beafSYuval Mintz static enum dbg_status format_feature(struct qed_hwfn *p_hwfn, 6721c965db44STomer Tayar enum qed_dbg_features feature_idx) 6722c965db44STomer Tayar { 6723c965db44STomer Tayar struct qed_dbg_feature *feature = 6724c965db44STomer Tayar &p_hwfn->cdev->dbg_params.features[feature_idx]; 6725c965db44STomer Tayar u32 text_size_bytes, null_char_pos, i; 6726c965db44STomer Tayar enum dbg_status rc; 6727c965db44STomer Tayar char *text_buf; 6728c965db44STomer Tayar 6729c965db44STomer Tayar /* Check if feature supports formatting capability */ 6730c965db44STomer Tayar if (!qed_features_lookup[feature_idx].results_buf_size) 6731c965db44STomer Tayar return DBG_STATUS_OK; 6732c965db44STomer Tayar 6733c965db44STomer Tayar /* Obtain size of formatted output */ 6734c965db44STomer Tayar rc = qed_features_lookup[feature_idx]. 6735c965db44STomer Tayar results_buf_size(p_hwfn, (u32 *)feature->dump_buf, 6736c965db44STomer Tayar feature->dumped_dwords, &text_size_bytes); 6737c965db44STomer Tayar if (rc != DBG_STATUS_OK) 6738c965db44STomer Tayar return rc; 6739c965db44STomer Tayar 6740c965db44STomer Tayar /* Make sure that the allocated size is a multiple of dword (4 bytes) */ 6741c965db44STomer Tayar null_char_pos = text_size_bytes - 1; 6742c965db44STomer Tayar text_size_bytes = (text_size_bytes + 3) & ~0x3; 6743c965db44STomer Tayar 6744c965db44STomer Tayar if (text_size_bytes < QED_RESULTS_BUF_MIN_SIZE) { 6745c965db44STomer Tayar DP_NOTICE(p_hwfn->cdev, 6746c965db44STomer Tayar "formatted size of feature was too small %d. Aborting\n", 6747c965db44STomer Tayar text_size_bytes); 6748c965db44STomer Tayar return DBG_STATUS_INVALID_ARGS; 6749c965db44STomer Tayar } 6750c965db44STomer Tayar 6751c965db44STomer Tayar /* Allocate temp text buf */ 6752c965db44STomer Tayar text_buf = vzalloc(text_size_bytes); 6753c965db44STomer Tayar if (!text_buf) 6754c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 6755c965db44STomer Tayar 6756c965db44STomer Tayar /* Decode feature opcodes to string on temp buf */ 6757c965db44STomer Tayar rc = qed_features_lookup[feature_idx]. 6758c965db44STomer Tayar print_results(p_hwfn, (u32 *)feature->dump_buf, 6759c965db44STomer Tayar feature->dumped_dwords, text_buf); 6760c965db44STomer Tayar if (rc != DBG_STATUS_OK) { 6761c965db44STomer Tayar vfree(text_buf); 6762c965db44STomer Tayar return rc; 6763c965db44STomer Tayar } 6764c965db44STomer Tayar 6765c965db44STomer Tayar /* Replace the original null character with a '\n' character. 6766c965db44STomer Tayar * The bytes that were added as a result of the dword alignment are also 6767c965db44STomer Tayar * padded with '\n' characters. 6768c965db44STomer Tayar */ 6769c965db44STomer Tayar for (i = null_char_pos; i < text_size_bytes; i++) 6770c965db44STomer Tayar text_buf[i] = '\n'; 6771c965db44STomer Tayar 6772c965db44STomer Tayar /* Dump printable feature to log */ 6773c965db44STomer Tayar if (p_hwfn->cdev->dbg_params.print_data) 6774c965db44STomer Tayar qed_dbg_print_feature(text_buf, text_size_bytes); 6775c965db44STomer Tayar 6776c965db44STomer Tayar /* Free the old dump_buf and point the dump_buf to the newly allocagted 6777c965db44STomer Tayar * and formatted text buffer. 6778c965db44STomer Tayar */ 6779c965db44STomer Tayar vfree(feature->dump_buf); 6780c965db44STomer Tayar feature->dump_buf = text_buf; 6781c965db44STomer Tayar feature->buf_size = text_size_bytes; 6782c965db44STomer Tayar feature->dumped_dwords = text_size_bytes / 4; 6783c965db44STomer Tayar return rc; 6784c965db44STomer Tayar } 6785c965db44STomer Tayar 6786c965db44STomer Tayar /* Generic function for performing the dump of a debug feature. */ 67878c93beafSYuval Mintz static enum dbg_status qed_dbg_dump(struct qed_hwfn *p_hwfn, 67888c93beafSYuval Mintz struct qed_ptt *p_ptt, 6789c965db44STomer Tayar enum qed_dbg_features feature_idx) 6790c965db44STomer Tayar { 6791c965db44STomer Tayar struct qed_dbg_feature *feature = 6792c965db44STomer Tayar &p_hwfn->cdev->dbg_params.features[feature_idx]; 6793c965db44STomer Tayar u32 buf_size_dwords; 6794c965db44STomer Tayar enum dbg_status rc; 6795c965db44STomer Tayar 6796c965db44STomer Tayar DP_NOTICE(p_hwfn->cdev, "Collecting a debug feature [\"%s\"]\n", 6797c965db44STomer Tayar qed_features_lookup[feature_idx].name); 6798c965db44STomer Tayar 6799c965db44STomer Tayar /* Dump_buf was already allocated need to free (this can happen if dump 6800c965db44STomer Tayar * was called but file was never read). 6801c965db44STomer Tayar * We can't use the buffer as is since size may have changed. 6802c965db44STomer Tayar */ 6803c965db44STomer Tayar if (feature->dump_buf) { 6804c965db44STomer Tayar vfree(feature->dump_buf); 6805c965db44STomer Tayar feature->dump_buf = NULL; 6806c965db44STomer Tayar } 6807c965db44STomer Tayar 6808c965db44STomer Tayar /* Get buffer size from hsi, allocate accordingly, and perform the 6809c965db44STomer Tayar * dump. 6810c965db44STomer Tayar */ 6811c965db44STomer Tayar rc = qed_features_lookup[feature_idx].get_size(p_hwfn, p_ptt, 6812c965db44STomer Tayar &buf_size_dwords); 6813be086e7cSMintz, Yuval if (rc != DBG_STATUS_OK && rc != DBG_STATUS_NVRAM_GET_IMAGE_FAILED) 6814c965db44STomer Tayar return rc; 6815c965db44STomer Tayar feature->buf_size = buf_size_dwords * sizeof(u32); 6816c965db44STomer Tayar feature->dump_buf = vmalloc(feature->buf_size); 6817c965db44STomer Tayar if (!feature->dump_buf) 6818c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 6819c965db44STomer Tayar 6820c965db44STomer Tayar rc = qed_features_lookup[feature_idx]. 6821c965db44STomer Tayar perform_dump(p_hwfn, p_ptt, (u32 *)feature->dump_buf, 6822c965db44STomer Tayar feature->buf_size / sizeof(u32), 6823c965db44STomer Tayar &feature->dumped_dwords); 6824c965db44STomer Tayar 6825c965db44STomer Tayar /* If mcp is stuck we get DBG_STATUS_NVRAM_GET_IMAGE_FAILED error. 6826c965db44STomer Tayar * In this case the buffer holds valid binary data, but we wont able 6827c965db44STomer Tayar * to parse it (since parsing relies on data in NVRAM which is only 6828c965db44STomer Tayar * accessible when MFW is responsive). skip the formatting but return 6829c965db44STomer Tayar * success so that binary data is provided. 6830c965db44STomer Tayar */ 6831c965db44STomer Tayar if (rc == DBG_STATUS_NVRAM_GET_IMAGE_FAILED) 6832c965db44STomer Tayar return DBG_STATUS_OK; 6833c965db44STomer Tayar 6834c965db44STomer Tayar if (rc != DBG_STATUS_OK) 6835c965db44STomer Tayar return rc; 6836c965db44STomer Tayar 6837c965db44STomer Tayar /* Format output */ 6838c965db44STomer Tayar rc = format_feature(p_hwfn, feature_idx); 6839c965db44STomer Tayar return rc; 6840c965db44STomer Tayar } 6841c965db44STomer Tayar 6842c965db44STomer Tayar int qed_dbg_grc(struct qed_dev *cdev, void *buffer, u32 *num_dumped_bytes) 6843c965db44STomer Tayar { 6844c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_GRC, num_dumped_bytes); 6845c965db44STomer Tayar } 6846c965db44STomer Tayar 6847c965db44STomer Tayar int qed_dbg_grc_size(struct qed_dev *cdev) 6848c965db44STomer Tayar { 6849c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_GRC); 6850c965db44STomer Tayar } 6851c965db44STomer Tayar 6852c965db44STomer Tayar int qed_dbg_idle_chk(struct qed_dev *cdev, void *buffer, u32 *num_dumped_bytes) 6853c965db44STomer Tayar { 6854c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_IDLE_CHK, 6855c965db44STomer Tayar num_dumped_bytes); 6856c965db44STomer Tayar } 6857c965db44STomer Tayar 6858c965db44STomer Tayar int qed_dbg_idle_chk_size(struct qed_dev *cdev) 6859c965db44STomer Tayar { 6860c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_IDLE_CHK); 6861c965db44STomer Tayar } 6862c965db44STomer Tayar 6863c965db44STomer Tayar int qed_dbg_reg_fifo(struct qed_dev *cdev, void *buffer, u32 *num_dumped_bytes) 6864c965db44STomer Tayar { 6865c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_REG_FIFO, 6866c965db44STomer Tayar num_dumped_bytes); 6867c965db44STomer Tayar } 6868c965db44STomer Tayar 6869c965db44STomer Tayar int qed_dbg_reg_fifo_size(struct qed_dev *cdev) 6870c965db44STomer Tayar { 6871c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_REG_FIFO); 6872c965db44STomer Tayar } 6873c965db44STomer Tayar 6874c965db44STomer Tayar int qed_dbg_igu_fifo(struct qed_dev *cdev, void *buffer, u32 *num_dumped_bytes) 6875c965db44STomer Tayar { 6876c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_IGU_FIFO, 6877c965db44STomer Tayar num_dumped_bytes); 6878c965db44STomer Tayar } 6879c965db44STomer Tayar 6880c965db44STomer Tayar int qed_dbg_igu_fifo_size(struct qed_dev *cdev) 6881c965db44STomer Tayar { 6882c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_IGU_FIFO); 6883c965db44STomer Tayar } 6884c965db44STomer Tayar 6885c965db44STomer Tayar int qed_dbg_protection_override(struct qed_dev *cdev, void *buffer, 6886c965db44STomer Tayar u32 *num_dumped_bytes) 6887c965db44STomer Tayar { 6888c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_PROTECTION_OVERRIDE, 6889c965db44STomer Tayar num_dumped_bytes); 6890c965db44STomer Tayar } 6891c965db44STomer Tayar 6892c965db44STomer Tayar int qed_dbg_protection_override_size(struct qed_dev *cdev) 6893c965db44STomer Tayar { 6894c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_PROTECTION_OVERRIDE); 6895c965db44STomer Tayar } 6896c965db44STomer Tayar 6897c965db44STomer Tayar int qed_dbg_fw_asserts(struct qed_dev *cdev, void *buffer, 6898c965db44STomer Tayar u32 *num_dumped_bytes) 6899c965db44STomer Tayar { 6900c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_FW_ASSERTS, 6901c965db44STomer Tayar num_dumped_bytes); 6902c965db44STomer Tayar } 6903c965db44STomer Tayar 6904c965db44STomer Tayar int qed_dbg_fw_asserts_size(struct qed_dev *cdev) 6905c965db44STomer Tayar { 6906c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_FW_ASSERTS); 6907c965db44STomer Tayar } 6908c965db44STomer Tayar 6909c965db44STomer Tayar int qed_dbg_mcp_trace(struct qed_dev *cdev, void *buffer, 6910c965db44STomer Tayar u32 *num_dumped_bytes) 6911c965db44STomer Tayar { 6912c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_MCP_TRACE, 6913c965db44STomer Tayar num_dumped_bytes); 6914c965db44STomer Tayar } 6915c965db44STomer Tayar 6916c965db44STomer Tayar int qed_dbg_mcp_trace_size(struct qed_dev *cdev) 6917c965db44STomer Tayar { 6918c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_MCP_TRACE); 6919c965db44STomer Tayar } 6920c965db44STomer Tayar 6921c965db44STomer Tayar /* Defines the amount of bytes allocated for recording the length of debugfs 6922c965db44STomer Tayar * feature buffer. 6923c965db44STomer Tayar */ 6924c965db44STomer Tayar #define REGDUMP_HEADER_SIZE sizeof(u32) 6925c965db44STomer Tayar #define REGDUMP_HEADER_FEATURE_SHIFT 24 6926c965db44STomer Tayar #define REGDUMP_HEADER_ENGINE_SHIFT 31 6927c965db44STomer Tayar #define REGDUMP_HEADER_OMIT_ENGINE_SHIFT 30 6928c965db44STomer Tayar enum debug_print_features { 6929c965db44STomer Tayar OLD_MODE = 0, 6930c965db44STomer Tayar IDLE_CHK = 1, 6931c965db44STomer Tayar GRC_DUMP = 2, 6932c965db44STomer Tayar MCP_TRACE = 3, 6933c965db44STomer Tayar REG_FIFO = 4, 6934c965db44STomer Tayar PROTECTION_OVERRIDE = 5, 6935c965db44STomer Tayar IGU_FIFO = 6, 6936c965db44STomer Tayar PHY = 7, 6937c965db44STomer Tayar FW_ASSERTS = 8, 6938c965db44STomer Tayar }; 6939c965db44STomer Tayar 6940c965db44STomer Tayar static u32 qed_calc_regdump_header(enum debug_print_features feature, 6941c965db44STomer Tayar int engine, u32 feature_size, u8 omit_engine) 6942c965db44STomer Tayar { 6943c965db44STomer Tayar /* Insert the engine, feature and mode inside the header and combine it 6944c965db44STomer Tayar * with feature size. 6945c965db44STomer Tayar */ 6946c965db44STomer Tayar return feature_size | (feature << REGDUMP_HEADER_FEATURE_SHIFT) | 6947c965db44STomer Tayar (omit_engine << REGDUMP_HEADER_OMIT_ENGINE_SHIFT) | 6948c965db44STomer Tayar (engine << REGDUMP_HEADER_ENGINE_SHIFT); 6949c965db44STomer Tayar } 6950c965db44STomer Tayar 6951c965db44STomer Tayar int qed_dbg_all_data(struct qed_dev *cdev, void *buffer) 6952c965db44STomer Tayar { 6953c965db44STomer Tayar u8 cur_engine, omit_engine = 0, org_engine; 6954c965db44STomer Tayar u32 offset = 0, feature_size; 6955c965db44STomer Tayar int rc; 6956c965db44STomer Tayar 6957c965db44STomer Tayar if (cdev->num_hwfns == 1) 6958c965db44STomer Tayar omit_engine = 1; 6959c965db44STomer Tayar 6960c965db44STomer Tayar org_engine = qed_get_debug_engine(cdev); 6961c965db44STomer Tayar for (cur_engine = 0; cur_engine < cdev->num_hwfns; cur_engine++) { 6962c965db44STomer Tayar /* Collect idle_chks and grcDump for each hw function */ 6963c965db44STomer Tayar DP_VERBOSE(cdev, QED_MSG_DEBUG, 6964c965db44STomer Tayar "obtaining idle_chk and grcdump for current engine\n"); 6965c965db44STomer Tayar qed_set_debug_engine(cdev, cur_engine); 6966c965db44STomer Tayar 6967c965db44STomer Tayar /* First idle_chk */ 6968c965db44STomer Tayar rc = qed_dbg_idle_chk(cdev, (u8 *)buffer + offset + 6969c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 6970c965db44STomer Tayar if (!rc) { 6971c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 6972c965db44STomer Tayar qed_calc_regdump_header(IDLE_CHK, cur_engine, 6973c965db44STomer Tayar feature_size, omit_engine); 6974c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 6975c965db44STomer Tayar } else { 6976c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_idle_chk failed. rc = %d\n", rc); 6977c965db44STomer Tayar } 6978c965db44STomer Tayar 6979c965db44STomer Tayar /* Second idle_chk */ 6980c965db44STomer Tayar rc = qed_dbg_idle_chk(cdev, (u8 *)buffer + offset + 6981c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 6982c965db44STomer Tayar if (!rc) { 6983c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 6984c965db44STomer Tayar qed_calc_regdump_header(IDLE_CHK, cur_engine, 6985c965db44STomer Tayar feature_size, omit_engine); 6986c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 6987c965db44STomer Tayar } else { 6988c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_idle_chk failed. rc = %d\n", rc); 6989c965db44STomer Tayar } 6990c965db44STomer Tayar 6991c965db44STomer Tayar /* reg_fifo dump */ 6992c965db44STomer Tayar rc = qed_dbg_reg_fifo(cdev, (u8 *)buffer + offset + 6993c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 6994c965db44STomer Tayar if (!rc) { 6995c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 6996c965db44STomer Tayar qed_calc_regdump_header(REG_FIFO, cur_engine, 6997c965db44STomer Tayar feature_size, omit_engine); 6998c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 6999c965db44STomer Tayar } else { 7000c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_reg_fifo failed. rc = %d\n", rc); 7001c965db44STomer Tayar } 7002c965db44STomer Tayar 7003c965db44STomer Tayar /* igu_fifo dump */ 7004c965db44STomer Tayar rc = qed_dbg_igu_fifo(cdev, (u8 *)buffer + offset + 7005c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 7006c965db44STomer Tayar if (!rc) { 7007c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 7008c965db44STomer Tayar qed_calc_regdump_header(IGU_FIFO, cur_engine, 7009c965db44STomer Tayar feature_size, omit_engine); 7010c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 7011c965db44STomer Tayar } else { 7012c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_igu_fifo failed. rc = %d", rc); 7013c965db44STomer Tayar } 7014c965db44STomer Tayar 7015c965db44STomer Tayar /* protection_override dump */ 7016c965db44STomer Tayar rc = qed_dbg_protection_override(cdev, (u8 *)buffer + offset + 7017c965db44STomer Tayar REGDUMP_HEADER_SIZE, 7018c965db44STomer Tayar &feature_size); 7019c965db44STomer Tayar if (!rc) { 7020c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 7021c965db44STomer Tayar qed_calc_regdump_header(PROTECTION_OVERRIDE, 7022c965db44STomer Tayar cur_engine, 7023c965db44STomer Tayar feature_size, omit_engine); 7024c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 7025c965db44STomer Tayar } else { 7026c965db44STomer Tayar DP_ERR(cdev, 7027c965db44STomer Tayar "qed_dbg_protection_override failed. rc = %d\n", 7028c965db44STomer Tayar rc); 7029c965db44STomer Tayar } 7030c965db44STomer Tayar 7031c965db44STomer Tayar /* fw_asserts dump */ 7032c965db44STomer Tayar rc = qed_dbg_fw_asserts(cdev, (u8 *)buffer + offset + 7033c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 7034c965db44STomer Tayar if (!rc) { 7035c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 7036c965db44STomer Tayar qed_calc_regdump_header(FW_ASSERTS, cur_engine, 7037c965db44STomer Tayar feature_size, omit_engine); 7038c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 7039c965db44STomer Tayar } else { 7040c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_fw_asserts failed. rc = %d\n", 7041c965db44STomer Tayar rc); 7042c965db44STomer Tayar } 7043c965db44STomer Tayar 7044c965db44STomer Tayar /* GRC dump - must be last because when mcp stuck it will 7045c965db44STomer Tayar * clutter idle_chk, reg_fifo, ... 7046c965db44STomer Tayar */ 7047c965db44STomer Tayar rc = qed_dbg_grc(cdev, (u8 *)buffer + offset + 7048c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 7049c965db44STomer Tayar if (!rc) { 7050c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 7051c965db44STomer Tayar qed_calc_regdump_header(GRC_DUMP, cur_engine, 7052c965db44STomer Tayar feature_size, omit_engine); 7053c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 7054c965db44STomer Tayar } else { 7055c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_grc failed. rc = %d", rc); 7056c965db44STomer Tayar } 7057c965db44STomer Tayar } 7058c965db44STomer Tayar 7059c965db44STomer Tayar /* mcp_trace */ 7060c965db44STomer Tayar rc = qed_dbg_mcp_trace(cdev, (u8 *)buffer + offset + 7061c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 7062c965db44STomer Tayar if (!rc) { 7063c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 7064c965db44STomer Tayar qed_calc_regdump_header(MCP_TRACE, cur_engine, 7065c965db44STomer Tayar feature_size, omit_engine); 7066c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 7067c965db44STomer Tayar } else { 7068c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_mcp_trace failed. rc = %d\n", rc); 7069c965db44STomer Tayar } 7070c965db44STomer Tayar 7071c965db44STomer Tayar qed_set_debug_engine(cdev, org_engine); 7072c965db44STomer Tayar 7073c965db44STomer Tayar return 0; 7074c965db44STomer Tayar } 7075c965db44STomer Tayar 7076c965db44STomer Tayar int qed_dbg_all_data_size(struct qed_dev *cdev) 7077c965db44STomer Tayar { 7078c965db44STomer Tayar u8 cur_engine, org_engine; 7079c965db44STomer Tayar u32 regs_len = 0; 7080c965db44STomer Tayar 7081c965db44STomer Tayar org_engine = qed_get_debug_engine(cdev); 7082c965db44STomer Tayar for (cur_engine = 0; cur_engine < cdev->num_hwfns; cur_engine++) { 7083c965db44STomer Tayar /* Engine specific */ 7084c965db44STomer Tayar DP_VERBOSE(cdev, QED_MSG_DEBUG, 7085c965db44STomer Tayar "calculating idle_chk and grcdump register length for current engine\n"); 7086c965db44STomer Tayar qed_set_debug_engine(cdev, cur_engine); 7087c965db44STomer Tayar regs_len += REGDUMP_HEADER_SIZE + qed_dbg_idle_chk_size(cdev) + 7088c965db44STomer Tayar REGDUMP_HEADER_SIZE + qed_dbg_idle_chk_size(cdev) + 7089c965db44STomer Tayar REGDUMP_HEADER_SIZE + qed_dbg_grc_size(cdev) + 7090c965db44STomer Tayar REGDUMP_HEADER_SIZE + qed_dbg_reg_fifo_size(cdev) + 7091c965db44STomer Tayar REGDUMP_HEADER_SIZE + qed_dbg_igu_fifo_size(cdev) + 7092c965db44STomer Tayar REGDUMP_HEADER_SIZE + 7093c965db44STomer Tayar qed_dbg_protection_override_size(cdev) + 7094c965db44STomer Tayar REGDUMP_HEADER_SIZE + qed_dbg_fw_asserts_size(cdev); 7095c965db44STomer Tayar } 7096c965db44STomer Tayar 7097c965db44STomer Tayar /* Engine common */ 7098c965db44STomer Tayar regs_len += REGDUMP_HEADER_SIZE + qed_dbg_mcp_trace_size(cdev); 7099c965db44STomer Tayar qed_set_debug_engine(cdev, org_engine); 7100c965db44STomer Tayar 7101c965db44STomer Tayar return regs_len; 7102c965db44STomer Tayar } 7103c965db44STomer Tayar 7104c965db44STomer Tayar int qed_dbg_feature(struct qed_dev *cdev, void *buffer, 7105c965db44STomer Tayar enum qed_dbg_features feature, u32 *num_dumped_bytes) 7106c965db44STomer Tayar { 7107c965db44STomer Tayar struct qed_hwfn *p_hwfn = 7108c965db44STomer Tayar &cdev->hwfns[cdev->dbg_params.engine_for_debug]; 7109c965db44STomer Tayar struct qed_dbg_feature *qed_feature = 7110c965db44STomer Tayar &cdev->dbg_params.features[feature]; 7111c965db44STomer Tayar enum dbg_status dbg_rc; 7112c965db44STomer Tayar struct qed_ptt *p_ptt; 7113c965db44STomer Tayar int rc = 0; 7114c965db44STomer Tayar 7115c965db44STomer Tayar /* Acquire ptt */ 7116c965db44STomer Tayar p_ptt = qed_ptt_acquire(p_hwfn); 7117c965db44STomer Tayar if (!p_ptt) 7118c965db44STomer Tayar return -EINVAL; 7119c965db44STomer Tayar 7120c965db44STomer Tayar /* Get dump */ 7121c965db44STomer Tayar dbg_rc = qed_dbg_dump(p_hwfn, p_ptt, feature); 7122c965db44STomer Tayar if (dbg_rc != DBG_STATUS_OK) { 7123c965db44STomer Tayar DP_VERBOSE(cdev, QED_MSG_DEBUG, "%s\n", 7124c965db44STomer Tayar qed_dbg_get_status_str(dbg_rc)); 7125c965db44STomer Tayar *num_dumped_bytes = 0; 7126c965db44STomer Tayar rc = -EINVAL; 7127c965db44STomer Tayar goto out; 7128c965db44STomer Tayar } 7129c965db44STomer Tayar 7130c965db44STomer Tayar DP_VERBOSE(cdev, QED_MSG_DEBUG, 7131c965db44STomer Tayar "copying debugfs feature to external buffer\n"); 7132c965db44STomer Tayar memcpy(buffer, qed_feature->dump_buf, qed_feature->buf_size); 7133c965db44STomer Tayar *num_dumped_bytes = cdev->dbg_params.features[feature].dumped_dwords * 7134c965db44STomer Tayar 4; 7135c965db44STomer Tayar 7136c965db44STomer Tayar out: 7137c965db44STomer Tayar qed_ptt_release(p_hwfn, p_ptt); 7138c965db44STomer Tayar return rc; 7139c965db44STomer Tayar } 7140c965db44STomer Tayar 7141c965db44STomer Tayar int qed_dbg_feature_size(struct qed_dev *cdev, enum qed_dbg_features feature) 7142c965db44STomer Tayar { 7143c965db44STomer Tayar struct qed_hwfn *p_hwfn = 7144c965db44STomer Tayar &cdev->hwfns[cdev->dbg_params.engine_for_debug]; 7145c965db44STomer Tayar struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn); 7146c965db44STomer Tayar struct qed_dbg_feature *qed_feature = 7147c965db44STomer Tayar &cdev->dbg_params.features[feature]; 7148c965db44STomer Tayar u32 buf_size_dwords; 7149c965db44STomer Tayar enum dbg_status rc; 7150c965db44STomer Tayar 7151c965db44STomer Tayar if (!p_ptt) 7152c965db44STomer Tayar return -EINVAL; 7153c965db44STomer Tayar 7154c965db44STomer Tayar rc = qed_features_lookup[feature].get_size(p_hwfn, p_ptt, 7155c965db44STomer Tayar &buf_size_dwords); 7156c965db44STomer Tayar if (rc != DBG_STATUS_OK) 7157c965db44STomer Tayar buf_size_dwords = 0; 7158c965db44STomer Tayar 7159c965db44STomer Tayar qed_ptt_release(p_hwfn, p_ptt); 7160c965db44STomer Tayar qed_feature->buf_size = buf_size_dwords * sizeof(u32); 7161c965db44STomer Tayar return qed_feature->buf_size; 7162c965db44STomer Tayar } 7163c965db44STomer Tayar 7164c965db44STomer Tayar u8 qed_get_debug_engine(struct qed_dev *cdev) 7165c965db44STomer Tayar { 7166c965db44STomer Tayar return cdev->dbg_params.engine_for_debug; 7167c965db44STomer Tayar } 7168c965db44STomer Tayar 7169c965db44STomer Tayar void qed_set_debug_engine(struct qed_dev *cdev, int engine_number) 7170c965db44STomer Tayar { 7171c965db44STomer Tayar DP_VERBOSE(cdev, QED_MSG_DEBUG, "set debug engine to %d\n", 7172c965db44STomer Tayar engine_number); 7173c965db44STomer Tayar cdev->dbg_params.engine_for_debug = engine_number; 7174c965db44STomer Tayar } 7175c965db44STomer Tayar 7176c965db44STomer Tayar void qed_dbg_pf_init(struct qed_dev *cdev) 7177c965db44STomer Tayar { 7178c965db44STomer Tayar const u8 *dbg_values; 7179c965db44STomer Tayar 7180c965db44STomer Tayar /* Debug values are after init values. 7181c965db44STomer Tayar * The offset is the first dword of the file. 7182c965db44STomer Tayar */ 7183c965db44STomer Tayar dbg_values = cdev->firmware->data + *(u32 *)cdev->firmware->data; 7184c965db44STomer Tayar qed_dbg_set_bin_ptr((u8 *)dbg_values); 7185c965db44STomer Tayar qed_dbg_user_set_bin_ptr((u8 *)dbg_values); 7186c965db44STomer Tayar } 7187c965db44STomer Tayar 7188c965db44STomer Tayar void qed_dbg_pf_exit(struct qed_dev *cdev) 7189c965db44STomer Tayar { 7190c965db44STomer Tayar struct qed_dbg_feature *feature = NULL; 7191c965db44STomer Tayar enum qed_dbg_features feature_idx; 7192c965db44STomer Tayar 7193c965db44STomer Tayar /* Debug features' buffers may be allocated if debug feature was used 7194c965db44STomer Tayar * but dump wasn't called. 7195c965db44STomer Tayar */ 7196c965db44STomer Tayar for (feature_idx = 0; feature_idx < DBG_FEATURE_NUM; feature_idx++) { 7197c965db44STomer Tayar feature = &cdev->dbg_params.features[feature_idx]; 7198c965db44STomer Tayar if (feature->dump_buf) { 7199c965db44STomer Tayar vfree(feature->dump_buf); 7200c965db44STomer Tayar feature->dump_buf = NULL; 7201c965db44STomer Tayar } 7202c965db44STomer Tayar } 7203c965db44STomer Tayar } 7204