13287e96aSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2c965db44STomer Tayar /* QLogic qed NIC Driver 3c965db44STomer Tayar * Copyright (c) 2015 QLogic Corporation 4c965db44STomer Tayar */ 5c965db44STomer Tayar 6c965db44STomer Tayar #include <linux/module.h> 7c965db44STomer Tayar #include <linux/vmalloc.h> 8c965db44STomer Tayar #include <linux/crc32.h> 9c965db44STomer Tayar #include "qed.h" 108a52bbabSMichal Kalderon #include "qed_cxt.h" 11c965db44STomer Tayar #include "qed_hsi.h" 12c965db44STomer Tayar #include "qed_hw.h" 13c965db44STomer Tayar #include "qed_mcp.h" 14c965db44STomer Tayar #include "qed_reg_addr.h" 15c965db44STomer Tayar 16c965db44STomer Tayar /* Memory groups enum */ 17c965db44STomer Tayar enum mem_groups { 18c965db44STomer Tayar MEM_GROUP_PXP_MEM, 19c965db44STomer Tayar MEM_GROUP_DMAE_MEM, 20c965db44STomer Tayar MEM_GROUP_CM_MEM, 21c965db44STomer Tayar MEM_GROUP_QM_MEM, 22da090917STomer Tayar MEM_GROUP_DORQ_MEM, 23c965db44STomer Tayar MEM_GROUP_BRB_RAM, 24c965db44STomer Tayar MEM_GROUP_BRB_MEM, 25c965db44STomer Tayar MEM_GROUP_PRS_MEM, 26c965db44STomer Tayar MEM_GROUP_IOR, 27c965db44STomer Tayar MEM_GROUP_BTB_RAM, 28c965db44STomer Tayar MEM_GROUP_CONN_CFC_MEM, 29c965db44STomer Tayar MEM_GROUP_TASK_CFC_MEM, 30c965db44STomer Tayar MEM_GROUP_CAU_PI, 31c965db44STomer Tayar MEM_GROUP_CAU_MEM, 32c965db44STomer Tayar MEM_GROUP_PXP_ILT, 33da090917STomer Tayar MEM_GROUP_TM_MEM, 34da090917STomer Tayar MEM_GROUP_SDM_MEM, 357b6859fbSMintz, Yuval MEM_GROUP_PBUF, 36da090917STomer Tayar MEM_GROUP_RAM, 37c965db44STomer Tayar MEM_GROUP_MULD_MEM, 38c965db44STomer Tayar MEM_GROUP_BTB_MEM, 39da090917STomer Tayar MEM_GROUP_RDIF_CTX, 40da090917STomer Tayar MEM_GROUP_TDIF_CTX, 41da090917STomer Tayar MEM_GROUP_CFC_MEM, 42c965db44STomer Tayar MEM_GROUP_IGU_MEM, 43c965db44STomer Tayar MEM_GROUP_IGU_MSIX, 44c965db44STomer Tayar MEM_GROUP_CAU_SB, 45c965db44STomer Tayar MEM_GROUP_BMB_RAM, 46c965db44STomer Tayar MEM_GROUP_BMB_MEM, 47c965db44STomer Tayar MEM_GROUPS_NUM 48c965db44STomer Tayar }; 49c965db44STomer Tayar 50c965db44STomer Tayar /* Memory groups names */ 51c965db44STomer Tayar static const char * const s_mem_group_names[] = { 52c965db44STomer Tayar "PXP_MEM", 53c965db44STomer Tayar "DMAE_MEM", 54c965db44STomer Tayar "CM_MEM", 55c965db44STomer Tayar "QM_MEM", 56da090917STomer Tayar "DORQ_MEM", 57c965db44STomer Tayar "BRB_RAM", 58c965db44STomer Tayar "BRB_MEM", 59c965db44STomer Tayar "PRS_MEM", 60c965db44STomer Tayar "IOR", 61c965db44STomer Tayar "BTB_RAM", 62c965db44STomer Tayar "CONN_CFC_MEM", 63c965db44STomer Tayar "TASK_CFC_MEM", 64c965db44STomer Tayar "CAU_PI", 65c965db44STomer Tayar "CAU_MEM", 66c965db44STomer Tayar "PXP_ILT", 67da090917STomer Tayar "TM_MEM", 68da090917STomer Tayar "SDM_MEM", 697b6859fbSMintz, Yuval "PBUF", 70da090917STomer Tayar "RAM", 71c965db44STomer Tayar "MULD_MEM", 72c965db44STomer Tayar "BTB_MEM", 73da090917STomer Tayar "RDIF_CTX", 74da090917STomer Tayar "TDIF_CTX", 75da090917STomer Tayar "CFC_MEM", 76c965db44STomer Tayar "IGU_MEM", 77c965db44STomer Tayar "IGU_MSIX", 78c965db44STomer Tayar "CAU_SB", 79c965db44STomer Tayar "BMB_RAM", 80c965db44STomer Tayar "BMB_MEM", 81c965db44STomer Tayar }; 82c965db44STomer Tayar 83c965db44STomer Tayar /* Idle check conditions */ 847b6859fbSMintz, Yuval 857b6859fbSMintz, Yuval static u32 cond5(const u32 *r, const u32 *imm) 86c965db44STomer Tayar { 87c965db44STomer Tayar return ((r[0] & imm[0]) != imm[1]) && ((r[1] & imm[2]) != imm[3]); 88c965db44STomer Tayar } 89c965db44STomer Tayar 907b6859fbSMintz, Yuval static u32 cond7(const u32 *r, const u32 *imm) 91c965db44STomer Tayar { 92c965db44STomer Tayar return ((r[0] >> imm[0]) & imm[1]) != imm[2]; 93c965db44STomer Tayar } 94c965db44STomer Tayar 957b6859fbSMintz, Yuval static u32 cond6(const u32 *r, const u32 *imm) 96c965db44STomer Tayar { 97c965db44STomer Tayar return (r[0] & imm[0]) != imm[1]; 98c965db44STomer Tayar } 99c965db44STomer Tayar 1007b6859fbSMintz, Yuval static u32 cond9(const u32 *r, const u32 *imm) 101c965db44STomer Tayar { 102c965db44STomer Tayar return ((r[0] & imm[0]) >> imm[1]) != 103c965db44STomer Tayar (((r[0] & imm[2]) >> imm[3]) | ((r[1] & imm[4]) << imm[5])); 104c965db44STomer Tayar } 105c965db44STomer Tayar 1067b6859fbSMintz, Yuval static u32 cond10(const u32 *r, const u32 *imm) 107c965db44STomer Tayar { 108c965db44STomer Tayar return ((r[0] & imm[0]) >> imm[1]) != (r[0] & imm[2]); 109c965db44STomer Tayar } 110c965db44STomer Tayar 1117b6859fbSMintz, Yuval static u32 cond4(const u32 *r, const u32 *imm) 112c965db44STomer Tayar { 113c965db44STomer Tayar return (r[0] & ~imm[0]) != imm[1]; 114c965db44STomer Tayar } 115c965db44STomer Tayar 116c965db44STomer Tayar static u32 cond0(const u32 *r, const u32 *imm) 117c965db44STomer Tayar { 1187b6859fbSMintz, Yuval return (r[0] & ~r[1]) != imm[0]; 1197b6859fbSMintz, Yuval } 1207b6859fbSMintz, Yuval 1217b6859fbSMintz, Yuval static u32 cond1(const u32 *r, const u32 *imm) 1227b6859fbSMintz, Yuval { 123c965db44STomer Tayar return r[0] != imm[0]; 124c965db44STomer Tayar } 125c965db44STomer Tayar 1267b6859fbSMintz, Yuval static u32 cond11(const u32 *r, const u32 *imm) 127c965db44STomer Tayar { 128c965db44STomer Tayar return r[0] != r[1] && r[2] == imm[0]; 129c965db44STomer Tayar } 130c965db44STomer Tayar 1317b6859fbSMintz, Yuval static u32 cond12(const u32 *r, const u32 *imm) 132c965db44STomer Tayar { 133c965db44STomer Tayar return r[0] != r[1] && r[2] > imm[0]; 134c965db44STomer Tayar } 135c965db44STomer Tayar 136c965db44STomer Tayar static u32 cond3(const u32 *r, const u32 *imm) 137c965db44STomer Tayar { 138c965db44STomer Tayar return r[0] != r[1]; 139c965db44STomer Tayar } 140c965db44STomer Tayar 1417b6859fbSMintz, Yuval static u32 cond13(const u32 *r, const u32 *imm) 142c965db44STomer Tayar { 143c965db44STomer Tayar return r[0] & imm[0]; 144c965db44STomer Tayar } 145c965db44STomer Tayar 1467b6859fbSMintz, Yuval static u32 cond8(const u32 *r, const u32 *imm) 147c965db44STomer Tayar { 148c965db44STomer Tayar return r[0] < (r[1] - imm[0]); 149c965db44STomer Tayar } 150c965db44STomer Tayar 151c965db44STomer Tayar static u32 cond2(const u32 *r, const u32 *imm) 152c965db44STomer Tayar { 153c965db44STomer Tayar return r[0] > imm[0]; 154c965db44STomer Tayar } 155c965db44STomer Tayar 156c965db44STomer Tayar /* Array of Idle Check conditions */ 157c965db44STomer Tayar static u32(*cond_arr[]) (const u32 *r, const u32 *imm) = { 158c965db44STomer Tayar cond0, 159c965db44STomer Tayar cond1, 160c965db44STomer Tayar cond2, 161c965db44STomer Tayar cond3, 162c965db44STomer Tayar cond4, 163c965db44STomer Tayar cond5, 164c965db44STomer Tayar cond6, 165c965db44STomer Tayar cond7, 166c965db44STomer Tayar cond8, 167c965db44STomer Tayar cond9, 168c965db44STomer Tayar cond10, 169c965db44STomer Tayar cond11, 170c965db44STomer Tayar cond12, 1717b6859fbSMintz, Yuval cond13, 172c965db44STomer Tayar }; 173c965db44STomer Tayar 174c965db44STomer Tayar /******************************* Data Types **********************************/ 175c965db44STomer Tayar 176c965db44STomer Tayar enum platform_ids { 177c965db44STomer Tayar PLATFORM_ASIC, 178c965db44STomer Tayar PLATFORM_RESERVED, 179c965db44STomer Tayar PLATFORM_RESERVED2, 180c965db44STomer Tayar PLATFORM_RESERVED3, 181c965db44STomer Tayar MAX_PLATFORM_IDS 182c965db44STomer Tayar }; 183c965db44STomer Tayar 184c965db44STomer Tayar /* Chip constant definitions */ 185c965db44STomer Tayar struct chip_defs { 186c965db44STomer Tayar const char *name; 1878a52bbabSMichal Kalderon u32 num_ilt_pages; 188c965db44STomer Tayar }; 189c965db44STomer Tayar 190c965db44STomer Tayar /* Platform constant definitions */ 191c965db44STomer Tayar struct platform_defs { 192c965db44STomer Tayar const char *name; 193c965db44STomer Tayar u32 delay_factor; 194da090917STomer Tayar u32 dmae_thresh; 195da090917STomer Tayar u32 log_thresh; 196c965db44STomer Tayar }; 197c965db44STomer Tayar 1987b6859fbSMintz, Yuval /* Storm constant definitions. 1997b6859fbSMintz, Yuval * Addresses are in bytes, sizes are in quad-regs. 2007b6859fbSMintz, Yuval */ 201c965db44STomer Tayar struct storm_defs { 202c965db44STomer Tayar char letter; 203c965db44STomer Tayar enum block_id block_id; 204c965db44STomer Tayar enum dbg_bus_clients dbg_client_id[MAX_CHIP_IDS]; 205c965db44STomer Tayar bool has_vfc; 206c965db44STomer Tayar u32 sem_fast_mem_addr; 207c965db44STomer Tayar u32 sem_frame_mode_addr; 208c965db44STomer Tayar u32 sem_slow_enable_addr; 209c965db44STomer Tayar u32 sem_slow_mode_addr; 210c965db44STomer Tayar u32 sem_slow_mode1_conf_addr; 211c965db44STomer Tayar u32 sem_sync_dbg_empty_addr; 212c965db44STomer Tayar u32 sem_slow_dbg_empty_addr; 213c965db44STomer Tayar u32 cm_ctx_wr_addr; 2147b6859fbSMintz, Yuval u32 cm_conn_ag_ctx_lid_size; 215c965db44STomer Tayar u32 cm_conn_ag_ctx_rd_addr; 2167b6859fbSMintz, Yuval u32 cm_conn_st_ctx_lid_size; 217c965db44STomer Tayar u32 cm_conn_st_ctx_rd_addr; 2187b6859fbSMintz, Yuval u32 cm_task_ag_ctx_lid_size; 219c965db44STomer Tayar u32 cm_task_ag_ctx_rd_addr; 2207b6859fbSMintz, Yuval u32 cm_task_st_ctx_lid_size; 221c965db44STomer Tayar u32 cm_task_st_ctx_rd_addr; 222c965db44STomer Tayar }; 223c965db44STomer Tayar 224c965db44STomer Tayar /* Block constant definitions */ 225c965db44STomer Tayar struct block_defs { 226c965db44STomer Tayar const char *name; 227da090917STomer Tayar bool exists[MAX_CHIP_IDS]; 228c965db44STomer Tayar bool associated_to_storm; 2297b6859fbSMintz, Yuval 2307b6859fbSMintz, Yuval /* Valid only if associated_to_storm is true */ 2317b6859fbSMintz, Yuval u32 storm_id; 232c965db44STomer Tayar enum dbg_bus_clients dbg_client_id[MAX_CHIP_IDS]; 233c965db44STomer Tayar u32 dbg_select_addr; 2347b6859fbSMintz, Yuval u32 dbg_enable_addr; 235c965db44STomer Tayar u32 dbg_shift_addr; 236c965db44STomer Tayar u32 dbg_force_valid_addr; 237c965db44STomer Tayar u32 dbg_force_frame_addr; 238c965db44STomer Tayar bool has_reset_bit; 2397b6859fbSMintz, Yuval 2407b6859fbSMintz, Yuval /* If true, block is taken out of reset before dump */ 2417b6859fbSMintz, Yuval bool unreset; 242c965db44STomer Tayar enum dbg_reset_regs reset_reg; 2437b6859fbSMintz, Yuval 2447b6859fbSMintz, Yuval /* Bit offset in reset register */ 2457b6859fbSMintz, Yuval u8 reset_bit_offset; 246c965db44STomer Tayar }; 247c965db44STomer Tayar 248c965db44STomer Tayar /* Reset register definitions */ 249c965db44STomer Tayar struct reset_reg_defs { 250c965db44STomer Tayar u32 addr; 251c965db44STomer Tayar bool exists[MAX_CHIP_IDS]; 252da090917STomer Tayar u32 unreset_val[MAX_CHIP_IDS]; 253c965db44STomer Tayar }; 254c965db44STomer Tayar 255c965db44STomer Tayar struct grc_param_defs { 256c965db44STomer Tayar u32 default_val[MAX_CHIP_IDS]; 257c965db44STomer Tayar u32 min; 258c965db44STomer Tayar u32 max; 259c965db44STomer Tayar bool is_preset; 26050bc60cbSMichal Kalderon bool is_persistent; 261c965db44STomer Tayar u32 exclude_all_preset_val; 262c965db44STomer Tayar u32 crash_preset_val; 263c965db44STomer Tayar }; 264c965db44STomer Tayar 2657b6859fbSMintz, Yuval /* Address is in 128b units. Width is in bits. */ 266c965db44STomer Tayar struct rss_mem_defs { 267c965db44STomer Tayar const char *mem_name; 268c965db44STomer Tayar const char *type_name; 2697b6859fbSMintz, Yuval u32 addr; 270da090917STomer Tayar u32 entry_width; 271c965db44STomer Tayar u32 num_entries[MAX_CHIP_IDS]; 272c965db44STomer Tayar }; 273c965db44STomer Tayar 274c965db44STomer Tayar struct vfc_ram_defs { 275c965db44STomer Tayar const char *mem_name; 276c965db44STomer Tayar const char *type_name; 277c965db44STomer Tayar u32 base_row; 278c965db44STomer Tayar u32 num_rows; 279c965db44STomer Tayar }; 280c965db44STomer Tayar 281c965db44STomer Tayar struct big_ram_defs { 282c965db44STomer Tayar const char *instance_name; 283c965db44STomer Tayar enum mem_groups mem_group_id; 284c965db44STomer Tayar enum mem_groups ram_mem_group_id; 285c965db44STomer Tayar enum dbg_grc_params grc_param; 286c965db44STomer Tayar u32 addr_reg_addr; 287c965db44STomer Tayar u32 data_reg_addr; 288da090917STomer Tayar u32 is_256b_reg_addr; 289da090917STomer Tayar u32 is_256b_bit_offset[MAX_CHIP_IDS]; 290da090917STomer Tayar u32 ram_size[MAX_CHIP_IDS]; /* In dwords */ 291c965db44STomer Tayar }; 292c965db44STomer Tayar 293c965db44STomer Tayar struct phy_defs { 294c965db44STomer Tayar const char *phy_name; 2957b6859fbSMintz, Yuval 2967b6859fbSMintz, Yuval /* PHY base GRC address */ 297c965db44STomer Tayar u32 base_addr; 2987b6859fbSMintz, Yuval 2997b6859fbSMintz, Yuval /* Relative address of indirect TBUS address register (bits 0..7) */ 300c965db44STomer Tayar u32 tbus_addr_lo_addr; 3017b6859fbSMintz, Yuval 3027b6859fbSMintz, Yuval /* Relative address of indirect TBUS address register (bits 8..10) */ 303c965db44STomer Tayar u32 tbus_addr_hi_addr; 3047b6859fbSMintz, Yuval 3057b6859fbSMintz, Yuval /* Relative address of indirect TBUS data register (bits 0..7) */ 306c965db44STomer Tayar u32 tbus_data_lo_addr; 3077b6859fbSMintz, Yuval 3087b6859fbSMintz, Yuval /* Relative address of indirect TBUS data register (bits 8..11) */ 309c965db44STomer Tayar u32 tbus_data_hi_addr; 310c965db44STomer Tayar }; 311c965db44STomer Tayar 312d52c89f1SMichal Kalderon /* Split type definitions */ 313d52c89f1SMichal Kalderon struct split_type_defs { 314d52c89f1SMichal Kalderon const char *name; 315d52c89f1SMichal Kalderon }; 316d52c89f1SMichal Kalderon 317c965db44STomer Tayar /******************************** Constants **********************************/ 318c965db44STomer Tayar 319c965db44STomer Tayar #define MAX_LCIDS 320 320c965db44STomer Tayar #define MAX_LTIDS 320 3217b6859fbSMintz, Yuval 322c965db44STomer Tayar #define NUM_IOR_SETS 2 323c965db44STomer Tayar #define IORS_PER_SET 176 324c965db44STomer Tayar #define IOR_SET_OFFSET(set_id) ((set_id) * 256) 3257b6859fbSMintz, Yuval 326c965db44STomer Tayar #define BYTES_IN_DWORD sizeof(u32) 327c965db44STomer Tayar 328c965db44STomer Tayar /* In the macros below, size and offset are specified in bits */ 329c965db44STomer Tayar #define CEIL_DWORDS(size) DIV_ROUND_UP(size, 32) 330c965db44STomer Tayar #define FIELD_BIT_OFFSET(type, field) type ## _ ## field ## _ ## OFFSET 331c965db44STomer Tayar #define FIELD_BIT_SIZE(type, field) type ## _ ## field ## _ ## SIZE 332c965db44STomer Tayar #define FIELD_DWORD_OFFSET(type, field) \ 333c965db44STomer Tayar (int)(FIELD_BIT_OFFSET(type, field) / 32) 334c965db44STomer Tayar #define FIELD_DWORD_SHIFT(type, field) (FIELD_BIT_OFFSET(type, field) % 32) 335c965db44STomer Tayar #define FIELD_BIT_MASK(type, field) \ 336c965db44STomer Tayar (((1 << FIELD_BIT_SIZE(type, field)) - 1) << \ 337c965db44STomer Tayar FIELD_DWORD_SHIFT(type, field)) 3387b6859fbSMintz, Yuval 339c965db44STomer Tayar #define SET_VAR_FIELD(var, type, field, val) \ 340c965db44STomer Tayar do { \ 341c965db44STomer Tayar var[FIELD_DWORD_OFFSET(type, field)] &= \ 342c965db44STomer Tayar (~FIELD_BIT_MASK(type, field)); \ 343c965db44STomer Tayar var[FIELD_DWORD_OFFSET(type, field)] |= \ 344c965db44STomer Tayar (val) << FIELD_DWORD_SHIFT(type, field); \ 345c965db44STomer Tayar } while (0) 3467b6859fbSMintz, Yuval 347c965db44STomer Tayar #define ARR_REG_WR(dev, ptt, addr, arr, arr_size) \ 348c965db44STomer Tayar do { \ 349c965db44STomer Tayar for (i = 0; i < (arr_size); i++) \ 350c965db44STomer Tayar qed_wr(dev, ptt, addr, (arr)[i]); \ 351c965db44STomer Tayar } while (0) 3527b6859fbSMintz, Yuval 353c965db44STomer Tayar #define ARR_REG_RD(dev, ptt, addr, arr, arr_size) \ 354c965db44STomer Tayar do { \ 355c965db44STomer Tayar for (i = 0; i < (arr_size); i++) \ 356c965db44STomer Tayar (arr)[i] = qed_rd(dev, ptt, addr); \ 357c965db44STomer Tayar } while (0) 358c965db44STomer Tayar 359c965db44STomer Tayar #define DWORDS_TO_BYTES(dwords) ((dwords) * BYTES_IN_DWORD) 360c965db44STomer Tayar #define BYTES_TO_DWORDS(bytes) ((bytes) / BYTES_IN_DWORD) 3617b6859fbSMintz, Yuval 362a2e7699eSTomer Tayar /* Extra lines include a signature line + optional latency events line */ 3637b6859fbSMintz, Yuval #define NUM_EXTRA_DBG_LINES(block_desc) \ 3647b6859fbSMintz, Yuval (1 + ((block_desc)->has_latency_events ? 1 : 0)) 3657b6859fbSMintz, Yuval #define NUM_DBG_LINES(block_desc) \ 3667b6859fbSMintz, Yuval ((block_desc)->num_of_lines + NUM_EXTRA_DBG_LINES(block_desc)) 3677b6859fbSMintz, Yuval 368c965db44STomer Tayar #define RAM_LINES_TO_DWORDS(lines) ((lines) * 2) 369c965db44STomer Tayar #define RAM_LINES_TO_BYTES(lines) \ 370c965db44STomer Tayar DWORDS_TO_BYTES(RAM_LINES_TO_DWORDS(lines)) 3717b6859fbSMintz, Yuval 372c965db44STomer Tayar #define REG_DUMP_LEN_SHIFT 24 373c965db44STomer Tayar #define MEM_DUMP_ENTRY_SIZE_DWORDS \ 374c965db44STomer Tayar BYTES_TO_DWORDS(sizeof(struct dbg_dump_mem)) 3757b6859fbSMintz, Yuval 376c965db44STomer Tayar #define IDLE_CHK_RULE_SIZE_DWORDS \ 377c965db44STomer Tayar BYTES_TO_DWORDS(sizeof(struct dbg_idle_chk_rule)) 3787b6859fbSMintz, Yuval 379c965db44STomer Tayar #define IDLE_CHK_RESULT_HDR_DWORDS \ 380c965db44STomer Tayar BYTES_TO_DWORDS(sizeof(struct dbg_idle_chk_result_hdr)) 3817b6859fbSMintz, Yuval 382c965db44STomer Tayar #define IDLE_CHK_RESULT_REG_HDR_DWORDS \ 383c965db44STomer Tayar BYTES_TO_DWORDS(sizeof(struct dbg_idle_chk_result_reg_hdr)) 3847b6859fbSMintz, Yuval 3858a52bbabSMichal Kalderon #define PAGE_MEM_DESC_SIZE_DWORDS \ 3868a52bbabSMichal Kalderon BYTES_TO_DWORDS(sizeof(struct phys_mem_desc)) 3878a52bbabSMichal Kalderon 388c965db44STomer Tayar #define IDLE_CHK_MAX_ENTRIES_SIZE 32 389c965db44STomer Tayar 390c965db44STomer Tayar /* The sizes and offsets below are specified in bits */ 391c965db44STomer Tayar #define VFC_CAM_CMD_STRUCT_SIZE 64 392c965db44STomer Tayar #define VFC_CAM_CMD_ROW_OFFSET 48 393c965db44STomer Tayar #define VFC_CAM_CMD_ROW_SIZE 9 394c965db44STomer Tayar #define VFC_CAM_ADDR_STRUCT_SIZE 16 395c965db44STomer Tayar #define VFC_CAM_ADDR_OP_OFFSET 0 396c965db44STomer Tayar #define VFC_CAM_ADDR_OP_SIZE 4 397c965db44STomer Tayar #define VFC_CAM_RESP_STRUCT_SIZE 256 398c965db44STomer Tayar #define VFC_RAM_ADDR_STRUCT_SIZE 16 399c965db44STomer Tayar #define VFC_RAM_ADDR_OP_OFFSET 0 400c965db44STomer Tayar #define VFC_RAM_ADDR_OP_SIZE 2 401c965db44STomer Tayar #define VFC_RAM_ADDR_ROW_OFFSET 2 402c965db44STomer Tayar #define VFC_RAM_ADDR_ROW_SIZE 10 403c965db44STomer Tayar #define VFC_RAM_RESP_STRUCT_SIZE 256 4047b6859fbSMintz, Yuval 405c965db44STomer Tayar #define VFC_CAM_CMD_DWORDS CEIL_DWORDS(VFC_CAM_CMD_STRUCT_SIZE) 406c965db44STomer Tayar #define VFC_CAM_ADDR_DWORDS CEIL_DWORDS(VFC_CAM_ADDR_STRUCT_SIZE) 407c965db44STomer Tayar #define VFC_CAM_RESP_DWORDS CEIL_DWORDS(VFC_CAM_RESP_STRUCT_SIZE) 408c965db44STomer Tayar #define VFC_RAM_CMD_DWORDS VFC_CAM_CMD_DWORDS 409c965db44STomer Tayar #define VFC_RAM_ADDR_DWORDS CEIL_DWORDS(VFC_RAM_ADDR_STRUCT_SIZE) 410c965db44STomer Tayar #define VFC_RAM_RESP_DWORDS CEIL_DWORDS(VFC_RAM_RESP_STRUCT_SIZE) 4117b6859fbSMintz, Yuval 412c965db44STomer Tayar #define NUM_VFC_RAM_TYPES 4 4137b6859fbSMintz, Yuval 414c965db44STomer Tayar #define VFC_CAM_NUM_ROWS 512 4157b6859fbSMintz, Yuval 416c965db44STomer Tayar #define VFC_OPCODE_CAM_RD 14 417c965db44STomer Tayar #define VFC_OPCODE_RAM_RD 0 4187b6859fbSMintz, Yuval 419c965db44STomer Tayar #define NUM_RSS_MEM_TYPES 5 4207b6859fbSMintz, Yuval 421c965db44STomer Tayar #define NUM_BIG_RAM_TYPES 3 422c7d852e3SDenis Bolotin #define BIG_RAM_NAME_LEN 3 4237b6859fbSMintz, Yuval 424c965db44STomer Tayar #define NUM_PHY_TBUS_ADDRESSES 2048 425c965db44STomer Tayar #define PHY_DUMP_SIZE_DWORDS (NUM_PHY_TBUS_ADDRESSES / 2) 4267b6859fbSMintz, Yuval 427c965db44STomer Tayar #define RESET_REG_UNRESET_OFFSET 4 4287b6859fbSMintz, Yuval 429c965db44STomer Tayar #define STALL_DELAY_MS 500 4307b6859fbSMintz, Yuval 431c965db44STomer Tayar #define STATIC_DEBUG_LINE_DWORDS 9 4327b6859fbSMintz, Yuval 433c965db44STomer Tayar #define NUM_COMMON_GLOBAL_PARAMS 8 4347b6859fbSMintz, Yuval 435c965db44STomer Tayar #define FW_IMG_MAIN 1 4367b6859fbSMintz, Yuval 437c965db44STomer Tayar #define REG_FIFO_ELEMENT_DWORDS 2 4387b6859fbSMintz, Yuval #define REG_FIFO_DEPTH_ELEMENTS 32 439c965db44STomer Tayar #define REG_FIFO_DEPTH_DWORDS \ 440c965db44STomer Tayar (REG_FIFO_ELEMENT_DWORDS * REG_FIFO_DEPTH_ELEMENTS) 4417b6859fbSMintz, Yuval 442c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORDS 4 4437b6859fbSMintz, Yuval #define IGU_FIFO_DEPTH_ELEMENTS 64 444c965db44STomer Tayar #define IGU_FIFO_DEPTH_DWORDS \ 445c965db44STomer Tayar (IGU_FIFO_ELEMENT_DWORDS * IGU_FIFO_DEPTH_ELEMENTS) 4467b6859fbSMintz, Yuval 447c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_DWORDS 2 4487b6859fbSMintz, Yuval #define PROTECTION_OVERRIDE_DEPTH_ELEMENTS 20 449c965db44STomer Tayar #define PROTECTION_OVERRIDE_DEPTH_DWORDS \ 450c965db44STomer Tayar (PROTECTION_OVERRIDE_DEPTH_ELEMENTS * \ 451c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_DWORDS) 4527b6859fbSMintz, Yuval 453c965db44STomer Tayar #define MCP_SPAD_TRACE_OFFSIZE_ADDR \ 454c965db44STomer Tayar (MCP_REG_SCRATCH + \ 455c965db44STomer Tayar offsetof(struct static_init, sections[SPAD_SECTION_TRACE])) 4567b6859fbSMintz, Yuval 457c965db44STomer Tayar #define EMPTY_FW_VERSION_STR "???_???_???_???" 458c965db44STomer Tayar #define EMPTY_FW_IMAGE_STR "???????????????" 459c965db44STomer Tayar 460c965db44STomer Tayar /***************************** Constant Arrays *******************************/ 461c965db44STomer Tayar 4627b6859fbSMintz, Yuval struct dbg_array { 4637b6859fbSMintz, Yuval const u32 *ptr; 4647b6859fbSMintz, Yuval u32 size_in_dwords; 4657b6859fbSMintz, Yuval }; 4667b6859fbSMintz, Yuval 467c965db44STomer Tayar /* Debug arrays */ 4687b6859fbSMintz, Yuval static struct dbg_array s_dbg_arrays[MAX_BIN_DBG_BUFFER_TYPE] = { {NULL} }; 469c965db44STomer Tayar 470c965db44STomer Tayar /* Chip constant definitions array */ 471c965db44STomer Tayar static struct chip_defs s_chip_defs[MAX_CHIP_IDS] = { 4728a52bbabSMichal Kalderon {"bb", PSWRQ2_REG_ILT_MEMORY_SIZE_BB / 2}, 4738a52bbabSMichal Kalderon {"ah", PSWRQ2_REG_ILT_MEMORY_SIZE_K2 / 2} 474c965db44STomer Tayar }; 475c965db44STomer Tayar 476c965db44STomer Tayar /* Storm constant definitions array */ 477c965db44STomer Tayar static struct storm_defs s_storm_defs[] = { 478c965db44STomer Tayar /* Tstorm */ 479c965db44STomer Tayar {'T', BLOCK_TSEM, 480da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, 481da090917STomer Tayar DBG_BUS_CLIENT_RBCT}, true, 482c965db44STomer Tayar TSEM_REG_FAST_MEMORY, 4837b6859fbSMintz, Yuval TSEM_REG_DBG_FRAME_MODE_BB_K2, TSEM_REG_SLOW_DBG_ACTIVE_BB_K2, 4847b6859fbSMintz, Yuval TSEM_REG_SLOW_DBG_MODE_BB_K2, TSEM_REG_DBG_MODE1_CFG_BB_K2, 4857b6859fbSMintz, Yuval TSEM_REG_SYNC_DBG_EMPTY, TSEM_REG_SLOW_DBG_EMPTY_BB_K2, 486c965db44STomer Tayar TCM_REG_CTX_RBC_ACCS, 487c965db44STomer Tayar 4, TCM_REG_AGG_CON_CTX, 488c965db44STomer Tayar 16, TCM_REG_SM_CON_CTX, 489c965db44STomer Tayar 2, TCM_REG_AGG_TASK_CTX, 490c965db44STomer Tayar 4, TCM_REG_SM_TASK_CTX}, 4917b6859fbSMintz, Yuval 492c965db44STomer Tayar /* Mstorm */ 493c965db44STomer Tayar {'M', BLOCK_MSEM, 494da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, 495da090917STomer Tayar DBG_BUS_CLIENT_RBCM}, false, 496c965db44STomer Tayar MSEM_REG_FAST_MEMORY, 4977b6859fbSMintz, Yuval MSEM_REG_DBG_FRAME_MODE_BB_K2, MSEM_REG_SLOW_DBG_ACTIVE_BB_K2, 4987b6859fbSMintz, Yuval MSEM_REG_SLOW_DBG_MODE_BB_K2, MSEM_REG_DBG_MODE1_CFG_BB_K2, 4997b6859fbSMintz, Yuval MSEM_REG_SYNC_DBG_EMPTY, MSEM_REG_SLOW_DBG_EMPTY_BB_K2, 500c965db44STomer Tayar MCM_REG_CTX_RBC_ACCS, 501c965db44STomer Tayar 1, MCM_REG_AGG_CON_CTX, 502c965db44STomer Tayar 10, MCM_REG_SM_CON_CTX, 503c965db44STomer Tayar 2, MCM_REG_AGG_TASK_CTX, 504c965db44STomer Tayar 7, MCM_REG_SM_TASK_CTX}, 5057b6859fbSMintz, Yuval 506c965db44STomer Tayar /* Ustorm */ 507c965db44STomer Tayar {'U', BLOCK_USEM, 508da090917STomer Tayar {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, 509da090917STomer Tayar DBG_BUS_CLIENT_RBCU}, false, 510c965db44STomer Tayar USEM_REG_FAST_MEMORY, 5117b6859fbSMintz, Yuval USEM_REG_DBG_FRAME_MODE_BB_K2, USEM_REG_SLOW_DBG_ACTIVE_BB_K2, 5127b6859fbSMintz, Yuval USEM_REG_SLOW_DBG_MODE_BB_K2, USEM_REG_DBG_MODE1_CFG_BB_K2, 5137b6859fbSMintz, Yuval USEM_REG_SYNC_DBG_EMPTY, USEM_REG_SLOW_DBG_EMPTY_BB_K2, 514c965db44STomer Tayar UCM_REG_CTX_RBC_ACCS, 515c965db44STomer Tayar 2, UCM_REG_AGG_CON_CTX, 516c965db44STomer Tayar 13, UCM_REG_SM_CON_CTX, 517c965db44STomer Tayar 3, UCM_REG_AGG_TASK_CTX, 518c965db44STomer Tayar 3, UCM_REG_SM_TASK_CTX}, 5197b6859fbSMintz, Yuval 520c965db44STomer Tayar /* Xstorm */ 521c965db44STomer Tayar {'X', BLOCK_XSEM, 522da090917STomer Tayar {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX, 523da090917STomer Tayar DBG_BUS_CLIENT_RBCX}, false, 524c965db44STomer Tayar XSEM_REG_FAST_MEMORY, 5257b6859fbSMintz, Yuval XSEM_REG_DBG_FRAME_MODE_BB_K2, XSEM_REG_SLOW_DBG_ACTIVE_BB_K2, 5267b6859fbSMintz, Yuval XSEM_REG_SLOW_DBG_MODE_BB_K2, XSEM_REG_DBG_MODE1_CFG_BB_K2, 5277b6859fbSMintz, Yuval XSEM_REG_SYNC_DBG_EMPTY, XSEM_REG_SLOW_DBG_EMPTY_BB_K2, 528c965db44STomer Tayar XCM_REG_CTX_RBC_ACCS, 529c965db44STomer Tayar 9, XCM_REG_AGG_CON_CTX, 530c965db44STomer Tayar 15, XCM_REG_SM_CON_CTX, 531c965db44STomer Tayar 0, 0, 532c965db44STomer Tayar 0, 0}, 5337b6859fbSMintz, Yuval 534c965db44STomer Tayar /* Ystorm */ 535c965db44STomer Tayar {'Y', BLOCK_YSEM, 536da090917STomer Tayar {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY, 537da090917STomer Tayar DBG_BUS_CLIENT_RBCY}, false, 538c965db44STomer Tayar YSEM_REG_FAST_MEMORY, 5397b6859fbSMintz, Yuval YSEM_REG_DBG_FRAME_MODE_BB_K2, YSEM_REG_SLOW_DBG_ACTIVE_BB_K2, 5407b6859fbSMintz, Yuval YSEM_REG_SLOW_DBG_MODE_BB_K2, YSEM_REG_DBG_MODE1_CFG_BB_K2, 5417b6859fbSMintz, Yuval YSEM_REG_SYNC_DBG_EMPTY, TSEM_REG_SLOW_DBG_EMPTY_BB_K2, 542c965db44STomer Tayar YCM_REG_CTX_RBC_ACCS, 543c965db44STomer Tayar 2, YCM_REG_AGG_CON_CTX, 544c965db44STomer Tayar 3, YCM_REG_SM_CON_CTX, 545c965db44STomer Tayar 2, YCM_REG_AGG_TASK_CTX, 546c965db44STomer Tayar 12, YCM_REG_SM_TASK_CTX}, 5477b6859fbSMintz, Yuval 548c965db44STomer Tayar /* Pstorm */ 549c965db44STomer Tayar {'P', BLOCK_PSEM, 550da090917STomer Tayar {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, 551da090917STomer Tayar DBG_BUS_CLIENT_RBCS}, true, 552c965db44STomer Tayar PSEM_REG_FAST_MEMORY, 5537b6859fbSMintz, Yuval PSEM_REG_DBG_FRAME_MODE_BB_K2, PSEM_REG_SLOW_DBG_ACTIVE_BB_K2, 5547b6859fbSMintz, Yuval PSEM_REG_SLOW_DBG_MODE_BB_K2, PSEM_REG_DBG_MODE1_CFG_BB_K2, 5557b6859fbSMintz, Yuval PSEM_REG_SYNC_DBG_EMPTY, PSEM_REG_SLOW_DBG_EMPTY_BB_K2, 556c965db44STomer Tayar PCM_REG_CTX_RBC_ACCS, 557c965db44STomer Tayar 0, 0, 558c965db44STomer Tayar 10, PCM_REG_SM_CON_CTX, 559c965db44STomer Tayar 0, 0, 560c965db44STomer Tayar 0, 0} 561c965db44STomer Tayar }; 562c965db44STomer Tayar 563c965db44STomer Tayar /* Block definitions array */ 5647b6859fbSMintz, Yuval 565c965db44STomer Tayar static struct block_defs block_grc_defs = { 566be086e7cSMintz, Yuval "grc", 567da090917STomer Tayar {true, true, true}, false, 0, 568da090917STomer Tayar {DBG_BUS_CLIENT_RBCN, DBG_BUS_CLIENT_RBCN, DBG_BUS_CLIENT_RBCN}, 569c965db44STomer Tayar GRC_REG_DBG_SELECT, GRC_REG_DBG_DWORD_ENABLE, 570c965db44STomer Tayar GRC_REG_DBG_SHIFT, GRC_REG_DBG_FORCE_VALID, 571c965db44STomer Tayar GRC_REG_DBG_FORCE_FRAME, 572c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_UA, 1 573c965db44STomer Tayar }; 574c965db44STomer Tayar 575c965db44STomer Tayar static struct block_defs block_miscs_defs = { 576da090917STomer Tayar "miscs", {true, true, true}, false, 0, 577da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 578c965db44STomer Tayar 0, 0, 0, 0, 0, 579c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 580c965db44STomer Tayar }; 581c965db44STomer Tayar 582c965db44STomer Tayar static struct block_defs block_misc_defs = { 583da090917STomer Tayar "misc", {true, true, true}, false, 0, 584da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 585c965db44STomer Tayar 0, 0, 0, 0, 0, 586c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 587c965db44STomer Tayar }; 588c965db44STomer Tayar 589c965db44STomer Tayar static struct block_defs block_dbu_defs = { 590da090917STomer Tayar "dbu", {true, true, true}, false, 0, 591da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 592c965db44STomer Tayar 0, 0, 0, 0, 0, 593c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 594c965db44STomer Tayar }; 595c965db44STomer Tayar 596c965db44STomer Tayar static struct block_defs block_pglue_b_defs = { 597be086e7cSMintz, Yuval "pglue_b", 598da090917STomer Tayar {true, true, true}, false, 0, 599da090917STomer Tayar {DBG_BUS_CLIENT_RBCH, DBG_BUS_CLIENT_RBCH, DBG_BUS_CLIENT_RBCH}, 600c965db44STomer Tayar PGLUE_B_REG_DBG_SELECT, PGLUE_B_REG_DBG_DWORD_ENABLE, 601c965db44STomer Tayar PGLUE_B_REG_DBG_SHIFT, PGLUE_B_REG_DBG_FORCE_VALID, 602c965db44STomer Tayar PGLUE_B_REG_DBG_FORCE_FRAME, 603c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 1 604c965db44STomer Tayar }; 605c965db44STomer Tayar 606c965db44STomer Tayar static struct block_defs block_cnig_defs = { 607be086e7cSMintz, Yuval "cnig", 608da090917STomer Tayar {true, true, true}, false, 0, 609da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCW, 610da090917STomer Tayar DBG_BUS_CLIENT_RBCW}, 61121dd79e8STomer Tayar CNIG_REG_DBG_SELECT_K2_E5, CNIG_REG_DBG_DWORD_ENABLE_K2_E5, 61221dd79e8STomer Tayar CNIG_REG_DBG_SHIFT_K2_E5, CNIG_REG_DBG_FORCE_VALID_K2_E5, 61321dd79e8STomer Tayar CNIG_REG_DBG_FORCE_FRAME_K2_E5, 614c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 0 615c965db44STomer Tayar }; 616c965db44STomer Tayar 617c965db44STomer Tayar static struct block_defs block_cpmu_defs = { 618da090917STomer Tayar "cpmu", {true, true, true}, false, 0, 619da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 620c965db44STomer Tayar 0, 0, 0, 0, 0, 621c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 8 622c965db44STomer Tayar }; 623c965db44STomer Tayar 624c965db44STomer Tayar static struct block_defs block_ncsi_defs = { 625be086e7cSMintz, Yuval "ncsi", 626da090917STomer Tayar {true, true, true}, false, 0, 627da090917STomer Tayar {DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ}, 628c965db44STomer Tayar NCSI_REG_DBG_SELECT, NCSI_REG_DBG_DWORD_ENABLE, 629c965db44STomer Tayar NCSI_REG_DBG_SHIFT, NCSI_REG_DBG_FORCE_VALID, 630c965db44STomer Tayar NCSI_REG_DBG_FORCE_FRAME, 631c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 5 632c965db44STomer Tayar }; 633c965db44STomer Tayar 634c965db44STomer Tayar static struct block_defs block_opte_defs = { 635da090917STomer Tayar "opte", {true, true, false}, false, 0, 636da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 637c965db44STomer Tayar 0, 0, 0, 0, 0, 638c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 4 639c965db44STomer Tayar }; 640c965db44STomer Tayar 641c965db44STomer Tayar static struct block_defs block_bmb_defs = { 642be086e7cSMintz, Yuval "bmb", 643da090917STomer Tayar {true, true, true}, false, 0, 644da090917STomer Tayar {DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCB, DBG_BUS_CLIENT_RBCB}, 645c965db44STomer Tayar BMB_REG_DBG_SELECT, BMB_REG_DBG_DWORD_ENABLE, 646c965db44STomer Tayar BMB_REG_DBG_SHIFT, BMB_REG_DBG_FORCE_VALID, 647c965db44STomer Tayar BMB_REG_DBG_FORCE_FRAME, 648c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_UA, 7 649c965db44STomer Tayar }; 650c965db44STomer Tayar 651c965db44STomer Tayar static struct block_defs block_pcie_defs = { 652be086e7cSMintz, Yuval "pcie", 653da090917STomer Tayar {true, true, true}, false, 0, 654da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH, 655da090917STomer Tayar DBG_BUS_CLIENT_RBCH}, 65621dd79e8STomer Tayar PCIE_REG_DBG_COMMON_SELECT_K2_E5, 65721dd79e8STomer Tayar PCIE_REG_DBG_COMMON_DWORD_ENABLE_K2_E5, 65821dd79e8STomer Tayar PCIE_REG_DBG_COMMON_SHIFT_K2_E5, 65921dd79e8STomer Tayar PCIE_REG_DBG_COMMON_FORCE_VALID_K2_E5, 66021dd79e8STomer Tayar PCIE_REG_DBG_COMMON_FORCE_FRAME_K2_E5, 661c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 662c965db44STomer Tayar }; 663c965db44STomer Tayar 664c965db44STomer Tayar static struct block_defs block_mcp_defs = { 665da090917STomer Tayar "mcp", {true, true, true}, false, 0, 666da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 667c965db44STomer Tayar 0, 0, 0, 0, 0, 668c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 669c965db44STomer Tayar }; 670c965db44STomer Tayar 671c965db44STomer Tayar static struct block_defs block_mcp2_defs = { 672be086e7cSMintz, Yuval "mcp2", 673da090917STomer Tayar {true, true, true}, false, 0, 674da090917STomer Tayar {DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ}, 675c965db44STomer Tayar MCP2_REG_DBG_SELECT, MCP2_REG_DBG_DWORD_ENABLE, 676c965db44STomer Tayar MCP2_REG_DBG_SHIFT, MCP2_REG_DBG_FORCE_VALID, 677c965db44STomer Tayar MCP2_REG_DBG_FORCE_FRAME, 678c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 679c965db44STomer Tayar }; 680c965db44STomer Tayar 681c965db44STomer Tayar static struct block_defs block_pswhst_defs = { 682be086e7cSMintz, Yuval "pswhst", 683da090917STomer Tayar {true, true, true}, false, 0, 684da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 685c965db44STomer Tayar PSWHST_REG_DBG_SELECT, PSWHST_REG_DBG_DWORD_ENABLE, 686c965db44STomer Tayar PSWHST_REG_DBG_SHIFT, PSWHST_REG_DBG_FORCE_VALID, 687c965db44STomer Tayar PSWHST_REG_DBG_FORCE_FRAME, 688c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 0 689c965db44STomer Tayar }; 690c965db44STomer Tayar 691c965db44STomer Tayar static struct block_defs block_pswhst2_defs = { 692be086e7cSMintz, Yuval "pswhst2", 693da090917STomer Tayar {true, true, true}, false, 0, 694da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 695c965db44STomer Tayar PSWHST2_REG_DBG_SELECT, PSWHST2_REG_DBG_DWORD_ENABLE, 696c965db44STomer Tayar PSWHST2_REG_DBG_SHIFT, PSWHST2_REG_DBG_FORCE_VALID, 697c965db44STomer Tayar PSWHST2_REG_DBG_FORCE_FRAME, 698c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 0 699c965db44STomer Tayar }; 700c965db44STomer Tayar 701c965db44STomer Tayar static struct block_defs block_pswrd_defs = { 702be086e7cSMintz, Yuval "pswrd", 703da090917STomer Tayar {true, true, true}, false, 0, 704da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 705c965db44STomer Tayar PSWRD_REG_DBG_SELECT, PSWRD_REG_DBG_DWORD_ENABLE, 706c965db44STomer Tayar PSWRD_REG_DBG_SHIFT, PSWRD_REG_DBG_FORCE_VALID, 707c965db44STomer Tayar PSWRD_REG_DBG_FORCE_FRAME, 708c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 2 709c965db44STomer Tayar }; 710c965db44STomer Tayar 711c965db44STomer Tayar static struct block_defs block_pswrd2_defs = { 712be086e7cSMintz, Yuval "pswrd2", 713da090917STomer Tayar {true, true, true}, false, 0, 714da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 715c965db44STomer Tayar PSWRD2_REG_DBG_SELECT, PSWRD2_REG_DBG_DWORD_ENABLE, 716c965db44STomer Tayar PSWRD2_REG_DBG_SHIFT, PSWRD2_REG_DBG_FORCE_VALID, 717c965db44STomer Tayar PSWRD2_REG_DBG_FORCE_FRAME, 718c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 2 719c965db44STomer Tayar }; 720c965db44STomer Tayar 721c965db44STomer Tayar static struct block_defs block_pswwr_defs = { 722be086e7cSMintz, Yuval "pswwr", 723da090917STomer Tayar {true, true, true}, false, 0, 724da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 725c965db44STomer Tayar PSWWR_REG_DBG_SELECT, PSWWR_REG_DBG_DWORD_ENABLE, 726c965db44STomer Tayar PSWWR_REG_DBG_SHIFT, PSWWR_REG_DBG_FORCE_VALID, 727c965db44STomer Tayar PSWWR_REG_DBG_FORCE_FRAME, 728c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 3 729c965db44STomer Tayar }; 730c965db44STomer Tayar 731c965db44STomer Tayar static struct block_defs block_pswwr2_defs = { 732da090917STomer Tayar "pswwr2", {true, true, true}, false, 0, 733da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 734c965db44STomer Tayar 0, 0, 0, 0, 0, 735c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 3 736c965db44STomer Tayar }; 737c965db44STomer Tayar 738c965db44STomer Tayar static struct block_defs block_pswrq_defs = { 739be086e7cSMintz, Yuval "pswrq", 740da090917STomer Tayar {true, true, true}, false, 0, 741da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 742c965db44STomer Tayar PSWRQ_REG_DBG_SELECT, PSWRQ_REG_DBG_DWORD_ENABLE, 743c965db44STomer Tayar PSWRQ_REG_DBG_SHIFT, PSWRQ_REG_DBG_FORCE_VALID, 744c965db44STomer Tayar PSWRQ_REG_DBG_FORCE_FRAME, 745c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 1 746c965db44STomer Tayar }; 747c965db44STomer Tayar 748c965db44STomer Tayar static struct block_defs block_pswrq2_defs = { 749be086e7cSMintz, Yuval "pswrq2", 750da090917STomer Tayar {true, true, true}, false, 0, 751da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 752c965db44STomer Tayar PSWRQ2_REG_DBG_SELECT, PSWRQ2_REG_DBG_DWORD_ENABLE, 753c965db44STomer Tayar PSWRQ2_REG_DBG_SHIFT, PSWRQ2_REG_DBG_FORCE_VALID, 754c965db44STomer Tayar PSWRQ2_REG_DBG_FORCE_FRAME, 755c965db44STomer Tayar true, false, DBG_RESET_REG_MISC_PL_HV, 1 756c965db44STomer Tayar }; 757c965db44STomer Tayar 758c965db44STomer Tayar static struct block_defs block_pglcs_defs = { 759be086e7cSMintz, Yuval "pglcs", 760da090917STomer Tayar {true, true, true}, false, 0, 761da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH, 762da090917STomer Tayar DBG_BUS_CLIENT_RBCH}, 76321dd79e8STomer Tayar PGLCS_REG_DBG_SELECT_K2_E5, PGLCS_REG_DBG_DWORD_ENABLE_K2_E5, 76421dd79e8STomer Tayar PGLCS_REG_DBG_SHIFT_K2_E5, PGLCS_REG_DBG_FORCE_VALID_K2_E5, 76521dd79e8STomer Tayar PGLCS_REG_DBG_FORCE_FRAME_K2_E5, 766c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 2 767c965db44STomer Tayar }; 768c965db44STomer Tayar 769c965db44STomer Tayar static struct block_defs block_ptu_defs = { 770be086e7cSMintz, Yuval "ptu", 771da090917STomer Tayar {true, true, true}, false, 0, 772da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 773c965db44STomer Tayar PTU_REG_DBG_SELECT, PTU_REG_DBG_DWORD_ENABLE, 774c965db44STomer Tayar PTU_REG_DBG_SHIFT, PTU_REG_DBG_FORCE_VALID, 775c965db44STomer Tayar PTU_REG_DBG_FORCE_FRAME, 776c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 20 777c965db44STomer Tayar }; 778c965db44STomer Tayar 779c965db44STomer Tayar static struct block_defs block_dmae_defs = { 780be086e7cSMintz, Yuval "dmae", 781da090917STomer Tayar {true, true, true}, false, 0, 782da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 783c965db44STomer Tayar DMAE_REG_DBG_SELECT, DMAE_REG_DBG_DWORD_ENABLE, 784c965db44STomer Tayar DMAE_REG_DBG_SHIFT, DMAE_REG_DBG_FORCE_VALID, 785c965db44STomer Tayar DMAE_REG_DBG_FORCE_FRAME, 786c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 28 787c965db44STomer Tayar }; 788c965db44STomer Tayar 789c965db44STomer Tayar static struct block_defs block_tcm_defs = { 790be086e7cSMintz, Yuval "tcm", 791da090917STomer Tayar {true, true, true}, true, DBG_TSTORM_ID, 792da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT}, 793c965db44STomer Tayar TCM_REG_DBG_SELECT, TCM_REG_DBG_DWORD_ENABLE, 794c965db44STomer Tayar TCM_REG_DBG_SHIFT, TCM_REG_DBG_FORCE_VALID, 795c965db44STomer Tayar TCM_REG_DBG_FORCE_FRAME, 796c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 5 797c965db44STomer Tayar }; 798c965db44STomer Tayar 799c965db44STomer Tayar static struct block_defs block_mcm_defs = { 800be086e7cSMintz, Yuval "mcm", 801da090917STomer Tayar {true, true, true}, true, DBG_MSTORM_ID, 802da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM}, 803c965db44STomer Tayar MCM_REG_DBG_SELECT, MCM_REG_DBG_DWORD_ENABLE, 804c965db44STomer Tayar MCM_REG_DBG_SHIFT, MCM_REG_DBG_FORCE_VALID, 805c965db44STomer Tayar MCM_REG_DBG_FORCE_FRAME, 806c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 3 807c965db44STomer Tayar }; 808c965db44STomer Tayar 809c965db44STomer Tayar static struct block_defs block_ucm_defs = { 810be086e7cSMintz, Yuval "ucm", 811da090917STomer Tayar {true, true, true}, true, DBG_USTORM_ID, 812da090917STomer Tayar {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU}, 813c965db44STomer Tayar UCM_REG_DBG_SELECT, UCM_REG_DBG_DWORD_ENABLE, 814c965db44STomer Tayar UCM_REG_DBG_SHIFT, UCM_REG_DBG_FORCE_VALID, 815c965db44STomer Tayar UCM_REG_DBG_FORCE_FRAME, 816c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 8 817c965db44STomer Tayar }; 818c965db44STomer Tayar 819c965db44STomer Tayar static struct block_defs block_xcm_defs = { 820be086e7cSMintz, Yuval "xcm", 821da090917STomer Tayar {true, true, true}, true, DBG_XSTORM_ID, 822da090917STomer Tayar {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX}, 823c965db44STomer Tayar XCM_REG_DBG_SELECT, XCM_REG_DBG_DWORD_ENABLE, 824c965db44STomer Tayar XCM_REG_DBG_SHIFT, XCM_REG_DBG_FORCE_VALID, 825c965db44STomer Tayar XCM_REG_DBG_FORCE_FRAME, 826c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 19 827c965db44STomer Tayar }; 828c965db44STomer Tayar 829c965db44STomer Tayar static struct block_defs block_ycm_defs = { 830be086e7cSMintz, Yuval "ycm", 831da090917STomer Tayar {true, true, true}, true, DBG_YSTORM_ID, 832da090917STomer Tayar {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY, DBG_BUS_CLIENT_RBCY}, 833c965db44STomer Tayar YCM_REG_DBG_SELECT, YCM_REG_DBG_DWORD_ENABLE, 834c965db44STomer Tayar YCM_REG_DBG_SHIFT, YCM_REG_DBG_FORCE_VALID, 835c965db44STomer Tayar YCM_REG_DBG_FORCE_FRAME, 836c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 5 837c965db44STomer Tayar }; 838c965db44STomer Tayar 839c965db44STomer Tayar static struct block_defs block_pcm_defs = { 840be086e7cSMintz, Yuval "pcm", 841da090917STomer Tayar {true, true, true}, true, DBG_PSTORM_ID, 842da090917STomer Tayar {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, 843c965db44STomer Tayar PCM_REG_DBG_SELECT, PCM_REG_DBG_DWORD_ENABLE, 844c965db44STomer Tayar PCM_REG_DBG_SHIFT, PCM_REG_DBG_FORCE_VALID, 845c965db44STomer Tayar PCM_REG_DBG_FORCE_FRAME, 846c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 4 847c965db44STomer Tayar }; 848c965db44STomer Tayar 849c965db44STomer Tayar static struct block_defs block_qm_defs = { 850be086e7cSMintz, Yuval "qm", 851da090917STomer Tayar {true, true, true}, false, 0, 852da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCQ, DBG_BUS_CLIENT_RBCQ}, 853c965db44STomer Tayar QM_REG_DBG_SELECT, QM_REG_DBG_DWORD_ENABLE, 854c965db44STomer Tayar QM_REG_DBG_SHIFT, QM_REG_DBG_FORCE_VALID, 855c965db44STomer Tayar QM_REG_DBG_FORCE_FRAME, 856c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 16 857c965db44STomer Tayar }; 858c965db44STomer Tayar 859c965db44STomer Tayar static struct block_defs block_tm_defs = { 860be086e7cSMintz, Yuval "tm", 861da090917STomer Tayar {true, true, true}, false, 0, 862da090917STomer Tayar {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, 863c965db44STomer Tayar TM_REG_DBG_SELECT, TM_REG_DBG_DWORD_ENABLE, 864c965db44STomer Tayar TM_REG_DBG_SHIFT, TM_REG_DBG_FORCE_VALID, 865c965db44STomer Tayar TM_REG_DBG_FORCE_FRAME, 866c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 17 867c965db44STomer Tayar }; 868c965db44STomer Tayar 869c965db44STomer Tayar static struct block_defs block_dorq_defs = { 870be086e7cSMintz, Yuval "dorq", 871da090917STomer Tayar {true, true, true}, false, 0, 872da090917STomer Tayar {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY, DBG_BUS_CLIENT_RBCY}, 873c965db44STomer Tayar DORQ_REG_DBG_SELECT, DORQ_REG_DBG_DWORD_ENABLE, 874c965db44STomer Tayar DORQ_REG_DBG_SHIFT, DORQ_REG_DBG_FORCE_VALID, 875c965db44STomer Tayar DORQ_REG_DBG_FORCE_FRAME, 876c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 18 877c965db44STomer Tayar }; 878c965db44STomer Tayar 879c965db44STomer Tayar static struct block_defs block_brb_defs = { 880be086e7cSMintz, Yuval "brb", 881da090917STomer Tayar {true, true, true}, false, 0, 882da090917STomer Tayar {DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCR}, 883c965db44STomer Tayar BRB_REG_DBG_SELECT, BRB_REG_DBG_DWORD_ENABLE, 884c965db44STomer Tayar BRB_REG_DBG_SHIFT, BRB_REG_DBG_FORCE_VALID, 885c965db44STomer Tayar BRB_REG_DBG_FORCE_FRAME, 886c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 0 887c965db44STomer Tayar }; 888c965db44STomer Tayar 889c965db44STomer Tayar static struct block_defs block_src_defs = { 890be086e7cSMintz, Yuval "src", 891da090917STomer Tayar {true, true, true}, false, 0, 892da090917STomer Tayar {DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF}, 893c965db44STomer Tayar SRC_REG_DBG_SELECT, SRC_REG_DBG_DWORD_ENABLE, 894c965db44STomer Tayar SRC_REG_DBG_SHIFT, SRC_REG_DBG_FORCE_VALID, 895c965db44STomer Tayar SRC_REG_DBG_FORCE_FRAME, 896c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 2 897c965db44STomer Tayar }; 898c965db44STomer Tayar 899c965db44STomer Tayar static struct block_defs block_prs_defs = { 900be086e7cSMintz, Yuval "prs", 901da090917STomer Tayar {true, true, true}, false, 0, 902da090917STomer Tayar {DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCR}, 903c965db44STomer Tayar PRS_REG_DBG_SELECT, PRS_REG_DBG_DWORD_ENABLE, 904c965db44STomer Tayar PRS_REG_DBG_SHIFT, PRS_REG_DBG_FORCE_VALID, 905c965db44STomer Tayar PRS_REG_DBG_FORCE_FRAME, 906c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 1 907c965db44STomer Tayar }; 908c965db44STomer Tayar 909c965db44STomer Tayar static struct block_defs block_tsdm_defs = { 910be086e7cSMintz, Yuval "tsdm", 911da090917STomer Tayar {true, true, true}, true, DBG_TSTORM_ID, 912da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT}, 913c965db44STomer Tayar TSDM_REG_DBG_SELECT, TSDM_REG_DBG_DWORD_ENABLE, 914c965db44STomer Tayar TSDM_REG_DBG_SHIFT, TSDM_REG_DBG_FORCE_VALID, 915c965db44STomer Tayar TSDM_REG_DBG_FORCE_FRAME, 916c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 3 917c965db44STomer Tayar }; 918c965db44STomer Tayar 919c965db44STomer Tayar static struct block_defs block_msdm_defs = { 920be086e7cSMintz, Yuval "msdm", 921da090917STomer Tayar {true, true, true}, true, DBG_MSTORM_ID, 922da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM}, 923c965db44STomer Tayar MSDM_REG_DBG_SELECT, MSDM_REG_DBG_DWORD_ENABLE, 924c965db44STomer Tayar MSDM_REG_DBG_SHIFT, MSDM_REG_DBG_FORCE_VALID, 925c965db44STomer Tayar MSDM_REG_DBG_FORCE_FRAME, 926c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 6 927c965db44STomer Tayar }; 928c965db44STomer Tayar 929c965db44STomer Tayar static struct block_defs block_usdm_defs = { 930be086e7cSMintz, Yuval "usdm", 931da090917STomer Tayar {true, true, true}, true, DBG_USTORM_ID, 932da090917STomer Tayar {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU}, 933c965db44STomer Tayar USDM_REG_DBG_SELECT, USDM_REG_DBG_DWORD_ENABLE, 934c965db44STomer Tayar USDM_REG_DBG_SHIFT, USDM_REG_DBG_FORCE_VALID, 935c965db44STomer Tayar USDM_REG_DBG_FORCE_FRAME, 936c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 7 937c965db44STomer Tayar }; 938c965db44STomer Tayar 939c965db44STomer Tayar static struct block_defs block_xsdm_defs = { 940be086e7cSMintz, Yuval "xsdm", 941da090917STomer Tayar {true, true, true}, true, DBG_XSTORM_ID, 942da090917STomer Tayar {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX}, 943c965db44STomer Tayar XSDM_REG_DBG_SELECT, XSDM_REG_DBG_DWORD_ENABLE, 944c965db44STomer Tayar XSDM_REG_DBG_SHIFT, XSDM_REG_DBG_FORCE_VALID, 945c965db44STomer Tayar XSDM_REG_DBG_FORCE_FRAME, 946c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 20 947c965db44STomer Tayar }; 948c965db44STomer Tayar 949c965db44STomer Tayar static struct block_defs block_ysdm_defs = { 950be086e7cSMintz, Yuval "ysdm", 951da090917STomer Tayar {true, true, true}, true, DBG_YSTORM_ID, 952da090917STomer Tayar {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY, DBG_BUS_CLIENT_RBCY}, 953c965db44STomer Tayar YSDM_REG_DBG_SELECT, YSDM_REG_DBG_DWORD_ENABLE, 954c965db44STomer Tayar YSDM_REG_DBG_SHIFT, YSDM_REG_DBG_FORCE_VALID, 955c965db44STomer Tayar YSDM_REG_DBG_FORCE_FRAME, 956c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 8 957c965db44STomer Tayar }; 958c965db44STomer Tayar 959c965db44STomer Tayar static struct block_defs block_psdm_defs = { 960be086e7cSMintz, Yuval "psdm", 961da090917STomer Tayar {true, true, true}, true, DBG_PSTORM_ID, 962da090917STomer Tayar {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, 963c965db44STomer Tayar PSDM_REG_DBG_SELECT, PSDM_REG_DBG_DWORD_ENABLE, 964c965db44STomer Tayar PSDM_REG_DBG_SHIFT, PSDM_REG_DBG_FORCE_VALID, 965c965db44STomer Tayar PSDM_REG_DBG_FORCE_FRAME, 966c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 7 967c965db44STomer Tayar }; 968c965db44STomer Tayar 969c965db44STomer Tayar static struct block_defs block_tsem_defs = { 970be086e7cSMintz, Yuval "tsem", 971da090917STomer Tayar {true, true, true}, true, DBG_TSTORM_ID, 972da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT}, 973c965db44STomer Tayar TSEM_REG_DBG_SELECT, TSEM_REG_DBG_DWORD_ENABLE, 974c965db44STomer Tayar TSEM_REG_DBG_SHIFT, TSEM_REG_DBG_FORCE_VALID, 975c965db44STomer Tayar TSEM_REG_DBG_FORCE_FRAME, 976c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 4 977c965db44STomer Tayar }; 978c965db44STomer Tayar 979c965db44STomer Tayar static struct block_defs block_msem_defs = { 980be086e7cSMintz, Yuval "msem", 981da090917STomer Tayar {true, true, true}, true, DBG_MSTORM_ID, 982da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM}, 983c965db44STomer Tayar MSEM_REG_DBG_SELECT, MSEM_REG_DBG_DWORD_ENABLE, 984c965db44STomer Tayar MSEM_REG_DBG_SHIFT, MSEM_REG_DBG_FORCE_VALID, 985c965db44STomer Tayar MSEM_REG_DBG_FORCE_FRAME, 986c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 9 987c965db44STomer Tayar }; 988c965db44STomer Tayar 989c965db44STomer Tayar static struct block_defs block_usem_defs = { 990be086e7cSMintz, Yuval "usem", 991da090917STomer Tayar {true, true, true}, true, DBG_USTORM_ID, 992da090917STomer Tayar {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU}, 993c965db44STomer Tayar USEM_REG_DBG_SELECT, USEM_REG_DBG_DWORD_ENABLE, 994c965db44STomer Tayar USEM_REG_DBG_SHIFT, USEM_REG_DBG_FORCE_VALID, 995c965db44STomer Tayar USEM_REG_DBG_FORCE_FRAME, 996c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 9 997c965db44STomer Tayar }; 998c965db44STomer Tayar 999c965db44STomer Tayar static struct block_defs block_xsem_defs = { 1000be086e7cSMintz, Yuval "xsem", 1001da090917STomer Tayar {true, true, true}, true, DBG_XSTORM_ID, 1002da090917STomer Tayar {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX}, 1003c965db44STomer Tayar XSEM_REG_DBG_SELECT, XSEM_REG_DBG_DWORD_ENABLE, 1004c965db44STomer Tayar XSEM_REG_DBG_SHIFT, XSEM_REG_DBG_FORCE_VALID, 1005c965db44STomer Tayar XSEM_REG_DBG_FORCE_FRAME, 1006c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 21 1007c965db44STomer Tayar }; 1008c965db44STomer Tayar 1009c965db44STomer Tayar static struct block_defs block_ysem_defs = { 1010be086e7cSMintz, Yuval "ysem", 1011da090917STomer Tayar {true, true, true}, true, DBG_YSTORM_ID, 1012da090917STomer Tayar {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCY, DBG_BUS_CLIENT_RBCY}, 1013c965db44STomer Tayar YSEM_REG_DBG_SELECT, YSEM_REG_DBG_DWORD_ENABLE, 1014c965db44STomer Tayar YSEM_REG_DBG_SHIFT, YSEM_REG_DBG_FORCE_VALID, 1015c965db44STomer Tayar YSEM_REG_DBG_FORCE_FRAME, 1016c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 11 1017c965db44STomer Tayar }; 1018c965db44STomer Tayar 1019c965db44STomer Tayar static struct block_defs block_psem_defs = { 1020be086e7cSMintz, Yuval "psem", 1021da090917STomer Tayar {true, true, true}, true, DBG_PSTORM_ID, 1022da090917STomer Tayar {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, 1023c965db44STomer Tayar PSEM_REG_DBG_SELECT, PSEM_REG_DBG_DWORD_ENABLE, 1024c965db44STomer Tayar PSEM_REG_DBG_SHIFT, PSEM_REG_DBG_FORCE_VALID, 1025c965db44STomer Tayar PSEM_REG_DBG_FORCE_FRAME, 1026c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 10 1027c965db44STomer Tayar }; 1028c965db44STomer Tayar 1029c965db44STomer Tayar static struct block_defs block_rss_defs = { 1030be086e7cSMintz, Yuval "rss", 1031da090917STomer Tayar {true, true, true}, false, 0, 1032da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCT}, 1033c965db44STomer Tayar RSS_REG_DBG_SELECT, RSS_REG_DBG_DWORD_ENABLE, 1034c965db44STomer Tayar RSS_REG_DBG_SHIFT, RSS_REG_DBG_FORCE_VALID, 1035c965db44STomer Tayar RSS_REG_DBG_FORCE_FRAME, 1036c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 18 1037c965db44STomer Tayar }; 1038c965db44STomer Tayar 1039c965db44STomer Tayar static struct block_defs block_tmld_defs = { 1040be086e7cSMintz, Yuval "tmld", 1041da090917STomer Tayar {true, true, true}, false, 0, 1042da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM}, 1043c965db44STomer Tayar TMLD_REG_DBG_SELECT, TMLD_REG_DBG_DWORD_ENABLE, 1044c965db44STomer Tayar TMLD_REG_DBG_SHIFT, TMLD_REG_DBG_FORCE_VALID, 1045c965db44STomer Tayar TMLD_REG_DBG_FORCE_FRAME, 1046c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 13 1047c965db44STomer Tayar }; 1048c965db44STomer Tayar 1049c965db44STomer Tayar static struct block_defs block_muld_defs = { 1050be086e7cSMintz, Yuval "muld", 1051da090917STomer Tayar {true, true, true}, false, 0, 1052da090917STomer Tayar {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU}, 1053c965db44STomer Tayar MULD_REG_DBG_SELECT, MULD_REG_DBG_DWORD_ENABLE, 1054c965db44STomer Tayar MULD_REG_DBG_SHIFT, MULD_REG_DBG_FORCE_VALID, 1055c965db44STomer Tayar MULD_REG_DBG_FORCE_FRAME, 1056c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 14 1057c965db44STomer Tayar }; 1058c965db44STomer Tayar 1059c965db44STomer Tayar static struct block_defs block_yuld_defs = { 1060be086e7cSMintz, Yuval "yuld", 1061da090917STomer Tayar {true, true, false}, false, 0, 1062da090917STomer Tayar {DBG_BUS_CLIENT_RBCU, DBG_BUS_CLIENT_RBCU, 1063da090917STomer Tayar MAX_DBG_BUS_CLIENTS}, 10647b6859fbSMintz, Yuval YULD_REG_DBG_SELECT_BB_K2, YULD_REG_DBG_DWORD_ENABLE_BB_K2, 10657b6859fbSMintz, Yuval YULD_REG_DBG_SHIFT_BB_K2, YULD_REG_DBG_FORCE_VALID_BB_K2, 10667b6859fbSMintz, Yuval YULD_REG_DBG_FORCE_FRAME_BB_K2, 10677b6859fbSMintz, Yuval true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 10687b6859fbSMintz, Yuval 15 1069c965db44STomer Tayar }; 1070c965db44STomer Tayar 1071c965db44STomer Tayar static struct block_defs block_xyld_defs = { 1072be086e7cSMintz, Yuval "xyld", 1073da090917STomer Tayar {true, true, true}, false, 0, 1074da090917STomer Tayar {DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX, DBG_BUS_CLIENT_RBCX}, 1075c965db44STomer Tayar XYLD_REG_DBG_SELECT, XYLD_REG_DBG_DWORD_ENABLE, 1076c965db44STomer Tayar XYLD_REG_DBG_SHIFT, XYLD_REG_DBG_FORCE_VALID, 1077c965db44STomer Tayar XYLD_REG_DBG_FORCE_FRAME, 1078c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 12 1079c965db44STomer Tayar }; 1080c965db44STomer Tayar 1081a2e7699eSTomer Tayar static struct block_defs block_ptld_defs = { 1082da090917STomer Tayar "ptld", 1083da090917STomer Tayar {false, false, true}, false, 0, 1084da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCT}, 1085da090917STomer Tayar PTLD_REG_DBG_SELECT_E5, PTLD_REG_DBG_DWORD_ENABLE_E5, 1086da090917STomer Tayar PTLD_REG_DBG_SHIFT_E5, PTLD_REG_DBG_FORCE_VALID_E5, 1087da090917STomer Tayar PTLD_REG_DBG_FORCE_FRAME_E5, 1088da090917STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 1089da090917STomer Tayar 28 1090a2e7699eSTomer Tayar }; 1091a2e7699eSTomer Tayar 1092a2e7699eSTomer Tayar static struct block_defs block_ypld_defs = { 1093da090917STomer Tayar "ypld", 1094da090917STomer Tayar {false, false, true}, false, 0, 1095da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCS}, 1096da090917STomer Tayar YPLD_REG_DBG_SELECT_E5, YPLD_REG_DBG_DWORD_ENABLE_E5, 1097da090917STomer Tayar YPLD_REG_DBG_SHIFT_E5, YPLD_REG_DBG_FORCE_VALID_E5, 1098da090917STomer Tayar YPLD_REG_DBG_FORCE_FRAME_E5, 1099da090917STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 1100da090917STomer Tayar 27 1101a2e7699eSTomer Tayar }; 1102a2e7699eSTomer Tayar 1103c965db44STomer Tayar static struct block_defs block_prm_defs = { 1104be086e7cSMintz, Yuval "prm", 1105da090917STomer Tayar {true, true, true}, false, 0, 1106da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM}, 1107c965db44STomer Tayar PRM_REG_DBG_SELECT, PRM_REG_DBG_DWORD_ENABLE, 1108c965db44STomer Tayar PRM_REG_DBG_SHIFT, PRM_REG_DBG_FORCE_VALID, 1109c965db44STomer Tayar PRM_REG_DBG_FORCE_FRAME, 1110c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 21 1111c965db44STomer Tayar }; 1112c965db44STomer Tayar 1113c965db44STomer Tayar static struct block_defs block_pbf_pb1_defs = { 1114be086e7cSMintz, Yuval "pbf_pb1", 1115da090917STomer Tayar {true, true, true}, false, 0, 1116da090917STomer Tayar {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCV, DBG_BUS_CLIENT_RBCV}, 1117c965db44STomer Tayar PBF_PB1_REG_DBG_SELECT, PBF_PB1_REG_DBG_DWORD_ENABLE, 1118c965db44STomer Tayar PBF_PB1_REG_DBG_SHIFT, PBF_PB1_REG_DBG_FORCE_VALID, 1119c965db44STomer Tayar PBF_PB1_REG_DBG_FORCE_FRAME, 1120c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 1121c965db44STomer Tayar 11 1122c965db44STomer Tayar }; 1123c965db44STomer Tayar 1124c965db44STomer Tayar static struct block_defs block_pbf_pb2_defs = { 1125be086e7cSMintz, Yuval "pbf_pb2", 1126da090917STomer Tayar {true, true, true}, false, 0, 1127da090917STomer Tayar {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCV, DBG_BUS_CLIENT_RBCV}, 1128c965db44STomer Tayar PBF_PB2_REG_DBG_SELECT, PBF_PB2_REG_DBG_DWORD_ENABLE, 1129c965db44STomer Tayar PBF_PB2_REG_DBG_SHIFT, PBF_PB2_REG_DBG_FORCE_VALID, 1130c965db44STomer Tayar PBF_PB2_REG_DBG_FORCE_FRAME, 1131c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 1132c965db44STomer Tayar 12 1133c965db44STomer Tayar }; 1134c965db44STomer Tayar 1135c965db44STomer Tayar static struct block_defs block_rpb_defs = { 1136be086e7cSMintz, Yuval "rpb", 1137da090917STomer Tayar {true, true, true}, false, 0, 1138da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM}, 1139c965db44STomer Tayar RPB_REG_DBG_SELECT, RPB_REG_DBG_DWORD_ENABLE, 1140c965db44STomer Tayar RPB_REG_DBG_SHIFT, RPB_REG_DBG_FORCE_VALID, 1141c965db44STomer Tayar RPB_REG_DBG_FORCE_FRAME, 1142c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 13 1143c965db44STomer Tayar }; 1144c965db44STomer Tayar 1145c965db44STomer Tayar static struct block_defs block_btb_defs = { 1146be086e7cSMintz, Yuval "btb", 1147da090917STomer Tayar {true, true, true}, false, 0, 1148da090917STomer Tayar {DBG_BUS_CLIENT_RBCR, DBG_BUS_CLIENT_RBCV, DBG_BUS_CLIENT_RBCV}, 1149c965db44STomer Tayar BTB_REG_DBG_SELECT, BTB_REG_DBG_DWORD_ENABLE, 1150c965db44STomer Tayar BTB_REG_DBG_SHIFT, BTB_REG_DBG_FORCE_VALID, 1151c965db44STomer Tayar BTB_REG_DBG_FORCE_FRAME, 1152c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 10 1153c965db44STomer Tayar }; 1154c965db44STomer Tayar 1155c965db44STomer Tayar static struct block_defs block_pbf_defs = { 1156be086e7cSMintz, Yuval "pbf", 1157da090917STomer Tayar {true, true, true}, false, 0, 1158da090917STomer Tayar {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCV, DBG_BUS_CLIENT_RBCV}, 1159c965db44STomer Tayar PBF_REG_DBG_SELECT, PBF_REG_DBG_DWORD_ENABLE, 1160c965db44STomer Tayar PBF_REG_DBG_SHIFT, PBF_REG_DBG_FORCE_VALID, 1161c965db44STomer Tayar PBF_REG_DBG_FORCE_FRAME, 1162c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 15 1163c965db44STomer Tayar }; 1164c965db44STomer Tayar 1165c965db44STomer Tayar static struct block_defs block_rdif_defs = { 1166be086e7cSMintz, Yuval "rdif", 1167da090917STomer Tayar {true, true, true}, false, 0, 1168da090917STomer Tayar {DBG_BUS_CLIENT_RBCT, DBG_BUS_CLIENT_RBCM, DBG_BUS_CLIENT_RBCM}, 1169c965db44STomer Tayar RDIF_REG_DBG_SELECT, RDIF_REG_DBG_DWORD_ENABLE, 1170c965db44STomer Tayar RDIF_REG_DBG_SHIFT, RDIF_REG_DBG_FORCE_VALID, 1171c965db44STomer Tayar RDIF_REG_DBG_FORCE_FRAME, 1172c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 16 1173c965db44STomer Tayar }; 1174c965db44STomer Tayar 1175c965db44STomer Tayar static struct block_defs block_tdif_defs = { 1176be086e7cSMintz, Yuval "tdif", 1177da090917STomer Tayar {true, true, true}, false, 0, 1178da090917STomer Tayar {DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS, DBG_BUS_CLIENT_RBCS}, 1179c965db44STomer Tayar TDIF_REG_DBG_SELECT, TDIF_REG_DBG_DWORD_ENABLE, 1180c965db44STomer Tayar TDIF_REG_DBG_SHIFT, TDIF_REG_DBG_FORCE_VALID, 1181c965db44STomer Tayar TDIF_REG_DBG_FORCE_FRAME, 1182c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 17 1183c965db44STomer Tayar }; 1184c965db44STomer Tayar 1185c965db44STomer Tayar static struct block_defs block_cdu_defs = { 1186be086e7cSMintz, Yuval "cdu", 1187da090917STomer Tayar {true, true, true}, false, 0, 1188da090917STomer Tayar {DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF}, 1189c965db44STomer Tayar CDU_REG_DBG_SELECT, CDU_REG_DBG_DWORD_ENABLE, 1190c965db44STomer Tayar CDU_REG_DBG_SHIFT, CDU_REG_DBG_FORCE_VALID, 1191c965db44STomer Tayar CDU_REG_DBG_FORCE_FRAME, 1192c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 23 1193c965db44STomer Tayar }; 1194c965db44STomer Tayar 1195c965db44STomer Tayar static struct block_defs block_ccfc_defs = { 1196be086e7cSMintz, Yuval "ccfc", 1197da090917STomer Tayar {true, true, true}, false, 0, 1198da090917STomer Tayar {DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF}, 1199c965db44STomer Tayar CCFC_REG_DBG_SELECT, CCFC_REG_DBG_DWORD_ENABLE, 1200c965db44STomer Tayar CCFC_REG_DBG_SHIFT, CCFC_REG_DBG_FORCE_VALID, 1201c965db44STomer Tayar CCFC_REG_DBG_FORCE_FRAME, 1202c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 24 1203c965db44STomer Tayar }; 1204c965db44STomer Tayar 1205c965db44STomer Tayar static struct block_defs block_tcfc_defs = { 1206be086e7cSMintz, Yuval "tcfc", 1207da090917STomer Tayar {true, true, true}, false, 0, 1208da090917STomer Tayar {DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF, DBG_BUS_CLIENT_RBCF}, 1209c965db44STomer Tayar TCFC_REG_DBG_SELECT, TCFC_REG_DBG_DWORD_ENABLE, 1210c965db44STomer Tayar TCFC_REG_DBG_SHIFT, TCFC_REG_DBG_FORCE_VALID, 1211c965db44STomer Tayar TCFC_REG_DBG_FORCE_FRAME, 1212c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 25 1213c965db44STomer Tayar }; 1214c965db44STomer Tayar 1215c965db44STomer Tayar static struct block_defs block_igu_defs = { 1216be086e7cSMintz, Yuval "igu", 1217da090917STomer Tayar {true, true, true}, false, 0, 1218da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 1219c965db44STomer Tayar IGU_REG_DBG_SELECT, IGU_REG_DBG_DWORD_ENABLE, 1220c965db44STomer Tayar IGU_REG_DBG_SHIFT, IGU_REG_DBG_FORCE_VALID, 1221c965db44STomer Tayar IGU_REG_DBG_FORCE_FRAME, 1222c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 27 1223c965db44STomer Tayar }; 1224c965db44STomer Tayar 1225c965db44STomer Tayar static struct block_defs block_cau_defs = { 1226be086e7cSMintz, Yuval "cau", 1227da090917STomer Tayar {true, true, true}, false, 0, 1228da090917STomer Tayar {DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP, DBG_BUS_CLIENT_RBCP}, 1229c965db44STomer Tayar CAU_REG_DBG_SELECT, CAU_REG_DBG_DWORD_ENABLE, 1230c965db44STomer Tayar CAU_REG_DBG_SHIFT, CAU_REG_DBG_FORCE_VALID, 1231c965db44STomer Tayar CAU_REG_DBG_FORCE_FRAME, 1232c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 19 1233c965db44STomer Tayar }; 1234c965db44STomer Tayar 1235a2e7699eSTomer Tayar static struct block_defs block_rgfs_defs = { 1236da090917STomer Tayar "rgfs", {false, false, true}, false, 0, 1237da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1238a2e7699eSTomer Tayar 0, 0, 0, 0, 0, 1239da090917STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 29 1240a2e7699eSTomer Tayar }; 1241a2e7699eSTomer Tayar 1242a2e7699eSTomer Tayar static struct block_defs block_rgsrc_defs = { 1243da090917STomer Tayar "rgsrc", 1244da090917STomer Tayar {false, false, true}, false, 0, 1245da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH}, 1246da090917STomer Tayar RGSRC_REG_DBG_SELECT_E5, RGSRC_REG_DBG_DWORD_ENABLE_E5, 1247da090917STomer Tayar RGSRC_REG_DBG_SHIFT_E5, RGSRC_REG_DBG_FORCE_VALID_E5, 1248da090917STomer Tayar RGSRC_REG_DBG_FORCE_FRAME_E5, 1249da090917STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 1250da090917STomer Tayar 30 1251a2e7699eSTomer Tayar }; 1252a2e7699eSTomer Tayar 1253a2e7699eSTomer Tayar static struct block_defs block_tgfs_defs = { 1254da090917STomer Tayar "tgfs", {false, false, true}, false, 0, 1255da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1256a2e7699eSTomer Tayar 0, 0, 0, 0, 0, 1257da090917STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_2, 30 1258a2e7699eSTomer Tayar }; 1259a2e7699eSTomer Tayar 1260a2e7699eSTomer Tayar static struct block_defs block_tgsrc_defs = { 1261da090917STomer Tayar "tgsrc", 1262da090917STomer Tayar {false, false, true}, false, 0, 1263da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCV}, 1264da090917STomer Tayar TGSRC_REG_DBG_SELECT_E5, TGSRC_REG_DBG_DWORD_ENABLE_E5, 1265da090917STomer Tayar TGSRC_REG_DBG_SHIFT_E5, TGSRC_REG_DBG_FORCE_VALID_E5, 1266da090917STomer Tayar TGSRC_REG_DBG_FORCE_FRAME_E5, 1267da090917STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VMAIN_1, 1268da090917STomer Tayar 31 1269a2e7699eSTomer Tayar }; 1270a2e7699eSTomer Tayar 1271c965db44STomer Tayar static struct block_defs block_umac_defs = { 1272be086e7cSMintz, Yuval "umac", 1273da090917STomer Tayar {true, true, true}, false, 0, 1274da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCZ, 1275da090917STomer Tayar DBG_BUS_CLIENT_RBCZ}, 127621dd79e8STomer Tayar UMAC_REG_DBG_SELECT_K2_E5, UMAC_REG_DBG_DWORD_ENABLE_K2_E5, 127721dd79e8STomer Tayar UMAC_REG_DBG_SHIFT_K2_E5, UMAC_REG_DBG_FORCE_VALID_K2_E5, 127821dd79e8STomer Tayar UMAC_REG_DBG_FORCE_FRAME_K2_E5, 1279c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 6 1280c965db44STomer Tayar }; 1281c965db44STomer Tayar 1282c965db44STomer Tayar static struct block_defs block_xmac_defs = { 1283da090917STomer Tayar "xmac", {true, false, false}, false, 0, 1284da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1285c965db44STomer Tayar 0, 0, 0, 0, 0, 1286c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1287c965db44STomer Tayar }; 1288c965db44STomer Tayar 1289c965db44STomer Tayar static struct block_defs block_dbg_defs = { 1290da090917STomer Tayar "dbg", {true, true, true}, false, 0, 1291da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1292c965db44STomer Tayar 0, 0, 0, 0, 0, 1293c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VAUX, 3 1294c965db44STomer Tayar }; 1295c965db44STomer Tayar 1296c965db44STomer Tayar static struct block_defs block_nig_defs = { 1297be086e7cSMintz, Yuval "nig", 1298da090917STomer Tayar {true, true, true}, false, 0, 1299da090917STomer Tayar {DBG_BUS_CLIENT_RBCN, DBG_BUS_CLIENT_RBCN, DBG_BUS_CLIENT_RBCN}, 1300c965db44STomer Tayar NIG_REG_DBG_SELECT, NIG_REG_DBG_DWORD_ENABLE, 1301c965db44STomer Tayar NIG_REG_DBG_SHIFT, NIG_REG_DBG_FORCE_VALID, 1302c965db44STomer Tayar NIG_REG_DBG_FORCE_FRAME, 1303c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VAUX, 0 1304c965db44STomer Tayar }; 1305c965db44STomer Tayar 1306c965db44STomer Tayar static struct block_defs block_wol_defs = { 1307be086e7cSMintz, Yuval "wol", 1308da090917STomer Tayar {false, true, true}, false, 0, 1309da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ}, 131021dd79e8STomer Tayar WOL_REG_DBG_SELECT_K2_E5, WOL_REG_DBG_DWORD_ENABLE_K2_E5, 131121dd79e8STomer Tayar WOL_REG_DBG_SHIFT_K2_E5, WOL_REG_DBG_FORCE_VALID_K2_E5, 131221dd79e8STomer Tayar WOL_REG_DBG_FORCE_FRAME_K2_E5, 1313c965db44STomer Tayar true, true, DBG_RESET_REG_MISC_PL_PDA_VAUX, 7 1314c965db44STomer Tayar }; 1315c965db44STomer Tayar 1316c965db44STomer Tayar static struct block_defs block_bmbn_defs = { 1317be086e7cSMintz, Yuval "bmbn", 1318da090917STomer Tayar {false, true, true}, false, 0, 1319da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCB, 1320da090917STomer Tayar DBG_BUS_CLIENT_RBCB}, 132121dd79e8STomer Tayar BMBN_REG_DBG_SELECT_K2_E5, BMBN_REG_DBG_DWORD_ENABLE_K2_E5, 132221dd79e8STomer Tayar BMBN_REG_DBG_SHIFT_K2_E5, BMBN_REG_DBG_FORCE_VALID_K2_E5, 132321dd79e8STomer Tayar BMBN_REG_DBG_FORCE_FRAME_K2_E5, 1324c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1325c965db44STomer Tayar }; 1326c965db44STomer Tayar 1327c965db44STomer Tayar static struct block_defs block_ipc_defs = { 1328da090917STomer Tayar "ipc", {true, true, true}, false, 0, 1329da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1330c965db44STomer Tayar 0, 0, 0, 0, 0, 1331c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_UA, 8 1332c965db44STomer Tayar }; 1333c965db44STomer Tayar 1334c965db44STomer Tayar static struct block_defs block_nwm_defs = { 1335be086e7cSMintz, Yuval "nwm", 1336da090917STomer Tayar {false, true, true}, false, 0, 1337da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCW, DBG_BUS_CLIENT_RBCW}, 133821dd79e8STomer Tayar NWM_REG_DBG_SELECT_K2_E5, NWM_REG_DBG_DWORD_ENABLE_K2_E5, 133921dd79e8STomer Tayar NWM_REG_DBG_SHIFT_K2_E5, NWM_REG_DBG_FORCE_VALID_K2_E5, 134021dd79e8STomer Tayar NWM_REG_DBG_FORCE_FRAME_K2_E5, 1341c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV_2, 0 1342c965db44STomer Tayar }; 1343c965db44STomer Tayar 1344c965db44STomer Tayar static struct block_defs block_nws_defs = { 1345be086e7cSMintz, Yuval "nws", 1346da090917STomer Tayar {false, true, true}, false, 0, 1347da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCW, DBG_BUS_CLIENT_RBCW}, 134821dd79e8STomer Tayar NWS_REG_DBG_SELECT_K2_E5, NWS_REG_DBG_DWORD_ENABLE_K2_E5, 134921dd79e8STomer Tayar NWS_REG_DBG_SHIFT_K2_E5, NWS_REG_DBG_FORCE_VALID_K2_E5, 135021dd79e8STomer Tayar NWS_REG_DBG_FORCE_FRAME_K2_E5, 1351c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 12 1352c965db44STomer Tayar }; 1353c965db44STomer Tayar 1354c965db44STomer Tayar static struct block_defs block_ms_defs = { 1355be086e7cSMintz, Yuval "ms", 1356da090917STomer Tayar {false, true, true}, false, 0, 1357da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCZ, DBG_BUS_CLIENT_RBCZ}, 135821dd79e8STomer Tayar MS_REG_DBG_SELECT_K2_E5, MS_REG_DBG_DWORD_ENABLE_K2_E5, 135921dd79e8STomer Tayar MS_REG_DBG_SHIFT_K2_E5, MS_REG_DBG_FORCE_VALID_K2_E5, 136021dd79e8STomer Tayar MS_REG_DBG_FORCE_FRAME_K2_E5, 1361c965db44STomer Tayar true, false, DBG_RESET_REG_MISCS_PL_HV, 13 1362c965db44STomer Tayar }; 1363c965db44STomer Tayar 1364c965db44STomer Tayar static struct block_defs block_phy_pcie_defs = { 1365be086e7cSMintz, Yuval "phy_pcie", 1366da090917STomer Tayar {false, true, true}, false, 0, 1367da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, DBG_BUS_CLIENT_RBCH, 1368da090917STomer Tayar DBG_BUS_CLIENT_RBCH}, 136921dd79e8STomer Tayar PCIE_REG_DBG_COMMON_SELECT_K2_E5, 137021dd79e8STomer Tayar PCIE_REG_DBG_COMMON_DWORD_ENABLE_K2_E5, 137121dd79e8STomer Tayar PCIE_REG_DBG_COMMON_SHIFT_K2_E5, 137221dd79e8STomer Tayar PCIE_REG_DBG_COMMON_FORCE_VALID_K2_E5, 137321dd79e8STomer Tayar PCIE_REG_DBG_COMMON_FORCE_FRAME_K2_E5, 1374c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1375c965db44STomer Tayar }; 1376c965db44STomer Tayar 1377c965db44STomer Tayar static struct block_defs block_led_defs = { 1378da090917STomer Tayar "led", {false, true, true}, false, 0, 1379da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1380c965db44STomer Tayar 0, 0, 0, 0, 0, 1381be086e7cSMintz, Yuval true, false, DBG_RESET_REG_MISCS_PL_HV, 14 1382be086e7cSMintz, Yuval }; 1383be086e7cSMintz, Yuval 1384be086e7cSMintz, Yuval static struct block_defs block_avs_wrap_defs = { 1385da090917STomer Tayar "avs_wrap", {false, true, false}, false, 0, 1386da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1387be086e7cSMintz, Yuval 0, 0, 0, 0, 0, 1388be086e7cSMintz, Yuval true, false, DBG_RESET_REG_MISCS_PL_UA, 11 1389be086e7cSMintz, Yuval }; 1390be086e7cSMintz, Yuval 1391da090917STomer Tayar static struct block_defs block_pxpreqbus_defs = { 1392da090917STomer Tayar "pxpreqbus", {false, false, false}, false, 0, 1393da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1394da090917STomer Tayar 0, 0, 0, 0, 0, 1395da090917STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1396da090917STomer Tayar }; 1397da090917STomer Tayar 1398c965db44STomer Tayar static struct block_defs block_misc_aeu_defs = { 1399da090917STomer Tayar "misc_aeu", {true, true, true}, false, 0, 1400da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1401c965db44STomer Tayar 0, 0, 0, 0, 0, 1402c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1403c965db44STomer Tayar }; 1404c965db44STomer Tayar 1405c965db44STomer Tayar static struct block_defs block_bar0_map_defs = { 1406da090917STomer Tayar "bar0_map", {true, true, true}, false, 0, 1407da090917STomer Tayar {MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS, MAX_DBG_BUS_CLIENTS}, 1408c965db44STomer Tayar 0, 0, 0, 0, 0, 1409c965db44STomer Tayar false, false, MAX_DBG_RESET_REGS, 0 1410c965db44STomer Tayar }; 1411c965db44STomer Tayar 1412c965db44STomer Tayar static struct block_defs *s_block_defs[MAX_BLOCK_ID] = { 1413c965db44STomer Tayar &block_grc_defs, 1414c965db44STomer Tayar &block_miscs_defs, 1415c965db44STomer Tayar &block_misc_defs, 1416c965db44STomer Tayar &block_dbu_defs, 1417c965db44STomer Tayar &block_pglue_b_defs, 1418c965db44STomer Tayar &block_cnig_defs, 1419c965db44STomer Tayar &block_cpmu_defs, 1420c965db44STomer Tayar &block_ncsi_defs, 1421c965db44STomer Tayar &block_opte_defs, 1422c965db44STomer Tayar &block_bmb_defs, 1423c965db44STomer Tayar &block_pcie_defs, 1424c965db44STomer Tayar &block_mcp_defs, 1425c965db44STomer Tayar &block_mcp2_defs, 1426c965db44STomer Tayar &block_pswhst_defs, 1427c965db44STomer Tayar &block_pswhst2_defs, 1428c965db44STomer Tayar &block_pswrd_defs, 1429c965db44STomer Tayar &block_pswrd2_defs, 1430c965db44STomer Tayar &block_pswwr_defs, 1431c965db44STomer Tayar &block_pswwr2_defs, 1432c965db44STomer Tayar &block_pswrq_defs, 1433c965db44STomer Tayar &block_pswrq2_defs, 1434c965db44STomer Tayar &block_pglcs_defs, 1435c965db44STomer Tayar &block_dmae_defs, 1436c965db44STomer Tayar &block_ptu_defs, 1437c965db44STomer Tayar &block_tcm_defs, 1438c965db44STomer Tayar &block_mcm_defs, 1439c965db44STomer Tayar &block_ucm_defs, 1440c965db44STomer Tayar &block_xcm_defs, 1441c965db44STomer Tayar &block_ycm_defs, 1442c965db44STomer Tayar &block_pcm_defs, 1443c965db44STomer Tayar &block_qm_defs, 1444c965db44STomer Tayar &block_tm_defs, 1445c965db44STomer Tayar &block_dorq_defs, 1446c965db44STomer Tayar &block_brb_defs, 1447c965db44STomer Tayar &block_src_defs, 1448c965db44STomer Tayar &block_prs_defs, 1449c965db44STomer Tayar &block_tsdm_defs, 1450c965db44STomer Tayar &block_msdm_defs, 1451c965db44STomer Tayar &block_usdm_defs, 1452c965db44STomer Tayar &block_xsdm_defs, 1453c965db44STomer Tayar &block_ysdm_defs, 1454c965db44STomer Tayar &block_psdm_defs, 1455c965db44STomer Tayar &block_tsem_defs, 1456c965db44STomer Tayar &block_msem_defs, 1457c965db44STomer Tayar &block_usem_defs, 1458c965db44STomer Tayar &block_xsem_defs, 1459c965db44STomer Tayar &block_ysem_defs, 1460c965db44STomer Tayar &block_psem_defs, 1461c965db44STomer Tayar &block_rss_defs, 1462c965db44STomer Tayar &block_tmld_defs, 1463c965db44STomer Tayar &block_muld_defs, 1464c965db44STomer Tayar &block_yuld_defs, 1465c965db44STomer Tayar &block_xyld_defs, 14667b6859fbSMintz, Yuval &block_ptld_defs, 14677b6859fbSMintz, Yuval &block_ypld_defs, 1468c965db44STomer Tayar &block_prm_defs, 1469c965db44STomer Tayar &block_pbf_pb1_defs, 1470c965db44STomer Tayar &block_pbf_pb2_defs, 1471c965db44STomer Tayar &block_rpb_defs, 1472c965db44STomer Tayar &block_btb_defs, 1473c965db44STomer Tayar &block_pbf_defs, 1474c965db44STomer Tayar &block_rdif_defs, 1475c965db44STomer Tayar &block_tdif_defs, 1476c965db44STomer Tayar &block_cdu_defs, 1477c965db44STomer Tayar &block_ccfc_defs, 1478c965db44STomer Tayar &block_tcfc_defs, 1479c965db44STomer Tayar &block_igu_defs, 1480c965db44STomer Tayar &block_cau_defs, 14817b6859fbSMintz, Yuval &block_rgfs_defs, 14827b6859fbSMintz, Yuval &block_rgsrc_defs, 14837b6859fbSMintz, Yuval &block_tgfs_defs, 14847b6859fbSMintz, Yuval &block_tgsrc_defs, 1485c965db44STomer Tayar &block_umac_defs, 1486c965db44STomer Tayar &block_xmac_defs, 1487c965db44STomer Tayar &block_dbg_defs, 1488c965db44STomer Tayar &block_nig_defs, 1489c965db44STomer Tayar &block_wol_defs, 1490c965db44STomer Tayar &block_bmbn_defs, 1491c965db44STomer Tayar &block_ipc_defs, 1492c965db44STomer Tayar &block_nwm_defs, 1493c965db44STomer Tayar &block_nws_defs, 1494c965db44STomer Tayar &block_ms_defs, 1495c965db44STomer Tayar &block_phy_pcie_defs, 1496c965db44STomer Tayar &block_led_defs, 1497be086e7cSMintz, Yuval &block_avs_wrap_defs, 1498da090917STomer Tayar &block_pxpreqbus_defs, 1499c965db44STomer Tayar &block_misc_aeu_defs, 1500c965db44STomer Tayar &block_bar0_map_defs, 1501c965db44STomer Tayar }; 1502c965db44STomer Tayar 1503c965db44STomer Tayar static struct platform_defs s_platform_defs[] = { 1504da090917STomer Tayar {"asic", 1, 256, 32768}, 1505da090917STomer Tayar {"reserved", 0, 0, 0}, 1506da090917STomer Tayar {"reserved2", 0, 0, 0}, 1507da090917STomer Tayar {"reserved3", 0, 0, 0} 1508c965db44STomer Tayar }; 1509c965db44STomer Tayar 1510c965db44STomer Tayar static struct grc_param_defs s_grc_param_defs[] = { 15117b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_TSTORM */ 151250bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 1, 1}, 15137b6859fbSMintz, Yuval 15147b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_MSTORM */ 151550bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 1, 1}, 15167b6859fbSMintz, Yuval 15177b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_USTORM */ 151850bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 1, 1}, 15197b6859fbSMintz, Yuval 15207b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_XSTORM */ 152150bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 1, 1}, 15227b6859fbSMintz, Yuval 15237b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_YSTORM */ 152450bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 1, 1}, 15257b6859fbSMintz, Yuval 15267b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_PSTORM */ 152750bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 1, 1}, 15287b6859fbSMintz, Yuval 15297b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_REGS */ 153050bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15317b6859fbSMintz, Yuval 15327b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_RAM */ 153350bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15347b6859fbSMintz, Yuval 15357b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_PBUF */ 153650bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15377b6859fbSMintz, Yuval 15387b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_IOR */ 153950bc60cbSMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 0, 1}, 15407b6859fbSMintz, Yuval 15417b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_VFC */ 154250bc60cbSMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 0, 1}, 15437b6859fbSMintz, Yuval 15447b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_CM_CTX */ 154550bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15467b6859fbSMintz, Yuval 15477b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_ILT */ 154850bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15497b6859fbSMintz, Yuval 15507b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_RSS */ 155150bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15527b6859fbSMintz, Yuval 15537b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_CAU */ 155450bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15557b6859fbSMintz, Yuval 15567b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_QM */ 155750bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15587b6859fbSMintz, Yuval 15597b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_MCP */ 156050bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15617b6859fbSMintz, Yuval 156250bc60cbSMichal Kalderon /* DBG_GRC_PARAM_MCP_TRACE_META_SIZE */ 156350bc60cbSMichal Kalderon {{1, 1, 1}, 1, 0xffffffff, false, true, 0, 1}, 15647b6859fbSMintz, Yuval 15657b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_CFC */ 156650bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15677b6859fbSMintz, Yuval 15687b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_IGU */ 156950bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15707b6859fbSMintz, Yuval 15717b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_BRB */ 157250bc60cbSMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 0, 1}, 15737b6859fbSMintz, Yuval 15747b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_BTB */ 157550bc60cbSMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 0, 1}, 15767b6859fbSMintz, Yuval 15777b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_BMB */ 1578d52c89f1SMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 0, 0}, 15797b6859fbSMintz, Yuval 15807b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_NIG */ 158150bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15827b6859fbSMintz, Yuval 15837b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_MULD */ 158450bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15857b6859fbSMintz, Yuval 15867b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_PRS */ 158750bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15887b6859fbSMintz, Yuval 15897b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_DMAE */ 159050bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15917b6859fbSMintz, Yuval 15927b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_TM */ 159350bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15947b6859fbSMintz, Yuval 15957b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_SDM */ 159650bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 15977b6859fbSMintz, Yuval 15987b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_DIF */ 159950bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 16007b6859fbSMintz, Yuval 16017b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_STATIC */ 160250bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 16037b6859fbSMintz, Yuval 16047b6859fbSMintz, Yuval /* DBG_GRC_PARAM_UNSTALL */ 160550bc60cbSMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 0, 0}, 16067b6859fbSMintz, Yuval 16077b6859fbSMintz, Yuval /* DBG_GRC_PARAM_NUM_LCIDS */ 160850bc60cbSMichal Kalderon {{MAX_LCIDS, MAX_LCIDS, MAX_LCIDS}, 1, MAX_LCIDS, false, false, 160950bc60cbSMichal Kalderon MAX_LCIDS, MAX_LCIDS}, 16107b6859fbSMintz, Yuval 16117b6859fbSMintz, Yuval /* DBG_GRC_PARAM_NUM_LTIDS */ 161250bc60cbSMichal Kalderon {{MAX_LTIDS, MAX_LTIDS, MAX_LTIDS}, 1, MAX_LTIDS, false, false, 161350bc60cbSMichal Kalderon MAX_LTIDS, MAX_LTIDS}, 16147b6859fbSMintz, Yuval 16157b6859fbSMintz, Yuval /* DBG_GRC_PARAM_EXCLUDE_ALL */ 161650bc60cbSMichal Kalderon {{0, 0, 0}, 0, 1, true, false, 0, 0}, 16177b6859fbSMintz, Yuval 16187b6859fbSMintz, Yuval /* DBG_GRC_PARAM_CRASH */ 161950bc60cbSMichal Kalderon {{0, 0, 0}, 0, 1, true, false, 0, 0}, 16207b6859fbSMintz, Yuval 16217b6859fbSMintz, Yuval /* DBG_GRC_PARAM_PARITY_SAFE */ 162250bc60cbSMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 1, 0}, 16237b6859fbSMintz, Yuval 16247b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_CM */ 162550bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 16267b6859fbSMintz, Yuval 16277b6859fbSMintz, Yuval /* DBG_GRC_PARAM_DUMP_PHY */ 162850bc60cbSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 1}, 16297b6859fbSMintz, Yuval 16307b6859fbSMintz, Yuval /* DBG_GRC_PARAM_NO_MCP */ 163150bc60cbSMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 0, 0}, 16327b6859fbSMintz, Yuval 16337b6859fbSMintz, Yuval /* DBG_GRC_PARAM_NO_FW_VER */ 16348a52bbabSMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 0, 0}, 16358a52bbabSMichal Kalderon 16368a52bbabSMichal Kalderon /* DBG_GRC_PARAM_RESERVED3 */ 16378a52bbabSMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 0, 0}, 16388a52bbabSMichal Kalderon 16398a52bbabSMichal Kalderon /* DBG_GRC_PARAM_DUMP_MCP_HW_DUMP */ 16408a52bbabSMichal Kalderon {{0, 1, 1}, 0, 1, false, false, 0, 0}, 16418a52bbabSMichal Kalderon 16428a52bbabSMichal Kalderon /* DBG_GRC_PARAM_DUMP_ILT_CDUC */ 16438a52bbabSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 0}, 16448a52bbabSMichal Kalderon 16458a52bbabSMichal Kalderon /* DBG_GRC_PARAM_DUMP_ILT_CDUT */ 16468a52bbabSMichal Kalderon {{1, 1, 1}, 0, 1, false, false, 0, 0}, 16478a52bbabSMichal Kalderon 16488a52bbabSMichal Kalderon /* DBG_GRC_PARAM_DUMP_CAU_EXT */ 16498a52bbabSMichal Kalderon {{0, 0, 0}, 0, 1, false, false, 0, 1} 1650c965db44STomer Tayar }; 1651c965db44STomer Tayar 1652c965db44STomer Tayar static struct rss_mem_defs s_rss_mem_defs[] = { 1653da090917STomer Tayar { "rss_mem_cid", "rss_cid", 0, 32, 1654da090917STomer Tayar {256, 320, 512} }, 16557b6859fbSMintz, Yuval 1656da090917STomer Tayar { "rss_mem_key_msb", "rss_key", 1024, 256, 1657da090917STomer Tayar {128, 208, 257} }, 16587b6859fbSMintz, Yuval 1659da090917STomer Tayar { "rss_mem_key_lsb", "rss_key", 2048, 64, 1660da090917STomer Tayar {128, 208, 257} }, 16617b6859fbSMintz, Yuval 1662da090917STomer Tayar { "rss_mem_info", "rss_info", 3072, 16, 1663da090917STomer Tayar {128, 208, 256} }, 16647b6859fbSMintz, Yuval 1665da090917STomer Tayar { "rss_mem_ind", "rss_ind", 4096, 16, 1666da090917STomer Tayar {16384, 26624, 32768} } 1667c965db44STomer Tayar }; 1668c965db44STomer Tayar 1669c965db44STomer Tayar static struct vfc_ram_defs s_vfc_ram_defs[] = { 1670c965db44STomer Tayar {"vfc_ram_tt1", "vfc_ram", 0, 512}, 1671c965db44STomer Tayar {"vfc_ram_mtt2", "vfc_ram", 512, 128}, 1672c965db44STomer Tayar {"vfc_ram_stt2", "vfc_ram", 640, 32}, 1673c965db44STomer Tayar {"vfc_ram_ro_vect", "vfc_ram", 672, 32} 1674c965db44STomer Tayar }; 1675c965db44STomer Tayar 1676c965db44STomer Tayar static struct big_ram_defs s_big_ram_defs[] = { 1677c965db44STomer Tayar { "BRB", MEM_GROUP_BRB_MEM, MEM_GROUP_BRB_RAM, DBG_GRC_PARAM_DUMP_BRB, 1678c965db44STomer Tayar BRB_REG_BIG_RAM_ADDRESS, BRB_REG_BIG_RAM_DATA, 1679da090917STomer Tayar MISC_REG_BLOCK_256B_EN, {0, 0, 0}, 1680da090917STomer Tayar {153600, 180224, 282624} }, 16817b6859fbSMintz, Yuval 1682c965db44STomer Tayar { "BTB", MEM_GROUP_BTB_MEM, MEM_GROUP_BTB_RAM, DBG_GRC_PARAM_DUMP_BTB, 1683c965db44STomer Tayar BTB_REG_BIG_RAM_ADDRESS, BTB_REG_BIG_RAM_DATA, 1684da090917STomer Tayar MISC_REG_BLOCK_256B_EN, {0, 1, 1}, 1685da090917STomer Tayar {92160, 117760, 168960} }, 16867b6859fbSMintz, Yuval 1687c965db44STomer Tayar { "BMB", MEM_GROUP_BMB_MEM, MEM_GROUP_BMB_RAM, DBG_GRC_PARAM_DUMP_BMB, 1688c965db44STomer Tayar BMB_REG_BIG_RAM_ADDRESS, BMB_REG_BIG_RAM_DATA, 1689da090917STomer Tayar MISCS_REG_BLOCK_256B_EN, {0, 0, 0}, 1690da090917STomer Tayar {36864, 36864, 36864} } 1691c965db44STomer Tayar }; 1692c965db44STomer Tayar 1693c965db44STomer Tayar static struct reset_reg_defs s_reset_regs_defs[] = { 16947b6859fbSMintz, Yuval /* DBG_RESET_REG_MISCS_PL_UA */ 1695da090917STomer Tayar { MISCS_REG_RESET_PL_UA, 1696da090917STomer Tayar {true, true, true}, {0x0, 0x0, 0x0} }, 16977b6859fbSMintz, Yuval 16987b6859fbSMintz, Yuval /* DBG_RESET_REG_MISCS_PL_HV */ 1699da090917STomer Tayar { MISCS_REG_RESET_PL_HV, 1700da090917STomer Tayar {true, true, true}, {0x0, 0x400, 0x600} }, 17017b6859fbSMintz, Yuval 17027b6859fbSMintz, Yuval /* DBG_RESET_REG_MISCS_PL_HV_2 */ 1703da090917STomer Tayar { MISCS_REG_RESET_PL_HV_2_K2_E5, 1704da090917STomer Tayar {false, true, true}, {0x0, 0x0, 0x0} }, 17057b6859fbSMintz, Yuval 17067b6859fbSMintz, Yuval /* DBG_RESET_REG_MISC_PL_UA */ 1707da090917STomer Tayar { MISC_REG_RESET_PL_UA, 1708da090917STomer Tayar {true, true, true}, {0x0, 0x0, 0x0} }, 17097b6859fbSMintz, Yuval 17107b6859fbSMintz, Yuval /* DBG_RESET_REG_MISC_PL_HV */ 1711da090917STomer Tayar { MISC_REG_RESET_PL_HV, 1712da090917STomer Tayar {true, true, true}, {0x0, 0x0, 0x0} }, 17137b6859fbSMintz, Yuval 17147b6859fbSMintz, Yuval /* DBG_RESET_REG_MISC_PL_PDA_VMAIN_1 */ 1715da090917STomer Tayar { MISC_REG_RESET_PL_PDA_VMAIN_1, 1716da090917STomer Tayar {true, true, true}, {0x4404040, 0x4404040, 0x404040} }, 17177b6859fbSMintz, Yuval 17187b6859fbSMintz, Yuval /* DBG_RESET_REG_MISC_PL_PDA_VMAIN_2 */ 1719da090917STomer Tayar { MISC_REG_RESET_PL_PDA_VMAIN_2, 1720da090917STomer Tayar {true, true, true}, {0x7, 0x7c00007, 0x5c08007} }, 17217b6859fbSMintz, Yuval 17227b6859fbSMintz, Yuval /* DBG_RESET_REG_MISC_PL_PDA_VAUX */ 1723da090917STomer Tayar { MISC_REG_RESET_PL_PDA_VAUX, 1724da090917STomer Tayar {true, true, true}, {0x2, 0x2, 0x2} }, 1725c965db44STomer Tayar }; 1726c965db44STomer Tayar 1727c965db44STomer Tayar static struct phy_defs s_phy_defs[] = { 17287b6859fbSMintz, Yuval {"nw_phy", NWS_REG_NWS_CMU_K2, 172921dd79e8STomer Tayar PHY_NW_IP_REG_PHY0_TOP_TBUS_ADDR_7_0_K2_E5, 173021dd79e8STomer Tayar PHY_NW_IP_REG_PHY0_TOP_TBUS_ADDR_15_8_K2_E5, 173121dd79e8STomer Tayar PHY_NW_IP_REG_PHY0_TOP_TBUS_DATA_7_0_K2_E5, 173221dd79e8STomer Tayar PHY_NW_IP_REG_PHY0_TOP_TBUS_DATA_11_8_K2_E5}, 173321dd79e8STomer Tayar {"sgmii_phy", MS_REG_MS_CMU_K2_E5, 173421dd79e8STomer Tayar PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X132_K2_E5, 173521dd79e8STomer Tayar PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X133_K2_E5, 173621dd79e8STomer Tayar PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X130_K2_E5, 173721dd79e8STomer Tayar PHY_SGMII_IP_REG_AHB_CMU_CSR_0_X131_K2_E5}, 173821dd79e8STomer Tayar {"pcie_phy0", PHY_PCIE_REG_PHY0_K2_E5, 173921dd79e8STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X132_K2_E5, 174021dd79e8STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X133_K2_E5, 174121dd79e8STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X130_K2_E5, 174221dd79e8STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X131_K2_E5}, 174321dd79e8STomer Tayar {"pcie_phy1", PHY_PCIE_REG_PHY1_K2_E5, 174421dd79e8STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X132_K2_E5, 174521dd79e8STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X133_K2_E5, 174621dd79e8STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X130_K2_E5, 174721dd79e8STomer Tayar PHY_PCIE_IP_REG_AHB_CMU_CSR_0_X131_K2_E5}, 1748c965db44STomer Tayar }; 1749c965db44STomer Tayar 1750d52c89f1SMichal Kalderon static struct split_type_defs s_split_type_defs[] = { 1751d52c89f1SMichal Kalderon /* SPLIT_TYPE_NONE */ 1752d52c89f1SMichal Kalderon {"eng"}, 1753d52c89f1SMichal Kalderon 1754d52c89f1SMichal Kalderon /* SPLIT_TYPE_PORT */ 1755d52c89f1SMichal Kalderon {"port"}, 1756d52c89f1SMichal Kalderon 1757d52c89f1SMichal Kalderon /* SPLIT_TYPE_PF */ 1758d52c89f1SMichal Kalderon {"pf"}, 1759d52c89f1SMichal Kalderon 1760d52c89f1SMichal Kalderon /* SPLIT_TYPE_PORT_PF */ 1761d52c89f1SMichal Kalderon {"port"}, 1762d52c89f1SMichal Kalderon 1763d52c89f1SMichal Kalderon /* SPLIT_TYPE_VF */ 1764d52c89f1SMichal Kalderon {"vf"} 1765d52c89f1SMichal Kalderon }; 1766d52c89f1SMichal Kalderon 1767c965db44STomer Tayar /**************************** Private Functions ******************************/ 1768c965db44STomer Tayar 1769c965db44STomer Tayar /* Reads and returns a single dword from the specified unaligned buffer */ 1770c965db44STomer Tayar static u32 qed_read_unaligned_dword(u8 *buf) 1771c965db44STomer Tayar { 1772c965db44STomer Tayar u32 dword; 1773c965db44STomer Tayar 1774c965db44STomer Tayar memcpy((u8 *)&dword, buf, sizeof(dword)); 1775c965db44STomer Tayar return dword; 1776c965db44STomer Tayar } 1777c965db44STomer Tayar 17783b86bd07SSudarsana Reddy Kalluru /* Sets the value of the specified GRC param */ 17793b86bd07SSudarsana Reddy Kalluru static void qed_grc_set_param(struct qed_hwfn *p_hwfn, 17803b86bd07SSudarsana Reddy Kalluru enum dbg_grc_params grc_param, u32 val) 17813b86bd07SSudarsana Reddy Kalluru { 17823b86bd07SSudarsana Reddy Kalluru struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 17833b86bd07SSudarsana Reddy Kalluru 17843b86bd07SSudarsana Reddy Kalluru dev_data->grc.param_val[grc_param] = val; 17853b86bd07SSudarsana Reddy Kalluru } 17863b86bd07SSudarsana Reddy Kalluru 1787be086e7cSMintz, Yuval /* Returns the value of the specified GRC param */ 1788be086e7cSMintz, Yuval static u32 qed_grc_get_param(struct qed_hwfn *p_hwfn, 1789be086e7cSMintz, Yuval enum dbg_grc_params grc_param) 1790be086e7cSMintz, Yuval { 1791be086e7cSMintz, Yuval struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 1792be086e7cSMintz, Yuval 1793be086e7cSMintz, Yuval return dev_data->grc.param_val[grc_param]; 1794be086e7cSMintz, Yuval } 1795be086e7cSMintz, Yuval 1796be086e7cSMintz, Yuval /* Initializes the GRC parameters */ 1797be086e7cSMintz, Yuval static void qed_dbg_grc_init_params(struct qed_hwfn *p_hwfn) 1798be086e7cSMintz, Yuval { 1799be086e7cSMintz, Yuval struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 1800be086e7cSMintz, Yuval 1801be086e7cSMintz, Yuval if (!dev_data->grc.params_initialized) { 1802be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 1803be086e7cSMintz, Yuval dev_data->grc.params_initialized = 1; 1804be086e7cSMintz, Yuval } 1805be086e7cSMintz, Yuval } 1806be086e7cSMintz, Yuval 1807c965db44STomer Tayar /* Initializes debug data for the specified device */ 1808c965db44STomer Tayar static enum dbg_status qed_dbg_dev_init(struct qed_hwfn *p_hwfn, 1809c965db44STomer Tayar struct qed_ptt *p_ptt) 1810c965db44STomer Tayar { 1811c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 1812d52c89f1SMichal Kalderon u8 num_pfs = 0, max_pfs_per_port = 0; 1813c965db44STomer Tayar 1814c965db44STomer Tayar if (dev_data->initialized) 1815c965db44STomer Tayar return DBG_STATUS_OK; 1816c965db44STomer Tayar 1817d52c89f1SMichal Kalderon /* Set chip */ 1818c965db44STomer Tayar if (QED_IS_K2(p_hwfn->cdev)) { 1819c965db44STomer Tayar dev_data->chip_id = CHIP_K2; 1820c965db44STomer Tayar dev_data->mode_enable[MODE_K2] = 1; 1821d52c89f1SMichal Kalderon dev_data->num_vfs = MAX_NUM_VFS_K2; 1822d52c89f1SMichal Kalderon num_pfs = MAX_NUM_PFS_K2; 1823d52c89f1SMichal Kalderon max_pfs_per_port = MAX_NUM_PFS_K2 / 2; 1824c965db44STomer Tayar } else if (QED_IS_BB_B0(p_hwfn->cdev)) { 18257b6859fbSMintz, Yuval dev_data->chip_id = CHIP_BB; 18269c79ddaaSMintz, Yuval dev_data->mode_enable[MODE_BB] = 1; 1827d52c89f1SMichal Kalderon dev_data->num_vfs = MAX_NUM_VFS_BB; 1828d52c89f1SMichal Kalderon num_pfs = MAX_NUM_PFS_BB; 1829d52c89f1SMichal Kalderon max_pfs_per_port = MAX_NUM_PFS_BB; 1830c965db44STomer Tayar } else { 1831c965db44STomer Tayar return DBG_STATUS_UNKNOWN_CHIP; 1832c965db44STomer Tayar } 1833c965db44STomer Tayar 1834d52c89f1SMichal Kalderon /* Set platofrm */ 1835c965db44STomer Tayar dev_data->platform_id = PLATFORM_ASIC; 1836c965db44STomer Tayar dev_data->mode_enable[MODE_ASIC] = 1; 1837be086e7cSMintz, Yuval 1838d52c89f1SMichal Kalderon /* Set port mode */ 1839d52c89f1SMichal Kalderon switch (qed_rd(p_hwfn, p_ptt, MISC_REG_PORT_MODE)) { 1840d52c89f1SMichal Kalderon case 0: 1841d52c89f1SMichal Kalderon dev_data->mode_enable[MODE_PORTS_PER_ENG_1] = 1; 1842d52c89f1SMichal Kalderon break; 1843d52c89f1SMichal Kalderon case 1: 1844d52c89f1SMichal Kalderon dev_data->mode_enable[MODE_PORTS_PER_ENG_2] = 1; 1845d52c89f1SMichal Kalderon break; 1846d52c89f1SMichal Kalderon case 2: 1847d52c89f1SMichal Kalderon dev_data->mode_enable[MODE_PORTS_PER_ENG_4] = 1; 1848d52c89f1SMichal Kalderon break; 1849d52c89f1SMichal Kalderon } 1850d52c89f1SMichal Kalderon 1851d52c89f1SMichal Kalderon /* Set 100G mode */ 1852d52c89f1SMichal Kalderon if (dev_data->chip_id == CHIP_BB && 1853d52c89f1SMichal Kalderon qed_rd(p_hwfn, p_ptt, CNIG_REG_NW_PORT_MODE_BB) == 2) 1854d52c89f1SMichal Kalderon dev_data->mode_enable[MODE_100G] = 1; 1855d52c89f1SMichal Kalderon 1856d52c89f1SMichal Kalderon /* Set number of ports */ 1857d52c89f1SMichal Kalderon if (dev_data->mode_enable[MODE_PORTS_PER_ENG_1] || 1858d52c89f1SMichal Kalderon dev_data->mode_enable[MODE_100G]) 1859d52c89f1SMichal Kalderon dev_data->num_ports = 1; 1860d52c89f1SMichal Kalderon else if (dev_data->mode_enable[MODE_PORTS_PER_ENG_2]) 1861d52c89f1SMichal Kalderon dev_data->num_ports = 2; 1862d52c89f1SMichal Kalderon else if (dev_data->mode_enable[MODE_PORTS_PER_ENG_4]) 1863d52c89f1SMichal Kalderon dev_data->num_ports = 4; 1864d52c89f1SMichal Kalderon 1865d52c89f1SMichal Kalderon /* Set number of PFs per port */ 1866d52c89f1SMichal Kalderon dev_data->num_pfs_per_port = min_t(u32, 1867d52c89f1SMichal Kalderon num_pfs / dev_data->num_ports, 1868d52c89f1SMichal Kalderon max_pfs_per_port); 1869d52c89f1SMichal Kalderon 1870be086e7cSMintz, Yuval /* Initializes the GRC parameters */ 1871be086e7cSMintz, Yuval qed_dbg_grc_init_params(p_hwfn); 1872be086e7cSMintz, Yuval 1873da090917STomer Tayar dev_data->use_dmae = true; 1874da090917STomer Tayar dev_data->initialized = 1; 18757b6859fbSMintz, Yuval 1876c965db44STomer Tayar return DBG_STATUS_OK; 1877c965db44STomer Tayar } 1878c965db44STomer Tayar 18797b6859fbSMintz, Yuval static struct dbg_bus_block *get_dbg_bus_block_desc(struct qed_hwfn *p_hwfn, 18807b6859fbSMintz, Yuval enum block_id block_id) 18817b6859fbSMintz, Yuval { 18827b6859fbSMintz, Yuval struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 18837b6859fbSMintz, Yuval 18847b6859fbSMintz, Yuval return (struct dbg_bus_block *)&dbg_bus_blocks[block_id * 18857b6859fbSMintz, Yuval MAX_CHIP_IDS + 18867b6859fbSMintz, Yuval dev_data->chip_id]; 18877b6859fbSMintz, Yuval } 18887b6859fbSMintz, Yuval 1889c965db44STomer Tayar /* Reads the FW info structure for the specified Storm from the chip, 1890c965db44STomer Tayar * and writes it to the specified fw_info pointer. 1891c965db44STomer Tayar */ 1892d52c89f1SMichal Kalderon static void qed_read_storm_fw_info(struct qed_hwfn *p_hwfn, 1893c965db44STomer Tayar struct qed_ptt *p_ptt, 1894c965db44STomer Tayar u8 storm_id, struct fw_info *fw_info) 1895c965db44STomer Tayar { 18967b6859fbSMintz, Yuval struct storm_defs *storm = &s_storm_defs[storm_id]; 1897c965db44STomer Tayar struct fw_info_location fw_info_location; 18987b6859fbSMintz, Yuval u32 addr, i, *dest; 1899c965db44STomer Tayar 1900c965db44STomer Tayar memset(&fw_info_location, 0, sizeof(fw_info_location)); 1901c965db44STomer Tayar memset(fw_info, 0, sizeof(*fw_info)); 19027b6859fbSMintz, Yuval 19037b6859fbSMintz, Yuval /* Read first the address that points to fw_info location. 19047b6859fbSMintz, Yuval * The address is located in the last line of the Storm RAM. 19057b6859fbSMintz, Yuval */ 19067b6859fbSMintz, Yuval addr = storm->sem_fast_mem_addr + SEM_FAST_REG_INT_RAM + 190721dd79e8STomer Tayar DWORDS_TO_BYTES(SEM_FAST_REG_INT_RAM_SIZE_BB_K2) - 19087b6859fbSMintz, Yuval sizeof(fw_info_location); 19097b6859fbSMintz, Yuval dest = (u32 *)&fw_info_location; 19107b6859fbSMintz, Yuval 1911c965db44STomer Tayar for (i = 0; i < BYTES_TO_DWORDS(sizeof(fw_info_location)); 1912c965db44STomer Tayar i++, addr += BYTES_IN_DWORD) 1913c965db44STomer Tayar dest[i] = qed_rd(p_hwfn, p_ptt, addr); 19147b6859fbSMintz, Yuval 19157b6859fbSMintz, Yuval /* Read FW version info from Storm RAM */ 1916c965db44STomer Tayar if (fw_info_location.size > 0 && fw_info_location.size <= 1917c965db44STomer Tayar sizeof(*fw_info)) { 1918c965db44STomer Tayar addr = fw_info_location.grc_addr; 1919c965db44STomer Tayar dest = (u32 *)fw_info; 1920c965db44STomer Tayar for (i = 0; i < BYTES_TO_DWORDS(fw_info_location.size); 1921c965db44STomer Tayar i++, addr += BYTES_IN_DWORD) 1922c965db44STomer Tayar dest[i] = qed_rd(p_hwfn, p_ptt, addr); 1923c965db44STomer Tayar } 1924c965db44STomer Tayar } 1925c965db44STomer Tayar 19267b6859fbSMintz, Yuval /* Dumps the specified string to the specified buffer. 19277b6859fbSMintz, Yuval * Returns the dumped size in bytes. 1928c965db44STomer Tayar */ 1929c965db44STomer Tayar static u32 qed_dump_str(char *dump_buf, bool dump, const char *str) 1930c965db44STomer Tayar { 1931c965db44STomer Tayar if (dump) 1932c965db44STomer Tayar strcpy(dump_buf, str); 19337b6859fbSMintz, Yuval 1934c965db44STomer Tayar return (u32)strlen(str) + 1; 1935c965db44STomer Tayar } 1936c965db44STomer Tayar 19377b6859fbSMintz, Yuval /* Dumps zeros to align the specified buffer to dwords. 19387b6859fbSMintz, Yuval * Returns the dumped size in bytes. 1939c965db44STomer Tayar */ 1940c965db44STomer Tayar static u32 qed_dump_align(char *dump_buf, bool dump, u32 byte_offset) 1941c965db44STomer Tayar { 19427b6859fbSMintz, Yuval u8 offset_in_dword, align_size; 1943c965db44STomer Tayar 19447b6859fbSMintz, Yuval offset_in_dword = (u8)(byte_offset & 0x3); 1945c965db44STomer Tayar align_size = offset_in_dword ? BYTES_IN_DWORD - offset_in_dword : 0; 1946c965db44STomer Tayar 1947c965db44STomer Tayar if (dump && align_size) 1948c965db44STomer Tayar memset(dump_buf, 0, align_size); 19497b6859fbSMintz, Yuval 1950c965db44STomer Tayar return align_size; 1951c965db44STomer Tayar } 1952c965db44STomer Tayar 1953c965db44STomer Tayar /* Writes the specified string param to the specified buffer. 1954c965db44STomer Tayar * Returns the dumped size in dwords. 1955c965db44STomer Tayar */ 1956c965db44STomer Tayar static u32 qed_dump_str_param(u32 *dump_buf, 1957c965db44STomer Tayar bool dump, 1958c965db44STomer Tayar const char *param_name, const char *param_val) 1959c965db44STomer Tayar { 1960c965db44STomer Tayar char *char_buf = (char *)dump_buf; 1961c965db44STomer Tayar u32 offset = 0; 1962c965db44STomer Tayar 1963c965db44STomer Tayar /* Dump param name */ 1964c965db44STomer Tayar offset += qed_dump_str(char_buf + offset, dump, param_name); 1965c965db44STomer Tayar 1966c965db44STomer Tayar /* Indicate a string param value */ 1967c965db44STomer Tayar if (dump) 1968c965db44STomer Tayar *(char_buf + offset) = 1; 1969c965db44STomer Tayar offset++; 1970c965db44STomer Tayar 1971c965db44STomer Tayar /* Dump param value */ 1972c965db44STomer Tayar offset += qed_dump_str(char_buf + offset, dump, param_val); 1973c965db44STomer Tayar 1974c965db44STomer Tayar /* Align buffer to next dword */ 1975c965db44STomer Tayar offset += qed_dump_align(char_buf + offset, dump, offset); 19767b6859fbSMintz, Yuval 1977c965db44STomer Tayar return BYTES_TO_DWORDS(offset); 1978c965db44STomer Tayar } 1979c965db44STomer Tayar 1980c965db44STomer Tayar /* Writes the specified numeric param to the specified buffer. 1981c965db44STomer Tayar * Returns the dumped size in dwords. 1982c965db44STomer Tayar */ 1983c965db44STomer Tayar static u32 qed_dump_num_param(u32 *dump_buf, 1984c965db44STomer Tayar bool dump, const char *param_name, u32 param_val) 1985c965db44STomer Tayar { 1986c965db44STomer Tayar char *char_buf = (char *)dump_buf; 1987c965db44STomer Tayar u32 offset = 0; 1988c965db44STomer Tayar 1989c965db44STomer Tayar /* Dump param name */ 1990c965db44STomer Tayar offset += qed_dump_str(char_buf + offset, dump, param_name); 1991c965db44STomer Tayar 1992c965db44STomer Tayar /* Indicate a numeric param value */ 1993c965db44STomer Tayar if (dump) 1994c965db44STomer Tayar *(char_buf + offset) = 0; 1995c965db44STomer Tayar offset++; 1996c965db44STomer Tayar 1997c965db44STomer Tayar /* Align buffer to next dword */ 1998c965db44STomer Tayar offset += qed_dump_align(char_buf + offset, dump, offset); 1999c965db44STomer Tayar 2000c965db44STomer Tayar /* Dump param value (and change offset from bytes to dwords) */ 2001c965db44STomer Tayar offset = BYTES_TO_DWORDS(offset); 2002c965db44STomer Tayar if (dump) 2003c965db44STomer Tayar *(dump_buf + offset) = param_val; 2004c965db44STomer Tayar offset++; 20057b6859fbSMintz, Yuval 2006c965db44STomer Tayar return offset; 2007c965db44STomer Tayar } 2008c965db44STomer Tayar 2009c965db44STomer Tayar /* Reads the FW version and writes it as a param to the specified buffer. 2010c965db44STomer Tayar * Returns the dumped size in dwords. 2011c965db44STomer Tayar */ 2012c965db44STomer Tayar static u32 qed_dump_fw_ver_param(struct qed_hwfn *p_hwfn, 2013c965db44STomer Tayar struct qed_ptt *p_ptt, 2014c965db44STomer Tayar u32 *dump_buf, bool dump) 2015c965db44STomer Tayar { 2016c965db44STomer Tayar char fw_ver_str[16] = EMPTY_FW_VERSION_STR; 2017c965db44STomer Tayar char fw_img_str[16] = EMPTY_FW_IMAGE_STR; 2018c965db44STomer Tayar struct fw_info fw_info = { {0}, {0} }; 2019c965db44STomer Tayar u32 offset = 0; 2020c965db44STomer Tayar 2021be086e7cSMintz, Yuval if (dump && !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_FW_VER)) { 2022d52c89f1SMichal Kalderon /* Read FW info from chip */ 2023d52c89f1SMichal Kalderon qed_read_fw_info(p_hwfn, p_ptt, &fw_info); 2024c965db44STomer Tayar 2025c965db44STomer Tayar /* Create FW version/image strings */ 20267b6859fbSMintz, Yuval if (snprintf(fw_ver_str, sizeof(fw_ver_str), 20277b6859fbSMintz, Yuval "%d_%d_%d_%d", fw_info.ver.num.major, 20287b6859fbSMintz, Yuval fw_info.ver.num.minor, fw_info.ver.num.rev, 20297b6859fbSMintz, Yuval fw_info.ver.num.eng) < 0) 2030c965db44STomer Tayar DP_NOTICE(p_hwfn, 2031c965db44STomer Tayar "Unexpected debug error: invalid FW version string\n"); 2032c965db44STomer Tayar switch (fw_info.ver.image_id) { 2033c965db44STomer Tayar case FW_IMG_MAIN: 2034c965db44STomer Tayar strcpy(fw_img_str, "main"); 2035c965db44STomer Tayar break; 2036c965db44STomer Tayar default: 2037c965db44STomer Tayar strcpy(fw_img_str, "unknown"); 2038c965db44STomer Tayar break; 2039c965db44STomer Tayar } 2040c965db44STomer Tayar } 2041c965db44STomer Tayar 2042c965db44STomer Tayar /* Dump FW version, image and timestamp */ 2043c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 2044c965db44STomer Tayar dump, "fw-version", fw_ver_str); 2045c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 2046c965db44STomer Tayar dump, "fw-image", fw_img_str); 2047c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 2048c965db44STomer Tayar dump, 2049c965db44STomer Tayar "fw-timestamp", fw_info.ver.timestamp); 20507b6859fbSMintz, Yuval 2051c965db44STomer Tayar return offset; 2052c965db44STomer Tayar } 2053c965db44STomer Tayar 2054c965db44STomer Tayar /* Reads the MFW version and writes it as a param to the specified buffer. 2055c965db44STomer Tayar * Returns the dumped size in dwords. 2056c965db44STomer Tayar */ 2057c965db44STomer Tayar static u32 qed_dump_mfw_ver_param(struct qed_hwfn *p_hwfn, 2058c965db44STomer Tayar struct qed_ptt *p_ptt, 2059c965db44STomer Tayar u32 *dump_buf, bool dump) 2060c965db44STomer Tayar { 2061c965db44STomer Tayar char mfw_ver_str[16] = EMPTY_FW_VERSION_STR; 2062c965db44STomer Tayar 20637b6859fbSMintz, Yuval if (dump && 20647b6859fbSMintz, Yuval !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_FW_VER)) { 2065c965db44STomer Tayar u32 global_section_offsize, global_section_addr, mfw_ver; 2066c965db44STomer Tayar u32 public_data_addr, global_section_offsize_addr; 2067c965db44STomer Tayar 20687b6859fbSMintz, Yuval /* Find MCP public data GRC address. Needs to be ORed with 20697b6859fbSMintz, Yuval * MCP_REG_SCRATCH due to a HW bug. 2070c965db44STomer Tayar */ 20717b6859fbSMintz, Yuval public_data_addr = qed_rd(p_hwfn, 20727b6859fbSMintz, Yuval p_ptt, 2073c965db44STomer Tayar MISC_REG_SHARED_MEM_ADDR) | 2074c965db44STomer Tayar MCP_REG_SCRATCH; 2075c965db44STomer Tayar 2076c965db44STomer Tayar /* Find MCP public global section offset */ 2077c965db44STomer Tayar global_section_offsize_addr = public_data_addr + 2078c965db44STomer Tayar offsetof(struct mcp_public_data, 2079c965db44STomer Tayar sections) + 2080c965db44STomer Tayar sizeof(offsize_t) * PUBLIC_GLOBAL; 2081c965db44STomer Tayar global_section_offsize = qed_rd(p_hwfn, p_ptt, 2082c965db44STomer Tayar global_section_offsize_addr); 20837b6859fbSMintz, Yuval global_section_addr = 20847b6859fbSMintz, Yuval MCP_REG_SCRATCH + 20857b6859fbSMintz, Yuval (global_section_offsize & OFFSIZE_OFFSET_MASK) * 4; 2086c965db44STomer Tayar 2087c965db44STomer Tayar /* Read MFW version from MCP public global section */ 2088c965db44STomer Tayar mfw_ver = qed_rd(p_hwfn, p_ptt, 2089c965db44STomer Tayar global_section_addr + 2090c965db44STomer Tayar offsetof(struct public_global, mfw_ver)); 2091c965db44STomer Tayar 2092c965db44STomer Tayar /* Dump MFW version param */ 20937b6859fbSMintz, Yuval if (snprintf(mfw_ver_str, sizeof(mfw_ver_str), "%d_%d_%d_%d", 20947b6859fbSMintz, Yuval (u8)(mfw_ver >> 24), (u8)(mfw_ver >> 16), 20957b6859fbSMintz, Yuval (u8)(mfw_ver >> 8), (u8)mfw_ver) < 0) 2096c965db44STomer Tayar DP_NOTICE(p_hwfn, 2097c965db44STomer Tayar "Unexpected debug error: invalid MFW version string\n"); 2098c965db44STomer Tayar } 2099c965db44STomer Tayar 2100c965db44STomer Tayar return qed_dump_str_param(dump_buf, dump, "mfw-version", mfw_ver_str); 2101c965db44STomer Tayar } 2102c965db44STomer Tayar 2103c965db44STomer Tayar /* Writes a section header to the specified buffer. 2104c965db44STomer Tayar * Returns the dumped size in dwords. 2105c965db44STomer Tayar */ 2106c965db44STomer Tayar static u32 qed_dump_section_hdr(u32 *dump_buf, 2107c965db44STomer Tayar bool dump, const char *name, u32 num_params) 2108c965db44STomer Tayar { 2109c965db44STomer Tayar return qed_dump_num_param(dump_buf, dump, name, num_params); 2110c965db44STomer Tayar } 2111c965db44STomer Tayar 2112c965db44STomer Tayar /* Writes the common global params to the specified buffer. 2113c965db44STomer Tayar * Returns the dumped size in dwords. 2114c965db44STomer Tayar */ 2115c965db44STomer Tayar static u32 qed_dump_common_global_params(struct qed_hwfn *p_hwfn, 2116c965db44STomer Tayar struct qed_ptt *p_ptt, 2117c965db44STomer Tayar u32 *dump_buf, 2118c965db44STomer Tayar bool dump, 2119c965db44STomer Tayar u8 num_specific_global_params) 2120c965db44STomer Tayar { 2121c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2122c965db44STomer Tayar u32 offset = 0; 21237b6859fbSMintz, Yuval u8 num_params; 2124c965db44STomer Tayar 21257b6859fbSMintz, Yuval /* Dump global params section header */ 21267b6859fbSMintz, Yuval num_params = NUM_COMMON_GLOBAL_PARAMS + num_specific_global_params; 2127c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 2128be086e7cSMintz, Yuval dump, "global_params", num_params); 2129c965db44STomer Tayar 2130c965db44STomer Tayar /* Store params */ 2131c965db44STomer Tayar offset += qed_dump_fw_ver_param(p_hwfn, p_ptt, dump_buf + offset, dump); 2132c965db44STomer Tayar offset += qed_dump_mfw_ver_param(p_hwfn, 2133c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 2134c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 2135c965db44STomer Tayar dump, "tools-version", TOOLS_VERSION); 2136c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 2137c965db44STomer Tayar dump, 2138c965db44STomer Tayar "chip", 2139c965db44STomer Tayar s_chip_defs[dev_data->chip_id].name); 2140c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 2141c965db44STomer Tayar dump, 2142c965db44STomer Tayar "platform", 2143c965db44STomer Tayar s_platform_defs[dev_data->platform_id]. 2144c965db44STomer Tayar name); 2145c965db44STomer Tayar offset += 2146c965db44STomer Tayar qed_dump_num_param(dump_buf + offset, dump, "pci-func", 2147c965db44STomer Tayar p_hwfn->abs_pf_id); 21487b6859fbSMintz, Yuval 2149c965db44STomer Tayar return offset; 2150c965db44STomer Tayar } 2151c965db44STomer Tayar 21527b6859fbSMintz, Yuval /* Writes the "last" section (including CRC) to the specified buffer at the 21537b6859fbSMintz, Yuval * given offset. Returns the dumped size in dwords. 2154c965db44STomer Tayar */ 2155da090917STomer Tayar static u32 qed_dump_last_section(u32 *dump_buf, u32 offset, bool dump) 2156c965db44STomer Tayar { 21577b6859fbSMintz, Yuval u32 start_offset = offset; 2158c965db44STomer Tayar 2159c965db44STomer Tayar /* Dump CRC section header */ 2160c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, dump, "last", 0); 2161c965db44STomer Tayar 21627b6859fbSMintz, Yuval /* Calculate CRC32 and add it to the dword after the "last" section */ 2163c965db44STomer Tayar if (dump) 21647b6859fbSMintz, Yuval *(dump_buf + offset) = ~crc32(0xffffffff, 21657b6859fbSMintz, Yuval (u8 *)dump_buf, 2166c965db44STomer Tayar DWORDS_TO_BYTES(offset)); 21677b6859fbSMintz, Yuval 2168c965db44STomer Tayar offset++; 21697b6859fbSMintz, Yuval 2170c965db44STomer Tayar return offset - start_offset; 2171c965db44STomer Tayar } 2172c965db44STomer Tayar 2173c965db44STomer Tayar /* Update blocks reset state */ 2174c965db44STomer Tayar static void qed_update_blocks_reset_state(struct qed_hwfn *p_hwfn, 2175c965db44STomer Tayar struct qed_ptt *p_ptt) 2176c965db44STomer Tayar { 2177c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2178c965db44STomer Tayar u32 reg_val[MAX_DBG_RESET_REGS] = { 0 }; 2179c965db44STomer Tayar u32 i; 2180c965db44STomer Tayar 2181c965db44STomer Tayar /* Read reset registers */ 2182c965db44STomer Tayar for (i = 0; i < MAX_DBG_RESET_REGS; i++) 2183c965db44STomer Tayar if (s_reset_regs_defs[i].exists[dev_data->chip_id]) 2184c965db44STomer Tayar reg_val[i] = qed_rd(p_hwfn, 2185c965db44STomer Tayar p_ptt, s_reset_regs_defs[i].addr); 2186c965db44STomer Tayar 2187c965db44STomer Tayar /* Check if blocks are in reset */ 21887b6859fbSMintz, Yuval for (i = 0; i < MAX_BLOCK_ID; i++) { 21897b6859fbSMintz, Yuval struct block_defs *block = s_block_defs[i]; 21907b6859fbSMintz, Yuval 21917b6859fbSMintz, Yuval dev_data->block_in_reset[i] = block->has_reset_bit && 21927b6859fbSMintz, Yuval !(reg_val[block->reset_reg] & BIT(block->reset_bit_offset)); 21937b6859fbSMintz, Yuval } 2194c965db44STomer Tayar } 2195c965db44STomer Tayar 2196c965db44STomer Tayar /* Enable / disable the Debug block */ 2197c965db44STomer Tayar static void qed_bus_enable_dbg_block(struct qed_hwfn *p_hwfn, 2198c965db44STomer Tayar struct qed_ptt *p_ptt, bool enable) 2199c965db44STomer Tayar { 2200c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, DBG_REG_DBG_BLOCK_ON, enable ? 1 : 0); 2201c965db44STomer Tayar } 2202c965db44STomer Tayar 2203c965db44STomer Tayar /* Resets the Debug block */ 2204c965db44STomer Tayar static void qed_bus_reset_dbg_block(struct qed_hwfn *p_hwfn, 2205c965db44STomer Tayar struct qed_ptt *p_ptt) 2206c965db44STomer Tayar { 2207c965db44STomer Tayar u32 dbg_reset_reg_addr, old_reset_reg_val, new_reset_reg_val; 22087b6859fbSMintz, Yuval struct block_defs *dbg_block = s_block_defs[BLOCK_DBG]; 2209c965db44STomer Tayar 22107b6859fbSMintz, Yuval dbg_reset_reg_addr = s_reset_regs_defs[dbg_block->reset_reg].addr; 2211c965db44STomer Tayar old_reset_reg_val = qed_rd(p_hwfn, p_ptt, dbg_reset_reg_addr); 22127b6859fbSMintz, Yuval new_reset_reg_val = 22137b6859fbSMintz, Yuval old_reset_reg_val & ~BIT(dbg_block->reset_bit_offset); 2214c965db44STomer Tayar 2215c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, dbg_reset_reg_addr, new_reset_reg_val); 2216c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, dbg_reset_reg_addr, old_reset_reg_val); 2217c965db44STomer Tayar } 2218c965db44STomer Tayar 2219c965db44STomer Tayar static void qed_bus_set_framing_mode(struct qed_hwfn *p_hwfn, 2220c965db44STomer Tayar struct qed_ptt *p_ptt, 2221c965db44STomer Tayar enum dbg_bus_frame_modes mode) 2222c965db44STomer Tayar { 2223c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, DBG_REG_FRAMING_MODE, (u8)mode); 2224c965db44STomer Tayar } 2225c965db44STomer Tayar 22267b6859fbSMintz, Yuval /* Enable / disable Debug Bus clients according to the specified mask 22277b6859fbSMintz, Yuval * (1 = enable, 0 = disable). 2228c965db44STomer Tayar */ 2229c965db44STomer Tayar static void qed_bus_enable_clients(struct qed_hwfn *p_hwfn, 2230c965db44STomer Tayar struct qed_ptt *p_ptt, u32 client_mask) 2231c965db44STomer Tayar { 2232c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, DBG_REG_CLIENT_ENABLE, client_mask); 2233c965db44STomer Tayar } 2234c965db44STomer Tayar 2235c965db44STomer Tayar static bool qed_is_mode_match(struct qed_hwfn *p_hwfn, u16 *modes_buf_offset) 2236c965db44STomer Tayar { 2237c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2238c965db44STomer Tayar bool arg1, arg2; 22397b6859fbSMintz, Yuval const u32 *ptr; 22407b6859fbSMintz, Yuval u8 tree_val; 22417b6859fbSMintz, Yuval 22427b6859fbSMintz, Yuval /* Get next element from modes tree buffer */ 22437b6859fbSMintz, Yuval ptr = s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr; 22447b6859fbSMintz, Yuval tree_val = ((u8 *)ptr)[(*modes_buf_offset)++]; 2245c965db44STomer Tayar 2246c965db44STomer Tayar switch (tree_val) { 2247c965db44STomer Tayar case INIT_MODE_OP_NOT: 2248c965db44STomer Tayar return !qed_is_mode_match(p_hwfn, modes_buf_offset); 2249c965db44STomer Tayar case INIT_MODE_OP_OR: 2250c965db44STomer Tayar case INIT_MODE_OP_AND: 2251c965db44STomer Tayar arg1 = qed_is_mode_match(p_hwfn, modes_buf_offset); 2252c965db44STomer Tayar arg2 = qed_is_mode_match(p_hwfn, modes_buf_offset); 2253c965db44STomer Tayar return (tree_val == INIT_MODE_OP_OR) ? (arg1 || 2254c965db44STomer Tayar arg2) : (arg1 && arg2); 2255c965db44STomer Tayar default: 2256c965db44STomer Tayar return dev_data->mode_enable[tree_val - MAX_INIT_MODE_OPS] > 0; 2257c965db44STomer Tayar } 2258c965db44STomer Tayar } 2259c965db44STomer Tayar 2260c965db44STomer Tayar /* Returns true if the specified entity (indicated by GRC param) should be 2261c965db44STomer Tayar * included in the dump, false otherwise. 2262c965db44STomer Tayar */ 2263c965db44STomer Tayar static bool qed_grc_is_included(struct qed_hwfn *p_hwfn, 2264c965db44STomer Tayar enum dbg_grc_params grc_param) 2265c965db44STomer Tayar { 2266c965db44STomer Tayar return qed_grc_get_param(p_hwfn, grc_param) > 0; 2267c965db44STomer Tayar } 2268c965db44STomer Tayar 2269c965db44STomer Tayar /* Returns true of the specified Storm should be included in the dump, false 2270c965db44STomer Tayar * otherwise. 2271c965db44STomer Tayar */ 2272c965db44STomer Tayar static bool qed_grc_is_storm_included(struct qed_hwfn *p_hwfn, 2273c965db44STomer Tayar enum dbg_storms storm) 2274c965db44STomer Tayar { 2275c965db44STomer Tayar return qed_grc_get_param(p_hwfn, (enum dbg_grc_params)storm) > 0; 2276c965db44STomer Tayar } 2277c965db44STomer Tayar 2278c965db44STomer Tayar /* Returns true if the specified memory should be included in the dump, false 2279c965db44STomer Tayar * otherwise. 2280c965db44STomer Tayar */ 2281c965db44STomer Tayar static bool qed_grc_is_mem_included(struct qed_hwfn *p_hwfn, 2282c965db44STomer Tayar enum block_id block_id, u8 mem_group_id) 2283c965db44STomer Tayar { 22847b6859fbSMintz, Yuval struct block_defs *block = s_block_defs[block_id]; 2285c965db44STomer Tayar u8 i; 2286c965db44STomer Tayar 2287c965db44STomer Tayar /* Check Storm match */ 22887b6859fbSMintz, Yuval if (block->associated_to_storm && 2289c965db44STomer Tayar !qed_grc_is_storm_included(p_hwfn, 22907b6859fbSMintz, Yuval (enum dbg_storms)block->storm_id)) 2291c965db44STomer Tayar return false; 2292c965db44STomer Tayar 22937b6859fbSMintz, Yuval for (i = 0; i < NUM_BIG_RAM_TYPES; i++) { 22947b6859fbSMintz, Yuval struct big_ram_defs *big_ram = &s_big_ram_defs[i]; 2295c965db44STomer Tayar 22967b6859fbSMintz, Yuval if (mem_group_id == big_ram->mem_group_id || 22977b6859fbSMintz, Yuval mem_group_id == big_ram->ram_mem_group_id) 22987b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, big_ram->grc_param); 22997b6859fbSMintz, Yuval } 23007b6859fbSMintz, Yuval 23017b6859fbSMintz, Yuval switch (mem_group_id) { 23027b6859fbSMintz, Yuval case MEM_GROUP_PXP_ILT: 23037b6859fbSMintz, Yuval case MEM_GROUP_PXP_MEM: 23047b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_PXP); 23057b6859fbSMintz, Yuval case MEM_GROUP_RAM: 23067b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_RAM); 23077b6859fbSMintz, Yuval case MEM_GROUP_PBUF: 23087b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_PBUF); 23097b6859fbSMintz, Yuval case MEM_GROUP_CAU_MEM: 23107b6859fbSMintz, Yuval case MEM_GROUP_CAU_SB: 23117b6859fbSMintz, Yuval case MEM_GROUP_CAU_PI: 23127b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CAU); 23137b6859fbSMintz, Yuval case MEM_GROUP_QM_MEM: 23147b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_QM); 23157b6859fbSMintz, Yuval case MEM_GROUP_CFC_MEM: 23167b6859fbSMintz, Yuval case MEM_GROUP_CONN_CFC_MEM: 23177b6859fbSMintz, Yuval case MEM_GROUP_TASK_CFC_MEM: 2318da090917STomer Tayar return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CFC) || 2319da090917STomer Tayar qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CM_CTX); 23207b6859fbSMintz, Yuval case MEM_GROUP_IGU_MEM: 23217b6859fbSMintz, Yuval case MEM_GROUP_IGU_MSIX: 23227b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_IGU); 23237b6859fbSMintz, Yuval case MEM_GROUP_MULD_MEM: 23247b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_MULD); 23257b6859fbSMintz, Yuval case MEM_GROUP_PRS_MEM: 23267b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_PRS); 23277b6859fbSMintz, Yuval case MEM_GROUP_DMAE_MEM: 23287b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_DMAE); 23297b6859fbSMintz, Yuval case MEM_GROUP_TM_MEM: 23307b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_TM); 23317b6859fbSMintz, Yuval case MEM_GROUP_SDM_MEM: 23327b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_SDM); 23337b6859fbSMintz, Yuval case MEM_GROUP_TDIF_CTX: 23347b6859fbSMintz, Yuval case MEM_GROUP_RDIF_CTX: 23357b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_DIF); 23367b6859fbSMintz, Yuval case MEM_GROUP_CM_MEM: 23377b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CM); 23387b6859fbSMintz, Yuval case MEM_GROUP_IOR: 23397b6859fbSMintz, Yuval return qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_IOR); 23407b6859fbSMintz, Yuval default: 2341c965db44STomer Tayar return true; 2342c965db44STomer Tayar } 23437b6859fbSMintz, Yuval } 2344c965db44STomer Tayar 2345c965db44STomer Tayar /* Stalls all Storms */ 2346c965db44STomer Tayar static void qed_grc_stall_storms(struct qed_hwfn *p_hwfn, 2347c965db44STomer Tayar struct qed_ptt *p_ptt, bool stall) 2348c965db44STomer Tayar { 23497b6859fbSMintz, Yuval u32 reg_addr; 2350c965db44STomer Tayar u8 storm_id; 2351c965db44STomer Tayar 2352c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 23537b6859fbSMintz, Yuval if (!qed_grc_is_storm_included(p_hwfn, 23547b6859fbSMintz, Yuval (enum dbg_storms)storm_id)) 23557b6859fbSMintz, Yuval continue; 2356c965db44STomer Tayar 23577b6859fbSMintz, Yuval reg_addr = s_storm_defs[storm_id].sem_fast_mem_addr + 23587b6859fbSMintz, Yuval SEM_FAST_REG_STALL_0_BB_K2; 23597b6859fbSMintz, Yuval qed_wr(p_hwfn, p_ptt, reg_addr, stall ? 1 : 0); 2360c965db44STomer Tayar } 2361c965db44STomer Tayar 2362c965db44STomer Tayar msleep(STALL_DELAY_MS); 2363c965db44STomer Tayar } 2364c965db44STomer Tayar 2365c965db44STomer Tayar /* Takes all blocks out of reset */ 2366c965db44STomer Tayar static void qed_grc_unreset_blocks(struct qed_hwfn *p_hwfn, 2367c965db44STomer Tayar struct qed_ptt *p_ptt) 2368c965db44STomer Tayar { 2369c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2370c965db44STomer Tayar u32 reg_val[MAX_DBG_RESET_REGS] = { 0 }; 23717b6859fbSMintz, Yuval u32 block_id, i; 2372c965db44STomer Tayar 2373c965db44STomer Tayar /* Fill reset regs values */ 23747b6859fbSMintz, Yuval for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { 23757b6859fbSMintz, Yuval struct block_defs *block = s_block_defs[block_id]; 23767b6859fbSMintz, Yuval 2377da090917STomer Tayar if (block->exists[dev_data->chip_id] && block->has_reset_bit && 2378da090917STomer Tayar block->unreset) 23797b6859fbSMintz, Yuval reg_val[block->reset_reg] |= 23807b6859fbSMintz, Yuval BIT(block->reset_bit_offset); 23817b6859fbSMintz, Yuval } 2382c965db44STomer Tayar 2383c965db44STomer Tayar /* Write reset registers */ 2384c965db44STomer Tayar for (i = 0; i < MAX_DBG_RESET_REGS; i++) { 23857b6859fbSMintz, Yuval if (!s_reset_regs_defs[i].exists[dev_data->chip_id]) 23867b6859fbSMintz, Yuval continue; 23877b6859fbSMintz, Yuval 2388da090917STomer Tayar reg_val[i] |= 2389da090917STomer Tayar s_reset_regs_defs[i].unreset_val[dev_data->chip_id]; 23907b6859fbSMintz, Yuval 2391c965db44STomer Tayar if (reg_val[i]) 2392c965db44STomer Tayar qed_wr(p_hwfn, 2393c965db44STomer Tayar p_ptt, 2394c965db44STomer Tayar s_reset_regs_defs[i].addr + 2395c965db44STomer Tayar RESET_REG_UNRESET_OFFSET, reg_val[i]); 2396c965db44STomer Tayar } 2397c965db44STomer Tayar } 2398c965db44STomer Tayar 2399be086e7cSMintz, Yuval /* Returns the attention block data of the specified block */ 2400c965db44STomer Tayar static const struct dbg_attn_block_type_data * 2401c965db44STomer Tayar qed_get_block_attn_data(enum block_id block_id, enum dbg_attn_type attn_type) 2402c965db44STomer Tayar { 2403c965db44STomer Tayar const struct dbg_attn_block *base_attn_block_arr = 2404c965db44STomer Tayar (const struct dbg_attn_block *) 2405c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_ATTN_BLOCKS].ptr; 2406c965db44STomer Tayar 2407c965db44STomer Tayar return &base_attn_block_arr[block_id].per_type_data[attn_type]; 2408c965db44STomer Tayar } 2409c965db44STomer Tayar 2410c965db44STomer Tayar /* Returns the attention registers of the specified block */ 2411c965db44STomer Tayar static const struct dbg_attn_reg * 2412c965db44STomer Tayar qed_get_block_attn_regs(enum block_id block_id, enum dbg_attn_type attn_type, 2413c965db44STomer Tayar u8 *num_attn_regs) 2414c965db44STomer Tayar { 2415c965db44STomer Tayar const struct dbg_attn_block_type_data *block_type_data = 2416c965db44STomer Tayar qed_get_block_attn_data(block_id, attn_type); 2417c965db44STomer Tayar 2418c965db44STomer Tayar *num_attn_regs = block_type_data->num_regs; 24197b6859fbSMintz, Yuval 2420c965db44STomer Tayar return &((const struct dbg_attn_reg *) 2421c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_ATTN_REGS].ptr)[block_type_data-> 2422c965db44STomer Tayar regs_offset]; 2423c965db44STomer Tayar } 2424c965db44STomer Tayar 2425c965db44STomer Tayar /* For each block, clear the status of all parities */ 2426c965db44STomer Tayar static void qed_grc_clear_all_prty(struct qed_hwfn *p_hwfn, 2427c965db44STomer Tayar struct qed_ptt *p_ptt) 2428c965db44STomer Tayar { 2429c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 24307b6859fbSMintz, Yuval const struct dbg_attn_reg *attn_reg_arr; 2431c965db44STomer Tayar u8 reg_idx, num_attn_regs; 2432c965db44STomer Tayar u32 block_id; 2433c965db44STomer Tayar 2434c965db44STomer Tayar for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { 2435c965db44STomer Tayar if (dev_data->block_in_reset[block_id]) 2436c965db44STomer Tayar continue; 2437c965db44STomer Tayar 2438c965db44STomer Tayar attn_reg_arr = qed_get_block_attn_regs((enum block_id)block_id, 2439c965db44STomer Tayar ATTN_TYPE_PARITY, 2440c965db44STomer Tayar &num_attn_regs); 24417b6859fbSMintz, Yuval 2442c965db44STomer Tayar for (reg_idx = 0; reg_idx < num_attn_regs; reg_idx++) { 2443c965db44STomer Tayar const struct dbg_attn_reg *reg_data = 2444c965db44STomer Tayar &attn_reg_arr[reg_idx]; 24457b6859fbSMintz, Yuval u16 modes_buf_offset; 24467b6859fbSMintz, Yuval bool eval_mode; 2447c965db44STomer Tayar 2448c965db44STomer Tayar /* Check mode */ 24497b6859fbSMintz, Yuval eval_mode = GET_FIELD(reg_data->mode.data, 2450c965db44STomer Tayar DBG_MODE_HDR_EVAL_MODE) > 0; 24517b6859fbSMintz, Yuval modes_buf_offset = 2452c965db44STomer Tayar GET_FIELD(reg_data->mode.data, 2453c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 2454c965db44STomer Tayar 24557b6859fbSMintz, Yuval /* If Mode match: clear parity status */ 2456c965db44STomer Tayar if (!eval_mode || 2457c965db44STomer Tayar qed_is_mode_match(p_hwfn, &modes_buf_offset)) 2458c965db44STomer Tayar qed_rd(p_hwfn, p_ptt, 2459c965db44STomer Tayar DWORDS_TO_BYTES(reg_data-> 2460c965db44STomer Tayar sts_clr_address)); 2461c965db44STomer Tayar } 2462c965db44STomer Tayar } 2463c965db44STomer Tayar } 2464c965db44STomer Tayar 2465c965db44STomer Tayar /* Dumps GRC registers section header. Returns the dumped size in dwords. 2466c965db44STomer Tayar * The following parameters are dumped: 24677b6859fbSMintz, Yuval * - count: no. of dumped entries 2468d52c89f1SMichal Kalderon * - split_type: split type 2469d52c89f1SMichal Kalderon * - split_id: split ID (dumped only if split_id != SPLIT_TYPE_NONE) 24707b6859fbSMintz, Yuval * - param_name: user parameter value (dumped only if param_name != NULL 24717b6859fbSMintz, Yuval * and param_val != NULL). 2472c965db44STomer Tayar */ 2473c965db44STomer Tayar static u32 qed_grc_dump_regs_hdr(u32 *dump_buf, 2474c965db44STomer Tayar bool dump, 2475c965db44STomer Tayar u32 num_reg_entries, 2476d52c89f1SMichal Kalderon enum init_split_types split_type, 2477d52c89f1SMichal Kalderon u8 split_id, 2478c965db44STomer Tayar const char *param_name, const char *param_val) 2479c965db44STomer Tayar { 2480d52c89f1SMichal Kalderon u8 num_params = 2 + 2481d52c89f1SMichal Kalderon (split_type != SPLIT_TYPE_NONE ? 1 : 0) + (param_name ? 1 : 0); 2482c965db44STomer Tayar u32 offset = 0; 2483c965db44STomer Tayar 2484c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 2485c965db44STomer Tayar dump, "grc_regs", num_params); 2486c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 2487c965db44STomer Tayar dump, "count", num_reg_entries); 2488c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 2489d52c89f1SMichal Kalderon dump, "split", 2490d52c89f1SMichal Kalderon s_split_type_defs[split_type].name); 2491d52c89f1SMichal Kalderon if (split_type != SPLIT_TYPE_NONE) 2492c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 2493c965db44STomer Tayar dump, "id", split_id); 2494c965db44STomer Tayar if (param_name && param_val) 2495c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 2496c965db44STomer Tayar dump, param_name, param_val); 24977b6859fbSMintz, Yuval 2498c965db44STomer Tayar return offset; 2499c965db44STomer Tayar } 2500c965db44STomer Tayar 2501da090917STomer Tayar /* Reads the specified registers into the specified buffer. 2502da090917STomer Tayar * The addr and len arguments are specified in dwords. 2503da090917STomer Tayar */ 2504da090917STomer Tayar void qed_read_regs(struct qed_hwfn *p_hwfn, 2505da090917STomer Tayar struct qed_ptt *p_ptt, u32 *buf, u32 addr, u32 len) 2506da090917STomer Tayar { 2507da090917STomer Tayar u32 i; 2508da090917STomer Tayar 2509da090917STomer Tayar for (i = 0; i < len; i++) 2510da090917STomer Tayar buf[i] = qed_rd(p_hwfn, p_ptt, DWORDS_TO_BYTES(addr + i)); 2511da090917STomer Tayar } 2512da090917STomer Tayar 2513be086e7cSMintz, Yuval /* Dumps the GRC registers in the specified address range. 2514be086e7cSMintz, Yuval * Returns the dumped size in dwords. 25157b6859fbSMintz, Yuval * The addr and len arguments are specified in dwords. 2516be086e7cSMintz, Yuval */ 2517be086e7cSMintz, Yuval static u32 qed_grc_dump_addr_range(struct qed_hwfn *p_hwfn, 25187b6859fbSMintz, Yuval struct qed_ptt *p_ptt, 25197b6859fbSMintz, Yuval u32 *dump_buf, 2520d52c89f1SMichal Kalderon bool dump, u32 addr, u32 len, bool wide_bus, 2521d52c89f1SMichal Kalderon enum init_split_types split_type, 2522d52c89f1SMichal Kalderon u8 split_id) 2523be086e7cSMintz, Yuval { 2524da090917STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2525d52c89f1SMichal Kalderon u8 port_id = 0, pf_id = 0, vf_id = 0, fid = 0; 2526be086e7cSMintz, Yuval 25277b6859fbSMintz, Yuval if (!dump) 25287b6859fbSMintz, Yuval return len; 25297b6859fbSMintz, Yuval 2530da090917STomer Tayar /* Print log if needed */ 2531da090917STomer Tayar dev_data->num_regs_read += len; 2532da090917STomer Tayar if (dev_data->num_regs_read >= 2533da090917STomer Tayar s_platform_defs[dev_data->platform_id].log_thresh) { 2534da090917STomer Tayar DP_VERBOSE(p_hwfn, 2535da090917STomer Tayar QED_MSG_DEBUG, 2536da090917STomer Tayar "Dumping %d registers...\n", 2537da090917STomer Tayar dev_data->num_regs_read); 2538da090917STomer Tayar dev_data->num_regs_read = 0; 2539da090917STomer Tayar } 25407b6859fbSMintz, Yuval 2541d52c89f1SMichal Kalderon switch (split_type) { 2542d52c89f1SMichal Kalderon case SPLIT_TYPE_PORT: 2543d52c89f1SMichal Kalderon port_id = split_id; 2544d52c89f1SMichal Kalderon break; 2545d52c89f1SMichal Kalderon case SPLIT_TYPE_PF: 2546d52c89f1SMichal Kalderon pf_id = split_id; 2547d52c89f1SMichal Kalderon break; 2548d52c89f1SMichal Kalderon case SPLIT_TYPE_PORT_PF: 2549d52c89f1SMichal Kalderon port_id = split_id / dev_data->num_pfs_per_port; 2550d52c89f1SMichal Kalderon pf_id = port_id + dev_data->num_ports * 2551d52c89f1SMichal Kalderon (split_id % dev_data->num_pfs_per_port); 2552d52c89f1SMichal Kalderon break; 2553d52c89f1SMichal Kalderon case SPLIT_TYPE_VF: 2554d52c89f1SMichal Kalderon vf_id = split_id; 2555d52c89f1SMichal Kalderon break; 2556d52c89f1SMichal Kalderon default: 2557d52c89f1SMichal Kalderon break; 2558d52c89f1SMichal Kalderon } 2559d52c89f1SMichal Kalderon 2560da090917STomer Tayar /* Try reading using DMAE */ 2561d52c89f1SMichal Kalderon if (dev_data->use_dmae && split_type == SPLIT_TYPE_NONE && 2562da090917STomer Tayar (len >= s_platform_defs[dev_data->platform_id].dmae_thresh || 2563da090917STomer Tayar wide_bus)) { 2564da090917STomer Tayar if (!qed_dmae_grc2host(p_hwfn, p_ptt, DWORDS_TO_BYTES(addr), 256583bf76e3SMichal Kalderon (u64)(uintptr_t)(dump_buf), len, NULL)) 2566da090917STomer Tayar return len; 2567da090917STomer Tayar dev_data->use_dmae = 0; 2568da090917STomer Tayar DP_VERBOSE(p_hwfn, 2569da090917STomer Tayar QED_MSG_DEBUG, 2570da090917STomer Tayar "Failed reading from chip using DMAE, using GRC instead\n"); 2571da090917STomer Tayar } 2572da090917STomer Tayar 2573d52c89f1SMichal Kalderon /* If not read using DMAE, read using GRC */ 2574d52c89f1SMichal Kalderon 2575d52c89f1SMichal Kalderon /* Set pretend */ 2576d52c89f1SMichal Kalderon if (split_type != dev_data->pretend.split_type || split_id != 2577d52c89f1SMichal Kalderon dev_data->pretend.split_id) { 2578d52c89f1SMichal Kalderon switch (split_type) { 2579d52c89f1SMichal Kalderon case SPLIT_TYPE_PORT: 2580d52c89f1SMichal Kalderon qed_port_pretend(p_hwfn, p_ptt, port_id); 2581d52c89f1SMichal Kalderon break; 2582d52c89f1SMichal Kalderon case SPLIT_TYPE_PF: 2583d52c89f1SMichal Kalderon fid = pf_id << PXP_PRETEND_CONCRETE_FID_PFID_SHIFT; 2584d52c89f1SMichal Kalderon qed_fid_pretend(p_hwfn, p_ptt, fid); 2585d52c89f1SMichal Kalderon break; 2586d52c89f1SMichal Kalderon case SPLIT_TYPE_PORT_PF: 2587d52c89f1SMichal Kalderon fid = pf_id << PXP_PRETEND_CONCRETE_FID_PFID_SHIFT; 2588d52c89f1SMichal Kalderon qed_port_fid_pretend(p_hwfn, p_ptt, port_id, fid); 2589d52c89f1SMichal Kalderon break; 2590d52c89f1SMichal Kalderon case SPLIT_TYPE_VF: 2591d52c89f1SMichal Kalderon fid = BIT(PXP_PRETEND_CONCRETE_FID_VFVALID_SHIFT) | 2592d52c89f1SMichal Kalderon (vf_id << PXP_PRETEND_CONCRETE_FID_VFID_SHIFT); 2593d52c89f1SMichal Kalderon qed_fid_pretend(p_hwfn, p_ptt, fid); 2594d52c89f1SMichal Kalderon break; 2595d52c89f1SMichal Kalderon default: 2596d52c89f1SMichal Kalderon break; 2597d52c89f1SMichal Kalderon } 2598d52c89f1SMichal Kalderon 2599d52c89f1SMichal Kalderon dev_data->pretend.split_type = (u8)split_type; 2600d52c89f1SMichal Kalderon dev_data->pretend.split_id = split_id; 2601d52c89f1SMichal Kalderon } 2602d52c89f1SMichal Kalderon 2603d52c89f1SMichal Kalderon /* Read registers using GRC */ 2604da090917STomer Tayar qed_read_regs(p_hwfn, p_ptt, dump_buf, addr, len); 2605da090917STomer Tayar 2606da090917STomer Tayar return len; 2607be086e7cSMintz, Yuval } 2608be086e7cSMintz, Yuval 26097b6859fbSMintz, Yuval /* Dumps GRC registers sequence header. Returns the dumped size in dwords. 26107b6859fbSMintz, Yuval * The addr and len arguments are specified in dwords. 26117b6859fbSMintz, Yuval */ 26127b6859fbSMintz, Yuval static u32 qed_grc_dump_reg_entry_hdr(u32 *dump_buf, 26137b6859fbSMintz, Yuval bool dump, u32 addr, u32 len) 2614be086e7cSMintz, Yuval { 2615be086e7cSMintz, Yuval if (dump) 2616be086e7cSMintz, Yuval *dump_buf = addr | (len << REG_DUMP_LEN_SHIFT); 26177b6859fbSMintz, Yuval 2618be086e7cSMintz, Yuval return 1; 2619be086e7cSMintz, Yuval } 2620be086e7cSMintz, Yuval 26217b6859fbSMintz, Yuval /* Dumps GRC registers sequence. Returns the dumped size in dwords. 26227b6859fbSMintz, Yuval * The addr and len arguments are specified in dwords. 26237b6859fbSMintz, Yuval */ 2624c965db44STomer Tayar static u32 qed_grc_dump_reg_entry(struct qed_hwfn *p_hwfn, 26257b6859fbSMintz, Yuval struct qed_ptt *p_ptt, 26267b6859fbSMintz, Yuval u32 *dump_buf, 2627d52c89f1SMichal Kalderon bool dump, u32 addr, u32 len, bool wide_bus, 2628d52c89f1SMichal Kalderon enum init_split_types split_type, u8 split_id) 2629c965db44STomer Tayar { 2630be086e7cSMintz, Yuval u32 offset = 0; 2631c965db44STomer Tayar 2632be086e7cSMintz, Yuval offset += qed_grc_dump_reg_entry_hdr(dump_buf, dump, addr, len); 2633be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 2634c965db44STomer Tayar p_ptt, 26357b6859fbSMintz, Yuval dump_buf + offset, 2636d52c89f1SMichal Kalderon dump, addr, len, wide_bus, 2637d52c89f1SMichal Kalderon split_type, split_id); 26387b6859fbSMintz, Yuval 2639be086e7cSMintz, Yuval return offset; 2640be086e7cSMintz, Yuval } 2641be086e7cSMintz, Yuval 2642be086e7cSMintz, Yuval /* Dumps GRC registers sequence with skip cycle. 2643be086e7cSMintz, Yuval * Returns the dumped size in dwords. 26447b6859fbSMintz, Yuval * - addr: start GRC address in dwords 26457b6859fbSMintz, Yuval * - total_len: total no. of dwords to dump 26467b6859fbSMintz, Yuval * - read_len: no. consecutive dwords to read 26477b6859fbSMintz, Yuval * - skip_len: no. of dwords to skip (and fill with zeros) 2648be086e7cSMintz, Yuval */ 2649be086e7cSMintz, Yuval static u32 qed_grc_dump_reg_entry_skip(struct qed_hwfn *p_hwfn, 26507b6859fbSMintz, Yuval struct qed_ptt *p_ptt, 26517b6859fbSMintz, Yuval u32 *dump_buf, 26527b6859fbSMintz, Yuval bool dump, 26537b6859fbSMintz, Yuval u32 addr, 26547b6859fbSMintz, Yuval u32 total_len, 2655be086e7cSMintz, Yuval u32 read_len, u32 skip_len) 2656be086e7cSMintz, Yuval { 2657be086e7cSMintz, Yuval u32 offset = 0, reg_offset = 0; 2658be086e7cSMintz, Yuval 2659be086e7cSMintz, Yuval offset += qed_grc_dump_reg_entry_hdr(dump_buf, dump, addr, total_len); 26607b6859fbSMintz, Yuval 26617b6859fbSMintz, Yuval if (!dump) 26627b6859fbSMintz, Yuval return offset + total_len; 26637b6859fbSMintz, Yuval 2664be086e7cSMintz, Yuval while (reg_offset < total_len) { 26657b6859fbSMintz, Yuval u32 curr_len = min_t(u32, read_len, total_len - reg_offset); 26667b6859fbSMintz, Yuval 2667be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 2668be086e7cSMintz, Yuval p_ptt, 2669be086e7cSMintz, Yuval dump_buf + offset, 2670d52c89f1SMichal Kalderon dump, addr, curr_len, false, 2671d52c89f1SMichal Kalderon SPLIT_TYPE_NONE, 0); 2672be086e7cSMintz, Yuval reg_offset += curr_len; 2673be086e7cSMintz, Yuval addr += curr_len; 26747b6859fbSMintz, Yuval 2675be086e7cSMintz, Yuval if (reg_offset < total_len) { 26767b6859fbSMintz, Yuval curr_len = min_t(u32, skip_len, total_len - skip_len); 26777b6859fbSMintz, Yuval memset(dump_buf + offset, 0, DWORDS_TO_BYTES(curr_len)); 2678be086e7cSMintz, Yuval offset += curr_len; 2679be086e7cSMintz, Yuval reg_offset += curr_len; 2680be086e7cSMintz, Yuval addr += curr_len; 2681be086e7cSMintz, Yuval } 2682be086e7cSMintz, Yuval } 2683c965db44STomer Tayar 2684c965db44STomer Tayar return offset; 2685c965db44STomer Tayar } 2686c965db44STomer Tayar 2687c965db44STomer Tayar /* Dumps GRC registers entries. Returns the dumped size in dwords. */ 2688c965db44STomer Tayar static u32 qed_grc_dump_regs_entries(struct qed_hwfn *p_hwfn, 2689c965db44STomer Tayar struct qed_ptt *p_ptt, 2690c965db44STomer Tayar struct dbg_array input_regs_arr, 2691c965db44STomer Tayar u32 *dump_buf, 2692c965db44STomer Tayar bool dump, 2693d52c89f1SMichal Kalderon enum init_split_types split_type, 2694d52c89f1SMichal Kalderon u8 split_id, 2695c965db44STomer Tayar bool block_enable[MAX_BLOCK_ID], 2696c965db44STomer Tayar u32 *num_dumped_reg_entries) 2697c965db44STomer Tayar { 2698c965db44STomer Tayar u32 i, offset = 0, input_offset = 0; 2699c965db44STomer Tayar bool mode_match = true; 2700c965db44STomer Tayar 2701c965db44STomer Tayar *num_dumped_reg_entries = 0; 27027b6859fbSMintz, Yuval 2703c965db44STomer Tayar while (input_offset < input_regs_arr.size_in_dwords) { 2704c965db44STomer Tayar const struct dbg_dump_cond_hdr *cond_hdr = 2705c965db44STomer Tayar (const struct dbg_dump_cond_hdr *) 2706c965db44STomer Tayar &input_regs_arr.ptr[input_offset++]; 27077b6859fbSMintz, Yuval u16 modes_buf_offset; 27087b6859fbSMintz, Yuval bool eval_mode; 2709c965db44STomer Tayar 2710c965db44STomer Tayar /* Check mode/block */ 27117b6859fbSMintz, Yuval eval_mode = GET_FIELD(cond_hdr->mode.data, 27127b6859fbSMintz, Yuval DBG_MODE_HDR_EVAL_MODE) > 0; 2713c965db44STomer Tayar if (eval_mode) { 27147b6859fbSMintz, Yuval modes_buf_offset = 2715c965db44STomer Tayar GET_FIELD(cond_hdr->mode.data, 2716c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 2717c965db44STomer Tayar mode_match = qed_is_mode_match(p_hwfn, 2718c965db44STomer Tayar &modes_buf_offset); 2719c965db44STomer Tayar } 2720c965db44STomer Tayar 27217b6859fbSMintz, Yuval if (!mode_match || !block_enable[cond_hdr->block_id]) { 27227b6859fbSMintz, Yuval input_offset += cond_hdr->data_size; 27237b6859fbSMintz, Yuval continue; 27247b6859fbSMintz, Yuval } 27257b6859fbSMintz, Yuval 27267b6859fbSMintz, Yuval for (i = 0; i < cond_hdr->data_size; i++, input_offset++) { 2727c965db44STomer Tayar const struct dbg_dump_reg *reg = 2728c965db44STomer Tayar (const struct dbg_dump_reg *) 2729c965db44STomer Tayar &input_regs_arr.ptr[input_offset]; 2730be086e7cSMintz, Yuval u32 addr, len; 27317b6859fbSMintz, Yuval bool wide_bus; 2732c965db44STomer Tayar 27337b6859fbSMintz, Yuval addr = GET_FIELD(reg->data, DBG_DUMP_REG_ADDRESS); 2734be086e7cSMintz, Yuval len = GET_FIELD(reg->data, DBG_DUMP_REG_LENGTH); 27357b6859fbSMintz, Yuval wide_bus = GET_FIELD(reg->data, DBG_DUMP_REG_WIDE_BUS); 27367b6859fbSMintz, Yuval offset += qed_grc_dump_reg_entry(p_hwfn, 27377b6859fbSMintz, Yuval p_ptt, 2738be086e7cSMintz, Yuval dump_buf + offset, 2739be086e7cSMintz, Yuval dump, 2740be086e7cSMintz, Yuval addr, 27417b6859fbSMintz, Yuval len, 2742d52c89f1SMichal Kalderon wide_bus, 2743d52c89f1SMichal Kalderon split_type, split_id); 2744c965db44STomer Tayar (*num_dumped_reg_entries)++; 2745c965db44STomer Tayar } 2746c965db44STomer Tayar } 2747c965db44STomer Tayar 2748c965db44STomer Tayar return offset; 2749c965db44STomer Tayar } 2750c965db44STomer Tayar 2751c965db44STomer Tayar /* Dumps GRC registers entries. Returns the dumped size in dwords. */ 2752c965db44STomer Tayar static u32 qed_grc_dump_split_data(struct qed_hwfn *p_hwfn, 2753c965db44STomer Tayar struct qed_ptt *p_ptt, 2754c965db44STomer Tayar struct dbg_array input_regs_arr, 2755c965db44STomer Tayar u32 *dump_buf, 2756c965db44STomer Tayar bool dump, 2757c965db44STomer Tayar bool block_enable[MAX_BLOCK_ID], 2758d52c89f1SMichal Kalderon enum init_split_types split_type, 2759d52c89f1SMichal Kalderon u8 split_id, 2760c965db44STomer Tayar const char *param_name, 2761c965db44STomer Tayar const char *param_val) 2762c965db44STomer Tayar { 2763d52c89f1SMichal Kalderon struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2764d52c89f1SMichal Kalderon enum init_split_types hdr_split_type = split_type; 2765c965db44STomer Tayar u32 num_dumped_reg_entries, offset; 2766d52c89f1SMichal Kalderon u8 hdr_split_id = split_id; 2767d52c89f1SMichal Kalderon 2768d52c89f1SMichal Kalderon /* In PORT_PF split type, print a port split header */ 2769d52c89f1SMichal Kalderon if (split_type == SPLIT_TYPE_PORT_PF) { 2770d52c89f1SMichal Kalderon hdr_split_type = SPLIT_TYPE_PORT; 2771d52c89f1SMichal Kalderon hdr_split_id = split_id / dev_data->num_pfs_per_port; 2772d52c89f1SMichal Kalderon } 2773c965db44STomer Tayar 2774c965db44STomer Tayar /* Calculate register dump header size (and skip it for now) */ 2775c965db44STomer Tayar offset = qed_grc_dump_regs_hdr(dump_buf, 2776c965db44STomer Tayar false, 2777c965db44STomer Tayar 0, 2778d52c89f1SMichal Kalderon hdr_split_type, 2779d52c89f1SMichal Kalderon hdr_split_id, param_name, param_val); 2780c965db44STomer Tayar 2781c965db44STomer Tayar /* Dump registers */ 2782c965db44STomer Tayar offset += qed_grc_dump_regs_entries(p_hwfn, 2783c965db44STomer Tayar p_ptt, 2784c965db44STomer Tayar input_regs_arr, 2785c965db44STomer Tayar dump_buf + offset, 2786c965db44STomer Tayar dump, 2787d52c89f1SMichal Kalderon split_type, 2788d52c89f1SMichal Kalderon split_id, 2789c965db44STomer Tayar block_enable, 2790c965db44STomer Tayar &num_dumped_reg_entries); 2791c965db44STomer Tayar 2792c965db44STomer Tayar /* Write register dump header */ 2793c965db44STomer Tayar if (dump && num_dumped_reg_entries > 0) 2794c965db44STomer Tayar qed_grc_dump_regs_hdr(dump_buf, 2795c965db44STomer Tayar dump, 2796c965db44STomer Tayar num_dumped_reg_entries, 2797d52c89f1SMichal Kalderon hdr_split_type, 2798d52c89f1SMichal Kalderon hdr_split_id, param_name, param_val); 2799c965db44STomer Tayar 2800c965db44STomer Tayar return num_dumped_reg_entries > 0 ? offset : 0; 2801c965db44STomer Tayar } 2802c965db44STomer Tayar 28037b6859fbSMintz, Yuval /* Dumps registers according to the input registers array. Returns the dumped 28047b6859fbSMintz, Yuval * size in dwords. 2805c965db44STomer Tayar */ 2806c965db44STomer Tayar static u32 qed_grc_dump_registers(struct qed_hwfn *p_hwfn, 2807c965db44STomer Tayar struct qed_ptt *p_ptt, 2808c965db44STomer Tayar u32 *dump_buf, 2809c965db44STomer Tayar bool dump, 2810c965db44STomer Tayar bool block_enable[MAX_BLOCK_ID], 2811c965db44STomer Tayar const char *param_name, const char *param_val) 2812c965db44STomer Tayar { 2813c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2814c965db44STomer Tayar u32 offset = 0, input_offset = 0; 2815be086e7cSMintz, Yuval u16 fid; 2816c965db44STomer Tayar while (input_offset < 2817c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].size_in_dwords) { 28187b6859fbSMintz, Yuval const struct dbg_dump_split_hdr *split_hdr; 28197b6859fbSMintz, Yuval struct dbg_array curr_input_regs_arr; 2820d52c89f1SMichal Kalderon enum init_split_types split_type; 2821d52c89f1SMichal Kalderon u16 split_count = 0; 28227b6859fbSMintz, Yuval u32 split_data_size; 2823d52c89f1SMichal Kalderon u8 split_id; 28247b6859fbSMintz, Yuval 28257b6859fbSMintz, Yuval split_hdr = 2826c965db44STomer Tayar (const struct dbg_dump_split_hdr *) 2827c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].ptr[input_offset++]; 2828d52c89f1SMichal Kalderon split_type = 28297b6859fbSMintz, Yuval GET_FIELD(split_hdr->hdr, 2830c965db44STomer Tayar DBG_DUMP_SPLIT_HDR_SPLIT_TYPE_ID); 28317b6859fbSMintz, Yuval split_data_size = 28327b6859fbSMintz, Yuval GET_FIELD(split_hdr->hdr, 2833c965db44STomer Tayar DBG_DUMP_SPLIT_HDR_DATA_SIZE); 28347b6859fbSMintz, Yuval curr_input_regs_arr.ptr = 28357b6859fbSMintz, Yuval &s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].ptr[input_offset]; 28367b6859fbSMintz, Yuval curr_input_regs_arr.size_in_dwords = split_data_size; 2837c965db44STomer Tayar 2838d52c89f1SMichal Kalderon switch (split_type) { 2839c965db44STomer Tayar case SPLIT_TYPE_NONE: 2840d52c89f1SMichal Kalderon split_count = 1; 2841c965db44STomer Tayar break; 2842c965db44STomer Tayar case SPLIT_TYPE_PORT: 2843d52c89f1SMichal Kalderon split_count = dev_data->num_ports; 2844c965db44STomer Tayar break; 2845c965db44STomer Tayar case SPLIT_TYPE_PF: 2846c965db44STomer Tayar case SPLIT_TYPE_PORT_PF: 2847d52c89f1SMichal Kalderon split_count = dev_data->num_ports * 2848d52c89f1SMichal Kalderon dev_data->num_pfs_per_port; 2849be086e7cSMintz, Yuval break; 2850be086e7cSMintz, Yuval case SPLIT_TYPE_VF: 2851d52c89f1SMichal Kalderon split_count = dev_data->num_vfs; 2852d52c89f1SMichal Kalderon break; 2853d52c89f1SMichal Kalderon default: 2854d52c89f1SMichal Kalderon return 0; 2855be086e7cSMintz, Yuval } 2856be086e7cSMintz, Yuval 2857d52c89f1SMichal Kalderon for (split_id = 0; split_id < split_count; split_id++) 2858d52c89f1SMichal Kalderon offset += qed_grc_dump_split_data(p_hwfn, p_ptt, 2859be086e7cSMintz, Yuval curr_input_regs_arr, 2860be086e7cSMintz, Yuval dump_buf + offset, 2861be086e7cSMintz, Yuval dump, block_enable, 2862d52c89f1SMichal Kalderon split_type, 2863d52c89f1SMichal Kalderon split_id, 2864be086e7cSMintz, Yuval param_name, 2865c965db44STomer Tayar param_val); 2866c965db44STomer Tayar 2867c965db44STomer Tayar input_offset += split_data_size; 2868c965db44STomer Tayar } 2869c965db44STomer Tayar 2870d52c89f1SMichal Kalderon /* Cancel pretends (pretend to original PF) */ 2871be086e7cSMintz, Yuval if (dump) { 2872be086e7cSMintz, Yuval fid = p_hwfn->rel_pf_id << PXP_PRETEND_CONCRETE_FID_PFID_SHIFT; 2873be086e7cSMintz, Yuval qed_fid_pretend(p_hwfn, p_ptt, fid); 2874d52c89f1SMichal Kalderon dev_data->pretend.split_type = SPLIT_TYPE_NONE; 2875d52c89f1SMichal Kalderon dev_data->pretend.split_id = 0; 2876be086e7cSMintz, Yuval } 2877be086e7cSMintz, Yuval 2878c965db44STomer Tayar return offset; 2879c965db44STomer Tayar } 2880c965db44STomer Tayar 2881c965db44STomer Tayar /* Dump reset registers. Returns the dumped size in dwords. */ 2882c965db44STomer Tayar static u32 qed_grc_dump_reset_regs(struct qed_hwfn *p_hwfn, 2883c965db44STomer Tayar struct qed_ptt *p_ptt, 2884c965db44STomer Tayar u32 *dump_buf, bool dump) 2885c965db44STomer Tayar { 2886c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 2887c965db44STomer Tayar u32 i, offset = 0, num_regs = 0; 2888c965db44STomer Tayar 2889c965db44STomer Tayar /* Calculate header size */ 2890c965db44STomer Tayar offset += qed_grc_dump_regs_hdr(dump_buf, 2891d52c89f1SMichal Kalderon false, 0, 2892d52c89f1SMichal Kalderon SPLIT_TYPE_NONE, 0, NULL, NULL); 2893c965db44STomer Tayar 2894c965db44STomer Tayar /* Write reset registers */ 2895c965db44STomer Tayar for (i = 0; i < MAX_DBG_RESET_REGS; i++) { 28967b6859fbSMintz, Yuval if (!s_reset_regs_defs[i].exists[dev_data->chip_id]) 28977b6859fbSMintz, Yuval continue; 2898be086e7cSMintz, Yuval 2899c965db44STomer Tayar offset += qed_grc_dump_reg_entry(p_hwfn, 2900c965db44STomer Tayar p_ptt, 2901c965db44STomer Tayar dump_buf + offset, 2902c965db44STomer Tayar dump, 29037b6859fbSMintz, Yuval BYTES_TO_DWORDS 29047b6859fbSMintz, Yuval (s_reset_regs_defs[i].addr), 1, 2905d52c89f1SMichal Kalderon false, SPLIT_TYPE_NONE, 0); 2906c965db44STomer Tayar num_regs++; 2907c965db44STomer Tayar } 2908c965db44STomer Tayar 2909c965db44STomer Tayar /* Write header */ 2910c965db44STomer Tayar if (dump) 2911c965db44STomer Tayar qed_grc_dump_regs_hdr(dump_buf, 2912d52c89f1SMichal Kalderon true, num_regs, SPLIT_TYPE_NONE, 2913d52c89f1SMichal Kalderon 0, NULL, NULL); 29147b6859fbSMintz, Yuval 2915c965db44STomer Tayar return offset; 2916c965db44STomer Tayar } 2917c965db44STomer Tayar 29187b6859fbSMintz, Yuval /* Dump registers that are modified during GRC Dump and therefore must be 29197b6859fbSMintz, Yuval * dumped first. Returns the dumped size in dwords. 2920c965db44STomer Tayar */ 2921c965db44STomer Tayar static u32 qed_grc_dump_modified_regs(struct qed_hwfn *p_hwfn, 2922c965db44STomer Tayar struct qed_ptt *p_ptt, 2923c965db44STomer Tayar u32 *dump_buf, bool dump) 2924c965db44STomer Tayar { 2925c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 29267b6859fbSMintz, Yuval u32 block_id, offset = 0, num_reg_entries = 0; 29277b6859fbSMintz, Yuval const struct dbg_attn_reg *attn_reg_arr; 2928c965db44STomer Tayar u8 storm_id, reg_idx, num_attn_regs; 2929c965db44STomer Tayar 2930c965db44STomer Tayar /* Calculate header size */ 2931c965db44STomer Tayar offset += qed_grc_dump_regs_hdr(dump_buf, 2932d52c89f1SMichal Kalderon false, 0, SPLIT_TYPE_NONE, 2933d52c89f1SMichal Kalderon 0, NULL, NULL); 2934c965db44STomer Tayar 2935c965db44STomer Tayar /* Write parity registers */ 2936c965db44STomer Tayar for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { 2937c965db44STomer Tayar if (dev_data->block_in_reset[block_id] && dump) 2938c965db44STomer Tayar continue; 2939c965db44STomer Tayar 2940c965db44STomer Tayar attn_reg_arr = qed_get_block_attn_regs((enum block_id)block_id, 2941c965db44STomer Tayar ATTN_TYPE_PARITY, 2942c965db44STomer Tayar &num_attn_regs); 29437b6859fbSMintz, Yuval 2944c965db44STomer Tayar for (reg_idx = 0; reg_idx < num_attn_regs; reg_idx++) { 2945c965db44STomer Tayar const struct dbg_attn_reg *reg_data = 2946c965db44STomer Tayar &attn_reg_arr[reg_idx]; 2947c965db44STomer Tayar u16 modes_buf_offset; 2948c965db44STomer Tayar bool eval_mode; 2949be086e7cSMintz, Yuval u32 addr; 2950c965db44STomer Tayar 2951c965db44STomer Tayar /* Check mode */ 2952c965db44STomer Tayar eval_mode = GET_FIELD(reg_data->mode.data, 2953c965db44STomer Tayar DBG_MODE_HDR_EVAL_MODE) > 0; 2954c965db44STomer Tayar modes_buf_offset = 2955c965db44STomer Tayar GET_FIELD(reg_data->mode.data, 2956c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 29577b6859fbSMintz, Yuval if (eval_mode && 29587b6859fbSMintz, Yuval !qed_is_mode_match(p_hwfn, &modes_buf_offset)) 29597b6859fbSMintz, Yuval continue; 29607b6859fbSMintz, Yuval 29617b6859fbSMintz, Yuval /* Mode match: read & dump registers */ 2962be086e7cSMintz, Yuval addr = reg_data->mask_address; 29637b6859fbSMintz, Yuval offset += qed_grc_dump_reg_entry(p_hwfn, 2964c965db44STomer Tayar p_ptt, 2965c965db44STomer Tayar dump_buf + offset, 2966c965db44STomer Tayar dump, 2967be086e7cSMintz, Yuval addr, 2968d52c89f1SMichal Kalderon 1, false, 2969d52c89f1SMichal Kalderon SPLIT_TYPE_NONE, 0); 2970be086e7cSMintz, Yuval addr = GET_FIELD(reg_data->data, 2971be086e7cSMintz, Yuval DBG_ATTN_REG_STS_ADDRESS); 29727b6859fbSMintz, Yuval offset += qed_grc_dump_reg_entry(p_hwfn, 2973c965db44STomer Tayar p_ptt, 2974c965db44STomer Tayar dump_buf + offset, 2975c965db44STomer Tayar dump, 2976be086e7cSMintz, Yuval addr, 2977d52c89f1SMichal Kalderon 1, false, 2978d52c89f1SMichal Kalderon SPLIT_TYPE_NONE, 0); 2979c965db44STomer Tayar num_reg_entries += 2; 2980c965db44STomer Tayar } 2981c965db44STomer Tayar } 2982c965db44STomer Tayar 29837b6859fbSMintz, Yuval /* Write Storm stall status registers */ 2984c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 29857b6859fbSMintz, Yuval struct storm_defs *storm = &s_storm_defs[storm_id]; 2986be086e7cSMintz, Yuval u32 addr; 2987be086e7cSMintz, Yuval 29887b6859fbSMintz, Yuval if (dev_data->block_in_reset[storm->block_id] && dump) 2989c965db44STomer Tayar continue; 2990c965db44STomer Tayar 2991be086e7cSMintz, Yuval addr = 2992be086e7cSMintz, Yuval BYTES_TO_DWORDS(s_storm_defs[storm_id].sem_fast_mem_addr + 2993be086e7cSMintz, Yuval SEM_FAST_REG_STALLED); 2994c965db44STomer Tayar offset += qed_grc_dump_reg_entry(p_hwfn, 2995c965db44STomer Tayar p_ptt, 2996c965db44STomer Tayar dump_buf + offset, 2997c965db44STomer Tayar dump, 2998be086e7cSMintz, Yuval addr, 29997b6859fbSMintz, Yuval 1, 3000d52c89f1SMichal Kalderon false, SPLIT_TYPE_NONE, 0); 3001c965db44STomer Tayar num_reg_entries++; 3002c965db44STomer Tayar } 3003c965db44STomer Tayar 3004c965db44STomer Tayar /* Write header */ 3005c965db44STomer Tayar if (dump) 3006c965db44STomer Tayar qed_grc_dump_regs_hdr(dump_buf, 3007c965db44STomer Tayar true, 3008d52c89f1SMichal Kalderon num_reg_entries, SPLIT_TYPE_NONE, 3009d52c89f1SMichal Kalderon 0, NULL, NULL); 30107b6859fbSMintz, Yuval 3011c965db44STomer Tayar return offset; 3012c965db44STomer Tayar } 3013c965db44STomer Tayar 3014be086e7cSMintz, Yuval /* Dumps registers that can't be represented in the debug arrays */ 3015be086e7cSMintz, Yuval static u32 qed_grc_dump_special_regs(struct qed_hwfn *p_hwfn, 3016be086e7cSMintz, Yuval struct qed_ptt *p_ptt, 3017be086e7cSMintz, Yuval u32 *dump_buf, bool dump) 3018be086e7cSMintz, Yuval { 3019be086e7cSMintz, Yuval u32 offset = 0, addr; 3020be086e7cSMintz, Yuval 3021be086e7cSMintz, Yuval offset += qed_grc_dump_regs_hdr(dump_buf, 3022d52c89f1SMichal Kalderon dump, 2, SPLIT_TYPE_NONE, 0, 3023d52c89f1SMichal Kalderon NULL, NULL); 3024be086e7cSMintz, Yuval 3025be086e7cSMintz, Yuval /* Dump R/TDIF_REG_DEBUG_ERROR_INFO_SIZE (every 8'th register should be 3026be086e7cSMintz, Yuval * skipped). 3027be086e7cSMintz, Yuval */ 3028be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(RDIF_REG_DEBUG_ERROR_INFO); 3029be086e7cSMintz, Yuval offset += qed_grc_dump_reg_entry_skip(p_hwfn, 3030be086e7cSMintz, Yuval p_ptt, 3031be086e7cSMintz, Yuval dump_buf + offset, 3032be086e7cSMintz, Yuval dump, 3033be086e7cSMintz, Yuval addr, 3034be086e7cSMintz, Yuval RDIF_REG_DEBUG_ERROR_INFO_SIZE, 3035be086e7cSMintz, Yuval 7, 3036be086e7cSMintz, Yuval 1); 3037be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(TDIF_REG_DEBUG_ERROR_INFO); 3038be086e7cSMintz, Yuval offset += 3039be086e7cSMintz, Yuval qed_grc_dump_reg_entry_skip(p_hwfn, 3040be086e7cSMintz, Yuval p_ptt, 3041be086e7cSMintz, Yuval dump_buf + offset, 3042be086e7cSMintz, Yuval dump, 3043be086e7cSMintz, Yuval addr, 3044be086e7cSMintz, Yuval TDIF_REG_DEBUG_ERROR_INFO_SIZE, 3045be086e7cSMintz, Yuval 7, 3046be086e7cSMintz, Yuval 1); 3047be086e7cSMintz, Yuval 3048be086e7cSMintz, Yuval return offset; 3049be086e7cSMintz, Yuval } 3050be086e7cSMintz, Yuval 30517b6859fbSMintz, Yuval /* Dumps a GRC memory header (section and params). Returns the dumped size in 30527b6859fbSMintz, Yuval * dwords. The following parameters are dumped: 30537b6859fbSMintz, Yuval * - name: dumped only if it's not NULL. 30547b6859fbSMintz, Yuval * - addr: in dwords, dumped only if name is NULL. 30557b6859fbSMintz, Yuval * - len: in dwords, always dumped. 30567b6859fbSMintz, Yuval * - width: dumped if it's not zero. 30577b6859fbSMintz, Yuval * - packed: dumped only if it's not false. 30587b6859fbSMintz, Yuval * - mem_group: always dumped. 30597b6859fbSMintz, Yuval * - is_storm: true only if the memory is related to a Storm. 30607b6859fbSMintz, Yuval * - storm_letter: valid only if is_storm is true. 30617b6859fbSMintz, Yuval * 3062c965db44STomer Tayar */ 3063c965db44STomer Tayar static u32 qed_grc_dump_mem_hdr(struct qed_hwfn *p_hwfn, 3064c965db44STomer Tayar u32 *dump_buf, 3065c965db44STomer Tayar bool dump, 3066c965db44STomer Tayar const char *name, 3067be086e7cSMintz, Yuval u32 addr, 3068be086e7cSMintz, Yuval u32 len, 3069c965db44STomer Tayar u32 bit_width, 3070c965db44STomer Tayar bool packed, 3071c965db44STomer Tayar const char *mem_group, 3072c965db44STomer Tayar bool is_storm, char storm_letter) 3073c965db44STomer Tayar { 3074c965db44STomer Tayar u8 num_params = 3; 3075c965db44STomer Tayar u32 offset = 0; 3076c965db44STomer Tayar char buf[64]; 3077c965db44STomer Tayar 3078be086e7cSMintz, Yuval if (!len) 3079c965db44STomer Tayar DP_NOTICE(p_hwfn, 3080c965db44STomer Tayar "Unexpected GRC Dump error: dumped memory size must be non-zero\n"); 30817b6859fbSMintz, Yuval 3082c965db44STomer Tayar if (bit_width) 3083c965db44STomer Tayar num_params++; 3084c965db44STomer Tayar if (packed) 3085c965db44STomer Tayar num_params++; 3086c965db44STomer Tayar 3087c965db44STomer Tayar /* Dump section header */ 3088c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 3089c965db44STomer Tayar dump, "grc_mem", num_params); 30907b6859fbSMintz, Yuval 3091c965db44STomer Tayar if (name) { 3092c965db44STomer Tayar /* Dump name */ 3093c965db44STomer Tayar if (is_storm) { 3094c965db44STomer Tayar strcpy(buf, "?STORM_"); 3095c965db44STomer Tayar buf[0] = storm_letter; 3096c965db44STomer Tayar strcpy(buf + strlen(buf), name); 3097c965db44STomer Tayar } else { 3098c965db44STomer Tayar strcpy(buf, name); 3099c965db44STomer Tayar } 3100c965db44STomer Tayar 3101c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 3102c965db44STomer Tayar dump, "name", buf); 3103c965db44STomer Tayar } else { 3104c965db44STomer Tayar /* Dump address */ 31057b6859fbSMintz, Yuval u32 addr_in_bytes = DWORDS_TO_BYTES(addr); 31067b6859fbSMintz, Yuval 3107c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 31087b6859fbSMintz, Yuval dump, "addr", addr_in_bytes); 3109c965db44STomer Tayar } 3110c965db44STomer Tayar 3111c965db44STomer Tayar /* Dump len */ 3112be086e7cSMintz, Yuval offset += qed_dump_num_param(dump_buf + offset, dump, "len", len); 3113c965db44STomer Tayar 3114c965db44STomer Tayar /* Dump bit width */ 3115c965db44STomer Tayar if (bit_width) 3116c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 3117c965db44STomer Tayar dump, "width", bit_width); 3118c965db44STomer Tayar 3119c965db44STomer Tayar /* Dump packed */ 3120c965db44STomer Tayar if (packed) 3121c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 3122c965db44STomer Tayar dump, "packed", 1); 3123c965db44STomer Tayar 3124c965db44STomer Tayar /* Dump reg type */ 3125c965db44STomer Tayar if (is_storm) { 3126c965db44STomer Tayar strcpy(buf, "?STORM_"); 3127c965db44STomer Tayar buf[0] = storm_letter; 3128c965db44STomer Tayar strcpy(buf + strlen(buf), mem_group); 3129c965db44STomer Tayar } else { 3130c965db44STomer Tayar strcpy(buf, mem_group); 3131c965db44STomer Tayar } 3132c965db44STomer Tayar 3133c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, dump, "type", buf); 31347b6859fbSMintz, Yuval 3135c965db44STomer Tayar return offset; 3136c965db44STomer Tayar } 3137c965db44STomer Tayar 3138c965db44STomer Tayar /* Dumps a single GRC memory. If name is NULL, the memory is stored by address. 3139c965db44STomer Tayar * Returns the dumped size in dwords. 31407b6859fbSMintz, Yuval * The addr and len arguments are specified in dwords. 3141c965db44STomer Tayar */ 3142c965db44STomer Tayar static u32 qed_grc_dump_mem(struct qed_hwfn *p_hwfn, 3143c965db44STomer Tayar struct qed_ptt *p_ptt, 3144c965db44STomer Tayar u32 *dump_buf, 3145c965db44STomer Tayar bool dump, 3146c965db44STomer Tayar const char *name, 3147be086e7cSMintz, Yuval u32 addr, 3148be086e7cSMintz, Yuval u32 len, 31497b6859fbSMintz, Yuval bool wide_bus, 3150c965db44STomer Tayar u32 bit_width, 3151c965db44STomer Tayar bool packed, 3152c965db44STomer Tayar const char *mem_group, 3153c965db44STomer Tayar bool is_storm, char storm_letter) 3154c965db44STomer Tayar { 3155c965db44STomer Tayar u32 offset = 0; 3156c965db44STomer Tayar 3157c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3158c965db44STomer Tayar dump_buf + offset, 3159c965db44STomer Tayar dump, 3160c965db44STomer Tayar name, 3161be086e7cSMintz, Yuval addr, 3162be086e7cSMintz, Yuval len, 3163c965db44STomer Tayar bit_width, 3164c965db44STomer Tayar packed, 3165c965db44STomer Tayar mem_group, is_storm, storm_letter); 3166be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 3167be086e7cSMintz, Yuval p_ptt, 31687b6859fbSMintz, Yuval dump_buf + offset, 3169d52c89f1SMichal Kalderon dump, addr, len, wide_bus, 3170d52c89f1SMichal Kalderon SPLIT_TYPE_NONE, 0); 31717b6859fbSMintz, Yuval 3172c965db44STomer Tayar return offset; 3173c965db44STomer Tayar } 3174c965db44STomer Tayar 3175c965db44STomer Tayar /* Dumps GRC memories entries. Returns the dumped size in dwords. */ 3176c965db44STomer Tayar static u32 qed_grc_dump_mem_entries(struct qed_hwfn *p_hwfn, 3177c965db44STomer Tayar struct qed_ptt *p_ptt, 3178c965db44STomer Tayar struct dbg_array input_mems_arr, 3179c965db44STomer Tayar u32 *dump_buf, bool dump) 3180c965db44STomer Tayar { 3181c965db44STomer Tayar u32 i, offset = 0, input_offset = 0; 3182c965db44STomer Tayar bool mode_match = true; 3183c965db44STomer Tayar 3184c965db44STomer Tayar while (input_offset < input_mems_arr.size_in_dwords) { 3185c965db44STomer Tayar const struct dbg_dump_cond_hdr *cond_hdr; 31867b6859fbSMintz, Yuval u16 modes_buf_offset; 3187c965db44STomer Tayar u32 num_entries; 3188c965db44STomer Tayar bool eval_mode; 3189c965db44STomer Tayar 3190c965db44STomer Tayar cond_hdr = (const struct dbg_dump_cond_hdr *) 3191c965db44STomer Tayar &input_mems_arr.ptr[input_offset++]; 31927b6859fbSMintz, Yuval num_entries = cond_hdr->data_size / MEM_DUMP_ENTRY_SIZE_DWORDS; 3193c965db44STomer Tayar 3194c965db44STomer Tayar /* Check required mode */ 31957b6859fbSMintz, Yuval eval_mode = GET_FIELD(cond_hdr->mode.data, 31967b6859fbSMintz, Yuval DBG_MODE_HDR_EVAL_MODE) > 0; 3197c965db44STomer Tayar if (eval_mode) { 31987b6859fbSMintz, Yuval modes_buf_offset = 3199c965db44STomer Tayar GET_FIELD(cond_hdr->mode.data, 3200c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 3201c965db44STomer Tayar mode_match = qed_is_mode_match(p_hwfn, 3202c965db44STomer Tayar &modes_buf_offset); 3203c965db44STomer Tayar } 3204c965db44STomer Tayar 3205c965db44STomer Tayar if (!mode_match) { 3206c965db44STomer Tayar input_offset += cond_hdr->data_size; 3207c965db44STomer Tayar continue; 3208c965db44STomer Tayar } 3209c965db44STomer Tayar 3210c965db44STomer Tayar for (i = 0; i < num_entries; 3211c965db44STomer Tayar i++, input_offset += MEM_DUMP_ENTRY_SIZE_DWORDS) { 3212c965db44STomer Tayar const struct dbg_dump_mem *mem = 3213c965db44STomer Tayar (const struct dbg_dump_mem *) 3214c965db44STomer Tayar &input_mems_arr.ptr[input_offset]; 32157b6859fbSMintz, Yuval u8 mem_group_id = GET_FIELD(mem->dword0, 3216c965db44STomer Tayar DBG_DUMP_MEM_MEM_GROUP_ID); 32177b6859fbSMintz, Yuval bool is_storm = false, mem_wide_bus; 32187b6859fbSMintz, Yuval enum dbg_grc_params grc_param; 32197b6859fbSMintz, Yuval char storm_letter = 'a'; 32207b6859fbSMintz, Yuval enum block_id block_id; 32217b6859fbSMintz, Yuval u32 mem_addr, mem_len; 32227b6859fbSMintz, Yuval 3223c965db44STomer Tayar if (mem_group_id >= MEM_GROUPS_NUM) { 3224c965db44STomer Tayar DP_NOTICE(p_hwfn, "Invalid mem_group_id\n"); 3225c965db44STomer Tayar return 0; 3226c965db44STomer Tayar } 3227c965db44STomer Tayar 32287b6859fbSMintz, Yuval block_id = (enum block_id)cond_hdr->block_id; 32297b6859fbSMintz, Yuval if (!qed_grc_is_mem_included(p_hwfn, 32307b6859fbSMintz, Yuval block_id, 32317b6859fbSMintz, Yuval mem_group_id)) 32327b6859fbSMintz, Yuval continue; 32337b6859fbSMintz, Yuval 32347b6859fbSMintz, Yuval mem_addr = GET_FIELD(mem->dword0, DBG_DUMP_MEM_ADDRESS); 32357b6859fbSMintz, Yuval mem_len = GET_FIELD(mem->dword1, DBG_DUMP_MEM_LENGTH); 32367b6859fbSMintz, Yuval mem_wide_bus = GET_FIELD(mem->dword1, 32377b6859fbSMintz, Yuval DBG_DUMP_MEM_WIDE_BUS); 3238c965db44STomer Tayar 3239c965db44STomer Tayar /* Update memory length for CCFC/TCFC memories 3240c965db44STomer Tayar * according to number of LCIDs/LTIDs. 3241c965db44STomer Tayar */ 3242be086e7cSMintz, Yuval if (mem_group_id == MEM_GROUP_CONN_CFC_MEM) { 32437b6859fbSMintz, Yuval if (mem_len % MAX_LCIDS) { 3244be086e7cSMintz, Yuval DP_NOTICE(p_hwfn, 3245be086e7cSMintz, Yuval "Invalid CCFC connection memory size\n"); 3246be086e7cSMintz, Yuval return 0; 3247be086e7cSMintz, Yuval } 3248be086e7cSMintz, Yuval 3249be086e7cSMintz, Yuval grc_param = DBG_GRC_PARAM_NUM_LCIDS; 32507b6859fbSMintz, Yuval mem_len = qed_grc_get_param(p_hwfn, grc_param) * 3251be086e7cSMintz, Yuval (mem_len / MAX_LCIDS); 32527b6859fbSMintz, Yuval } else if (mem_group_id == MEM_GROUP_TASK_CFC_MEM) { 32537b6859fbSMintz, Yuval if (mem_len % MAX_LTIDS) { 3254be086e7cSMintz, Yuval DP_NOTICE(p_hwfn, 3255be086e7cSMintz, Yuval "Invalid TCFC task memory size\n"); 3256be086e7cSMintz, Yuval return 0; 3257be086e7cSMintz, Yuval } 3258be086e7cSMintz, Yuval 3259be086e7cSMintz, Yuval grc_param = DBG_GRC_PARAM_NUM_LTIDS; 32607b6859fbSMintz, Yuval mem_len = qed_grc_get_param(p_hwfn, grc_param) * 3261be086e7cSMintz, Yuval (mem_len / MAX_LTIDS); 3262be086e7cSMintz, Yuval } 3263c965db44STomer Tayar 32647b6859fbSMintz, Yuval /* If memory is associated with Storm, update Storm 32657b6859fbSMintz, Yuval * details. 3266c965db44STomer Tayar */ 32677b6859fbSMintz, Yuval if (s_block_defs 32687b6859fbSMintz, Yuval [cond_hdr->block_id]->associated_to_storm) { 3269c965db44STomer Tayar is_storm = true; 3270c965db44STomer Tayar storm_letter = 32717b6859fbSMintz, Yuval s_storm_defs[s_block_defs 32727b6859fbSMintz, Yuval [cond_hdr->block_id]-> 3273c965db44STomer Tayar storm_id].letter; 3274c965db44STomer Tayar } 3275c965db44STomer Tayar 3276c965db44STomer Tayar /* Dump memory */ 32777b6859fbSMintz, Yuval offset += qed_grc_dump_mem(p_hwfn, 32787b6859fbSMintz, Yuval p_ptt, 32797b6859fbSMintz, Yuval dump_buf + offset, 32807b6859fbSMintz, Yuval dump, 32817b6859fbSMintz, Yuval NULL, 32827b6859fbSMintz, Yuval mem_addr, 32837b6859fbSMintz, Yuval mem_len, 32847b6859fbSMintz, Yuval mem_wide_bus, 32857b6859fbSMintz, Yuval 0, 3286c965db44STomer Tayar false, 3287c965db44STomer Tayar s_mem_group_names[mem_group_id], 32887b6859fbSMintz, Yuval is_storm, 32897b6859fbSMintz, Yuval storm_letter); 3290c965db44STomer Tayar } 3291c965db44STomer Tayar } 3292c965db44STomer Tayar 3293c965db44STomer Tayar return offset; 3294c965db44STomer Tayar } 3295c965db44STomer Tayar 3296c965db44STomer Tayar /* Dumps GRC memories according to the input array dump_mem. 3297c965db44STomer Tayar * Returns the dumped size in dwords. 3298c965db44STomer Tayar */ 3299c965db44STomer Tayar static u32 qed_grc_dump_memories(struct qed_hwfn *p_hwfn, 3300c965db44STomer Tayar struct qed_ptt *p_ptt, 3301c965db44STomer Tayar u32 *dump_buf, bool dump) 3302c965db44STomer Tayar { 3303c965db44STomer Tayar u32 offset = 0, input_offset = 0; 3304c965db44STomer Tayar 3305c965db44STomer Tayar while (input_offset < 3306c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].size_in_dwords) { 33077b6859fbSMintz, Yuval const struct dbg_dump_split_hdr *split_hdr; 33087b6859fbSMintz, Yuval struct dbg_array curr_input_mems_arr; 3309d52c89f1SMichal Kalderon enum init_split_types split_type; 33107b6859fbSMintz, Yuval u32 split_data_size; 33117b6859fbSMintz, Yuval 33127b6859fbSMintz, Yuval split_hdr = (const struct dbg_dump_split_hdr *) 3313c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].ptr[input_offset++]; 3314d52c89f1SMichal Kalderon split_type = 33157b6859fbSMintz, Yuval GET_FIELD(split_hdr->hdr, 3316c965db44STomer Tayar DBG_DUMP_SPLIT_HDR_SPLIT_TYPE_ID); 33177b6859fbSMintz, Yuval split_data_size = 33187b6859fbSMintz, Yuval GET_FIELD(split_hdr->hdr, 3319c965db44STomer Tayar DBG_DUMP_SPLIT_HDR_DATA_SIZE); 33207b6859fbSMintz, Yuval curr_input_mems_arr.ptr = 33217b6859fbSMintz, Yuval &s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].ptr[input_offset]; 33227b6859fbSMintz, Yuval curr_input_mems_arr.size_in_dwords = split_data_size; 3323c965db44STomer Tayar 3324d52c89f1SMichal Kalderon if (split_type == SPLIT_TYPE_NONE) 3325c965db44STomer Tayar offset += qed_grc_dump_mem_entries(p_hwfn, 3326c965db44STomer Tayar p_ptt, 3327c965db44STomer Tayar curr_input_mems_arr, 3328c965db44STomer Tayar dump_buf + offset, 3329c965db44STomer Tayar dump); 3330d52c89f1SMichal Kalderon else 3331c965db44STomer Tayar DP_NOTICE(p_hwfn, 3332c965db44STomer Tayar "Dumping split memories is currently not supported\n"); 3333c965db44STomer Tayar 3334c965db44STomer Tayar input_offset += split_data_size; 3335c965db44STomer Tayar } 3336c965db44STomer Tayar 3337c965db44STomer Tayar return offset; 3338c965db44STomer Tayar } 3339c965db44STomer Tayar 3340c965db44STomer Tayar /* Dumps GRC context data for the specified Storm. 3341c965db44STomer Tayar * Returns the dumped size in dwords. 33427b6859fbSMintz, Yuval * The lid_size argument is specified in quad-regs. 3343c965db44STomer Tayar */ 3344c965db44STomer Tayar static u32 qed_grc_dump_ctx_data(struct qed_hwfn *p_hwfn, 3345c965db44STomer Tayar struct qed_ptt *p_ptt, 3346c965db44STomer Tayar u32 *dump_buf, 3347c965db44STomer Tayar bool dump, 3348c965db44STomer Tayar const char *name, 3349c965db44STomer Tayar u32 num_lids, 3350c965db44STomer Tayar u32 lid_size, 3351c965db44STomer Tayar u32 rd_reg_addr, 3352c965db44STomer Tayar u8 storm_id) 3353c965db44STomer Tayar { 33547b6859fbSMintz, Yuval struct storm_defs *storm = &s_storm_defs[storm_id]; 33557b6859fbSMintz, Yuval u32 i, lid, total_size, offset = 0; 3356c965db44STomer Tayar 3357c965db44STomer Tayar if (!lid_size) 3358c965db44STomer Tayar return 0; 33597b6859fbSMintz, Yuval 3360c965db44STomer Tayar lid_size *= BYTES_IN_DWORD; 3361c965db44STomer Tayar total_size = num_lids * lid_size; 33627b6859fbSMintz, Yuval 3363c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3364c965db44STomer Tayar dump_buf + offset, 3365c965db44STomer Tayar dump, 3366c965db44STomer Tayar name, 3367c965db44STomer Tayar 0, 3368c965db44STomer Tayar total_size, 3369c965db44STomer Tayar lid_size * 32, 33707b6859fbSMintz, Yuval false, name, true, storm->letter); 33717b6859fbSMintz, Yuval 33727b6859fbSMintz, Yuval if (!dump) 33737b6859fbSMintz, Yuval return offset + total_size; 3374c965db44STomer Tayar 3375c965db44STomer Tayar /* Dump context data */ 3376c965db44STomer Tayar for (lid = 0; lid < num_lids; lid++) { 3377c965db44STomer Tayar for (i = 0; i < lid_size; i++, offset++) { 3378c965db44STomer Tayar qed_wr(p_hwfn, 33797b6859fbSMintz, Yuval p_ptt, storm->cm_ctx_wr_addr, (i << 9) | lid); 3380c965db44STomer Tayar *(dump_buf + offset) = qed_rd(p_hwfn, 33817b6859fbSMintz, Yuval p_ptt, rd_reg_addr); 3382c965db44STomer Tayar } 3383c965db44STomer Tayar } 3384c965db44STomer Tayar 3385c965db44STomer Tayar return offset; 3386c965db44STomer Tayar } 3387c965db44STomer Tayar 3388c965db44STomer Tayar /* Dumps GRC contexts. Returns the dumped size in dwords. */ 3389c965db44STomer Tayar static u32 qed_grc_dump_ctx(struct qed_hwfn *p_hwfn, 3390c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3391c965db44STomer Tayar { 33927b6859fbSMintz, Yuval enum dbg_grc_params grc_param; 3393c965db44STomer Tayar u32 offset = 0; 3394c965db44STomer Tayar u8 storm_id; 3395c965db44STomer Tayar 3396c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 33977b6859fbSMintz, Yuval struct storm_defs *storm = &s_storm_defs[storm_id]; 33987b6859fbSMintz, Yuval 3399c965db44STomer Tayar if (!qed_grc_is_storm_included(p_hwfn, 3400c965db44STomer Tayar (enum dbg_storms)storm_id)) 3401c965db44STomer Tayar continue; 3402c965db44STomer Tayar 3403c965db44STomer Tayar /* Dump Conn AG context size */ 34047b6859fbSMintz, Yuval grc_param = DBG_GRC_PARAM_NUM_LCIDS; 3405c965db44STomer Tayar offset += 3406c965db44STomer Tayar qed_grc_dump_ctx_data(p_hwfn, 3407c965db44STomer Tayar p_ptt, 3408c965db44STomer Tayar dump_buf + offset, 3409c965db44STomer Tayar dump, 3410c965db44STomer Tayar "CONN_AG_CTX", 3411c965db44STomer Tayar qed_grc_get_param(p_hwfn, 34127b6859fbSMintz, Yuval grc_param), 34137b6859fbSMintz, Yuval storm->cm_conn_ag_ctx_lid_size, 34147b6859fbSMintz, Yuval storm->cm_conn_ag_ctx_rd_addr, 3415c965db44STomer Tayar storm_id); 3416c965db44STomer Tayar 3417c965db44STomer Tayar /* Dump Conn ST context size */ 34187b6859fbSMintz, Yuval grc_param = DBG_GRC_PARAM_NUM_LCIDS; 3419c965db44STomer Tayar offset += 3420c965db44STomer Tayar qed_grc_dump_ctx_data(p_hwfn, 3421c965db44STomer Tayar p_ptt, 3422c965db44STomer Tayar dump_buf + offset, 3423c965db44STomer Tayar dump, 3424c965db44STomer Tayar "CONN_ST_CTX", 3425c965db44STomer Tayar qed_grc_get_param(p_hwfn, 34267b6859fbSMintz, Yuval grc_param), 34277b6859fbSMintz, Yuval storm->cm_conn_st_ctx_lid_size, 34287b6859fbSMintz, Yuval storm->cm_conn_st_ctx_rd_addr, 3429c965db44STomer Tayar storm_id); 3430c965db44STomer Tayar 3431c965db44STomer Tayar /* Dump Task AG context size */ 34327b6859fbSMintz, Yuval grc_param = DBG_GRC_PARAM_NUM_LTIDS; 3433c965db44STomer Tayar offset += 3434c965db44STomer Tayar qed_grc_dump_ctx_data(p_hwfn, 3435c965db44STomer Tayar p_ptt, 3436c965db44STomer Tayar dump_buf + offset, 3437c965db44STomer Tayar dump, 3438c965db44STomer Tayar "TASK_AG_CTX", 3439c965db44STomer Tayar qed_grc_get_param(p_hwfn, 34407b6859fbSMintz, Yuval grc_param), 34417b6859fbSMintz, Yuval storm->cm_task_ag_ctx_lid_size, 34427b6859fbSMintz, Yuval storm->cm_task_ag_ctx_rd_addr, 3443c965db44STomer Tayar storm_id); 3444c965db44STomer Tayar 3445c965db44STomer Tayar /* Dump Task ST context size */ 34467b6859fbSMintz, Yuval grc_param = DBG_GRC_PARAM_NUM_LTIDS; 3447c965db44STomer Tayar offset += 3448c965db44STomer Tayar qed_grc_dump_ctx_data(p_hwfn, 3449c965db44STomer Tayar p_ptt, 3450c965db44STomer Tayar dump_buf + offset, 3451c965db44STomer Tayar dump, 3452c965db44STomer Tayar "TASK_ST_CTX", 3453c965db44STomer Tayar qed_grc_get_param(p_hwfn, 34547b6859fbSMintz, Yuval grc_param), 34557b6859fbSMintz, Yuval storm->cm_task_st_ctx_lid_size, 34567b6859fbSMintz, Yuval storm->cm_task_st_ctx_rd_addr, 3457c965db44STomer Tayar storm_id); 3458c965db44STomer Tayar } 3459c965db44STomer Tayar 3460c965db44STomer Tayar return offset; 3461c965db44STomer Tayar } 3462c965db44STomer Tayar 3463c965db44STomer Tayar /* Dumps GRC IORs data. Returns the dumped size in dwords. */ 3464c965db44STomer Tayar static u32 qed_grc_dump_iors(struct qed_hwfn *p_hwfn, 3465c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3466c965db44STomer Tayar { 3467c965db44STomer Tayar char buf[10] = "IOR_SET_?"; 34687b6859fbSMintz, Yuval u32 addr, offset = 0; 3469c965db44STomer Tayar u8 storm_id, set_id; 3470c965db44STomer Tayar 3471c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 3472be086e7cSMintz, Yuval struct storm_defs *storm = &s_storm_defs[storm_id]; 3473c965db44STomer Tayar 3474be086e7cSMintz, Yuval if (!qed_grc_is_storm_included(p_hwfn, 3475be086e7cSMintz, Yuval (enum dbg_storms)storm_id)) 3476be086e7cSMintz, Yuval continue; 3477be086e7cSMintz, Yuval 3478be086e7cSMintz, Yuval for (set_id = 0; set_id < NUM_IOR_SETS; set_id++) { 34797b6859fbSMintz, Yuval addr = BYTES_TO_DWORDS(storm->sem_fast_mem_addr + 34807b6859fbSMintz, Yuval SEM_FAST_REG_STORM_REG_FILE) + 34817b6859fbSMintz, Yuval IOR_SET_OFFSET(set_id); 3482a3f72307SDenis Bolotin if (strlen(buf) > 0) 3483c965db44STomer Tayar buf[strlen(buf) - 1] = '0' + set_id; 3484c965db44STomer Tayar offset += qed_grc_dump_mem(p_hwfn, 3485c965db44STomer Tayar p_ptt, 3486c965db44STomer Tayar dump_buf + offset, 3487c965db44STomer Tayar dump, 3488c965db44STomer Tayar buf, 3489c965db44STomer Tayar addr, 3490c965db44STomer Tayar IORS_PER_SET, 34917b6859fbSMintz, Yuval false, 3492c965db44STomer Tayar 32, 3493c965db44STomer Tayar false, 3494c965db44STomer Tayar "ior", 3495c965db44STomer Tayar true, 3496be086e7cSMintz, Yuval storm->letter); 3497c965db44STomer Tayar } 3498c965db44STomer Tayar } 3499c965db44STomer Tayar 3500c965db44STomer Tayar return offset; 3501c965db44STomer Tayar } 3502c965db44STomer Tayar 3503c965db44STomer Tayar /* Dump VFC CAM. Returns the dumped size in dwords. */ 3504c965db44STomer Tayar static u32 qed_grc_dump_vfc_cam(struct qed_hwfn *p_hwfn, 3505c965db44STomer Tayar struct qed_ptt *p_ptt, 3506c965db44STomer Tayar u32 *dump_buf, bool dump, u8 storm_id) 3507c965db44STomer Tayar { 3508c965db44STomer Tayar u32 total_size = VFC_CAM_NUM_ROWS * VFC_CAM_RESP_DWORDS; 35097b6859fbSMintz, Yuval struct storm_defs *storm = &s_storm_defs[storm_id]; 3510c965db44STomer Tayar u32 cam_addr[VFC_CAM_ADDR_DWORDS] = { 0 }; 3511c965db44STomer Tayar u32 cam_cmd[VFC_CAM_CMD_DWORDS] = { 0 }; 35127b6859fbSMintz, Yuval u32 row, i, offset = 0; 3513c965db44STomer Tayar 3514c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3515c965db44STomer Tayar dump_buf + offset, 3516c965db44STomer Tayar dump, 3517c965db44STomer Tayar "vfc_cam", 3518c965db44STomer Tayar 0, 3519c965db44STomer Tayar total_size, 3520c965db44STomer Tayar 256, 35217b6859fbSMintz, Yuval false, "vfc_cam", true, storm->letter); 35227b6859fbSMintz, Yuval 35237b6859fbSMintz, Yuval if (!dump) 35247b6859fbSMintz, Yuval return offset + total_size; 35257b6859fbSMintz, Yuval 3526c965db44STomer Tayar /* Prepare CAM address */ 3527c965db44STomer Tayar SET_VAR_FIELD(cam_addr, VFC_CAM_ADDR, OP, VFC_OPCODE_CAM_RD); 35287b6859fbSMintz, Yuval 3529c965db44STomer Tayar for (row = 0; row < VFC_CAM_NUM_ROWS; 3530c965db44STomer Tayar row++, offset += VFC_CAM_RESP_DWORDS) { 3531c965db44STomer Tayar /* Write VFC CAM command */ 3532c965db44STomer Tayar SET_VAR_FIELD(cam_cmd, VFC_CAM_CMD, ROW, row); 3533c965db44STomer Tayar ARR_REG_WR(p_hwfn, 3534c965db44STomer Tayar p_ptt, 35357b6859fbSMintz, Yuval storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_DATA_WR, 3536c965db44STomer Tayar cam_cmd, VFC_CAM_CMD_DWORDS); 3537c965db44STomer Tayar 3538c965db44STomer Tayar /* Write VFC CAM address */ 3539c965db44STomer Tayar ARR_REG_WR(p_hwfn, 3540c965db44STomer Tayar p_ptt, 35417b6859fbSMintz, Yuval storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_ADDR, 3542c965db44STomer Tayar cam_addr, VFC_CAM_ADDR_DWORDS); 3543c965db44STomer Tayar 3544c965db44STomer Tayar /* Read VFC CAM read response */ 3545c965db44STomer Tayar ARR_REG_RD(p_hwfn, 3546c965db44STomer Tayar p_ptt, 35477b6859fbSMintz, Yuval storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_DATA_RD, 3548c965db44STomer Tayar dump_buf + offset, VFC_CAM_RESP_DWORDS); 3549c965db44STomer Tayar } 3550c965db44STomer Tayar 3551c965db44STomer Tayar return offset; 3552c965db44STomer Tayar } 3553c965db44STomer Tayar 3554c965db44STomer Tayar /* Dump VFC RAM. Returns the dumped size in dwords. */ 3555c965db44STomer Tayar static u32 qed_grc_dump_vfc_ram(struct qed_hwfn *p_hwfn, 3556c965db44STomer Tayar struct qed_ptt *p_ptt, 3557c965db44STomer Tayar u32 *dump_buf, 3558c965db44STomer Tayar bool dump, 3559c965db44STomer Tayar u8 storm_id, struct vfc_ram_defs *ram_defs) 3560c965db44STomer Tayar { 3561c965db44STomer Tayar u32 total_size = ram_defs->num_rows * VFC_RAM_RESP_DWORDS; 35627b6859fbSMintz, Yuval struct storm_defs *storm = &s_storm_defs[storm_id]; 3563c965db44STomer Tayar u32 ram_addr[VFC_RAM_ADDR_DWORDS] = { 0 }; 3564c965db44STomer Tayar u32 ram_cmd[VFC_RAM_CMD_DWORDS] = { 0 }; 35657b6859fbSMintz, Yuval u32 row, i, offset = 0; 3566c965db44STomer Tayar 3567c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3568c965db44STomer Tayar dump_buf + offset, 3569c965db44STomer Tayar dump, 3570c965db44STomer Tayar ram_defs->mem_name, 3571c965db44STomer Tayar 0, 3572c965db44STomer Tayar total_size, 3573c965db44STomer Tayar 256, 3574c965db44STomer Tayar false, 3575c965db44STomer Tayar ram_defs->type_name, 35767b6859fbSMintz, Yuval true, storm->letter); 3577c965db44STomer Tayar 3578c965db44STomer Tayar /* Prepare RAM address */ 3579c965db44STomer Tayar SET_VAR_FIELD(ram_addr, VFC_RAM_ADDR, OP, VFC_OPCODE_RAM_RD); 3580c965db44STomer Tayar 3581c965db44STomer Tayar if (!dump) 3582c965db44STomer Tayar return offset + total_size; 3583c965db44STomer Tayar 3584c965db44STomer Tayar for (row = ram_defs->base_row; 3585c965db44STomer Tayar row < ram_defs->base_row + ram_defs->num_rows; 3586c965db44STomer Tayar row++, offset += VFC_RAM_RESP_DWORDS) { 3587c965db44STomer Tayar /* Write VFC RAM command */ 3588c965db44STomer Tayar ARR_REG_WR(p_hwfn, 3589c965db44STomer Tayar p_ptt, 35907b6859fbSMintz, Yuval storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_DATA_WR, 3591c965db44STomer Tayar ram_cmd, VFC_RAM_CMD_DWORDS); 3592c965db44STomer Tayar 3593c965db44STomer Tayar /* Write VFC RAM address */ 3594c965db44STomer Tayar SET_VAR_FIELD(ram_addr, VFC_RAM_ADDR, ROW, row); 3595c965db44STomer Tayar ARR_REG_WR(p_hwfn, 3596c965db44STomer Tayar p_ptt, 35977b6859fbSMintz, Yuval storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_ADDR, 3598c965db44STomer Tayar ram_addr, VFC_RAM_ADDR_DWORDS); 3599c965db44STomer Tayar 3600c965db44STomer Tayar /* Read VFC RAM read response */ 3601c965db44STomer Tayar ARR_REG_RD(p_hwfn, 3602c965db44STomer Tayar p_ptt, 36037b6859fbSMintz, Yuval storm->sem_fast_mem_addr + SEM_FAST_REG_VFC_DATA_RD, 3604c965db44STomer Tayar dump_buf + offset, VFC_RAM_RESP_DWORDS); 3605c965db44STomer Tayar } 3606c965db44STomer Tayar 3607c965db44STomer Tayar return offset; 3608c965db44STomer Tayar } 3609c965db44STomer Tayar 3610c965db44STomer Tayar /* Dumps GRC VFC data. Returns the dumped size in dwords. */ 3611c965db44STomer Tayar static u32 qed_grc_dump_vfc(struct qed_hwfn *p_hwfn, 3612c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3613c965db44STomer Tayar { 3614c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 3615c965db44STomer Tayar u8 storm_id, i; 3616c965db44STomer Tayar u32 offset = 0; 3617c965db44STomer Tayar 3618c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 36197b6859fbSMintz, Yuval if (!qed_grc_is_storm_included(p_hwfn, 36207b6859fbSMintz, Yuval (enum dbg_storms)storm_id) || 36217b6859fbSMintz, Yuval !s_storm_defs[storm_id].has_vfc || 36227b6859fbSMintz, Yuval (storm_id == DBG_PSTORM_ID && dev_data->platform_id != 36237b6859fbSMintz, Yuval PLATFORM_ASIC)) 36247b6859fbSMintz, Yuval continue; 36257b6859fbSMintz, Yuval 3626c965db44STomer Tayar /* Read CAM */ 3627c965db44STomer Tayar offset += qed_grc_dump_vfc_cam(p_hwfn, 3628c965db44STomer Tayar p_ptt, 3629c965db44STomer Tayar dump_buf + offset, 3630c965db44STomer Tayar dump, storm_id); 3631c965db44STomer Tayar 3632c965db44STomer Tayar /* Read RAM */ 3633c965db44STomer Tayar for (i = 0; i < NUM_VFC_RAM_TYPES; i++) 3634c965db44STomer Tayar offset += qed_grc_dump_vfc_ram(p_hwfn, 3635c965db44STomer Tayar p_ptt, 36367b6859fbSMintz, Yuval dump_buf + offset, 3637c965db44STomer Tayar dump, 3638c965db44STomer Tayar storm_id, 36397b6859fbSMintz, Yuval &s_vfc_ram_defs[i]); 3640c965db44STomer Tayar } 3641c965db44STomer Tayar 3642c965db44STomer Tayar return offset; 3643c965db44STomer Tayar } 3644c965db44STomer Tayar 3645c965db44STomer Tayar /* Dumps GRC RSS data. Returns the dumped size in dwords. */ 3646c965db44STomer Tayar static u32 qed_grc_dump_rss(struct qed_hwfn *p_hwfn, 3647c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3648c965db44STomer Tayar { 3649c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 3650c965db44STomer Tayar u32 offset = 0; 3651c965db44STomer Tayar u8 rss_mem_id; 3652c965db44STomer Tayar 3653c965db44STomer Tayar for (rss_mem_id = 0; rss_mem_id < NUM_RSS_MEM_TYPES; rss_mem_id++) { 3654da090917STomer Tayar u32 rss_addr, num_entries, total_dwords; 36557b6859fbSMintz, Yuval struct rss_mem_defs *rss_defs; 3656da090917STomer Tayar u32 addr, num_dwords_to_read; 36577b6859fbSMintz, Yuval bool packed; 36587b6859fbSMintz, Yuval 36597b6859fbSMintz, Yuval rss_defs = &s_rss_mem_defs[rss_mem_id]; 36607b6859fbSMintz, Yuval rss_addr = rss_defs->addr; 36617b6859fbSMintz, Yuval num_entries = rss_defs->num_entries[dev_data->chip_id]; 3662da090917STomer Tayar total_dwords = (num_entries * rss_defs->entry_width) / 32; 3663da090917STomer Tayar packed = (rss_defs->entry_width == 16); 3664c965db44STomer Tayar 3665c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3666c965db44STomer Tayar dump_buf + offset, 3667c965db44STomer Tayar dump, 3668c965db44STomer Tayar rss_defs->mem_name, 3669be086e7cSMintz, Yuval 0, 3670be086e7cSMintz, Yuval total_dwords, 3671da090917STomer Tayar rss_defs->entry_width, 3672c965db44STomer Tayar packed, 3673c965db44STomer Tayar rss_defs->type_name, false, 0); 3674c965db44STomer Tayar 36757b6859fbSMintz, Yuval /* Dump RSS data */ 3676c965db44STomer Tayar if (!dump) { 3677be086e7cSMintz, Yuval offset += total_dwords; 3678c965db44STomer Tayar continue; 3679c965db44STomer Tayar } 3680c965db44STomer Tayar 3681be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(RSS_REG_RSS_RAM_DATA); 3682da090917STomer Tayar while (total_dwords) { 3683da090917STomer Tayar num_dwords_to_read = min_t(u32, 3684da090917STomer Tayar RSS_REG_RSS_RAM_DATA_SIZE, 3685da090917STomer Tayar total_dwords); 3686be086e7cSMintz, Yuval qed_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_ADDR, rss_addr); 3687be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 3688be086e7cSMintz, Yuval p_ptt, 36897b6859fbSMintz, Yuval dump_buf + offset, 3690be086e7cSMintz, Yuval dump, 3691be086e7cSMintz, Yuval addr, 3692da090917STomer Tayar num_dwords_to_read, 3693d52c89f1SMichal Kalderon false, 3694d52c89f1SMichal Kalderon SPLIT_TYPE_NONE, 0); 3695da090917STomer Tayar total_dwords -= num_dwords_to_read; 3696da090917STomer Tayar rss_addr++; 3697c965db44STomer Tayar } 3698c965db44STomer Tayar } 3699c965db44STomer Tayar 3700c965db44STomer Tayar return offset; 3701c965db44STomer Tayar } 3702c965db44STomer Tayar 3703c965db44STomer Tayar /* Dumps GRC Big RAM. Returns the dumped size in dwords. */ 3704c965db44STomer Tayar static u32 qed_grc_dump_big_ram(struct qed_hwfn *p_hwfn, 3705c965db44STomer Tayar struct qed_ptt *p_ptt, 3706c965db44STomer Tayar u32 *dump_buf, bool dump, u8 big_ram_id) 3707c965db44STomer Tayar { 3708c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 3709da090917STomer Tayar u32 block_size, ram_size, offset = 0, reg_val, i; 3710c965db44STomer Tayar char mem_name[12] = "???_BIG_RAM"; 3711c965db44STomer Tayar char type_name[8] = "???_RAM"; 3712be086e7cSMintz, Yuval struct big_ram_defs *big_ram; 3713c965db44STomer Tayar 3714be086e7cSMintz, Yuval big_ram = &s_big_ram_defs[big_ram_id]; 3715da090917STomer Tayar ram_size = big_ram->ram_size[dev_data->chip_id]; 3716da090917STomer Tayar 3717da090917STomer Tayar reg_val = qed_rd(p_hwfn, p_ptt, big_ram->is_256b_reg_addr); 3718da090917STomer Tayar block_size = reg_val & 3719da090917STomer Tayar BIT(big_ram->is_256b_bit_offset[dev_data->chip_id]) ? 256 3720da090917STomer Tayar : 128; 3721c965db44STomer Tayar 3722c7d852e3SDenis Bolotin strncpy(type_name, big_ram->instance_name, BIG_RAM_NAME_LEN); 3723c7d852e3SDenis Bolotin strncpy(mem_name, big_ram->instance_name, BIG_RAM_NAME_LEN); 3724c965db44STomer Tayar 3725c965db44STomer Tayar /* Dump memory header */ 3726c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3727c965db44STomer Tayar dump_buf + offset, 3728c965db44STomer Tayar dump, 3729c965db44STomer Tayar mem_name, 3730c965db44STomer Tayar 0, 3731c965db44STomer Tayar ram_size, 3732da090917STomer Tayar block_size * 8, 3733c965db44STomer Tayar false, type_name, false, 0); 3734c965db44STomer Tayar 37357b6859fbSMintz, Yuval /* Read and dump Big RAM data */ 3736c965db44STomer Tayar if (!dump) 3737c965db44STomer Tayar return offset + ram_size; 3738c965db44STomer Tayar 37397b6859fbSMintz, Yuval /* Dump Big RAM */ 3740da090917STomer Tayar for (i = 0; i < DIV_ROUND_UP(ram_size, BRB_REG_BIG_RAM_DATA_SIZE); 3741da090917STomer Tayar i++) { 3742be086e7cSMintz, Yuval u32 addr, len; 3743be086e7cSMintz, Yuval 3744be086e7cSMintz, Yuval qed_wr(p_hwfn, p_ptt, big_ram->addr_reg_addr, i); 3745be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(big_ram->data_reg_addr); 3746da090917STomer Tayar len = BRB_REG_BIG_RAM_DATA_SIZE; 3747be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 3748be086e7cSMintz, Yuval p_ptt, 3749be086e7cSMintz, Yuval dump_buf + offset, 3750be086e7cSMintz, Yuval dump, 3751be086e7cSMintz, Yuval addr, 37527b6859fbSMintz, Yuval len, 3753d52c89f1SMichal Kalderon false, SPLIT_TYPE_NONE, 0); 3754c965db44STomer Tayar } 3755c965db44STomer Tayar 3756c965db44STomer Tayar return offset; 3757c965db44STomer Tayar } 3758c965db44STomer Tayar 3759c965db44STomer Tayar static u32 qed_grc_dump_mcp(struct qed_hwfn *p_hwfn, 3760c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3761c965db44STomer Tayar { 3762c965db44STomer Tayar bool block_enable[MAX_BLOCK_ID] = { 0 }; 3763be086e7cSMintz, Yuval u32 offset = 0, addr; 3764c965db44STomer Tayar bool halted = false; 3765c965db44STomer Tayar 3766c965db44STomer Tayar /* Halt MCP */ 3767be086e7cSMintz, Yuval if (dump && !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP)) { 3768c965db44STomer Tayar halted = !qed_mcp_halt(p_hwfn, p_ptt); 3769c965db44STomer Tayar if (!halted) 3770c965db44STomer Tayar DP_NOTICE(p_hwfn, "MCP halt failed!\n"); 3771c965db44STomer Tayar } 3772c965db44STomer Tayar 3773c965db44STomer Tayar /* Dump MCP scratchpad */ 3774c965db44STomer Tayar offset += qed_grc_dump_mem(p_hwfn, 3775c965db44STomer Tayar p_ptt, 3776c965db44STomer Tayar dump_buf + offset, 3777c965db44STomer Tayar dump, 3778c965db44STomer Tayar NULL, 3779be086e7cSMintz, Yuval BYTES_TO_DWORDS(MCP_REG_SCRATCH), 378021dd79e8STomer Tayar MCP_REG_SCRATCH_SIZE_BB_K2, 37817b6859fbSMintz, Yuval false, 0, false, "MCP", false, 0); 3782c965db44STomer Tayar 3783c965db44STomer Tayar /* Dump MCP cpu_reg_file */ 3784c965db44STomer Tayar offset += qed_grc_dump_mem(p_hwfn, 3785c965db44STomer Tayar p_ptt, 3786c965db44STomer Tayar dump_buf + offset, 3787c965db44STomer Tayar dump, 3788c965db44STomer Tayar NULL, 3789be086e7cSMintz, Yuval BYTES_TO_DWORDS(MCP_REG_CPU_REG_FILE), 3790c965db44STomer Tayar MCP_REG_CPU_REG_FILE_SIZE, 37917b6859fbSMintz, Yuval false, 0, false, "MCP", false, 0); 3792c965db44STomer Tayar 3793c965db44STomer Tayar /* Dump MCP registers */ 3794c965db44STomer Tayar block_enable[BLOCK_MCP] = true; 3795c965db44STomer Tayar offset += qed_grc_dump_registers(p_hwfn, 3796c965db44STomer Tayar p_ptt, 3797c965db44STomer Tayar dump_buf + offset, 3798c965db44STomer Tayar dump, block_enable, "block", "MCP"); 3799c965db44STomer Tayar 3800c965db44STomer Tayar /* Dump required non-MCP registers */ 3801c965db44STomer Tayar offset += qed_grc_dump_regs_hdr(dump_buf + offset, 3802d52c89f1SMichal Kalderon dump, 1, SPLIT_TYPE_NONE, 0, 3803d52c89f1SMichal Kalderon "block", "MCP"); 3804be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(MISC_REG_SHARED_MEM_ADDR); 3805c965db44STomer Tayar offset += qed_grc_dump_reg_entry(p_hwfn, 3806c965db44STomer Tayar p_ptt, 3807c965db44STomer Tayar dump_buf + offset, 3808c965db44STomer Tayar dump, 3809be086e7cSMintz, Yuval addr, 38107b6859fbSMintz, Yuval 1, 3811d52c89f1SMichal Kalderon false, SPLIT_TYPE_NONE, 0); 3812c965db44STomer Tayar 3813c965db44STomer Tayar /* Release MCP */ 3814c965db44STomer Tayar if (halted && qed_mcp_resume(p_hwfn, p_ptt)) 3815c965db44STomer Tayar DP_NOTICE(p_hwfn, "Failed to resume MCP after halt!\n"); 38167b6859fbSMintz, Yuval 3817c965db44STomer Tayar return offset; 3818c965db44STomer Tayar } 3819c965db44STomer Tayar 3820c965db44STomer Tayar /* Dumps the tbus indirect memory for all PHYs. */ 3821c965db44STomer Tayar static u32 qed_grc_dump_phy(struct qed_hwfn *p_hwfn, 3822c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 3823c965db44STomer Tayar { 3824c965db44STomer Tayar u32 offset = 0, tbus_lo_offset, tbus_hi_offset; 3825c965db44STomer Tayar char mem_name[32]; 3826c965db44STomer Tayar u8 phy_id; 3827c965db44STomer Tayar 3828c965db44STomer Tayar for (phy_id = 0; phy_id < ARRAY_SIZE(s_phy_defs); phy_id++) { 38297b6859fbSMintz, Yuval u32 addr_lo_addr, addr_hi_addr, data_lo_addr, data_hi_addr; 38307b6859fbSMintz, Yuval struct phy_defs *phy_defs; 38317b6859fbSMintz, Yuval u8 *bytes_buf; 3832c965db44STomer Tayar 38337b6859fbSMintz, Yuval phy_defs = &s_phy_defs[phy_id]; 38347b6859fbSMintz, Yuval addr_lo_addr = phy_defs->base_addr + 38357b6859fbSMintz, Yuval phy_defs->tbus_addr_lo_addr; 38367b6859fbSMintz, Yuval addr_hi_addr = phy_defs->base_addr + 38377b6859fbSMintz, Yuval phy_defs->tbus_addr_hi_addr; 38387b6859fbSMintz, Yuval data_lo_addr = phy_defs->base_addr + 38397b6859fbSMintz, Yuval phy_defs->tbus_data_lo_addr; 38407b6859fbSMintz, Yuval data_hi_addr = phy_defs->base_addr + 38417b6859fbSMintz, Yuval phy_defs->tbus_data_hi_addr; 38427b6859fbSMintz, Yuval 38437b6859fbSMintz, Yuval if (snprintf(mem_name, sizeof(mem_name), "tbus_%s", 38447b6859fbSMintz, Yuval phy_defs->phy_name) < 0) 3845c965db44STomer Tayar DP_NOTICE(p_hwfn, 3846c965db44STomer Tayar "Unexpected debug error: invalid PHY memory name\n"); 38477b6859fbSMintz, Yuval 3848c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3849c965db44STomer Tayar dump_buf + offset, 3850c965db44STomer Tayar dump, 3851c965db44STomer Tayar mem_name, 3852c965db44STomer Tayar 0, 3853c965db44STomer Tayar PHY_DUMP_SIZE_DWORDS, 3854c965db44STomer Tayar 16, true, mem_name, false, 0); 38557b6859fbSMintz, Yuval 38567b6859fbSMintz, Yuval if (!dump) { 38577b6859fbSMintz, Yuval offset += PHY_DUMP_SIZE_DWORDS; 38587b6859fbSMintz, Yuval continue; 38597b6859fbSMintz, Yuval } 3860c965db44STomer Tayar 3861da090917STomer Tayar bytes_buf = (u8 *)(dump_buf + offset); 3862c965db44STomer Tayar for (tbus_hi_offset = 0; 3863c965db44STomer Tayar tbus_hi_offset < (NUM_PHY_TBUS_ADDRESSES >> 8); 3864c965db44STomer Tayar tbus_hi_offset++) { 38657b6859fbSMintz, Yuval qed_wr(p_hwfn, p_ptt, addr_hi_addr, tbus_hi_offset); 3866c965db44STomer Tayar for (tbus_lo_offset = 0; tbus_lo_offset < 256; 3867c965db44STomer Tayar tbus_lo_offset++) { 3868c965db44STomer Tayar qed_wr(p_hwfn, 38697b6859fbSMintz, Yuval p_ptt, addr_lo_addr, tbus_lo_offset); 38707b6859fbSMintz, Yuval *(bytes_buf++) = (u8)qed_rd(p_hwfn, 3871c965db44STomer Tayar p_ptt, 3872c965db44STomer Tayar data_lo_addr); 38737b6859fbSMintz, Yuval *(bytes_buf++) = (u8)qed_rd(p_hwfn, 38747b6859fbSMintz, Yuval p_ptt, 3875c965db44STomer Tayar data_hi_addr); 3876c965db44STomer Tayar } 3877c965db44STomer Tayar } 3878c965db44STomer Tayar 3879c965db44STomer Tayar offset += PHY_DUMP_SIZE_DWORDS; 3880c965db44STomer Tayar } 3881c965db44STomer Tayar 3882c965db44STomer Tayar return offset; 3883c965db44STomer Tayar } 3884c965db44STomer Tayar 3885c965db44STomer Tayar static void qed_config_dbg_line(struct qed_hwfn *p_hwfn, 3886c965db44STomer Tayar struct qed_ptt *p_ptt, 3887c965db44STomer Tayar enum block_id block_id, 3888c965db44STomer Tayar u8 line_id, 38897b6859fbSMintz, Yuval u8 enable_mask, 38907b6859fbSMintz, Yuval u8 right_shift, 38917b6859fbSMintz, Yuval u8 force_valid_mask, u8 force_frame_mask) 3892c965db44STomer Tayar { 38937b6859fbSMintz, Yuval struct block_defs *block = s_block_defs[block_id]; 3894c965db44STomer Tayar 38957b6859fbSMintz, Yuval qed_wr(p_hwfn, p_ptt, block->dbg_select_addr, line_id); 38967b6859fbSMintz, Yuval qed_wr(p_hwfn, p_ptt, block->dbg_enable_addr, enable_mask); 38977b6859fbSMintz, Yuval qed_wr(p_hwfn, p_ptt, block->dbg_shift_addr, right_shift); 38987b6859fbSMintz, Yuval qed_wr(p_hwfn, p_ptt, block->dbg_force_valid_addr, force_valid_mask); 38997b6859fbSMintz, Yuval qed_wr(p_hwfn, p_ptt, block->dbg_force_frame_addr, force_frame_mask); 3900c965db44STomer Tayar } 3901c965db44STomer Tayar 3902c965db44STomer Tayar /* Dumps Static Debug data. Returns the dumped size in dwords. */ 3903c965db44STomer Tayar static u32 qed_grc_dump_static_debug(struct qed_hwfn *p_hwfn, 3904c965db44STomer Tayar struct qed_ptt *p_ptt, 3905c965db44STomer Tayar u32 *dump_buf, bool dump) 3906c965db44STomer Tayar { 3907c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 39087b6859fbSMintz, Yuval u32 block_id, line_id, offset = 0; 39097b6859fbSMintz, Yuval 3910da090917STomer Tayar /* Don't dump static debug if a debug bus recording is in progress */ 3911da090917STomer Tayar if (dump && qed_rd(p_hwfn, p_ptt, DBG_REG_DBG_BLOCK_ON)) 39127b6859fbSMintz, Yuval return 0; 3913c965db44STomer Tayar 3914c965db44STomer Tayar if (dump) { 3915c965db44STomer Tayar /* Disable all blocks debug output */ 3916c965db44STomer Tayar for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { 39177b6859fbSMintz, Yuval struct block_defs *block = s_block_defs[block_id]; 3918c965db44STomer Tayar 3919da090917STomer Tayar if (block->dbg_client_id[dev_data->chip_id] != 3920da090917STomer Tayar MAX_DBG_BUS_CLIENTS) 39217b6859fbSMintz, Yuval qed_wr(p_hwfn, p_ptt, block->dbg_enable_addr, 39227b6859fbSMintz, Yuval 0); 3923c965db44STomer Tayar } 3924c965db44STomer Tayar 3925c965db44STomer Tayar qed_bus_reset_dbg_block(p_hwfn, p_ptt); 3926c965db44STomer Tayar qed_bus_set_framing_mode(p_hwfn, 3927c965db44STomer Tayar p_ptt, DBG_BUS_FRAME_MODE_8HW_0ST); 3928c965db44STomer Tayar qed_wr(p_hwfn, 3929c965db44STomer Tayar p_ptt, DBG_REG_DEBUG_TARGET, DBG_BUS_TARGET_ID_INT_BUF); 3930c965db44STomer Tayar qed_wr(p_hwfn, p_ptt, DBG_REG_FULL_MODE, 1); 3931c965db44STomer Tayar qed_bus_enable_dbg_block(p_hwfn, p_ptt, true); 3932c965db44STomer Tayar } 3933c965db44STomer Tayar 3934c965db44STomer Tayar /* Dump all static debug lines for each relevant block */ 3935c965db44STomer Tayar for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { 39367b6859fbSMintz, Yuval struct block_defs *block = s_block_defs[block_id]; 39377b6859fbSMintz, Yuval struct dbg_bus_block *block_desc; 39387b6859fbSMintz, Yuval u32 block_dwords, addr, len; 39397b6859fbSMintz, Yuval u8 dbg_client_id; 3940c965db44STomer Tayar 3941da090917STomer Tayar if (block->dbg_client_id[dev_data->chip_id] == 3942da090917STomer Tayar MAX_DBG_BUS_CLIENTS) 3943c965db44STomer Tayar continue; 3944c965db44STomer Tayar 3945da090917STomer Tayar block_desc = get_dbg_bus_block_desc(p_hwfn, 39467b6859fbSMintz, Yuval (enum block_id)block_id); 39477b6859fbSMintz, Yuval block_dwords = NUM_DBG_LINES(block_desc) * 39487b6859fbSMintz, Yuval STATIC_DEBUG_LINE_DWORDS; 39497b6859fbSMintz, Yuval 3950c965db44STomer Tayar /* Dump static section params */ 3951c965db44STomer Tayar offset += qed_grc_dump_mem_hdr(p_hwfn, 3952c965db44STomer Tayar dump_buf + offset, 3953c965db44STomer Tayar dump, 39547b6859fbSMintz, Yuval block->name, 39557b6859fbSMintz, Yuval 0, 39567b6859fbSMintz, Yuval block_dwords, 39577b6859fbSMintz, Yuval 32, false, "STATIC", false, 0); 3958c965db44STomer Tayar 39597b6859fbSMintz, Yuval if (!dump) { 39607b6859fbSMintz, Yuval offset += block_dwords; 39617b6859fbSMintz, Yuval continue; 39627b6859fbSMintz, Yuval } 39637b6859fbSMintz, Yuval 39647b6859fbSMintz, Yuval /* If all lines are invalid - dump zeros */ 39657b6859fbSMintz, Yuval if (dev_data->block_in_reset[block_id]) { 39667b6859fbSMintz, Yuval memset(dump_buf + offset, 0, 39677b6859fbSMintz, Yuval DWORDS_TO_BYTES(block_dwords)); 39687b6859fbSMintz, Yuval offset += block_dwords; 39697b6859fbSMintz, Yuval continue; 39707b6859fbSMintz, Yuval } 3971c965db44STomer Tayar 3972c965db44STomer Tayar /* Enable block's client */ 39737b6859fbSMintz, Yuval dbg_client_id = block->dbg_client_id[dev_data->chip_id]; 39747b6859fbSMintz, Yuval qed_bus_enable_clients(p_hwfn, 39757b6859fbSMintz, Yuval p_ptt, 3976c965db44STomer Tayar BIT(dbg_client_id)); 3977c965db44STomer Tayar 39787b6859fbSMintz, Yuval addr = BYTES_TO_DWORDS(DBG_REG_CALENDAR_OUT_DATA); 39797b6859fbSMintz, Yuval len = STATIC_DEBUG_LINE_DWORDS; 39807b6859fbSMintz, Yuval for (line_id = 0; line_id < (u32)NUM_DBG_LINES(block_desc); 3981c965db44STomer Tayar line_id++) { 3982c965db44STomer Tayar /* Configure debug line ID */ 3983c965db44STomer Tayar qed_config_dbg_line(p_hwfn, 3984c965db44STomer Tayar p_ptt, 3985c965db44STomer Tayar (enum block_id)block_id, 39867b6859fbSMintz, Yuval (u8)line_id, 0xf, 0, 0, 0); 3987c965db44STomer Tayar 3988c965db44STomer Tayar /* Read debug line info */ 39897b6859fbSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 3990be086e7cSMintz, Yuval p_ptt, 3991be086e7cSMintz, Yuval dump_buf + offset, 3992be086e7cSMintz, Yuval dump, 3993be086e7cSMintz, Yuval addr, 39947b6859fbSMintz, Yuval len, 3995d52c89f1SMichal Kalderon true, SPLIT_TYPE_NONE, 3996d52c89f1SMichal Kalderon 0); 3997c965db44STomer Tayar } 3998c965db44STomer Tayar 3999c965db44STomer Tayar /* Disable block's client and debug output */ 4000c965db44STomer Tayar qed_bus_enable_clients(p_hwfn, p_ptt, 0); 40017b6859fbSMintz, Yuval qed_wr(p_hwfn, p_ptt, block->dbg_enable_addr, 0); 4002c965db44STomer Tayar } 4003c965db44STomer Tayar 4004c965db44STomer Tayar if (dump) { 4005c965db44STomer Tayar qed_bus_enable_dbg_block(p_hwfn, p_ptt, false); 4006c965db44STomer Tayar qed_bus_enable_clients(p_hwfn, p_ptt, 0); 4007c965db44STomer Tayar } 4008c965db44STomer Tayar 4009c965db44STomer Tayar return offset; 4010c965db44STomer Tayar } 4011c965db44STomer Tayar 4012c965db44STomer Tayar /* Performs GRC Dump to the specified buffer. 4013c965db44STomer Tayar * Returns the dumped size in dwords. 4014c965db44STomer Tayar */ 4015c965db44STomer Tayar static enum dbg_status qed_grc_dump(struct qed_hwfn *p_hwfn, 4016c965db44STomer Tayar struct qed_ptt *p_ptt, 4017c965db44STomer Tayar u32 *dump_buf, 4018c965db44STomer Tayar bool dump, u32 *num_dumped_dwords) 4019c965db44STomer Tayar { 4020c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 4021c965db44STomer Tayar bool parities_masked = false; 4022c965db44STomer Tayar u32 offset = 0; 4023d52c89f1SMichal Kalderon u8 i; 4024c965db44STomer Tayar 4025c965db44STomer Tayar *num_dumped_dwords = 0; 4026d52c89f1SMichal Kalderon dev_data->num_regs_read = 0; 4027c965db44STomer Tayar 4028c965db44STomer Tayar /* Update reset state */ 4029d52c89f1SMichal Kalderon if (dump) 4030c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 4031c965db44STomer Tayar 4032c965db44STomer Tayar /* Dump global params */ 4033c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4034c965db44STomer Tayar p_ptt, 4035c965db44STomer Tayar dump_buf + offset, dump, 4); 4036c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4037c965db44STomer Tayar dump, "dump-type", "grc-dump"); 4038c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 4039c965db44STomer Tayar dump, 4040c965db44STomer Tayar "num-lcids", 4041c965db44STomer Tayar qed_grc_get_param(p_hwfn, 4042c965db44STomer Tayar DBG_GRC_PARAM_NUM_LCIDS)); 4043c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 4044c965db44STomer Tayar dump, 4045c965db44STomer Tayar "num-ltids", 4046c965db44STomer Tayar qed_grc_get_param(p_hwfn, 4047c965db44STomer Tayar DBG_GRC_PARAM_NUM_LTIDS)); 4048c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 4049d52c89f1SMichal Kalderon dump, "num-ports", dev_data->num_ports); 4050c965db44STomer Tayar 4051c965db44STomer Tayar /* Dump reset registers (dumped before taking blocks out of reset ) */ 4052c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_REGS)) 4053c965db44STomer Tayar offset += qed_grc_dump_reset_regs(p_hwfn, 4054c965db44STomer Tayar p_ptt, 4055c965db44STomer Tayar dump_buf + offset, dump); 4056c965db44STomer Tayar 4057c965db44STomer Tayar /* Take all blocks out of reset (using reset registers) */ 4058c965db44STomer Tayar if (dump) { 4059c965db44STomer Tayar qed_grc_unreset_blocks(p_hwfn, p_ptt); 4060c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 4061c965db44STomer Tayar } 4062c965db44STomer Tayar 4063c965db44STomer Tayar /* Disable all parities using MFW command */ 40647b6859fbSMintz, Yuval if (dump && 40657b6859fbSMintz, Yuval !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP)) { 4066c965db44STomer Tayar parities_masked = !qed_mcp_mask_parities(p_hwfn, p_ptt, 1); 4067c965db44STomer Tayar if (!parities_masked) { 4068be086e7cSMintz, Yuval DP_NOTICE(p_hwfn, 4069be086e7cSMintz, Yuval "Failed to mask parities using MFW\n"); 4070c965db44STomer Tayar if (qed_grc_get_param 4071c965db44STomer Tayar (p_hwfn, DBG_GRC_PARAM_PARITY_SAFE)) 4072c965db44STomer Tayar return DBG_STATUS_MCP_COULD_NOT_MASK_PRTY; 4073c965db44STomer Tayar } 4074c965db44STomer Tayar } 4075c965db44STomer Tayar 4076c965db44STomer Tayar /* Dump modified registers (dumped before modifying them) */ 4077c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_REGS)) 4078c965db44STomer Tayar offset += qed_grc_dump_modified_regs(p_hwfn, 4079c965db44STomer Tayar p_ptt, 4080c965db44STomer Tayar dump_buf + offset, dump); 4081c965db44STomer Tayar 4082c965db44STomer Tayar /* Stall storms */ 4083c965db44STomer Tayar if (dump && 4084c965db44STomer Tayar (qed_grc_is_included(p_hwfn, 4085c965db44STomer Tayar DBG_GRC_PARAM_DUMP_IOR) || 4086c965db44STomer Tayar qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_VFC))) 4087c965db44STomer Tayar qed_grc_stall_storms(p_hwfn, p_ptt, true); 4088c965db44STomer Tayar 4089c965db44STomer Tayar /* Dump all regs */ 4090c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_REGS)) { 4091c965db44STomer Tayar bool block_enable[MAX_BLOCK_ID]; 4092c965db44STomer Tayar 40937b6859fbSMintz, Yuval /* Dump all blocks except MCP */ 4094c965db44STomer Tayar for (i = 0; i < MAX_BLOCK_ID; i++) 4095c965db44STomer Tayar block_enable[i] = true; 4096c965db44STomer Tayar block_enable[BLOCK_MCP] = false; 4097c965db44STomer Tayar offset += qed_grc_dump_registers(p_hwfn, 4098c965db44STomer Tayar p_ptt, 4099c965db44STomer Tayar dump_buf + 4100c965db44STomer Tayar offset, 4101c965db44STomer Tayar dump, 4102c965db44STomer Tayar block_enable, NULL, NULL); 4103be086e7cSMintz, Yuval 4104be086e7cSMintz, Yuval /* Dump special registers */ 4105be086e7cSMintz, Yuval offset += qed_grc_dump_special_regs(p_hwfn, 4106be086e7cSMintz, Yuval p_ptt, 4107be086e7cSMintz, Yuval dump_buf + offset, dump); 4108c965db44STomer Tayar } 4109c965db44STomer Tayar 4110c965db44STomer Tayar /* Dump memories */ 4111c965db44STomer Tayar offset += qed_grc_dump_memories(p_hwfn, p_ptt, dump_buf + offset, dump); 4112c965db44STomer Tayar 4113c965db44STomer Tayar /* Dump MCP */ 4114c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_MCP)) 4115c965db44STomer Tayar offset += qed_grc_dump_mcp(p_hwfn, 4116c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 4117c965db44STomer Tayar 4118c965db44STomer Tayar /* Dump context */ 4119c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_CM_CTX)) 4120c965db44STomer Tayar offset += qed_grc_dump_ctx(p_hwfn, 4121c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 4122c965db44STomer Tayar 4123c965db44STomer Tayar /* Dump RSS memories */ 4124c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_RSS)) 4125c965db44STomer Tayar offset += qed_grc_dump_rss(p_hwfn, 4126c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 4127c965db44STomer Tayar 4128c965db44STomer Tayar /* Dump Big RAM */ 4129c965db44STomer Tayar for (i = 0; i < NUM_BIG_RAM_TYPES; i++) 4130c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, s_big_ram_defs[i].grc_param)) 4131c965db44STomer Tayar offset += qed_grc_dump_big_ram(p_hwfn, 4132c965db44STomer Tayar p_ptt, 4133c965db44STomer Tayar dump_buf + offset, 4134c965db44STomer Tayar dump, i); 4135c965db44STomer Tayar 4136c965db44STomer Tayar /* Dump IORs */ 4137c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_IOR)) 4138c965db44STomer Tayar offset += qed_grc_dump_iors(p_hwfn, 4139c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 4140c965db44STomer Tayar 4141c965db44STomer Tayar /* Dump VFC */ 4142c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, DBG_GRC_PARAM_DUMP_VFC)) 4143c965db44STomer Tayar offset += qed_grc_dump_vfc(p_hwfn, 4144c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 4145c965db44STomer Tayar 4146c965db44STomer Tayar /* Dump PHY tbus */ 4147c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, 4148c965db44STomer Tayar DBG_GRC_PARAM_DUMP_PHY) && dev_data->chip_id == 4149c965db44STomer Tayar CHIP_K2 && dev_data->platform_id == PLATFORM_ASIC) 4150c965db44STomer Tayar offset += qed_grc_dump_phy(p_hwfn, 4151c965db44STomer Tayar p_ptt, dump_buf + offset, dump); 4152c965db44STomer Tayar 4153d52c89f1SMichal Kalderon /* Dump static debug data (only if not during debug bus recording) */ 4154c965db44STomer Tayar if (qed_grc_is_included(p_hwfn, 4155c965db44STomer Tayar DBG_GRC_PARAM_DUMP_STATIC) && 4156d52c89f1SMichal Kalderon (!dump || dev_data->bus.state == DBG_BUS_STATE_IDLE)) 4157c965db44STomer Tayar offset += qed_grc_dump_static_debug(p_hwfn, 4158c965db44STomer Tayar p_ptt, 4159c965db44STomer Tayar dump_buf + offset, dump); 4160c965db44STomer Tayar 4161c965db44STomer Tayar /* Dump last section */ 4162da090917STomer Tayar offset += qed_dump_last_section(dump_buf, offset, dump); 41637b6859fbSMintz, Yuval 4164c965db44STomer Tayar if (dump) { 4165c965db44STomer Tayar /* Unstall storms */ 4166c965db44STomer Tayar if (qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_UNSTALL)) 4167c965db44STomer Tayar qed_grc_stall_storms(p_hwfn, p_ptt, false); 4168c965db44STomer Tayar 4169c965db44STomer Tayar /* Clear parity status */ 4170c965db44STomer Tayar qed_grc_clear_all_prty(p_hwfn, p_ptt); 4171c965db44STomer Tayar 4172c965db44STomer Tayar /* Enable all parities using MFW command */ 4173c965db44STomer Tayar if (parities_masked) 4174c965db44STomer Tayar qed_mcp_mask_parities(p_hwfn, p_ptt, 0); 4175c965db44STomer Tayar } 4176c965db44STomer Tayar 4177c965db44STomer Tayar *num_dumped_dwords = offset; 4178c965db44STomer Tayar 4179c965db44STomer Tayar return DBG_STATUS_OK; 4180c965db44STomer Tayar } 4181c965db44STomer Tayar 4182c965db44STomer Tayar /* Writes the specified failing Idle Check rule to the specified buffer. 4183c965db44STomer Tayar * Returns the dumped size in dwords. 4184c965db44STomer Tayar */ 4185c965db44STomer Tayar static u32 qed_idle_chk_dump_failure(struct qed_hwfn *p_hwfn, 4186c965db44STomer Tayar struct qed_ptt *p_ptt, 4187c965db44STomer Tayar u32 * 4188c965db44STomer Tayar dump_buf, 4189c965db44STomer Tayar bool dump, 4190c965db44STomer Tayar u16 rule_id, 4191c965db44STomer Tayar const struct dbg_idle_chk_rule *rule, 4192c965db44STomer Tayar u16 fail_entry_id, u32 *cond_reg_values) 4193c965db44STomer Tayar { 4194c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 41957b6859fbSMintz, Yuval const struct dbg_idle_chk_cond_reg *cond_regs; 41967b6859fbSMintz, Yuval const struct dbg_idle_chk_info_reg *info_regs; 41977b6859fbSMintz, Yuval u32 i, next_reg_offset = 0, offset = 0; 41987b6859fbSMintz, Yuval struct dbg_idle_chk_result_hdr *hdr; 41997b6859fbSMintz, Yuval const union dbg_idle_chk_reg *regs; 4200c965db44STomer Tayar u8 reg_id; 4201c965db44STomer Tayar 42027b6859fbSMintz, Yuval hdr = (struct dbg_idle_chk_result_hdr *)dump_buf; 42037b6859fbSMintz, Yuval regs = &((const union dbg_idle_chk_reg *) 42047b6859fbSMintz, Yuval s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr)[rule->reg_offset]; 42057b6859fbSMintz, Yuval cond_regs = ®s[0].cond_reg; 42067b6859fbSMintz, Yuval info_regs = ®s[rule->num_cond_regs].info_reg; 42077b6859fbSMintz, Yuval 4208c965db44STomer Tayar /* Dump rule data */ 4209c965db44STomer Tayar if (dump) { 4210c965db44STomer Tayar memset(hdr, 0, sizeof(*hdr)); 4211c965db44STomer Tayar hdr->rule_id = rule_id; 4212c965db44STomer Tayar hdr->mem_entry_id = fail_entry_id; 4213c965db44STomer Tayar hdr->severity = rule->severity; 4214c965db44STomer Tayar hdr->num_dumped_cond_regs = rule->num_cond_regs; 4215c965db44STomer Tayar } 4216c965db44STomer Tayar 4217c965db44STomer Tayar offset += IDLE_CHK_RESULT_HDR_DWORDS; 4218c965db44STomer Tayar 4219c965db44STomer Tayar /* Dump condition register values */ 4220c965db44STomer Tayar for (reg_id = 0; reg_id < rule->num_cond_regs; reg_id++) { 4221c965db44STomer Tayar const struct dbg_idle_chk_cond_reg *reg = &cond_regs[reg_id]; 42227b6859fbSMintz, Yuval struct dbg_idle_chk_result_reg_hdr *reg_hdr; 42237b6859fbSMintz, Yuval 42247b6859fbSMintz, Yuval reg_hdr = (struct dbg_idle_chk_result_reg_hdr *) 42257b6859fbSMintz, Yuval (dump_buf + offset); 4226c965db44STomer Tayar 4227c965db44STomer Tayar /* Write register header */ 42287b6859fbSMintz, Yuval if (!dump) { 42297b6859fbSMintz, Yuval offset += IDLE_CHK_RESULT_REG_HDR_DWORDS + 42307b6859fbSMintz, Yuval reg->entry_size; 42317b6859fbSMintz, Yuval continue; 42327b6859fbSMintz, Yuval } 42337b6859fbSMintz, Yuval 4234c965db44STomer Tayar offset += IDLE_CHK_RESULT_REG_HDR_DWORDS; 42357b6859fbSMintz, Yuval memset(reg_hdr, 0, sizeof(*reg_hdr)); 4236c965db44STomer Tayar reg_hdr->start_entry = reg->start_entry; 4237c965db44STomer Tayar reg_hdr->size = reg->entry_size; 4238c965db44STomer Tayar SET_FIELD(reg_hdr->data, 4239c965db44STomer Tayar DBG_IDLE_CHK_RESULT_REG_HDR_IS_MEM, 42407b6859fbSMintz, Yuval reg->num_entries > 1 || reg->start_entry > 0 ? 1 : 0); 4241c965db44STomer Tayar SET_FIELD(reg_hdr->data, 4242c965db44STomer Tayar DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID, reg_id); 4243c965db44STomer Tayar 4244c965db44STomer Tayar /* Write register values */ 42457b6859fbSMintz, Yuval for (i = 0; i < reg_hdr->size; i++, next_reg_offset++, offset++) 42467b6859fbSMintz, Yuval dump_buf[offset] = cond_reg_values[next_reg_offset]; 4247c965db44STomer Tayar } 4248c965db44STomer Tayar 4249c965db44STomer Tayar /* Dump info register values */ 4250c965db44STomer Tayar for (reg_id = 0; reg_id < rule->num_info_regs; reg_id++) { 4251c965db44STomer Tayar const struct dbg_idle_chk_info_reg *reg = &info_regs[reg_id]; 4252c965db44STomer Tayar u32 block_id; 4253c965db44STomer Tayar 42547b6859fbSMintz, Yuval /* Check if register's block is in reset */ 4255c965db44STomer Tayar if (!dump) { 4256c965db44STomer Tayar offset += IDLE_CHK_RESULT_REG_HDR_DWORDS + reg->size; 4257c965db44STomer Tayar continue; 4258c965db44STomer Tayar } 4259c965db44STomer Tayar 4260c965db44STomer Tayar block_id = GET_FIELD(reg->data, DBG_IDLE_CHK_INFO_REG_BLOCK_ID); 4261c965db44STomer Tayar if (block_id >= MAX_BLOCK_ID) { 4262c965db44STomer Tayar DP_NOTICE(p_hwfn, "Invalid block_id\n"); 4263c965db44STomer Tayar return 0; 4264c965db44STomer Tayar } 4265c965db44STomer Tayar 4266c965db44STomer Tayar if (!dev_data->block_in_reset[block_id]) { 42677b6859fbSMintz, Yuval struct dbg_idle_chk_result_reg_hdr *reg_hdr; 42687b6859fbSMintz, Yuval bool wide_bus, eval_mode, mode_match = true; 42697b6859fbSMintz, Yuval u16 modes_buf_offset; 42707b6859fbSMintz, Yuval u32 addr; 42717b6859fbSMintz, Yuval 42727b6859fbSMintz, Yuval reg_hdr = (struct dbg_idle_chk_result_reg_hdr *) 42737b6859fbSMintz, Yuval (dump_buf + offset); 4274c965db44STomer Tayar 4275c965db44STomer Tayar /* Check mode */ 42767b6859fbSMintz, Yuval eval_mode = GET_FIELD(reg->mode.data, 42777b6859fbSMintz, Yuval DBG_MODE_HDR_EVAL_MODE) > 0; 4278c965db44STomer Tayar if (eval_mode) { 42797b6859fbSMintz, Yuval modes_buf_offset = 4280c965db44STomer Tayar GET_FIELD(reg->mode.data, 4281c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 4282c965db44STomer Tayar mode_match = 4283c965db44STomer Tayar qed_is_mode_match(p_hwfn, 4284c965db44STomer Tayar &modes_buf_offset); 4285c965db44STomer Tayar } 4286c965db44STomer Tayar 42877b6859fbSMintz, Yuval if (!mode_match) 42887b6859fbSMintz, Yuval continue; 42897b6859fbSMintz, Yuval 42907b6859fbSMintz, Yuval addr = GET_FIELD(reg->data, 4291be086e7cSMintz, Yuval DBG_IDLE_CHK_INFO_REG_ADDRESS); 42927b6859fbSMintz, Yuval wide_bus = GET_FIELD(reg->data, 42937b6859fbSMintz, Yuval DBG_IDLE_CHK_INFO_REG_WIDE_BUS); 4294c965db44STomer Tayar 4295c965db44STomer Tayar /* Write register header */ 4296c965db44STomer Tayar offset += IDLE_CHK_RESULT_REG_HDR_DWORDS; 4297c965db44STomer Tayar hdr->num_dumped_info_regs++; 4298c965db44STomer Tayar memset(reg_hdr, 0, sizeof(*reg_hdr)); 4299c965db44STomer Tayar reg_hdr->size = reg->size; 4300c965db44STomer Tayar SET_FIELD(reg_hdr->data, 4301c965db44STomer Tayar DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID, 4302c965db44STomer Tayar rule->num_cond_regs + reg_id); 4303c965db44STomer Tayar 4304c965db44STomer Tayar /* Write register values */ 43057b6859fbSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 4306be086e7cSMintz, Yuval p_ptt, 4307be086e7cSMintz, Yuval dump_buf + offset, 4308be086e7cSMintz, Yuval dump, 4309be086e7cSMintz, Yuval addr, 4310d52c89f1SMichal Kalderon reg->size, wide_bus, 4311d52c89f1SMichal Kalderon SPLIT_TYPE_NONE, 0); 4312c965db44STomer Tayar } 4313c965db44STomer Tayar } 4314c965db44STomer Tayar 4315c965db44STomer Tayar return offset; 4316c965db44STomer Tayar } 4317c965db44STomer Tayar 4318c965db44STomer Tayar /* Dumps idle check rule entries. Returns the dumped size in dwords. */ 4319c965db44STomer Tayar static u32 4320c965db44STomer Tayar qed_idle_chk_dump_rule_entries(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 4321c965db44STomer Tayar u32 *dump_buf, bool dump, 4322c965db44STomer Tayar const struct dbg_idle_chk_rule *input_rules, 4323c965db44STomer Tayar u32 num_input_rules, u32 *num_failing_rules) 4324c965db44STomer Tayar { 4325c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 4326c965db44STomer Tayar u32 cond_reg_values[IDLE_CHK_MAX_ENTRIES_SIZE]; 4327be086e7cSMintz, Yuval u32 i, offset = 0; 4328c965db44STomer Tayar u16 entry_id; 4329c965db44STomer Tayar u8 reg_id; 4330c965db44STomer Tayar 4331c965db44STomer Tayar *num_failing_rules = 0; 43327b6859fbSMintz, Yuval 4333c965db44STomer Tayar for (i = 0; i < num_input_rules; i++) { 4334c965db44STomer Tayar const struct dbg_idle_chk_cond_reg *cond_regs; 4335c965db44STomer Tayar const struct dbg_idle_chk_rule *rule; 4336c965db44STomer Tayar const union dbg_idle_chk_reg *regs; 4337c965db44STomer Tayar u16 num_reg_entries = 1; 4338c965db44STomer Tayar bool check_rule = true; 4339c965db44STomer Tayar const u32 *imm_values; 4340c965db44STomer Tayar 4341c965db44STomer Tayar rule = &input_rules[i]; 4342c965db44STomer Tayar regs = &((const union dbg_idle_chk_reg *) 4343c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr) 4344c965db44STomer Tayar [rule->reg_offset]; 4345c965db44STomer Tayar cond_regs = ®s[0].cond_reg; 4346c965db44STomer Tayar imm_values = &s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_IMMS].ptr 4347c965db44STomer Tayar [rule->imm_offset]; 4348c965db44STomer Tayar 4349c965db44STomer Tayar /* Check if all condition register blocks are out of reset, and 4350c965db44STomer Tayar * find maximal number of entries (all condition registers that 4351c965db44STomer Tayar * are memories must have the same size, which is > 1). 4352c965db44STomer Tayar */ 4353c965db44STomer Tayar for (reg_id = 0; reg_id < rule->num_cond_regs && check_rule; 4354c965db44STomer Tayar reg_id++) { 43557b6859fbSMintz, Yuval u32 block_id = 43567b6859fbSMintz, Yuval GET_FIELD(cond_regs[reg_id].data, 4357c965db44STomer Tayar DBG_IDLE_CHK_COND_REG_BLOCK_ID); 4358c965db44STomer Tayar 4359c965db44STomer Tayar if (block_id >= MAX_BLOCK_ID) { 4360c965db44STomer Tayar DP_NOTICE(p_hwfn, "Invalid block_id\n"); 4361c965db44STomer Tayar return 0; 4362c965db44STomer Tayar } 4363c965db44STomer Tayar 4364c965db44STomer Tayar check_rule = !dev_data->block_in_reset[block_id]; 4365c965db44STomer Tayar if (cond_regs[reg_id].num_entries > num_reg_entries) 4366c965db44STomer Tayar num_reg_entries = cond_regs[reg_id].num_entries; 4367c965db44STomer Tayar } 4368c965db44STomer Tayar 4369c965db44STomer Tayar if (!check_rule && dump) 4370c965db44STomer Tayar continue; 4371c965db44STomer Tayar 4372be086e7cSMintz, Yuval if (!dump) { 4373da090917STomer Tayar u32 entry_dump_size = 4374da090917STomer Tayar qed_idle_chk_dump_failure(p_hwfn, 4375be086e7cSMintz, Yuval p_ptt, 4376be086e7cSMintz, Yuval dump_buf + offset, 4377be086e7cSMintz, Yuval false, 4378be086e7cSMintz, Yuval rule->rule_id, 4379be086e7cSMintz, Yuval rule, 4380da090917STomer Tayar 0, 4381be086e7cSMintz, Yuval NULL); 4382da090917STomer Tayar 4383da090917STomer Tayar offset += num_reg_entries * entry_dump_size; 4384da090917STomer Tayar (*num_failing_rules) += num_reg_entries; 4385da090917STomer Tayar continue; 4386be086e7cSMintz, Yuval } 4387be086e7cSMintz, Yuval 4388da090917STomer Tayar /* Go over all register entries (number of entries is the same 4389da090917STomer Tayar * for all condition registers). 4390da090917STomer Tayar */ 4391da090917STomer Tayar for (entry_id = 0; entry_id < num_reg_entries; entry_id++) { 4392da090917STomer Tayar u32 next_reg_offset = 0; 4393da090917STomer Tayar 4394c965db44STomer Tayar /* Read current entry of all condition registers */ 4395be086e7cSMintz, Yuval for (reg_id = 0; reg_id < rule->num_cond_regs; 4396c965db44STomer Tayar reg_id++) { 4397be086e7cSMintz, Yuval const struct dbg_idle_chk_cond_reg *reg = 4398be086e7cSMintz, Yuval &cond_regs[reg_id]; 43997b6859fbSMintz, Yuval u32 padded_entry_size, addr; 44007b6859fbSMintz, Yuval bool wide_bus; 4401c965db44STomer Tayar 4402be086e7cSMintz, Yuval /* Find GRC address (if it's a memory, the 4403be086e7cSMintz, Yuval * address of the specific entry is calculated). 4404c965db44STomer Tayar */ 44057b6859fbSMintz, Yuval addr = GET_FIELD(reg->data, 4406be086e7cSMintz, Yuval DBG_IDLE_CHK_COND_REG_ADDRESS); 44077b6859fbSMintz, Yuval wide_bus = 44087b6859fbSMintz, Yuval GET_FIELD(reg->data, 44097b6859fbSMintz, Yuval DBG_IDLE_CHK_COND_REG_WIDE_BUS); 4410c965db44STomer Tayar if (reg->num_entries > 1 || 4411c965db44STomer Tayar reg->start_entry > 0) { 44127b6859fbSMintz, Yuval padded_entry_size = 4413c965db44STomer Tayar reg->entry_size > 1 ? 4414da090917STomer Tayar roundup_pow_of_two(reg->entry_size) : 4415da090917STomer Tayar 1; 4416be086e7cSMintz, Yuval addr += (reg->start_entry + entry_id) * 4417be086e7cSMintz, Yuval padded_entry_size; 4418c965db44STomer Tayar } 4419c965db44STomer Tayar 4420c965db44STomer Tayar /* Read registers */ 4421c965db44STomer Tayar if (next_reg_offset + reg->entry_size >= 4422c965db44STomer Tayar IDLE_CHK_MAX_ENTRIES_SIZE) { 4423c965db44STomer Tayar DP_NOTICE(p_hwfn, 4424c965db44STomer Tayar "idle check registers entry is too large\n"); 4425c965db44STomer Tayar return 0; 4426c965db44STomer Tayar } 4427c965db44STomer Tayar 4428be086e7cSMintz, Yuval next_reg_offset += 44297b6859fbSMintz, Yuval qed_grc_dump_addr_range(p_hwfn, p_ptt, 4430be086e7cSMintz, Yuval cond_reg_values + 4431be086e7cSMintz, Yuval next_reg_offset, 4432be086e7cSMintz, Yuval dump, addr, 44337b6859fbSMintz, Yuval reg->entry_size, 4434d52c89f1SMichal Kalderon wide_bus, 4435d52c89f1SMichal Kalderon SPLIT_TYPE_NONE, 0); 4436c965db44STomer Tayar } 4437c965db44STomer Tayar 44387b6859fbSMintz, Yuval /* Call rule condition function. 44397b6859fbSMintz, Yuval * If returns true, it's a failure. 4440c965db44STomer Tayar */ 4441c965db44STomer Tayar if ((*cond_arr[rule->cond_id]) (cond_reg_values, 4442be086e7cSMintz, Yuval imm_values)) { 44437b6859fbSMintz, Yuval offset += qed_idle_chk_dump_failure(p_hwfn, 4444c965db44STomer Tayar p_ptt, 4445c965db44STomer Tayar dump_buf + offset, 4446c965db44STomer Tayar dump, 4447c965db44STomer Tayar rule->rule_id, 4448c965db44STomer Tayar rule, 4449c965db44STomer Tayar entry_id, 4450c965db44STomer Tayar cond_reg_values); 4451c965db44STomer Tayar (*num_failing_rules)++; 4452c965db44STomer Tayar } 4453c965db44STomer Tayar } 4454c965db44STomer Tayar } 4455c965db44STomer Tayar 4456c965db44STomer Tayar return offset; 4457c965db44STomer Tayar } 4458c965db44STomer Tayar 4459c965db44STomer Tayar /* Performs Idle Check Dump to the specified buffer. 4460c965db44STomer Tayar * Returns the dumped size in dwords. 4461c965db44STomer Tayar */ 4462c965db44STomer Tayar static u32 qed_idle_chk_dump(struct qed_hwfn *p_hwfn, 4463c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 4464c965db44STomer Tayar { 44657b6859fbSMintz, Yuval u32 num_failing_rules_offset, offset = 0, input_offset = 0; 44667b6859fbSMintz, Yuval u32 num_failing_rules = 0; 4467c965db44STomer Tayar 4468c965db44STomer Tayar /* Dump global params */ 4469c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4470c965db44STomer Tayar p_ptt, 4471c965db44STomer Tayar dump_buf + offset, dump, 1); 4472c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4473c965db44STomer Tayar dump, "dump-type", "idle-chk"); 4474c965db44STomer Tayar 4475c965db44STomer Tayar /* Dump idle check section header with a single parameter */ 4476c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, dump, "idle_chk", 1); 4477c965db44STomer Tayar num_failing_rules_offset = offset; 4478c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, dump, "num_rules", 0); 44797b6859fbSMintz, Yuval 4480c965db44STomer Tayar while (input_offset < 4481c965db44STomer Tayar s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES].size_in_dwords) { 4482c965db44STomer Tayar const struct dbg_idle_chk_cond_hdr *cond_hdr = 4483c965db44STomer Tayar (const struct dbg_idle_chk_cond_hdr *) 4484c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES].ptr 4485c965db44STomer Tayar [input_offset++]; 44867b6859fbSMintz, Yuval bool eval_mode, mode_match = true; 44877b6859fbSMintz, Yuval u32 curr_failing_rules; 44887b6859fbSMintz, Yuval u16 modes_buf_offset; 4489c965db44STomer Tayar 4490c965db44STomer Tayar /* Check mode */ 44917b6859fbSMintz, Yuval eval_mode = GET_FIELD(cond_hdr->mode.data, 44927b6859fbSMintz, Yuval DBG_MODE_HDR_EVAL_MODE) > 0; 4493c965db44STomer Tayar if (eval_mode) { 44947b6859fbSMintz, Yuval modes_buf_offset = 4495c965db44STomer Tayar GET_FIELD(cond_hdr->mode.data, 4496c965db44STomer Tayar DBG_MODE_HDR_MODES_BUF_OFFSET); 4497c965db44STomer Tayar mode_match = qed_is_mode_match(p_hwfn, 4498c965db44STomer Tayar &modes_buf_offset); 4499c965db44STomer Tayar } 4500c965db44STomer Tayar 4501c965db44STomer Tayar if (mode_match) { 4502c965db44STomer Tayar offset += 4503c965db44STomer Tayar qed_idle_chk_dump_rule_entries(p_hwfn, 4504c965db44STomer Tayar p_ptt, 4505c965db44STomer Tayar dump_buf + offset, 4506c965db44STomer Tayar dump, 4507c965db44STomer Tayar (const struct dbg_idle_chk_rule *) 4508c965db44STomer Tayar &s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES]. 4509c965db44STomer Tayar ptr[input_offset], 4510c965db44STomer Tayar cond_hdr->data_size / IDLE_CHK_RULE_SIZE_DWORDS, 4511c965db44STomer Tayar &curr_failing_rules); 4512c965db44STomer Tayar num_failing_rules += curr_failing_rules; 4513c965db44STomer Tayar } 4514c965db44STomer Tayar 4515c965db44STomer Tayar input_offset += cond_hdr->data_size; 4516c965db44STomer Tayar } 4517c965db44STomer Tayar 4518c965db44STomer Tayar /* Overwrite num_rules parameter */ 4519c965db44STomer Tayar if (dump) 4520c965db44STomer Tayar qed_dump_num_param(dump_buf + num_failing_rules_offset, 4521c965db44STomer Tayar dump, "num_rules", num_failing_rules); 4522c965db44STomer Tayar 45237b6859fbSMintz, Yuval /* Dump last section */ 4524da090917STomer Tayar offset += qed_dump_last_section(dump_buf, offset, dump); 45257b6859fbSMintz, Yuval 4526c965db44STomer Tayar return offset; 4527c965db44STomer Tayar } 4528c965db44STomer Tayar 45297b6859fbSMintz, Yuval /* Finds the meta data image in NVRAM */ 4530c965db44STomer Tayar static enum dbg_status qed_find_nvram_image(struct qed_hwfn *p_hwfn, 4531c965db44STomer Tayar struct qed_ptt *p_ptt, 4532c965db44STomer Tayar u32 image_type, 4533c965db44STomer Tayar u32 *nvram_offset_bytes, 4534c965db44STomer Tayar u32 *nvram_size_bytes) 4535c965db44STomer Tayar { 4536c965db44STomer Tayar u32 ret_mcp_resp, ret_mcp_param, ret_txn_size; 4537c965db44STomer Tayar struct mcp_file_att file_att; 45387b6859fbSMintz, Yuval int nvm_result; 4539c965db44STomer Tayar 4540c965db44STomer Tayar /* Call NVRAM get file command */ 45417b6859fbSMintz, Yuval nvm_result = qed_mcp_nvm_rd_cmd(p_hwfn, 4542be086e7cSMintz, Yuval p_ptt, 4543be086e7cSMintz, Yuval DRV_MSG_CODE_NVM_GET_FILE_ATT, 4544be086e7cSMintz, Yuval image_type, 4545be086e7cSMintz, Yuval &ret_mcp_resp, 4546be086e7cSMintz, Yuval &ret_mcp_param, 45477b6859fbSMintz, Yuval &ret_txn_size, (u32 *)&file_att); 4548c965db44STomer Tayar 4549c965db44STomer Tayar /* Check response */ 4550be086e7cSMintz, Yuval if (nvm_result || 4551be086e7cSMintz, Yuval (ret_mcp_resp & FW_MSG_CODE_MASK) != FW_MSG_CODE_NVM_OK) 4552c965db44STomer Tayar return DBG_STATUS_NVRAM_GET_IMAGE_FAILED; 4553c965db44STomer Tayar 4554c965db44STomer Tayar /* Update return values */ 4555c965db44STomer Tayar *nvram_offset_bytes = file_att.nvm_start_addr; 4556c965db44STomer Tayar *nvram_size_bytes = file_att.len; 45577b6859fbSMintz, Yuval 4558c965db44STomer Tayar DP_VERBOSE(p_hwfn, 4559c965db44STomer Tayar QED_MSG_DEBUG, 4560c965db44STomer Tayar "find_nvram_image: found NVRAM image of type %d in NVRAM offset %d bytes with size %d bytes\n", 4561c965db44STomer Tayar image_type, *nvram_offset_bytes, *nvram_size_bytes); 4562c965db44STomer Tayar 4563c965db44STomer Tayar /* Check alignment */ 4564c965db44STomer Tayar if (*nvram_size_bytes & 0x3) 4565c965db44STomer Tayar return DBG_STATUS_NON_ALIGNED_NVRAM_IMAGE; 45667b6859fbSMintz, Yuval 4567c965db44STomer Tayar return DBG_STATUS_OK; 4568c965db44STomer Tayar } 4569c965db44STomer Tayar 45707b6859fbSMintz, Yuval /* Reads data from NVRAM */ 4571c965db44STomer Tayar static enum dbg_status qed_nvram_read(struct qed_hwfn *p_hwfn, 4572c965db44STomer Tayar struct qed_ptt *p_ptt, 4573c965db44STomer Tayar u32 nvram_offset_bytes, 4574c965db44STomer Tayar u32 nvram_size_bytes, u32 *ret_buf) 4575c965db44STomer Tayar { 45767b6859fbSMintz, Yuval u32 ret_mcp_resp, ret_mcp_param, ret_read_size, bytes_to_copy; 4577c965db44STomer Tayar s32 bytes_left = nvram_size_bytes; 45787b6859fbSMintz, Yuval u32 read_offset = 0; 4579c965db44STomer Tayar 4580c965db44STomer Tayar DP_VERBOSE(p_hwfn, 4581c965db44STomer Tayar QED_MSG_DEBUG, 4582c965db44STomer Tayar "nvram_read: reading image of size %d bytes from NVRAM\n", 4583c965db44STomer Tayar nvram_size_bytes); 45847b6859fbSMintz, Yuval 4585c965db44STomer Tayar do { 4586c965db44STomer Tayar bytes_to_copy = 4587c965db44STomer Tayar (bytes_left > 4588c965db44STomer Tayar MCP_DRV_NVM_BUF_LEN) ? MCP_DRV_NVM_BUF_LEN : bytes_left; 4589c965db44STomer Tayar 4590c965db44STomer Tayar /* Call NVRAM read command */ 4591c965db44STomer Tayar if (qed_mcp_nvm_rd_cmd(p_hwfn, p_ptt, 4592c965db44STomer Tayar DRV_MSG_CODE_NVM_READ_NVRAM, 4593c965db44STomer Tayar (nvram_offset_bytes + 4594c965db44STomer Tayar read_offset) | 4595c965db44STomer Tayar (bytes_to_copy << 4596da090917STomer Tayar DRV_MB_PARAM_NVM_LEN_OFFSET), 4597c965db44STomer Tayar &ret_mcp_resp, &ret_mcp_param, 4598c965db44STomer Tayar &ret_read_size, 45997b6859fbSMintz, Yuval (u32 *)((u8 *)ret_buf + read_offset))) 4600c965db44STomer Tayar return DBG_STATUS_NVRAM_READ_FAILED; 4601c965db44STomer Tayar 4602c965db44STomer Tayar /* Check response */ 4603c965db44STomer Tayar if ((ret_mcp_resp & FW_MSG_CODE_MASK) != FW_MSG_CODE_NVM_OK) 4604c965db44STomer Tayar return DBG_STATUS_NVRAM_READ_FAILED; 4605c965db44STomer Tayar 4606c965db44STomer Tayar /* Update read offset */ 4607c965db44STomer Tayar read_offset += ret_read_size; 4608c965db44STomer Tayar bytes_left -= ret_read_size; 4609c965db44STomer Tayar } while (bytes_left > 0); 4610c965db44STomer Tayar 4611c965db44STomer Tayar return DBG_STATUS_OK; 4612c965db44STomer Tayar } 4613c965db44STomer Tayar 4614c965db44STomer Tayar /* Get info on the MCP Trace data in the scratchpad: 46157b6859fbSMintz, Yuval * - trace_data_grc_addr (OUT): trace data GRC address in bytes 46167b6859fbSMintz, Yuval * - trace_data_size (OUT): trace data size in bytes (without the header) 4617c965db44STomer Tayar */ 4618c965db44STomer Tayar static enum dbg_status qed_mcp_trace_get_data_info(struct qed_hwfn *p_hwfn, 4619c965db44STomer Tayar struct qed_ptt *p_ptt, 4620c965db44STomer Tayar u32 *trace_data_grc_addr, 46217b6859fbSMintz, Yuval u32 *trace_data_size) 4622c965db44STomer Tayar { 46237b6859fbSMintz, Yuval u32 spad_trace_offsize, signature; 4624c965db44STomer Tayar 46257b6859fbSMintz, Yuval /* Read trace section offsize structure from MCP scratchpad */ 46267b6859fbSMintz, Yuval spad_trace_offsize = qed_rd(p_hwfn, p_ptt, MCP_SPAD_TRACE_OFFSIZE_ADDR); 46277b6859fbSMintz, Yuval 46287b6859fbSMintz, Yuval /* Extract trace section address from offsize (in scratchpad) */ 4629c965db44STomer Tayar *trace_data_grc_addr = 4630c965db44STomer Tayar MCP_REG_SCRATCH + SECTION_OFFSET(spad_trace_offsize); 4631c965db44STomer Tayar 4632c965db44STomer Tayar /* Read signature from MCP trace section */ 4633c965db44STomer Tayar signature = qed_rd(p_hwfn, p_ptt, 4634c965db44STomer Tayar *trace_data_grc_addr + 4635c965db44STomer Tayar offsetof(struct mcp_trace, signature)); 46367b6859fbSMintz, Yuval 4637c965db44STomer Tayar if (signature != MFW_TRACE_SIGNATURE) 4638c965db44STomer Tayar return DBG_STATUS_INVALID_TRACE_SIGNATURE; 4639c965db44STomer Tayar 4640c965db44STomer Tayar /* Read trace size from MCP trace section */ 46417b6859fbSMintz, Yuval *trace_data_size = qed_rd(p_hwfn, 4642c965db44STomer Tayar p_ptt, 4643c965db44STomer Tayar *trace_data_grc_addr + 4644c965db44STomer Tayar offsetof(struct mcp_trace, size)); 46457b6859fbSMintz, Yuval 4646c965db44STomer Tayar return DBG_STATUS_OK; 4647c965db44STomer Tayar } 4648c965db44STomer Tayar 46497b6859fbSMintz, Yuval /* Reads MCP trace meta data image from NVRAM 46507b6859fbSMintz, Yuval * - running_bundle_id (OUT): running bundle ID (invalid when loaded from file) 46517b6859fbSMintz, Yuval * - trace_meta_offset (OUT): trace meta offset in NVRAM in bytes (invalid when 46527b6859fbSMintz, Yuval * loaded from file). 46537b6859fbSMintz, Yuval * - trace_meta_size (OUT): size in bytes of the trace meta data. 4654c965db44STomer Tayar */ 4655c965db44STomer Tayar static enum dbg_status qed_mcp_trace_get_meta_info(struct qed_hwfn *p_hwfn, 4656c965db44STomer Tayar struct qed_ptt *p_ptt, 4657c965db44STomer Tayar u32 trace_data_size_bytes, 4658c965db44STomer Tayar u32 *running_bundle_id, 46597b6859fbSMintz, Yuval u32 *trace_meta_offset, 46607b6859fbSMintz, Yuval u32 *trace_meta_size) 4661c965db44STomer Tayar { 46627b6859fbSMintz, Yuval u32 spad_trace_offsize, nvram_image_type, running_mfw_addr; 46637b6859fbSMintz, Yuval 4664c965db44STomer Tayar /* Read MCP trace section offsize structure from MCP scratchpad */ 46657b6859fbSMintz, Yuval spad_trace_offsize = qed_rd(p_hwfn, p_ptt, MCP_SPAD_TRACE_OFFSIZE_ADDR); 4666c965db44STomer Tayar 4667c965db44STomer Tayar /* Find running bundle ID */ 46687b6859fbSMintz, Yuval running_mfw_addr = 4669c965db44STomer Tayar MCP_REG_SCRATCH + SECTION_OFFSET(spad_trace_offsize) + 4670c965db44STomer Tayar QED_SECTION_SIZE(spad_trace_offsize) + trace_data_size_bytes; 4671c965db44STomer Tayar *running_bundle_id = qed_rd(p_hwfn, p_ptt, running_mfw_addr); 4672c965db44STomer Tayar if (*running_bundle_id > 1) 4673c965db44STomer Tayar return DBG_STATUS_INVALID_NVRAM_BUNDLE; 4674c965db44STomer Tayar 4675c965db44STomer Tayar /* Find image in NVRAM */ 4676c965db44STomer Tayar nvram_image_type = 4677c965db44STomer Tayar (*running_bundle_id == 4678c965db44STomer Tayar DIR_ID_1) ? NVM_TYPE_MFW_TRACE1 : NVM_TYPE_MFW_TRACE2; 4679be086e7cSMintz, Yuval return qed_find_nvram_image(p_hwfn, 4680c965db44STomer Tayar p_ptt, 4681c965db44STomer Tayar nvram_image_type, 46827b6859fbSMintz, Yuval trace_meta_offset, trace_meta_size); 4683c965db44STomer Tayar } 4684c965db44STomer Tayar 46857b6859fbSMintz, Yuval /* Reads the MCP Trace meta data from NVRAM into the specified buffer */ 4686c965db44STomer Tayar static enum dbg_status qed_mcp_trace_read_meta(struct qed_hwfn *p_hwfn, 4687c965db44STomer Tayar struct qed_ptt *p_ptt, 4688c965db44STomer Tayar u32 nvram_offset_in_bytes, 4689c965db44STomer Tayar u32 size_in_bytes, u32 *buf) 4690c965db44STomer Tayar { 46917b6859fbSMintz, Yuval u8 modules_num, module_len, i, *byte_buf = (u8 *)buf; 46927b6859fbSMintz, Yuval enum dbg_status status; 4693c965db44STomer Tayar u32 signature; 4694c965db44STomer Tayar 4695c965db44STomer Tayar /* Read meta data from NVRAM */ 46967b6859fbSMintz, Yuval status = qed_nvram_read(p_hwfn, 4697c965db44STomer Tayar p_ptt, 46987b6859fbSMintz, Yuval nvram_offset_in_bytes, size_in_bytes, buf); 4699c965db44STomer Tayar if (status != DBG_STATUS_OK) 4700c965db44STomer Tayar return status; 4701c965db44STomer Tayar 4702c965db44STomer Tayar /* Extract and check first signature */ 4703c965db44STomer Tayar signature = qed_read_unaligned_dword(byte_buf); 47047b6859fbSMintz, Yuval byte_buf += sizeof(signature); 47057b6859fbSMintz, Yuval if (signature != NVM_MAGIC_VALUE) 4706c965db44STomer Tayar return DBG_STATUS_INVALID_TRACE_SIGNATURE; 4707c965db44STomer Tayar 4708c965db44STomer Tayar /* Extract number of modules */ 4709c965db44STomer Tayar modules_num = *(byte_buf++); 4710c965db44STomer Tayar 4711c965db44STomer Tayar /* Skip all modules */ 4712c965db44STomer Tayar for (i = 0; i < modules_num; i++) { 47137b6859fbSMintz, Yuval module_len = *(byte_buf++); 4714c965db44STomer Tayar byte_buf += module_len; 4715c965db44STomer Tayar } 4716c965db44STomer Tayar 4717c965db44STomer Tayar /* Extract and check second signature */ 4718c965db44STomer Tayar signature = qed_read_unaligned_dword(byte_buf); 47197b6859fbSMintz, Yuval byte_buf += sizeof(signature); 47207b6859fbSMintz, Yuval if (signature != NVM_MAGIC_VALUE) 4721c965db44STomer Tayar return DBG_STATUS_INVALID_TRACE_SIGNATURE; 47227b6859fbSMintz, Yuval 4723c965db44STomer Tayar return DBG_STATUS_OK; 4724c965db44STomer Tayar } 4725c965db44STomer Tayar 4726c965db44STomer Tayar /* Dump MCP Trace */ 47278c93beafSYuval Mintz static enum dbg_status qed_mcp_trace_dump(struct qed_hwfn *p_hwfn, 4728c965db44STomer Tayar struct qed_ptt *p_ptt, 4729c965db44STomer Tayar u32 *dump_buf, 4730c965db44STomer Tayar bool dump, u32 *num_dumped_dwords) 4731c965db44STomer Tayar { 4732c965db44STomer Tayar u32 trace_data_grc_addr, trace_data_size_bytes, trace_data_size_dwords; 4733be086e7cSMintz, Yuval u32 trace_meta_size_dwords = 0, running_bundle_id, offset = 0; 4734be086e7cSMintz, Yuval u32 trace_meta_offset_bytes = 0, trace_meta_size_bytes = 0; 4735c965db44STomer Tayar enum dbg_status status; 4736be086e7cSMintz, Yuval bool mcp_access; 4737c965db44STomer Tayar int halted = 0; 4738c965db44STomer Tayar 4739c965db44STomer Tayar *num_dumped_dwords = 0; 4740c965db44STomer Tayar 47417b6859fbSMintz, Yuval mcp_access = !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP); 47427b6859fbSMintz, Yuval 4743c965db44STomer Tayar /* Get trace data info */ 4744c965db44STomer Tayar status = qed_mcp_trace_get_data_info(p_hwfn, 4745c965db44STomer Tayar p_ptt, 4746c965db44STomer Tayar &trace_data_grc_addr, 4747c965db44STomer Tayar &trace_data_size_bytes); 4748c965db44STomer Tayar if (status != DBG_STATUS_OK) 4749c965db44STomer Tayar return status; 4750c965db44STomer Tayar 4751c965db44STomer Tayar /* Dump global params */ 4752c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4753c965db44STomer Tayar p_ptt, 4754c965db44STomer Tayar dump_buf + offset, dump, 1); 4755c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4756c965db44STomer Tayar dump, "dump-type", "mcp-trace"); 4757c965db44STomer Tayar 4758c965db44STomer Tayar /* Halt MCP while reading from scratchpad so the read data will be 47597b6859fbSMintz, Yuval * consistent. if halt fails, MCP trace is taken anyway, with a small 4760c965db44STomer Tayar * risk that it may be corrupt. 4761c965db44STomer Tayar */ 4762be086e7cSMintz, Yuval if (dump && mcp_access) { 4763c965db44STomer Tayar halted = !qed_mcp_halt(p_hwfn, p_ptt); 4764c965db44STomer Tayar if (!halted) 4765c965db44STomer Tayar DP_NOTICE(p_hwfn, "MCP halt failed!\n"); 4766c965db44STomer Tayar } 4767c965db44STomer Tayar 4768c965db44STomer Tayar /* Find trace data size */ 4769c965db44STomer Tayar trace_data_size_dwords = 4770c965db44STomer Tayar DIV_ROUND_UP(trace_data_size_bytes + sizeof(struct mcp_trace), 4771c965db44STomer Tayar BYTES_IN_DWORD); 4772c965db44STomer Tayar 4773c965db44STomer Tayar /* Dump trace data section header and param */ 4774c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 4775c965db44STomer Tayar dump, "mcp_trace_data", 1); 4776c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, 4777c965db44STomer Tayar dump, "size", trace_data_size_dwords); 4778c965db44STomer Tayar 4779c965db44STomer Tayar /* Read trace data from scratchpad into dump buffer */ 4780be086e7cSMintz, Yuval offset += qed_grc_dump_addr_range(p_hwfn, 4781c965db44STomer Tayar p_ptt, 4782be086e7cSMintz, Yuval dump_buf + offset, 4783be086e7cSMintz, Yuval dump, 4784be086e7cSMintz, Yuval BYTES_TO_DWORDS(trace_data_grc_addr), 4785d52c89f1SMichal Kalderon trace_data_size_dwords, false, 4786d52c89f1SMichal Kalderon SPLIT_TYPE_NONE, 0); 4787c965db44STomer Tayar 4788c965db44STomer Tayar /* Resume MCP (only if halt succeeded) */ 47897b6859fbSMintz, Yuval if (halted && qed_mcp_resume(p_hwfn, p_ptt)) 4790c965db44STomer Tayar DP_NOTICE(p_hwfn, "Failed to resume MCP after halt!\n"); 4791c965db44STomer Tayar 4792c965db44STomer Tayar /* Dump trace meta section header */ 4793c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 4794c965db44STomer Tayar dump, "mcp_trace_meta", 1); 4795c965db44STomer Tayar 479650bc60cbSMichal Kalderon /* If MCP Trace meta size parameter was set, use it. 479750bc60cbSMichal Kalderon * Otherwise, read trace meta. 479850bc60cbSMichal Kalderon * trace_meta_size_bytes is dword-aligned. 479950bc60cbSMichal Kalderon */ 480050bc60cbSMichal Kalderon trace_meta_size_bytes = 480150bc60cbSMichal Kalderon qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_MCP_TRACE_META_SIZE); 480250bc60cbSMichal Kalderon if ((!trace_meta_size_bytes || dump) && mcp_access) { 4803c965db44STomer Tayar status = qed_mcp_trace_get_meta_info(p_hwfn, 4804c965db44STomer Tayar p_ptt, 4805c965db44STomer Tayar trace_data_size_bytes, 4806c965db44STomer Tayar &running_bundle_id, 4807c965db44STomer Tayar &trace_meta_offset_bytes, 4808c965db44STomer Tayar &trace_meta_size_bytes); 4809be086e7cSMintz, Yuval if (status == DBG_STATUS_OK) 4810be086e7cSMintz, Yuval trace_meta_size_dwords = 4811be086e7cSMintz, Yuval BYTES_TO_DWORDS(trace_meta_size_bytes); 4812be086e7cSMintz, Yuval } 4813c965db44STomer Tayar 4814be086e7cSMintz, Yuval /* Dump trace meta size param */ 4815be086e7cSMintz, Yuval offset += qed_dump_num_param(dump_buf + offset, 4816be086e7cSMintz, Yuval dump, "size", trace_meta_size_dwords); 4817c965db44STomer Tayar 4818c965db44STomer Tayar /* Read trace meta image into dump buffer */ 4819be086e7cSMintz, Yuval if (dump && trace_meta_size_dwords) 4820c965db44STomer Tayar status = qed_mcp_trace_read_meta(p_hwfn, 4821c965db44STomer Tayar p_ptt, 4822c965db44STomer Tayar trace_meta_offset_bytes, 4823c965db44STomer Tayar trace_meta_size_bytes, 4824c965db44STomer Tayar dump_buf + offset); 4825be086e7cSMintz, Yuval if (status == DBG_STATUS_OK) 4826c965db44STomer Tayar offset += trace_meta_size_dwords; 4827c965db44STomer Tayar 48287b6859fbSMintz, Yuval /* Dump last section */ 4829da090917STomer Tayar offset += qed_dump_last_section(dump_buf, offset, dump); 48307b6859fbSMintz, Yuval 4831c965db44STomer Tayar *num_dumped_dwords = offset; 4832c965db44STomer Tayar 4833be086e7cSMintz, Yuval /* If no mcp access, indicate that the dump doesn't contain the meta 4834be086e7cSMintz, Yuval * data from NVRAM. 4835be086e7cSMintz, Yuval */ 4836be086e7cSMintz, Yuval return mcp_access ? status : DBG_STATUS_NVRAM_GET_IMAGE_FAILED; 4837c965db44STomer Tayar } 4838c965db44STomer Tayar 4839c965db44STomer Tayar /* Dump GRC FIFO */ 48408c93beafSYuval Mintz static enum dbg_status qed_reg_fifo_dump(struct qed_hwfn *p_hwfn, 4841c965db44STomer Tayar struct qed_ptt *p_ptt, 4842c965db44STomer Tayar u32 *dump_buf, 4843c965db44STomer Tayar bool dump, u32 *num_dumped_dwords) 4844c965db44STomer Tayar { 4845da090917STomer Tayar u32 dwords_read, size_param_offset, offset = 0, addr, len; 4846c965db44STomer Tayar bool fifo_has_data; 4847c965db44STomer Tayar 4848c965db44STomer Tayar *num_dumped_dwords = 0; 4849c965db44STomer Tayar 4850c965db44STomer Tayar /* Dump global params */ 4851c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4852c965db44STomer Tayar p_ptt, 4853c965db44STomer Tayar dump_buf + offset, dump, 1); 4854c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4855c965db44STomer Tayar dump, "dump-type", "reg-fifo"); 4856c965db44STomer Tayar 48577b6859fbSMintz, Yuval /* Dump fifo data section header and param. The size param is 0 for 48587b6859fbSMintz, Yuval * now, and is overwritten after reading the FIFO. 4859c965db44STomer Tayar */ 4860c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 4861c965db44STomer Tayar dump, "reg_fifo_data", 1); 4862c965db44STomer Tayar size_param_offset = offset; 4863c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, dump, "size", 0); 4864c965db44STomer Tayar 4865c965db44STomer Tayar if (!dump) { 4866c965db44STomer Tayar /* FIFO max size is REG_FIFO_DEPTH_DWORDS. There is no way to 4867c965db44STomer Tayar * test how much data is available, except for reading it. 4868c965db44STomer Tayar */ 4869c965db44STomer Tayar offset += REG_FIFO_DEPTH_DWORDS; 48707b6859fbSMintz, Yuval goto out; 4871c965db44STomer Tayar } 4872c965db44STomer Tayar 4873c965db44STomer Tayar fifo_has_data = qed_rd(p_hwfn, p_ptt, 4874c965db44STomer Tayar GRC_REG_TRACE_FIFO_VALID_DATA) > 0; 4875c965db44STomer Tayar 4876c965db44STomer Tayar /* Pull available data from fifo. Use DMAE since this is widebus memory 4877c965db44STomer Tayar * and must be accessed atomically. Test for dwords_read not passing 4878c965db44STomer Tayar * buffer size since more entries could be added to the buffer as we are 4879c965db44STomer Tayar * emptying it. 4880c965db44STomer Tayar */ 4881da090917STomer Tayar addr = BYTES_TO_DWORDS(GRC_REG_TRACE_FIFO); 4882da090917STomer Tayar len = REG_FIFO_ELEMENT_DWORDS; 4883c965db44STomer Tayar for (dwords_read = 0; 4884c965db44STomer Tayar fifo_has_data && dwords_read < REG_FIFO_DEPTH_DWORDS; 4885da090917STomer Tayar dwords_read += REG_FIFO_ELEMENT_DWORDS) { 4886da090917STomer Tayar offset += qed_grc_dump_addr_range(p_hwfn, 4887da090917STomer Tayar p_ptt, 4888da090917STomer Tayar dump_buf + offset, 4889da090917STomer Tayar true, 4890da090917STomer Tayar addr, 4891da090917STomer Tayar len, 4892d52c89f1SMichal Kalderon true, SPLIT_TYPE_NONE, 4893d52c89f1SMichal Kalderon 0); 4894c965db44STomer Tayar fifo_has_data = qed_rd(p_hwfn, p_ptt, 4895c965db44STomer Tayar GRC_REG_TRACE_FIFO_VALID_DATA) > 0; 4896c965db44STomer Tayar } 4897c965db44STomer Tayar 4898c965db44STomer Tayar qed_dump_num_param(dump_buf + size_param_offset, dump, "size", 4899c965db44STomer Tayar dwords_read); 49007b6859fbSMintz, Yuval out: 49017b6859fbSMintz, Yuval /* Dump last section */ 4902da090917STomer Tayar offset += qed_dump_last_section(dump_buf, offset, dump); 4903c965db44STomer Tayar 4904c965db44STomer Tayar *num_dumped_dwords = offset; 49057b6859fbSMintz, Yuval 4906c965db44STomer Tayar return DBG_STATUS_OK; 4907c965db44STomer Tayar } 4908c965db44STomer Tayar 4909c965db44STomer Tayar /* Dump IGU FIFO */ 49108c93beafSYuval Mintz static enum dbg_status qed_igu_fifo_dump(struct qed_hwfn *p_hwfn, 4911c965db44STomer Tayar struct qed_ptt *p_ptt, 4912c965db44STomer Tayar u32 *dump_buf, 4913c965db44STomer Tayar bool dump, u32 *num_dumped_dwords) 4914c965db44STomer Tayar { 4915da090917STomer Tayar u32 dwords_read, size_param_offset, offset = 0, addr, len; 4916c965db44STomer Tayar bool fifo_has_data; 4917c965db44STomer Tayar 4918c965db44STomer Tayar *num_dumped_dwords = 0; 4919c965db44STomer Tayar 4920c965db44STomer Tayar /* Dump global params */ 4921c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4922c965db44STomer Tayar p_ptt, 4923c965db44STomer Tayar dump_buf + offset, dump, 1); 4924c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4925c965db44STomer Tayar dump, "dump-type", "igu-fifo"); 4926c965db44STomer Tayar 49277b6859fbSMintz, Yuval /* Dump fifo data section header and param. The size param is 0 for 49287b6859fbSMintz, Yuval * now, and is overwritten after reading the FIFO. 4929c965db44STomer Tayar */ 4930c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 4931c965db44STomer Tayar dump, "igu_fifo_data", 1); 4932c965db44STomer Tayar size_param_offset = offset; 4933c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, dump, "size", 0); 4934c965db44STomer Tayar 4935c965db44STomer Tayar if (!dump) { 4936c965db44STomer Tayar /* FIFO max size is IGU_FIFO_DEPTH_DWORDS. There is no way to 4937c965db44STomer Tayar * test how much data is available, except for reading it. 4938c965db44STomer Tayar */ 4939c965db44STomer Tayar offset += IGU_FIFO_DEPTH_DWORDS; 49407b6859fbSMintz, Yuval goto out; 4941c965db44STomer Tayar } 4942c965db44STomer Tayar 4943c965db44STomer Tayar fifo_has_data = qed_rd(p_hwfn, p_ptt, 4944c965db44STomer Tayar IGU_REG_ERROR_HANDLING_DATA_VALID) > 0; 4945c965db44STomer Tayar 4946c965db44STomer Tayar /* Pull available data from fifo. Use DMAE since this is widebus memory 4947c965db44STomer Tayar * and must be accessed atomically. Test for dwords_read not passing 4948c965db44STomer Tayar * buffer size since more entries could be added to the buffer as we are 4949c965db44STomer Tayar * emptying it. 4950c965db44STomer Tayar */ 4951da090917STomer Tayar addr = BYTES_TO_DWORDS(IGU_REG_ERROR_HANDLING_MEMORY); 4952da090917STomer Tayar len = IGU_FIFO_ELEMENT_DWORDS; 4953c965db44STomer Tayar for (dwords_read = 0; 4954c965db44STomer Tayar fifo_has_data && dwords_read < IGU_FIFO_DEPTH_DWORDS; 4955da090917STomer Tayar dwords_read += IGU_FIFO_ELEMENT_DWORDS) { 4956da090917STomer Tayar offset += qed_grc_dump_addr_range(p_hwfn, 4957da090917STomer Tayar p_ptt, 4958da090917STomer Tayar dump_buf + offset, 4959da090917STomer Tayar true, 4960da090917STomer Tayar addr, 4961da090917STomer Tayar len, 4962d52c89f1SMichal Kalderon true, SPLIT_TYPE_NONE, 4963d52c89f1SMichal Kalderon 0); 4964c965db44STomer Tayar fifo_has_data = qed_rd(p_hwfn, p_ptt, 4965c965db44STomer Tayar IGU_REG_ERROR_HANDLING_DATA_VALID) > 0; 4966c965db44STomer Tayar } 4967c965db44STomer Tayar 4968c965db44STomer Tayar qed_dump_num_param(dump_buf + size_param_offset, dump, "size", 4969c965db44STomer Tayar dwords_read); 49707b6859fbSMintz, Yuval out: 49717b6859fbSMintz, Yuval /* Dump last section */ 4972da090917STomer Tayar offset += qed_dump_last_section(dump_buf, offset, dump); 4973c965db44STomer Tayar 4974c965db44STomer Tayar *num_dumped_dwords = offset; 49757b6859fbSMintz, Yuval 4976c965db44STomer Tayar return DBG_STATUS_OK; 4977c965db44STomer Tayar } 4978c965db44STomer Tayar 4979c965db44STomer Tayar /* Protection Override dump */ 49808c93beafSYuval Mintz static enum dbg_status qed_protection_override_dump(struct qed_hwfn *p_hwfn, 4981c965db44STomer Tayar struct qed_ptt *p_ptt, 4982c965db44STomer Tayar u32 *dump_buf, 49838c93beafSYuval Mintz bool dump, 49848c93beafSYuval Mintz u32 *num_dumped_dwords) 4985c965db44STomer Tayar { 4986da090917STomer Tayar u32 size_param_offset, override_window_dwords, offset = 0, addr; 4987c965db44STomer Tayar 4988c965db44STomer Tayar *num_dumped_dwords = 0; 4989c965db44STomer Tayar 4990c965db44STomer Tayar /* Dump global params */ 4991c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 4992c965db44STomer Tayar p_ptt, 4993c965db44STomer Tayar dump_buf + offset, dump, 1); 4994c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 4995c965db44STomer Tayar dump, "dump-type", "protection-override"); 4996c965db44STomer Tayar 49977b6859fbSMintz, Yuval /* Dump data section header and param. The size param is 0 for now, 49987b6859fbSMintz, Yuval * and is overwritten after reading the data. 4999c965db44STomer Tayar */ 5000c965db44STomer Tayar offset += qed_dump_section_hdr(dump_buf + offset, 5001c965db44STomer Tayar dump, "protection_override_data", 1); 5002c965db44STomer Tayar size_param_offset = offset; 5003c965db44STomer Tayar offset += qed_dump_num_param(dump_buf + offset, dump, "size", 0); 5004c965db44STomer Tayar 5005c965db44STomer Tayar if (!dump) { 5006c965db44STomer Tayar offset += PROTECTION_OVERRIDE_DEPTH_DWORDS; 50077b6859fbSMintz, Yuval goto out; 5008c965db44STomer Tayar } 5009c965db44STomer Tayar 5010c965db44STomer Tayar /* Add override window info to buffer */ 5011c965db44STomer Tayar override_window_dwords = 5012da090917STomer Tayar qed_rd(p_hwfn, p_ptt, GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW) * 5013c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_DWORDS; 50148a52bbabSMichal Kalderon if (override_window_dwords) { 5015da090917STomer Tayar addr = BYTES_TO_DWORDS(GRC_REG_PROTECTION_OVERRIDE_WINDOW); 5016da090917STomer Tayar offset += qed_grc_dump_addr_range(p_hwfn, 5017da090917STomer Tayar p_ptt, 5018da090917STomer Tayar dump_buf + offset, 5019da090917STomer Tayar true, 5020da090917STomer Tayar addr, 5021da090917STomer Tayar override_window_dwords, 5022d52c89f1SMichal Kalderon true, SPLIT_TYPE_NONE, 0); 5023c965db44STomer Tayar qed_dump_num_param(dump_buf + size_param_offset, dump, "size", 5024c965db44STomer Tayar override_window_dwords); 50258a52bbabSMichal Kalderon } 50267b6859fbSMintz, Yuval out: 50277b6859fbSMintz, Yuval /* Dump last section */ 5028da090917STomer Tayar offset += qed_dump_last_section(dump_buf, offset, dump); 5029c965db44STomer Tayar 5030c965db44STomer Tayar *num_dumped_dwords = offset; 50317b6859fbSMintz, Yuval 5032c965db44STomer Tayar return DBG_STATUS_OK; 5033c965db44STomer Tayar } 5034c965db44STomer Tayar 5035c965db44STomer Tayar /* Performs FW Asserts Dump to the specified buffer. 5036c965db44STomer Tayar * Returns the dumped size in dwords. 5037c965db44STomer Tayar */ 5038c965db44STomer Tayar static u32 qed_fw_asserts_dump(struct qed_hwfn *p_hwfn, 5039c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 5040c965db44STomer Tayar { 5041c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 5042be086e7cSMintz, Yuval struct fw_asserts_ram_section *asserts; 5043c965db44STomer Tayar char storm_letter_str[2] = "?"; 5044c965db44STomer Tayar struct fw_info fw_info; 5045be086e7cSMintz, Yuval u32 offset = 0; 5046c965db44STomer Tayar u8 storm_id; 5047c965db44STomer Tayar 5048c965db44STomer Tayar /* Dump global params */ 5049c965db44STomer Tayar offset += qed_dump_common_global_params(p_hwfn, 5050c965db44STomer Tayar p_ptt, 5051c965db44STomer Tayar dump_buf + offset, dump, 1); 5052c965db44STomer Tayar offset += qed_dump_str_param(dump_buf + offset, 5053c965db44STomer Tayar dump, "dump-type", "fw-asserts"); 50547b6859fbSMintz, Yuval 50557b6859fbSMintz, Yuval /* Find Storm dump size */ 5056c965db44STomer Tayar for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 5057be086e7cSMintz, Yuval u32 fw_asserts_section_addr, next_list_idx_addr, next_list_idx; 50587b6859fbSMintz, Yuval struct storm_defs *storm = &s_storm_defs[storm_id]; 5059be086e7cSMintz, Yuval u32 last_list_idx, addr; 5060c965db44STomer Tayar 50617b6859fbSMintz, Yuval if (dev_data->block_in_reset[storm->block_id]) 5062c965db44STomer Tayar continue; 5063c965db44STomer Tayar 5064c965db44STomer Tayar /* Read FW info for the current Storm */ 5065d52c89f1SMichal Kalderon qed_read_storm_fw_info(p_hwfn, p_ptt, storm_id, &fw_info); 5066c965db44STomer Tayar 5067be086e7cSMintz, Yuval asserts = &fw_info.fw_asserts_section; 5068be086e7cSMintz, Yuval 5069c965db44STomer Tayar /* Dump FW Asserts section header and params */ 50707b6859fbSMintz, Yuval storm_letter_str[0] = storm->letter; 50717b6859fbSMintz, Yuval offset += qed_dump_section_hdr(dump_buf + offset, 50727b6859fbSMintz, Yuval dump, "fw_asserts", 2); 50737b6859fbSMintz, Yuval offset += qed_dump_str_param(dump_buf + offset, 50747b6859fbSMintz, Yuval dump, "storm", storm_letter_str); 50757b6859fbSMintz, Yuval offset += qed_dump_num_param(dump_buf + offset, 50767b6859fbSMintz, Yuval dump, 50777b6859fbSMintz, Yuval "size", 5078be086e7cSMintz, Yuval asserts->list_element_dword_size); 5079c965db44STomer Tayar 50807b6859fbSMintz, Yuval /* Read and dump FW Asserts data */ 5081c965db44STomer Tayar if (!dump) { 5082be086e7cSMintz, Yuval offset += asserts->list_element_dword_size; 5083c965db44STomer Tayar continue; 5084c965db44STomer Tayar } 5085c965db44STomer Tayar 50867b6859fbSMintz, Yuval fw_asserts_section_addr = storm->sem_fast_mem_addr + 5087c965db44STomer Tayar SEM_FAST_REG_INT_RAM + 5088be086e7cSMintz, Yuval RAM_LINES_TO_BYTES(asserts->section_ram_line_offset); 50897b6859fbSMintz, Yuval next_list_idx_addr = fw_asserts_section_addr + 5090be086e7cSMintz, Yuval DWORDS_TO_BYTES(asserts->list_next_index_dword_offset); 5091c965db44STomer Tayar next_list_idx = qed_rd(p_hwfn, p_ptt, next_list_idx_addr); 5092da090917STomer Tayar last_list_idx = (next_list_idx > 0 ? 5093da090917STomer Tayar next_list_idx : 5094da090917STomer Tayar asserts->list_num_elements) - 1; 5095be086e7cSMintz, Yuval addr = BYTES_TO_DWORDS(fw_asserts_section_addr) + 5096be086e7cSMintz, Yuval asserts->list_dword_offset + 5097be086e7cSMintz, Yuval last_list_idx * asserts->list_element_dword_size; 5098be086e7cSMintz, Yuval offset += 5099be086e7cSMintz, Yuval qed_grc_dump_addr_range(p_hwfn, p_ptt, 5100be086e7cSMintz, Yuval dump_buf + offset, 5101be086e7cSMintz, Yuval dump, addr, 51027b6859fbSMintz, Yuval asserts->list_element_dword_size, 5103d52c89f1SMichal Kalderon false, SPLIT_TYPE_NONE, 0); 5104c965db44STomer Tayar } 5105c965db44STomer Tayar 5106c965db44STomer Tayar /* Dump last section */ 5107da090917STomer Tayar offset += qed_dump_last_section(dump_buf, offset, dump); 51087b6859fbSMintz, Yuval 5109c965db44STomer Tayar return offset; 5110c965db44STomer Tayar } 5111c965db44STomer Tayar 51128a52bbabSMichal Kalderon /* Dumps the specified ILT pages to the specified buffer. 51138a52bbabSMichal Kalderon * Returns the dumped size in dwords. 51148a52bbabSMichal Kalderon */ 51158a52bbabSMichal Kalderon static u32 qed_ilt_dump_pages_range(u32 *dump_buf, 51168a52bbabSMichal Kalderon bool dump, 51178a52bbabSMichal Kalderon u32 start_page_id, 51188a52bbabSMichal Kalderon u32 num_pages, 51198a52bbabSMichal Kalderon struct phys_mem_desc *ilt_pages, 51208a52bbabSMichal Kalderon bool dump_page_ids) 51218a52bbabSMichal Kalderon { 51228a52bbabSMichal Kalderon u32 page_id, end_page_id, offset = 0; 51238a52bbabSMichal Kalderon 51248a52bbabSMichal Kalderon if (num_pages == 0) 51258a52bbabSMichal Kalderon return offset; 51268a52bbabSMichal Kalderon 51278a52bbabSMichal Kalderon end_page_id = start_page_id + num_pages - 1; 51288a52bbabSMichal Kalderon 51298a52bbabSMichal Kalderon for (page_id = start_page_id; page_id <= end_page_id; page_id++) { 51308a52bbabSMichal Kalderon struct phys_mem_desc *mem_desc = &ilt_pages[page_id]; 51318a52bbabSMichal Kalderon 51328a52bbabSMichal Kalderon /** 51338a52bbabSMichal Kalderon * 51348a52bbabSMichal Kalderon * if (page_id >= ->p_cxt_mngr->ilt_shadow_size) 51358a52bbabSMichal Kalderon * break; 51368a52bbabSMichal Kalderon */ 51378a52bbabSMichal Kalderon 51388a52bbabSMichal Kalderon if (!ilt_pages[page_id].virt_addr) 51398a52bbabSMichal Kalderon continue; 51408a52bbabSMichal Kalderon 51418a52bbabSMichal Kalderon if (dump_page_ids) { 51428a52bbabSMichal Kalderon /* Copy page ID to dump buffer */ 51438a52bbabSMichal Kalderon if (dump) 51448a52bbabSMichal Kalderon *(dump_buf + offset) = page_id; 51458a52bbabSMichal Kalderon offset++; 51468a52bbabSMichal Kalderon } else { 51478a52bbabSMichal Kalderon /* Copy page memory to dump buffer */ 51488a52bbabSMichal Kalderon if (dump) 51498a52bbabSMichal Kalderon memcpy(dump_buf + offset, 51508a52bbabSMichal Kalderon mem_desc->virt_addr, mem_desc->size); 51518a52bbabSMichal Kalderon offset += BYTES_TO_DWORDS(mem_desc->size); 51528a52bbabSMichal Kalderon } 51538a52bbabSMichal Kalderon } 51548a52bbabSMichal Kalderon 51558a52bbabSMichal Kalderon return offset; 51568a52bbabSMichal Kalderon } 51578a52bbabSMichal Kalderon 51588a52bbabSMichal Kalderon /* Dumps a section containing the dumped ILT pages. 51598a52bbabSMichal Kalderon * Returns the dumped size in dwords. 51608a52bbabSMichal Kalderon */ 51618a52bbabSMichal Kalderon static u32 qed_ilt_dump_pages_section(struct qed_hwfn *p_hwfn, 51628a52bbabSMichal Kalderon u32 *dump_buf, 51638a52bbabSMichal Kalderon bool dump, 51648a52bbabSMichal Kalderon u32 valid_conn_pf_pages, 51658a52bbabSMichal Kalderon u32 valid_conn_vf_pages, 51668a52bbabSMichal Kalderon struct phys_mem_desc *ilt_pages, 51678a52bbabSMichal Kalderon bool dump_page_ids) 51688a52bbabSMichal Kalderon { 51698a52bbabSMichal Kalderon struct qed_ilt_client_cfg *clients = p_hwfn->p_cxt_mngr->clients; 51708a52bbabSMichal Kalderon u32 pf_start_line, start_page_id, offset = 0; 51718a52bbabSMichal Kalderon u32 cdut_pf_init_pages, cdut_vf_init_pages; 51728a52bbabSMichal Kalderon u32 cdut_pf_work_pages, cdut_vf_work_pages; 51738a52bbabSMichal Kalderon u32 base_data_offset, size_param_offset; 51748a52bbabSMichal Kalderon u32 cdut_pf_pages, cdut_vf_pages; 51758a52bbabSMichal Kalderon const char *section_name; 51768a52bbabSMichal Kalderon u8 i; 51778a52bbabSMichal Kalderon 51788a52bbabSMichal Kalderon section_name = dump_page_ids ? "ilt_page_ids" : "ilt_page_mem"; 51798a52bbabSMichal Kalderon cdut_pf_init_pages = qed_get_cdut_num_pf_init_pages(p_hwfn); 51808a52bbabSMichal Kalderon cdut_vf_init_pages = qed_get_cdut_num_vf_init_pages(p_hwfn); 51818a52bbabSMichal Kalderon cdut_pf_work_pages = qed_get_cdut_num_pf_work_pages(p_hwfn); 51828a52bbabSMichal Kalderon cdut_vf_work_pages = qed_get_cdut_num_vf_work_pages(p_hwfn); 51838a52bbabSMichal Kalderon cdut_pf_pages = cdut_pf_init_pages + cdut_pf_work_pages; 51848a52bbabSMichal Kalderon cdut_vf_pages = cdut_vf_init_pages + cdut_vf_work_pages; 51858a52bbabSMichal Kalderon pf_start_line = p_hwfn->p_cxt_mngr->pf_start_line; 51868a52bbabSMichal Kalderon 51878a52bbabSMichal Kalderon offset += 51888a52bbabSMichal Kalderon qed_dump_section_hdr(dump_buf + offset, dump, section_name, 1); 51898a52bbabSMichal Kalderon 51908a52bbabSMichal Kalderon /* Dump size parameter (0 for now, overwritten with real size later) */ 51918a52bbabSMichal Kalderon size_param_offset = offset; 51928a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, dump, "size", 0); 51938a52bbabSMichal Kalderon base_data_offset = offset; 51948a52bbabSMichal Kalderon 51958a52bbabSMichal Kalderon /* CDUC pages are ordered as follows: 51968a52bbabSMichal Kalderon * - PF pages - valid section (included in PF connection type mapping) 51978a52bbabSMichal Kalderon * - PF pages - invalid section (not dumped) 51988a52bbabSMichal Kalderon * - For each VF in the PF: 51998a52bbabSMichal Kalderon * - VF pages - valid section (included in VF connection type mapping) 52008a52bbabSMichal Kalderon * - VF pages - invalid section (not dumped) 52018a52bbabSMichal Kalderon */ 52028a52bbabSMichal Kalderon if (qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_DUMP_ILT_CDUC)) { 52038a52bbabSMichal Kalderon /* Dump connection PF pages */ 52048a52bbabSMichal Kalderon start_page_id = clients[ILT_CLI_CDUC].first.val - pf_start_line; 52058a52bbabSMichal Kalderon offset += qed_ilt_dump_pages_range(dump_buf + offset, 52068a52bbabSMichal Kalderon dump, 52078a52bbabSMichal Kalderon start_page_id, 52088a52bbabSMichal Kalderon valid_conn_pf_pages, 52098a52bbabSMichal Kalderon ilt_pages, dump_page_ids); 52108a52bbabSMichal Kalderon 52118a52bbabSMichal Kalderon /* Dump connection VF pages */ 52128a52bbabSMichal Kalderon start_page_id += clients[ILT_CLI_CDUC].pf_total_lines; 52138a52bbabSMichal Kalderon for (i = 0; i < p_hwfn->p_cxt_mngr->vf_count; 52148a52bbabSMichal Kalderon i++, start_page_id += clients[ILT_CLI_CDUC].vf_total_lines) 52158a52bbabSMichal Kalderon offset += qed_ilt_dump_pages_range(dump_buf + offset, 52168a52bbabSMichal Kalderon dump, 52178a52bbabSMichal Kalderon start_page_id, 52188a52bbabSMichal Kalderon valid_conn_vf_pages, 52198a52bbabSMichal Kalderon ilt_pages, 52208a52bbabSMichal Kalderon dump_page_ids); 52218a52bbabSMichal Kalderon } 52228a52bbabSMichal Kalderon 52238a52bbabSMichal Kalderon /* CDUT pages are ordered as follows: 52248a52bbabSMichal Kalderon * - PF init pages (not dumped) 52258a52bbabSMichal Kalderon * - PF work pages 52268a52bbabSMichal Kalderon * - For each VF in the PF: 52278a52bbabSMichal Kalderon * - VF init pages (not dumped) 52288a52bbabSMichal Kalderon * - VF work pages 52298a52bbabSMichal Kalderon */ 52308a52bbabSMichal Kalderon if (qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_DUMP_ILT_CDUT)) { 52318a52bbabSMichal Kalderon /* Dump task PF pages */ 52328a52bbabSMichal Kalderon start_page_id = clients[ILT_CLI_CDUT].first.val + 52338a52bbabSMichal Kalderon cdut_pf_init_pages - pf_start_line; 52348a52bbabSMichal Kalderon offset += qed_ilt_dump_pages_range(dump_buf + offset, 52358a52bbabSMichal Kalderon dump, 52368a52bbabSMichal Kalderon start_page_id, 52378a52bbabSMichal Kalderon cdut_pf_work_pages, 52388a52bbabSMichal Kalderon ilt_pages, dump_page_ids); 52398a52bbabSMichal Kalderon 52408a52bbabSMichal Kalderon /* Dump task VF pages */ 52418a52bbabSMichal Kalderon start_page_id = clients[ILT_CLI_CDUT].first.val + 52428a52bbabSMichal Kalderon cdut_pf_pages + cdut_vf_init_pages - pf_start_line; 52438a52bbabSMichal Kalderon for (i = 0; i < p_hwfn->p_cxt_mngr->vf_count; 52448a52bbabSMichal Kalderon i++, start_page_id += cdut_vf_pages) 52458a52bbabSMichal Kalderon offset += qed_ilt_dump_pages_range(dump_buf + offset, 52468a52bbabSMichal Kalderon dump, 52478a52bbabSMichal Kalderon start_page_id, 52488a52bbabSMichal Kalderon cdut_vf_work_pages, 52498a52bbabSMichal Kalderon ilt_pages, 52508a52bbabSMichal Kalderon dump_page_ids); 52518a52bbabSMichal Kalderon } 52528a52bbabSMichal Kalderon 52538a52bbabSMichal Kalderon /* Overwrite size param */ 52548a52bbabSMichal Kalderon if (dump) 52558a52bbabSMichal Kalderon qed_dump_num_param(dump_buf + size_param_offset, 52568a52bbabSMichal Kalderon dump, "size", offset - base_data_offset); 52578a52bbabSMichal Kalderon 52588a52bbabSMichal Kalderon return offset; 52598a52bbabSMichal Kalderon } 52608a52bbabSMichal Kalderon 52618a52bbabSMichal Kalderon /* Performs ILT Dump to the specified buffer. 52628a52bbabSMichal Kalderon * Returns the dumped size in dwords. 52638a52bbabSMichal Kalderon */ 52648a52bbabSMichal Kalderon static u32 qed_ilt_dump(struct qed_hwfn *p_hwfn, 52658a52bbabSMichal Kalderon struct qed_ptt *p_ptt, u32 *dump_buf, bool dump) 52668a52bbabSMichal Kalderon { 52678a52bbabSMichal Kalderon struct qed_ilt_client_cfg *clients = p_hwfn->p_cxt_mngr->clients; 52688a52bbabSMichal Kalderon u32 valid_conn_vf_cids, valid_conn_vf_pages, offset = 0; 52698a52bbabSMichal Kalderon u32 valid_conn_pf_cids, valid_conn_pf_pages, num_pages; 52708a52bbabSMichal Kalderon u32 num_cids_per_page, conn_ctx_size; 52718a52bbabSMichal Kalderon u32 cduc_page_size, cdut_page_size; 52728a52bbabSMichal Kalderon struct phys_mem_desc *ilt_pages; 52738a52bbabSMichal Kalderon u8 conn_type; 52748a52bbabSMichal Kalderon 52758a52bbabSMichal Kalderon cduc_page_size = 1 << 52768a52bbabSMichal Kalderon (clients[ILT_CLI_CDUC].p_size.val + PXP_ILT_PAGE_SIZE_NUM_BITS_MIN); 52778a52bbabSMichal Kalderon cdut_page_size = 1 << 52788a52bbabSMichal Kalderon (clients[ILT_CLI_CDUT].p_size.val + PXP_ILT_PAGE_SIZE_NUM_BITS_MIN); 52798a52bbabSMichal Kalderon conn_ctx_size = p_hwfn->p_cxt_mngr->conn_ctx_size; 52808a52bbabSMichal Kalderon num_cids_per_page = (int)(cduc_page_size / conn_ctx_size); 52818a52bbabSMichal Kalderon ilt_pages = p_hwfn->p_cxt_mngr->ilt_shadow; 52828a52bbabSMichal Kalderon 52838a52bbabSMichal Kalderon /* Dump global params - 22 must match number of params below */ 52848a52bbabSMichal Kalderon offset += qed_dump_common_global_params(p_hwfn, p_ptt, 52858a52bbabSMichal Kalderon dump_buf + offset, dump, 22); 52868a52bbabSMichal Kalderon offset += qed_dump_str_param(dump_buf + offset, 52878a52bbabSMichal Kalderon dump, "dump-type", "ilt-dump"); 52888a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 52898a52bbabSMichal Kalderon dump, 52908a52bbabSMichal Kalderon "cduc-page-size", cduc_page_size); 52918a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 52928a52bbabSMichal Kalderon dump, 52938a52bbabSMichal Kalderon "cduc-first-page-id", 52948a52bbabSMichal Kalderon clients[ILT_CLI_CDUC].first.val); 52958a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 52968a52bbabSMichal Kalderon dump, 52978a52bbabSMichal Kalderon "cduc-last-page-id", 52988a52bbabSMichal Kalderon clients[ILT_CLI_CDUC].last.val); 52998a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53008a52bbabSMichal Kalderon dump, 53018a52bbabSMichal Kalderon "cduc-num-pf-pages", 53028a52bbabSMichal Kalderon clients 53038a52bbabSMichal Kalderon [ILT_CLI_CDUC].pf_total_lines); 53048a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53058a52bbabSMichal Kalderon dump, 53068a52bbabSMichal Kalderon "cduc-num-vf-pages", 53078a52bbabSMichal Kalderon clients 53088a52bbabSMichal Kalderon [ILT_CLI_CDUC].vf_total_lines); 53098a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53108a52bbabSMichal Kalderon dump, 53118a52bbabSMichal Kalderon "max-conn-ctx-size", 53128a52bbabSMichal Kalderon conn_ctx_size); 53138a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53148a52bbabSMichal Kalderon dump, 53158a52bbabSMichal Kalderon "cdut-page-size", cdut_page_size); 53168a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53178a52bbabSMichal Kalderon dump, 53188a52bbabSMichal Kalderon "cdut-first-page-id", 53198a52bbabSMichal Kalderon clients[ILT_CLI_CDUT].first.val); 53208a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53218a52bbabSMichal Kalderon dump, 53228a52bbabSMichal Kalderon "cdut-last-page-id", 53238a52bbabSMichal Kalderon clients[ILT_CLI_CDUT].last.val); 53248a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53258a52bbabSMichal Kalderon dump, 53268a52bbabSMichal Kalderon "cdut-num-pf-init-pages", 53278a52bbabSMichal Kalderon qed_get_cdut_num_pf_init_pages(p_hwfn)); 53288a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53298a52bbabSMichal Kalderon dump, 53308a52bbabSMichal Kalderon "cdut-num-vf-init-pages", 53318a52bbabSMichal Kalderon qed_get_cdut_num_vf_init_pages(p_hwfn)); 53328a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53338a52bbabSMichal Kalderon dump, 53348a52bbabSMichal Kalderon "cdut-num-pf-work-pages", 53358a52bbabSMichal Kalderon qed_get_cdut_num_pf_work_pages(p_hwfn)); 53368a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53378a52bbabSMichal Kalderon dump, 53388a52bbabSMichal Kalderon "cdut-num-vf-work-pages", 53398a52bbabSMichal Kalderon qed_get_cdut_num_vf_work_pages(p_hwfn)); 53408a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53418a52bbabSMichal Kalderon dump, 53428a52bbabSMichal Kalderon "max-task-ctx-size", 53438a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->task_ctx_size); 53448a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53458a52bbabSMichal Kalderon dump, 53468a52bbabSMichal Kalderon "task-type-id", 53478a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->task_type_id); 53488a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53498a52bbabSMichal Kalderon dump, 53508a52bbabSMichal Kalderon "first-vf-id-in-pf", 53518a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->first_vf_in_pf); 53528a52bbabSMichal Kalderon offset += /* 18 */ qed_dump_num_param(dump_buf + offset, 53538a52bbabSMichal Kalderon dump, 53548a52bbabSMichal Kalderon "num-vfs-in-pf", 53558a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->vf_count); 53568a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53578a52bbabSMichal Kalderon dump, 53588a52bbabSMichal Kalderon "ptr-size-bytes", sizeof(void *)); 53598a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53608a52bbabSMichal Kalderon dump, 53618a52bbabSMichal Kalderon "pf-start-line", 53628a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->pf_start_line); 53638a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53648a52bbabSMichal Kalderon dump, 53658a52bbabSMichal Kalderon "page-mem-desc-size-dwords", 53668a52bbabSMichal Kalderon PAGE_MEM_DESC_SIZE_DWORDS); 53678a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53688a52bbabSMichal Kalderon dump, 53698a52bbabSMichal Kalderon "ilt-shadow-size", 53708a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->ilt_shadow_size); 53718a52bbabSMichal Kalderon /* Additional/Less parameters require matching of number in call to 53728a52bbabSMichal Kalderon * dump_common_global_params() 53738a52bbabSMichal Kalderon */ 53748a52bbabSMichal Kalderon 53758a52bbabSMichal Kalderon /* Dump section containing number of PF CIDs per connection type */ 53768a52bbabSMichal Kalderon offset += qed_dump_section_hdr(dump_buf + offset, 53778a52bbabSMichal Kalderon dump, "num_pf_cids_per_conn_type", 1); 53788a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53798a52bbabSMichal Kalderon dump, "size", NUM_OF_CONNECTION_TYPES_E4); 53808a52bbabSMichal Kalderon for (conn_type = 0, valid_conn_pf_cids = 0; 53818a52bbabSMichal Kalderon conn_type < NUM_OF_CONNECTION_TYPES_E4; conn_type++, offset++) { 53828a52bbabSMichal Kalderon u32 num_pf_cids = 53838a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->conn_cfg[conn_type].cid_count; 53848a52bbabSMichal Kalderon 53858a52bbabSMichal Kalderon if (dump) 53868a52bbabSMichal Kalderon *(dump_buf + offset) = num_pf_cids; 53878a52bbabSMichal Kalderon valid_conn_pf_cids += num_pf_cids; 53888a52bbabSMichal Kalderon } 53898a52bbabSMichal Kalderon 53908a52bbabSMichal Kalderon /* Dump section containing number of VF CIDs per connection type */ 53918a52bbabSMichal Kalderon offset += qed_dump_section_hdr(dump_buf + offset, 53928a52bbabSMichal Kalderon dump, "num_vf_cids_per_conn_type", 1); 53938a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 53948a52bbabSMichal Kalderon dump, "size", NUM_OF_CONNECTION_TYPES_E4); 53958a52bbabSMichal Kalderon for (conn_type = 0, valid_conn_vf_cids = 0; 53968a52bbabSMichal Kalderon conn_type < NUM_OF_CONNECTION_TYPES_E4; conn_type++, offset++) { 53978a52bbabSMichal Kalderon u32 num_vf_cids = 53988a52bbabSMichal Kalderon p_hwfn->p_cxt_mngr->conn_cfg[conn_type].cids_per_vf; 53998a52bbabSMichal Kalderon 54008a52bbabSMichal Kalderon if (dump) 54018a52bbabSMichal Kalderon *(dump_buf + offset) = num_vf_cids; 54028a52bbabSMichal Kalderon valid_conn_vf_cids += num_vf_cids; 54038a52bbabSMichal Kalderon } 54048a52bbabSMichal Kalderon 54058a52bbabSMichal Kalderon /* Dump section containing physical memory descs for each ILT page */ 54068a52bbabSMichal Kalderon num_pages = p_hwfn->p_cxt_mngr->ilt_shadow_size; 54078a52bbabSMichal Kalderon offset += qed_dump_section_hdr(dump_buf + offset, 54088a52bbabSMichal Kalderon dump, "ilt_page_desc", 1); 54098a52bbabSMichal Kalderon offset += qed_dump_num_param(dump_buf + offset, 54108a52bbabSMichal Kalderon dump, 54118a52bbabSMichal Kalderon "size", 54128a52bbabSMichal Kalderon num_pages * PAGE_MEM_DESC_SIZE_DWORDS); 54138a52bbabSMichal Kalderon 54148a52bbabSMichal Kalderon /* Copy memory descriptors to dump buffer */ 54158a52bbabSMichal Kalderon if (dump) { 54168a52bbabSMichal Kalderon u32 page_id; 54178a52bbabSMichal Kalderon 54188a52bbabSMichal Kalderon for (page_id = 0; page_id < num_pages; 54198a52bbabSMichal Kalderon page_id++, offset += PAGE_MEM_DESC_SIZE_DWORDS) 54208a52bbabSMichal Kalderon memcpy(dump_buf + offset, 54218a52bbabSMichal Kalderon &ilt_pages[page_id], 54228a52bbabSMichal Kalderon DWORDS_TO_BYTES(PAGE_MEM_DESC_SIZE_DWORDS)); 54238a52bbabSMichal Kalderon } else { 54248a52bbabSMichal Kalderon offset += num_pages * PAGE_MEM_DESC_SIZE_DWORDS; 54258a52bbabSMichal Kalderon } 54268a52bbabSMichal Kalderon 54278a52bbabSMichal Kalderon valid_conn_pf_pages = DIV_ROUND_UP(valid_conn_pf_cids, 54288a52bbabSMichal Kalderon num_cids_per_page); 54298a52bbabSMichal Kalderon valid_conn_vf_pages = DIV_ROUND_UP(valid_conn_vf_cids, 54308a52bbabSMichal Kalderon num_cids_per_page); 54318a52bbabSMichal Kalderon 54328a52bbabSMichal Kalderon /* Dump ILT pages IDs */ 54338a52bbabSMichal Kalderon offset += qed_ilt_dump_pages_section(p_hwfn, 54348a52bbabSMichal Kalderon dump_buf + offset, 54358a52bbabSMichal Kalderon dump, 54368a52bbabSMichal Kalderon valid_conn_pf_pages, 54378a52bbabSMichal Kalderon valid_conn_vf_pages, 54388a52bbabSMichal Kalderon ilt_pages, true); 54398a52bbabSMichal Kalderon 54408a52bbabSMichal Kalderon /* Dump ILT pages memory */ 54418a52bbabSMichal Kalderon offset += qed_ilt_dump_pages_section(p_hwfn, 54428a52bbabSMichal Kalderon dump_buf + offset, 54438a52bbabSMichal Kalderon dump, 54448a52bbabSMichal Kalderon valid_conn_pf_pages, 54458a52bbabSMichal Kalderon valid_conn_vf_pages, 54468a52bbabSMichal Kalderon ilt_pages, false); 54478a52bbabSMichal Kalderon 54488a52bbabSMichal Kalderon /* Dump last section */ 54498a52bbabSMichal Kalderon offset += qed_dump_last_section(dump_buf, offset, dump); 54508a52bbabSMichal Kalderon 54518a52bbabSMichal Kalderon return offset; 54528a52bbabSMichal Kalderon } 54538a52bbabSMichal Kalderon 5454c965db44STomer Tayar /***************************** Public Functions *******************************/ 5455c965db44STomer Tayar 5456c965db44STomer Tayar enum dbg_status qed_dbg_set_bin_ptr(const u8 * const bin_ptr) 5457c965db44STomer Tayar { 5458be086e7cSMintz, Yuval struct bin_buffer_hdr *buf_array = (struct bin_buffer_hdr *)bin_ptr; 5459c965db44STomer Tayar u8 buf_id; 5460c965db44STomer Tayar 54617b6859fbSMintz, Yuval /* convert binary data to debug arrays */ 5462be086e7cSMintz, Yuval for (buf_id = 0; buf_id < MAX_BIN_DBG_BUFFER_TYPE; buf_id++) { 5463c965db44STomer Tayar s_dbg_arrays[buf_id].ptr = 5464c965db44STomer Tayar (u32 *)(bin_ptr + buf_array[buf_id].offset); 5465c965db44STomer Tayar s_dbg_arrays[buf_id].size_in_dwords = 5466c965db44STomer Tayar BYTES_TO_DWORDS(buf_array[buf_id].length); 5467c965db44STomer Tayar } 5468c965db44STomer Tayar 5469c965db44STomer Tayar return DBG_STATUS_OK; 5470c965db44STomer Tayar } 5471c965db44STomer Tayar 5472d52c89f1SMichal Kalderon bool qed_read_fw_info(struct qed_hwfn *p_hwfn, 5473d52c89f1SMichal Kalderon struct qed_ptt *p_ptt, struct fw_info *fw_info) 5474d52c89f1SMichal Kalderon { 5475d52c89f1SMichal Kalderon struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 5476d52c89f1SMichal Kalderon u8 storm_id; 5477d52c89f1SMichal Kalderon 5478d52c89f1SMichal Kalderon for (storm_id = 0; storm_id < MAX_DBG_STORMS; storm_id++) { 5479d52c89f1SMichal Kalderon struct storm_defs *storm = &s_storm_defs[storm_id]; 5480d52c89f1SMichal Kalderon 5481d52c89f1SMichal Kalderon /* Skip Storm if it's in reset */ 5482d52c89f1SMichal Kalderon if (dev_data->block_in_reset[storm->block_id]) 5483d52c89f1SMichal Kalderon continue; 5484d52c89f1SMichal Kalderon 5485d52c89f1SMichal Kalderon /* Read FW info for the current Storm */ 5486d52c89f1SMichal Kalderon qed_read_storm_fw_info(p_hwfn, p_ptt, storm_id, fw_info); 5487d52c89f1SMichal Kalderon 5488d52c89f1SMichal Kalderon return true; 5489d52c89f1SMichal Kalderon } 5490d52c89f1SMichal Kalderon 5491d52c89f1SMichal Kalderon return false; 5492d52c89f1SMichal Kalderon } 5493d52c89f1SMichal Kalderon 54943b86bd07SSudarsana Reddy Kalluru enum dbg_status qed_dbg_grc_config(struct qed_hwfn *p_hwfn, 54953b86bd07SSudarsana Reddy Kalluru struct qed_ptt *p_ptt, 54963b86bd07SSudarsana Reddy Kalluru enum dbg_grc_params grc_param, u32 val) 54973b86bd07SSudarsana Reddy Kalluru { 54983b86bd07SSudarsana Reddy Kalluru enum dbg_status status; 54993b86bd07SSudarsana Reddy Kalluru int i; 55003b86bd07SSudarsana Reddy Kalluru 55013b86bd07SSudarsana Reddy Kalluru DP_VERBOSE(p_hwfn, QED_MSG_DEBUG, 55023b86bd07SSudarsana Reddy Kalluru "dbg_grc_config: paramId = %d, val = %d\n", grc_param, val); 55033b86bd07SSudarsana Reddy Kalluru 55043b86bd07SSudarsana Reddy Kalluru status = qed_dbg_dev_init(p_hwfn, p_ptt); 55053b86bd07SSudarsana Reddy Kalluru if (status != DBG_STATUS_OK) 55063b86bd07SSudarsana Reddy Kalluru return status; 55073b86bd07SSudarsana Reddy Kalluru 55083b86bd07SSudarsana Reddy Kalluru /* Initializes the GRC parameters (if not initialized). Needed in order 55093b86bd07SSudarsana Reddy Kalluru * to set the default parameter values for the first time. 55103b86bd07SSudarsana Reddy Kalluru */ 55113b86bd07SSudarsana Reddy Kalluru qed_dbg_grc_init_params(p_hwfn); 55123b86bd07SSudarsana Reddy Kalluru 55133b86bd07SSudarsana Reddy Kalluru if (grc_param >= MAX_DBG_GRC_PARAMS) 55143b86bd07SSudarsana Reddy Kalluru return DBG_STATUS_INVALID_ARGS; 55153b86bd07SSudarsana Reddy Kalluru if (val < s_grc_param_defs[grc_param].min || 55163b86bd07SSudarsana Reddy Kalluru val > s_grc_param_defs[grc_param].max) 55173b86bd07SSudarsana Reddy Kalluru return DBG_STATUS_INVALID_ARGS; 55183b86bd07SSudarsana Reddy Kalluru 55193b86bd07SSudarsana Reddy Kalluru if (s_grc_param_defs[grc_param].is_preset) { 55203b86bd07SSudarsana Reddy Kalluru /* Preset param */ 55213b86bd07SSudarsana Reddy Kalluru 55223b86bd07SSudarsana Reddy Kalluru /* Disabling a preset is not allowed. Call 55233b86bd07SSudarsana Reddy Kalluru * dbg_grc_set_params_default instead. 55243b86bd07SSudarsana Reddy Kalluru */ 55253b86bd07SSudarsana Reddy Kalluru if (!val) 55263b86bd07SSudarsana Reddy Kalluru return DBG_STATUS_INVALID_ARGS; 55273b86bd07SSudarsana Reddy Kalluru 55283b86bd07SSudarsana Reddy Kalluru /* Update all params with the preset values */ 55293b86bd07SSudarsana Reddy Kalluru for (i = 0; i < MAX_DBG_GRC_PARAMS; i++) { 55303b86bd07SSudarsana Reddy Kalluru u32 preset_val; 55313b86bd07SSudarsana Reddy Kalluru 55323b86bd07SSudarsana Reddy Kalluru /* Skip persistent params */ 55333b86bd07SSudarsana Reddy Kalluru if (s_grc_param_defs[i].is_persistent) 55343b86bd07SSudarsana Reddy Kalluru continue; 55353b86bd07SSudarsana Reddy Kalluru 55363b86bd07SSudarsana Reddy Kalluru /* Find preset value */ 55373b86bd07SSudarsana Reddy Kalluru if (grc_param == DBG_GRC_PARAM_EXCLUDE_ALL) 55383b86bd07SSudarsana Reddy Kalluru preset_val = 55393b86bd07SSudarsana Reddy Kalluru s_grc_param_defs[i].exclude_all_preset_val; 55403b86bd07SSudarsana Reddy Kalluru else if (grc_param == DBG_GRC_PARAM_CRASH) 55413b86bd07SSudarsana Reddy Kalluru preset_val = 55423b86bd07SSudarsana Reddy Kalluru s_grc_param_defs[i].crash_preset_val; 55433b86bd07SSudarsana Reddy Kalluru else 55443b86bd07SSudarsana Reddy Kalluru return DBG_STATUS_INVALID_ARGS; 55453b86bd07SSudarsana Reddy Kalluru 55463b86bd07SSudarsana Reddy Kalluru qed_grc_set_param(p_hwfn, 55473b86bd07SSudarsana Reddy Kalluru (enum dbg_grc_params)i, preset_val); 55483b86bd07SSudarsana Reddy Kalluru } 55493b86bd07SSudarsana Reddy Kalluru } else { 55503b86bd07SSudarsana Reddy Kalluru /* Regular param - set its value */ 55513b86bd07SSudarsana Reddy Kalluru qed_grc_set_param(p_hwfn, grc_param, val); 55523b86bd07SSudarsana Reddy Kalluru } 55533b86bd07SSudarsana Reddy Kalluru 55543b86bd07SSudarsana Reddy Kalluru return DBG_STATUS_OK; 55553b86bd07SSudarsana Reddy Kalluru } 55563b86bd07SSudarsana Reddy Kalluru 5557be086e7cSMintz, Yuval /* Assign default GRC param values */ 5558be086e7cSMintz, Yuval void qed_dbg_grc_set_params_default(struct qed_hwfn *p_hwfn) 5559be086e7cSMintz, Yuval { 5560be086e7cSMintz, Yuval struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 5561be086e7cSMintz, Yuval u32 i; 5562be086e7cSMintz, Yuval 5563be086e7cSMintz, Yuval for (i = 0; i < MAX_DBG_GRC_PARAMS; i++) 556450bc60cbSMichal Kalderon if (!s_grc_param_defs[i].is_persistent) 5565be086e7cSMintz, Yuval dev_data->grc.param_val[i] = 5566be086e7cSMintz, Yuval s_grc_param_defs[i].default_val[dev_data->chip_id]; 5567be086e7cSMintz, Yuval } 5568be086e7cSMintz, Yuval 5569c965db44STomer Tayar enum dbg_status qed_dbg_grc_get_dump_buf_size(struct qed_hwfn *p_hwfn, 5570c965db44STomer Tayar struct qed_ptt *p_ptt, 5571c965db44STomer Tayar u32 *buf_size) 5572c965db44STomer Tayar { 5573c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 5574c965db44STomer Tayar 5575c965db44STomer Tayar *buf_size = 0; 55767b6859fbSMintz, Yuval 5577c965db44STomer Tayar if (status != DBG_STATUS_OK) 5578c965db44STomer Tayar return status; 55797b6859fbSMintz, Yuval 5580c965db44STomer Tayar if (!s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr || 5581c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_DUMP_REG].ptr || 5582c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_DUMP_MEM].ptr || 5583c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_ATTN_BLOCKS].ptr || 5584c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_ATTN_REGS].ptr) 5585c965db44STomer Tayar return DBG_STATUS_DBG_ARRAY_NOT_SET; 55867b6859fbSMintz, Yuval 5587c965db44STomer Tayar return qed_grc_dump(p_hwfn, p_ptt, NULL, false, buf_size); 5588c965db44STomer Tayar } 5589c965db44STomer Tayar 5590c965db44STomer Tayar enum dbg_status qed_dbg_grc_dump(struct qed_hwfn *p_hwfn, 5591c965db44STomer Tayar struct qed_ptt *p_ptt, 5592c965db44STomer Tayar u32 *dump_buf, 5593c965db44STomer Tayar u32 buf_size_in_dwords, 5594c965db44STomer Tayar u32 *num_dumped_dwords) 5595c965db44STomer Tayar { 5596c965db44STomer Tayar u32 needed_buf_size_in_dwords; 5597c965db44STomer Tayar enum dbg_status status; 5598c965db44STomer Tayar 5599c965db44STomer Tayar *num_dumped_dwords = 0; 56007b6859fbSMintz, Yuval 56017b6859fbSMintz, Yuval status = qed_dbg_grc_get_dump_buf_size(p_hwfn, 56027b6859fbSMintz, Yuval p_ptt, 56037b6859fbSMintz, Yuval &needed_buf_size_in_dwords); 5604c965db44STomer Tayar if (status != DBG_STATUS_OK) 5605c965db44STomer Tayar return status; 56067b6859fbSMintz, Yuval 5607c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 5608c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 5609c965db44STomer Tayar 5610c965db44STomer Tayar /* GRC Dump */ 5611c965db44STomer Tayar status = qed_grc_dump(p_hwfn, p_ptt, dump_buf, true, num_dumped_dwords); 5612c965db44STomer Tayar 5613be086e7cSMintz, Yuval /* Revert GRC params to their default */ 5614be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 5615be086e7cSMintz, Yuval 5616c965db44STomer Tayar return status; 5617c965db44STomer Tayar } 5618c965db44STomer Tayar 5619c965db44STomer Tayar enum dbg_status qed_dbg_idle_chk_get_dump_buf_size(struct qed_hwfn *p_hwfn, 5620c965db44STomer Tayar struct qed_ptt *p_ptt, 5621c965db44STomer Tayar u32 *buf_size) 5622c965db44STomer Tayar { 5623c965db44STomer Tayar struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 56247b6859fbSMintz, Yuval struct idle_chk_data *idle_chk; 56257b6859fbSMintz, Yuval enum dbg_status status; 5626c965db44STomer Tayar 56277b6859fbSMintz, Yuval idle_chk = &dev_data->idle_chk; 5628c965db44STomer Tayar *buf_size = 0; 56297b6859fbSMintz, Yuval 56307b6859fbSMintz, Yuval status = qed_dbg_dev_init(p_hwfn, p_ptt); 5631c965db44STomer Tayar if (status != DBG_STATUS_OK) 5632c965db44STomer Tayar return status; 56337b6859fbSMintz, Yuval 5634c965db44STomer Tayar if (!s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr || 5635c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr || 5636c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_IMMS].ptr || 5637c965db44STomer Tayar !s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_RULES].ptr) 5638c965db44STomer Tayar return DBG_STATUS_DBG_ARRAY_NOT_SET; 56397b6859fbSMintz, Yuval 56407b6859fbSMintz, Yuval if (!idle_chk->buf_size_set) { 56417b6859fbSMintz, Yuval idle_chk->buf_size = qed_idle_chk_dump(p_hwfn, 56427b6859fbSMintz, Yuval p_ptt, NULL, false); 56437b6859fbSMintz, Yuval idle_chk->buf_size_set = true; 5644c965db44STomer Tayar } 5645c965db44STomer Tayar 56467b6859fbSMintz, Yuval *buf_size = idle_chk->buf_size; 56477b6859fbSMintz, Yuval 5648c965db44STomer Tayar return DBG_STATUS_OK; 5649c965db44STomer Tayar } 5650c965db44STomer Tayar 5651c965db44STomer Tayar enum dbg_status qed_dbg_idle_chk_dump(struct qed_hwfn *p_hwfn, 5652c965db44STomer Tayar struct qed_ptt *p_ptt, 5653c965db44STomer Tayar u32 *dump_buf, 5654c965db44STomer Tayar u32 buf_size_in_dwords, 5655c965db44STomer Tayar u32 *num_dumped_dwords) 5656c965db44STomer Tayar { 5657c965db44STomer Tayar u32 needed_buf_size_in_dwords; 5658c965db44STomer Tayar enum dbg_status status; 5659c965db44STomer Tayar 5660c965db44STomer Tayar *num_dumped_dwords = 0; 56617b6859fbSMintz, Yuval 56627b6859fbSMintz, Yuval status = qed_dbg_idle_chk_get_dump_buf_size(p_hwfn, 56637b6859fbSMintz, Yuval p_ptt, 56647b6859fbSMintz, Yuval &needed_buf_size_in_dwords); 5665c965db44STomer Tayar if (status != DBG_STATUS_OK) 5666c965db44STomer Tayar return status; 56677b6859fbSMintz, Yuval 5668c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 5669c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 5670c965db44STomer Tayar 5671c965db44STomer Tayar /* Update reset state */ 5672c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 5673c965db44STomer Tayar 5674c965db44STomer Tayar /* Idle Check Dump */ 5675c965db44STomer Tayar *num_dumped_dwords = qed_idle_chk_dump(p_hwfn, p_ptt, dump_buf, true); 5676be086e7cSMintz, Yuval 5677be086e7cSMintz, Yuval /* Revert GRC params to their default */ 5678be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 5679be086e7cSMintz, Yuval 5680c965db44STomer Tayar return DBG_STATUS_OK; 5681c965db44STomer Tayar } 5682c965db44STomer Tayar 5683c965db44STomer Tayar enum dbg_status qed_dbg_mcp_trace_get_dump_buf_size(struct qed_hwfn *p_hwfn, 5684c965db44STomer Tayar struct qed_ptt *p_ptt, 5685c965db44STomer Tayar u32 *buf_size) 5686c965db44STomer Tayar { 5687c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 5688c965db44STomer Tayar 5689c965db44STomer Tayar *buf_size = 0; 56907b6859fbSMintz, Yuval 5691c965db44STomer Tayar if (status != DBG_STATUS_OK) 5692c965db44STomer Tayar return status; 56937b6859fbSMintz, Yuval 5694c965db44STomer Tayar return qed_mcp_trace_dump(p_hwfn, p_ptt, NULL, false, buf_size); 5695c965db44STomer Tayar } 5696c965db44STomer Tayar 5697c965db44STomer Tayar enum dbg_status qed_dbg_mcp_trace_dump(struct qed_hwfn *p_hwfn, 5698c965db44STomer Tayar struct qed_ptt *p_ptt, 5699c965db44STomer Tayar u32 *dump_buf, 5700c965db44STomer Tayar u32 buf_size_in_dwords, 5701c965db44STomer Tayar u32 *num_dumped_dwords) 5702c965db44STomer Tayar { 5703c965db44STomer Tayar u32 needed_buf_size_in_dwords; 5704c965db44STomer Tayar enum dbg_status status; 5705c965db44STomer Tayar 5706be086e7cSMintz, Yuval status = 57077b6859fbSMintz, Yuval qed_dbg_mcp_trace_get_dump_buf_size(p_hwfn, 57087b6859fbSMintz, Yuval p_ptt, 5709c965db44STomer Tayar &needed_buf_size_in_dwords); 57107b6859fbSMintz, Yuval if (status != DBG_STATUS_OK && status != 57117b6859fbSMintz, Yuval DBG_STATUS_NVRAM_GET_IMAGE_FAILED) 5712c965db44STomer Tayar return status; 5713be086e7cSMintz, Yuval 5714c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 5715c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 5716c965db44STomer Tayar 5717c965db44STomer Tayar /* Update reset state */ 5718c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 5719c965db44STomer Tayar 5720c965db44STomer Tayar /* Perform dump */ 5721be086e7cSMintz, Yuval status = qed_mcp_trace_dump(p_hwfn, 5722c965db44STomer Tayar p_ptt, dump_buf, true, num_dumped_dwords); 5723be086e7cSMintz, Yuval 5724be086e7cSMintz, Yuval /* Revert GRC params to their default */ 5725be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 5726be086e7cSMintz, Yuval 5727be086e7cSMintz, Yuval return status; 5728c965db44STomer Tayar } 5729c965db44STomer Tayar 5730c965db44STomer Tayar enum dbg_status qed_dbg_reg_fifo_get_dump_buf_size(struct qed_hwfn *p_hwfn, 5731c965db44STomer Tayar struct qed_ptt *p_ptt, 5732c965db44STomer Tayar u32 *buf_size) 5733c965db44STomer Tayar { 5734c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 5735c965db44STomer Tayar 5736c965db44STomer Tayar *buf_size = 0; 57377b6859fbSMintz, Yuval 5738c965db44STomer Tayar if (status != DBG_STATUS_OK) 5739c965db44STomer Tayar return status; 57407b6859fbSMintz, Yuval 5741c965db44STomer Tayar return qed_reg_fifo_dump(p_hwfn, p_ptt, NULL, false, buf_size); 5742c965db44STomer Tayar } 5743c965db44STomer Tayar 5744c965db44STomer Tayar enum dbg_status qed_dbg_reg_fifo_dump(struct qed_hwfn *p_hwfn, 5745c965db44STomer Tayar struct qed_ptt *p_ptt, 5746c965db44STomer Tayar u32 *dump_buf, 5747c965db44STomer Tayar u32 buf_size_in_dwords, 5748c965db44STomer Tayar u32 *num_dumped_dwords) 5749c965db44STomer Tayar { 5750c965db44STomer Tayar u32 needed_buf_size_in_dwords; 5751c965db44STomer Tayar enum dbg_status status; 5752c965db44STomer Tayar 5753c965db44STomer Tayar *num_dumped_dwords = 0; 57547b6859fbSMintz, Yuval 57557b6859fbSMintz, Yuval status = qed_dbg_reg_fifo_get_dump_buf_size(p_hwfn, 57567b6859fbSMintz, Yuval p_ptt, 57577b6859fbSMintz, Yuval &needed_buf_size_in_dwords); 5758c965db44STomer Tayar if (status != DBG_STATUS_OK) 5759c965db44STomer Tayar return status; 57607b6859fbSMintz, Yuval 5761c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 5762c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 5763c965db44STomer Tayar 5764c965db44STomer Tayar /* Update reset state */ 5765c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 5766be086e7cSMintz, Yuval 5767be086e7cSMintz, Yuval status = qed_reg_fifo_dump(p_hwfn, 5768c965db44STomer Tayar p_ptt, dump_buf, true, num_dumped_dwords); 5769be086e7cSMintz, Yuval 5770be086e7cSMintz, Yuval /* Revert GRC params to their default */ 5771be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 5772be086e7cSMintz, Yuval 5773be086e7cSMintz, Yuval return status; 5774c965db44STomer Tayar } 5775c965db44STomer Tayar 5776c965db44STomer Tayar enum dbg_status qed_dbg_igu_fifo_get_dump_buf_size(struct qed_hwfn *p_hwfn, 5777c965db44STomer Tayar struct qed_ptt *p_ptt, 5778c965db44STomer Tayar u32 *buf_size) 5779c965db44STomer Tayar { 5780c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 5781c965db44STomer Tayar 5782c965db44STomer Tayar *buf_size = 0; 57837b6859fbSMintz, Yuval 5784c965db44STomer Tayar if (status != DBG_STATUS_OK) 5785c965db44STomer Tayar return status; 57867b6859fbSMintz, Yuval 5787c965db44STomer Tayar return qed_igu_fifo_dump(p_hwfn, p_ptt, NULL, false, buf_size); 5788c965db44STomer Tayar } 5789c965db44STomer Tayar 5790c965db44STomer Tayar enum dbg_status qed_dbg_igu_fifo_dump(struct qed_hwfn *p_hwfn, 5791c965db44STomer Tayar struct qed_ptt *p_ptt, 5792c965db44STomer Tayar u32 *dump_buf, 5793c965db44STomer Tayar u32 buf_size_in_dwords, 5794c965db44STomer Tayar u32 *num_dumped_dwords) 5795c965db44STomer Tayar { 5796c965db44STomer Tayar u32 needed_buf_size_in_dwords; 5797c965db44STomer Tayar enum dbg_status status; 5798c965db44STomer Tayar 5799c965db44STomer Tayar *num_dumped_dwords = 0; 58007b6859fbSMintz, Yuval 58017b6859fbSMintz, Yuval status = qed_dbg_igu_fifo_get_dump_buf_size(p_hwfn, 58027b6859fbSMintz, Yuval p_ptt, 58037b6859fbSMintz, Yuval &needed_buf_size_in_dwords); 5804c965db44STomer Tayar if (status != DBG_STATUS_OK) 5805c965db44STomer Tayar return status; 58067b6859fbSMintz, Yuval 5807c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 5808c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 5809c965db44STomer Tayar 5810c965db44STomer Tayar /* Update reset state */ 5811c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 5812be086e7cSMintz, Yuval 5813be086e7cSMintz, Yuval status = qed_igu_fifo_dump(p_hwfn, 5814c965db44STomer Tayar p_ptt, dump_buf, true, num_dumped_dwords); 5815be086e7cSMintz, Yuval /* Revert GRC params to their default */ 5816be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 5817be086e7cSMintz, Yuval 5818be086e7cSMintz, Yuval return status; 5819c965db44STomer Tayar } 5820c965db44STomer Tayar 5821c965db44STomer Tayar enum dbg_status 5822c965db44STomer Tayar qed_dbg_protection_override_get_dump_buf_size(struct qed_hwfn *p_hwfn, 5823c965db44STomer Tayar struct qed_ptt *p_ptt, 5824c965db44STomer Tayar u32 *buf_size) 5825c965db44STomer Tayar { 5826c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 5827c965db44STomer Tayar 5828c965db44STomer Tayar *buf_size = 0; 58297b6859fbSMintz, Yuval 5830c965db44STomer Tayar if (status != DBG_STATUS_OK) 5831c965db44STomer Tayar return status; 58327b6859fbSMintz, Yuval 5833c965db44STomer Tayar return qed_protection_override_dump(p_hwfn, 5834c965db44STomer Tayar p_ptt, NULL, false, buf_size); 5835c965db44STomer Tayar } 5836c965db44STomer Tayar 5837c965db44STomer Tayar enum dbg_status qed_dbg_protection_override_dump(struct qed_hwfn *p_hwfn, 5838c965db44STomer Tayar struct qed_ptt *p_ptt, 5839c965db44STomer Tayar u32 *dump_buf, 5840c965db44STomer Tayar u32 buf_size_in_dwords, 5841c965db44STomer Tayar u32 *num_dumped_dwords) 5842c965db44STomer Tayar { 58437b6859fbSMintz, Yuval u32 needed_buf_size_in_dwords, *p_size = &needed_buf_size_in_dwords; 5844c965db44STomer Tayar enum dbg_status status; 5845c965db44STomer Tayar 5846c965db44STomer Tayar *num_dumped_dwords = 0; 58477b6859fbSMintz, Yuval 58487b6859fbSMintz, Yuval status = 58497b6859fbSMintz, Yuval qed_dbg_protection_override_get_dump_buf_size(p_hwfn, 58507b6859fbSMintz, Yuval p_ptt, 58517b6859fbSMintz, Yuval p_size); 5852c965db44STomer Tayar if (status != DBG_STATUS_OK) 5853c965db44STomer Tayar return status; 58547b6859fbSMintz, Yuval 5855c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 5856c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 5857c965db44STomer Tayar 5858c965db44STomer Tayar /* Update reset state */ 5859c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 5860be086e7cSMintz, Yuval 5861be086e7cSMintz, Yuval status = qed_protection_override_dump(p_hwfn, 5862c965db44STomer Tayar p_ptt, 5863be086e7cSMintz, Yuval dump_buf, 5864be086e7cSMintz, Yuval true, num_dumped_dwords); 5865be086e7cSMintz, Yuval 5866be086e7cSMintz, Yuval /* Revert GRC params to their default */ 5867be086e7cSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 5868be086e7cSMintz, Yuval 5869be086e7cSMintz, Yuval return status; 5870c965db44STomer Tayar } 5871c965db44STomer Tayar 5872c965db44STomer Tayar enum dbg_status qed_dbg_fw_asserts_get_dump_buf_size(struct qed_hwfn *p_hwfn, 5873c965db44STomer Tayar struct qed_ptt *p_ptt, 5874c965db44STomer Tayar u32 *buf_size) 5875c965db44STomer Tayar { 5876c965db44STomer Tayar enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 5877c965db44STomer Tayar 5878c965db44STomer Tayar *buf_size = 0; 58797b6859fbSMintz, Yuval 5880c965db44STomer Tayar if (status != DBG_STATUS_OK) 5881c965db44STomer Tayar return status; 5882c965db44STomer Tayar 5883c965db44STomer Tayar /* Update reset state */ 5884c965db44STomer Tayar qed_update_blocks_reset_state(p_hwfn, p_ptt); 58857b6859fbSMintz, Yuval 5886c965db44STomer Tayar *buf_size = qed_fw_asserts_dump(p_hwfn, p_ptt, NULL, false); 58877b6859fbSMintz, Yuval 5888c965db44STomer Tayar return DBG_STATUS_OK; 5889c965db44STomer Tayar } 5890c965db44STomer Tayar 5891c965db44STomer Tayar enum dbg_status qed_dbg_fw_asserts_dump(struct qed_hwfn *p_hwfn, 5892c965db44STomer Tayar struct qed_ptt *p_ptt, 5893c965db44STomer Tayar u32 *dump_buf, 5894c965db44STomer Tayar u32 buf_size_in_dwords, 5895c965db44STomer Tayar u32 *num_dumped_dwords) 5896c965db44STomer Tayar { 58977b6859fbSMintz, Yuval u32 needed_buf_size_in_dwords, *p_size = &needed_buf_size_in_dwords; 5898c965db44STomer Tayar enum dbg_status status; 5899c965db44STomer Tayar 5900c965db44STomer Tayar *num_dumped_dwords = 0; 59017b6859fbSMintz, Yuval 59027b6859fbSMintz, Yuval status = 59037b6859fbSMintz, Yuval qed_dbg_fw_asserts_get_dump_buf_size(p_hwfn, 59047b6859fbSMintz, Yuval p_ptt, 59057b6859fbSMintz, Yuval p_size); 5906c965db44STomer Tayar if (status != DBG_STATUS_OK) 5907c965db44STomer Tayar return status; 59087b6859fbSMintz, Yuval 5909c965db44STomer Tayar if (buf_size_in_dwords < needed_buf_size_in_dwords) 5910c965db44STomer Tayar return DBG_STATUS_DUMP_BUF_TOO_SMALL; 5911c965db44STomer Tayar 5912c965db44STomer Tayar *num_dumped_dwords = qed_fw_asserts_dump(p_hwfn, p_ptt, dump_buf, true); 59137b6859fbSMintz, Yuval 59147b6859fbSMintz, Yuval /* Revert GRC params to their default */ 59157b6859fbSMintz, Yuval qed_dbg_grc_set_params_default(p_hwfn); 59167b6859fbSMintz, Yuval 5917c965db44STomer Tayar return DBG_STATUS_OK; 5918c965db44STomer Tayar } 5919c965db44STomer Tayar 59208a52bbabSMichal Kalderon static enum dbg_status qed_dbg_ilt_get_dump_buf_size(struct qed_hwfn *p_hwfn, 59218a52bbabSMichal Kalderon struct qed_ptt *p_ptt, 59228a52bbabSMichal Kalderon u32 *buf_size) 59238a52bbabSMichal Kalderon { 59248a52bbabSMichal Kalderon enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 59258a52bbabSMichal Kalderon 59268a52bbabSMichal Kalderon *buf_size = 0; 59278a52bbabSMichal Kalderon 59288a52bbabSMichal Kalderon if (status != DBG_STATUS_OK) 59298a52bbabSMichal Kalderon return status; 59308a52bbabSMichal Kalderon 59318a52bbabSMichal Kalderon *buf_size = qed_ilt_dump(p_hwfn, p_ptt, NULL, false); 59328a52bbabSMichal Kalderon 59338a52bbabSMichal Kalderon return DBG_STATUS_OK; 59348a52bbabSMichal Kalderon } 59358a52bbabSMichal Kalderon 59368a52bbabSMichal Kalderon static enum dbg_status qed_dbg_ilt_dump(struct qed_hwfn *p_hwfn, 59378a52bbabSMichal Kalderon struct qed_ptt *p_ptt, 59388a52bbabSMichal Kalderon u32 *dump_buf, 59398a52bbabSMichal Kalderon u32 buf_size_in_dwords, 59408a52bbabSMichal Kalderon u32 *num_dumped_dwords) 59418a52bbabSMichal Kalderon { 59428a52bbabSMichal Kalderon u32 needed_buf_size_in_dwords; 59438a52bbabSMichal Kalderon enum dbg_status status; 59448a52bbabSMichal Kalderon 59458a52bbabSMichal Kalderon *num_dumped_dwords = 0; 59468a52bbabSMichal Kalderon 59478a52bbabSMichal Kalderon status = qed_dbg_ilt_get_dump_buf_size(p_hwfn, 59488a52bbabSMichal Kalderon p_ptt, 59498a52bbabSMichal Kalderon &needed_buf_size_in_dwords); 59508a52bbabSMichal Kalderon if (status != DBG_STATUS_OK) 59518a52bbabSMichal Kalderon return status; 59528a52bbabSMichal Kalderon 59538a52bbabSMichal Kalderon if (buf_size_in_dwords < needed_buf_size_in_dwords) 59548a52bbabSMichal Kalderon return DBG_STATUS_DUMP_BUF_TOO_SMALL; 59558a52bbabSMichal Kalderon 59568a52bbabSMichal Kalderon *num_dumped_dwords = qed_ilt_dump(p_hwfn, p_ptt, dump_buf, true); 59578a52bbabSMichal Kalderon 59588a52bbabSMichal Kalderon /* Reveret GRC params to their default */ 59598a52bbabSMichal Kalderon qed_dbg_grc_set_params_default(p_hwfn); 59608a52bbabSMichal Kalderon 59618a52bbabSMichal Kalderon return DBG_STATUS_OK; 59628a52bbabSMichal Kalderon } 59638a52bbabSMichal Kalderon 59640ebbd1c8SMintz, Yuval enum dbg_status qed_dbg_read_attn(struct qed_hwfn *p_hwfn, 59650ebbd1c8SMintz, Yuval struct qed_ptt *p_ptt, 59660ebbd1c8SMintz, Yuval enum block_id block_id, 59670ebbd1c8SMintz, Yuval enum dbg_attn_type attn_type, 59680ebbd1c8SMintz, Yuval bool clear_status, 59690ebbd1c8SMintz, Yuval struct dbg_attn_block_result *results) 59700ebbd1c8SMintz, Yuval { 59710ebbd1c8SMintz, Yuval enum dbg_status status = qed_dbg_dev_init(p_hwfn, p_ptt); 59720ebbd1c8SMintz, Yuval u8 reg_idx, num_attn_regs, num_result_regs = 0; 59730ebbd1c8SMintz, Yuval const struct dbg_attn_reg *attn_reg_arr; 59740ebbd1c8SMintz, Yuval 59750ebbd1c8SMintz, Yuval if (status != DBG_STATUS_OK) 59760ebbd1c8SMintz, Yuval return status; 59770ebbd1c8SMintz, Yuval 59780ebbd1c8SMintz, Yuval if (!s_dbg_arrays[BIN_BUF_DBG_MODE_TREE].ptr || 59790ebbd1c8SMintz, Yuval !s_dbg_arrays[BIN_BUF_DBG_ATTN_BLOCKS].ptr || 59800ebbd1c8SMintz, Yuval !s_dbg_arrays[BIN_BUF_DBG_ATTN_REGS].ptr) 59810ebbd1c8SMintz, Yuval return DBG_STATUS_DBG_ARRAY_NOT_SET; 59820ebbd1c8SMintz, Yuval 59830ebbd1c8SMintz, Yuval attn_reg_arr = qed_get_block_attn_regs(block_id, 59840ebbd1c8SMintz, Yuval attn_type, &num_attn_regs); 59850ebbd1c8SMintz, Yuval 59860ebbd1c8SMintz, Yuval for (reg_idx = 0; reg_idx < num_attn_regs; reg_idx++) { 59870ebbd1c8SMintz, Yuval const struct dbg_attn_reg *reg_data = &attn_reg_arr[reg_idx]; 59880ebbd1c8SMintz, Yuval struct dbg_attn_reg_result *reg_result; 59890ebbd1c8SMintz, Yuval u32 sts_addr, sts_val; 59900ebbd1c8SMintz, Yuval u16 modes_buf_offset; 59910ebbd1c8SMintz, Yuval bool eval_mode; 59920ebbd1c8SMintz, Yuval 59930ebbd1c8SMintz, Yuval /* Check mode */ 59940ebbd1c8SMintz, Yuval eval_mode = GET_FIELD(reg_data->mode.data, 59950ebbd1c8SMintz, Yuval DBG_MODE_HDR_EVAL_MODE) > 0; 59960ebbd1c8SMintz, Yuval modes_buf_offset = GET_FIELD(reg_data->mode.data, 59970ebbd1c8SMintz, Yuval DBG_MODE_HDR_MODES_BUF_OFFSET); 59980ebbd1c8SMintz, Yuval if (eval_mode && !qed_is_mode_match(p_hwfn, &modes_buf_offset)) 59990ebbd1c8SMintz, Yuval continue; 60000ebbd1c8SMintz, Yuval 60010ebbd1c8SMintz, Yuval /* Mode match - read attention status register */ 60020ebbd1c8SMintz, Yuval sts_addr = DWORDS_TO_BYTES(clear_status ? 60030ebbd1c8SMintz, Yuval reg_data->sts_clr_address : 60040ebbd1c8SMintz, Yuval GET_FIELD(reg_data->data, 60050ebbd1c8SMintz, Yuval DBG_ATTN_REG_STS_ADDRESS)); 60060ebbd1c8SMintz, Yuval sts_val = qed_rd(p_hwfn, p_ptt, sts_addr); 60070ebbd1c8SMintz, Yuval if (!sts_val) 60080ebbd1c8SMintz, Yuval continue; 60090ebbd1c8SMintz, Yuval 60100ebbd1c8SMintz, Yuval /* Non-zero attention status - add to results */ 60110ebbd1c8SMintz, Yuval reg_result = &results->reg_results[num_result_regs]; 60120ebbd1c8SMintz, Yuval SET_FIELD(reg_result->data, 60130ebbd1c8SMintz, Yuval DBG_ATTN_REG_RESULT_STS_ADDRESS, sts_addr); 60140ebbd1c8SMintz, Yuval SET_FIELD(reg_result->data, 60150ebbd1c8SMintz, Yuval DBG_ATTN_REG_RESULT_NUM_REG_ATTN, 60160ebbd1c8SMintz, Yuval GET_FIELD(reg_data->data, DBG_ATTN_REG_NUM_REG_ATTN)); 60170ebbd1c8SMintz, Yuval reg_result->block_attn_offset = reg_data->block_attn_offset; 60180ebbd1c8SMintz, Yuval reg_result->sts_val = sts_val; 60190ebbd1c8SMintz, Yuval reg_result->mask_val = qed_rd(p_hwfn, 60200ebbd1c8SMintz, Yuval p_ptt, 60210ebbd1c8SMintz, Yuval DWORDS_TO_BYTES 60220ebbd1c8SMintz, Yuval (reg_data->mask_address)); 60230ebbd1c8SMintz, Yuval num_result_regs++; 60240ebbd1c8SMintz, Yuval } 60250ebbd1c8SMintz, Yuval 60260ebbd1c8SMintz, Yuval results->block_id = (u8)block_id; 60270ebbd1c8SMintz, Yuval results->names_offset = 60280ebbd1c8SMintz, Yuval qed_get_block_attn_data(block_id, attn_type)->names_offset; 60290ebbd1c8SMintz, Yuval SET_FIELD(results->data, DBG_ATTN_BLOCK_RESULT_ATTN_TYPE, attn_type); 60300ebbd1c8SMintz, Yuval SET_FIELD(results->data, 60310ebbd1c8SMintz, Yuval DBG_ATTN_BLOCK_RESULT_NUM_REGS, num_result_regs); 60320ebbd1c8SMintz, Yuval 60330ebbd1c8SMintz, Yuval return DBG_STATUS_OK; 60340ebbd1c8SMintz, Yuval } 60350ebbd1c8SMintz, Yuval 6036c965db44STomer Tayar /******************************* Data Types **********************************/ 6037c965db44STomer Tayar 60380ebbd1c8SMintz, Yuval struct block_info { 60390ebbd1c8SMintz, Yuval const char *name; 60400ebbd1c8SMintz, Yuval enum block_id id; 60410ebbd1c8SMintz, Yuval }; 60420ebbd1c8SMintz, Yuval 60437b6859fbSMintz, Yuval /* REG fifo element */ 6044c965db44STomer Tayar struct reg_fifo_element { 6045c965db44STomer Tayar u64 data; 6046c965db44STomer Tayar #define REG_FIFO_ELEMENT_ADDRESS_SHIFT 0 6047c965db44STomer Tayar #define REG_FIFO_ELEMENT_ADDRESS_MASK 0x7fffff 6048c965db44STomer Tayar #define REG_FIFO_ELEMENT_ACCESS_SHIFT 23 6049c965db44STomer Tayar #define REG_FIFO_ELEMENT_ACCESS_MASK 0x1 6050c965db44STomer Tayar #define REG_FIFO_ELEMENT_PF_SHIFT 24 6051c965db44STomer Tayar #define REG_FIFO_ELEMENT_PF_MASK 0xf 6052c965db44STomer Tayar #define REG_FIFO_ELEMENT_VF_SHIFT 28 6053c965db44STomer Tayar #define REG_FIFO_ELEMENT_VF_MASK 0xff 6054c965db44STomer Tayar #define REG_FIFO_ELEMENT_PORT_SHIFT 36 6055c965db44STomer Tayar #define REG_FIFO_ELEMENT_PORT_MASK 0x3 6056c965db44STomer Tayar #define REG_FIFO_ELEMENT_PRIVILEGE_SHIFT 38 6057c965db44STomer Tayar #define REG_FIFO_ELEMENT_PRIVILEGE_MASK 0x3 6058c965db44STomer Tayar #define REG_FIFO_ELEMENT_PROTECTION_SHIFT 40 6059c965db44STomer Tayar #define REG_FIFO_ELEMENT_PROTECTION_MASK 0x7 6060c965db44STomer Tayar #define REG_FIFO_ELEMENT_MASTER_SHIFT 43 6061c965db44STomer Tayar #define REG_FIFO_ELEMENT_MASTER_MASK 0xf 6062c965db44STomer Tayar #define REG_FIFO_ELEMENT_ERROR_SHIFT 47 6063c965db44STomer Tayar #define REG_FIFO_ELEMENT_ERROR_MASK 0x1f 6064c965db44STomer Tayar }; 6065c965db44STomer Tayar 6066c965db44STomer Tayar /* IGU fifo element */ 6067c965db44STomer Tayar struct igu_fifo_element { 6068c965db44STomer Tayar u32 dword0; 6069c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_FID_SHIFT 0 6070c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_FID_MASK 0xff 6071c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_IS_PF_SHIFT 8 6072c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_IS_PF_MASK 0x1 6073c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_SOURCE_SHIFT 9 6074c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_SOURCE_MASK 0xf 6075c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_ERR_TYPE_SHIFT 13 6076c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_ERR_TYPE_MASK 0xf 6077c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_CMD_ADDR_SHIFT 17 6078c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD0_CMD_ADDR_MASK 0x7fff 6079c965db44STomer Tayar u32 dword1; 6080c965db44STomer Tayar u32 dword2; 6081c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD12_IS_WR_CMD_SHIFT 0 6082c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD12_IS_WR_CMD_MASK 0x1 6083c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD12_WR_DATA_SHIFT 1 6084c965db44STomer Tayar #define IGU_FIFO_ELEMENT_DWORD12_WR_DATA_MASK 0xffffffff 6085c965db44STomer Tayar u32 reserved; 6086c965db44STomer Tayar }; 6087c965db44STomer Tayar 6088c965db44STomer Tayar struct igu_fifo_wr_data { 6089c965db44STomer Tayar u32 data; 6090c965db44STomer Tayar #define IGU_FIFO_WR_DATA_PROD_CONS_SHIFT 0 6091c965db44STomer Tayar #define IGU_FIFO_WR_DATA_PROD_CONS_MASK 0xffffff 6092c965db44STomer Tayar #define IGU_FIFO_WR_DATA_UPDATE_FLAG_SHIFT 24 6093c965db44STomer Tayar #define IGU_FIFO_WR_DATA_UPDATE_FLAG_MASK 0x1 6094c965db44STomer Tayar #define IGU_FIFO_WR_DATA_EN_DIS_INT_FOR_SB_SHIFT 25 6095c965db44STomer Tayar #define IGU_FIFO_WR_DATA_EN_DIS_INT_FOR_SB_MASK 0x3 6096c965db44STomer Tayar #define IGU_FIFO_WR_DATA_SEGMENT_SHIFT 27 6097c965db44STomer Tayar #define IGU_FIFO_WR_DATA_SEGMENT_MASK 0x1 6098c965db44STomer Tayar #define IGU_FIFO_WR_DATA_TIMER_MASK_SHIFT 28 6099c965db44STomer Tayar #define IGU_FIFO_WR_DATA_TIMER_MASK_MASK 0x1 6100c965db44STomer Tayar #define IGU_FIFO_WR_DATA_CMD_TYPE_SHIFT 31 6101c965db44STomer Tayar #define IGU_FIFO_WR_DATA_CMD_TYPE_MASK 0x1 6102c965db44STomer Tayar }; 6103c965db44STomer Tayar 6104c965db44STomer Tayar struct igu_fifo_cleanup_wr_data { 6105c965db44STomer Tayar u32 data; 6106c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_RESERVED_SHIFT 0 6107c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_RESERVED_MASK 0x7ffffff 6108c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_VAL_SHIFT 27 6109c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_VAL_MASK 0x1 6110c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_TYPE_SHIFT 28 6111c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_TYPE_MASK 0x7 6112c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CMD_TYPE_SHIFT 31 6113c965db44STomer Tayar #define IGU_FIFO_CLEANUP_WR_DATA_CMD_TYPE_MASK 0x1 6114c965db44STomer Tayar }; 6115c965db44STomer Tayar 6116c965db44STomer Tayar /* Protection override element */ 6117c965db44STomer Tayar struct protection_override_element { 6118c965db44STomer Tayar u64 data; 6119c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_ADDRESS_SHIFT 0 6120c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_ADDRESS_MASK 0x7fffff 6121c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WINDOW_SIZE_SHIFT 23 6122c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WINDOW_SIZE_MASK 0xffffff 6123c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_READ_SHIFT 47 6124c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_READ_MASK 0x1 6125c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WRITE_SHIFT 48 6126c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WRITE_MASK 0x1 6127c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_READ_PROTECTION_SHIFT 49 6128c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_READ_PROTECTION_MASK 0x7 6129c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WRITE_PROTECTION_SHIFT 52 6130c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_WRITE_PROTECTION_MASK 0x7 6131c965db44STomer Tayar }; 6132c965db44STomer Tayar 6133c965db44STomer Tayar enum igu_fifo_sources { 6134c965db44STomer Tayar IGU_SRC_PXP0, 6135c965db44STomer Tayar IGU_SRC_PXP1, 6136c965db44STomer Tayar IGU_SRC_PXP2, 6137c965db44STomer Tayar IGU_SRC_PXP3, 6138c965db44STomer Tayar IGU_SRC_PXP4, 6139c965db44STomer Tayar IGU_SRC_PXP5, 6140c965db44STomer Tayar IGU_SRC_PXP6, 6141c965db44STomer Tayar IGU_SRC_PXP7, 6142c965db44STomer Tayar IGU_SRC_CAU, 6143c965db44STomer Tayar IGU_SRC_ATTN, 6144c965db44STomer Tayar IGU_SRC_GRC 6145c965db44STomer Tayar }; 6146c965db44STomer Tayar 6147c965db44STomer Tayar enum igu_fifo_addr_types { 6148c965db44STomer Tayar IGU_ADDR_TYPE_MSIX_MEM, 6149c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_PBA, 6150c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_INT_ACK, 6151c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_ATTN_BITS, 6152c965db44STomer Tayar IGU_ADDR_TYPE_READ_INT, 6153c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_PROD_UPDATE, 6154c965db44STomer Tayar IGU_ADDR_TYPE_RESERVED 6155c965db44STomer Tayar }; 6156c965db44STomer Tayar 6157c965db44STomer Tayar struct igu_fifo_addr_data { 6158c965db44STomer Tayar u16 start_addr; 6159c965db44STomer Tayar u16 end_addr; 6160c965db44STomer Tayar char *desc; 6161c965db44STomer Tayar char *vf_desc; 6162c965db44STomer Tayar enum igu_fifo_addr_types type; 6163c965db44STomer Tayar }; 6164c965db44STomer Tayar 6165a3f72307SDenis Bolotin struct mcp_trace_meta { 6166a3f72307SDenis Bolotin u32 modules_num; 6167a3f72307SDenis Bolotin char **modules; 6168a3f72307SDenis Bolotin u32 formats_num; 6169a3f72307SDenis Bolotin struct mcp_trace_format *formats; 6170a3f72307SDenis Bolotin bool is_allocated; 6171a3f72307SDenis Bolotin }; 6172a3f72307SDenis Bolotin 6173a3f72307SDenis Bolotin /* Debug Tools user data */ 6174a3f72307SDenis Bolotin struct dbg_tools_user_data { 6175a3f72307SDenis Bolotin struct mcp_trace_meta mcp_trace_meta; 6176a3f72307SDenis Bolotin const u32 *mcp_trace_user_meta_buf; 6177a3f72307SDenis Bolotin }; 6178a3f72307SDenis Bolotin 6179c965db44STomer Tayar /******************************** Constants **********************************/ 6180c965db44STomer Tayar 6181c965db44STomer Tayar #define MAX_MSG_LEN 1024 61827b6859fbSMintz, Yuval 6183c965db44STomer Tayar #define MCP_TRACE_MAX_MODULE_LEN 8 6184c965db44STomer Tayar #define MCP_TRACE_FORMAT_MAX_PARAMS 3 6185c965db44STomer Tayar #define MCP_TRACE_FORMAT_PARAM_WIDTH \ 6186c965db44STomer Tayar (MCP_TRACE_FORMAT_P2_SIZE_SHIFT - MCP_TRACE_FORMAT_P1_SIZE_SHIFT) 61877b6859fbSMintz, Yuval 6188c965db44STomer Tayar #define REG_FIFO_ELEMENT_ADDR_FACTOR 4 6189c965db44STomer Tayar #define REG_FIFO_ELEMENT_IS_PF_VF_VAL 127 61907b6859fbSMintz, Yuval 6191c965db44STomer Tayar #define PROTECTION_OVERRIDE_ELEMENT_ADDR_FACTOR 4 6192c965db44STomer Tayar 6193c965db44STomer Tayar /***************************** Constant Arrays *******************************/ 6194c965db44STomer Tayar 61957b6859fbSMintz, Yuval struct user_dbg_array { 61967b6859fbSMintz, Yuval const u32 *ptr; 61977b6859fbSMintz, Yuval u32 size_in_dwords; 61987b6859fbSMintz, Yuval }; 61997b6859fbSMintz, Yuval 62007b6859fbSMintz, Yuval /* Debug arrays */ 62017b6859fbSMintz, Yuval static struct user_dbg_array 62027b6859fbSMintz, Yuval s_user_dbg_arrays[MAX_BIN_DBG_BUFFER_TYPE] = { {NULL} }; 62037b6859fbSMintz, Yuval 62040ebbd1c8SMintz, Yuval /* Block names array */ 62050ebbd1c8SMintz, Yuval static struct block_info s_block_info_arr[] = { 62060ebbd1c8SMintz, Yuval {"grc", BLOCK_GRC}, 62070ebbd1c8SMintz, Yuval {"miscs", BLOCK_MISCS}, 62080ebbd1c8SMintz, Yuval {"misc", BLOCK_MISC}, 62090ebbd1c8SMintz, Yuval {"dbu", BLOCK_DBU}, 62100ebbd1c8SMintz, Yuval {"pglue_b", BLOCK_PGLUE_B}, 62110ebbd1c8SMintz, Yuval {"cnig", BLOCK_CNIG}, 62120ebbd1c8SMintz, Yuval {"cpmu", BLOCK_CPMU}, 62130ebbd1c8SMintz, Yuval {"ncsi", BLOCK_NCSI}, 62140ebbd1c8SMintz, Yuval {"opte", BLOCK_OPTE}, 62150ebbd1c8SMintz, Yuval {"bmb", BLOCK_BMB}, 62160ebbd1c8SMintz, Yuval {"pcie", BLOCK_PCIE}, 62170ebbd1c8SMintz, Yuval {"mcp", BLOCK_MCP}, 62180ebbd1c8SMintz, Yuval {"mcp2", BLOCK_MCP2}, 62190ebbd1c8SMintz, Yuval {"pswhst", BLOCK_PSWHST}, 62200ebbd1c8SMintz, Yuval {"pswhst2", BLOCK_PSWHST2}, 62210ebbd1c8SMintz, Yuval {"pswrd", BLOCK_PSWRD}, 62220ebbd1c8SMintz, Yuval {"pswrd2", BLOCK_PSWRD2}, 62230ebbd1c8SMintz, Yuval {"pswwr", BLOCK_PSWWR}, 62240ebbd1c8SMintz, Yuval {"pswwr2", BLOCK_PSWWR2}, 62250ebbd1c8SMintz, Yuval {"pswrq", BLOCK_PSWRQ}, 62260ebbd1c8SMintz, Yuval {"pswrq2", BLOCK_PSWRQ2}, 62270ebbd1c8SMintz, Yuval {"pglcs", BLOCK_PGLCS}, 62280ebbd1c8SMintz, Yuval {"ptu", BLOCK_PTU}, 62290ebbd1c8SMintz, Yuval {"dmae", BLOCK_DMAE}, 62300ebbd1c8SMintz, Yuval {"tcm", BLOCK_TCM}, 62310ebbd1c8SMintz, Yuval {"mcm", BLOCK_MCM}, 62320ebbd1c8SMintz, Yuval {"ucm", BLOCK_UCM}, 62330ebbd1c8SMintz, Yuval {"xcm", BLOCK_XCM}, 62340ebbd1c8SMintz, Yuval {"ycm", BLOCK_YCM}, 62350ebbd1c8SMintz, Yuval {"pcm", BLOCK_PCM}, 62360ebbd1c8SMintz, Yuval {"qm", BLOCK_QM}, 62370ebbd1c8SMintz, Yuval {"tm", BLOCK_TM}, 62380ebbd1c8SMintz, Yuval {"dorq", BLOCK_DORQ}, 62390ebbd1c8SMintz, Yuval {"brb", BLOCK_BRB}, 62400ebbd1c8SMintz, Yuval {"src", BLOCK_SRC}, 62410ebbd1c8SMintz, Yuval {"prs", BLOCK_PRS}, 62420ebbd1c8SMintz, Yuval {"tsdm", BLOCK_TSDM}, 62430ebbd1c8SMintz, Yuval {"msdm", BLOCK_MSDM}, 62440ebbd1c8SMintz, Yuval {"usdm", BLOCK_USDM}, 62450ebbd1c8SMintz, Yuval {"xsdm", BLOCK_XSDM}, 62460ebbd1c8SMintz, Yuval {"ysdm", BLOCK_YSDM}, 62470ebbd1c8SMintz, Yuval {"psdm", BLOCK_PSDM}, 62480ebbd1c8SMintz, Yuval {"tsem", BLOCK_TSEM}, 62490ebbd1c8SMintz, Yuval {"msem", BLOCK_MSEM}, 62500ebbd1c8SMintz, Yuval {"usem", BLOCK_USEM}, 62510ebbd1c8SMintz, Yuval {"xsem", BLOCK_XSEM}, 62520ebbd1c8SMintz, Yuval {"ysem", BLOCK_YSEM}, 62530ebbd1c8SMintz, Yuval {"psem", BLOCK_PSEM}, 62540ebbd1c8SMintz, Yuval {"rss", BLOCK_RSS}, 62550ebbd1c8SMintz, Yuval {"tmld", BLOCK_TMLD}, 62560ebbd1c8SMintz, Yuval {"muld", BLOCK_MULD}, 62570ebbd1c8SMintz, Yuval {"yuld", BLOCK_YULD}, 62580ebbd1c8SMintz, Yuval {"xyld", BLOCK_XYLD}, 62590ebbd1c8SMintz, Yuval {"ptld", BLOCK_PTLD}, 62600ebbd1c8SMintz, Yuval {"ypld", BLOCK_YPLD}, 62610ebbd1c8SMintz, Yuval {"prm", BLOCK_PRM}, 62620ebbd1c8SMintz, Yuval {"pbf_pb1", BLOCK_PBF_PB1}, 62630ebbd1c8SMintz, Yuval {"pbf_pb2", BLOCK_PBF_PB2}, 62640ebbd1c8SMintz, Yuval {"rpb", BLOCK_RPB}, 62650ebbd1c8SMintz, Yuval {"btb", BLOCK_BTB}, 62660ebbd1c8SMintz, Yuval {"pbf", BLOCK_PBF}, 62670ebbd1c8SMintz, Yuval {"rdif", BLOCK_RDIF}, 62680ebbd1c8SMintz, Yuval {"tdif", BLOCK_TDIF}, 62690ebbd1c8SMintz, Yuval {"cdu", BLOCK_CDU}, 62700ebbd1c8SMintz, Yuval {"ccfc", BLOCK_CCFC}, 62710ebbd1c8SMintz, Yuval {"tcfc", BLOCK_TCFC}, 62720ebbd1c8SMintz, Yuval {"igu", BLOCK_IGU}, 62730ebbd1c8SMintz, Yuval {"cau", BLOCK_CAU}, 62740ebbd1c8SMintz, Yuval {"rgfs", BLOCK_RGFS}, 62750ebbd1c8SMintz, Yuval {"rgsrc", BLOCK_RGSRC}, 62760ebbd1c8SMintz, Yuval {"tgfs", BLOCK_TGFS}, 62770ebbd1c8SMintz, Yuval {"tgsrc", BLOCK_TGSRC}, 62780ebbd1c8SMintz, Yuval {"umac", BLOCK_UMAC}, 62790ebbd1c8SMintz, Yuval {"xmac", BLOCK_XMAC}, 62800ebbd1c8SMintz, Yuval {"dbg", BLOCK_DBG}, 62810ebbd1c8SMintz, Yuval {"nig", BLOCK_NIG}, 62820ebbd1c8SMintz, Yuval {"wol", BLOCK_WOL}, 62830ebbd1c8SMintz, Yuval {"bmbn", BLOCK_BMBN}, 62840ebbd1c8SMintz, Yuval {"ipc", BLOCK_IPC}, 62850ebbd1c8SMintz, Yuval {"nwm", BLOCK_NWM}, 62860ebbd1c8SMintz, Yuval {"nws", BLOCK_NWS}, 62870ebbd1c8SMintz, Yuval {"ms", BLOCK_MS}, 62880ebbd1c8SMintz, Yuval {"phy_pcie", BLOCK_PHY_PCIE}, 62890ebbd1c8SMintz, Yuval {"led", BLOCK_LED}, 62900ebbd1c8SMintz, Yuval {"avs_wrap", BLOCK_AVS_WRAP}, 6291da090917STomer Tayar {"pxpreqbus", BLOCK_PXPREQBUS}, 62920ebbd1c8SMintz, Yuval {"misc_aeu", BLOCK_MISC_AEU}, 62930ebbd1c8SMintz, Yuval {"bar0_map", BLOCK_BAR0_MAP} 62940ebbd1c8SMintz, Yuval }; 62950ebbd1c8SMintz, Yuval 6296c965db44STomer Tayar /* Status string array */ 6297c965db44STomer Tayar static const char * const s_status_str[] = { 62987b6859fbSMintz, Yuval /* DBG_STATUS_OK */ 6299c965db44STomer Tayar "Operation completed successfully", 63007b6859fbSMintz, Yuval 63017b6859fbSMintz, Yuval /* DBG_STATUS_APP_VERSION_NOT_SET */ 6302c965db44STomer Tayar "Debug application version wasn't set", 63037b6859fbSMintz, Yuval 63047b6859fbSMintz, Yuval /* DBG_STATUS_UNSUPPORTED_APP_VERSION */ 6305c965db44STomer Tayar "Unsupported debug application version", 63067b6859fbSMintz, Yuval 63077b6859fbSMintz, Yuval /* DBG_STATUS_DBG_BLOCK_NOT_RESET */ 6308c965db44STomer Tayar "The debug block wasn't reset since the last recording", 63097b6859fbSMintz, Yuval 63107b6859fbSMintz, Yuval /* DBG_STATUS_INVALID_ARGS */ 6311c965db44STomer Tayar "Invalid arguments", 63127b6859fbSMintz, Yuval 63137b6859fbSMintz, Yuval /* DBG_STATUS_OUTPUT_ALREADY_SET */ 6314c965db44STomer Tayar "The debug output was already set", 63157b6859fbSMintz, Yuval 63167b6859fbSMintz, Yuval /* DBG_STATUS_INVALID_PCI_BUF_SIZE */ 6317c965db44STomer Tayar "Invalid PCI buffer size", 63187b6859fbSMintz, Yuval 63197b6859fbSMintz, Yuval /* DBG_STATUS_PCI_BUF_ALLOC_FAILED */ 6320c965db44STomer Tayar "PCI buffer allocation failed", 63217b6859fbSMintz, Yuval 63227b6859fbSMintz, Yuval /* DBG_STATUS_PCI_BUF_NOT_ALLOCATED */ 6323c965db44STomer Tayar "A PCI buffer wasn't allocated", 63247b6859fbSMintz, Yuval 63257b6859fbSMintz, Yuval /* DBG_STATUS_TOO_MANY_INPUTS */ 6326c965db44STomer Tayar "Too many inputs were enabled. Enabled less inputs, or set 'unifyInputs' to true", 63277b6859fbSMintz, Yuval 63287b6859fbSMintz, Yuval /* DBG_STATUS_INPUT_OVERLAP */ 63297b6859fbSMintz, Yuval "Overlapping debug bus inputs", 63307b6859fbSMintz, Yuval 63317b6859fbSMintz, Yuval /* DBG_STATUS_HW_ONLY_RECORDING */ 6332c965db44STomer Tayar "Cannot record Storm data since the entire recording cycle is used by HW", 63337b6859fbSMintz, Yuval 63347b6859fbSMintz, Yuval /* DBG_STATUS_STORM_ALREADY_ENABLED */ 6335c965db44STomer Tayar "The Storm was already enabled", 63367b6859fbSMintz, Yuval 63377b6859fbSMintz, Yuval /* DBG_STATUS_STORM_NOT_ENABLED */ 6338c965db44STomer Tayar "The specified Storm wasn't enabled", 63397b6859fbSMintz, Yuval 63407b6859fbSMintz, Yuval /* DBG_STATUS_BLOCK_ALREADY_ENABLED */ 6341c965db44STomer Tayar "The block was already enabled", 63427b6859fbSMintz, Yuval 63437b6859fbSMintz, Yuval /* DBG_STATUS_BLOCK_NOT_ENABLED */ 6344c965db44STomer Tayar "The specified block wasn't enabled", 63457b6859fbSMintz, Yuval 63467b6859fbSMintz, Yuval /* DBG_STATUS_NO_INPUT_ENABLED */ 6347c965db44STomer Tayar "No input was enabled for recording", 63487b6859fbSMintz, Yuval 63497b6859fbSMintz, Yuval /* DBG_STATUS_NO_FILTER_TRIGGER_64B */ 6350c965db44STomer Tayar "Filters and triggers are not allowed when recording in 64b units", 63517b6859fbSMintz, Yuval 63527b6859fbSMintz, Yuval /* DBG_STATUS_FILTER_ALREADY_ENABLED */ 6353c965db44STomer Tayar "The filter was already enabled", 63547b6859fbSMintz, Yuval 63557b6859fbSMintz, Yuval /* DBG_STATUS_TRIGGER_ALREADY_ENABLED */ 6356c965db44STomer Tayar "The trigger was already enabled", 63577b6859fbSMintz, Yuval 63587b6859fbSMintz, Yuval /* DBG_STATUS_TRIGGER_NOT_ENABLED */ 6359c965db44STomer Tayar "The trigger wasn't enabled", 63607b6859fbSMintz, Yuval 63617b6859fbSMintz, Yuval /* DBG_STATUS_CANT_ADD_CONSTRAINT */ 6362c965db44STomer Tayar "A constraint can be added only after a filter was enabled or a trigger state was added", 63637b6859fbSMintz, Yuval 63647b6859fbSMintz, Yuval /* DBG_STATUS_TOO_MANY_TRIGGER_STATES */ 6365c965db44STomer Tayar "Cannot add more than 3 trigger states", 63667b6859fbSMintz, Yuval 63677b6859fbSMintz, Yuval /* DBG_STATUS_TOO_MANY_CONSTRAINTS */ 6368c965db44STomer Tayar "Cannot add more than 4 constraints per filter or trigger state", 63697b6859fbSMintz, Yuval 63707b6859fbSMintz, Yuval /* DBG_STATUS_RECORDING_NOT_STARTED */ 6371c965db44STomer Tayar "The recording wasn't started", 63727b6859fbSMintz, Yuval 63737b6859fbSMintz, Yuval /* DBG_STATUS_DATA_DIDNT_TRIGGER */ 6374c965db44STomer Tayar "A trigger was configured, but it didn't trigger", 63757b6859fbSMintz, Yuval 63767b6859fbSMintz, Yuval /* DBG_STATUS_NO_DATA_RECORDED */ 6377c965db44STomer Tayar "No data was recorded", 63787b6859fbSMintz, Yuval 63797b6859fbSMintz, Yuval /* DBG_STATUS_DUMP_BUF_TOO_SMALL */ 6380c965db44STomer Tayar "Dump buffer is too small", 63817b6859fbSMintz, Yuval 63827b6859fbSMintz, Yuval /* DBG_STATUS_DUMP_NOT_CHUNK_ALIGNED */ 6383c965db44STomer Tayar "Dumped data is not aligned to chunks", 63847b6859fbSMintz, Yuval 63857b6859fbSMintz, Yuval /* DBG_STATUS_UNKNOWN_CHIP */ 6386c965db44STomer Tayar "Unknown chip", 63877b6859fbSMintz, Yuval 63887b6859fbSMintz, Yuval /* DBG_STATUS_VIRT_MEM_ALLOC_FAILED */ 6389c965db44STomer Tayar "Failed allocating virtual memory", 63907b6859fbSMintz, Yuval 63917b6859fbSMintz, Yuval /* DBG_STATUS_BLOCK_IN_RESET */ 6392c965db44STomer Tayar "The input block is in reset", 63937b6859fbSMintz, Yuval 63947b6859fbSMintz, Yuval /* DBG_STATUS_INVALID_TRACE_SIGNATURE */ 6395c965db44STomer Tayar "Invalid MCP trace signature found in NVRAM", 63967b6859fbSMintz, Yuval 63977b6859fbSMintz, Yuval /* DBG_STATUS_INVALID_NVRAM_BUNDLE */ 6398c965db44STomer Tayar "Invalid bundle ID found in NVRAM", 63997b6859fbSMintz, Yuval 64007b6859fbSMintz, Yuval /* DBG_STATUS_NVRAM_GET_IMAGE_FAILED */ 6401c965db44STomer Tayar "Failed getting NVRAM image", 64027b6859fbSMintz, Yuval 64037b6859fbSMintz, Yuval /* DBG_STATUS_NON_ALIGNED_NVRAM_IMAGE */ 6404c965db44STomer Tayar "NVRAM image is not dword-aligned", 64057b6859fbSMintz, Yuval 64067b6859fbSMintz, Yuval /* DBG_STATUS_NVRAM_READ_FAILED */ 6407c965db44STomer Tayar "Failed reading from NVRAM", 64087b6859fbSMintz, Yuval 64097b6859fbSMintz, Yuval /* DBG_STATUS_IDLE_CHK_PARSE_FAILED */ 6410c965db44STomer Tayar "Idle check parsing failed", 64117b6859fbSMintz, Yuval 64127b6859fbSMintz, Yuval /* DBG_STATUS_MCP_TRACE_BAD_DATA */ 6413c965db44STomer Tayar "MCP Trace data is corrupt", 64147b6859fbSMintz, Yuval 64157b6859fbSMintz, Yuval /* DBG_STATUS_MCP_TRACE_NO_META */ 64167b6859fbSMintz, Yuval "Dump doesn't contain meta data - it must be provided in image file", 64177b6859fbSMintz, Yuval 64187b6859fbSMintz, Yuval /* DBG_STATUS_MCP_COULD_NOT_HALT */ 6419c965db44STomer Tayar "Failed to halt MCP", 64207b6859fbSMintz, Yuval 64217b6859fbSMintz, Yuval /* DBG_STATUS_MCP_COULD_NOT_RESUME */ 6422c965db44STomer Tayar "Failed to resume MCP after halt", 64237b6859fbSMintz, Yuval 6424da090917STomer Tayar /* DBG_STATUS_RESERVED2 */ 6425da090917STomer Tayar "Reserved debug status - shouldn't be returned", 64267b6859fbSMintz, Yuval 64277b6859fbSMintz, Yuval /* DBG_STATUS_SEMI_FIFO_NOT_EMPTY */ 6428c965db44STomer Tayar "Failed to empty SEMI sync FIFO", 64297b6859fbSMintz, Yuval 64307b6859fbSMintz, Yuval /* DBG_STATUS_IGU_FIFO_BAD_DATA */ 6431c965db44STomer Tayar "IGU FIFO data is corrupt", 64327b6859fbSMintz, Yuval 64337b6859fbSMintz, Yuval /* DBG_STATUS_MCP_COULD_NOT_MASK_PRTY */ 6434c965db44STomer Tayar "MCP failed to mask parities", 64357b6859fbSMintz, Yuval 64367b6859fbSMintz, Yuval /* DBG_STATUS_FW_ASSERTS_PARSE_FAILED */ 6437c965db44STomer Tayar "FW Asserts parsing failed", 64387b6859fbSMintz, Yuval 64397b6859fbSMintz, Yuval /* DBG_STATUS_REG_FIFO_BAD_DATA */ 6440c965db44STomer Tayar "GRC FIFO data is corrupt", 64417b6859fbSMintz, Yuval 64427b6859fbSMintz, Yuval /* DBG_STATUS_PROTECTION_OVERRIDE_BAD_DATA */ 6443c965db44STomer Tayar "Protection Override data is corrupt", 64447b6859fbSMintz, Yuval 64457b6859fbSMintz, Yuval /* DBG_STATUS_DBG_ARRAY_NOT_SET */ 6446c965db44STomer Tayar "Debug arrays were not set (when using binary files, dbg_set_bin_ptr must be called)", 64477b6859fbSMintz, Yuval 64487b6859fbSMintz, Yuval /* DBG_STATUS_FILTER_BUG */ 64497b6859fbSMintz, Yuval "Debug Bus filtering requires the -unifyInputs option (due to a HW bug)", 64507b6859fbSMintz, Yuval 64517b6859fbSMintz, Yuval /* DBG_STATUS_NON_MATCHING_LINES */ 64527b6859fbSMintz, Yuval "Non-matching debug lines - all lines must be of the same type (either 128b or 256b)", 64537b6859fbSMintz, Yuval 64547b6859fbSMintz, Yuval /* DBG_STATUS_INVALID_TRIGGER_DWORD_OFFSET */ 64557b6859fbSMintz, Yuval "The selected trigger dword offset wasn't enabled in the recorded HW block", 64567b6859fbSMintz, Yuval 64577b6859fbSMintz, Yuval /* DBG_STATUS_DBG_BUS_IN_USE */ 64587b6859fbSMintz, Yuval "The debug bus is in use" 6459c965db44STomer Tayar }; 6460c965db44STomer Tayar 6461c965db44STomer Tayar /* Idle check severity names array */ 6462c965db44STomer Tayar static const char * const s_idle_chk_severity_str[] = { 6463c965db44STomer Tayar "Error", 6464c965db44STomer Tayar "Error if no traffic", 6465c965db44STomer Tayar "Warning" 6466c965db44STomer Tayar }; 6467c965db44STomer Tayar 6468c965db44STomer Tayar /* MCP Trace level names array */ 6469c965db44STomer Tayar static const char * const s_mcp_trace_level_str[] = { 6470c965db44STomer Tayar "ERROR", 6471c965db44STomer Tayar "TRACE", 6472c965db44STomer Tayar "DEBUG" 6473c965db44STomer Tayar }; 6474c965db44STomer Tayar 64757b6859fbSMintz, Yuval /* Access type names array */ 6476c965db44STomer Tayar static const char * const s_access_strs[] = { 6477c965db44STomer Tayar "read", 6478c965db44STomer Tayar "write" 6479c965db44STomer Tayar }; 6480c965db44STomer Tayar 64817b6859fbSMintz, Yuval /* Privilege type names array */ 6482c965db44STomer Tayar static const char * const s_privilege_strs[] = { 6483c965db44STomer Tayar "VF", 6484c965db44STomer Tayar "PDA", 6485c965db44STomer Tayar "HV", 6486c965db44STomer Tayar "UA" 6487c965db44STomer Tayar }; 6488c965db44STomer Tayar 64897b6859fbSMintz, Yuval /* Protection type names array */ 6490c965db44STomer Tayar static const char * const s_protection_strs[] = { 6491c965db44STomer Tayar "(default)", 6492c965db44STomer Tayar "(default)", 6493c965db44STomer Tayar "(default)", 6494c965db44STomer Tayar "(default)", 6495c965db44STomer Tayar "override VF", 6496c965db44STomer Tayar "override PDA", 6497c965db44STomer Tayar "override HV", 6498c965db44STomer Tayar "override UA" 6499c965db44STomer Tayar }; 6500c965db44STomer Tayar 65017b6859fbSMintz, Yuval /* Master type names array */ 6502c965db44STomer Tayar static const char * const s_master_strs[] = { 6503c965db44STomer Tayar "???", 6504c965db44STomer Tayar "pxp", 6505c965db44STomer Tayar "mcp", 6506c965db44STomer Tayar "msdm", 6507c965db44STomer Tayar "psdm", 6508c965db44STomer Tayar "ysdm", 6509c965db44STomer Tayar "usdm", 6510c965db44STomer Tayar "tsdm", 6511c965db44STomer Tayar "xsdm", 6512c965db44STomer Tayar "dbu", 6513c965db44STomer Tayar "dmae", 6514c965db44STomer Tayar "???", 6515c965db44STomer Tayar "???", 6516c965db44STomer Tayar "???", 6517c965db44STomer Tayar "???", 6518c965db44STomer Tayar "???" 6519c965db44STomer Tayar }; 6520c965db44STomer Tayar 65217b6859fbSMintz, Yuval /* REG FIFO error messages array */ 6522c965db44STomer Tayar static const char * const s_reg_fifo_error_strs[] = { 6523c965db44STomer Tayar "grc timeout", 6524c965db44STomer Tayar "address doesn't belong to any block", 6525c965db44STomer Tayar "reserved address in block or write to read-only address", 6526c965db44STomer Tayar "privilege/protection mismatch", 6527c965db44STomer Tayar "path isolation error" 6528c965db44STomer Tayar }; 6529c965db44STomer Tayar 65307b6859fbSMintz, Yuval /* IGU FIFO sources array */ 6531c965db44STomer Tayar static const char * const s_igu_fifo_source_strs[] = { 6532c965db44STomer Tayar "TSTORM", 6533c965db44STomer Tayar "MSTORM", 6534c965db44STomer Tayar "USTORM", 6535c965db44STomer Tayar "XSTORM", 6536c965db44STomer Tayar "YSTORM", 6537c965db44STomer Tayar "PSTORM", 6538c965db44STomer Tayar "PCIE", 6539c965db44STomer Tayar "NIG_QM_PBF", 6540c965db44STomer Tayar "CAU", 6541c965db44STomer Tayar "ATTN", 6542c965db44STomer Tayar "GRC", 6543c965db44STomer Tayar }; 6544c965db44STomer Tayar 65457b6859fbSMintz, Yuval /* IGU FIFO error messages */ 6546c965db44STomer Tayar static const char * const s_igu_fifo_error_strs[] = { 6547c965db44STomer Tayar "no error", 6548c965db44STomer Tayar "length error", 6549c965db44STomer Tayar "function disabled", 65501d510657SColin Ian King "VF sent command to attention address", 6551c965db44STomer Tayar "host sent prod update command", 6552c965db44STomer Tayar "read of during interrupt register while in MIMD mode", 6553c965db44STomer Tayar "access to PXP BAR reserved address", 6554c965db44STomer Tayar "producer update command to attention index", 6555c965db44STomer Tayar "unknown error", 6556c965db44STomer Tayar "SB index not valid", 6557c965db44STomer Tayar "SB relative index and FID not found", 6558c965db44STomer Tayar "FID not match", 6559c965db44STomer Tayar "command with error flag asserted (PCI error or CAU discard)", 6560c965db44STomer Tayar "VF sent cleanup and RF cleanup is disabled", 6561c965db44STomer Tayar "cleanup command on type bigger than 4" 6562c965db44STomer Tayar }; 6563c965db44STomer Tayar 6564c965db44STomer Tayar /* IGU FIFO address data */ 6565c965db44STomer Tayar static const struct igu_fifo_addr_data s_igu_fifo_addr_data[] = { 65667b6859fbSMintz, Yuval {0x0, 0x101, "MSI-X Memory", NULL, 65677b6859fbSMintz, Yuval IGU_ADDR_TYPE_MSIX_MEM}, 65687b6859fbSMintz, Yuval {0x102, 0x1ff, "reserved", NULL, 65697b6859fbSMintz, Yuval IGU_ADDR_TYPE_RESERVED}, 65707b6859fbSMintz, Yuval {0x200, 0x200, "Write PBA[0:63]", NULL, 65717b6859fbSMintz, Yuval IGU_ADDR_TYPE_WRITE_PBA}, 6572c965db44STomer Tayar {0x201, 0x201, "Write PBA[64:127]", "reserved", 6573c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_PBA}, 65747b6859fbSMintz, Yuval {0x202, 0x202, "Write PBA[128]", "reserved", 65757b6859fbSMintz, Yuval IGU_ADDR_TYPE_WRITE_PBA}, 65767b6859fbSMintz, Yuval {0x203, 0x3ff, "reserved", NULL, 65777b6859fbSMintz, Yuval IGU_ADDR_TYPE_RESERVED}, 6578c965db44STomer Tayar {0x400, 0x5ef, "Write interrupt acknowledgment", NULL, 6579c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_INT_ACK}, 6580c965db44STomer Tayar {0x5f0, 0x5f0, "Attention bits update", NULL, 6581c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_ATTN_BITS}, 6582c965db44STomer Tayar {0x5f1, 0x5f1, "Attention bits set", NULL, 6583c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_ATTN_BITS}, 6584c965db44STomer Tayar {0x5f2, 0x5f2, "Attention bits clear", NULL, 6585c965db44STomer Tayar IGU_ADDR_TYPE_WRITE_ATTN_BITS}, 6586c965db44STomer Tayar {0x5f3, 0x5f3, "Read interrupt 0:63 with mask", NULL, 6587c965db44STomer Tayar IGU_ADDR_TYPE_READ_INT}, 6588c965db44STomer Tayar {0x5f4, 0x5f4, "Read interrupt 0:31 with mask", NULL, 6589c965db44STomer Tayar IGU_ADDR_TYPE_READ_INT}, 6590c965db44STomer Tayar {0x5f5, 0x5f5, "Read interrupt 32:63 with mask", NULL, 6591c965db44STomer Tayar IGU_ADDR_TYPE_READ_INT}, 6592c965db44STomer Tayar {0x5f6, 0x5f6, "Read interrupt 0:63 without mask", NULL, 6593c965db44STomer Tayar IGU_ADDR_TYPE_READ_INT}, 65947b6859fbSMintz, Yuval {0x5f7, 0x5ff, "reserved", NULL, 65957b6859fbSMintz, Yuval IGU_ADDR_TYPE_RESERVED}, 65967b6859fbSMintz, Yuval {0x600, 0x7ff, "Producer update", NULL, 65977b6859fbSMintz, Yuval IGU_ADDR_TYPE_WRITE_PROD_UPDATE} 6598c965db44STomer Tayar }; 6599c965db44STomer Tayar 6600c965db44STomer Tayar /******************************** Variables **********************************/ 6601c965db44STomer Tayar 6602c965db44STomer Tayar /* Temporary buffer, used for print size calculations */ 6603c965db44STomer Tayar static char s_temp_buf[MAX_MSG_LEN]; 6604c965db44STomer Tayar 66057b6859fbSMintz, Yuval /**************************** Private Functions ******************************/ 6606c965db44STomer Tayar 6607c965db44STomer Tayar static u32 qed_cyclic_add(u32 a, u32 b, u32 size) 6608c965db44STomer Tayar { 6609c965db44STomer Tayar return (a + b) % size; 6610c965db44STomer Tayar } 6611c965db44STomer Tayar 6612c965db44STomer Tayar static u32 qed_cyclic_sub(u32 a, u32 b, u32 size) 6613c965db44STomer Tayar { 6614c965db44STomer Tayar return (size + a - b) % size; 6615c965db44STomer Tayar } 6616c965db44STomer Tayar 6617c965db44STomer Tayar /* Reads the specified number of bytes from the specified cyclic buffer (up to 4 6618c965db44STomer Tayar * bytes) and returns them as a dword value. the specified buffer offset is 6619c965db44STomer Tayar * updated. 6620c965db44STomer Tayar */ 6621c965db44STomer Tayar static u32 qed_read_from_cyclic_buf(void *buf, 6622c965db44STomer Tayar u32 *offset, 6623c965db44STomer Tayar u32 buf_size, u8 num_bytes_to_read) 6624c965db44STomer Tayar { 66257b6859fbSMintz, Yuval u8 i, *val_ptr, *bytes_buf = (u8 *)buf; 6626c965db44STomer Tayar u32 val = 0; 6627c965db44STomer Tayar 6628c965db44STomer Tayar val_ptr = (u8 *)&val; 6629c965db44STomer Tayar 663050bc60cbSMichal Kalderon /* Assume running on a LITTLE ENDIAN and the buffer is network order 663150bc60cbSMichal Kalderon * (BIG ENDIAN), as high order bytes are placed in lower memory address. 663250bc60cbSMichal Kalderon */ 6633c965db44STomer Tayar for (i = 0; i < num_bytes_to_read; i++) { 6634c965db44STomer Tayar val_ptr[i] = bytes_buf[*offset]; 6635c965db44STomer Tayar *offset = qed_cyclic_add(*offset, 1, buf_size); 6636c965db44STomer Tayar } 6637c965db44STomer Tayar 6638c965db44STomer Tayar return val; 6639c965db44STomer Tayar } 6640c965db44STomer Tayar 6641c965db44STomer Tayar /* Reads and returns the next byte from the specified buffer. 6642c965db44STomer Tayar * The specified buffer offset is updated. 6643c965db44STomer Tayar */ 6644c965db44STomer Tayar static u8 qed_read_byte_from_buf(void *buf, u32 *offset) 6645c965db44STomer Tayar { 6646c965db44STomer Tayar return ((u8 *)buf)[(*offset)++]; 6647c965db44STomer Tayar } 6648c965db44STomer Tayar 6649c965db44STomer Tayar /* Reads and returns the next dword from the specified buffer. 6650c965db44STomer Tayar * The specified buffer offset is updated. 6651c965db44STomer Tayar */ 6652c965db44STomer Tayar static u32 qed_read_dword_from_buf(void *buf, u32 *offset) 6653c965db44STomer Tayar { 6654c965db44STomer Tayar u32 dword_val = *(u32 *)&((u8 *)buf)[*offset]; 6655c965db44STomer Tayar 6656c965db44STomer Tayar *offset += 4; 66577b6859fbSMintz, Yuval 6658c965db44STomer Tayar return dword_val; 6659c965db44STomer Tayar } 6660c965db44STomer Tayar 6661c965db44STomer Tayar /* Reads the next string from the specified buffer, and copies it to the 6662c965db44STomer Tayar * specified pointer. The specified buffer offset is updated. 6663c965db44STomer Tayar */ 6664c965db44STomer Tayar static void qed_read_str_from_buf(void *buf, u32 *offset, u32 size, char *dest) 6665c965db44STomer Tayar { 6666c965db44STomer Tayar const char *source_str = &((const char *)buf)[*offset]; 6667c965db44STomer Tayar 6668c965db44STomer Tayar strncpy(dest, source_str, size); 6669c965db44STomer Tayar dest[size - 1] = '\0'; 6670c965db44STomer Tayar *offset += size; 6671c965db44STomer Tayar } 6672c965db44STomer Tayar 6673c965db44STomer Tayar /* Returns a pointer to the specified offset (in bytes) of the specified buffer. 6674c965db44STomer Tayar * If the specified buffer in NULL, a temporary buffer pointer is returned. 6675c965db44STomer Tayar */ 6676c965db44STomer Tayar static char *qed_get_buf_ptr(void *buf, u32 offset) 6677c965db44STomer Tayar { 6678c965db44STomer Tayar return buf ? (char *)buf + offset : s_temp_buf; 6679c965db44STomer Tayar } 6680c965db44STomer Tayar 6681c965db44STomer Tayar /* Reads a param from the specified buffer. Returns the number of dwords read. 6682c965db44STomer Tayar * If the returned str_param is NULL, the param is numeric and its value is 6683c965db44STomer Tayar * returned in num_param. 6684c965db44STomer Tayar * Otheriwise, the param is a string and its pointer is returned in str_param. 6685c965db44STomer Tayar */ 6686c965db44STomer Tayar static u32 qed_read_param(u32 *dump_buf, 6687c965db44STomer Tayar const char **param_name, 6688c965db44STomer Tayar const char **param_str_val, u32 *param_num_val) 6689c965db44STomer Tayar { 6690c965db44STomer Tayar char *char_buf = (char *)dump_buf; 66917b6859fbSMintz, Yuval size_t offset = 0; 6692c965db44STomer Tayar 6693c965db44STomer Tayar /* Extract param name */ 6694c965db44STomer Tayar *param_name = char_buf; 6695c965db44STomer Tayar offset += strlen(*param_name) + 1; 6696c965db44STomer Tayar 6697c965db44STomer Tayar /* Check param type */ 6698c965db44STomer Tayar if (*(char_buf + offset++)) { 6699c965db44STomer Tayar /* String param */ 6700c965db44STomer Tayar *param_str_val = char_buf + offset; 6701da090917STomer Tayar *param_num_val = 0; 6702c965db44STomer Tayar offset += strlen(*param_str_val) + 1; 6703c965db44STomer Tayar if (offset & 0x3) 6704c965db44STomer Tayar offset += (4 - (offset & 0x3)); 6705c965db44STomer Tayar } else { 6706c965db44STomer Tayar /* Numeric param */ 6707c965db44STomer Tayar *param_str_val = NULL; 6708c965db44STomer Tayar if (offset & 0x3) 6709c965db44STomer Tayar offset += (4 - (offset & 0x3)); 6710c965db44STomer Tayar *param_num_val = *(u32 *)(char_buf + offset); 6711c965db44STomer Tayar offset += 4; 6712c965db44STomer Tayar } 6713c965db44STomer Tayar 671450bc60cbSMichal Kalderon return (u32)offset / 4; 6715c965db44STomer Tayar } 6716c965db44STomer Tayar 6717c965db44STomer Tayar /* Reads a section header from the specified buffer. 6718c965db44STomer Tayar * Returns the number of dwords read. 6719c965db44STomer Tayar */ 6720c965db44STomer Tayar static u32 qed_read_section_hdr(u32 *dump_buf, 6721c965db44STomer Tayar const char **section_name, 6722c965db44STomer Tayar u32 *num_section_params) 6723c965db44STomer Tayar { 6724c965db44STomer Tayar const char *param_str_val; 6725c965db44STomer Tayar 6726c965db44STomer Tayar return qed_read_param(dump_buf, 6727c965db44STomer Tayar section_name, ¶m_str_val, num_section_params); 6728c965db44STomer Tayar } 6729c965db44STomer Tayar 6730c965db44STomer Tayar /* Reads section params from the specified buffer and prints them to the results 6731c965db44STomer Tayar * buffer. Returns the number of dwords read. 6732c965db44STomer Tayar */ 6733c965db44STomer Tayar static u32 qed_print_section_params(u32 *dump_buf, 6734c965db44STomer Tayar u32 num_section_params, 6735c965db44STomer Tayar char *results_buf, u32 *num_chars_printed) 6736c965db44STomer Tayar { 6737c965db44STomer Tayar u32 i, dump_offset = 0, results_offset = 0; 6738c965db44STomer Tayar 6739c965db44STomer Tayar for (i = 0; i < num_section_params; i++) { 67407b6859fbSMintz, Yuval const char *param_name, *param_str_val; 6741c965db44STomer Tayar u32 param_num_val = 0; 6742c965db44STomer Tayar 6743c965db44STomer Tayar dump_offset += qed_read_param(dump_buf + dump_offset, 6744c965db44STomer Tayar ¶m_name, 6745c965db44STomer Tayar ¶m_str_val, ¶m_num_val); 67467b6859fbSMintz, Yuval 6747c965db44STomer Tayar if (param_str_val) 6748c965db44STomer Tayar results_offset += 6749c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6750c965db44STomer Tayar results_offset), 6751c965db44STomer Tayar "%s: %s\n", param_name, param_str_val); 6752c965db44STomer Tayar else if (strcmp(param_name, "fw-timestamp")) 6753c965db44STomer Tayar results_offset += 6754c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6755c965db44STomer Tayar results_offset), 6756c965db44STomer Tayar "%s: %d\n", param_name, param_num_val); 6757c965db44STomer Tayar } 6758c965db44STomer Tayar 67597b6859fbSMintz, Yuval results_offset += sprintf(qed_get_buf_ptr(results_buf, results_offset), 67607b6859fbSMintz, Yuval "\n"); 6761c965db44STomer Tayar 67627b6859fbSMintz, Yuval *num_chars_printed = results_offset; 67637b6859fbSMintz, Yuval 67647b6859fbSMintz, Yuval return dump_offset; 6765c965db44STomer Tayar } 6766c965db44STomer Tayar 6767a3f72307SDenis Bolotin static struct dbg_tools_user_data * 6768a3f72307SDenis Bolotin qed_dbg_get_user_data(struct qed_hwfn *p_hwfn) 6769a3f72307SDenis Bolotin { 6770a3f72307SDenis Bolotin return (struct dbg_tools_user_data *)p_hwfn->dbg_user_info; 6771a3f72307SDenis Bolotin } 6772a3f72307SDenis Bolotin 6773c965db44STomer Tayar /* Parses the idle check rules and returns the number of characters printed. 6774c965db44STomer Tayar * In case of parsing error, returns 0. 6775c965db44STomer Tayar */ 6776da090917STomer Tayar static u32 qed_parse_idle_chk_dump_rules(u32 *dump_buf, 6777c965db44STomer Tayar u32 *dump_buf_end, 6778c965db44STomer Tayar u32 num_rules, 6779c965db44STomer Tayar bool print_fw_idle_chk, 6780c965db44STomer Tayar char *results_buf, 6781c965db44STomer Tayar u32 *num_errors, u32 *num_warnings) 6782c965db44STomer Tayar { 67837b6859fbSMintz, Yuval /* Offset in results_buf in bytes */ 67847b6859fbSMintz, Yuval u32 results_offset = 0; 67857b6859fbSMintz, Yuval 67867b6859fbSMintz, Yuval u32 rule_idx; 6787c965db44STomer Tayar u16 i, j; 6788c965db44STomer Tayar 6789c965db44STomer Tayar *num_errors = 0; 6790c965db44STomer Tayar *num_warnings = 0; 6791c965db44STomer Tayar 6792c965db44STomer Tayar /* Go over dumped results */ 6793c965db44STomer Tayar for (rule_idx = 0; rule_idx < num_rules && dump_buf < dump_buf_end; 6794c965db44STomer Tayar rule_idx++) { 6795c965db44STomer Tayar const struct dbg_idle_chk_rule_parsing_data *rule_parsing_data; 6796c965db44STomer Tayar struct dbg_idle_chk_result_hdr *hdr; 67977b6859fbSMintz, Yuval const char *parsing_str, *lsi_msg; 6798c965db44STomer Tayar u32 parsing_str_offset; 6799c965db44STomer Tayar bool has_fw_msg; 68007b6859fbSMintz, Yuval u8 curr_reg_id; 6801c965db44STomer Tayar 6802c965db44STomer Tayar hdr = (struct dbg_idle_chk_result_hdr *)dump_buf; 6803c965db44STomer Tayar rule_parsing_data = 6804c965db44STomer Tayar (const struct dbg_idle_chk_rule_parsing_data *) 68057b6859fbSMintz, Yuval &s_user_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_PARSING_DATA]. 6806c965db44STomer Tayar ptr[hdr->rule_id]; 6807c965db44STomer Tayar parsing_str_offset = 6808c965db44STomer Tayar GET_FIELD(rule_parsing_data->data, 6809c965db44STomer Tayar DBG_IDLE_CHK_RULE_PARSING_DATA_STR_OFFSET); 6810c965db44STomer Tayar has_fw_msg = 6811c965db44STomer Tayar GET_FIELD(rule_parsing_data->data, 6812c965db44STomer Tayar DBG_IDLE_CHK_RULE_PARSING_DATA_HAS_FW_MSG) > 0; 68137b6859fbSMintz, Yuval parsing_str = 68147b6859fbSMintz, Yuval &((const char *) 68157b6859fbSMintz, Yuval s_user_dbg_arrays[BIN_BUF_DBG_PARSING_STRINGS].ptr) 6816c965db44STomer Tayar [parsing_str_offset]; 6817c965db44STomer Tayar lsi_msg = parsing_str; 68187b6859fbSMintz, Yuval curr_reg_id = 0; 6819c965db44STomer Tayar 6820c965db44STomer Tayar if (hdr->severity >= MAX_DBG_IDLE_CHK_SEVERITY_TYPES) 6821c965db44STomer Tayar return 0; 6822c965db44STomer Tayar 6823c965db44STomer Tayar /* Skip rule header */ 68247b6859fbSMintz, Yuval dump_buf += BYTES_TO_DWORDS(sizeof(*hdr)); 6825c965db44STomer Tayar 6826c965db44STomer Tayar /* Update errors/warnings count */ 6827c965db44STomer Tayar if (hdr->severity == IDLE_CHK_SEVERITY_ERROR || 6828c965db44STomer Tayar hdr->severity == IDLE_CHK_SEVERITY_ERROR_NO_TRAFFIC) 6829c965db44STomer Tayar (*num_errors)++; 6830c965db44STomer Tayar else 6831c965db44STomer Tayar (*num_warnings)++; 6832c965db44STomer Tayar 6833c965db44STomer Tayar /* Print rule severity */ 6834c965db44STomer Tayar results_offset += 6835c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6836c965db44STomer Tayar results_offset), "%s: ", 6837c965db44STomer Tayar s_idle_chk_severity_str[hdr->severity]); 6838c965db44STomer Tayar 6839c965db44STomer Tayar /* Print rule message */ 6840c965db44STomer Tayar if (has_fw_msg) 6841c965db44STomer Tayar parsing_str += strlen(parsing_str) + 1; 6842c965db44STomer Tayar results_offset += 6843c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6844c965db44STomer Tayar results_offset), "%s.", 6845c965db44STomer Tayar has_fw_msg && 6846c965db44STomer Tayar print_fw_idle_chk ? parsing_str : lsi_msg); 6847c965db44STomer Tayar parsing_str += strlen(parsing_str) + 1; 6848c965db44STomer Tayar 6849c965db44STomer Tayar /* Print register values */ 6850c965db44STomer Tayar results_offset += 6851c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6852c965db44STomer Tayar results_offset), " Registers:"); 6853c965db44STomer Tayar for (i = 0; 6854c965db44STomer Tayar i < hdr->num_dumped_cond_regs + hdr->num_dumped_info_regs; 6855c965db44STomer Tayar i++) { 68567b6859fbSMintz, Yuval struct dbg_idle_chk_result_reg_hdr *reg_hdr; 68577b6859fbSMintz, Yuval bool is_mem; 68587b6859fbSMintz, Yuval u8 reg_id; 68597b6859fbSMintz, Yuval 68607b6859fbSMintz, Yuval reg_hdr = 68617b6859fbSMintz, Yuval (struct dbg_idle_chk_result_reg_hdr *)dump_buf; 68627b6859fbSMintz, Yuval is_mem = GET_FIELD(reg_hdr->data, 6863c965db44STomer Tayar DBG_IDLE_CHK_RESULT_REG_HDR_IS_MEM); 68647b6859fbSMintz, Yuval reg_id = GET_FIELD(reg_hdr->data, 6865c965db44STomer Tayar DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID); 6866c965db44STomer Tayar 6867c965db44STomer Tayar /* Skip reg header */ 68687b6859fbSMintz, Yuval dump_buf += BYTES_TO_DWORDS(sizeof(*reg_hdr)); 6869c965db44STomer Tayar 6870c965db44STomer Tayar /* Skip register names until the required reg_id is 6871c965db44STomer Tayar * reached. 6872c965db44STomer Tayar */ 6873c965db44STomer Tayar for (; reg_id > curr_reg_id; 6874c965db44STomer Tayar curr_reg_id++, 6875c965db44STomer Tayar parsing_str += strlen(parsing_str) + 1); 6876c965db44STomer Tayar 6877c965db44STomer Tayar results_offset += 6878c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6879c965db44STomer Tayar results_offset), " %s", 6880c965db44STomer Tayar parsing_str); 6881c965db44STomer Tayar if (i < hdr->num_dumped_cond_regs && is_mem) 6882c965db44STomer Tayar results_offset += 6883c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6884c965db44STomer Tayar results_offset), 6885c965db44STomer Tayar "[%d]", hdr->mem_entry_id + 6886c965db44STomer Tayar reg_hdr->start_entry); 6887c965db44STomer Tayar results_offset += 6888c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6889c965db44STomer Tayar results_offset), "="); 6890c965db44STomer Tayar for (j = 0; j < reg_hdr->size; j++, dump_buf++) { 6891c965db44STomer Tayar results_offset += 6892c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6893c965db44STomer Tayar results_offset), 6894c965db44STomer Tayar "0x%x", *dump_buf); 6895c965db44STomer Tayar if (j < reg_hdr->size - 1) 6896c965db44STomer Tayar results_offset += 6897c965db44STomer Tayar sprintf(qed_get_buf_ptr 6898c965db44STomer Tayar (results_buf, 6899c965db44STomer Tayar results_offset), ","); 6900c965db44STomer Tayar } 6901c965db44STomer Tayar } 6902c965db44STomer Tayar 6903c965db44STomer Tayar results_offset += 6904c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, results_offset), "\n"); 6905c965db44STomer Tayar } 6906c965db44STomer Tayar 6907c965db44STomer Tayar /* Check if end of dump buffer was exceeded */ 6908c965db44STomer Tayar if (dump_buf > dump_buf_end) 6909c965db44STomer Tayar return 0; 69107b6859fbSMintz, Yuval 6911c965db44STomer Tayar return results_offset; 6912c965db44STomer Tayar } 6913c965db44STomer Tayar 6914c965db44STomer Tayar /* Parses an idle check dump buffer. 6915c965db44STomer Tayar * If result_buf is not NULL, the idle check results are printed to it. 6916c965db44STomer Tayar * In any case, the required results buffer size is assigned to 6917c965db44STomer Tayar * parsed_results_bytes. 6918c965db44STomer Tayar * The parsing status is returned. 6919c965db44STomer Tayar */ 6920da090917STomer Tayar static enum dbg_status qed_parse_idle_chk_dump(u32 *dump_buf, 6921c965db44STomer Tayar u32 num_dumped_dwords, 6922c965db44STomer Tayar char *results_buf, 6923c965db44STomer Tayar u32 *parsed_results_bytes, 6924c965db44STomer Tayar u32 *num_errors, 6925c965db44STomer Tayar u32 *num_warnings) 6926c965db44STomer Tayar { 6927c965db44STomer Tayar const char *section_name, *param_name, *param_str_val; 6928c965db44STomer Tayar u32 *dump_buf_end = dump_buf + num_dumped_dwords; 6929c965db44STomer Tayar u32 num_section_params = 0, num_rules; 69307b6859fbSMintz, Yuval 69317b6859fbSMintz, Yuval /* Offset in results_buf in bytes */ 69327b6859fbSMintz, Yuval u32 results_offset = 0; 6933c965db44STomer Tayar 6934c965db44STomer Tayar *parsed_results_bytes = 0; 6935c965db44STomer Tayar *num_errors = 0; 6936c965db44STomer Tayar *num_warnings = 0; 69377b6859fbSMintz, Yuval 69387b6859fbSMintz, Yuval if (!s_user_dbg_arrays[BIN_BUF_DBG_PARSING_STRINGS].ptr || 69397b6859fbSMintz, Yuval !s_user_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_PARSING_DATA].ptr) 6940c965db44STomer Tayar return DBG_STATUS_DBG_ARRAY_NOT_SET; 6941c965db44STomer Tayar 6942c965db44STomer Tayar /* Read global_params section */ 6943c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 6944c965db44STomer Tayar §ion_name, &num_section_params); 6945c965db44STomer Tayar if (strcmp(section_name, "global_params")) 6946c965db44STomer Tayar return DBG_STATUS_IDLE_CHK_PARSE_FAILED; 6947c965db44STomer Tayar 6948c965db44STomer Tayar /* Print global params */ 6949c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 6950c965db44STomer Tayar num_section_params, 6951c965db44STomer Tayar results_buf, &results_offset); 6952c965db44STomer Tayar 6953c965db44STomer Tayar /* Read idle_chk section */ 6954c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 6955c965db44STomer Tayar §ion_name, &num_section_params); 6956c965db44STomer Tayar if (strcmp(section_name, "idle_chk") || num_section_params != 1) 6957c965db44STomer Tayar return DBG_STATUS_IDLE_CHK_PARSE_FAILED; 6958c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 6959c965db44STomer Tayar ¶m_name, ¶m_str_val, &num_rules); 69607b6859fbSMintz, Yuval if (strcmp(param_name, "num_rules")) 6961c965db44STomer Tayar return DBG_STATUS_IDLE_CHK_PARSE_FAILED; 6962c965db44STomer Tayar 6963c965db44STomer Tayar if (num_rules) { 6964c965db44STomer Tayar u32 rules_print_size; 6965c965db44STomer Tayar 6966c965db44STomer Tayar /* Print FW output */ 6967c965db44STomer Tayar results_offset += 6968c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6969c965db44STomer Tayar results_offset), 6970c965db44STomer Tayar "FW_IDLE_CHECK:\n"); 6971c965db44STomer Tayar rules_print_size = 6972da090917STomer Tayar qed_parse_idle_chk_dump_rules(dump_buf, 6973da090917STomer Tayar dump_buf_end, 6974da090917STomer Tayar num_rules, 6975c965db44STomer Tayar true, 6976c965db44STomer Tayar results_buf ? 6977c965db44STomer Tayar results_buf + 6978da090917STomer Tayar results_offset : 6979da090917STomer Tayar NULL, 6980da090917STomer Tayar num_errors, 6981da090917STomer Tayar num_warnings); 6982c965db44STomer Tayar results_offset += rules_print_size; 69837b6859fbSMintz, Yuval if (!rules_print_size) 6984c965db44STomer Tayar return DBG_STATUS_IDLE_CHK_PARSE_FAILED; 6985c965db44STomer Tayar 6986c965db44STomer Tayar /* Print LSI output */ 6987c965db44STomer Tayar results_offset += 6988c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 6989c965db44STomer Tayar results_offset), 6990c965db44STomer Tayar "\nLSI_IDLE_CHECK:\n"); 6991c965db44STomer Tayar rules_print_size = 6992da090917STomer Tayar qed_parse_idle_chk_dump_rules(dump_buf, 6993da090917STomer Tayar dump_buf_end, 6994da090917STomer Tayar num_rules, 6995c965db44STomer Tayar false, 6996c965db44STomer Tayar results_buf ? 6997c965db44STomer Tayar results_buf + 6998da090917STomer Tayar results_offset : 6999da090917STomer Tayar NULL, 7000da090917STomer Tayar num_errors, 7001da090917STomer Tayar num_warnings); 7002c965db44STomer Tayar results_offset += rules_print_size; 70037b6859fbSMintz, Yuval if (!rules_print_size) 7004c965db44STomer Tayar return DBG_STATUS_IDLE_CHK_PARSE_FAILED; 7005c965db44STomer Tayar } 7006c965db44STomer Tayar 7007c965db44STomer Tayar /* Print errors/warnings count */ 70087b6859fbSMintz, Yuval if (*num_errors) 7009c965db44STomer Tayar results_offset += 7010c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 7011c965db44STomer Tayar results_offset), 7012c965db44STomer Tayar "\nIdle Check failed!!! (with %d errors and %d warnings)\n", 7013c965db44STomer Tayar *num_errors, *num_warnings); 70147b6859fbSMintz, Yuval else if (*num_warnings) 7015c965db44STomer Tayar results_offset += 7016c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 7017c965db44STomer Tayar results_offset), 70187b6859fbSMintz, Yuval "\nIdle Check completed successfully (with %d warnings)\n", 7019c965db44STomer Tayar *num_warnings); 70207b6859fbSMintz, Yuval else 7021c965db44STomer Tayar results_offset += 7022c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 7023c965db44STomer Tayar results_offset), 70247b6859fbSMintz, Yuval "\nIdle Check completed successfully\n"); 7025c965db44STomer Tayar 7026c965db44STomer Tayar /* Add 1 for string NULL termination */ 7027c965db44STomer Tayar *parsed_results_bytes = results_offset + 1; 70287b6859fbSMintz, Yuval 7029c965db44STomer Tayar return DBG_STATUS_OK; 7030c965db44STomer Tayar } 7031c965db44STomer Tayar 7032c965db44STomer Tayar /* Allocates and fills MCP Trace meta data based on the specified meta data 7033c965db44STomer Tayar * dump buffer. 7034c965db44STomer Tayar * Returns debug status code. 7035c965db44STomer Tayar */ 7036a3f72307SDenis Bolotin static enum dbg_status 7037a3f72307SDenis Bolotin qed_mcp_trace_alloc_meta_data(struct qed_hwfn *p_hwfn, 7038a3f72307SDenis Bolotin const u32 *meta_buf) 7039c965db44STomer Tayar { 7040a3f72307SDenis Bolotin struct dbg_tools_user_data *dev_user_data; 7041c965db44STomer Tayar u32 offset = 0, signature, i; 7042a3f72307SDenis Bolotin struct mcp_trace_meta *meta; 7043a3f72307SDenis Bolotin u8 *meta_buf_bytes; 7044a3f72307SDenis Bolotin 7045a3f72307SDenis Bolotin dev_user_data = qed_dbg_get_user_data(p_hwfn); 7046a3f72307SDenis Bolotin meta = &dev_user_data->mcp_trace_meta; 7047a3f72307SDenis Bolotin meta_buf_bytes = (u8 *)meta_buf; 7048c965db44STomer Tayar 704950bc60cbSMichal Kalderon /* Free the previous meta before loading a new one. */ 7050a3f72307SDenis Bolotin if (meta->is_allocated) 7051a3f72307SDenis Bolotin qed_mcp_trace_free_meta_data(p_hwfn); 705250bc60cbSMichal Kalderon 7053c965db44STomer Tayar memset(meta, 0, sizeof(*meta)); 7054c965db44STomer Tayar 7055c965db44STomer Tayar /* Read first signature */ 7056c965db44STomer Tayar signature = qed_read_dword_from_buf(meta_buf_bytes, &offset); 70577b6859fbSMintz, Yuval if (signature != NVM_MAGIC_VALUE) 7058c965db44STomer Tayar return DBG_STATUS_INVALID_TRACE_SIGNATURE; 7059c965db44STomer Tayar 70607b6859fbSMintz, Yuval /* Read no. of modules and allocate memory for their pointers */ 7061c965db44STomer Tayar meta->modules_num = qed_read_byte_from_buf(meta_buf_bytes, &offset); 70626396bb22SKees Cook meta->modules = kcalloc(meta->modules_num, sizeof(char *), 70636396bb22SKees Cook GFP_KERNEL); 7064c965db44STomer Tayar if (!meta->modules) 7065c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 7066c965db44STomer Tayar 7067c965db44STomer Tayar /* Allocate and read all module strings */ 7068c965db44STomer Tayar for (i = 0; i < meta->modules_num; i++) { 7069c965db44STomer Tayar u8 module_len = qed_read_byte_from_buf(meta_buf_bytes, &offset); 7070c965db44STomer Tayar 7071c965db44STomer Tayar *(meta->modules + i) = kzalloc(module_len, GFP_KERNEL); 7072c965db44STomer Tayar if (!(*(meta->modules + i))) { 7073c965db44STomer Tayar /* Update number of modules to be released */ 7074c965db44STomer Tayar meta->modules_num = i ? i - 1 : 0; 7075c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 7076c965db44STomer Tayar } 7077c965db44STomer Tayar 7078c965db44STomer Tayar qed_read_str_from_buf(meta_buf_bytes, &offset, module_len, 7079c965db44STomer Tayar *(meta->modules + i)); 7080c965db44STomer Tayar if (module_len > MCP_TRACE_MAX_MODULE_LEN) 7081c965db44STomer Tayar (*(meta->modules + i))[MCP_TRACE_MAX_MODULE_LEN] = '\0'; 7082c965db44STomer Tayar } 7083c965db44STomer Tayar 7084c965db44STomer Tayar /* Read second signature */ 7085c965db44STomer Tayar signature = qed_read_dword_from_buf(meta_buf_bytes, &offset); 70867b6859fbSMintz, Yuval if (signature != NVM_MAGIC_VALUE) 7087c965db44STomer Tayar return DBG_STATUS_INVALID_TRACE_SIGNATURE; 7088c965db44STomer Tayar 7089c965db44STomer Tayar /* Read number of formats and allocate memory for all formats */ 7090c965db44STomer Tayar meta->formats_num = qed_read_dword_from_buf(meta_buf_bytes, &offset); 70916396bb22SKees Cook meta->formats = kcalloc(meta->formats_num, 7092c965db44STomer Tayar sizeof(struct mcp_trace_format), 7093c965db44STomer Tayar GFP_KERNEL); 7094c965db44STomer Tayar if (!meta->formats) 7095c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 7096c965db44STomer Tayar 7097c965db44STomer Tayar /* Allocate and read all strings */ 7098c965db44STomer Tayar for (i = 0; i < meta->formats_num; i++) { 7099c965db44STomer Tayar struct mcp_trace_format *format_ptr = &meta->formats[i]; 7100c965db44STomer Tayar u8 format_len; 7101c965db44STomer Tayar 7102c965db44STomer Tayar format_ptr->data = qed_read_dword_from_buf(meta_buf_bytes, 7103c965db44STomer Tayar &offset); 7104c965db44STomer Tayar format_len = 7105c965db44STomer Tayar (format_ptr->data & 7106c965db44STomer Tayar MCP_TRACE_FORMAT_LEN_MASK) >> MCP_TRACE_FORMAT_LEN_SHIFT; 7107c965db44STomer Tayar format_ptr->format_str = kzalloc(format_len, GFP_KERNEL); 7108c965db44STomer Tayar if (!format_ptr->format_str) { 7109c965db44STomer Tayar /* Update number of modules to be released */ 7110c965db44STomer Tayar meta->formats_num = i ? i - 1 : 0; 7111c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 7112c965db44STomer Tayar } 7113c965db44STomer Tayar 7114c965db44STomer Tayar qed_read_str_from_buf(meta_buf_bytes, 7115c965db44STomer Tayar &offset, 7116c965db44STomer Tayar format_len, format_ptr->format_str); 7117c965db44STomer Tayar } 7118c965db44STomer Tayar 7119a3f72307SDenis Bolotin meta->is_allocated = true; 7120c965db44STomer Tayar return DBG_STATUS_OK; 7121c965db44STomer Tayar } 7122c965db44STomer Tayar 712350bc60cbSMichal Kalderon /* Parses an MCP trace buffer. If result_buf is not NULL, the MCP Trace results 712450bc60cbSMichal Kalderon * are printed to it. The parsing status is returned. 712550bc60cbSMichal Kalderon * Arguments: 712650bc60cbSMichal Kalderon * trace_buf - MCP trace cyclic buffer 712750bc60cbSMichal Kalderon * trace_buf_size - MCP trace cyclic buffer size in bytes 712850bc60cbSMichal Kalderon * data_offset - offset in bytes of the data to parse in the MCP trace cyclic 712950bc60cbSMichal Kalderon * buffer. 713050bc60cbSMichal Kalderon * data_size - size in bytes of data to parse. 713150bc60cbSMichal Kalderon * parsed_buf - destination buffer for parsed data. 7132a3f72307SDenis Bolotin * parsed_results_bytes - size of parsed data in bytes. 713350bc60cbSMichal Kalderon */ 7134a3f72307SDenis Bolotin static enum dbg_status qed_parse_mcp_trace_buf(struct qed_hwfn *p_hwfn, 7135a3f72307SDenis Bolotin u8 *trace_buf, 713650bc60cbSMichal Kalderon u32 trace_buf_size, 713750bc60cbSMichal Kalderon u32 data_offset, 713850bc60cbSMichal Kalderon u32 data_size, 713950bc60cbSMichal Kalderon char *parsed_buf, 7140a3f72307SDenis Bolotin u32 *parsed_results_bytes) 714150bc60cbSMichal Kalderon { 7142a3f72307SDenis Bolotin struct dbg_tools_user_data *dev_user_data; 7143a3f72307SDenis Bolotin struct mcp_trace_meta *meta; 714450bc60cbSMichal Kalderon u32 param_mask, param_shift; 714550bc60cbSMichal Kalderon enum dbg_status status; 714650bc60cbSMichal Kalderon 7147a3f72307SDenis Bolotin dev_user_data = qed_dbg_get_user_data(p_hwfn); 7148a3f72307SDenis Bolotin meta = &dev_user_data->mcp_trace_meta; 7149a3f72307SDenis Bolotin *parsed_results_bytes = 0; 715050bc60cbSMichal Kalderon 7151a3f72307SDenis Bolotin if (!meta->is_allocated) 715250bc60cbSMichal Kalderon return DBG_STATUS_MCP_TRACE_BAD_DATA; 715350bc60cbSMichal Kalderon 715450bc60cbSMichal Kalderon status = DBG_STATUS_OK; 715550bc60cbSMichal Kalderon 715650bc60cbSMichal Kalderon while (data_size) { 715750bc60cbSMichal Kalderon struct mcp_trace_format *format_ptr; 715850bc60cbSMichal Kalderon u8 format_level, format_module; 715950bc60cbSMichal Kalderon u32 params[3] = { 0, 0, 0 }; 716050bc60cbSMichal Kalderon u32 header, format_idx, i; 716150bc60cbSMichal Kalderon 716250bc60cbSMichal Kalderon if (data_size < MFW_TRACE_ENTRY_SIZE) 716350bc60cbSMichal Kalderon return DBG_STATUS_MCP_TRACE_BAD_DATA; 716450bc60cbSMichal Kalderon 716550bc60cbSMichal Kalderon header = qed_read_from_cyclic_buf(trace_buf, 716650bc60cbSMichal Kalderon &data_offset, 716750bc60cbSMichal Kalderon trace_buf_size, 716850bc60cbSMichal Kalderon MFW_TRACE_ENTRY_SIZE); 716950bc60cbSMichal Kalderon data_size -= MFW_TRACE_ENTRY_SIZE; 717050bc60cbSMichal Kalderon format_idx = header & MFW_TRACE_EVENTID_MASK; 717150bc60cbSMichal Kalderon 717250bc60cbSMichal Kalderon /* Skip message if its index doesn't exist in the meta data */ 7173a3f72307SDenis Bolotin if (format_idx >= meta->formats_num) { 717450bc60cbSMichal Kalderon u8 format_size = 717550bc60cbSMichal Kalderon (u8)((header & MFW_TRACE_PRM_SIZE_MASK) >> 717650bc60cbSMichal Kalderon MFW_TRACE_PRM_SIZE_SHIFT); 717750bc60cbSMichal Kalderon 717850bc60cbSMichal Kalderon if (data_size < format_size) 717950bc60cbSMichal Kalderon return DBG_STATUS_MCP_TRACE_BAD_DATA; 718050bc60cbSMichal Kalderon 718150bc60cbSMichal Kalderon data_offset = qed_cyclic_add(data_offset, 718250bc60cbSMichal Kalderon format_size, 718350bc60cbSMichal Kalderon trace_buf_size); 718450bc60cbSMichal Kalderon data_size -= format_size; 718550bc60cbSMichal Kalderon continue; 718650bc60cbSMichal Kalderon } 718750bc60cbSMichal Kalderon 7188a3f72307SDenis Bolotin format_ptr = &meta->formats[format_idx]; 718950bc60cbSMichal Kalderon 719050bc60cbSMichal Kalderon for (i = 0, 719150bc60cbSMichal Kalderon param_mask = MCP_TRACE_FORMAT_P1_SIZE_MASK, 719250bc60cbSMichal Kalderon param_shift = MCP_TRACE_FORMAT_P1_SIZE_SHIFT; 719350bc60cbSMichal Kalderon i < MCP_TRACE_FORMAT_MAX_PARAMS; 719450bc60cbSMichal Kalderon i++, 719550bc60cbSMichal Kalderon param_mask <<= MCP_TRACE_FORMAT_PARAM_WIDTH, 719650bc60cbSMichal Kalderon param_shift += MCP_TRACE_FORMAT_PARAM_WIDTH) { 719750bc60cbSMichal Kalderon /* Extract param size (0..3) */ 719850bc60cbSMichal Kalderon u8 param_size = (u8)((format_ptr->data & param_mask) >> 719950bc60cbSMichal Kalderon param_shift); 720050bc60cbSMichal Kalderon 720150bc60cbSMichal Kalderon /* If the param size is zero, there are no other 720250bc60cbSMichal Kalderon * parameters. 720350bc60cbSMichal Kalderon */ 720450bc60cbSMichal Kalderon if (!param_size) 720550bc60cbSMichal Kalderon break; 720650bc60cbSMichal Kalderon 720750bc60cbSMichal Kalderon /* Size is encoded using 2 bits, where 3 is used to 720850bc60cbSMichal Kalderon * encode 4. 720950bc60cbSMichal Kalderon */ 721050bc60cbSMichal Kalderon if (param_size == 3) 721150bc60cbSMichal Kalderon param_size = 4; 721250bc60cbSMichal Kalderon 721350bc60cbSMichal Kalderon if (data_size < param_size) 721450bc60cbSMichal Kalderon return DBG_STATUS_MCP_TRACE_BAD_DATA; 721550bc60cbSMichal Kalderon 721650bc60cbSMichal Kalderon params[i] = qed_read_from_cyclic_buf(trace_buf, 721750bc60cbSMichal Kalderon &data_offset, 721850bc60cbSMichal Kalderon trace_buf_size, 721950bc60cbSMichal Kalderon param_size); 722050bc60cbSMichal Kalderon data_size -= param_size; 722150bc60cbSMichal Kalderon } 722250bc60cbSMichal Kalderon 722350bc60cbSMichal Kalderon format_level = (u8)((format_ptr->data & 722450bc60cbSMichal Kalderon MCP_TRACE_FORMAT_LEVEL_MASK) >> 722550bc60cbSMichal Kalderon MCP_TRACE_FORMAT_LEVEL_SHIFT); 722650bc60cbSMichal Kalderon format_module = (u8)((format_ptr->data & 722750bc60cbSMichal Kalderon MCP_TRACE_FORMAT_MODULE_MASK) >> 722850bc60cbSMichal Kalderon MCP_TRACE_FORMAT_MODULE_SHIFT); 722950bc60cbSMichal Kalderon if (format_level >= ARRAY_SIZE(s_mcp_trace_level_str)) 723050bc60cbSMichal Kalderon return DBG_STATUS_MCP_TRACE_BAD_DATA; 723150bc60cbSMichal Kalderon 723250bc60cbSMichal Kalderon /* Print current message to results buffer */ 7233a3f72307SDenis Bolotin *parsed_results_bytes += 7234a3f72307SDenis Bolotin sprintf(qed_get_buf_ptr(parsed_buf, 7235a3f72307SDenis Bolotin *parsed_results_bytes), 723650bc60cbSMichal Kalderon "%s %-8s: ", 723750bc60cbSMichal Kalderon s_mcp_trace_level_str[format_level], 7238a3f72307SDenis Bolotin meta->modules[format_module]); 7239a3f72307SDenis Bolotin *parsed_results_bytes += 7240a3f72307SDenis Bolotin sprintf(qed_get_buf_ptr(parsed_buf, *parsed_results_bytes), 724150bc60cbSMichal Kalderon format_ptr->format_str, 724250bc60cbSMichal Kalderon params[0], params[1], params[2]); 724350bc60cbSMichal Kalderon } 724450bc60cbSMichal Kalderon 724550bc60cbSMichal Kalderon /* Add string NULL terminator */ 7246a3f72307SDenis Bolotin (*parsed_results_bytes)++; 724750bc60cbSMichal Kalderon 724850bc60cbSMichal Kalderon return status; 724950bc60cbSMichal Kalderon } 725050bc60cbSMichal Kalderon 7251c965db44STomer Tayar /* Parses an MCP Trace dump buffer. 7252c965db44STomer Tayar * If result_buf is not NULL, the MCP Trace results are printed to it. 7253c965db44STomer Tayar * In any case, the required results buffer size is assigned to 7254a3f72307SDenis Bolotin * parsed_results_bytes. 7255c965db44STomer Tayar * The parsing status is returned. 7256c965db44STomer Tayar */ 7257c965db44STomer Tayar static enum dbg_status qed_parse_mcp_trace_dump(struct qed_hwfn *p_hwfn, 7258c965db44STomer Tayar u32 *dump_buf, 7259a3f72307SDenis Bolotin char *results_buf, 7260a3f72307SDenis Bolotin u32 *parsed_results_bytes, 7261a3f72307SDenis Bolotin bool free_meta_data) 7262c965db44STomer Tayar { 7263c965db44STomer Tayar const char *section_name, *param_name, *param_str_val; 726450bc60cbSMichal Kalderon u32 data_size, trace_data_dwords, trace_meta_dwords; 7265a3f72307SDenis Bolotin u32 offset, results_offset, results_buf_bytes; 726650bc60cbSMichal Kalderon u32 param_num_val, num_section_params; 7267c965db44STomer Tayar struct mcp_trace *trace; 7268c965db44STomer Tayar enum dbg_status status; 7269c965db44STomer Tayar const u32 *meta_buf; 7270c965db44STomer Tayar u8 *trace_buf; 7271c965db44STomer Tayar 7272a3f72307SDenis Bolotin *parsed_results_bytes = 0; 7273c965db44STomer Tayar 7274c965db44STomer Tayar /* Read global_params section */ 7275c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 7276c965db44STomer Tayar §ion_name, &num_section_params); 7277c965db44STomer Tayar if (strcmp(section_name, "global_params")) 7278c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_BAD_DATA; 7279c965db44STomer Tayar 7280c965db44STomer Tayar /* Print global params */ 7281c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 7282c965db44STomer Tayar num_section_params, 7283a3f72307SDenis Bolotin results_buf, &results_offset); 7284c965db44STomer Tayar 7285c965db44STomer Tayar /* Read trace_data section */ 7286c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 7287c965db44STomer Tayar §ion_name, &num_section_params); 7288c965db44STomer Tayar if (strcmp(section_name, "mcp_trace_data") || num_section_params != 1) 7289c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_BAD_DATA; 7290c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 7291c965db44STomer Tayar ¶m_name, ¶m_str_val, ¶m_num_val); 7292c965db44STomer Tayar if (strcmp(param_name, "size")) 7293c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_BAD_DATA; 7294c965db44STomer Tayar trace_data_dwords = param_num_val; 7295c965db44STomer Tayar 7296c965db44STomer Tayar /* Prepare trace info */ 7297c965db44STomer Tayar trace = (struct mcp_trace *)dump_buf; 7298a3f72307SDenis Bolotin if (trace->signature != MFW_TRACE_SIGNATURE || !trace->size) 7299a3f72307SDenis Bolotin return DBG_STATUS_MCP_TRACE_BAD_DATA; 7300a3f72307SDenis Bolotin 73017b6859fbSMintz, Yuval trace_buf = (u8 *)dump_buf + sizeof(*trace); 7302c965db44STomer Tayar offset = trace->trace_oldest; 730350bc60cbSMichal Kalderon data_size = qed_cyclic_sub(trace->trace_prod, offset, trace->size); 7304c965db44STomer Tayar dump_buf += trace_data_dwords; 7305c965db44STomer Tayar 7306c965db44STomer Tayar /* Read meta_data section */ 7307c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 7308c965db44STomer Tayar §ion_name, &num_section_params); 7309c965db44STomer Tayar if (strcmp(section_name, "mcp_trace_meta")) 7310c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_BAD_DATA; 7311c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 7312c965db44STomer Tayar ¶m_name, ¶m_str_val, ¶m_num_val); 73137b6859fbSMintz, Yuval if (strcmp(param_name, "size")) 7314c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_BAD_DATA; 7315c965db44STomer Tayar trace_meta_dwords = param_num_val; 7316c965db44STomer Tayar 7317c965db44STomer Tayar /* Choose meta data buffer */ 7318c965db44STomer Tayar if (!trace_meta_dwords) { 7319c965db44STomer Tayar /* Dump doesn't include meta data */ 7320a3f72307SDenis Bolotin struct dbg_tools_user_data *dev_user_data = 7321a3f72307SDenis Bolotin qed_dbg_get_user_data(p_hwfn); 7322a3f72307SDenis Bolotin 7323a3f72307SDenis Bolotin if (!dev_user_data->mcp_trace_user_meta_buf) 7324c965db44STomer Tayar return DBG_STATUS_MCP_TRACE_NO_META; 7325a3f72307SDenis Bolotin 7326a3f72307SDenis Bolotin meta_buf = dev_user_data->mcp_trace_user_meta_buf; 7327c965db44STomer Tayar } else { 7328c965db44STomer Tayar /* Dump includes meta data */ 7329c965db44STomer Tayar meta_buf = dump_buf; 7330c965db44STomer Tayar } 7331c965db44STomer Tayar 7332c965db44STomer Tayar /* Allocate meta data memory */ 7333a3f72307SDenis Bolotin status = qed_mcp_trace_alloc_meta_data(p_hwfn, meta_buf); 7334c965db44STomer Tayar if (status != DBG_STATUS_OK) 7335c965db44STomer Tayar return status; 733650bc60cbSMichal Kalderon 7337a3f72307SDenis Bolotin status = qed_parse_mcp_trace_buf(p_hwfn, 7338a3f72307SDenis Bolotin trace_buf, 733950bc60cbSMichal Kalderon trace->size, 734050bc60cbSMichal Kalderon offset, 734150bc60cbSMichal Kalderon data_size, 7342a3f72307SDenis Bolotin results_buf ? 7343a3f72307SDenis Bolotin results_buf + results_offset : 734450bc60cbSMichal Kalderon NULL, 7345a3f72307SDenis Bolotin &results_buf_bytes); 734650bc60cbSMichal Kalderon if (status != DBG_STATUS_OK) 734750bc60cbSMichal Kalderon return status; 734850bc60cbSMichal Kalderon 7349a3f72307SDenis Bolotin if (free_meta_data) 7350a3f72307SDenis Bolotin qed_mcp_trace_free_meta_data(p_hwfn); 7351a3f72307SDenis Bolotin 7352a3f72307SDenis Bolotin *parsed_results_bytes = results_offset + results_buf_bytes; 735350bc60cbSMichal Kalderon 735450bc60cbSMichal Kalderon return DBG_STATUS_OK; 7355c965db44STomer Tayar } 7356c965db44STomer Tayar 7357c965db44STomer Tayar /* Parses a Reg FIFO dump buffer. 7358c965db44STomer Tayar * If result_buf is not NULL, the Reg FIFO results are printed to it. 7359c965db44STomer Tayar * In any case, the required results buffer size is assigned to 7360c965db44STomer Tayar * parsed_results_bytes. 7361c965db44STomer Tayar * The parsing status is returned. 7362c965db44STomer Tayar */ 7363da090917STomer Tayar static enum dbg_status qed_parse_reg_fifo_dump(u32 *dump_buf, 7364c965db44STomer Tayar char *results_buf, 7365c965db44STomer Tayar u32 *parsed_results_bytes) 7366c965db44STomer Tayar { 7367c965db44STomer Tayar const char *section_name, *param_name, *param_str_val; 73687b6859fbSMintz, Yuval u32 param_num_val, num_section_params, num_elements; 7369c965db44STomer Tayar struct reg_fifo_element *elements; 7370c965db44STomer Tayar u8 i, j, err_val, vf_val; 73717b6859fbSMintz, Yuval u32 results_offset = 0; 7372c965db44STomer Tayar char vf_str[4]; 7373c965db44STomer Tayar 7374c965db44STomer Tayar /* Read global_params section */ 7375c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 7376c965db44STomer Tayar §ion_name, &num_section_params); 7377c965db44STomer Tayar if (strcmp(section_name, "global_params")) 7378c965db44STomer Tayar return DBG_STATUS_REG_FIFO_BAD_DATA; 7379c965db44STomer Tayar 7380c965db44STomer Tayar /* Print global params */ 7381c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 7382c965db44STomer Tayar num_section_params, 7383c965db44STomer Tayar results_buf, &results_offset); 7384c965db44STomer Tayar 7385c965db44STomer Tayar /* Read reg_fifo_data section */ 7386c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 7387c965db44STomer Tayar §ion_name, &num_section_params); 7388c965db44STomer Tayar if (strcmp(section_name, "reg_fifo_data")) 7389c965db44STomer Tayar return DBG_STATUS_REG_FIFO_BAD_DATA; 7390c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 7391c965db44STomer Tayar ¶m_name, ¶m_str_val, ¶m_num_val); 7392c965db44STomer Tayar if (strcmp(param_name, "size")) 7393c965db44STomer Tayar return DBG_STATUS_REG_FIFO_BAD_DATA; 7394c965db44STomer Tayar if (param_num_val % REG_FIFO_ELEMENT_DWORDS) 7395c965db44STomer Tayar return DBG_STATUS_REG_FIFO_BAD_DATA; 7396c965db44STomer Tayar num_elements = param_num_val / REG_FIFO_ELEMENT_DWORDS; 7397c965db44STomer Tayar elements = (struct reg_fifo_element *)dump_buf; 7398c965db44STomer Tayar 7399c965db44STomer Tayar /* Decode elements */ 7400c965db44STomer Tayar for (i = 0; i < num_elements; i++) { 7401c965db44STomer Tayar bool err_printed = false; 7402c965db44STomer Tayar 7403c965db44STomer Tayar /* Discover if element belongs to a VF or a PF */ 7404c965db44STomer Tayar vf_val = GET_FIELD(elements[i].data, REG_FIFO_ELEMENT_VF); 7405c965db44STomer Tayar if (vf_val == REG_FIFO_ELEMENT_IS_PF_VF_VAL) 7406c965db44STomer Tayar sprintf(vf_str, "%s", "N/A"); 7407c965db44STomer Tayar else 7408c965db44STomer Tayar sprintf(vf_str, "%d", vf_val); 7409c965db44STomer Tayar 7410c965db44STomer Tayar /* Add parsed element to parsed buffer */ 7411c965db44STomer Tayar results_offset += 7412c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 7413c965db44STomer Tayar results_offset), 7414be086e7cSMintz, Yuval "raw: 0x%016llx, address: 0x%07x, access: %-5s, pf: %2d, vf: %s, port: %d, privilege: %-3s, protection: %-12s, master: %-4s, errors: ", 7415c965db44STomer Tayar elements[i].data, 7416be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 7417c965db44STomer Tayar REG_FIFO_ELEMENT_ADDRESS) * 7418c965db44STomer Tayar REG_FIFO_ELEMENT_ADDR_FACTOR, 7419c965db44STomer Tayar s_access_strs[GET_FIELD(elements[i].data, 7420c965db44STomer Tayar REG_FIFO_ELEMENT_ACCESS)], 7421be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 74227b6859fbSMintz, Yuval REG_FIFO_ELEMENT_PF), 74237b6859fbSMintz, Yuval vf_str, 7424be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 7425c965db44STomer Tayar REG_FIFO_ELEMENT_PORT), 74267b6859fbSMintz, Yuval s_privilege_strs[GET_FIELD(elements[i].data, 7427c965db44STomer Tayar REG_FIFO_ELEMENT_PRIVILEGE)], 7428c965db44STomer Tayar s_protection_strs[GET_FIELD(elements[i].data, 7429c965db44STomer Tayar REG_FIFO_ELEMENT_PROTECTION)], 7430c965db44STomer Tayar s_master_strs[GET_FIELD(elements[i].data, 7431c965db44STomer Tayar REG_FIFO_ELEMENT_MASTER)]); 7432c965db44STomer Tayar 7433c965db44STomer Tayar /* Print errors */ 7434c965db44STomer Tayar for (j = 0, 7435c965db44STomer Tayar err_val = GET_FIELD(elements[i].data, 7436c965db44STomer Tayar REG_FIFO_ELEMENT_ERROR); 7437c965db44STomer Tayar j < ARRAY_SIZE(s_reg_fifo_error_strs); 7438c965db44STomer Tayar j++, err_val >>= 1) { 74397b6859fbSMintz, Yuval if (err_val & 0x1) { 7440c965db44STomer Tayar if (err_printed) 7441c965db44STomer Tayar results_offset += 74427b6859fbSMintz, Yuval sprintf(qed_get_buf_ptr 74437b6859fbSMintz, Yuval (results_buf, 74447b6859fbSMintz, Yuval results_offset), ", "); 7445c965db44STomer Tayar results_offset += 74467b6859fbSMintz, Yuval sprintf(qed_get_buf_ptr 74477b6859fbSMintz, Yuval (results_buf, results_offset), "%s", 7448c965db44STomer Tayar s_reg_fifo_error_strs[j]); 7449c965db44STomer Tayar err_printed = true; 7450c965db44STomer Tayar } 74517b6859fbSMintz, Yuval } 7452c965db44STomer Tayar 7453c965db44STomer Tayar results_offset += 7454c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, results_offset), "\n"); 7455c965db44STomer Tayar } 7456c965db44STomer Tayar 7457c965db44STomer Tayar results_offset += sprintf(qed_get_buf_ptr(results_buf, 7458c965db44STomer Tayar results_offset), 7459c965db44STomer Tayar "fifo contained %d elements", num_elements); 7460c965db44STomer Tayar 7461c965db44STomer Tayar /* Add 1 for string NULL termination */ 7462c965db44STomer Tayar *parsed_results_bytes = results_offset + 1; 74637b6859fbSMintz, Yuval 7464c965db44STomer Tayar return DBG_STATUS_OK; 7465c965db44STomer Tayar } 7466c965db44STomer Tayar 74677b6859fbSMintz, Yuval static enum dbg_status qed_parse_igu_fifo_element(struct igu_fifo_element 74687b6859fbSMintz, Yuval *element, char 74697b6859fbSMintz, Yuval *results_buf, 7470da090917STomer Tayar u32 *results_offset) 7471c965db44STomer Tayar { 74727b6859fbSMintz, Yuval const struct igu_fifo_addr_data *found_addr = NULL; 74737b6859fbSMintz, Yuval u8 source, err_type, i, is_cleanup; 74747b6859fbSMintz, Yuval char parsed_addr_data[32]; 74757b6859fbSMintz, Yuval char parsed_wr_data[256]; 74767b6859fbSMintz, Yuval u32 wr_data, prod_cons; 74777b6859fbSMintz, Yuval bool is_wr_cmd, is_pf; 74787b6859fbSMintz, Yuval u16 cmd_addr; 74797b6859fbSMintz, Yuval u64 dword12; 74807b6859fbSMintz, Yuval 74817b6859fbSMintz, Yuval /* Dword12 (dword index 1 and 2) contains bits 32..95 of the 74827b6859fbSMintz, Yuval * FIFO element. 74837b6859fbSMintz, Yuval */ 74847b6859fbSMintz, Yuval dword12 = ((u64)element->dword2 << 32) | element->dword1; 74857b6859fbSMintz, Yuval is_wr_cmd = GET_FIELD(dword12, IGU_FIFO_ELEMENT_DWORD12_IS_WR_CMD); 74867b6859fbSMintz, Yuval is_pf = GET_FIELD(element->dword0, IGU_FIFO_ELEMENT_DWORD0_IS_PF); 74877b6859fbSMintz, Yuval cmd_addr = GET_FIELD(element->dword0, IGU_FIFO_ELEMENT_DWORD0_CMD_ADDR); 74887b6859fbSMintz, Yuval source = GET_FIELD(element->dword0, IGU_FIFO_ELEMENT_DWORD0_SOURCE); 74897b6859fbSMintz, Yuval err_type = GET_FIELD(element->dword0, IGU_FIFO_ELEMENT_DWORD0_ERR_TYPE); 74907b6859fbSMintz, Yuval 74917b6859fbSMintz, Yuval if (source >= ARRAY_SIZE(s_igu_fifo_source_strs)) 74927b6859fbSMintz, Yuval return DBG_STATUS_IGU_FIFO_BAD_DATA; 74937b6859fbSMintz, Yuval if (err_type >= ARRAY_SIZE(s_igu_fifo_error_strs)) 74947b6859fbSMintz, Yuval return DBG_STATUS_IGU_FIFO_BAD_DATA; 74957b6859fbSMintz, Yuval 74967b6859fbSMintz, Yuval /* Find address data */ 74977b6859fbSMintz, Yuval for (i = 0; i < ARRAY_SIZE(s_igu_fifo_addr_data) && !found_addr; i++) { 74987b6859fbSMintz, Yuval const struct igu_fifo_addr_data *curr_addr = 74997b6859fbSMintz, Yuval &s_igu_fifo_addr_data[i]; 75007b6859fbSMintz, Yuval 75017b6859fbSMintz, Yuval if (cmd_addr >= curr_addr->start_addr && cmd_addr <= 75027b6859fbSMintz, Yuval curr_addr->end_addr) 75037b6859fbSMintz, Yuval found_addr = curr_addr; 7504c965db44STomer Tayar } 7505c965db44STomer Tayar 75067b6859fbSMintz, Yuval if (!found_addr) 75077b6859fbSMintz, Yuval return DBG_STATUS_IGU_FIFO_BAD_DATA; 7508c965db44STomer Tayar 75097b6859fbSMintz, Yuval /* Prepare parsed address data */ 75107b6859fbSMintz, Yuval switch (found_addr->type) { 75117b6859fbSMintz, Yuval case IGU_ADDR_TYPE_MSIX_MEM: 75127b6859fbSMintz, Yuval sprintf(parsed_addr_data, " vector_num = 0x%x", cmd_addr / 2); 75137b6859fbSMintz, Yuval break; 75147b6859fbSMintz, Yuval case IGU_ADDR_TYPE_WRITE_INT_ACK: 75157b6859fbSMintz, Yuval case IGU_ADDR_TYPE_WRITE_PROD_UPDATE: 75167b6859fbSMintz, Yuval sprintf(parsed_addr_data, 75177b6859fbSMintz, Yuval " SB = 0x%x", cmd_addr - found_addr->start_addr); 75187b6859fbSMintz, Yuval break; 75197b6859fbSMintz, Yuval default: 75207b6859fbSMintz, Yuval parsed_addr_data[0] = '\0'; 75217b6859fbSMintz, Yuval } 75227b6859fbSMintz, Yuval 75237b6859fbSMintz, Yuval if (!is_wr_cmd) { 75247b6859fbSMintz, Yuval parsed_wr_data[0] = '\0'; 75257b6859fbSMintz, Yuval goto out; 75267b6859fbSMintz, Yuval } 75277b6859fbSMintz, Yuval 75287b6859fbSMintz, Yuval /* Prepare parsed write data */ 75297b6859fbSMintz, Yuval wr_data = GET_FIELD(dword12, IGU_FIFO_ELEMENT_DWORD12_WR_DATA); 75307b6859fbSMintz, Yuval prod_cons = GET_FIELD(wr_data, IGU_FIFO_WR_DATA_PROD_CONS); 75317b6859fbSMintz, Yuval is_cleanup = GET_FIELD(wr_data, IGU_FIFO_WR_DATA_CMD_TYPE); 75327b6859fbSMintz, Yuval 75337b6859fbSMintz, Yuval if (source == IGU_SRC_ATTN) { 75347b6859fbSMintz, Yuval sprintf(parsed_wr_data, "prod: 0x%x, ", prod_cons); 75357b6859fbSMintz, Yuval } else { 75367b6859fbSMintz, Yuval if (is_cleanup) { 75377b6859fbSMintz, Yuval u8 cleanup_val, cleanup_type; 75387b6859fbSMintz, Yuval 75397b6859fbSMintz, Yuval cleanup_val = 75407b6859fbSMintz, Yuval GET_FIELD(wr_data, 75417b6859fbSMintz, Yuval IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_VAL); 75427b6859fbSMintz, Yuval cleanup_type = 75437b6859fbSMintz, Yuval GET_FIELD(wr_data, 75447b6859fbSMintz, Yuval IGU_FIFO_CLEANUP_WR_DATA_CLEANUP_TYPE); 75457b6859fbSMintz, Yuval 75467b6859fbSMintz, Yuval sprintf(parsed_wr_data, 75477b6859fbSMintz, Yuval "cmd_type: cleanup, cleanup_val: %s, cleanup_type : %d, ", 75487b6859fbSMintz, Yuval cleanup_val ? "set" : "clear", 75497b6859fbSMintz, Yuval cleanup_type); 75507b6859fbSMintz, Yuval } else { 75517b6859fbSMintz, Yuval u8 update_flag, en_dis_int_for_sb, segment; 75527b6859fbSMintz, Yuval u8 timer_mask; 75537b6859fbSMintz, Yuval 75547b6859fbSMintz, Yuval update_flag = GET_FIELD(wr_data, 75557b6859fbSMintz, Yuval IGU_FIFO_WR_DATA_UPDATE_FLAG); 75567b6859fbSMintz, Yuval en_dis_int_for_sb = 75577b6859fbSMintz, Yuval GET_FIELD(wr_data, 75587b6859fbSMintz, Yuval IGU_FIFO_WR_DATA_EN_DIS_INT_FOR_SB); 75597b6859fbSMintz, Yuval segment = GET_FIELD(wr_data, 75607b6859fbSMintz, Yuval IGU_FIFO_WR_DATA_SEGMENT); 75617b6859fbSMintz, Yuval timer_mask = GET_FIELD(wr_data, 75627b6859fbSMintz, Yuval IGU_FIFO_WR_DATA_TIMER_MASK); 75637b6859fbSMintz, Yuval 75647b6859fbSMintz, Yuval sprintf(parsed_wr_data, 75657b6859fbSMintz, Yuval "cmd_type: prod/cons update, prod/cons: 0x%x, update_flag: %s, en_dis_int_for_sb : %s, segment : %s, timer_mask = %d, ", 75667b6859fbSMintz, Yuval prod_cons, 75677b6859fbSMintz, Yuval update_flag ? "update" : "nop", 7568da090917STomer Tayar en_dis_int_for_sb ? 7569da090917STomer Tayar (en_dis_int_for_sb == 1 ? "disable" : "nop") : 7570da090917STomer Tayar "enable", 75717b6859fbSMintz, Yuval segment ? "attn" : "regular", 75727b6859fbSMintz, Yuval timer_mask); 75737b6859fbSMintz, Yuval } 75747b6859fbSMintz, Yuval } 75757b6859fbSMintz, Yuval out: 75767b6859fbSMintz, Yuval /* Add parsed element to parsed buffer */ 75777b6859fbSMintz, Yuval *results_offset += sprintf(qed_get_buf_ptr(results_buf, 75787b6859fbSMintz, Yuval *results_offset), 75797b6859fbSMintz, Yuval "raw: 0x%01x%08x%08x, %s: %d, source : %s, type : %s, cmd_addr : 0x%x(%s%s), %serror: %s\n", 75807b6859fbSMintz, Yuval element->dword2, element->dword1, 75817b6859fbSMintz, Yuval element->dword0, 75827b6859fbSMintz, Yuval is_pf ? "pf" : "vf", 75837b6859fbSMintz, Yuval GET_FIELD(element->dword0, 75847b6859fbSMintz, Yuval IGU_FIFO_ELEMENT_DWORD0_FID), 75857b6859fbSMintz, Yuval s_igu_fifo_source_strs[source], 75867b6859fbSMintz, Yuval is_wr_cmd ? "wr" : "rd", 75877b6859fbSMintz, Yuval cmd_addr, 75887b6859fbSMintz, Yuval (!is_pf && found_addr->vf_desc) 75897b6859fbSMintz, Yuval ? found_addr->vf_desc 75907b6859fbSMintz, Yuval : found_addr->desc, 75917b6859fbSMintz, Yuval parsed_addr_data, 75927b6859fbSMintz, Yuval parsed_wr_data, 75937b6859fbSMintz, Yuval s_igu_fifo_error_strs[err_type]); 75947b6859fbSMintz, Yuval 75957b6859fbSMintz, Yuval return DBG_STATUS_OK; 7596c965db44STomer Tayar } 7597c965db44STomer Tayar 7598c965db44STomer Tayar /* Parses an IGU FIFO dump buffer. 7599c965db44STomer Tayar * If result_buf is not NULL, the IGU FIFO results are printed to it. 7600c965db44STomer Tayar * In any case, the required results buffer size is assigned to 7601c965db44STomer Tayar * parsed_results_bytes. 7602c965db44STomer Tayar * The parsing status is returned. 7603c965db44STomer Tayar */ 7604da090917STomer Tayar static enum dbg_status qed_parse_igu_fifo_dump(u32 *dump_buf, 7605c965db44STomer Tayar char *results_buf, 7606c965db44STomer Tayar u32 *parsed_results_bytes) 7607c965db44STomer Tayar { 7608c965db44STomer Tayar const char *section_name, *param_name, *param_str_val; 76097b6859fbSMintz, Yuval u32 param_num_val, num_section_params, num_elements; 7610c965db44STomer Tayar struct igu_fifo_element *elements; 76117b6859fbSMintz, Yuval enum dbg_status status; 76127b6859fbSMintz, Yuval u32 results_offset = 0; 76137b6859fbSMintz, Yuval u8 i; 7614c965db44STomer Tayar 7615c965db44STomer Tayar /* Read global_params section */ 7616c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 7617c965db44STomer Tayar §ion_name, &num_section_params); 7618c965db44STomer Tayar if (strcmp(section_name, "global_params")) 7619c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 7620c965db44STomer Tayar 7621c965db44STomer Tayar /* Print global params */ 7622c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 7623c965db44STomer Tayar num_section_params, 7624c965db44STomer Tayar results_buf, &results_offset); 7625c965db44STomer Tayar 7626c965db44STomer Tayar /* Read igu_fifo_data section */ 7627c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 7628c965db44STomer Tayar §ion_name, &num_section_params); 7629c965db44STomer Tayar if (strcmp(section_name, "igu_fifo_data")) 7630c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 7631c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 7632c965db44STomer Tayar ¶m_name, ¶m_str_val, ¶m_num_val); 7633c965db44STomer Tayar if (strcmp(param_name, "size")) 7634c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 7635c965db44STomer Tayar if (param_num_val % IGU_FIFO_ELEMENT_DWORDS) 7636c965db44STomer Tayar return DBG_STATUS_IGU_FIFO_BAD_DATA; 7637c965db44STomer Tayar num_elements = param_num_val / IGU_FIFO_ELEMENT_DWORDS; 7638c965db44STomer Tayar elements = (struct igu_fifo_element *)dump_buf; 7639c965db44STomer Tayar 7640c965db44STomer Tayar /* Decode elements */ 7641c965db44STomer Tayar for (i = 0; i < num_elements; i++) { 76427b6859fbSMintz, Yuval status = qed_parse_igu_fifo_element(&elements[i], 76437b6859fbSMintz, Yuval results_buf, 7644da090917STomer Tayar &results_offset); 76457b6859fbSMintz, Yuval if (status != DBG_STATUS_OK) 76467b6859fbSMintz, Yuval return status; 7647c965db44STomer Tayar } 7648c965db44STomer Tayar 7649c965db44STomer Tayar results_offset += sprintf(qed_get_buf_ptr(results_buf, 7650c965db44STomer Tayar results_offset), 7651c965db44STomer Tayar "fifo contained %d elements", num_elements); 7652c965db44STomer Tayar 7653c965db44STomer Tayar /* Add 1 for string NULL termination */ 7654c965db44STomer Tayar *parsed_results_bytes = results_offset + 1; 76557b6859fbSMintz, Yuval 7656c965db44STomer Tayar return DBG_STATUS_OK; 7657c965db44STomer Tayar } 7658c965db44STomer Tayar 7659c965db44STomer Tayar static enum dbg_status 7660da090917STomer Tayar qed_parse_protection_override_dump(u32 *dump_buf, 7661c965db44STomer Tayar char *results_buf, 7662c965db44STomer Tayar u32 *parsed_results_bytes) 7663c965db44STomer Tayar { 7664c965db44STomer Tayar const char *section_name, *param_name, *param_str_val; 76657b6859fbSMintz, Yuval u32 param_num_val, num_section_params, num_elements; 7666c965db44STomer Tayar struct protection_override_element *elements; 76677b6859fbSMintz, Yuval u32 results_offset = 0; 7668c965db44STomer Tayar u8 i; 7669c965db44STomer Tayar 7670c965db44STomer Tayar /* Read global_params section */ 7671c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 7672c965db44STomer Tayar §ion_name, &num_section_params); 7673c965db44STomer Tayar if (strcmp(section_name, "global_params")) 7674c965db44STomer Tayar return DBG_STATUS_PROTECTION_OVERRIDE_BAD_DATA; 7675c965db44STomer Tayar 7676c965db44STomer Tayar /* Print global params */ 7677c965db44STomer Tayar dump_buf += qed_print_section_params(dump_buf, 7678c965db44STomer Tayar num_section_params, 7679c965db44STomer Tayar results_buf, &results_offset); 7680c965db44STomer Tayar 7681c965db44STomer Tayar /* Read protection_override_data section */ 7682c965db44STomer Tayar dump_buf += qed_read_section_hdr(dump_buf, 7683c965db44STomer Tayar §ion_name, &num_section_params); 7684c965db44STomer Tayar if (strcmp(section_name, "protection_override_data")) 7685c965db44STomer Tayar return DBG_STATUS_PROTECTION_OVERRIDE_BAD_DATA; 7686c965db44STomer Tayar dump_buf += qed_read_param(dump_buf, 7687c965db44STomer Tayar ¶m_name, ¶m_str_val, ¶m_num_val); 7688c965db44STomer Tayar if (strcmp(param_name, "size")) 7689c965db44STomer Tayar return DBG_STATUS_PROTECTION_OVERRIDE_BAD_DATA; 76907b6859fbSMintz, Yuval if (param_num_val % PROTECTION_OVERRIDE_ELEMENT_DWORDS) 7691c965db44STomer Tayar return DBG_STATUS_PROTECTION_OVERRIDE_BAD_DATA; 7692c965db44STomer Tayar num_elements = param_num_val / PROTECTION_OVERRIDE_ELEMENT_DWORDS; 7693c965db44STomer Tayar elements = (struct protection_override_element *)dump_buf; 7694c965db44STomer Tayar 7695c965db44STomer Tayar /* Decode elements */ 7696c965db44STomer Tayar for (i = 0; i < num_elements; i++) { 7697c965db44STomer Tayar u32 address = GET_FIELD(elements[i].data, 7698c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_ADDRESS) * 7699c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_ADDR_FACTOR; 7700c965db44STomer Tayar 7701c965db44STomer Tayar results_offset += 7702c965db44STomer Tayar sprintf(qed_get_buf_ptr(results_buf, 7703c965db44STomer Tayar results_offset), 7704be086e7cSMintz, Yuval "window %2d, address: 0x%07x, size: %7d regs, read: %d, write: %d, read protection: %-12s, write protection: %-12s\n", 7705c965db44STomer Tayar i, address, 7706be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 7707c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_WINDOW_SIZE), 7708be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 7709c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_READ), 7710be086e7cSMintz, Yuval (u32)GET_FIELD(elements[i].data, 7711c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_WRITE), 7712c965db44STomer Tayar s_protection_strs[GET_FIELD(elements[i].data, 7713c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_READ_PROTECTION)], 7714c965db44STomer Tayar s_protection_strs[GET_FIELD(elements[i].data, 7715c965db44STomer Tayar PROTECTION_OVERRIDE_ELEMENT_WRITE_PROTECTION)]); 7716c965db44STomer Tayar } 7717c965db44STomer Tayar 7718c965db44STomer Tayar results_offset += sprintf(qed_get_buf_ptr(results_buf, 7719c965db44STomer Tayar results_offset), 7720c965db44STomer Tayar "protection override contained %d elements", 7721c965db44STomer Tayar num_elements); 7722c965db44STomer Tayar 7723c965db44STomer Tayar /* Add 1 for string NULL termination */ 7724c965db44STomer Tayar *parsed_results_bytes = results_offset + 1; 77257b6859fbSMintz, Yuval 7726c965db44STomer Tayar return DBG_STATUS_OK; 7727c965db44STomer Tayar } 7728c965db44STomer Tayar 77297b6859fbSMintz, Yuval /* Parses a FW Asserts dump buffer. 77307b6859fbSMintz, Yuval * If result_buf is not NULL, the FW Asserts results are printed to it. 77317b6859fbSMintz, Yuval * In any case, the required results buffer size is assigned to 77327b6859fbSMintz, Yuval * parsed_results_bytes. 77337b6859fbSMintz, Yuval * The parsing status is returned. 77347b6859fbSMintz, Yuval */ 7735da090917STomer Tayar static enum dbg_status qed_parse_fw_asserts_dump(u32 *dump_buf, 77367b6859fbSMintz, Yuval char *results_buf, 77377b6859fbSMintz, Yuval u32 *parsed_results_bytes) 77387b6859fbSMintz, Yuval { 77397b6859fbSMintz, Yuval u32 num_section_params, param_num_val, i, results_offset = 0; 77407b6859fbSMintz, Yuval const char *param_name, *param_str_val, *section_name; 77417b6859fbSMintz, Yuval bool last_section_found = false; 77427b6859fbSMintz, Yuval 77437b6859fbSMintz, Yuval *parsed_results_bytes = 0; 77447b6859fbSMintz, Yuval 77457b6859fbSMintz, Yuval /* Read global_params section */ 77467b6859fbSMintz, Yuval dump_buf += qed_read_section_hdr(dump_buf, 77477b6859fbSMintz, Yuval §ion_name, &num_section_params); 77487b6859fbSMintz, Yuval if (strcmp(section_name, "global_params")) 77497b6859fbSMintz, Yuval return DBG_STATUS_FW_ASSERTS_PARSE_FAILED; 77507b6859fbSMintz, Yuval 77517b6859fbSMintz, Yuval /* Print global params */ 77527b6859fbSMintz, Yuval dump_buf += qed_print_section_params(dump_buf, 77537b6859fbSMintz, Yuval num_section_params, 77547b6859fbSMintz, Yuval results_buf, &results_offset); 77557b6859fbSMintz, Yuval 77567b6859fbSMintz, Yuval while (!last_section_found) { 77577b6859fbSMintz, Yuval dump_buf += qed_read_section_hdr(dump_buf, 77587b6859fbSMintz, Yuval §ion_name, 77597b6859fbSMintz, Yuval &num_section_params); 77607b6859fbSMintz, Yuval if (!strcmp(section_name, "fw_asserts")) { 77617b6859fbSMintz, Yuval /* Extract params */ 77627b6859fbSMintz, Yuval const char *storm_letter = NULL; 77637b6859fbSMintz, Yuval u32 storm_dump_size = 0; 77647b6859fbSMintz, Yuval 77657b6859fbSMintz, Yuval for (i = 0; i < num_section_params; i++) { 77667b6859fbSMintz, Yuval dump_buf += qed_read_param(dump_buf, 77677b6859fbSMintz, Yuval ¶m_name, 77687b6859fbSMintz, Yuval ¶m_str_val, 77697b6859fbSMintz, Yuval ¶m_num_val); 77707b6859fbSMintz, Yuval if (!strcmp(param_name, "storm")) 77717b6859fbSMintz, Yuval storm_letter = param_str_val; 77727b6859fbSMintz, Yuval else if (!strcmp(param_name, "size")) 77737b6859fbSMintz, Yuval storm_dump_size = param_num_val; 77747b6859fbSMintz, Yuval else 77757b6859fbSMintz, Yuval return 77767b6859fbSMintz, Yuval DBG_STATUS_FW_ASSERTS_PARSE_FAILED; 77777b6859fbSMintz, Yuval } 77787b6859fbSMintz, Yuval 77797b6859fbSMintz, Yuval if (!storm_letter || !storm_dump_size) 77807b6859fbSMintz, Yuval return DBG_STATUS_FW_ASSERTS_PARSE_FAILED; 77817b6859fbSMintz, Yuval 77827b6859fbSMintz, Yuval /* Print data */ 77837b6859fbSMintz, Yuval results_offset += 77847b6859fbSMintz, Yuval sprintf(qed_get_buf_ptr(results_buf, 77857b6859fbSMintz, Yuval results_offset), 77867b6859fbSMintz, Yuval "\n%sSTORM_ASSERT: size=%d\n", 77877b6859fbSMintz, Yuval storm_letter, storm_dump_size); 77887b6859fbSMintz, Yuval for (i = 0; i < storm_dump_size; i++, dump_buf++) 77897b6859fbSMintz, Yuval results_offset += 77907b6859fbSMintz, Yuval sprintf(qed_get_buf_ptr(results_buf, 77917b6859fbSMintz, Yuval results_offset), 77927b6859fbSMintz, Yuval "%08x\n", *dump_buf); 77937b6859fbSMintz, Yuval } else if (!strcmp(section_name, "last")) { 77947b6859fbSMintz, Yuval last_section_found = true; 77957b6859fbSMintz, Yuval } else { 77967b6859fbSMintz, Yuval return DBG_STATUS_FW_ASSERTS_PARSE_FAILED; 77977b6859fbSMintz, Yuval } 77987b6859fbSMintz, Yuval } 77997b6859fbSMintz, Yuval 78007b6859fbSMintz, Yuval /* Add 1 for string NULL termination */ 78017b6859fbSMintz, Yuval *parsed_results_bytes = results_offset + 1; 78027b6859fbSMintz, Yuval 78037b6859fbSMintz, Yuval return DBG_STATUS_OK; 78047b6859fbSMintz, Yuval } 78057b6859fbSMintz, Yuval 78067b6859fbSMintz, Yuval /***************************** Public Functions *******************************/ 78077b6859fbSMintz, Yuval 78087b6859fbSMintz, Yuval enum dbg_status qed_dbg_user_set_bin_ptr(const u8 * const bin_ptr) 78097b6859fbSMintz, Yuval { 78107b6859fbSMintz, Yuval struct bin_buffer_hdr *buf_array = (struct bin_buffer_hdr *)bin_ptr; 78117b6859fbSMintz, Yuval u8 buf_id; 78127b6859fbSMintz, Yuval 78137b6859fbSMintz, Yuval /* Convert binary data to debug arrays */ 78147b6859fbSMintz, Yuval for (buf_id = 0; buf_id < MAX_BIN_DBG_BUFFER_TYPE; buf_id++) { 78157b6859fbSMintz, Yuval s_user_dbg_arrays[buf_id].ptr = 78167b6859fbSMintz, Yuval (u32 *)(bin_ptr + buf_array[buf_id].offset); 78177b6859fbSMintz, Yuval s_user_dbg_arrays[buf_id].size_in_dwords = 78187b6859fbSMintz, Yuval BYTES_TO_DWORDS(buf_array[buf_id].length); 78197b6859fbSMintz, Yuval } 78207b6859fbSMintz, Yuval 78217b6859fbSMintz, Yuval return DBG_STATUS_OK; 78227b6859fbSMintz, Yuval } 78237b6859fbSMintz, Yuval 7824a3f72307SDenis Bolotin enum dbg_status qed_dbg_alloc_user_data(struct qed_hwfn *p_hwfn) 7825a3f72307SDenis Bolotin { 7826a3f72307SDenis Bolotin p_hwfn->dbg_user_info = kzalloc(sizeof(struct dbg_tools_user_data), 7827a3f72307SDenis Bolotin GFP_KERNEL); 7828a3f72307SDenis Bolotin if (!p_hwfn->dbg_user_info) 7829a3f72307SDenis Bolotin return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 7830a3f72307SDenis Bolotin 7831a3f72307SDenis Bolotin return DBG_STATUS_OK; 7832a3f72307SDenis Bolotin } 7833a3f72307SDenis Bolotin 78347b6859fbSMintz, Yuval const char *qed_dbg_get_status_str(enum dbg_status status) 78357b6859fbSMintz, Yuval { 78367b6859fbSMintz, Yuval return (status < 78377b6859fbSMintz, Yuval MAX_DBG_STATUS) ? s_status_str[status] : "Invalid debug status"; 78387b6859fbSMintz, Yuval } 78397b6859fbSMintz, Yuval 78407b6859fbSMintz, Yuval enum dbg_status qed_get_idle_chk_results_buf_size(struct qed_hwfn *p_hwfn, 78417b6859fbSMintz, Yuval u32 *dump_buf, 78427b6859fbSMintz, Yuval u32 num_dumped_dwords, 78437b6859fbSMintz, Yuval u32 *results_buf_size) 78447b6859fbSMintz, Yuval { 78457b6859fbSMintz, Yuval u32 num_errors, num_warnings; 78467b6859fbSMintz, Yuval 7847da090917STomer Tayar return qed_parse_idle_chk_dump(dump_buf, 78487b6859fbSMintz, Yuval num_dumped_dwords, 78497b6859fbSMintz, Yuval NULL, 78507b6859fbSMintz, Yuval results_buf_size, 78517b6859fbSMintz, Yuval &num_errors, &num_warnings); 78527b6859fbSMintz, Yuval } 78537b6859fbSMintz, Yuval 78547b6859fbSMintz, Yuval enum dbg_status qed_print_idle_chk_results(struct qed_hwfn *p_hwfn, 78557b6859fbSMintz, Yuval u32 *dump_buf, 78567b6859fbSMintz, Yuval u32 num_dumped_dwords, 78577b6859fbSMintz, Yuval char *results_buf, 7858da090917STomer Tayar u32 *num_errors, 7859da090917STomer Tayar u32 *num_warnings) 78607b6859fbSMintz, Yuval { 78617b6859fbSMintz, Yuval u32 parsed_buf_size; 78627b6859fbSMintz, Yuval 7863da090917STomer Tayar return qed_parse_idle_chk_dump(dump_buf, 78647b6859fbSMintz, Yuval num_dumped_dwords, 78657b6859fbSMintz, Yuval results_buf, 78667b6859fbSMintz, Yuval &parsed_buf_size, 78677b6859fbSMintz, Yuval num_errors, num_warnings); 78687b6859fbSMintz, Yuval } 78697b6859fbSMintz, Yuval 7870a3f72307SDenis Bolotin void qed_dbg_mcp_trace_set_meta_data(struct qed_hwfn *p_hwfn, 7871a3f72307SDenis Bolotin const u32 *meta_buf) 78727b6859fbSMintz, Yuval { 7873a3f72307SDenis Bolotin struct dbg_tools_user_data *dev_user_data = 7874a3f72307SDenis Bolotin qed_dbg_get_user_data(p_hwfn); 7875a3f72307SDenis Bolotin 7876a3f72307SDenis Bolotin dev_user_data->mcp_trace_user_meta_buf = meta_buf; 78777b6859fbSMintz, Yuval } 78787b6859fbSMintz, Yuval 78797b6859fbSMintz, Yuval enum dbg_status qed_get_mcp_trace_results_buf_size(struct qed_hwfn *p_hwfn, 78807b6859fbSMintz, Yuval u32 *dump_buf, 78817b6859fbSMintz, Yuval u32 num_dumped_dwords, 78827b6859fbSMintz, Yuval u32 *results_buf_size) 78837b6859fbSMintz, Yuval { 78847b6859fbSMintz, Yuval return qed_parse_mcp_trace_dump(p_hwfn, 7885a3f72307SDenis Bolotin dump_buf, NULL, results_buf_size, true); 78867b6859fbSMintz, Yuval } 78877b6859fbSMintz, Yuval 78887b6859fbSMintz, Yuval enum dbg_status qed_print_mcp_trace_results(struct qed_hwfn *p_hwfn, 78897b6859fbSMintz, Yuval u32 *dump_buf, 78907b6859fbSMintz, Yuval u32 num_dumped_dwords, 78917b6859fbSMintz, Yuval char *results_buf) 78927b6859fbSMintz, Yuval { 78937b6859fbSMintz, Yuval u32 parsed_buf_size; 78947b6859fbSMintz, Yuval 78957b6859fbSMintz, Yuval return qed_parse_mcp_trace_dump(p_hwfn, 78967b6859fbSMintz, Yuval dump_buf, 7897a3f72307SDenis Bolotin results_buf, &parsed_buf_size, true); 78987b6859fbSMintz, Yuval } 78997b6859fbSMintz, Yuval 7900a3f72307SDenis Bolotin enum dbg_status qed_print_mcp_trace_results_cont(struct qed_hwfn *p_hwfn, 7901a3f72307SDenis Bolotin u32 *dump_buf, 7902a3f72307SDenis Bolotin char *results_buf) 7903a3f72307SDenis Bolotin { 7904a3f72307SDenis Bolotin u32 parsed_buf_size; 7905a3f72307SDenis Bolotin 7906a3f72307SDenis Bolotin return qed_parse_mcp_trace_dump(p_hwfn, dump_buf, results_buf, 7907a3f72307SDenis Bolotin &parsed_buf_size, false); 7908a3f72307SDenis Bolotin } 7909a3f72307SDenis Bolotin 7910a3f72307SDenis Bolotin enum dbg_status qed_print_mcp_trace_line(struct qed_hwfn *p_hwfn, 7911a3f72307SDenis Bolotin u8 *dump_buf, 791250bc60cbSMichal Kalderon u32 num_dumped_bytes, 791350bc60cbSMichal Kalderon char *results_buf) 791450bc60cbSMichal Kalderon { 7915a3f72307SDenis Bolotin u32 parsed_results_bytes; 791650bc60cbSMichal Kalderon 7917a3f72307SDenis Bolotin return qed_parse_mcp_trace_buf(p_hwfn, 7918a3f72307SDenis Bolotin dump_buf, 791950bc60cbSMichal Kalderon num_dumped_bytes, 792050bc60cbSMichal Kalderon 0, 792150bc60cbSMichal Kalderon num_dumped_bytes, 7922a3f72307SDenis Bolotin results_buf, &parsed_results_bytes); 7923a3f72307SDenis Bolotin } 7924a3f72307SDenis Bolotin 7925a3f72307SDenis Bolotin /* Frees the specified MCP Trace meta data */ 7926a3f72307SDenis Bolotin void qed_mcp_trace_free_meta_data(struct qed_hwfn *p_hwfn) 7927a3f72307SDenis Bolotin { 7928a3f72307SDenis Bolotin struct dbg_tools_user_data *dev_user_data; 7929a3f72307SDenis Bolotin struct mcp_trace_meta *meta; 7930a3f72307SDenis Bolotin u32 i; 7931a3f72307SDenis Bolotin 7932a3f72307SDenis Bolotin dev_user_data = qed_dbg_get_user_data(p_hwfn); 7933a3f72307SDenis Bolotin meta = &dev_user_data->mcp_trace_meta; 7934a3f72307SDenis Bolotin if (!meta->is_allocated) 7935a3f72307SDenis Bolotin return; 7936a3f72307SDenis Bolotin 7937a3f72307SDenis Bolotin /* Release modules */ 7938a3f72307SDenis Bolotin if (meta->modules) { 7939a3f72307SDenis Bolotin for (i = 0; i < meta->modules_num; i++) 7940a3f72307SDenis Bolotin kfree(meta->modules[i]); 7941a3f72307SDenis Bolotin kfree(meta->modules); 7942a3f72307SDenis Bolotin } 7943a3f72307SDenis Bolotin 7944a3f72307SDenis Bolotin /* Release formats */ 7945a3f72307SDenis Bolotin if (meta->formats) { 7946a3f72307SDenis Bolotin for (i = 0; i < meta->formats_num; i++) 7947a3f72307SDenis Bolotin kfree(meta->formats[i].format_str); 7948a3f72307SDenis Bolotin kfree(meta->formats); 7949a3f72307SDenis Bolotin } 7950a3f72307SDenis Bolotin 7951a3f72307SDenis Bolotin meta->is_allocated = false; 795250bc60cbSMichal Kalderon } 795350bc60cbSMichal Kalderon 79547b6859fbSMintz, Yuval enum dbg_status qed_get_reg_fifo_results_buf_size(struct qed_hwfn *p_hwfn, 79557b6859fbSMintz, Yuval u32 *dump_buf, 79567b6859fbSMintz, Yuval u32 num_dumped_dwords, 79577b6859fbSMintz, Yuval u32 *results_buf_size) 79587b6859fbSMintz, Yuval { 7959da090917STomer Tayar return qed_parse_reg_fifo_dump(dump_buf, NULL, results_buf_size); 79607b6859fbSMintz, Yuval } 79617b6859fbSMintz, Yuval 79627b6859fbSMintz, Yuval enum dbg_status qed_print_reg_fifo_results(struct qed_hwfn *p_hwfn, 79637b6859fbSMintz, Yuval u32 *dump_buf, 79647b6859fbSMintz, Yuval u32 num_dumped_dwords, 79657b6859fbSMintz, Yuval char *results_buf) 79667b6859fbSMintz, Yuval { 79677b6859fbSMintz, Yuval u32 parsed_buf_size; 79687b6859fbSMintz, Yuval 7969da090917STomer Tayar return qed_parse_reg_fifo_dump(dump_buf, results_buf, &parsed_buf_size); 79707b6859fbSMintz, Yuval } 79717b6859fbSMintz, Yuval 79727b6859fbSMintz, Yuval enum dbg_status qed_get_igu_fifo_results_buf_size(struct qed_hwfn *p_hwfn, 79737b6859fbSMintz, Yuval u32 *dump_buf, 79747b6859fbSMintz, Yuval u32 num_dumped_dwords, 79757b6859fbSMintz, Yuval u32 *results_buf_size) 79767b6859fbSMintz, Yuval { 7977da090917STomer Tayar return qed_parse_igu_fifo_dump(dump_buf, NULL, results_buf_size); 79787b6859fbSMintz, Yuval } 79797b6859fbSMintz, Yuval 79807b6859fbSMintz, Yuval enum dbg_status qed_print_igu_fifo_results(struct qed_hwfn *p_hwfn, 79817b6859fbSMintz, Yuval u32 *dump_buf, 79827b6859fbSMintz, Yuval u32 num_dumped_dwords, 79837b6859fbSMintz, Yuval char *results_buf) 79847b6859fbSMintz, Yuval { 79857b6859fbSMintz, Yuval u32 parsed_buf_size; 79867b6859fbSMintz, Yuval 7987da090917STomer Tayar return qed_parse_igu_fifo_dump(dump_buf, results_buf, &parsed_buf_size); 79887b6859fbSMintz, Yuval } 79897b6859fbSMintz, Yuval 7990c965db44STomer Tayar enum dbg_status 7991c965db44STomer Tayar qed_get_protection_override_results_buf_size(struct qed_hwfn *p_hwfn, 7992c965db44STomer Tayar u32 *dump_buf, 7993c965db44STomer Tayar u32 num_dumped_dwords, 7994c965db44STomer Tayar u32 *results_buf_size) 7995c965db44STomer Tayar { 7996da090917STomer Tayar return qed_parse_protection_override_dump(dump_buf, 7997c965db44STomer Tayar NULL, results_buf_size); 7998c965db44STomer Tayar } 7999c965db44STomer Tayar 8000c965db44STomer Tayar enum dbg_status qed_print_protection_override_results(struct qed_hwfn *p_hwfn, 8001c965db44STomer Tayar u32 *dump_buf, 8002c965db44STomer Tayar u32 num_dumped_dwords, 8003c965db44STomer Tayar char *results_buf) 8004c965db44STomer Tayar { 8005c965db44STomer Tayar u32 parsed_buf_size; 8006c965db44STomer Tayar 8007da090917STomer Tayar return qed_parse_protection_override_dump(dump_buf, 8008c965db44STomer Tayar results_buf, 8009c965db44STomer Tayar &parsed_buf_size); 8010c965db44STomer Tayar } 8011c965db44STomer Tayar 8012c965db44STomer Tayar enum dbg_status qed_get_fw_asserts_results_buf_size(struct qed_hwfn *p_hwfn, 8013c965db44STomer Tayar u32 *dump_buf, 8014c965db44STomer Tayar u32 num_dumped_dwords, 8015c965db44STomer Tayar u32 *results_buf_size) 8016c965db44STomer Tayar { 8017da090917STomer Tayar return qed_parse_fw_asserts_dump(dump_buf, NULL, results_buf_size); 8018c965db44STomer Tayar } 8019c965db44STomer Tayar 8020c965db44STomer Tayar enum dbg_status qed_print_fw_asserts_results(struct qed_hwfn *p_hwfn, 8021c965db44STomer Tayar u32 *dump_buf, 8022c965db44STomer Tayar u32 num_dumped_dwords, 8023c965db44STomer Tayar char *results_buf) 8024c965db44STomer Tayar { 8025c965db44STomer Tayar u32 parsed_buf_size; 8026c965db44STomer Tayar 8027da090917STomer Tayar return qed_parse_fw_asserts_dump(dump_buf, 8028c965db44STomer Tayar results_buf, &parsed_buf_size); 8029c965db44STomer Tayar } 8030c965db44STomer Tayar 80310ebbd1c8SMintz, Yuval enum dbg_status qed_dbg_parse_attn(struct qed_hwfn *p_hwfn, 80320ebbd1c8SMintz, Yuval struct dbg_attn_block_result *results) 80330ebbd1c8SMintz, Yuval { 80340ebbd1c8SMintz, Yuval struct user_dbg_array *block_attn, *pstrings; 80350ebbd1c8SMintz, Yuval const u32 *block_attn_name_offsets; 80360ebbd1c8SMintz, Yuval enum dbg_attn_type attn_type; 80370ebbd1c8SMintz, Yuval const char *block_name; 80380ebbd1c8SMintz, Yuval u8 num_regs, i, j; 80390ebbd1c8SMintz, Yuval 80400ebbd1c8SMintz, Yuval num_regs = GET_FIELD(results->data, DBG_ATTN_BLOCK_RESULT_NUM_REGS); 80410ebbd1c8SMintz, Yuval attn_type = (enum dbg_attn_type) 80420ebbd1c8SMintz, Yuval GET_FIELD(results->data, 80430ebbd1c8SMintz, Yuval DBG_ATTN_BLOCK_RESULT_ATTN_TYPE); 80440ebbd1c8SMintz, Yuval block_name = s_block_info_arr[results->block_id].name; 80450ebbd1c8SMintz, Yuval 80460ebbd1c8SMintz, Yuval if (!s_user_dbg_arrays[BIN_BUF_DBG_ATTN_INDEXES].ptr || 80470ebbd1c8SMintz, Yuval !s_user_dbg_arrays[BIN_BUF_DBG_ATTN_NAME_OFFSETS].ptr || 80480ebbd1c8SMintz, Yuval !s_user_dbg_arrays[BIN_BUF_DBG_PARSING_STRINGS].ptr) 80490ebbd1c8SMintz, Yuval return DBG_STATUS_DBG_ARRAY_NOT_SET; 80500ebbd1c8SMintz, Yuval 80510ebbd1c8SMintz, Yuval block_attn = &s_user_dbg_arrays[BIN_BUF_DBG_ATTN_NAME_OFFSETS]; 80520ebbd1c8SMintz, Yuval block_attn_name_offsets = &block_attn->ptr[results->names_offset]; 80530ebbd1c8SMintz, Yuval 80540ebbd1c8SMintz, Yuval /* Go over registers with a non-zero attention status */ 80550ebbd1c8SMintz, Yuval for (i = 0; i < num_regs; i++) { 8056da090917STomer Tayar struct dbg_attn_bit_mapping *bit_mapping; 80570ebbd1c8SMintz, Yuval struct dbg_attn_reg_result *reg_result; 80580ebbd1c8SMintz, Yuval u8 num_reg_attn, bit_idx = 0; 80590ebbd1c8SMintz, Yuval 80600ebbd1c8SMintz, Yuval reg_result = &results->reg_results[i]; 80610ebbd1c8SMintz, Yuval num_reg_attn = GET_FIELD(reg_result->data, 80620ebbd1c8SMintz, Yuval DBG_ATTN_REG_RESULT_NUM_REG_ATTN); 80630ebbd1c8SMintz, Yuval block_attn = &s_user_dbg_arrays[BIN_BUF_DBG_ATTN_INDEXES]; 8064da090917STomer Tayar bit_mapping = &((struct dbg_attn_bit_mapping *) 80650ebbd1c8SMintz, Yuval block_attn->ptr)[reg_result->block_attn_offset]; 80660ebbd1c8SMintz, Yuval 80670ebbd1c8SMintz, Yuval pstrings = &s_user_dbg_arrays[BIN_BUF_DBG_PARSING_STRINGS]; 80680ebbd1c8SMintz, Yuval 80690ebbd1c8SMintz, Yuval /* Go over attention status bits */ 80700ebbd1c8SMintz, Yuval for (j = 0; j < num_reg_attn; j++) { 8071da090917STomer Tayar u16 attn_idx_val = GET_FIELD(bit_mapping[j].data, 80720ebbd1c8SMintz, Yuval DBG_ATTN_BIT_MAPPING_VAL); 80730ebbd1c8SMintz, Yuval const char *attn_name, *attn_type_str, *masked_str; 8074da090917STomer Tayar u32 attn_name_offset, sts_addr; 80750ebbd1c8SMintz, Yuval 80760ebbd1c8SMintz, Yuval /* Check if bit mask should be advanced (due to unused 80770ebbd1c8SMintz, Yuval * bits). 80780ebbd1c8SMintz, Yuval */ 8079da090917STomer Tayar if (GET_FIELD(bit_mapping[j].data, 80800ebbd1c8SMintz, Yuval DBG_ATTN_BIT_MAPPING_IS_UNUSED_BIT_CNT)) { 80810ebbd1c8SMintz, Yuval bit_idx += (u8)attn_idx_val; 80820ebbd1c8SMintz, Yuval continue; 80830ebbd1c8SMintz, Yuval } 80840ebbd1c8SMintz, Yuval 80850ebbd1c8SMintz, Yuval /* Check current bit index */ 80860ebbd1c8SMintz, Yuval if (!(reg_result->sts_val & BIT(bit_idx))) { 80870ebbd1c8SMintz, Yuval bit_idx++; 80880ebbd1c8SMintz, Yuval continue; 80890ebbd1c8SMintz, Yuval } 80900ebbd1c8SMintz, Yuval 80910ebbd1c8SMintz, Yuval /* Find attention name */ 8092da090917STomer Tayar attn_name_offset = 8093da090917STomer Tayar block_attn_name_offsets[attn_idx_val]; 80940ebbd1c8SMintz, Yuval attn_name = &((const char *) 8095da090917STomer Tayar pstrings->ptr)[attn_name_offset]; 80960ebbd1c8SMintz, Yuval attn_type_str = attn_type == ATTN_TYPE_INTERRUPT ? 80970ebbd1c8SMintz, Yuval "Interrupt" : "Parity"; 80980ebbd1c8SMintz, Yuval masked_str = reg_result->mask_val & BIT(bit_idx) ? 80990ebbd1c8SMintz, Yuval " [masked]" : ""; 81000ebbd1c8SMintz, Yuval sts_addr = GET_FIELD(reg_result->data, 81010ebbd1c8SMintz, Yuval DBG_ATTN_REG_RESULT_STS_ADDRESS); 81020ebbd1c8SMintz, Yuval DP_NOTICE(p_hwfn, 81030ebbd1c8SMintz, Yuval "%s (%s) : %s [address 0x%08x, bit %d]%s\n", 81040ebbd1c8SMintz, Yuval block_name, attn_type_str, attn_name, 81050ebbd1c8SMintz, Yuval sts_addr, bit_idx, masked_str); 81060ebbd1c8SMintz, Yuval 81070ebbd1c8SMintz, Yuval bit_idx++; 81080ebbd1c8SMintz, Yuval } 81090ebbd1c8SMintz, Yuval } 81100ebbd1c8SMintz, Yuval 81110ebbd1c8SMintz, Yuval return DBG_STATUS_OK; 81120ebbd1c8SMintz, Yuval } 81130ebbd1c8SMintz, Yuval 8114c965db44STomer Tayar /* Wrapper for unifying the idle_chk and mcp_trace api */ 81158c93beafSYuval Mintz static enum dbg_status 81168c93beafSYuval Mintz qed_print_idle_chk_results_wrapper(struct qed_hwfn *p_hwfn, 8117c965db44STomer Tayar u32 *dump_buf, 8118c965db44STomer Tayar u32 num_dumped_dwords, 8119c965db44STomer Tayar char *results_buf) 8120c965db44STomer Tayar { 8121c965db44STomer Tayar u32 num_errors, num_warnnings; 8122c965db44STomer Tayar 8123c965db44STomer Tayar return qed_print_idle_chk_results(p_hwfn, dump_buf, num_dumped_dwords, 8124c965db44STomer Tayar results_buf, &num_errors, 8125c965db44STomer Tayar &num_warnnings); 8126c965db44STomer Tayar } 8127c965db44STomer Tayar 8128c965db44STomer Tayar /* Feature meta data lookup table */ 8129c965db44STomer Tayar static struct { 8130c965db44STomer Tayar char *name; 8131c965db44STomer Tayar enum dbg_status (*get_size)(struct qed_hwfn *p_hwfn, 8132c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *size); 8133c965db44STomer Tayar enum dbg_status (*perform_dump)(struct qed_hwfn *p_hwfn, 8134c965db44STomer Tayar struct qed_ptt *p_ptt, u32 *dump_buf, 8135c965db44STomer Tayar u32 buf_size, u32 *dumped_dwords); 8136c965db44STomer Tayar enum dbg_status (*print_results)(struct qed_hwfn *p_hwfn, 8137c965db44STomer Tayar u32 *dump_buf, u32 num_dumped_dwords, 8138c965db44STomer Tayar char *results_buf); 8139c965db44STomer Tayar enum dbg_status (*results_buf_size)(struct qed_hwfn *p_hwfn, 8140c965db44STomer Tayar u32 *dump_buf, 8141c965db44STomer Tayar u32 num_dumped_dwords, 8142c965db44STomer Tayar u32 *results_buf_size); 8143c965db44STomer Tayar } qed_features_lookup[] = { 8144c965db44STomer Tayar { 8145c965db44STomer Tayar "grc", qed_dbg_grc_get_dump_buf_size, 8146c965db44STomer Tayar qed_dbg_grc_dump, NULL, NULL}, { 8147c965db44STomer Tayar "idle_chk", 8148c965db44STomer Tayar qed_dbg_idle_chk_get_dump_buf_size, 8149c965db44STomer Tayar qed_dbg_idle_chk_dump, 8150c965db44STomer Tayar qed_print_idle_chk_results_wrapper, 8151c965db44STomer Tayar qed_get_idle_chk_results_buf_size}, { 8152c965db44STomer Tayar "mcp_trace", 8153c965db44STomer Tayar qed_dbg_mcp_trace_get_dump_buf_size, 8154c965db44STomer Tayar qed_dbg_mcp_trace_dump, qed_print_mcp_trace_results, 8155c965db44STomer Tayar qed_get_mcp_trace_results_buf_size}, { 8156c965db44STomer Tayar "reg_fifo", 8157c965db44STomer Tayar qed_dbg_reg_fifo_get_dump_buf_size, 8158c965db44STomer Tayar qed_dbg_reg_fifo_dump, qed_print_reg_fifo_results, 8159c965db44STomer Tayar qed_get_reg_fifo_results_buf_size}, { 8160c965db44STomer Tayar "igu_fifo", 8161c965db44STomer Tayar qed_dbg_igu_fifo_get_dump_buf_size, 8162c965db44STomer Tayar qed_dbg_igu_fifo_dump, qed_print_igu_fifo_results, 8163c965db44STomer Tayar qed_get_igu_fifo_results_buf_size}, { 8164c965db44STomer Tayar "protection_override", 8165c965db44STomer Tayar qed_dbg_protection_override_get_dump_buf_size, 8166c965db44STomer Tayar qed_dbg_protection_override_dump, 8167c965db44STomer Tayar qed_print_protection_override_results, 8168c965db44STomer Tayar qed_get_protection_override_results_buf_size}, { 8169c965db44STomer Tayar "fw_asserts", 8170c965db44STomer Tayar qed_dbg_fw_asserts_get_dump_buf_size, 8171c965db44STomer Tayar qed_dbg_fw_asserts_dump, 8172c965db44STomer Tayar qed_print_fw_asserts_results, 81738a52bbabSMichal Kalderon qed_get_fw_asserts_results_buf_size}, { 81748a52bbabSMichal Kalderon "ilt", 81758a52bbabSMichal Kalderon qed_dbg_ilt_get_dump_buf_size, 81768a52bbabSMichal Kalderon qed_dbg_ilt_dump, NULL, NULL},}; 8177c965db44STomer Tayar 8178c965db44STomer Tayar static void qed_dbg_print_feature(u8 *p_text_buf, u32 text_size) 8179c965db44STomer Tayar { 8180c965db44STomer Tayar u32 i, precision = 80; 8181c965db44STomer Tayar 8182c965db44STomer Tayar if (!p_text_buf) 8183c965db44STomer Tayar return; 8184c965db44STomer Tayar 8185c965db44STomer Tayar pr_notice("\n%.*s", precision, p_text_buf); 8186c965db44STomer Tayar for (i = precision; i < text_size; i += precision) 8187c965db44STomer Tayar pr_cont("%.*s", precision, p_text_buf + i); 8188c965db44STomer Tayar pr_cont("\n"); 8189c965db44STomer Tayar } 8190c965db44STomer Tayar 8191c965db44STomer Tayar #define QED_RESULTS_BUF_MIN_SIZE 16 8192c965db44STomer Tayar /* Generic function for decoding debug feature info */ 81938c93beafSYuval Mintz static enum dbg_status format_feature(struct qed_hwfn *p_hwfn, 8194c965db44STomer Tayar enum qed_dbg_features feature_idx) 8195c965db44STomer Tayar { 8196c965db44STomer Tayar struct qed_dbg_feature *feature = 8197c965db44STomer Tayar &p_hwfn->cdev->dbg_params.features[feature_idx]; 8198c965db44STomer Tayar u32 text_size_bytes, null_char_pos, i; 8199c965db44STomer Tayar enum dbg_status rc; 8200c965db44STomer Tayar char *text_buf; 8201c965db44STomer Tayar 8202c965db44STomer Tayar /* Check if feature supports formatting capability */ 8203c965db44STomer Tayar if (!qed_features_lookup[feature_idx].results_buf_size) 8204c965db44STomer Tayar return DBG_STATUS_OK; 8205c965db44STomer Tayar 8206c965db44STomer Tayar /* Obtain size of formatted output */ 8207c965db44STomer Tayar rc = qed_features_lookup[feature_idx]. 8208c965db44STomer Tayar results_buf_size(p_hwfn, (u32 *)feature->dump_buf, 8209c965db44STomer Tayar feature->dumped_dwords, &text_size_bytes); 8210c965db44STomer Tayar if (rc != DBG_STATUS_OK) 8211c965db44STomer Tayar return rc; 8212c965db44STomer Tayar 8213c965db44STomer Tayar /* Make sure that the allocated size is a multiple of dword (4 bytes) */ 8214c965db44STomer Tayar null_char_pos = text_size_bytes - 1; 8215c965db44STomer Tayar text_size_bytes = (text_size_bytes + 3) & ~0x3; 8216c965db44STomer Tayar 8217c965db44STomer Tayar if (text_size_bytes < QED_RESULTS_BUF_MIN_SIZE) { 8218c965db44STomer Tayar DP_NOTICE(p_hwfn->cdev, 8219c965db44STomer Tayar "formatted size of feature was too small %d. Aborting\n", 8220c965db44STomer Tayar text_size_bytes); 8221c965db44STomer Tayar return DBG_STATUS_INVALID_ARGS; 8222c965db44STomer Tayar } 8223c965db44STomer Tayar 8224c965db44STomer Tayar /* Allocate temp text buf */ 8225c965db44STomer Tayar text_buf = vzalloc(text_size_bytes); 8226c965db44STomer Tayar if (!text_buf) 8227c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 8228c965db44STomer Tayar 8229c965db44STomer Tayar /* Decode feature opcodes to string on temp buf */ 8230c965db44STomer Tayar rc = qed_features_lookup[feature_idx]. 8231c965db44STomer Tayar print_results(p_hwfn, (u32 *)feature->dump_buf, 8232c965db44STomer Tayar feature->dumped_dwords, text_buf); 8233c965db44STomer Tayar if (rc != DBG_STATUS_OK) { 8234c965db44STomer Tayar vfree(text_buf); 8235c965db44STomer Tayar return rc; 8236c965db44STomer Tayar } 8237c965db44STomer Tayar 8238c965db44STomer Tayar /* Replace the original null character with a '\n' character. 8239c965db44STomer Tayar * The bytes that were added as a result of the dword alignment are also 8240c965db44STomer Tayar * padded with '\n' characters. 8241c965db44STomer Tayar */ 8242c965db44STomer Tayar for (i = null_char_pos; i < text_size_bytes; i++) 8243c965db44STomer Tayar text_buf[i] = '\n'; 8244c965db44STomer Tayar 8245c965db44STomer Tayar /* Dump printable feature to log */ 8246c965db44STomer Tayar if (p_hwfn->cdev->dbg_params.print_data) 8247c965db44STomer Tayar qed_dbg_print_feature(text_buf, text_size_bytes); 8248c965db44STomer Tayar 8249c965db44STomer Tayar /* Free the old dump_buf and point the dump_buf to the newly allocagted 8250c965db44STomer Tayar * and formatted text buffer. 8251c965db44STomer Tayar */ 8252c965db44STomer Tayar vfree(feature->dump_buf); 8253c965db44STomer Tayar feature->dump_buf = text_buf; 8254c965db44STomer Tayar feature->buf_size = text_size_bytes; 8255c965db44STomer Tayar feature->dumped_dwords = text_size_bytes / 4; 8256c965db44STomer Tayar return rc; 8257c965db44STomer Tayar } 8258c965db44STomer Tayar 82598a52bbabSMichal Kalderon #define MAX_DBG_FEATURE_SIZE_DWORDS 0x3FFFFFFF 82608a52bbabSMichal Kalderon 8261c965db44STomer Tayar /* Generic function for performing the dump of a debug feature. */ 82628c93beafSYuval Mintz static enum dbg_status qed_dbg_dump(struct qed_hwfn *p_hwfn, 82638c93beafSYuval Mintz struct qed_ptt *p_ptt, 8264c965db44STomer Tayar enum qed_dbg_features feature_idx) 8265c965db44STomer Tayar { 8266c965db44STomer Tayar struct qed_dbg_feature *feature = 8267c965db44STomer Tayar &p_hwfn->cdev->dbg_params.features[feature_idx]; 8268c965db44STomer Tayar u32 buf_size_dwords; 8269c965db44STomer Tayar enum dbg_status rc; 8270c965db44STomer Tayar 8271c965db44STomer Tayar DP_NOTICE(p_hwfn->cdev, "Collecting a debug feature [\"%s\"]\n", 8272c965db44STomer Tayar qed_features_lookup[feature_idx].name); 8273c965db44STomer Tayar 8274c965db44STomer Tayar /* Dump_buf was already allocated need to free (this can happen if dump 8275c965db44STomer Tayar * was called but file was never read). 8276c965db44STomer Tayar * We can't use the buffer as is since size may have changed. 8277c965db44STomer Tayar */ 8278c965db44STomer Tayar if (feature->dump_buf) { 8279c965db44STomer Tayar vfree(feature->dump_buf); 8280c965db44STomer Tayar feature->dump_buf = NULL; 8281c965db44STomer Tayar } 8282c965db44STomer Tayar 8283c965db44STomer Tayar /* Get buffer size from hsi, allocate accordingly, and perform the 8284c965db44STomer Tayar * dump. 8285c965db44STomer Tayar */ 8286c965db44STomer Tayar rc = qed_features_lookup[feature_idx].get_size(p_hwfn, p_ptt, 8287c965db44STomer Tayar &buf_size_dwords); 8288be086e7cSMintz, Yuval if (rc != DBG_STATUS_OK && rc != DBG_STATUS_NVRAM_GET_IMAGE_FAILED) 8289c965db44STomer Tayar return rc; 8290c965db44STomer Tayar feature->buf_size = buf_size_dwords * sizeof(u32); 8291c965db44STomer Tayar feature->dump_buf = vmalloc(feature->buf_size); 8292c965db44STomer Tayar if (!feature->dump_buf) 8293c965db44STomer Tayar return DBG_STATUS_VIRT_MEM_ALLOC_FAILED; 8294c965db44STomer Tayar 8295c965db44STomer Tayar rc = qed_features_lookup[feature_idx]. 8296c965db44STomer Tayar perform_dump(p_hwfn, p_ptt, (u32 *)feature->dump_buf, 8297c965db44STomer Tayar feature->buf_size / sizeof(u32), 8298c965db44STomer Tayar &feature->dumped_dwords); 8299c965db44STomer Tayar 8300c965db44STomer Tayar /* If mcp is stuck we get DBG_STATUS_NVRAM_GET_IMAGE_FAILED error. 8301c965db44STomer Tayar * In this case the buffer holds valid binary data, but we wont able 8302c965db44STomer Tayar * to parse it (since parsing relies on data in NVRAM which is only 8303c965db44STomer Tayar * accessible when MFW is responsive). skip the formatting but return 8304c965db44STomer Tayar * success so that binary data is provided. 8305c965db44STomer Tayar */ 8306c965db44STomer Tayar if (rc == DBG_STATUS_NVRAM_GET_IMAGE_FAILED) 8307c965db44STomer Tayar return DBG_STATUS_OK; 8308c965db44STomer Tayar 8309c965db44STomer Tayar if (rc != DBG_STATUS_OK) 8310c965db44STomer Tayar return rc; 8311c965db44STomer Tayar 8312c965db44STomer Tayar /* Format output */ 8313c965db44STomer Tayar rc = format_feature(p_hwfn, feature_idx); 8314c965db44STomer Tayar return rc; 8315c965db44STomer Tayar } 8316c965db44STomer Tayar 8317c965db44STomer Tayar int qed_dbg_grc(struct qed_dev *cdev, void *buffer, u32 *num_dumped_bytes) 8318c965db44STomer Tayar { 8319c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_GRC, num_dumped_bytes); 8320c965db44STomer Tayar } 8321c965db44STomer Tayar 8322c965db44STomer Tayar int qed_dbg_grc_size(struct qed_dev *cdev) 8323c965db44STomer Tayar { 8324c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_GRC); 8325c965db44STomer Tayar } 8326c965db44STomer Tayar 8327c965db44STomer Tayar int qed_dbg_idle_chk(struct qed_dev *cdev, void *buffer, u32 *num_dumped_bytes) 8328c965db44STomer Tayar { 8329c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_IDLE_CHK, 8330c965db44STomer Tayar num_dumped_bytes); 8331c965db44STomer Tayar } 8332c965db44STomer Tayar 8333c965db44STomer Tayar int qed_dbg_idle_chk_size(struct qed_dev *cdev) 8334c965db44STomer Tayar { 8335c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_IDLE_CHK); 8336c965db44STomer Tayar } 8337c965db44STomer Tayar 8338c965db44STomer Tayar int qed_dbg_reg_fifo(struct qed_dev *cdev, void *buffer, u32 *num_dumped_bytes) 8339c965db44STomer Tayar { 8340c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_REG_FIFO, 8341c965db44STomer Tayar num_dumped_bytes); 8342c965db44STomer Tayar } 8343c965db44STomer Tayar 8344c965db44STomer Tayar int qed_dbg_reg_fifo_size(struct qed_dev *cdev) 8345c965db44STomer Tayar { 8346c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_REG_FIFO); 8347c965db44STomer Tayar } 8348c965db44STomer Tayar 8349c965db44STomer Tayar int qed_dbg_igu_fifo(struct qed_dev *cdev, void *buffer, u32 *num_dumped_bytes) 8350c965db44STomer Tayar { 8351c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_IGU_FIFO, 8352c965db44STomer Tayar num_dumped_bytes); 8353c965db44STomer Tayar } 8354c965db44STomer Tayar 8355c965db44STomer Tayar int qed_dbg_igu_fifo_size(struct qed_dev *cdev) 8356c965db44STomer Tayar { 8357c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_IGU_FIFO); 8358c965db44STomer Tayar } 8359c965db44STomer Tayar 8360bf774d14SYueHaibing static int qed_dbg_nvm_image_length(struct qed_hwfn *p_hwfn, 83611ac4329aSDenis Bolotin enum qed_nvm_images image_id, u32 *length) 83621ac4329aSDenis Bolotin { 83631ac4329aSDenis Bolotin struct qed_nvm_image_att image_att; 83641ac4329aSDenis Bolotin int rc; 83651ac4329aSDenis Bolotin 83661ac4329aSDenis Bolotin *length = 0; 83671ac4329aSDenis Bolotin rc = qed_mcp_get_nvm_image_att(p_hwfn, image_id, &image_att); 83681ac4329aSDenis Bolotin if (rc) 83691ac4329aSDenis Bolotin return rc; 83701ac4329aSDenis Bolotin 83711ac4329aSDenis Bolotin *length = image_att.length; 83721ac4329aSDenis Bolotin 83731ac4329aSDenis Bolotin return rc; 83741ac4329aSDenis Bolotin } 83751ac4329aSDenis Bolotin 8376bf774d14SYueHaibing static int qed_dbg_nvm_image(struct qed_dev *cdev, void *buffer, 8377bf774d14SYueHaibing u32 *num_dumped_bytes, 8378bf774d14SYueHaibing enum qed_nvm_images image_id) 83791ac4329aSDenis Bolotin { 83801ac4329aSDenis Bolotin struct qed_hwfn *p_hwfn = 83811ac4329aSDenis Bolotin &cdev->hwfns[cdev->dbg_params.engine_for_debug]; 83821ac4329aSDenis Bolotin u32 len_rounded, i; 83831ac4329aSDenis Bolotin __be32 val; 83841ac4329aSDenis Bolotin int rc; 83851ac4329aSDenis Bolotin 83861ac4329aSDenis Bolotin *num_dumped_bytes = 0; 83871ac4329aSDenis Bolotin rc = qed_dbg_nvm_image_length(p_hwfn, image_id, &len_rounded); 83881ac4329aSDenis Bolotin if (rc) 83891ac4329aSDenis Bolotin return rc; 83901ac4329aSDenis Bolotin 83911ac4329aSDenis Bolotin DP_NOTICE(p_hwfn->cdev, 83921ac4329aSDenis Bolotin "Collecting a debug feature [\"nvram image %d\"]\n", 83931ac4329aSDenis Bolotin image_id); 83941ac4329aSDenis Bolotin 83951ac4329aSDenis Bolotin len_rounded = roundup(len_rounded, sizeof(u32)); 83961ac4329aSDenis Bolotin rc = qed_mcp_get_nvm_image(p_hwfn, image_id, buffer, len_rounded); 83971ac4329aSDenis Bolotin if (rc) 83981ac4329aSDenis Bolotin return rc; 83991ac4329aSDenis Bolotin 84001ac4329aSDenis Bolotin /* QED_NVM_IMAGE_NVM_META image is not swapped like other images */ 84011ac4329aSDenis Bolotin if (image_id != QED_NVM_IMAGE_NVM_META) 84021ac4329aSDenis Bolotin for (i = 0; i < len_rounded; i += 4) { 84031ac4329aSDenis Bolotin val = cpu_to_be32(*(u32 *)(buffer + i)); 84041ac4329aSDenis Bolotin *(u32 *)(buffer + i) = val; 84051ac4329aSDenis Bolotin } 84061ac4329aSDenis Bolotin 84071ac4329aSDenis Bolotin *num_dumped_bytes = len_rounded; 84081ac4329aSDenis Bolotin 84091ac4329aSDenis Bolotin return rc; 84101ac4329aSDenis Bolotin } 84111ac4329aSDenis Bolotin 8412c965db44STomer Tayar int qed_dbg_protection_override(struct qed_dev *cdev, void *buffer, 8413c965db44STomer Tayar u32 *num_dumped_bytes) 8414c965db44STomer Tayar { 8415c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_PROTECTION_OVERRIDE, 8416c965db44STomer Tayar num_dumped_bytes); 8417c965db44STomer Tayar } 8418c965db44STomer Tayar 8419c965db44STomer Tayar int qed_dbg_protection_override_size(struct qed_dev *cdev) 8420c965db44STomer Tayar { 8421c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_PROTECTION_OVERRIDE); 8422c965db44STomer Tayar } 8423c965db44STomer Tayar 8424c965db44STomer Tayar int qed_dbg_fw_asserts(struct qed_dev *cdev, void *buffer, 8425c965db44STomer Tayar u32 *num_dumped_bytes) 8426c965db44STomer Tayar { 8427c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_FW_ASSERTS, 8428c965db44STomer Tayar num_dumped_bytes); 8429c965db44STomer Tayar } 8430c965db44STomer Tayar 8431c965db44STomer Tayar int qed_dbg_fw_asserts_size(struct qed_dev *cdev) 8432c965db44STomer Tayar { 8433c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_FW_ASSERTS); 8434c965db44STomer Tayar } 8435c965db44STomer Tayar 84368a52bbabSMichal Kalderon int qed_dbg_ilt(struct qed_dev *cdev, void *buffer, u32 *num_dumped_bytes) 84378a52bbabSMichal Kalderon { 84388a52bbabSMichal Kalderon return qed_dbg_feature(cdev, buffer, DBG_FEATURE_ILT, num_dumped_bytes); 84398a52bbabSMichal Kalderon } 84408a52bbabSMichal Kalderon 84418a52bbabSMichal Kalderon int qed_dbg_ilt_size(struct qed_dev *cdev) 84428a52bbabSMichal Kalderon { 84438a52bbabSMichal Kalderon return qed_dbg_feature_size(cdev, DBG_FEATURE_ILT); 84448a52bbabSMichal Kalderon } 84458a52bbabSMichal Kalderon 8446c965db44STomer Tayar int qed_dbg_mcp_trace(struct qed_dev *cdev, void *buffer, 8447c965db44STomer Tayar u32 *num_dumped_bytes) 8448c965db44STomer Tayar { 8449c965db44STomer Tayar return qed_dbg_feature(cdev, buffer, DBG_FEATURE_MCP_TRACE, 8450c965db44STomer Tayar num_dumped_bytes); 8451c965db44STomer Tayar } 8452c965db44STomer Tayar 8453c965db44STomer Tayar int qed_dbg_mcp_trace_size(struct qed_dev *cdev) 8454c965db44STomer Tayar { 8455c965db44STomer Tayar return qed_dbg_feature_size(cdev, DBG_FEATURE_MCP_TRACE); 8456c965db44STomer Tayar } 8457c965db44STomer Tayar 8458c965db44STomer Tayar /* Defines the amount of bytes allocated for recording the length of debugfs 8459c965db44STomer Tayar * feature buffer. 8460c965db44STomer Tayar */ 8461c965db44STomer Tayar #define REGDUMP_HEADER_SIZE sizeof(u32) 84628a52bbabSMichal Kalderon #define REGDUMP_HEADER_SIZE_SHIFT 0 84638a52bbabSMichal Kalderon #define REGDUMP_HEADER_SIZE_MASK 0xffffff 8464c965db44STomer Tayar #define REGDUMP_HEADER_FEATURE_SHIFT 24 84658a52bbabSMichal Kalderon #define REGDUMP_HEADER_FEATURE_MASK 0x3f 8466c965db44STomer Tayar #define REGDUMP_HEADER_OMIT_ENGINE_SHIFT 30 84678a52bbabSMichal Kalderon #define REGDUMP_HEADER_OMIT_ENGINE_MASK 0x1 84688a52bbabSMichal Kalderon #define REGDUMP_HEADER_ENGINE_SHIFT 31 84698a52bbabSMichal Kalderon #define REGDUMP_HEADER_ENGINE_MASK 0x1 84708a52bbabSMichal Kalderon #define REGDUMP_MAX_SIZE 0x1000000 84718a52bbabSMichal Kalderon #define ILT_DUMP_MAX_SIZE (1024 * 1024 * 15) 84728a52bbabSMichal Kalderon 8473c965db44STomer Tayar enum debug_print_features { 8474c965db44STomer Tayar OLD_MODE = 0, 8475c965db44STomer Tayar IDLE_CHK = 1, 8476c965db44STomer Tayar GRC_DUMP = 2, 8477c965db44STomer Tayar MCP_TRACE = 3, 8478c965db44STomer Tayar REG_FIFO = 4, 8479c965db44STomer Tayar PROTECTION_OVERRIDE = 5, 8480c965db44STomer Tayar IGU_FIFO = 6, 8481c965db44STomer Tayar PHY = 7, 8482c965db44STomer Tayar FW_ASSERTS = 8, 84831ac4329aSDenis Bolotin NVM_CFG1 = 9, 84841ac4329aSDenis Bolotin DEFAULT_CFG = 10, 84851ac4329aSDenis Bolotin NVM_META = 11, 84868a52bbabSMichal Kalderon MDUMP = 12, 84878a52bbabSMichal Kalderon ILT_DUMP = 13, 8488c965db44STomer Tayar }; 8489c965db44STomer Tayar 8490c965db44STomer Tayar static u32 qed_calc_regdump_header(enum debug_print_features feature, 8491c965db44STomer Tayar int engine, u32 feature_size, u8 omit_engine) 8492c965db44STomer Tayar { 8493c965db44STomer Tayar /* Insert the engine, feature and mode inside the header and combine it 8494c965db44STomer Tayar * with feature size. 8495c965db44STomer Tayar */ 8496c965db44STomer Tayar return feature_size | (feature << REGDUMP_HEADER_FEATURE_SHIFT) | 8497c965db44STomer Tayar (omit_engine << REGDUMP_HEADER_OMIT_ENGINE_SHIFT) | 8498c965db44STomer Tayar (engine << REGDUMP_HEADER_ENGINE_SHIFT); 8499c965db44STomer Tayar } 8500c965db44STomer Tayar 8501c965db44STomer Tayar int qed_dbg_all_data(struct qed_dev *cdev, void *buffer) 8502c965db44STomer Tayar { 8503c965db44STomer Tayar u8 cur_engine, omit_engine = 0, org_engine; 85043b86bd07SSudarsana Reddy Kalluru struct qed_hwfn *p_hwfn = 85053b86bd07SSudarsana Reddy Kalluru &cdev->hwfns[cdev->dbg_params.engine_for_debug]; 85063b86bd07SSudarsana Reddy Kalluru struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; 85073b86bd07SSudarsana Reddy Kalluru int grc_params[MAX_DBG_GRC_PARAMS], i; 8508c965db44STomer Tayar u32 offset = 0, feature_size; 8509c965db44STomer Tayar int rc; 8510c965db44STomer Tayar 85113b86bd07SSudarsana Reddy Kalluru for (i = 0; i < MAX_DBG_GRC_PARAMS; i++) 85123b86bd07SSudarsana Reddy Kalluru grc_params[i] = dev_data->grc.param_val[i]; 85133b86bd07SSudarsana Reddy Kalluru 8514c965db44STomer Tayar if (cdev->num_hwfns == 1) 8515c965db44STomer Tayar omit_engine = 1; 8516c965db44STomer Tayar 8517c965db44STomer Tayar org_engine = qed_get_debug_engine(cdev); 8518c965db44STomer Tayar for (cur_engine = 0; cur_engine < cdev->num_hwfns; cur_engine++) { 8519c965db44STomer Tayar /* Collect idle_chks and grcDump for each hw function */ 8520c965db44STomer Tayar DP_VERBOSE(cdev, QED_MSG_DEBUG, 8521c965db44STomer Tayar "obtaining idle_chk and grcdump for current engine\n"); 8522c965db44STomer Tayar qed_set_debug_engine(cdev, cur_engine); 8523c965db44STomer Tayar 8524c965db44STomer Tayar /* First idle_chk */ 8525c965db44STomer Tayar rc = qed_dbg_idle_chk(cdev, (u8 *)buffer + offset + 8526c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 8527c965db44STomer Tayar if (!rc) { 8528c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 8529c965db44STomer Tayar qed_calc_regdump_header(IDLE_CHK, cur_engine, 8530c965db44STomer Tayar feature_size, omit_engine); 8531c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 8532c965db44STomer Tayar } else { 8533c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_idle_chk failed. rc = %d\n", rc); 8534c965db44STomer Tayar } 8535c965db44STomer Tayar 8536c965db44STomer Tayar /* Second idle_chk */ 8537c965db44STomer Tayar rc = qed_dbg_idle_chk(cdev, (u8 *)buffer + offset + 8538c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 8539c965db44STomer Tayar if (!rc) { 8540c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 8541c965db44STomer Tayar qed_calc_regdump_header(IDLE_CHK, cur_engine, 8542c965db44STomer Tayar feature_size, omit_engine); 8543c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 8544c965db44STomer Tayar } else { 8545c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_idle_chk failed. rc = %d\n", rc); 8546c965db44STomer Tayar } 8547c965db44STomer Tayar 8548c965db44STomer Tayar /* reg_fifo dump */ 8549c965db44STomer Tayar rc = qed_dbg_reg_fifo(cdev, (u8 *)buffer + offset + 8550c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 8551c965db44STomer Tayar if (!rc) { 8552c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 8553c965db44STomer Tayar qed_calc_regdump_header(REG_FIFO, cur_engine, 8554c965db44STomer Tayar feature_size, omit_engine); 8555c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 8556c965db44STomer Tayar } else { 8557c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_reg_fifo failed. rc = %d\n", rc); 8558c965db44STomer Tayar } 8559c965db44STomer Tayar 8560c965db44STomer Tayar /* igu_fifo dump */ 8561c965db44STomer Tayar rc = qed_dbg_igu_fifo(cdev, (u8 *)buffer + offset + 8562c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 8563c965db44STomer Tayar if (!rc) { 8564c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 8565c965db44STomer Tayar qed_calc_regdump_header(IGU_FIFO, cur_engine, 8566c965db44STomer Tayar feature_size, omit_engine); 8567c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 8568c965db44STomer Tayar } else { 8569c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_igu_fifo failed. rc = %d", rc); 8570c965db44STomer Tayar } 8571c965db44STomer Tayar 8572c965db44STomer Tayar /* protection_override dump */ 8573c965db44STomer Tayar rc = qed_dbg_protection_override(cdev, (u8 *)buffer + offset + 8574c965db44STomer Tayar REGDUMP_HEADER_SIZE, 8575c965db44STomer Tayar &feature_size); 8576c965db44STomer Tayar if (!rc) { 8577c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 8578c965db44STomer Tayar qed_calc_regdump_header(PROTECTION_OVERRIDE, 8579c965db44STomer Tayar cur_engine, 8580c965db44STomer Tayar feature_size, omit_engine); 8581c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 8582c965db44STomer Tayar } else { 8583c965db44STomer Tayar DP_ERR(cdev, 8584c965db44STomer Tayar "qed_dbg_protection_override failed. rc = %d\n", 8585c965db44STomer Tayar rc); 8586c965db44STomer Tayar } 8587c965db44STomer Tayar 8588c965db44STomer Tayar /* fw_asserts dump */ 8589c965db44STomer Tayar rc = qed_dbg_fw_asserts(cdev, (u8 *)buffer + offset + 8590c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 8591c965db44STomer Tayar if (!rc) { 8592c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 8593c965db44STomer Tayar qed_calc_regdump_header(FW_ASSERTS, cur_engine, 8594c965db44STomer Tayar feature_size, omit_engine); 8595c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 8596c965db44STomer Tayar } else { 8597c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_fw_asserts failed. rc = %d\n", 8598c965db44STomer Tayar rc); 8599c965db44STomer Tayar } 8600c965db44STomer Tayar 86018a52bbabSMichal Kalderon feature_size = qed_dbg_ilt_size(cdev); 86028a52bbabSMichal Kalderon if (!cdev->disable_ilt_dump && 86038a52bbabSMichal Kalderon feature_size < ILT_DUMP_MAX_SIZE) { 86048a52bbabSMichal Kalderon rc = qed_dbg_ilt(cdev, (u8 *)buffer + offset + 86058a52bbabSMichal Kalderon REGDUMP_HEADER_SIZE, &feature_size); 86068a52bbabSMichal Kalderon if (!rc) { 86078a52bbabSMichal Kalderon *(u32 *)((u8 *)buffer + offset) = 86088a52bbabSMichal Kalderon qed_calc_regdump_header(ILT_DUMP, 86098a52bbabSMichal Kalderon cur_engine, 86108a52bbabSMichal Kalderon feature_size, 86118a52bbabSMichal Kalderon omit_engine); 86128a52bbabSMichal Kalderon offset += feature_size + REGDUMP_HEADER_SIZE; 86138a52bbabSMichal Kalderon } else { 86148a52bbabSMichal Kalderon DP_ERR(cdev, "qed_dbg_ilt failed. rc = %d\n", 86158a52bbabSMichal Kalderon rc); 86168a52bbabSMichal Kalderon } 86178a52bbabSMichal Kalderon } 86183b86bd07SSudarsana Reddy Kalluru 8619c965db44STomer Tayar /* GRC dump - must be last because when mcp stuck it will 8620c965db44STomer Tayar * clutter idle_chk, reg_fifo, ... 8621c965db44STomer Tayar */ 8622c965db44STomer Tayar rc = qed_dbg_grc(cdev, (u8 *)buffer + offset + 8623c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 8624c965db44STomer Tayar if (!rc) { 8625c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 8626c965db44STomer Tayar qed_calc_regdump_header(GRC_DUMP, cur_engine, 8627c965db44STomer Tayar feature_size, omit_engine); 8628c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 8629c965db44STomer Tayar } else { 8630c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_grc failed. rc = %d", rc); 8631c965db44STomer Tayar } 8632c965db44STomer Tayar } 8633c965db44STomer Tayar 863450bc60cbSMichal Kalderon qed_set_debug_engine(cdev, org_engine); 8635c965db44STomer Tayar /* mcp_trace */ 8636c965db44STomer Tayar rc = qed_dbg_mcp_trace(cdev, (u8 *)buffer + offset + 8637c965db44STomer Tayar REGDUMP_HEADER_SIZE, &feature_size); 8638c965db44STomer Tayar if (!rc) { 8639c965db44STomer Tayar *(u32 *)((u8 *)buffer + offset) = 8640c965db44STomer Tayar qed_calc_regdump_header(MCP_TRACE, cur_engine, 8641c965db44STomer Tayar feature_size, omit_engine); 8642c965db44STomer Tayar offset += (feature_size + REGDUMP_HEADER_SIZE); 8643c965db44STomer Tayar } else { 8644c965db44STomer Tayar DP_ERR(cdev, "qed_dbg_mcp_trace failed. rc = %d\n", rc); 8645c965db44STomer Tayar } 8646c965db44STomer Tayar 86471ac4329aSDenis Bolotin /* nvm cfg1 */ 86481ac4329aSDenis Bolotin rc = qed_dbg_nvm_image(cdev, 86491ac4329aSDenis Bolotin (u8 *)buffer + offset + REGDUMP_HEADER_SIZE, 86501ac4329aSDenis Bolotin &feature_size, QED_NVM_IMAGE_NVM_CFG1); 86511ac4329aSDenis Bolotin if (!rc) { 86521ac4329aSDenis Bolotin *(u32 *)((u8 *)buffer + offset) = 86531ac4329aSDenis Bolotin qed_calc_regdump_header(NVM_CFG1, cur_engine, 86541ac4329aSDenis Bolotin feature_size, omit_engine); 86551ac4329aSDenis Bolotin offset += (feature_size + REGDUMP_HEADER_SIZE); 86561ac4329aSDenis Bolotin } else if (rc != -ENOENT) { 86571ac4329aSDenis Bolotin DP_ERR(cdev, 86581ac4329aSDenis Bolotin "qed_dbg_nvm_image failed for image %d (%s), rc = %d\n", 86591ac4329aSDenis Bolotin QED_NVM_IMAGE_NVM_CFG1, "QED_NVM_IMAGE_NVM_CFG1", rc); 86601ac4329aSDenis Bolotin } 86611ac4329aSDenis Bolotin 86621ac4329aSDenis Bolotin /* nvm default */ 86631ac4329aSDenis Bolotin rc = qed_dbg_nvm_image(cdev, 86641ac4329aSDenis Bolotin (u8 *)buffer + offset + REGDUMP_HEADER_SIZE, 86651ac4329aSDenis Bolotin &feature_size, QED_NVM_IMAGE_DEFAULT_CFG); 86661ac4329aSDenis Bolotin if (!rc) { 86671ac4329aSDenis Bolotin *(u32 *)((u8 *)buffer + offset) = 86681ac4329aSDenis Bolotin qed_calc_regdump_header(DEFAULT_CFG, cur_engine, 86691ac4329aSDenis Bolotin feature_size, omit_engine); 86701ac4329aSDenis Bolotin offset += (feature_size + REGDUMP_HEADER_SIZE); 86711ac4329aSDenis Bolotin } else if (rc != -ENOENT) { 86721ac4329aSDenis Bolotin DP_ERR(cdev, 86731ac4329aSDenis Bolotin "qed_dbg_nvm_image failed for image %d (%s), rc = %d\n", 86741ac4329aSDenis Bolotin QED_NVM_IMAGE_DEFAULT_CFG, "QED_NVM_IMAGE_DEFAULT_CFG", 86751ac4329aSDenis Bolotin rc); 86761ac4329aSDenis Bolotin } 86771ac4329aSDenis Bolotin 86781ac4329aSDenis Bolotin /* nvm meta */ 86791ac4329aSDenis Bolotin rc = qed_dbg_nvm_image(cdev, 86801ac4329aSDenis Bolotin (u8 *)buffer + offset + REGDUMP_HEADER_SIZE, 86811ac4329aSDenis Bolotin &feature_size, QED_NVM_IMAGE_NVM_META); 86821ac4329aSDenis Bolotin if (!rc) { 86831ac4329aSDenis Bolotin *(u32 *)((u8 *)buffer + offset) = 86841ac4329aSDenis Bolotin qed_calc_regdump_header(NVM_META, cur_engine, 86851ac4329aSDenis Bolotin feature_size, omit_engine); 86861ac4329aSDenis Bolotin offset += (feature_size + REGDUMP_HEADER_SIZE); 86871ac4329aSDenis Bolotin } else if (rc != -ENOENT) { 86881ac4329aSDenis Bolotin DP_ERR(cdev, 86891ac4329aSDenis Bolotin "qed_dbg_nvm_image failed for image %d (%s), rc = %d\n", 86901ac4329aSDenis Bolotin QED_NVM_IMAGE_NVM_META, "QED_NVM_IMAGE_NVM_META", rc); 86911ac4329aSDenis Bolotin } 86921ac4329aSDenis Bolotin 86938a52bbabSMichal Kalderon /* nvm mdump */ 86948a52bbabSMichal Kalderon rc = qed_dbg_nvm_image(cdev, (u8 *)buffer + offset + 86958a52bbabSMichal Kalderon REGDUMP_HEADER_SIZE, &feature_size, 86968a52bbabSMichal Kalderon QED_NVM_IMAGE_MDUMP); 86978a52bbabSMichal Kalderon if (!rc) { 86988a52bbabSMichal Kalderon *(u32 *)((u8 *)buffer + offset) = 86998a52bbabSMichal Kalderon qed_calc_regdump_header(MDUMP, cur_engine, 87008a52bbabSMichal Kalderon feature_size, omit_engine); 87018a52bbabSMichal Kalderon offset += (feature_size + REGDUMP_HEADER_SIZE); 87028a52bbabSMichal Kalderon } else if (rc != -ENOENT) { 87038a52bbabSMichal Kalderon DP_ERR(cdev, 87048a52bbabSMichal Kalderon "qed_dbg_nvm_image failed for image %d (%s), rc = %d\n", 87058a52bbabSMichal Kalderon QED_NVM_IMAGE_MDUMP, "QED_NVM_IMAGE_MDUMP", rc); 87068a52bbabSMichal Kalderon } 87078a52bbabSMichal Kalderon 8708c965db44STomer Tayar return 0; 8709c965db44STomer Tayar } 8710c965db44STomer Tayar 8711c965db44STomer Tayar int qed_dbg_all_data_size(struct qed_dev *cdev) 8712c965db44STomer Tayar { 87131ac4329aSDenis Bolotin struct qed_hwfn *p_hwfn = 87141ac4329aSDenis Bolotin &cdev->hwfns[cdev->dbg_params.engine_for_debug]; 87158a52bbabSMichal Kalderon u32 regs_len = 0, image_len = 0, ilt_len = 0, total_ilt_len = 0; 8716c965db44STomer Tayar u8 cur_engine, org_engine; 8717c965db44STomer Tayar 8718c965db44STomer Tayar org_engine = qed_get_debug_engine(cdev); 8719c965db44STomer Tayar for (cur_engine = 0; cur_engine < cdev->num_hwfns; cur_engine++) { 8720c965db44STomer Tayar /* Engine specific */ 8721c965db44STomer Tayar DP_VERBOSE(cdev, QED_MSG_DEBUG, 8722c965db44STomer Tayar "calculating idle_chk and grcdump register length for current engine\n"); 8723c965db44STomer Tayar qed_set_debug_engine(cdev, cur_engine); 8724c965db44STomer Tayar regs_len += REGDUMP_HEADER_SIZE + qed_dbg_idle_chk_size(cdev) + 8725c965db44STomer Tayar REGDUMP_HEADER_SIZE + qed_dbg_idle_chk_size(cdev) + 8726c965db44STomer Tayar REGDUMP_HEADER_SIZE + qed_dbg_grc_size(cdev) + 8727c965db44STomer Tayar REGDUMP_HEADER_SIZE + qed_dbg_reg_fifo_size(cdev) + 8728c965db44STomer Tayar REGDUMP_HEADER_SIZE + qed_dbg_igu_fifo_size(cdev) + 8729c965db44STomer Tayar REGDUMP_HEADER_SIZE + 8730c965db44STomer Tayar qed_dbg_protection_override_size(cdev) + 8731c965db44STomer Tayar REGDUMP_HEADER_SIZE + qed_dbg_fw_asserts_size(cdev); 87328a52bbabSMichal Kalderon 87338a52bbabSMichal Kalderon ilt_len = REGDUMP_HEADER_SIZE + qed_dbg_ilt_size(cdev); 87348a52bbabSMichal Kalderon if (ilt_len < ILT_DUMP_MAX_SIZE) { 87358a52bbabSMichal Kalderon total_ilt_len += ilt_len; 87368a52bbabSMichal Kalderon regs_len += ilt_len; 87378a52bbabSMichal Kalderon } 8738c965db44STomer Tayar } 8739c965db44STomer Tayar 874050bc60cbSMichal Kalderon qed_set_debug_engine(cdev, org_engine); 874150bc60cbSMichal Kalderon 8742c965db44STomer Tayar /* Engine common */ 8743c965db44STomer Tayar regs_len += REGDUMP_HEADER_SIZE + qed_dbg_mcp_trace_size(cdev); 87441ac4329aSDenis Bolotin qed_dbg_nvm_image_length(p_hwfn, QED_NVM_IMAGE_NVM_CFG1, &image_len); 87451ac4329aSDenis Bolotin if (image_len) 87461ac4329aSDenis Bolotin regs_len += REGDUMP_HEADER_SIZE + image_len; 87471ac4329aSDenis Bolotin qed_dbg_nvm_image_length(p_hwfn, QED_NVM_IMAGE_DEFAULT_CFG, &image_len); 87481ac4329aSDenis Bolotin if (image_len) 87491ac4329aSDenis Bolotin regs_len += REGDUMP_HEADER_SIZE + image_len; 87501ac4329aSDenis Bolotin qed_dbg_nvm_image_length(p_hwfn, QED_NVM_IMAGE_NVM_META, &image_len); 87511ac4329aSDenis Bolotin if (image_len) 87521ac4329aSDenis Bolotin regs_len += REGDUMP_HEADER_SIZE + image_len; 87538a52bbabSMichal Kalderon qed_dbg_nvm_image_length(p_hwfn, QED_NVM_IMAGE_MDUMP, &image_len); 87548a52bbabSMichal Kalderon if (image_len) 87558a52bbabSMichal Kalderon regs_len += REGDUMP_HEADER_SIZE + image_len; 87568a52bbabSMichal Kalderon 87578a52bbabSMichal Kalderon if (regs_len > REGDUMP_MAX_SIZE) { 87588a52bbabSMichal Kalderon DP_VERBOSE(cdev, QED_MSG_DEBUG, 87598a52bbabSMichal Kalderon "Dump exceeds max size 0x%x, disable ILT dump\n", 87608a52bbabSMichal Kalderon REGDUMP_MAX_SIZE); 87618a52bbabSMichal Kalderon cdev->disable_ilt_dump = true; 87628a52bbabSMichal Kalderon regs_len -= total_ilt_len; 87638a52bbabSMichal Kalderon } 8764c965db44STomer Tayar 8765c965db44STomer Tayar return regs_len; 8766c965db44STomer Tayar } 8767c965db44STomer Tayar 8768c965db44STomer Tayar int qed_dbg_feature(struct qed_dev *cdev, void *buffer, 8769c965db44STomer Tayar enum qed_dbg_features feature, u32 *num_dumped_bytes) 8770c965db44STomer Tayar { 8771c965db44STomer Tayar struct qed_hwfn *p_hwfn = 8772c965db44STomer Tayar &cdev->hwfns[cdev->dbg_params.engine_for_debug]; 8773c965db44STomer Tayar struct qed_dbg_feature *qed_feature = 8774c965db44STomer Tayar &cdev->dbg_params.features[feature]; 8775c965db44STomer Tayar enum dbg_status dbg_rc; 8776c965db44STomer Tayar struct qed_ptt *p_ptt; 8777c965db44STomer Tayar int rc = 0; 8778c965db44STomer Tayar 8779c965db44STomer Tayar /* Acquire ptt */ 8780c965db44STomer Tayar p_ptt = qed_ptt_acquire(p_hwfn); 8781c965db44STomer Tayar if (!p_ptt) 8782c965db44STomer Tayar return -EINVAL; 8783c965db44STomer Tayar 8784c965db44STomer Tayar /* Get dump */ 8785c965db44STomer Tayar dbg_rc = qed_dbg_dump(p_hwfn, p_ptt, feature); 8786c965db44STomer Tayar if (dbg_rc != DBG_STATUS_OK) { 8787c965db44STomer Tayar DP_VERBOSE(cdev, QED_MSG_DEBUG, "%s\n", 8788c965db44STomer Tayar qed_dbg_get_status_str(dbg_rc)); 8789c965db44STomer Tayar *num_dumped_bytes = 0; 8790c965db44STomer Tayar rc = -EINVAL; 8791c965db44STomer Tayar goto out; 8792c965db44STomer Tayar } 8793c965db44STomer Tayar 8794c965db44STomer Tayar DP_VERBOSE(cdev, QED_MSG_DEBUG, 8795c965db44STomer Tayar "copying debugfs feature to external buffer\n"); 8796c965db44STomer Tayar memcpy(buffer, qed_feature->dump_buf, qed_feature->buf_size); 8797c965db44STomer Tayar *num_dumped_bytes = cdev->dbg_params.features[feature].dumped_dwords * 8798c965db44STomer Tayar 4; 8799c965db44STomer Tayar 8800c965db44STomer Tayar out: 8801c965db44STomer Tayar qed_ptt_release(p_hwfn, p_ptt); 8802c965db44STomer Tayar return rc; 8803c965db44STomer Tayar } 8804c965db44STomer Tayar 8805c965db44STomer Tayar int qed_dbg_feature_size(struct qed_dev *cdev, enum qed_dbg_features feature) 8806c965db44STomer Tayar { 8807c965db44STomer Tayar struct qed_hwfn *p_hwfn = 8808c965db44STomer Tayar &cdev->hwfns[cdev->dbg_params.engine_for_debug]; 8809c965db44STomer Tayar struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn); 8810c965db44STomer Tayar struct qed_dbg_feature *qed_feature = 8811c965db44STomer Tayar &cdev->dbg_params.features[feature]; 8812c965db44STomer Tayar u32 buf_size_dwords; 8813c965db44STomer Tayar enum dbg_status rc; 8814c965db44STomer Tayar 8815c965db44STomer Tayar if (!p_ptt) 8816c965db44STomer Tayar return -EINVAL; 8817c965db44STomer Tayar 8818c965db44STomer Tayar rc = qed_features_lookup[feature].get_size(p_hwfn, p_ptt, 8819c965db44STomer Tayar &buf_size_dwords); 8820c965db44STomer Tayar if (rc != DBG_STATUS_OK) 8821c965db44STomer Tayar buf_size_dwords = 0; 8822c965db44STomer Tayar 88238a52bbabSMichal Kalderon /* Feature will not be dumped if it exceeds maximum size */ 88248a52bbabSMichal Kalderon if (buf_size_dwords > MAX_DBG_FEATURE_SIZE_DWORDS) 88258a52bbabSMichal Kalderon buf_size_dwords = 0; 88268a52bbabSMichal Kalderon 8827c965db44STomer Tayar qed_ptt_release(p_hwfn, p_ptt); 8828c965db44STomer Tayar qed_feature->buf_size = buf_size_dwords * sizeof(u32); 8829c965db44STomer Tayar return qed_feature->buf_size; 8830c965db44STomer Tayar } 8831c965db44STomer Tayar 8832c965db44STomer Tayar u8 qed_get_debug_engine(struct qed_dev *cdev) 8833c965db44STomer Tayar { 8834c965db44STomer Tayar return cdev->dbg_params.engine_for_debug; 8835c965db44STomer Tayar } 8836c965db44STomer Tayar 8837c965db44STomer Tayar void qed_set_debug_engine(struct qed_dev *cdev, int engine_number) 8838c965db44STomer Tayar { 8839c965db44STomer Tayar DP_VERBOSE(cdev, QED_MSG_DEBUG, "set debug engine to %d\n", 8840c965db44STomer Tayar engine_number); 8841c965db44STomer Tayar cdev->dbg_params.engine_for_debug = engine_number; 8842c965db44STomer Tayar } 8843c965db44STomer Tayar 8844c965db44STomer Tayar void qed_dbg_pf_init(struct qed_dev *cdev) 8845c965db44STomer Tayar { 8846c965db44STomer Tayar const u8 *dbg_values; 8847c965db44STomer Tayar 8848c965db44STomer Tayar /* Debug values are after init values. 8849c965db44STomer Tayar * The offset is the first dword of the file. 8850c965db44STomer Tayar */ 8851c965db44STomer Tayar dbg_values = cdev->firmware->data + *(u32 *)cdev->firmware->data; 8852c965db44STomer Tayar qed_dbg_set_bin_ptr((u8 *)dbg_values); 8853c965db44STomer Tayar qed_dbg_user_set_bin_ptr((u8 *)dbg_values); 8854c965db44STomer Tayar } 8855c965db44STomer Tayar 8856c965db44STomer Tayar void qed_dbg_pf_exit(struct qed_dev *cdev) 8857c965db44STomer Tayar { 8858c965db44STomer Tayar struct qed_dbg_feature *feature = NULL; 8859c965db44STomer Tayar enum qed_dbg_features feature_idx; 8860c965db44STomer Tayar 8861c965db44STomer Tayar /* Debug features' buffers may be allocated if debug feature was used 8862c965db44STomer Tayar * but dump wasn't called. 8863c965db44STomer Tayar */ 8864c965db44STomer Tayar for (feature_idx = 0; feature_idx < DBG_FEATURE_NUM; feature_idx++) { 8865c965db44STomer Tayar feature = &cdev->dbg_params.features[feature_idx]; 8866c965db44STomer Tayar if (feature->dump_buf) { 8867c965db44STomer Tayar vfree(feature->dump_buf); 8868c965db44STomer Tayar feature->dump_buf = NULL; 8869c965db44STomer Tayar } 8870c965db44STomer Tayar } 8871c965db44STomer Tayar } 8872