1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/bitops.h> 36 #include <linux/dcbnl.h> 37 #include <linux/errno.h> 38 #include <linux/kernel.h> 39 #include <linux/slab.h> 40 #include <linux/string.h> 41 #include "qed.h" 42 #include "qed_cxt.h" 43 #include "qed_dcbx.h" 44 #include "qed_hsi.h" 45 #include "qed_sp.h" 46 #include "qed_sriov.h" 47 #include "qed_rdma.h" 48 #ifdef CONFIG_DCB 49 #include <linux/qed/qed_eth_if.h> 50 #endif 51 52 #define QED_DCBX_MAX_MIB_READ_TRY (100) 53 #define QED_ETH_TYPE_DEFAULT (0) 54 #define QED_ETH_TYPE_ROCE (0x8915) 55 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 56 #define QED_ETH_TYPE_FCOE (0x8906) 57 #define QED_TCP_PORT_ISCSI (0xCBC) 58 59 #define QED_DCBX_INVALID_PRIORITY 0xFF 60 61 /* Get Traffic Class from priority traffic class table, 4 bits represent 62 * the traffic class corresponding to the priority. 63 */ 64 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 65 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 66 67 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 68 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI}, 69 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE}, 70 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE}, 71 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE}, 72 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}, 73 }; 74 75 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 76 { 77 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 78 DCBX_APP_SF_ETHTYPE); 79 } 80 81 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 82 { 83 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 84 85 /* Old MFW */ 86 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 87 return qed_dcbx_app_ethtype(app_info_bitmap); 88 89 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 90 } 91 92 static bool qed_dcbx_app_port(u32 app_info_bitmap) 93 { 94 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 95 DCBX_APP_SF_PORT); 96 } 97 98 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 99 { 100 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 101 102 /* Old MFW */ 103 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 104 return qed_dcbx_app_port(app_info_bitmap); 105 106 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 107 } 108 109 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 110 { 111 bool ethtype; 112 113 if (ieee) 114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 115 else 116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 117 118 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 119 } 120 121 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 122 { 123 bool port; 124 125 if (ieee) 126 port = qed_dcbx_ieee_app_port(app_info_bitmap, 127 DCBX_APP_SF_IEEE_TCP_PORT); 128 else 129 port = qed_dcbx_app_port(app_info_bitmap); 130 131 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 132 } 133 134 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 135 { 136 bool ethtype; 137 138 if (ieee) 139 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 140 else 141 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 142 143 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 144 } 145 146 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 147 { 148 bool ethtype; 149 150 if (ieee) 151 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 152 else 153 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 154 155 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 156 } 157 158 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 159 { 160 bool port; 161 162 if (ieee) 163 port = qed_dcbx_ieee_app_port(app_info_bitmap, 164 DCBX_APP_SF_IEEE_UDP_PORT); 165 else 166 port = qed_dcbx_app_port(app_info_bitmap); 167 168 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 169 } 170 171 static void 172 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 173 { 174 enum dcbx_protocol_type id; 175 int i; 176 177 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 178 p_data->dcbx_enabled); 179 180 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 181 id = qed_dcbx_app_update[i].id; 182 183 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 184 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 185 qed_dcbx_app_update[i].name, p_data->arr[id].update, 186 p_data->arr[id].enable, p_data->arr[id].priority, 187 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); 188 } 189 } 190 191 static void 192 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 193 struct qed_hw_info *p_info, 194 bool enable, 195 u8 prio, 196 u8 tc, 197 enum dcbx_protocol_type type, 198 enum qed_pci_personality personality) 199 { 200 /* PF update ramrod data */ 201 p_data->arr[type].enable = enable; 202 p_data->arr[type].priority = prio; 203 p_data->arr[type].tc = tc; 204 if (enable) 205 p_data->arr[type].update = UPDATE_DCB; 206 else 207 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP; 208 209 /* QM reconf data */ 210 if (p_info->personality == personality) 211 qed_hw_info_set_offload_tc(p_info, tc); 212 } 213 214 /* Update app protocol data and hw_info fields with the TLV info */ 215 static void 216 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 217 struct qed_hwfn *p_hwfn, 218 bool enable, 219 u8 prio, u8 tc, enum dcbx_protocol_type type) 220 { 221 struct qed_hw_info *p_info = &p_hwfn->hw_info; 222 enum qed_pci_personality personality; 223 enum dcbx_protocol_type id; 224 int i; 225 226 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 227 id = qed_dcbx_app_update[i].id; 228 229 if (type != id) 230 continue; 231 232 personality = qed_dcbx_app_update[i].personality; 233 234 qed_dcbx_set_params(p_data, p_info, enable, 235 prio, tc, type, personality); 236 } 237 } 238 239 static bool 240 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 241 u32 app_prio_bitmap, 242 u16 id, enum dcbx_protocol_type *type, bool ieee) 243 { 244 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 245 *type = DCBX_PROTOCOL_FCOE; 246 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 247 *type = DCBX_PROTOCOL_ROCE; 248 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 249 *type = DCBX_PROTOCOL_ISCSI; 250 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 251 *type = DCBX_PROTOCOL_ETH; 252 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 253 *type = DCBX_PROTOCOL_ROCE_V2; 254 } else { 255 *type = DCBX_MAX_PROTOCOL_TYPE; 256 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 257 "No action required, App TLV entry = 0x%x\n", 258 app_prio_bitmap); 259 return false; 260 } 261 262 return true; 263 } 264 265 /* Parse app TLV's to update TC information in hw_info structure for 266 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 267 */ 268 static int 269 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 270 struct qed_dcbx_results *p_data, 271 struct dcbx_app_priority_entry *p_tbl, 272 u32 pri_tc_tbl, int count, u8 dcbx_version) 273 { 274 enum dcbx_protocol_type type; 275 bool enable, ieee, eth_tlv; 276 u8 tc, priority_map; 277 u16 protocol_id; 278 int priority; 279 int i; 280 281 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 282 283 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 284 eth_tlv = false; 285 /* Parse APP TLV */ 286 for (i = 0; i < count; i++) { 287 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 288 DCBX_APP_PROTOCOL_ID); 289 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 290 DCBX_APP_PRI_MAP); 291 priority = ffs(priority_map) - 1; 292 if (priority < 0) { 293 DP_ERR(p_hwfn, "Invalid priority\n"); 294 return -EINVAL; 295 } 296 297 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 298 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 299 protocol_id, &type, ieee)) { 300 /* ETH always have the enable bit reset, as it gets 301 * vlan information per packet. For other protocols, 302 * should be set according to the dcbx_enabled 303 * indication, but we only got here if there was an 304 * app tlv for the protocol, so dcbx must be enabled. 305 */ 306 if (type == DCBX_PROTOCOL_ETH) { 307 enable = false; 308 eth_tlv = true; 309 } else { 310 enable = true; 311 } 312 313 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 314 priority, tc, type); 315 } 316 } 317 318 /* If Eth TLV is not detected, use UFP TC as default TC */ 319 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && !eth_tlv) 320 p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc; 321 322 /* Update ramrod protocol data and hw_info fields 323 * with default info when corresponding APP TLV's are not detected. 324 * The enabled field has a different logic for ethernet as only for 325 * ethernet dcb should disabled by default, as the information arrives 326 * from the OS (unless an explicit app tlv was present). 327 */ 328 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 329 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 330 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 331 if (p_data->arr[type].update) 332 continue; 333 334 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 335 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 336 priority, tc, type); 337 } 338 339 return 0; 340 } 341 342 /* Parse app TLV's to update TC information in hw_info structure for 343 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 344 */ 345 static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 346 { 347 struct dcbx_app_priority_feature *p_app; 348 struct dcbx_app_priority_entry *p_tbl; 349 struct qed_dcbx_results data = { 0 }; 350 struct dcbx_ets_feature *p_ets; 351 struct qed_hw_info *p_info; 352 u32 pri_tc_tbl, flags; 353 u8 dcbx_version; 354 int num_entries; 355 int rc = 0; 356 357 flags = p_hwfn->p_dcbx_info->operational.flags; 358 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 359 360 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 361 p_tbl = p_app->app_pri_tbl; 362 363 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 364 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 365 366 p_info = &p_hwfn->hw_info; 367 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 368 369 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, 370 num_entries, dcbx_version); 371 if (rc) 372 return rc; 373 374 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags, 375 DCBX_ETS_MAX_TCS); 376 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC); 377 data.pf_id = p_hwfn->rel_pf_id; 378 data.dcbx_enabled = !!dcbx_version; 379 380 qed_dcbx_dp_protocol(p_hwfn, &data); 381 382 memcpy(&p_hwfn->p_dcbx_info->results, &data, 383 sizeof(struct qed_dcbx_results)); 384 385 return 0; 386 } 387 388 static int 389 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 390 struct qed_ptt *p_ptt, 391 struct qed_dcbx_mib_meta_data *p_data, 392 enum qed_mib_read_type type) 393 { 394 u32 prefix_seq_num, suffix_seq_num; 395 int read_count = 0; 396 int rc = 0; 397 398 /* The data is considered to be valid only if both sequence numbers are 399 * the same. 400 */ 401 do { 402 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 403 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 404 p_data->addr, p_data->size); 405 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 406 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 407 } else { 408 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 409 p_data->addr, p_data->size); 410 prefix_seq_num = p_data->mib->prefix_seq_num; 411 suffix_seq_num = p_data->mib->suffix_seq_num; 412 } 413 read_count++; 414 415 DP_VERBOSE(p_hwfn, 416 QED_MSG_DCB, 417 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 418 type, read_count, prefix_seq_num, suffix_seq_num); 419 } while ((prefix_seq_num != suffix_seq_num) && 420 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 421 422 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 423 DP_ERR(p_hwfn, 424 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 425 type, read_count, prefix_seq_num, suffix_seq_num); 426 rc = -EIO; 427 } 428 429 return rc; 430 } 431 432 static void 433 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 434 struct qed_dcbx_app_prio *p_prio, 435 struct qed_dcbx_results *p_results) 436 { 437 u8 val; 438 439 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 440 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 441 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 442 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 443 444 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 445 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 446 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 447 448 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 449 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 450 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 451 p_prio->roce_v2 = val; 452 } 453 454 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 455 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 456 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 457 458 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 459 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 460 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 461 462 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 463 p_results->arr[DCBX_PROTOCOL_ETH].enable) 464 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 465 466 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 467 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 468 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 469 p_prio->eth); 470 } 471 472 static void 473 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 474 struct dcbx_app_priority_feature *p_app, 475 struct dcbx_app_priority_entry *p_tbl, 476 struct qed_dcbx_params *p_params, bool ieee) 477 { 478 struct qed_app_entry *entry; 479 u8 pri_map; 480 int i; 481 482 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 483 DCBX_APP_WILLING); 484 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 485 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 486 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 487 DCBX_APP_NUM_ENTRIES); 488 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 489 entry = &p_params->app_entry[i]; 490 if (ieee) { 491 u8 sf_ieee; 492 u32 val; 493 494 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 495 DCBX_APP_SF_IEEE); 496 switch (sf_ieee) { 497 case DCBX_APP_SF_IEEE_RESERVED: 498 /* Old MFW */ 499 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 500 DCBX_APP_SF); 501 entry->sf_ieee = val ? 502 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 503 QED_DCBX_SF_IEEE_ETHTYPE; 504 break; 505 case DCBX_APP_SF_IEEE_ETHTYPE: 506 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 507 break; 508 case DCBX_APP_SF_IEEE_TCP_PORT: 509 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 510 break; 511 case DCBX_APP_SF_IEEE_UDP_PORT: 512 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 513 break; 514 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 515 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 516 break; 517 } 518 } else { 519 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 520 DCBX_APP_SF)); 521 } 522 523 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 524 entry->prio = ffs(pri_map) - 1; 525 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 526 DCBX_APP_PROTOCOL_ID); 527 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 528 entry->proto_id, 529 &entry->proto_type, ieee); 530 } 531 532 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 533 "APP params: willing %d, valid %d error = %d\n", 534 p_params->app_willing, p_params->app_valid, 535 p_params->app_error); 536 } 537 538 static void 539 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 540 u32 pfc, struct qed_dcbx_params *p_params) 541 { 542 u8 pfc_map; 543 544 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 545 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 546 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 547 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 548 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 549 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 550 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 551 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 552 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 553 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 554 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 555 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 556 557 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 558 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 559 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 560 p_params->pfc.enabled); 561 } 562 563 static void 564 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 565 struct dcbx_ets_feature *p_ets, 566 struct qed_dcbx_params *p_params) 567 { 568 u32 bw_map[2], tsa_map[2], pri_map; 569 int i; 570 571 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 572 DCBX_ETS_WILLING); 573 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 574 DCBX_ETS_ENABLED); 575 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 576 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 577 DCBX_ETS_MAX_TCS); 578 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 579 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 580 p_params->ets_willing, p_params->ets_enabled, 581 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 582 p_params->max_ets_tc); 583 584 if (p_params->ets_enabled && !p_params->max_ets_tc) { 585 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES; 586 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 587 "ETS params: max_ets_tc is forced to %d\n", 588 p_params->max_ets_tc); 589 } 590 591 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 592 * encoded in a type u32 array of size 2. 593 */ 594 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 595 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 596 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 597 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 598 pri_map = p_ets->pri_tc_tbl[0]; 599 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 600 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 601 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 602 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 603 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 604 "elem %d bw_tbl %x tsa_tbl %x\n", 605 i, p_params->ets_tc_bw_tbl[i], 606 p_params->ets_tc_tsa_tbl[i]); 607 } 608 } 609 610 static void 611 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 612 struct dcbx_app_priority_feature *p_app, 613 struct dcbx_app_priority_entry *p_tbl, 614 struct dcbx_ets_feature *p_ets, 615 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 616 { 617 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 618 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 619 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 620 } 621 622 static void 623 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 624 { 625 struct dcbx_features *p_feat; 626 627 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 628 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 629 p_feat->app.app_pri_tbl, &p_feat->ets, 630 p_feat->pfc, ¶ms->local.params, false); 631 params->local.valid = true; 632 } 633 634 static void 635 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 636 { 637 struct dcbx_features *p_feat; 638 639 p_feat = &p_hwfn->p_dcbx_info->remote.features; 640 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 641 p_feat->app.app_pri_tbl, &p_feat->ets, 642 p_feat->pfc, ¶ms->remote.params, false); 643 params->remote.valid = true; 644 } 645 646 static void 647 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 648 struct qed_dcbx_get *params) 649 { 650 struct qed_dcbx_operational_params *p_operational; 651 struct qed_dcbx_results *p_results; 652 struct dcbx_features *p_feat; 653 bool enabled, err; 654 u32 flags; 655 bool val; 656 657 flags = p_hwfn->p_dcbx_info->operational.flags; 658 659 /* If DCBx version is non zero, then negotiation 660 * was successfuly performed 661 */ 662 p_operational = ¶ms->operational; 663 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 664 DCBX_CONFIG_VERSION_DISABLED); 665 if (!enabled) { 666 p_operational->enabled = enabled; 667 p_operational->valid = false; 668 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n"); 669 return; 670 } 671 672 p_feat = &p_hwfn->p_dcbx_info->operational.features; 673 p_results = &p_hwfn->p_dcbx_info->results; 674 675 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 676 DCBX_CONFIG_VERSION_IEEE); 677 p_operational->ieee = val; 678 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 679 DCBX_CONFIG_VERSION_CEE); 680 p_operational->cee = val; 681 682 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 683 DCBX_CONFIG_VERSION_STATIC); 684 p_operational->local = val; 685 686 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 687 "Version support: ieee %d, cee %d, static %d\n", 688 p_operational->ieee, p_operational->cee, 689 p_operational->local); 690 691 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 692 p_feat->app.app_pri_tbl, &p_feat->ets, 693 p_feat->pfc, ¶ms->operational.params, 694 p_operational->ieee); 695 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 696 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 697 p_operational->err = err; 698 p_operational->enabled = enabled; 699 p_operational->valid = true; 700 } 701 702 static void 703 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 704 struct qed_dcbx_get *params) 705 { 706 struct lldp_config_params_s *p_local; 707 708 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 709 710 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 711 sizeof(p_local->local_chassis_id)); 712 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 713 sizeof(p_local->local_port_id)); 714 } 715 716 static void 717 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 718 struct qed_dcbx_get *params) 719 { 720 struct lldp_status_params_s *p_remote; 721 722 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 723 724 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 725 sizeof(p_remote->peer_chassis_id)); 726 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 727 sizeof(p_remote->peer_port_id)); 728 } 729 730 static int 731 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params, 732 enum qed_mib_read_type type) 733 { 734 switch (type) { 735 case QED_DCBX_REMOTE_MIB: 736 qed_dcbx_get_remote_params(p_hwfn, p_params); 737 break; 738 case QED_DCBX_LOCAL_MIB: 739 qed_dcbx_get_local_params(p_hwfn, p_params); 740 break; 741 case QED_DCBX_OPERATIONAL_MIB: 742 qed_dcbx_get_operational_params(p_hwfn, p_params); 743 break; 744 case QED_DCBX_REMOTE_LLDP_MIB: 745 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params); 746 break; 747 case QED_DCBX_LOCAL_LLDP_MIB: 748 qed_dcbx_get_local_lldp_params(p_hwfn, p_params); 749 break; 750 default: 751 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 752 return -EINVAL; 753 } 754 755 return 0; 756 } 757 758 static int 759 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 760 { 761 struct qed_dcbx_mib_meta_data data; 762 int rc = 0; 763 764 memset(&data, 0, sizeof(data)); 765 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 766 lldp_config_params); 767 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 768 data.size = sizeof(struct lldp_config_params_s); 769 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 770 771 return rc; 772 } 773 774 static int 775 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 776 struct qed_ptt *p_ptt, 777 enum qed_mib_read_type type) 778 { 779 struct qed_dcbx_mib_meta_data data; 780 int rc = 0; 781 782 memset(&data, 0, sizeof(data)); 783 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 784 lldp_status_params); 785 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 786 data.size = sizeof(struct lldp_status_params_s); 787 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 788 789 return rc; 790 } 791 792 static int 793 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 794 struct qed_ptt *p_ptt, 795 enum qed_mib_read_type type) 796 { 797 struct qed_dcbx_mib_meta_data data; 798 int rc = 0; 799 800 memset(&data, 0, sizeof(data)); 801 data.addr = p_hwfn->mcp_info->port_addr + 802 offsetof(struct public_port, operational_dcbx_mib); 803 data.mib = &p_hwfn->p_dcbx_info->operational; 804 data.size = sizeof(struct dcbx_mib); 805 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 806 807 return rc; 808 } 809 810 static int 811 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 812 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 813 { 814 struct qed_dcbx_mib_meta_data data; 815 int rc = 0; 816 817 memset(&data, 0, sizeof(data)); 818 data.addr = p_hwfn->mcp_info->port_addr + 819 offsetof(struct public_port, remote_dcbx_mib); 820 data.mib = &p_hwfn->p_dcbx_info->remote; 821 data.size = sizeof(struct dcbx_mib); 822 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 823 824 return rc; 825 } 826 827 static int 828 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 829 { 830 struct qed_dcbx_mib_meta_data data; 831 int rc = 0; 832 833 memset(&data, 0, sizeof(data)); 834 data.addr = p_hwfn->mcp_info->port_addr + 835 offsetof(struct public_port, local_admin_dcbx_mib); 836 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 837 data.size = sizeof(struct dcbx_local_params); 838 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 839 840 return rc; 841 } 842 843 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 844 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 845 { 846 int rc = -EINVAL; 847 848 switch (type) { 849 case QED_DCBX_OPERATIONAL_MIB: 850 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 851 break; 852 case QED_DCBX_REMOTE_MIB: 853 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 854 break; 855 case QED_DCBX_LOCAL_MIB: 856 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 857 break; 858 case QED_DCBX_REMOTE_LLDP_MIB: 859 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 860 break; 861 case QED_DCBX_LOCAL_LLDP_MIB: 862 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 863 break; 864 default: 865 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 866 } 867 868 return rc; 869 } 870 871 static void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type) 872 { 873 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common; 874 void *cookie = hwfn->cdev->ops_cookie; 875 876 if (cookie && op->dcbx_aen) 877 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type); 878 } 879 880 /* Read updated MIB. 881 * Reconfigure QM and invoke PF update ramrod command if operational MIB 882 * change is detected. 883 */ 884 int 885 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 886 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 887 { 888 int rc = 0; 889 890 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 891 if (rc) 892 return rc; 893 894 if (type == QED_DCBX_OPERATIONAL_MIB) { 895 rc = qed_dcbx_process_mib_info(p_hwfn); 896 if (!rc) { 897 /* reconfigure tcs of QM queues according 898 * to negotiation results 899 */ 900 qed_qm_reconf(p_hwfn, p_ptt); 901 902 /* update storm FW with negotiation results */ 903 qed_sp_pf_update(p_hwfn); 904 905 /* for roce PFs, we may want to enable/disable DPM 906 * when DCBx change occurs 907 */ 908 if (p_hwfn->hw_info.personality == 909 QED_PCI_ETH_ROCE) 910 qed_roce_dpm_dcbx(p_hwfn, p_ptt); 911 } 912 } 913 914 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 915 916 if (type == QED_DCBX_OPERATIONAL_MIB) { 917 struct qed_dcbx_results *p_data; 918 u16 val; 919 920 /* Configure in NIG which protocols support EDPM and should 921 * honor PFC. 922 */ 923 p_data = &p_hwfn->p_dcbx_info->results; 924 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) | 925 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc); 926 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT; 927 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN; 928 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val); 929 } 930 931 qed_dcbx_aen(p_hwfn, type); 932 933 return rc; 934 } 935 936 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 937 { 938 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 939 if (!p_hwfn->p_dcbx_info) 940 return -ENOMEM; 941 942 return 0; 943 } 944 945 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn) 946 { 947 kfree(p_hwfn->p_dcbx_info); 948 p_hwfn->p_dcbx_info = NULL; 949 } 950 951 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 952 struct qed_dcbx_results *p_src, 953 enum dcbx_protocol_type type) 954 { 955 p_data->dcb_enable_flag = p_src->arr[type].enable; 956 p_data->dcb_priority = p_src->arr[type].priority; 957 p_data->dcb_tc = p_src->arr[type].tc; 958 } 959 960 /* Set pf update ramrod command params */ 961 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 962 struct pf_update_ramrod_data *p_dest) 963 { 964 struct protocol_dcb_data *p_dcb_data; 965 u8 update_flag; 966 967 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 968 p_dest->update_fcoe_dcb_data_mode = update_flag; 969 970 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 971 p_dest->update_roce_dcb_data_mode = update_flag; 972 973 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 974 p_dest->update_rroce_dcb_data_mode = update_flag; 975 976 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 977 p_dest->update_iscsi_dcb_data_mode = update_flag; 978 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 979 p_dest->update_eth_dcb_data_mode = update_flag; 980 981 p_dcb_data = &p_dest->fcoe_dcb_data; 982 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 983 p_dcb_data = &p_dest->roce_dcb_data; 984 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE); 985 p_dcb_data = &p_dest->rroce_dcb_data; 986 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2); 987 p_dcb_data = &p_dest->iscsi_dcb_data; 988 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 989 p_dcb_data = &p_dest->eth_dcb_data; 990 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 991 } 992 993 u8 qed_dcbx_get_priority_tc(struct qed_hwfn *p_hwfn, u8 pri) 994 { 995 struct qed_dcbx_get *dcbx_info = &p_hwfn->p_dcbx_info->get; 996 997 if (pri >= QED_MAX_PFC_PRIORITIES) { 998 DP_ERR(p_hwfn, "Invalid priority %d\n", pri); 999 return QED_DCBX_DEFAULT_TC; 1000 } 1001 1002 if (!dcbx_info->operational.valid) { 1003 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 1004 "Dcbx parameters not available\n"); 1005 return QED_DCBX_DEFAULT_TC; 1006 } 1007 1008 return dcbx_info->operational.params.ets_pri_tc_tbl[pri]; 1009 } 1010 1011 #ifdef CONFIG_DCB 1012 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 1013 struct qed_dcbx_get *p_get, 1014 enum qed_mib_read_type type) 1015 { 1016 struct qed_ptt *p_ptt; 1017 int rc; 1018 1019 if (IS_VF(p_hwfn->cdev)) 1020 return -EINVAL; 1021 1022 p_ptt = qed_ptt_acquire(p_hwfn); 1023 if (!p_ptt) 1024 return -EBUSY; 1025 1026 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 1027 if (rc) 1028 goto out; 1029 1030 rc = qed_dcbx_get_params(p_hwfn, p_get, type); 1031 1032 out: 1033 qed_ptt_release(p_hwfn, p_ptt); 1034 return rc; 1035 } 1036 1037 static void 1038 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 1039 u32 *pfc, struct qed_dcbx_params *p_params) 1040 { 1041 u8 pfc_map = 0; 1042 int i; 1043 1044 *pfc &= ~DCBX_PFC_ERROR_MASK; 1045 1046 if (p_params->pfc.willing) 1047 *pfc |= DCBX_PFC_WILLING_MASK; 1048 else 1049 *pfc &= ~DCBX_PFC_WILLING_MASK; 1050 1051 if (p_params->pfc.enabled) 1052 *pfc |= DCBX_PFC_ENABLED_MASK; 1053 else 1054 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1055 1056 *pfc &= ~DCBX_PFC_CAPS_MASK; 1057 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 1058 1059 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1060 if (p_params->pfc.prio[i]) 1061 pfc_map |= BIT(i); 1062 1063 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1064 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 1065 1066 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 1067 } 1068 1069 static void 1070 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 1071 struct dcbx_ets_feature *p_ets, 1072 struct qed_dcbx_params *p_params) 1073 { 1074 u8 *bw_map, *tsa_map; 1075 u32 val; 1076 int i; 1077 1078 if (p_params->ets_willing) 1079 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1080 else 1081 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1082 1083 if (p_params->ets_cbs) 1084 p_ets->flags |= DCBX_ETS_CBS_MASK; 1085 else 1086 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1087 1088 if (p_params->ets_enabled) 1089 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1090 else 1091 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1092 1093 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1094 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1095 1096 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1097 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1098 p_ets->pri_tc_tbl[0] = 0; 1099 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1100 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1101 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1102 /* Copy the priority value to the corresponding 4 bits in the 1103 * traffic class table. 1104 */ 1105 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1106 p_ets->pri_tc_tbl[0] |= val; 1107 } 1108 for (i = 0; i < 2; i++) { 1109 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1110 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1111 } 1112 } 1113 1114 static void 1115 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1116 struct dcbx_app_priority_feature *p_app, 1117 struct qed_dcbx_params *p_params, bool ieee) 1118 { 1119 u32 *entry; 1120 int i; 1121 1122 if (p_params->app_willing) 1123 p_app->flags |= DCBX_APP_WILLING_MASK; 1124 else 1125 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1126 1127 if (p_params->app_valid) 1128 p_app->flags |= DCBX_APP_ENABLED_MASK; 1129 else 1130 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1131 1132 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1133 p_app->flags |= (u32)p_params->num_app_entries << 1134 DCBX_APP_NUM_ENTRIES_SHIFT; 1135 1136 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1137 entry = &p_app->app_pri_tbl[i].entry; 1138 *entry = 0; 1139 if (ieee) { 1140 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1141 switch (p_params->app_entry[i].sf_ieee) { 1142 case QED_DCBX_SF_IEEE_ETHTYPE: 1143 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1144 DCBX_APP_SF_IEEE_SHIFT); 1145 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1146 DCBX_APP_SF_SHIFT); 1147 break; 1148 case QED_DCBX_SF_IEEE_TCP_PORT: 1149 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1150 DCBX_APP_SF_IEEE_SHIFT); 1151 *entry |= ((u32)DCBX_APP_SF_PORT << 1152 DCBX_APP_SF_SHIFT); 1153 break; 1154 case QED_DCBX_SF_IEEE_UDP_PORT: 1155 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1156 DCBX_APP_SF_IEEE_SHIFT); 1157 *entry |= ((u32)DCBX_APP_SF_PORT << 1158 DCBX_APP_SF_SHIFT); 1159 break; 1160 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1161 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1162 DCBX_APP_SF_IEEE_SHIFT); 1163 *entry |= ((u32)DCBX_APP_SF_PORT << 1164 DCBX_APP_SF_SHIFT); 1165 break; 1166 } 1167 } else { 1168 *entry &= ~DCBX_APP_SF_MASK; 1169 if (p_params->app_entry[i].ethtype) 1170 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1171 DCBX_APP_SF_SHIFT); 1172 else 1173 *entry |= ((u32)DCBX_APP_SF_PORT << 1174 DCBX_APP_SF_SHIFT); 1175 } 1176 1177 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1178 *entry |= ((u32)p_params->app_entry[i].proto_id << 1179 DCBX_APP_PROTOCOL_ID_SHIFT); 1180 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1181 *entry |= ((u32)(p_params->app_entry[i].prio) << 1182 DCBX_APP_PRI_MAP_SHIFT); 1183 } 1184 } 1185 1186 static void 1187 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1188 struct dcbx_local_params *local_admin, 1189 struct qed_dcbx_set *params) 1190 { 1191 bool ieee = false; 1192 1193 local_admin->flags = 0; 1194 memcpy(&local_admin->features, 1195 &p_hwfn->p_dcbx_info->operational.features, 1196 sizeof(local_admin->features)); 1197 1198 if (params->enabled) { 1199 local_admin->config = params->ver_num; 1200 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1201 } else { 1202 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1203 } 1204 1205 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n", 1206 local_admin->config); 1207 1208 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1209 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1210 ¶ms->config.params); 1211 1212 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1213 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1214 ¶ms->config.params); 1215 1216 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1217 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1218 ¶ms->config.params, ieee); 1219 } 1220 1221 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1222 struct qed_dcbx_set *params, bool hw_commit) 1223 { 1224 struct dcbx_local_params local_admin; 1225 struct qed_dcbx_mib_meta_data data; 1226 u32 resp = 0, param = 0; 1227 int rc = 0; 1228 1229 if (!hw_commit) { 1230 memcpy(&p_hwfn->p_dcbx_info->set, params, 1231 sizeof(struct qed_dcbx_set)); 1232 return 0; 1233 } 1234 1235 /* clear set-parmas cache */ 1236 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1237 1238 memset(&local_admin, 0, sizeof(local_admin)); 1239 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1240 1241 data.addr = p_hwfn->mcp_info->port_addr + 1242 offsetof(struct public_port, local_admin_dcbx_mib); 1243 data.local_admin = &local_admin; 1244 data.size = sizeof(struct dcbx_local_params); 1245 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1246 1247 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1248 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1249 if (rc) 1250 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1251 1252 return rc; 1253 } 1254 1255 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1256 struct qed_dcbx_set *params) 1257 { 1258 struct qed_dcbx_get *dcbx_info; 1259 int rc; 1260 1261 if (p_hwfn->p_dcbx_info->set.config.valid) { 1262 memcpy(params, &p_hwfn->p_dcbx_info->set, 1263 sizeof(struct qed_dcbx_set)); 1264 return 0; 1265 } 1266 1267 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1268 if (!dcbx_info) 1269 return -ENOMEM; 1270 1271 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1272 if (rc) { 1273 kfree(dcbx_info); 1274 return rc; 1275 } 1276 1277 p_hwfn->p_dcbx_info->set.override_flags = 0; 1278 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1279 if (dcbx_info->operational.cee) 1280 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1281 if (dcbx_info->operational.ieee) 1282 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1283 if (dcbx_info->operational.local) 1284 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1285 1286 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1287 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1288 &dcbx_info->operational.params, 1289 sizeof(struct qed_dcbx_admin_params)); 1290 p_hwfn->p_dcbx_info->set.config.valid = true; 1291 1292 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1293 1294 kfree(dcbx_info); 1295 1296 return 0; 1297 } 1298 1299 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1300 enum qed_mib_read_type type) 1301 { 1302 struct qed_dcbx_get *dcbx_info; 1303 1304 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_ATOMIC); 1305 if (!dcbx_info) 1306 return NULL; 1307 1308 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1309 kfree(dcbx_info); 1310 return NULL; 1311 } 1312 1313 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1314 !dcbx_info->operational.enabled) { 1315 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1316 kfree(dcbx_info); 1317 return NULL; 1318 } 1319 1320 return dcbx_info; 1321 } 1322 1323 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1324 { 1325 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1326 struct qed_dcbx_get *dcbx_info; 1327 bool enabled; 1328 1329 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1330 if (!dcbx_info) 1331 return 0; 1332 1333 enabled = dcbx_info->operational.enabled; 1334 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1335 kfree(dcbx_info); 1336 1337 return enabled; 1338 } 1339 1340 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1341 { 1342 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1343 struct qed_dcbx_set dcbx_set; 1344 struct qed_ptt *ptt; 1345 int rc; 1346 1347 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1348 1349 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1350 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1351 if (rc) 1352 return 1; 1353 1354 dcbx_set.enabled = !!state; 1355 1356 ptt = qed_ptt_acquire(hwfn); 1357 if (!ptt) 1358 return 1; 1359 1360 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1361 1362 qed_ptt_release(hwfn, ptt); 1363 1364 return rc ? 1 : 0; 1365 } 1366 1367 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1368 u8 *pgid, u8 *bw_pct, u8 *up_map) 1369 { 1370 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1371 struct qed_dcbx_get *dcbx_info; 1372 1373 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1374 *prio_type = *pgid = *bw_pct = *up_map = 0; 1375 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1376 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1377 return; 1378 } 1379 1380 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1381 if (!dcbx_info) 1382 return; 1383 1384 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1385 kfree(dcbx_info); 1386 } 1387 1388 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1389 { 1390 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1391 struct qed_dcbx_get *dcbx_info; 1392 1393 *bw_pct = 0; 1394 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1395 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1396 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1397 return; 1398 } 1399 1400 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1401 if (!dcbx_info) 1402 return; 1403 1404 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1405 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1406 kfree(dcbx_info); 1407 } 1408 1409 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1410 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1411 { 1412 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1413 *prio = *bwg_id = *bw_pct = *up_map = 0; 1414 } 1415 1416 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1417 int bwg_id, u8 *bw_pct) 1418 { 1419 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1420 *bw_pct = 0; 1421 } 1422 1423 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1424 int priority, u8 *setting) 1425 { 1426 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1427 struct qed_dcbx_get *dcbx_info; 1428 1429 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1430 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1431 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1432 return; 1433 } 1434 1435 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1436 if (!dcbx_info) 1437 return; 1438 1439 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1440 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1441 kfree(dcbx_info); 1442 } 1443 1444 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1445 { 1446 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1447 struct qed_dcbx_set dcbx_set; 1448 struct qed_ptt *ptt; 1449 int rc; 1450 1451 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1452 priority, setting); 1453 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1454 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1455 return; 1456 } 1457 1458 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1459 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1460 if (rc) 1461 return; 1462 1463 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1464 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1465 1466 ptt = qed_ptt_acquire(hwfn); 1467 if (!ptt) 1468 return; 1469 1470 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1471 1472 qed_ptt_release(hwfn, ptt); 1473 } 1474 1475 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1476 { 1477 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1478 struct qed_dcbx_get *dcbx_info; 1479 int rc = 0; 1480 1481 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1482 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1483 if (!dcbx_info) 1484 return 1; 1485 1486 switch (capid) { 1487 case DCB_CAP_ATTR_PG: 1488 case DCB_CAP_ATTR_PFC: 1489 case DCB_CAP_ATTR_UP2TC: 1490 case DCB_CAP_ATTR_GSP: 1491 *cap = true; 1492 break; 1493 case DCB_CAP_ATTR_PG_TCS: 1494 case DCB_CAP_ATTR_PFC_TCS: 1495 *cap = 0x80; 1496 break; 1497 case DCB_CAP_ATTR_DCBX: 1498 *cap = (DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_VER_IEEE | 1499 DCB_CAP_DCBX_STATIC); 1500 break; 1501 default: 1502 *cap = false; 1503 rc = 1; 1504 } 1505 1506 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1507 kfree(dcbx_info); 1508 1509 return rc; 1510 } 1511 1512 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1513 { 1514 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1515 struct qed_dcbx_get *dcbx_info; 1516 int rc = 0; 1517 1518 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1519 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1520 if (!dcbx_info) 1521 return -EINVAL; 1522 1523 switch (tcid) { 1524 case DCB_NUMTCS_ATTR_PG: 1525 *num = dcbx_info->operational.params.max_ets_tc; 1526 break; 1527 case DCB_NUMTCS_ATTR_PFC: 1528 *num = dcbx_info->operational.params.pfc.max_tc; 1529 break; 1530 default: 1531 rc = -EINVAL; 1532 } 1533 1534 kfree(dcbx_info); 1535 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1536 1537 return rc; 1538 } 1539 1540 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1541 { 1542 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1543 struct qed_dcbx_get *dcbx_info; 1544 bool enabled; 1545 1546 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1547 if (!dcbx_info) 1548 return 0; 1549 1550 enabled = dcbx_info->operational.params.pfc.enabled; 1551 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1552 kfree(dcbx_info); 1553 1554 return enabled; 1555 } 1556 1557 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1558 { 1559 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1560 struct qed_dcbx_get *dcbx_info; 1561 u8 mode = 0; 1562 1563 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1564 if (!dcbx_info) 1565 return 0; 1566 1567 if (dcbx_info->operational.ieee) 1568 mode |= DCB_CAP_DCBX_VER_IEEE; 1569 if (dcbx_info->operational.cee) 1570 mode |= DCB_CAP_DCBX_VER_CEE; 1571 if (dcbx_info->operational.local) 1572 mode |= DCB_CAP_DCBX_STATIC; 1573 1574 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1575 kfree(dcbx_info); 1576 1577 return mode; 1578 } 1579 1580 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1581 int tc, 1582 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1583 { 1584 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1585 struct qed_dcbx_set dcbx_set; 1586 struct qed_ptt *ptt; 1587 int rc; 1588 1589 DP_VERBOSE(hwfn, QED_MSG_DCB, 1590 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1591 tc, pri_type, pgid, bw_pct, up_map); 1592 1593 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1594 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1595 return; 1596 } 1597 1598 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1599 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1600 if (rc) 1601 return; 1602 1603 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1604 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1605 1606 ptt = qed_ptt_acquire(hwfn); 1607 if (!ptt) 1608 return; 1609 1610 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1611 1612 qed_ptt_release(hwfn, ptt); 1613 } 1614 1615 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1616 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1617 { 1618 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1619 } 1620 1621 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1622 { 1623 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1624 struct qed_dcbx_set dcbx_set; 1625 struct qed_ptt *ptt; 1626 int rc; 1627 1628 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1629 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1630 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1631 return; 1632 } 1633 1634 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1635 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1636 if (rc) 1637 return; 1638 1639 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1640 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1641 1642 ptt = qed_ptt_acquire(hwfn); 1643 if (!ptt) 1644 return; 1645 1646 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1647 1648 qed_ptt_release(hwfn, ptt); 1649 } 1650 1651 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1652 { 1653 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1654 } 1655 1656 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1657 { 1658 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1659 struct qed_dcbx_set dcbx_set; 1660 struct qed_ptt *ptt; 1661 int rc; 1662 1663 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1664 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1665 if (rc) 1666 return 1; 1667 1668 ptt = qed_ptt_acquire(hwfn); 1669 if (!ptt) 1670 return 1; 1671 1672 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1673 1674 qed_ptt_release(hwfn, ptt); 1675 1676 return rc; 1677 } 1678 1679 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1680 { 1681 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1682 struct qed_dcbx_set dcbx_set; 1683 struct qed_ptt *ptt; 1684 int rc; 1685 1686 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1687 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1688 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1689 if (rc) 1690 return 1; 1691 1692 switch (tcid) { 1693 case DCB_NUMTCS_ATTR_PG: 1694 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1695 dcbx_set.config.params.max_ets_tc = num; 1696 break; 1697 case DCB_NUMTCS_ATTR_PFC: 1698 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1699 dcbx_set.config.params.pfc.max_tc = num; 1700 break; 1701 default: 1702 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1703 return -EINVAL; 1704 } 1705 1706 ptt = qed_ptt_acquire(hwfn); 1707 if (!ptt) 1708 return -EINVAL; 1709 1710 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1711 1712 qed_ptt_release(hwfn, ptt); 1713 1714 return 0; 1715 } 1716 1717 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1718 { 1719 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1720 struct qed_dcbx_set dcbx_set; 1721 struct qed_ptt *ptt; 1722 int rc; 1723 1724 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1725 1726 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1727 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1728 if (rc) 1729 return; 1730 1731 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1732 dcbx_set.config.params.pfc.enabled = !!state; 1733 1734 ptt = qed_ptt_acquire(hwfn); 1735 if (!ptt) 1736 return; 1737 1738 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1739 1740 qed_ptt_release(hwfn, ptt); 1741 } 1742 1743 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1744 { 1745 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1746 struct qed_dcbx_get *dcbx_info; 1747 struct qed_app_entry *entry; 1748 bool ethtype; 1749 u8 prio = 0; 1750 int i; 1751 1752 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1753 if (!dcbx_info) 1754 return -EINVAL; 1755 1756 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1757 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1758 entry = &dcbx_info->operational.params.app_entry[i]; 1759 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1760 prio = entry->prio; 1761 break; 1762 } 1763 } 1764 1765 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1766 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1767 kfree(dcbx_info); 1768 return -EINVAL; 1769 } 1770 1771 kfree(dcbx_info); 1772 1773 return prio; 1774 } 1775 1776 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1777 u8 idtype, u16 idval, u8 pri_map) 1778 { 1779 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1780 struct qed_dcbx_set dcbx_set; 1781 struct qed_app_entry *entry; 1782 struct qed_ptt *ptt; 1783 bool ethtype; 1784 int rc, i; 1785 1786 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1787 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1788 if (rc) 1789 return -EINVAL; 1790 1791 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1792 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1793 entry = &dcbx_set.config.params.app_entry[i]; 1794 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1795 break; 1796 /* First empty slot */ 1797 if (!entry->proto_id) { 1798 dcbx_set.config.params.num_app_entries++; 1799 break; 1800 } 1801 } 1802 1803 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1804 DP_ERR(cdev, "App table is full\n"); 1805 return -EBUSY; 1806 } 1807 1808 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1809 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1810 dcbx_set.config.params.app_entry[i].proto_id = idval; 1811 dcbx_set.config.params.app_entry[i].prio = pri_map; 1812 1813 ptt = qed_ptt_acquire(hwfn); 1814 if (!ptt) 1815 return -EBUSY; 1816 1817 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1818 1819 qed_ptt_release(hwfn, ptt); 1820 1821 return rc; 1822 } 1823 1824 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1825 { 1826 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1827 struct qed_dcbx_set dcbx_set; 1828 struct qed_ptt *ptt; 1829 int rc; 1830 1831 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1832 1833 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && 1834 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) { 1835 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n"); 1836 return 1; 1837 } 1838 1839 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1840 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1841 if (rc) 1842 return 1; 1843 1844 dcbx_set.ver_num = 0; 1845 if (mode & DCB_CAP_DCBX_VER_CEE) { 1846 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1847 dcbx_set.enabled = true; 1848 } 1849 1850 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1851 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1852 dcbx_set.enabled = true; 1853 } 1854 1855 if (mode & DCB_CAP_DCBX_STATIC) { 1856 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1857 dcbx_set.enabled = true; 1858 } 1859 1860 ptt = qed_ptt_acquire(hwfn); 1861 if (!ptt) 1862 return 1; 1863 1864 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1865 1866 qed_ptt_release(hwfn, ptt); 1867 1868 return rc; 1869 } 1870 1871 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1872 { 1873 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1874 struct qed_dcbx_get *dcbx_info; 1875 1876 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1877 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1878 if (!dcbx_info) 1879 return 1; 1880 1881 *flags = 0; 1882 switch (featid) { 1883 case DCB_FEATCFG_ATTR_PG: 1884 if (dcbx_info->operational.params.ets_enabled) 1885 *flags = DCB_FEATCFG_ENABLE; 1886 else 1887 *flags = DCB_FEATCFG_ERROR; 1888 break; 1889 case DCB_FEATCFG_ATTR_PFC: 1890 if (dcbx_info->operational.params.pfc.enabled) 1891 *flags = DCB_FEATCFG_ENABLE; 1892 else 1893 *flags = DCB_FEATCFG_ERROR; 1894 break; 1895 case DCB_FEATCFG_ATTR_APP: 1896 if (dcbx_info->operational.params.app_valid) 1897 *flags = DCB_FEATCFG_ENABLE; 1898 else 1899 *flags = DCB_FEATCFG_ERROR; 1900 break; 1901 default: 1902 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1903 kfree(dcbx_info); 1904 return 1; 1905 } 1906 1907 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1908 kfree(dcbx_info); 1909 1910 return 0; 1911 } 1912 1913 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1914 { 1915 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1916 struct qed_dcbx_set dcbx_set; 1917 bool enabled, willing; 1918 struct qed_ptt *ptt; 1919 int rc; 1920 1921 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1922 featid, flags); 1923 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1924 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1925 if (rc) 1926 return 1; 1927 1928 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1929 willing = !!(flags & DCB_FEATCFG_WILLING); 1930 switch (featid) { 1931 case DCB_FEATCFG_ATTR_PG: 1932 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1933 dcbx_set.config.params.ets_enabled = enabled; 1934 dcbx_set.config.params.ets_willing = willing; 1935 break; 1936 case DCB_FEATCFG_ATTR_PFC: 1937 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1938 dcbx_set.config.params.pfc.enabled = enabled; 1939 dcbx_set.config.params.pfc.willing = willing; 1940 break; 1941 case DCB_FEATCFG_ATTR_APP: 1942 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1943 dcbx_set.config.params.app_willing = willing; 1944 break; 1945 default: 1946 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1947 return 1; 1948 } 1949 1950 ptt = qed_ptt_acquire(hwfn); 1951 if (!ptt) 1952 return 1; 1953 1954 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1955 1956 qed_ptt_release(hwfn, ptt); 1957 1958 return 0; 1959 } 1960 1961 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1962 struct dcb_peer_app_info *info, 1963 u16 *app_count) 1964 { 1965 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1966 struct qed_dcbx_get *dcbx_info; 1967 1968 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1969 if (!dcbx_info) 1970 return -EINVAL; 1971 1972 info->willing = dcbx_info->remote.params.app_willing; 1973 info->error = dcbx_info->remote.params.app_error; 1974 *app_count = dcbx_info->remote.params.num_app_entries; 1975 kfree(dcbx_info); 1976 1977 return 0; 1978 } 1979 1980 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1981 struct dcb_app *table) 1982 { 1983 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1984 struct qed_dcbx_get *dcbx_info; 1985 int i; 1986 1987 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1988 if (!dcbx_info) 1989 return -EINVAL; 1990 1991 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 1992 if (dcbx_info->remote.params.app_entry[i].ethtype) 1993 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 1994 else 1995 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 1996 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 1997 table[i].protocol = 1998 dcbx_info->remote.params.app_entry[i].proto_id; 1999 } 2000 2001 kfree(dcbx_info); 2002 2003 return 0; 2004 } 2005 2006 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 2007 { 2008 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2009 struct qed_dcbx_get *dcbx_info; 2010 int i; 2011 2012 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2013 if (!dcbx_info) 2014 return -EINVAL; 2015 2016 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2017 if (dcbx_info->remote.params.pfc.prio[i]) 2018 pfc->pfc_en |= BIT(i); 2019 2020 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 2021 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 2022 pfc->pfc_en, pfc->tcs_supported); 2023 kfree(dcbx_info); 2024 2025 return 0; 2026 } 2027 2028 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 2029 { 2030 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2031 struct qed_dcbx_get *dcbx_info; 2032 int i; 2033 2034 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2035 if (!dcbx_info) 2036 return -EINVAL; 2037 2038 pg->willing = dcbx_info->remote.params.ets_willing; 2039 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 2040 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 2041 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 2042 } 2043 2044 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 2045 kfree(dcbx_info); 2046 2047 return 0; 2048 } 2049 2050 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 2051 struct ieee_pfc *pfc, bool remote) 2052 { 2053 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2054 struct qed_dcbx_params *params; 2055 struct qed_dcbx_get *dcbx_info; 2056 int rc, i; 2057 2058 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2059 if (!dcbx_info) 2060 return -EINVAL; 2061 2062 if (!dcbx_info->operational.ieee) { 2063 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2064 kfree(dcbx_info); 2065 return -EINVAL; 2066 } 2067 2068 if (remote) { 2069 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2070 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2071 QED_DCBX_REMOTE_MIB); 2072 if (rc) { 2073 kfree(dcbx_info); 2074 return -EINVAL; 2075 } 2076 2077 params = &dcbx_info->remote.params; 2078 } else { 2079 params = &dcbx_info->operational.params; 2080 } 2081 2082 pfc->pfc_cap = params->pfc.max_tc; 2083 pfc->pfc_en = 0; 2084 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2085 if (params->pfc.prio[i]) 2086 pfc->pfc_en |= BIT(i); 2087 2088 kfree(dcbx_info); 2089 2090 return 0; 2091 } 2092 2093 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2094 { 2095 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2096 } 2097 2098 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2099 { 2100 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2101 struct qed_dcbx_get *dcbx_info; 2102 struct qed_dcbx_set dcbx_set; 2103 struct qed_ptt *ptt; 2104 int rc, i; 2105 2106 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2107 if (!dcbx_info) 2108 return -EINVAL; 2109 2110 if (!dcbx_info->operational.ieee) { 2111 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2112 kfree(dcbx_info); 2113 return -EINVAL; 2114 } 2115 2116 kfree(dcbx_info); 2117 2118 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2119 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2120 if (rc) 2121 return -EINVAL; 2122 2123 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2124 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2125 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2126 2127 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap; 2128 2129 ptt = qed_ptt_acquire(hwfn); 2130 if (!ptt) 2131 return -EINVAL; 2132 2133 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2134 2135 qed_ptt_release(hwfn, ptt); 2136 2137 return rc; 2138 } 2139 2140 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2141 struct ieee_ets *ets, bool remote) 2142 { 2143 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2144 struct qed_dcbx_get *dcbx_info; 2145 struct qed_dcbx_params *params; 2146 int rc; 2147 2148 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2149 if (!dcbx_info) 2150 return -EINVAL; 2151 2152 if (!dcbx_info->operational.ieee) { 2153 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2154 kfree(dcbx_info); 2155 return -EINVAL; 2156 } 2157 2158 if (remote) { 2159 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2160 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2161 QED_DCBX_REMOTE_MIB); 2162 if (rc) { 2163 kfree(dcbx_info); 2164 return -EINVAL; 2165 } 2166 2167 params = &dcbx_info->remote.params; 2168 } else { 2169 params = &dcbx_info->operational.params; 2170 } 2171 2172 ets->ets_cap = params->max_ets_tc; 2173 ets->willing = params->ets_willing; 2174 ets->cbs = params->ets_cbs; 2175 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2176 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2177 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2178 kfree(dcbx_info); 2179 2180 return 0; 2181 } 2182 2183 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2184 { 2185 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2186 } 2187 2188 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2189 { 2190 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2191 struct qed_dcbx_get *dcbx_info; 2192 struct qed_dcbx_set dcbx_set; 2193 struct qed_ptt *ptt; 2194 int rc; 2195 2196 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2197 if (!dcbx_info) 2198 return -EINVAL; 2199 2200 if (!dcbx_info->operational.ieee) { 2201 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2202 kfree(dcbx_info); 2203 return -EINVAL; 2204 } 2205 2206 kfree(dcbx_info); 2207 2208 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2209 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2210 if (rc) 2211 return -EINVAL; 2212 2213 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2214 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2215 dcbx_set.config.params.ets_willing = ets->willing; 2216 dcbx_set.config.params.ets_cbs = ets->cbs; 2217 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2218 sizeof(ets->tc_tx_bw)); 2219 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2220 sizeof(ets->tc_tsa)); 2221 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2222 sizeof(ets->prio_tc)); 2223 2224 ptt = qed_ptt_acquire(hwfn); 2225 if (!ptt) 2226 return -EINVAL; 2227 2228 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2229 2230 qed_ptt_release(hwfn, ptt); 2231 2232 return rc; 2233 } 2234 2235 static int 2236 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2237 { 2238 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2239 } 2240 2241 static int 2242 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2243 { 2244 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2245 } 2246 2247 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee) 2248 { 2249 switch (selector) { 2250 case IEEE_8021QAZ_APP_SEL_ETHERTYPE: 2251 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 2252 break; 2253 case IEEE_8021QAZ_APP_SEL_STREAM: 2254 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 2255 break; 2256 case IEEE_8021QAZ_APP_SEL_DGRAM: 2257 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 2258 break; 2259 case IEEE_8021QAZ_APP_SEL_ANY: 2260 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 2261 break; 2262 default: 2263 return -EINVAL; 2264 } 2265 2266 return 0; 2267 } 2268 2269 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2270 { 2271 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2272 struct qed_dcbx_get *dcbx_info; 2273 struct qed_app_entry *entry; 2274 u8 prio = 0; 2275 u8 sf_ieee; 2276 int i; 2277 2278 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n", 2279 app->selector, app->protocol); 2280 2281 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2282 DP_INFO(cdev, "Invalid selector field value %d\n", 2283 app->selector); 2284 return -EINVAL; 2285 } 2286 2287 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2288 if (!dcbx_info) 2289 return -EINVAL; 2290 2291 if (!dcbx_info->operational.ieee) { 2292 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2293 kfree(dcbx_info); 2294 return -EINVAL; 2295 } 2296 2297 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2298 entry = &dcbx_info->operational.params.app_entry[i]; 2299 if ((entry->sf_ieee == sf_ieee) && 2300 (entry->proto_id == app->protocol)) { 2301 prio = entry->prio; 2302 break; 2303 } 2304 } 2305 2306 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2307 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2308 app->protocol); 2309 kfree(dcbx_info); 2310 return -EINVAL; 2311 } 2312 2313 app->priority = ffs(prio) - 1; 2314 2315 kfree(dcbx_info); 2316 2317 return 0; 2318 } 2319 2320 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2321 { 2322 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2323 struct qed_dcbx_get *dcbx_info; 2324 struct qed_dcbx_set dcbx_set; 2325 struct qed_app_entry *entry; 2326 struct qed_ptt *ptt; 2327 u8 sf_ieee; 2328 int rc, i; 2329 2330 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n", 2331 app->selector, app->protocol, app->priority); 2332 if (app->priority >= QED_MAX_PFC_PRIORITIES) { 2333 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2334 return -EINVAL; 2335 } 2336 2337 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2338 DP_INFO(cdev, "Invalid selector field value %d\n", 2339 app->selector); 2340 return -EINVAL; 2341 } 2342 2343 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2344 if (!dcbx_info) 2345 return -EINVAL; 2346 2347 if (!dcbx_info->operational.ieee) { 2348 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2349 kfree(dcbx_info); 2350 return -EINVAL; 2351 } 2352 2353 kfree(dcbx_info); 2354 2355 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2356 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2357 if (rc) 2358 return -EINVAL; 2359 2360 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2361 entry = &dcbx_set.config.params.app_entry[i]; 2362 if ((entry->sf_ieee == sf_ieee) && 2363 (entry->proto_id == app->protocol)) 2364 break; 2365 /* First empty slot */ 2366 if (!entry->proto_id) { 2367 dcbx_set.config.params.num_app_entries++; 2368 break; 2369 } 2370 } 2371 2372 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2373 DP_ERR(cdev, "App table is full\n"); 2374 return -EBUSY; 2375 } 2376 2377 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2378 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee; 2379 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2380 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2381 2382 ptt = qed_ptt_acquire(hwfn); 2383 if (!ptt) 2384 return -EBUSY; 2385 2386 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2387 2388 qed_ptt_release(hwfn, ptt); 2389 2390 return rc; 2391 } 2392 2393 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2394 .getstate = qed_dcbnl_getstate, 2395 .setstate = qed_dcbnl_setstate, 2396 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2397 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2398 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2399 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2400 .getpfccfg = qed_dcbnl_getpfccfg, 2401 .setpfccfg = qed_dcbnl_setpfccfg, 2402 .getcap = qed_dcbnl_getcap, 2403 .getnumtcs = qed_dcbnl_getnumtcs, 2404 .getpfcstate = qed_dcbnl_getpfcstate, 2405 .getdcbx = qed_dcbnl_getdcbx, 2406 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2407 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2408 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2409 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2410 .setall = qed_dcbnl_setall, 2411 .setnumtcs = qed_dcbnl_setnumtcs, 2412 .setpfcstate = qed_dcbnl_setpfcstate, 2413 .setapp = qed_dcbnl_setapp, 2414 .setdcbx = qed_dcbnl_setdcbx, 2415 .setfeatcfg = qed_dcbnl_setfeatcfg, 2416 .getfeatcfg = qed_dcbnl_getfeatcfg, 2417 .getapp = qed_dcbnl_getapp, 2418 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2419 .peer_getapptable = qed_dcbnl_peer_getapptable, 2420 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2421 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2422 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2423 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2424 .ieee_getets = qed_dcbnl_ieee_getets, 2425 .ieee_setets = qed_dcbnl_ieee_setets, 2426 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2427 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2428 .ieee_getapp = qed_dcbnl_ieee_getapp, 2429 .ieee_setapp = qed_dcbnl_ieee_setapp, 2430 }; 2431 2432 #endif 2433