1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/bitops.h> 36 #include <linux/dcbnl.h> 37 #include <linux/errno.h> 38 #include <linux/kernel.h> 39 #include <linux/slab.h> 40 #include <linux/string.h> 41 #include "qed.h" 42 #include "qed_cxt.h" 43 #include "qed_dcbx.h" 44 #include "qed_hsi.h" 45 #include "qed_sp.h" 46 #include "qed_sriov.h" 47 #include "qed_rdma.h" 48 #ifdef CONFIG_DCB 49 #include <linux/qed/qed_eth_if.h> 50 #endif 51 52 #define QED_DCBX_MAX_MIB_READ_TRY (100) 53 #define QED_ETH_TYPE_DEFAULT (0) 54 #define QED_ETH_TYPE_ROCE (0x8915) 55 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 56 #define QED_ETH_TYPE_FCOE (0x8906) 57 #define QED_TCP_PORT_ISCSI (0xCBC) 58 59 #define QED_DCBX_INVALID_PRIORITY 0xFF 60 61 /* Get Traffic Class from priority traffic class table, 4 bits represent 62 * the traffic class corresponding to the priority. 63 */ 64 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 65 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 66 67 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 68 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI}, 69 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE}, 70 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE}, 71 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE}, 72 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}, 73 }; 74 75 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 76 { 77 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 78 DCBX_APP_SF_ETHTYPE); 79 } 80 81 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 82 { 83 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 84 85 /* Old MFW */ 86 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 87 return qed_dcbx_app_ethtype(app_info_bitmap); 88 89 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 90 } 91 92 static bool qed_dcbx_app_port(u32 app_info_bitmap) 93 { 94 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 95 DCBX_APP_SF_PORT); 96 } 97 98 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 99 { 100 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 101 102 /* Old MFW */ 103 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 104 return qed_dcbx_app_port(app_info_bitmap); 105 106 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 107 } 108 109 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 110 { 111 bool ethtype; 112 113 if (ieee) 114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 115 else 116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 117 118 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 119 } 120 121 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 122 { 123 bool port; 124 125 if (ieee) 126 port = qed_dcbx_ieee_app_port(app_info_bitmap, 127 DCBX_APP_SF_IEEE_TCP_PORT); 128 else 129 port = qed_dcbx_app_port(app_info_bitmap); 130 131 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 132 } 133 134 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 135 { 136 bool ethtype; 137 138 if (ieee) 139 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 140 else 141 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 142 143 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 144 } 145 146 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 147 { 148 bool ethtype; 149 150 if (ieee) 151 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 152 else 153 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 154 155 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 156 } 157 158 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 159 { 160 bool port; 161 162 if (ieee) 163 port = qed_dcbx_ieee_app_port(app_info_bitmap, 164 DCBX_APP_SF_IEEE_UDP_PORT); 165 else 166 port = qed_dcbx_app_port(app_info_bitmap); 167 168 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 169 } 170 171 static void 172 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 173 { 174 enum dcbx_protocol_type id; 175 int i; 176 177 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 178 p_data->dcbx_enabled); 179 180 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 181 id = qed_dcbx_app_update[i].id; 182 183 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 184 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 185 qed_dcbx_app_update[i].name, p_data->arr[id].update, 186 p_data->arr[id].enable, p_data->arr[id].priority, 187 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); 188 } 189 } 190 191 static void 192 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 193 struct qed_hw_info *p_info, 194 bool enable, 195 u8 prio, 196 u8 tc, 197 enum dcbx_protocol_type type, 198 enum qed_pci_personality personality) 199 { 200 /* PF update ramrod data */ 201 p_data->arr[type].enable = enable; 202 p_data->arr[type].priority = prio; 203 p_data->arr[type].tc = tc; 204 if (enable) 205 p_data->arr[type].update = UPDATE_DCB; 206 else 207 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP; 208 209 /* QM reconf data */ 210 if (p_info->personality == personality) 211 p_info->offload_tc = tc; 212 } 213 214 /* Update app protocol data and hw_info fields with the TLV info */ 215 static void 216 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 217 struct qed_hwfn *p_hwfn, 218 bool enable, 219 u8 prio, u8 tc, enum dcbx_protocol_type type) 220 { 221 struct qed_hw_info *p_info = &p_hwfn->hw_info; 222 enum qed_pci_personality personality; 223 enum dcbx_protocol_type id; 224 char *name; 225 int i; 226 227 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 228 id = qed_dcbx_app_update[i].id; 229 230 if (type != id) 231 continue; 232 233 personality = qed_dcbx_app_update[i].personality; 234 name = qed_dcbx_app_update[i].name; 235 236 qed_dcbx_set_params(p_data, p_info, enable, 237 prio, tc, type, personality); 238 } 239 } 240 241 static bool 242 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 243 u32 app_prio_bitmap, 244 u16 id, enum dcbx_protocol_type *type, bool ieee) 245 { 246 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 247 *type = DCBX_PROTOCOL_FCOE; 248 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 249 *type = DCBX_PROTOCOL_ROCE; 250 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 251 *type = DCBX_PROTOCOL_ISCSI; 252 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 253 *type = DCBX_PROTOCOL_ETH; 254 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 255 *type = DCBX_PROTOCOL_ROCE_V2; 256 } else { 257 *type = DCBX_MAX_PROTOCOL_TYPE; 258 DP_ERR(p_hwfn, 259 "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n", 260 id, app_prio_bitmap); 261 return false; 262 } 263 264 return true; 265 } 266 267 /* Parse app TLV's to update TC information in hw_info structure for 268 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 269 */ 270 static int 271 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 272 struct qed_dcbx_results *p_data, 273 struct dcbx_app_priority_entry *p_tbl, 274 u32 pri_tc_tbl, int count, u8 dcbx_version) 275 { 276 enum dcbx_protocol_type type; 277 u8 tc, priority_map; 278 bool enable, ieee; 279 u16 protocol_id; 280 int priority; 281 int i; 282 283 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 284 285 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 286 /* Parse APP TLV */ 287 for (i = 0; i < count; i++) { 288 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 289 DCBX_APP_PROTOCOL_ID); 290 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 291 DCBX_APP_PRI_MAP); 292 priority = ffs(priority_map) - 1; 293 if (priority < 0) { 294 DP_ERR(p_hwfn, "Invalid priority\n"); 295 return -EINVAL; 296 } 297 298 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 299 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 300 protocol_id, &type, ieee)) { 301 /* ETH always have the enable bit reset, as it gets 302 * vlan information per packet. For other protocols, 303 * should be set according to the dcbx_enabled 304 * indication, but we only got here if there was an 305 * app tlv for the protocol, so dcbx must be enabled. 306 */ 307 enable = !(type == DCBX_PROTOCOL_ETH); 308 309 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 310 priority, tc, type); 311 } 312 } 313 314 /* Update ramrod protocol data and hw_info fields 315 * with default info when corresponding APP TLV's are not detected. 316 * The enabled field has a different logic for ethernet as only for 317 * ethernet dcb should disabled by default, as the information arrives 318 * from the OS (unless an explicit app tlv was present). 319 */ 320 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 321 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 322 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 323 if (p_data->arr[type].update) 324 continue; 325 326 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 327 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 328 priority, tc, type); 329 } 330 331 return 0; 332 } 333 334 /* Parse app TLV's to update TC information in hw_info structure for 335 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 336 */ 337 static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 338 { 339 struct dcbx_app_priority_feature *p_app; 340 struct dcbx_app_priority_entry *p_tbl; 341 struct qed_dcbx_results data = { 0 }; 342 struct dcbx_ets_feature *p_ets; 343 struct qed_hw_info *p_info; 344 u32 pri_tc_tbl, flags; 345 u8 dcbx_version; 346 int num_entries; 347 int rc = 0; 348 349 flags = p_hwfn->p_dcbx_info->operational.flags; 350 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 351 352 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 353 p_tbl = p_app->app_pri_tbl; 354 355 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 356 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 357 358 p_info = &p_hwfn->hw_info; 359 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 360 361 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, 362 num_entries, dcbx_version); 363 if (rc) 364 return rc; 365 366 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags, 367 DCBX_ETS_MAX_TCS); 368 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC); 369 data.pf_id = p_hwfn->rel_pf_id; 370 data.dcbx_enabled = !!dcbx_version; 371 372 qed_dcbx_dp_protocol(p_hwfn, &data); 373 374 memcpy(&p_hwfn->p_dcbx_info->results, &data, 375 sizeof(struct qed_dcbx_results)); 376 377 return 0; 378 } 379 380 static int 381 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 382 struct qed_ptt *p_ptt, 383 struct qed_dcbx_mib_meta_data *p_data, 384 enum qed_mib_read_type type) 385 { 386 u32 prefix_seq_num, suffix_seq_num; 387 int read_count = 0; 388 int rc = 0; 389 390 /* The data is considered to be valid only if both sequence numbers are 391 * the same. 392 */ 393 do { 394 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 395 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 396 p_data->addr, p_data->size); 397 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 398 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 399 } else { 400 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 401 p_data->addr, p_data->size); 402 prefix_seq_num = p_data->mib->prefix_seq_num; 403 suffix_seq_num = p_data->mib->suffix_seq_num; 404 } 405 read_count++; 406 407 DP_VERBOSE(p_hwfn, 408 QED_MSG_DCB, 409 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 410 type, read_count, prefix_seq_num, suffix_seq_num); 411 } while ((prefix_seq_num != suffix_seq_num) && 412 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 413 414 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 415 DP_ERR(p_hwfn, 416 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 417 type, read_count, prefix_seq_num, suffix_seq_num); 418 rc = -EIO; 419 } 420 421 return rc; 422 } 423 424 static void 425 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 426 struct qed_dcbx_app_prio *p_prio, 427 struct qed_dcbx_results *p_results) 428 { 429 u8 val; 430 431 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 432 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 433 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 434 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 435 436 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 437 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 438 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 439 440 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 441 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 442 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 443 p_prio->roce_v2 = val; 444 } 445 446 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 447 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 448 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 449 450 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 451 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 452 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 453 454 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 455 p_results->arr[DCBX_PROTOCOL_ETH].enable) 456 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 457 458 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 459 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 460 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 461 p_prio->eth); 462 } 463 464 static void 465 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 466 struct dcbx_app_priority_feature *p_app, 467 struct dcbx_app_priority_entry *p_tbl, 468 struct qed_dcbx_params *p_params, bool ieee) 469 { 470 struct qed_app_entry *entry; 471 u8 pri_map; 472 int i; 473 474 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 475 DCBX_APP_WILLING); 476 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 477 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 478 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 479 DCBX_APP_NUM_ENTRIES); 480 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 481 entry = &p_params->app_entry[i]; 482 if (ieee) { 483 u8 sf_ieee; 484 u32 val; 485 486 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 487 DCBX_APP_SF_IEEE); 488 switch (sf_ieee) { 489 case DCBX_APP_SF_IEEE_RESERVED: 490 /* Old MFW */ 491 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 492 DCBX_APP_SF); 493 entry->sf_ieee = val ? 494 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 495 QED_DCBX_SF_IEEE_ETHTYPE; 496 break; 497 case DCBX_APP_SF_IEEE_ETHTYPE: 498 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 499 break; 500 case DCBX_APP_SF_IEEE_TCP_PORT: 501 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 502 break; 503 case DCBX_APP_SF_IEEE_UDP_PORT: 504 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 505 break; 506 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 507 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 508 break; 509 } 510 } else { 511 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 512 DCBX_APP_SF)); 513 } 514 515 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 516 entry->prio = ffs(pri_map) - 1; 517 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 518 DCBX_APP_PROTOCOL_ID); 519 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 520 entry->proto_id, 521 &entry->proto_type, ieee); 522 } 523 524 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 525 "APP params: willing %d, valid %d error = %d\n", 526 p_params->app_willing, p_params->app_valid, 527 p_params->app_error); 528 } 529 530 static void 531 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 532 u32 pfc, struct qed_dcbx_params *p_params) 533 { 534 u8 pfc_map; 535 536 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 537 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 538 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 539 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 540 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 541 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 542 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 543 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 544 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 545 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 546 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 547 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 548 549 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 550 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 551 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 552 p_params->pfc.enabled); 553 } 554 555 static void 556 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 557 struct dcbx_ets_feature *p_ets, 558 struct qed_dcbx_params *p_params) 559 { 560 u32 bw_map[2], tsa_map[2], pri_map; 561 int i; 562 563 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 564 DCBX_ETS_WILLING); 565 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 566 DCBX_ETS_ENABLED); 567 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 568 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 569 DCBX_ETS_MAX_TCS); 570 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 571 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 572 p_params->ets_willing, p_params->ets_enabled, 573 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 574 p_params->max_ets_tc); 575 576 if (p_params->ets_enabled && !p_params->max_ets_tc) { 577 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES; 578 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 579 "ETS params: max_ets_tc is forced to %d\n", 580 p_params->max_ets_tc); 581 } 582 583 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 584 * encoded in a type u32 array of size 2. 585 */ 586 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 587 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 588 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 589 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 590 pri_map = p_ets->pri_tc_tbl[0]; 591 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 592 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 593 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 594 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 595 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 596 "elem %d bw_tbl %x tsa_tbl %x\n", 597 i, p_params->ets_tc_bw_tbl[i], 598 p_params->ets_tc_tsa_tbl[i]); 599 } 600 } 601 602 static void 603 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 604 struct dcbx_app_priority_feature *p_app, 605 struct dcbx_app_priority_entry *p_tbl, 606 struct dcbx_ets_feature *p_ets, 607 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 608 { 609 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 610 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 611 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 612 } 613 614 static void 615 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 616 { 617 struct dcbx_features *p_feat; 618 619 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 620 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 621 p_feat->app.app_pri_tbl, &p_feat->ets, 622 p_feat->pfc, ¶ms->local.params, false); 623 params->local.valid = true; 624 } 625 626 static void 627 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 628 { 629 struct dcbx_features *p_feat; 630 631 p_feat = &p_hwfn->p_dcbx_info->remote.features; 632 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 633 p_feat->app.app_pri_tbl, &p_feat->ets, 634 p_feat->pfc, ¶ms->remote.params, false); 635 params->remote.valid = true; 636 } 637 638 static void 639 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 640 struct qed_dcbx_get *params) 641 { 642 struct qed_dcbx_operational_params *p_operational; 643 struct qed_dcbx_results *p_results; 644 struct dcbx_features *p_feat; 645 bool enabled, err; 646 u32 flags; 647 bool val; 648 649 flags = p_hwfn->p_dcbx_info->operational.flags; 650 651 /* If DCBx version is non zero, then negotiation 652 * was successfuly performed 653 */ 654 p_operational = ¶ms->operational; 655 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 656 DCBX_CONFIG_VERSION_DISABLED); 657 if (!enabled) { 658 p_operational->enabled = enabled; 659 p_operational->valid = false; 660 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n"); 661 return; 662 } 663 664 p_feat = &p_hwfn->p_dcbx_info->operational.features; 665 p_results = &p_hwfn->p_dcbx_info->results; 666 667 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 668 DCBX_CONFIG_VERSION_IEEE); 669 p_operational->ieee = val; 670 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 671 DCBX_CONFIG_VERSION_CEE); 672 p_operational->cee = val; 673 674 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 675 DCBX_CONFIG_VERSION_STATIC); 676 p_operational->local = val; 677 678 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 679 "Version support: ieee %d, cee %d, static %d\n", 680 p_operational->ieee, p_operational->cee, 681 p_operational->local); 682 683 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 684 p_feat->app.app_pri_tbl, &p_feat->ets, 685 p_feat->pfc, ¶ms->operational.params, 686 p_operational->ieee); 687 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 688 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 689 p_operational->err = err; 690 p_operational->enabled = enabled; 691 p_operational->valid = true; 692 } 693 694 static void 695 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 696 struct qed_dcbx_get *params) 697 { 698 struct lldp_config_params_s *p_local; 699 700 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 701 702 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 703 ARRAY_SIZE(p_local->local_chassis_id)); 704 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 705 ARRAY_SIZE(p_local->local_port_id)); 706 } 707 708 static void 709 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 710 struct qed_dcbx_get *params) 711 { 712 struct lldp_status_params_s *p_remote; 713 714 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 715 716 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 717 ARRAY_SIZE(p_remote->peer_chassis_id)); 718 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 719 ARRAY_SIZE(p_remote->peer_port_id)); 720 } 721 722 static int 723 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params, 724 enum qed_mib_read_type type) 725 { 726 switch (type) { 727 case QED_DCBX_REMOTE_MIB: 728 qed_dcbx_get_remote_params(p_hwfn, p_params); 729 break; 730 case QED_DCBX_LOCAL_MIB: 731 qed_dcbx_get_local_params(p_hwfn, p_params); 732 break; 733 case QED_DCBX_OPERATIONAL_MIB: 734 qed_dcbx_get_operational_params(p_hwfn, p_params); 735 break; 736 case QED_DCBX_REMOTE_LLDP_MIB: 737 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params); 738 break; 739 case QED_DCBX_LOCAL_LLDP_MIB: 740 qed_dcbx_get_local_lldp_params(p_hwfn, p_params); 741 break; 742 default: 743 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 744 return -EINVAL; 745 } 746 747 return 0; 748 } 749 750 static int 751 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 752 { 753 struct qed_dcbx_mib_meta_data data; 754 int rc = 0; 755 756 memset(&data, 0, sizeof(data)); 757 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 758 lldp_config_params); 759 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 760 data.size = sizeof(struct lldp_config_params_s); 761 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 762 763 return rc; 764 } 765 766 static int 767 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 768 struct qed_ptt *p_ptt, 769 enum qed_mib_read_type type) 770 { 771 struct qed_dcbx_mib_meta_data data; 772 int rc = 0; 773 774 memset(&data, 0, sizeof(data)); 775 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 776 lldp_status_params); 777 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 778 data.size = sizeof(struct lldp_status_params_s); 779 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 780 781 return rc; 782 } 783 784 static int 785 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 786 struct qed_ptt *p_ptt, 787 enum qed_mib_read_type type) 788 { 789 struct qed_dcbx_mib_meta_data data; 790 int rc = 0; 791 792 memset(&data, 0, sizeof(data)); 793 data.addr = p_hwfn->mcp_info->port_addr + 794 offsetof(struct public_port, operational_dcbx_mib); 795 data.mib = &p_hwfn->p_dcbx_info->operational; 796 data.size = sizeof(struct dcbx_mib); 797 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 798 799 return rc; 800 } 801 802 static int 803 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 804 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 805 { 806 struct qed_dcbx_mib_meta_data data; 807 int rc = 0; 808 809 memset(&data, 0, sizeof(data)); 810 data.addr = p_hwfn->mcp_info->port_addr + 811 offsetof(struct public_port, remote_dcbx_mib); 812 data.mib = &p_hwfn->p_dcbx_info->remote; 813 data.size = sizeof(struct dcbx_mib); 814 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 815 816 return rc; 817 } 818 819 static int 820 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 821 { 822 struct qed_dcbx_mib_meta_data data; 823 int rc = 0; 824 825 memset(&data, 0, sizeof(data)); 826 data.addr = p_hwfn->mcp_info->port_addr + 827 offsetof(struct public_port, local_admin_dcbx_mib); 828 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 829 data.size = sizeof(struct dcbx_local_params); 830 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 831 832 return rc; 833 } 834 835 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 836 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 837 { 838 int rc = -EINVAL; 839 840 switch (type) { 841 case QED_DCBX_OPERATIONAL_MIB: 842 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 843 break; 844 case QED_DCBX_REMOTE_MIB: 845 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 846 break; 847 case QED_DCBX_LOCAL_MIB: 848 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 849 break; 850 case QED_DCBX_REMOTE_LLDP_MIB: 851 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 852 break; 853 case QED_DCBX_LOCAL_LLDP_MIB: 854 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 855 break; 856 default: 857 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 858 } 859 860 return rc; 861 } 862 863 void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type) 864 { 865 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common; 866 void *cookie = hwfn->cdev->ops_cookie; 867 868 if (cookie && op->dcbx_aen) 869 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type); 870 } 871 872 /* Read updated MIB. 873 * Reconfigure QM and invoke PF update ramrod command if operational MIB 874 * change is detected. 875 */ 876 int 877 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 878 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 879 { 880 int rc = 0; 881 882 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 883 if (rc) 884 return rc; 885 886 if (type == QED_DCBX_OPERATIONAL_MIB) { 887 rc = qed_dcbx_process_mib_info(p_hwfn); 888 if (!rc) { 889 /* reconfigure tcs of QM queues according 890 * to negotiation results 891 */ 892 qed_qm_reconf(p_hwfn, p_ptt); 893 894 /* update storm FW with negotiation results */ 895 qed_sp_pf_update(p_hwfn); 896 897 /* for roce PFs, we may want to enable/disable DPM 898 * when DCBx change occurs 899 */ 900 if (p_hwfn->hw_info.personality == 901 QED_PCI_ETH_ROCE) 902 qed_roce_dpm_dcbx(p_hwfn, p_ptt); 903 } 904 } 905 906 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 907 908 if (type == QED_DCBX_OPERATIONAL_MIB) { 909 struct qed_dcbx_results *p_data; 910 u16 val; 911 912 /* Configure in NIG which protocols support EDPM and should 913 * honor PFC. 914 */ 915 p_data = &p_hwfn->p_dcbx_info->results; 916 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) | 917 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc); 918 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT; 919 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN; 920 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val); 921 } 922 923 qed_dcbx_aen(p_hwfn, type); 924 925 return rc; 926 } 927 928 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 929 { 930 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 931 if (!p_hwfn->p_dcbx_info) 932 return -ENOMEM; 933 934 return 0; 935 } 936 937 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn) 938 { 939 kfree(p_hwfn->p_dcbx_info); 940 p_hwfn->p_dcbx_info = NULL; 941 } 942 943 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 944 struct qed_dcbx_results *p_src, 945 enum dcbx_protocol_type type) 946 { 947 p_data->dcb_enable_flag = p_src->arr[type].enable; 948 p_data->dcb_priority = p_src->arr[type].priority; 949 p_data->dcb_tc = p_src->arr[type].tc; 950 } 951 952 /* Set pf update ramrod command params */ 953 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 954 struct pf_update_ramrod_data *p_dest) 955 { 956 struct protocol_dcb_data *p_dcb_data; 957 bool update_flag = false; 958 959 p_dest->pf_id = p_src->pf_id; 960 961 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 962 p_dest->update_fcoe_dcb_data_mode = update_flag; 963 964 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 965 p_dest->update_roce_dcb_data_mode = update_flag; 966 967 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 968 p_dest->update_rroce_dcb_data_mode = update_flag; 969 970 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 971 p_dest->update_iscsi_dcb_data_mode = update_flag; 972 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 973 p_dest->update_eth_dcb_data_mode = update_flag; 974 975 p_dcb_data = &p_dest->fcoe_dcb_data; 976 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 977 p_dcb_data = &p_dest->roce_dcb_data; 978 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE); 979 p_dcb_data = &p_dest->rroce_dcb_data; 980 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2); 981 p_dcb_data = &p_dest->iscsi_dcb_data; 982 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 983 p_dcb_data = &p_dest->eth_dcb_data; 984 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 985 } 986 987 #ifdef CONFIG_DCB 988 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 989 struct qed_dcbx_get *p_get, 990 enum qed_mib_read_type type) 991 { 992 struct qed_ptt *p_ptt; 993 int rc; 994 995 if (IS_VF(p_hwfn->cdev)) 996 return -EINVAL; 997 998 p_ptt = qed_ptt_acquire(p_hwfn); 999 if (!p_ptt) 1000 return -EBUSY; 1001 1002 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 1003 if (rc) 1004 goto out; 1005 1006 rc = qed_dcbx_get_params(p_hwfn, p_get, type); 1007 1008 out: 1009 qed_ptt_release(p_hwfn, p_ptt); 1010 return rc; 1011 } 1012 1013 static void 1014 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 1015 u32 *pfc, struct qed_dcbx_params *p_params) 1016 { 1017 u8 pfc_map = 0; 1018 int i; 1019 1020 *pfc &= ~DCBX_PFC_ERROR_MASK; 1021 1022 if (p_params->pfc.willing) 1023 *pfc |= DCBX_PFC_WILLING_MASK; 1024 else 1025 *pfc &= ~DCBX_PFC_WILLING_MASK; 1026 1027 if (p_params->pfc.enabled) 1028 *pfc |= DCBX_PFC_ENABLED_MASK; 1029 else 1030 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1031 1032 *pfc &= ~DCBX_PFC_CAPS_MASK; 1033 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 1034 1035 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1036 if (p_params->pfc.prio[i]) 1037 pfc_map |= BIT(i); 1038 1039 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1040 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 1041 1042 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 1043 } 1044 1045 static void 1046 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 1047 struct dcbx_ets_feature *p_ets, 1048 struct qed_dcbx_params *p_params) 1049 { 1050 u8 *bw_map, *tsa_map; 1051 u32 val; 1052 int i; 1053 1054 if (p_params->ets_willing) 1055 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1056 else 1057 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1058 1059 if (p_params->ets_cbs) 1060 p_ets->flags |= DCBX_ETS_CBS_MASK; 1061 else 1062 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1063 1064 if (p_params->ets_enabled) 1065 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1066 else 1067 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1068 1069 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1070 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1071 1072 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1073 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1074 p_ets->pri_tc_tbl[0] = 0; 1075 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1076 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1077 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1078 /* Copy the priority value to the corresponding 4 bits in the 1079 * traffic class table. 1080 */ 1081 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1082 p_ets->pri_tc_tbl[0] |= val; 1083 } 1084 for (i = 0; i < 2; i++) { 1085 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1086 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1087 } 1088 } 1089 1090 static void 1091 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1092 struct dcbx_app_priority_feature *p_app, 1093 struct qed_dcbx_params *p_params, bool ieee) 1094 { 1095 u32 *entry; 1096 int i; 1097 1098 if (p_params->app_willing) 1099 p_app->flags |= DCBX_APP_WILLING_MASK; 1100 else 1101 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1102 1103 if (p_params->app_valid) 1104 p_app->flags |= DCBX_APP_ENABLED_MASK; 1105 else 1106 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1107 1108 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1109 p_app->flags |= (u32)p_params->num_app_entries << 1110 DCBX_APP_NUM_ENTRIES_SHIFT; 1111 1112 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1113 entry = &p_app->app_pri_tbl[i].entry; 1114 *entry = 0; 1115 if (ieee) { 1116 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1117 switch (p_params->app_entry[i].sf_ieee) { 1118 case QED_DCBX_SF_IEEE_ETHTYPE: 1119 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1120 DCBX_APP_SF_IEEE_SHIFT); 1121 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1122 DCBX_APP_SF_SHIFT); 1123 break; 1124 case QED_DCBX_SF_IEEE_TCP_PORT: 1125 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1126 DCBX_APP_SF_IEEE_SHIFT); 1127 *entry |= ((u32)DCBX_APP_SF_PORT << 1128 DCBX_APP_SF_SHIFT); 1129 break; 1130 case QED_DCBX_SF_IEEE_UDP_PORT: 1131 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1132 DCBX_APP_SF_IEEE_SHIFT); 1133 *entry |= ((u32)DCBX_APP_SF_PORT << 1134 DCBX_APP_SF_SHIFT); 1135 break; 1136 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1137 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1138 DCBX_APP_SF_IEEE_SHIFT); 1139 *entry |= ((u32)DCBX_APP_SF_PORT << 1140 DCBX_APP_SF_SHIFT); 1141 break; 1142 } 1143 } else { 1144 *entry &= ~DCBX_APP_SF_MASK; 1145 if (p_params->app_entry[i].ethtype) 1146 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1147 DCBX_APP_SF_SHIFT); 1148 else 1149 *entry |= ((u32)DCBX_APP_SF_PORT << 1150 DCBX_APP_SF_SHIFT); 1151 } 1152 1153 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1154 *entry |= ((u32)p_params->app_entry[i].proto_id << 1155 DCBX_APP_PROTOCOL_ID_SHIFT); 1156 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1157 *entry |= ((u32)(p_params->app_entry[i].prio) << 1158 DCBX_APP_PRI_MAP_SHIFT); 1159 } 1160 } 1161 1162 static void 1163 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1164 struct dcbx_local_params *local_admin, 1165 struct qed_dcbx_set *params) 1166 { 1167 bool ieee = false; 1168 1169 local_admin->flags = 0; 1170 memcpy(&local_admin->features, 1171 &p_hwfn->p_dcbx_info->operational.features, 1172 sizeof(local_admin->features)); 1173 1174 if (params->enabled) { 1175 local_admin->config = params->ver_num; 1176 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1177 } else { 1178 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1179 } 1180 1181 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n", 1182 local_admin->config); 1183 1184 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1185 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1186 ¶ms->config.params); 1187 1188 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1189 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1190 ¶ms->config.params); 1191 1192 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1193 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1194 ¶ms->config.params, ieee); 1195 } 1196 1197 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1198 struct qed_dcbx_set *params, bool hw_commit) 1199 { 1200 struct dcbx_local_params local_admin; 1201 struct qed_dcbx_mib_meta_data data; 1202 u32 resp = 0, param = 0; 1203 int rc = 0; 1204 1205 if (!hw_commit) { 1206 memcpy(&p_hwfn->p_dcbx_info->set, params, 1207 sizeof(struct qed_dcbx_set)); 1208 return 0; 1209 } 1210 1211 /* clear set-parmas cache */ 1212 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1213 1214 memset(&local_admin, 0, sizeof(local_admin)); 1215 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1216 1217 data.addr = p_hwfn->mcp_info->port_addr + 1218 offsetof(struct public_port, local_admin_dcbx_mib); 1219 data.local_admin = &local_admin; 1220 data.size = sizeof(struct dcbx_local_params); 1221 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1222 1223 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1224 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1225 if (rc) 1226 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1227 1228 return rc; 1229 } 1230 1231 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1232 struct qed_dcbx_set *params) 1233 { 1234 struct qed_dcbx_get *dcbx_info; 1235 int rc; 1236 1237 if (p_hwfn->p_dcbx_info->set.config.valid) { 1238 memcpy(params, &p_hwfn->p_dcbx_info->set, 1239 sizeof(struct qed_dcbx_set)); 1240 return 0; 1241 } 1242 1243 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1244 if (!dcbx_info) 1245 return -ENOMEM; 1246 1247 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1248 if (rc) { 1249 kfree(dcbx_info); 1250 return rc; 1251 } 1252 1253 p_hwfn->p_dcbx_info->set.override_flags = 0; 1254 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1255 if (dcbx_info->operational.cee) 1256 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1257 if (dcbx_info->operational.ieee) 1258 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1259 if (dcbx_info->operational.local) 1260 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1261 1262 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1263 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1264 &dcbx_info->operational.params, 1265 sizeof(struct qed_dcbx_admin_params)); 1266 p_hwfn->p_dcbx_info->set.config.valid = true; 1267 1268 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1269 1270 kfree(dcbx_info); 1271 1272 return 0; 1273 } 1274 1275 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1276 enum qed_mib_read_type type) 1277 { 1278 struct qed_dcbx_get *dcbx_info; 1279 1280 dcbx_info = kmalloc(sizeof(*dcbx_info), GFP_ATOMIC); 1281 if (!dcbx_info) 1282 return NULL; 1283 1284 memset(dcbx_info, 0, sizeof(*dcbx_info)); 1285 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1286 kfree(dcbx_info); 1287 return NULL; 1288 } 1289 1290 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1291 !dcbx_info->operational.enabled) { 1292 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1293 kfree(dcbx_info); 1294 return NULL; 1295 } 1296 1297 return dcbx_info; 1298 } 1299 1300 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1301 { 1302 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1303 struct qed_dcbx_get *dcbx_info; 1304 bool enabled; 1305 1306 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1307 if (!dcbx_info) 1308 return 0; 1309 1310 enabled = dcbx_info->operational.enabled; 1311 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1312 kfree(dcbx_info); 1313 1314 return enabled; 1315 } 1316 1317 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1318 { 1319 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1320 struct qed_dcbx_set dcbx_set; 1321 struct qed_ptt *ptt; 1322 int rc; 1323 1324 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1325 1326 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1327 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1328 if (rc) 1329 return 1; 1330 1331 dcbx_set.enabled = !!state; 1332 1333 ptt = qed_ptt_acquire(hwfn); 1334 if (!ptt) 1335 return 1; 1336 1337 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1338 1339 qed_ptt_release(hwfn, ptt); 1340 1341 return rc ? 1 : 0; 1342 } 1343 1344 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1345 u8 *pgid, u8 *bw_pct, u8 *up_map) 1346 { 1347 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1348 struct qed_dcbx_get *dcbx_info; 1349 1350 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1351 *prio_type = *pgid = *bw_pct = *up_map = 0; 1352 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1353 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1354 return; 1355 } 1356 1357 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1358 if (!dcbx_info) 1359 return; 1360 1361 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1362 kfree(dcbx_info); 1363 } 1364 1365 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1366 { 1367 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1368 struct qed_dcbx_get *dcbx_info; 1369 1370 *bw_pct = 0; 1371 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1372 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1373 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1374 return; 1375 } 1376 1377 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1378 if (!dcbx_info) 1379 return; 1380 1381 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1382 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1383 kfree(dcbx_info); 1384 } 1385 1386 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1387 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1388 { 1389 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1390 *prio = *bwg_id = *bw_pct = *up_map = 0; 1391 } 1392 1393 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1394 int bwg_id, u8 *bw_pct) 1395 { 1396 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1397 *bw_pct = 0; 1398 } 1399 1400 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1401 int priority, u8 *setting) 1402 { 1403 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1404 struct qed_dcbx_get *dcbx_info; 1405 1406 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1407 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1408 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1409 return; 1410 } 1411 1412 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1413 if (!dcbx_info) 1414 return; 1415 1416 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1417 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1418 kfree(dcbx_info); 1419 } 1420 1421 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1422 { 1423 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1424 struct qed_dcbx_set dcbx_set; 1425 struct qed_ptt *ptt; 1426 int rc; 1427 1428 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1429 priority, setting); 1430 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1431 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1432 return; 1433 } 1434 1435 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1436 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1437 if (rc) 1438 return; 1439 1440 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1441 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1442 1443 ptt = qed_ptt_acquire(hwfn); 1444 if (!ptt) 1445 return; 1446 1447 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1448 1449 qed_ptt_release(hwfn, ptt); 1450 } 1451 1452 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1453 { 1454 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1455 struct qed_dcbx_get *dcbx_info; 1456 int rc = 0; 1457 1458 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1459 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1460 if (!dcbx_info) 1461 return 1; 1462 1463 switch (capid) { 1464 case DCB_CAP_ATTR_PG: 1465 case DCB_CAP_ATTR_PFC: 1466 case DCB_CAP_ATTR_UP2TC: 1467 case DCB_CAP_ATTR_GSP: 1468 *cap = true; 1469 break; 1470 case DCB_CAP_ATTR_PG_TCS: 1471 case DCB_CAP_ATTR_PFC_TCS: 1472 *cap = 0x80; 1473 break; 1474 case DCB_CAP_ATTR_DCBX: 1475 *cap = (DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE | 1476 DCB_CAP_DCBX_VER_IEEE | DCB_CAP_DCBX_STATIC); 1477 break; 1478 default: 1479 *cap = false; 1480 rc = 1; 1481 } 1482 1483 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1484 kfree(dcbx_info); 1485 1486 return rc; 1487 } 1488 1489 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1490 { 1491 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1492 struct qed_dcbx_get *dcbx_info; 1493 int rc = 0; 1494 1495 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1496 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1497 if (!dcbx_info) 1498 return -EINVAL; 1499 1500 switch (tcid) { 1501 case DCB_NUMTCS_ATTR_PG: 1502 *num = dcbx_info->operational.params.max_ets_tc; 1503 break; 1504 case DCB_NUMTCS_ATTR_PFC: 1505 *num = dcbx_info->operational.params.pfc.max_tc; 1506 break; 1507 default: 1508 rc = -EINVAL; 1509 } 1510 1511 kfree(dcbx_info); 1512 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1513 1514 return rc; 1515 } 1516 1517 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1518 { 1519 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1520 struct qed_dcbx_get *dcbx_info; 1521 bool enabled; 1522 1523 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1524 if (!dcbx_info) 1525 return 0; 1526 1527 enabled = dcbx_info->operational.params.pfc.enabled; 1528 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1529 kfree(dcbx_info); 1530 1531 return enabled; 1532 } 1533 1534 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1535 { 1536 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1537 struct qed_dcbx_get *dcbx_info; 1538 u8 mode = 0; 1539 1540 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1541 if (!dcbx_info) 1542 return 0; 1543 1544 if (dcbx_info->operational.enabled) 1545 mode |= DCB_CAP_DCBX_LLD_MANAGED; 1546 if (dcbx_info->operational.ieee) 1547 mode |= DCB_CAP_DCBX_VER_IEEE; 1548 if (dcbx_info->operational.cee) 1549 mode |= DCB_CAP_DCBX_VER_CEE; 1550 if (dcbx_info->operational.local) 1551 mode |= DCB_CAP_DCBX_STATIC; 1552 1553 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1554 kfree(dcbx_info); 1555 1556 return mode; 1557 } 1558 1559 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1560 int tc, 1561 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1562 { 1563 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1564 struct qed_dcbx_set dcbx_set; 1565 struct qed_ptt *ptt; 1566 int rc; 1567 1568 DP_VERBOSE(hwfn, QED_MSG_DCB, 1569 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1570 tc, pri_type, pgid, bw_pct, up_map); 1571 1572 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1573 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1574 return; 1575 } 1576 1577 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1578 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1579 if (rc) 1580 return; 1581 1582 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1583 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1584 1585 ptt = qed_ptt_acquire(hwfn); 1586 if (!ptt) 1587 return; 1588 1589 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1590 1591 qed_ptt_release(hwfn, ptt); 1592 } 1593 1594 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1595 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1596 { 1597 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1598 } 1599 1600 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1601 { 1602 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1603 struct qed_dcbx_set dcbx_set; 1604 struct qed_ptt *ptt; 1605 int rc; 1606 1607 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1608 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1609 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1610 return; 1611 } 1612 1613 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1614 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1615 if (rc) 1616 return; 1617 1618 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1619 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1620 1621 ptt = qed_ptt_acquire(hwfn); 1622 if (!ptt) 1623 return; 1624 1625 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1626 1627 qed_ptt_release(hwfn, ptt); 1628 } 1629 1630 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1631 { 1632 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1633 } 1634 1635 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1636 { 1637 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1638 struct qed_dcbx_set dcbx_set; 1639 struct qed_ptt *ptt; 1640 int rc; 1641 1642 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1643 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1644 if (rc) 1645 return 1; 1646 1647 ptt = qed_ptt_acquire(hwfn); 1648 if (!ptt) 1649 return 1; 1650 1651 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1652 1653 qed_ptt_release(hwfn, ptt); 1654 1655 return rc; 1656 } 1657 1658 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1659 { 1660 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1661 struct qed_dcbx_set dcbx_set; 1662 struct qed_ptt *ptt; 1663 int rc; 1664 1665 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1666 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1667 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1668 if (rc) 1669 return 1; 1670 1671 switch (tcid) { 1672 case DCB_NUMTCS_ATTR_PG: 1673 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1674 dcbx_set.config.params.max_ets_tc = num; 1675 break; 1676 case DCB_NUMTCS_ATTR_PFC: 1677 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1678 dcbx_set.config.params.pfc.max_tc = num; 1679 break; 1680 default: 1681 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1682 return -EINVAL; 1683 } 1684 1685 ptt = qed_ptt_acquire(hwfn); 1686 if (!ptt) 1687 return -EINVAL; 1688 1689 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1690 1691 qed_ptt_release(hwfn, ptt); 1692 1693 return 0; 1694 } 1695 1696 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1697 { 1698 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1699 struct qed_dcbx_set dcbx_set; 1700 struct qed_ptt *ptt; 1701 int rc; 1702 1703 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1704 1705 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1706 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1707 if (rc) 1708 return; 1709 1710 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1711 dcbx_set.config.params.pfc.enabled = !!state; 1712 1713 ptt = qed_ptt_acquire(hwfn); 1714 if (!ptt) 1715 return; 1716 1717 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1718 1719 qed_ptt_release(hwfn, ptt); 1720 } 1721 1722 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1723 { 1724 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1725 struct qed_dcbx_get *dcbx_info; 1726 struct qed_app_entry *entry; 1727 bool ethtype; 1728 u8 prio = 0; 1729 int i; 1730 1731 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1732 if (!dcbx_info) 1733 return -EINVAL; 1734 1735 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1736 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1737 entry = &dcbx_info->operational.params.app_entry[i]; 1738 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1739 prio = entry->prio; 1740 break; 1741 } 1742 } 1743 1744 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1745 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1746 kfree(dcbx_info); 1747 return -EINVAL; 1748 } 1749 1750 kfree(dcbx_info); 1751 1752 return prio; 1753 } 1754 1755 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1756 u8 idtype, u16 idval, u8 pri_map) 1757 { 1758 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1759 struct qed_dcbx_set dcbx_set; 1760 struct qed_app_entry *entry; 1761 struct qed_ptt *ptt; 1762 bool ethtype; 1763 int rc, i; 1764 1765 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1766 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1767 if (rc) 1768 return -EINVAL; 1769 1770 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1771 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1772 entry = &dcbx_set.config.params.app_entry[i]; 1773 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1774 break; 1775 /* First empty slot */ 1776 if (!entry->proto_id) { 1777 dcbx_set.config.params.num_app_entries++; 1778 break; 1779 } 1780 } 1781 1782 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1783 DP_ERR(cdev, "App table is full\n"); 1784 return -EBUSY; 1785 } 1786 1787 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1788 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1789 dcbx_set.config.params.app_entry[i].proto_id = idval; 1790 dcbx_set.config.params.app_entry[i].prio = pri_map; 1791 1792 ptt = qed_ptt_acquire(hwfn); 1793 if (!ptt) 1794 return -EBUSY; 1795 1796 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1797 1798 qed_ptt_release(hwfn, ptt); 1799 1800 return rc; 1801 } 1802 1803 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1804 { 1805 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1806 struct qed_dcbx_set dcbx_set; 1807 struct qed_ptt *ptt; 1808 int rc; 1809 1810 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1811 1812 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && 1813 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) { 1814 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n"); 1815 return 1; 1816 } 1817 1818 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1819 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1820 if (rc) 1821 return 1; 1822 1823 dcbx_set.ver_num = 0; 1824 if (mode & DCB_CAP_DCBX_VER_CEE) { 1825 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1826 dcbx_set.enabled = true; 1827 } 1828 1829 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1830 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1831 dcbx_set.enabled = true; 1832 } 1833 1834 if (mode & DCB_CAP_DCBX_STATIC) { 1835 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1836 dcbx_set.enabled = true; 1837 } 1838 1839 ptt = qed_ptt_acquire(hwfn); 1840 if (!ptt) 1841 return 1; 1842 1843 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1844 1845 qed_ptt_release(hwfn, ptt); 1846 1847 return rc; 1848 } 1849 1850 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1851 { 1852 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1853 struct qed_dcbx_get *dcbx_info; 1854 1855 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1856 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1857 if (!dcbx_info) 1858 return 1; 1859 1860 *flags = 0; 1861 switch (featid) { 1862 case DCB_FEATCFG_ATTR_PG: 1863 if (dcbx_info->operational.params.ets_enabled) 1864 *flags = DCB_FEATCFG_ENABLE; 1865 else 1866 *flags = DCB_FEATCFG_ERROR; 1867 break; 1868 case DCB_FEATCFG_ATTR_PFC: 1869 if (dcbx_info->operational.params.pfc.enabled) 1870 *flags = DCB_FEATCFG_ENABLE; 1871 else 1872 *flags = DCB_FEATCFG_ERROR; 1873 break; 1874 case DCB_FEATCFG_ATTR_APP: 1875 if (dcbx_info->operational.params.app_valid) 1876 *flags = DCB_FEATCFG_ENABLE; 1877 else 1878 *flags = DCB_FEATCFG_ERROR; 1879 break; 1880 default: 1881 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1882 kfree(dcbx_info); 1883 return 1; 1884 } 1885 1886 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1887 kfree(dcbx_info); 1888 1889 return 0; 1890 } 1891 1892 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1893 { 1894 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1895 struct qed_dcbx_set dcbx_set; 1896 bool enabled, willing; 1897 struct qed_ptt *ptt; 1898 int rc; 1899 1900 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1901 featid, flags); 1902 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1903 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1904 if (rc) 1905 return 1; 1906 1907 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1908 willing = !!(flags & DCB_FEATCFG_WILLING); 1909 switch (featid) { 1910 case DCB_FEATCFG_ATTR_PG: 1911 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1912 dcbx_set.config.params.ets_enabled = enabled; 1913 dcbx_set.config.params.ets_willing = willing; 1914 break; 1915 case DCB_FEATCFG_ATTR_PFC: 1916 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1917 dcbx_set.config.params.pfc.enabled = enabled; 1918 dcbx_set.config.params.pfc.willing = willing; 1919 break; 1920 case DCB_FEATCFG_ATTR_APP: 1921 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1922 dcbx_set.config.params.app_willing = willing; 1923 break; 1924 default: 1925 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1926 return 1; 1927 } 1928 1929 ptt = qed_ptt_acquire(hwfn); 1930 if (!ptt) 1931 return 1; 1932 1933 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1934 1935 qed_ptt_release(hwfn, ptt); 1936 1937 return 0; 1938 } 1939 1940 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1941 struct dcb_peer_app_info *info, 1942 u16 *app_count) 1943 { 1944 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1945 struct qed_dcbx_get *dcbx_info; 1946 1947 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1948 if (!dcbx_info) 1949 return -EINVAL; 1950 1951 info->willing = dcbx_info->remote.params.app_willing; 1952 info->error = dcbx_info->remote.params.app_error; 1953 *app_count = dcbx_info->remote.params.num_app_entries; 1954 kfree(dcbx_info); 1955 1956 return 0; 1957 } 1958 1959 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1960 struct dcb_app *table) 1961 { 1962 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1963 struct qed_dcbx_get *dcbx_info; 1964 int i; 1965 1966 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1967 if (!dcbx_info) 1968 return -EINVAL; 1969 1970 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 1971 if (dcbx_info->remote.params.app_entry[i].ethtype) 1972 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 1973 else 1974 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 1975 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 1976 table[i].protocol = 1977 dcbx_info->remote.params.app_entry[i].proto_id; 1978 } 1979 1980 kfree(dcbx_info); 1981 1982 return 0; 1983 } 1984 1985 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 1986 { 1987 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1988 struct qed_dcbx_get *dcbx_info; 1989 int i; 1990 1991 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1992 if (!dcbx_info) 1993 return -EINVAL; 1994 1995 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1996 if (dcbx_info->remote.params.pfc.prio[i]) 1997 pfc->pfc_en |= BIT(i); 1998 1999 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 2000 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 2001 pfc->pfc_en, pfc->tcs_supported); 2002 kfree(dcbx_info); 2003 2004 return 0; 2005 } 2006 2007 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 2008 { 2009 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2010 struct qed_dcbx_get *dcbx_info; 2011 int i; 2012 2013 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2014 if (!dcbx_info) 2015 return -EINVAL; 2016 2017 pg->willing = dcbx_info->remote.params.ets_willing; 2018 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 2019 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 2020 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 2021 } 2022 2023 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 2024 kfree(dcbx_info); 2025 2026 return 0; 2027 } 2028 2029 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 2030 struct ieee_pfc *pfc, bool remote) 2031 { 2032 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2033 struct qed_dcbx_params *params; 2034 struct qed_dcbx_get *dcbx_info; 2035 int rc, i; 2036 2037 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2038 if (!dcbx_info) 2039 return -EINVAL; 2040 2041 if (!dcbx_info->operational.ieee) { 2042 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2043 kfree(dcbx_info); 2044 return -EINVAL; 2045 } 2046 2047 if (remote) { 2048 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2049 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2050 QED_DCBX_REMOTE_MIB); 2051 if (rc) { 2052 kfree(dcbx_info); 2053 return -EINVAL; 2054 } 2055 2056 params = &dcbx_info->remote.params; 2057 } else { 2058 params = &dcbx_info->operational.params; 2059 } 2060 2061 pfc->pfc_cap = params->pfc.max_tc; 2062 pfc->pfc_en = 0; 2063 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2064 if (params->pfc.prio[i]) 2065 pfc->pfc_en |= BIT(i); 2066 2067 kfree(dcbx_info); 2068 2069 return 0; 2070 } 2071 2072 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2073 { 2074 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2075 } 2076 2077 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2078 { 2079 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2080 struct qed_dcbx_get *dcbx_info; 2081 struct qed_dcbx_set dcbx_set; 2082 struct qed_ptt *ptt; 2083 int rc, i; 2084 2085 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2086 if (!dcbx_info) 2087 return -EINVAL; 2088 2089 if (!dcbx_info->operational.ieee) { 2090 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2091 kfree(dcbx_info); 2092 return -EINVAL; 2093 } 2094 2095 kfree(dcbx_info); 2096 2097 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2098 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2099 if (rc) 2100 return -EINVAL; 2101 2102 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2103 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2104 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2105 2106 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap; 2107 2108 ptt = qed_ptt_acquire(hwfn); 2109 if (!ptt) 2110 return -EINVAL; 2111 2112 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2113 2114 qed_ptt_release(hwfn, ptt); 2115 2116 return rc; 2117 } 2118 2119 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2120 struct ieee_ets *ets, bool remote) 2121 { 2122 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2123 struct qed_dcbx_get *dcbx_info; 2124 struct qed_dcbx_params *params; 2125 int rc; 2126 2127 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2128 if (!dcbx_info) 2129 return -EINVAL; 2130 2131 if (!dcbx_info->operational.ieee) { 2132 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2133 kfree(dcbx_info); 2134 return -EINVAL; 2135 } 2136 2137 if (remote) { 2138 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2139 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2140 QED_DCBX_REMOTE_MIB); 2141 if (rc) { 2142 kfree(dcbx_info); 2143 return -EINVAL; 2144 } 2145 2146 params = &dcbx_info->remote.params; 2147 } else { 2148 params = &dcbx_info->operational.params; 2149 } 2150 2151 ets->ets_cap = params->max_ets_tc; 2152 ets->willing = params->ets_willing; 2153 ets->cbs = params->ets_cbs; 2154 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2155 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2156 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2157 kfree(dcbx_info); 2158 2159 return 0; 2160 } 2161 2162 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2163 { 2164 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2165 } 2166 2167 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2168 { 2169 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2170 struct qed_dcbx_get *dcbx_info; 2171 struct qed_dcbx_set dcbx_set; 2172 struct qed_ptt *ptt; 2173 int rc; 2174 2175 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2176 if (!dcbx_info) 2177 return -EINVAL; 2178 2179 if (!dcbx_info->operational.ieee) { 2180 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2181 kfree(dcbx_info); 2182 return -EINVAL; 2183 } 2184 2185 kfree(dcbx_info); 2186 2187 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2188 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2189 if (rc) 2190 return -EINVAL; 2191 2192 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2193 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2194 dcbx_set.config.params.ets_willing = ets->willing; 2195 dcbx_set.config.params.ets_cbs = ets->cbs; 2196 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2197 sizeof(ets->tc_tx_bw)); 2198 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2199 sizeof(ets->tc_tsa)); 2200 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2201 sizeof(ets->prio_tc)); 2202 2203 ptt = qed_ptt_acquire(hwfn); 2204 if (!ptt) 2205 return -EINVAL; 2206 2207 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2208 2209 qed_ptt_release(hwfn, ptt); 2210 2211 return rc; 2212 } 2213 2214 static int 2215 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2216 { 2217 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2218 } 2219 2220 static int 2221 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2222 { 2223 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2224 } 2225 2226 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee) 2227 { 2228 switch (selector) { 2229 case IEEE_8021QAZ_APP_SEL_ETHERTYPE: 2230 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 2231 break; 2232 case IEEE_8021QAZ_APP_SEL_STREAM: 2233 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 2234 break; 2235 case IEEE_8021QAZ_APP_SEL_DGRAM: 2236 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 2237 break; 2238 case IEEE_8021QAZ_APP_SEL_ANY: 2239 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 2240 break; 2241 default: 2242 return -EINVAL; 2243 } 2244 2245 return 0; 2246 } 2247 2248 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2249 { 2250 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2251 struct qed_dcbx_get *dcbx_info; 2252 struct qed_app_entry *entry; 2253 u8 prio = 0; 2254 u8 sf_ieee; 2255 int i; 2256 2257 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n", 2258 app->selector, app->protocol); 2259 2260 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2261 DP_INFO(cdev, "Invalid selector field value %d\n", 2262 app->selector); 2263 return -EINVAL; 2264 } 2265 2266 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2267 if (!dcbx_info) 2268 return -EINVAL; 2269 2270 if (!dcbx_info->operational.ieee) { 2271 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2272 kfree(dcbx_info); 2273 return -EINVAL; 2274 } 2275 2276 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2277 entry = &dcbx_info->operational.params.app_entry[i]; 2278 if ((entry->sf_ieee == sf_ieee) && 2279 (entry->proto_id == app->protocol)) { 2280 prio = entry->prio; 2281 break; 2282 } 2283 } 2284 2285 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2286 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2287 app->protocol); 2288 kfree(dcbx_info); 2289 return -EINVAL; 2290 } 2291 2292 app->priority = ffs(prio) - 1; 2293 2294 kfree(dcbx_info); 2295 2296 return 0; 2297 } 2298 2299 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2300 { 2301 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2302 struct qed_dcbx_get *dcbx_info; 2303 struct qed_dcbx_set dcbx_set; 2304 struct qed_app_entry *entry; 2305 struct qed_ptt *ptt; 2306 u8 sf_ieee; 2307 int rc, i; 2308 2309 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n", 2310 app->selector, app->protocol, app->priority); 2311 if (app->priority >= QED_MAX_PFC_PRIORITIES) { 2312 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2313 return -EINVAL; 2314 } 2315 2316 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2317 DP_INFO(cdev, "Invalid selector field value %d\n", 2318 app->selector); 2319 return -EINVAL; 2320 } 2321 2322 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2323 if (!dcbx_info) 2324 return -EINVAL; 2325 2326 if (!dcbx_info->operational.ieee) { 2327 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2328 kfree(dcbx_info); 2329 return -EINVAL; 2330 } 2331 2332 kfree(dcbx_info); 2333 2334 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2335 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2336 if (rc) 2337 return -EINVAL; 2338 2339 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2340 entry = &dcbx_set.config.params.app_entry[i]; 2341 if ((entry->sf_ieee == sf_ieee) && 2342 (entry->proto_id == app->protocol)) 2343 break; 2344 /* First empty slot */ 2345 if (!entry->proto_id) { 2346 dcbx_set.config.params.num_app_entries++; 2347 break; 2348 } 2349 } 2350 2351 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2352 DP_ERR(cdev, "App table is full\n"); 2353 return -EBUSY; 2354 } 2355 2356 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2357 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee; 2358 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2359 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2360 2361 ptt = qed_ptt_acquire(hwfn); 2362 if (!ptt) 2363 return -EBUSY; 2364 2365 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2366 2367 qed_ptt_release(hwfn, ptt); 2368 2369 return rc; 2370 } 2371 2372 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2373 .getstate = qed_dcbnl_getstate, 2374 .setstate = qed_dcbnl_setstate, 2375 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2376 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2377 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2378 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2379 .getpfccfg = qed_dcbnl_getpfccfg, 2380 .setpfccfg = qed_dcbnl_setpfccfg, 2381 .getcap = qed_dcbnl_getcap, 2382 .getnumtcs = qed_dcbnl_getnumtcs, 2383 .getpfcstate = qed_dcbnl_getpfcstate, 2384 .getdcbx = qed_dcbnl_getdcbx, 2385 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2386 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2387 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2388 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2389 .setall = qed_dcbnl_setall, 2390 .setnumtcs = qed_dcbnl_setnumtcs, 2391 .setpfcstate = qed_dcbnl_setpfcstate, 2392 .setapp = qed_dcbnl_setapp, 2393 .setdcbx = qed_dcbnl_setdcbx, 2394 .setfeatcfg = qed_dcbnl_setfeatcfg, 2395 .getfeatcfg = qed_dcbnl_getfeatcfg, 2396 .getapp = qed_dcbnl_getapp, 2397 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2398 .peer_getapptable = qed_dcbnl_peer_getapptable, 2399 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2400 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2401 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2402 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2403 .ieee_getets = qed_dcbnl_ieee_getets, 2404 .ieee_setets = qed_dcbnl_ieee_setets, 2405 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2406 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2407 .ieee_getapp = qed_dcbnl_ieee_getapp, 2408 .ieee_setapp = qed_dcbnl_ieee_setapp, 2409 }; 2410 2411 #endif 2412