1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/bitops.h> 36 #include <linux/dcbnl.h> 37 #include <linux/errno.h> 38 #include <linux/kernel.h> 39 #include <linux/slab.h> 40 #include <linux/string.h> 41 #include "qed.h" 42 #include "qed_cxt.h" 43 #include "qed_dcbx.h" 44 #include "qed_hsi.h" 45 #include "qed_sp.h" 46 #include "qed_sriov.h" 47 #include "qed_rdma.h" 48 #ifdef CONFIG_DCB 49 #include <linux/qed/qed_eth_if.h> 50 #endif 51 52 #define QED_DCBX_MAX_MIB_READ_TRY (100) 53 #define QED_ETH_TYPE_DEFAULT (0) 54 #define QED_ETH_TYPE_ROCE (0x8915) 55 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 56 #define QED_ETH_TYPE_FCOE (0x8906) 57 #define QED_TCP_PORT_ISCSI (0xCBC) 58 59 #define QED_DCBX_INVALID_PRIORITY 0xFF 60 61 /* Get Traffic Class from priority traffic class table, 4 bits represent 62 * the traffic class corresponding to the priority. 63 */ 64 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 65 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 66 67 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 68 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI}, 69 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE}, 70 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE}, 71 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE}, 72 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}, 73 }; 74 75 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 76 { 77 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 78 DCBX_APP_SF_ETHTYPE); 79 } 80 81 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 82 { 83 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 84 85 /* Old MFW */ 86 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 87 return qed_dcbx_app_ethtype(app_info_bitmap); 88 89 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 90 } 91 92 static bool qed_dcbx_app_port(u32 app_info_bitmap) 93 { 94 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 95 DCBX_APP_SF_PORT); 96 } 97 98 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 99 { 100 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 101 102 /* Old MFW */ 103 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 104 return qed_dcbx_app_port(app_info_bitmap); 105 106 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 107 } 108 109 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 110 { 111 bool ethtype; 112 113 if (ieee) 114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 115 else 116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 117 118 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 119 } 120 121 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 122 { 123 bool port; 124 125 if (ieee) 126 port = qed_dcbx_ieee_app_port(app_info_bitmap, 127 DCBX_APP_SF_IEEE_TCP_PORT); 128 else 129 port = qed_dcbx_app_port(app_info_bitmap); 130 131 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 132 } 133 134 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 135 { 136 bool ethtype; 137 138 if (ieee) 139 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 140 else 141 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 142 143 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 144 } 145 146 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 147 { 148 bool ethtype; 149 150 if (ieee) 151 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 152 else 153 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 154 155 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 156 } 157 158 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 159 { 160 bool port; 161 162 if (ieee) 163 port = qed_dcbx_ieee_app_port(app_info_bitmap, 164 DCBX_APP_SF_IEEE_UDP_PORT); 165 else 166 port = qed_dcbx_app_port(app_info_bitmap); 167 168 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 169 } 170 171 static void 172 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 173 { 174 enum dcbx_protocol_type id; 175 int i; 176 177 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 178 p_data->dcbx_enabled); 179 180 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 181 id = qed_dcbx_app_update[i].id; 182 183 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 184 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 185 qed_dcbx_app_update[i].name, p_data->arr[id].update, 186 p_data->arr[id].enable, p_data->arr[id].priority, 187 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); 188 } 189 } 190 191 static void 192 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 193 struct qed_hw_info *p_info, 194 bool enable, 195 u8 prio, 196 u8 tc, 197 enum dcbx_protocol_type type, 198 enum qed_pci_personality personality) 199 { 200 /* PF update ramrod data */ 201 p_data->arr[type].enable = enable; 202 p_data->arr[type].priority = prio; 203 p_data->arr[type].tc = tc; 204 if (enable) 205 p_data->arr[type].update = UPDATE_DCB; 206 else 207 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP; 208 209 /* QM reconf data */ 210 if (p_info->personality == personality) 211 p_info->offload_tc = tc; 212 } 213 214 /* Update app protocol data and hw_info fields with the TLV info */ 215 static void 216 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 217 struct qed_hwfn *p_hwfn, 218 bool enable, 219 u8 prio, u8 tc, enum dcbx_protocol_type type) 220 { 221 struct qed_hw_info *p_info = &p_hwfn->hw_info; 222 enum qed_pci_personality personality; 223 enum dcbx_protocol_type id; 224 int i; 225 226 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 227 id = qed_dcbx_app_update[i].id; 228 229 if (type != id) 230 continue; 231 232 personality = qed_dcbx_app_update[i].personality; 233 234 qed_dcbx_set_params(p_data, p_info, enable, 235 prio, tc, type, personality); 236 } 237 } 238 239 static bool 240 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 241 u32 app_prio_bitmap, 242 u16 id, enum dcbx_protocol_type *type, bool ieee) 243 { 244 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 245 *type = DCBX_PROTOCOL_FCOE; 246 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 247 *type = DCBX_PROTOCOL_ROCE; 248 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 249 *type = DCBX_PROTOCOL_ISCSI; 250 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 251 *type = DCBX_PROTOCOL_ETH; 252 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 253 *type = DCBX_PROTOCOL_ROCE_V2; 254 } else { 255 *type = DCBX_MAX_PROTOCOL_TYPE; 256 DP_ERR(p_hwfn, "No action required, App TLV entry = 0x%x\n", 257 app_prio_bitmap); 258 return false; 259 } 260 261 return true; 262 } 263 264 /* Parse app TLV's to update TC information in hw_info structure for 265 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 266 */ 267 static int 268 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 269 struct qed_dcbx_results *p_data, 270 struct dcbx_app_priority_entry *p_tbl, 271 u32 pri_tc_tbl, int count, u8 dcbx_version) 272 { 273 enum dcbx_protocol_type type; 274 bool enable, ieee, eth_tlv; 275 u8 tc, priority_map; 276 u16 protocol_id; 277 int priority; 278 int i; 279 280 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 281 282 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 283 eth_tlv = false; 284 /* Parse APP TLV */ 285 for (i = 0; i < count; i++) { 286 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 287 DCBX_APP_PROTOCOL_ID); 288 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 289 DCBX_APP_PRI_MAP); 290 priority = ffs(priority_map) - 1; 291 if (priority < 0) { 292 DP_ERR(p_hwfn, "Invalid priority\n"); 293 return -EINVAL; 294 } 295 296 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 297 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 298 protocol_id, &type, ieee)) { 299 /* ETH always have the enable bit reset, as it gets 300 * vlan information per packet. For other protocols, 301 * should be set according to the dcbx_enabled 302 * indication, but we only got here if there was an 303 * app tlv for the protocol, so dcbx must be enabled. 304 */ 305 if (type == DCBX_PROTOCOL_ETH) { 306 enable = false; 307 eth_tlv = true; 308 } else { 309 enable = true; 310 } 311 312 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 313 priority, tc, type); 314 } 315 } 316 317 /* If Eth TLV is not detected, use UFP TC as default TC */ 318 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && !eth_tlv) 319 p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc; 320 321 /* Update ramrod protocol data and hw_info fields 322 * with default info when corresponding APP TLV's are not detected. 323 * The enabled field has a different logic for ethernet as only for 324 * ethernet dcb should disabled by default, as the information arrives 325 * from the OS (unless an explicit app tlv was present). 326 */ 327 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 328 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 329 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 330 if (p_data->arr[type].update) 331 continue; 332 333 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 334 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 335 priority, tc, type); 336 } 337 338 return 0; 339 } 340 341 /* Parse app TLV's to update TC information in hw_info structure for 342 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 343 */ 344 static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 345 { 346 struct dcbx_app_priority_feature *p_app; 347 struct dcbx_app_priority_entry *p_tbl; 348 struct qed_dcbx_results data = { 0 }; 349 struct dcbx_ets_feature *p_ets; 350 struct qed_hw_info *p_info; 351 u32 pri_tc_tbl, flags; 352 u8 dcbx_version; 353 int num_entries; 354 int rc = 0; 355 356 flags = p_hwfn->p_dcbx_info->operational.flags; 357 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 358 359 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 360 p_tbl = p_app->app_pri_tbl; 361 362 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 363 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 364 365 p_info = &p_hwfn->hw_info; 366 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 367 368 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, 369 num_entries, dcbx_version); 370 if (rc) 371 return rc; 372 373 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags, 374 DCBX_ETS_MAX_TCS); 375 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC); 376 data.pf_id = p_hwfn->rel_pf_id; 377 data.dcbx_enabled = !!dcbx_version; 378 379 qed_dcbx_dp_protocol(p_hwfn, &data); 380 381 memcpy(&p_hwfn->p_dcbx_info->results, &data, 382 sizeof(struct qed_dcbx_results)); 383 384 return 0; 385 } 386 387 static int 388 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 389 struct qed_ptt *p_ptt, 390 struct qed_dcbx_mib_meta_data *p_data, 391 enum qed_mib_read_type type) 392 { 393 u32 prefix_seq_num, suffix_seq_num; 394 int read_count = 0; 395 int rc = 0; 396 397 /* The data is considered to be valid only if both sequence numbers are 398 * the same. 399 */ 400 do { 401 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 402 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 403 p_data->addr, p_data->size); 404 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 405 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 406 } else { 407 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 408 p_data->addr, p_data->size); 409 prefix_seq_num = p_data->mib->prefix_seq_num; 410 suffix_seq_num = p_data->mib->suffix_seq_num; 411 } 412 read_count++; 413 414 DP_VERBOSE(p_hwfn, 415 QED_MSG_DCB, 416 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 417 type, read_count, prefix_seq_num, suffix_seq_num); 418 } while ((prefix_seq_num != suffix_seq_num) && 419 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 420 421 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 422 DP_ERR(p_hwfn, 423 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 424 type, read_count, prefix_seq_num, suffix_seq_num); 425 rc = -EIO; 426 } 427 428 return rc; 429 } 430 431 static void 432 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 433 struct qed_dcbx_app_prio *p_prio, 434 struct qed_dcbx_results *p_results) 435 { 436 u8 val; 437 438 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 439 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 440 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 441 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 442 443 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 444 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 445 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 446 447 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 448 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 449 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 450 p_prio->roce_v2 = val; 451 } 452 453 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 454 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 455 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 456 457 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 458 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 459 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 460 461 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 462 p_results->arr[DCBX_PROTOCOL_ETH].enable) 463 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 464 465 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 466 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 467 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 468 p_prio->eth); 469 } 470 471 static void 472 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 473 struct dcbx_app_priority_feature *p_app, 474 struct dcbx_app_priority_entry *p_tbl, 475 struct qed_dcbx_params *p_params, bool ieee) 476 { 477 struct qed_app_entry *entry; 478 u8 pri_map; 479 int i; 480 481 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 482 DCBX_APP_WILLING); 483 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 484 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 485 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 486 DCBX_APP_NUM_ENTRIES); 487 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 488 entry = &p_params->app_entry[i]; 489 if (ieee) { 490 u8 sf_ieee; 491 u32 val; 492 493 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 494 DCBX_APP_SF_IEEE); 495 switch (sf_ieee) { 496 case DCBX_APP_SF_IEEE_RESERVED: 497 /* Old MFW */ 498 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 499 DCBX_APP_SF); 500 entry->sf_ieee = val ? 501 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 502 QED_DCBX_SF_IEEE_ETHTYPE; 503 break; 504 case DCBX_APP_SF_IEEE_ETHTYPE: 505 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 506 break; 507 case DCBX_APP_SF_IEEE_TCP_PORT: 508 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 509 break; 510 case DCBX_APP_SF_IEEE_UDP_PORT: 511 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 512 break; 513 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 514 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 515 break; 516 } 517 } else { 518 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 519 DCBX_APP_SF)); 520 } 521 522 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 523 entry->prio = ffs(pri_map) - 1; 524 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 525 DCBX_APP_PROTOCOL_ID); 526 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 527 entry->proto_id, 528 &entry->proto_type, ieee); 529 } 530 531 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 532 "APP params: willing %d, valid %d error = %d\n", 533 p_params->app_willing, p_params->app_valid, 534 p_params->app_error); 535 } 536 537 static void 538 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 539 u32 pfc, struct qed_dcbx_params *p_params) 540 { 541 u8 pfc_map; 542 543 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 544 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 545 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 546 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 547 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 548 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 549 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 550 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 551 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 552 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 553 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 554 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 555 556 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 557 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 558 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 559 p_params->pfc.enabled); 560 } 561 562 static void 563 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 564 struct dcbx_ets_feature *p_ets, 565 struct qed_dcbx_params *p_params) 566 { 567 u32 bw_map[2], tsa_map[2], pri_map; 568 int i; 569 570 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 571 DCBX_ETS_WILLING); 572 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 573 DCBX_ETS_ENABLED); 574 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 575 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 576 DCBX_ETS_MAX_TCS); 577 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 578 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 579 p_params->ets_willing, p_params->ets_enabled, 580 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 581 p_params->max_ets_tc); 582 583 if (p_params->ets_enabled && !p_params->max_ets_tc) { 584 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES; 585 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 586 "ETS params: max_ets_tc is forced to %d\n", 587 p_params->max_ets_tc); 588 } 589 590 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 591 * encoded in a type u32 array of size 2. 592 */ 593 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 594 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 595 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 596 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 597 pri_map = p_ets->pri_tc_tbl[0]; 598 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 599 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 600 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 601 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 602 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 603 "elem %d bw_tbl %x tsa_tbl %x\n", 604 i, p_params->ets_tc_bw_tbl[i], 605 p_params->ets_tc_tsa_tbl[i]); 606 } 607 } 608 609 static void 610 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 611 struct dcbx_app_priority_feature *p_app, 612 struct dcbx_app_priority_entry *p_tbl, 613 struct dcbx_ets_feature *p_ets, 614 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 615 { 616 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 617 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 618 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 619 } 620 621 static void 622 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 623 { 624 struct dcbx_features *p_feat; 625 626 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 627 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 628 p_feat->app.app_pri_tbl, &p_feat->ets, 629 p_feat->pfc, ¶ms->local.params, false); 630 params->local.valid = true; 631 } 632 633 static void 634 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 635 { 636 struct dcbx_features *p_feat; 637 638 p_feat = &p_hwfn->p_dcbx_info->remote.features; 639 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 640 p_feat->app.app_pri_tbl, &p_feat->ets, 641 p_feat->pfc, ¶ms->remote.params, false); 642 params->remote.valid = true; 643 } 644 645 static void 646 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 647 struct qed_dcbx_get *params) 648 { 649 struct qed_dcbx_operational_params *p_operational; 650 struct qed_dcbx_results *p_results; 651 struct dcbx_features *p_feat; 652 bool enabled, err; 653 u32 flags; 654 bool val; 655 656 flags = p_hwfn->p_dcbx_info->operational.flags; 657 658 /* If DCBx version is non zero, then negotiation 659 * was successfuly performed 660 */ 661 p_operational = ¶ms->operational; 662 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 663 DCBX_CONFIG_VERSION_DISABLED); 664 if (!enabled) { 665 p_operational->enabled = enabled; 666 p_operational->valid = false; 667 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n"); 668 return; 669 } 670 671 p_feat = &p_hwfn->p_dcbx_info->operational.features; 672 p_results = &p_hwfn->p_dcbx_info->results; 673 674 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 675 DCBX_CONFIG_VERSION_IEEE); 676 p_operational->ieee = val; 677 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 678 DCBX_CONFIG_VERSION_CEE); 679 p_operational->cee = val; 680 681 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 682 DCBX_CONFIG_VERSION_STATIC); 683 p_operational->local = val; 684 685 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 686 "Version support: ieee %d, cee %d, static %d\n", 687 p_operational->ieee, p_operational->cee, 688 p_operational->local); 689 690 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 691 p_feat->app.app_pri_tbl, &p_feat->ets, 692 p_feat->pfc, ¶ms->operational.params, 693 p_operational->ieee); 694 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 695 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 696 p_operational->err = err; 697 p_operational->enabled = enabled; 698 p_operational->valid = true; 699 } 700 701 static void 702 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 703 struct qed_dcbx_get *params) 704 { 705 struct lldp_config_params_s *p_local; 706 707 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 708 709 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 710 sizeof(p_local->local_chassis_id)); 711 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 712 sizeof(p_local->local_port_id)); 713 } 714 715 static void 716 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 717 struct qed_dcbx_get *params) 718 { 719 struct lldp_status_params_s *p_remote; 720 721 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 722 723 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 724 sizeof(p_remote->peer_chassis_id)); 725 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 726 sizeof(p_remote->peer_port_id)); 727 } 728 729 static int 730 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params, 731 enum qed_mib_read_type type) 732 { 733 switch (type) { 734 case QED_DCBX_REMOTE_MIB: 735 qed_dcbx_get_remote_params(p_hwfn, p_params); 736 break; 737 case QED_DCBX_LOCAL_MIB: 738 qed_dcbx_get_local_params(p_hwfn, p_params); 739 break; 740 case QED_DCBX_OPERATIONAL_MIB: 741 qed_dcbx_get_operational_params(p_hwfn, p_params); 742 break; 743 case QED_DCBX_REMOTE_LLDP_MIB: 744 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params); 745 break; 746 case QED_DCBX_LOCAL_LLDP_MIB: 747 qed_dcbx_get_local_lldp_params(p_hwfn, p_params); 748 break; 749 default: 750 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 751 return -EINVAL; 752 } 753 754 return 0; 755 } 756 757 static int 758 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 759 { 760 struct qed_dcbx_mib_meta_data data; 761 int rc = 0; 762 763 memset(&data, 0, sizeof(data)); 764 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 765 lldp_config_params); 766 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 767 data.size = sizeof(struct lldp_config_params_s); 768 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 769 770 return rc; 771 } 772 773 static int 774 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 775 struct qed_ptt *p_ptt, 776 enum qed_mib_read_type type) 777 { 778 struct qed_dcbx_mib_meta_data data; 779 int rc = 0; 780 781 memset(&data, 0, sizeof(data)); 782 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 783 lldp_status_params); 784 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 785 data.size = sizeof(struct lldp_status_params_s); 786 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 787 788 return rc; 789 } 790 791 static int 792 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 793 struct qed_ptt *p_ptt, 794 enum qed_mib_read_type type) 795 { 796 struct qed_dcbx_mib_meta_data data; 797 int rc = 0; 798 799 memset(&data, 0, sizeof(data)); 800 data.addr = p_hwfn->mcp_info->port_addr + 801 offsetof(struct public_port, operational_dcbx_mib); 802 data.mib = &p_hwfn->p_dcbx_info->operational; 803 data.size = sizeof(struct dcbx_mib); 804 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 805 806 return rc; 807 } 808 809 static int 810 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 811 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 812 { 813 struct qed_dcbx_mib_meta_data data; 814 int rc = 0; 815 816 memset(&data, 0, sizeof(data)); 817 data.addr = p_hwfn->mcp_info->port_addr + 818 offsetof(struct public_port, remote_dcbx_mib); 819 data.mib = &p_hwfn->p_dcbx_info->remote; 820 data.size = sizeof(struct dcbx_mib); 821 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 822 823 return rc; 824 } 825 826 static int 827 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 828 { 829 struct qed_dcbx_mib_meta_data data; 830 int rc = 0; 831 832 memset(&data, 0, sizeof(data)); 833 data.addr = p_hwfn->mcp_info->port_addr + 834 offsetof(struct public_port, local_admin_dcbx_mib); 835 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 836 data.size = sizeof(struct dcbx_local_params); 837 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 838 839 return rc; 840 } 841 842 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 843 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 844 { 845 int rc = -EINVAL; 846 847 switch (type) { 848 case QED_DCBX_OPERATIONAL_MIB: 849 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 850 break; 851 case QED_DCBX_REMOTE_MIB: 852 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 853 break; 854 case QED_DCBX_LOCAL_MIB: 855 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 856 break; 857 case QED_DCBX_REMOTE_LLDP_MIB: 858 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 859 break; 860 case QED_DCBX_LOCAL_LLDP_MIB: 861 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 862 break; 863 default: 864 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 865 } 866 867 return rc; 868 } 869 870 static void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type) 871 { 872 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common; 873 void *cookie = hwfn->cdev->ops_cookie; 874 875 if (cookie && op->dcbx_aen) 876 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type); 877 } 878 879 /* Read updated MIB. 880 * Reconfigure QM and invoke PF update ramrod command if operational MIB 881 * change is detected. 882 */ 883 int 884 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 885 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 886 { 887 int rc = 0; 888 889 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 890 if (rc) 891 return rc; 892 893 if (type == QED_DCBX_OPERATIONAL_MIB) { 894 rc = qed_dcbx_process_mib_info(p_hwfn); 895 if (!rc) { 896 /* reconfigure tcs of QM queues according 897 * to negotiation results 898 */ 899 qed_qm_reconf(p_hwfn, p_ptt); 900 901 /* update storm FW with negotiation results */ 902 qed_sp_pf_update(p_hwfn); 903 904 /* for roce PFs, we may want to enable/disable DPM 905 * when DCBx change occurs 906 */ 907 if (p_hwfn->hw_info.personality == 908 QED_PCI_ETH_ROCE) 909 qed_roce_dpm_dcbx(p_hwfn, p_ptt); 910 } 911 } 912 913 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 914 915 if (type == QED_DCBX_OPERATIONAL_MIB) { 916 struct qed_dcbx_results *p_data; 917 u16 val; 918 919 /* Configure in NIG which protocols support EDPM and should 920 * honor PFC. 921 */ 922 p_data = &p_hwfn->p_dcbx_info->results; 923 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) | 924 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc); 925 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT; 926 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN; 927 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val); 928 } 929 930 qed_dcbx_aen(p_hwfn, type); 931 932 return rc; 933 } 934 935 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 936 { 937 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 938 if (!p_hwfn->p_dcbx_info) 939 return -ENOMEM; 940 941 return 0; 942 } 943 944 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn) 945 { 946 kfree(p_hwfn->p_dcbx_info); 947 p_hwfn->p_dcbx_info = NULL; 948 } 949 950 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 951 struct qed_dcbx_results *p_src, 952 enum dcbx_protocol_type type) 953 { 954 p_data->dcb_enable_flag = p_src->arr[type].enable; 955 p_data->dcb_priority = p_src->arr[type].priority; 956 p_data->dcb_tc = p_src->arr[type].tc; 957 } 958 959 /* Set pf update ramrod command params */ 960 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 961 struct pf_update_ramrod_data *p_dest) 962 { 963 struct protocol_dcb_data *p_dcb_data; 964 u8 update_flag; 965 966 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 967 p_dest->update_fcoe_dcb_data_mode = update_flag; 968 969 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 970 p_dest->update_roce_dcb_data_mode = update_flag; 971 972 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 973 p_dest->update_rroce_dcb_data_mode = update_flag; 974 975 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 976 p_dest->update_iscsi_dcb_data_mode = update_flag; 977 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 978 p_dest->update_eth_dcb_data_mode = update_flag; 979 980 p_dcb_data = &p_dest->fcoe_dcb_data; 981 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 982 p_dcb_data = &p_dest->roce_dcb_data; 983 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE); 984 p_dcb_data = &p_dest->rroce_dcb_data; 985 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2); 986 p_dcb_data = &p_dest->iscsi_dcb_data; 987 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 988 p_dcb_data = &p_dest->eth_dcb_data; 989 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 990 } 991 992 #ifdef CONFIG_DCB 993 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 994 struct qed_dcbx_get *p_get, 995 enum qed_mib_read_type type) 996 { 997 struct qed_ptt *p_ptt; 998 int rc; 999 1000 if (IS_VF(p_hwfn->cdev)) 1001 return -EINVAL; 1002 1003 p_ptt = qed_ptt_acquire(p_hwfn); 1004 if (!p_ptt) 1005 return -EBUSY; 1006 1007 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 1008 if (rc) 1009 goto out; 1010 1011 rc = qed_dcbx_get_params(p_hwfn, p_get, type); 1012 1013 out: 1014 qed_ptt_release(p_hwfn, p_ptt); 1015 return rc; 1016 } 1017 1018 static void 1019 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 1020 u32 *pfc, struct qed_dcbx_params *p_params) 1021 { 1022 u8 pfc_map = 0; 1023 int i; 1024 1025 *pfc &= ~DCBX_PFC_ERROR_MASK; 1026 1027 if (p_params->pfc.willing) 1028 *pfc |= DCBX_PFC_WILLING_MASK; 1029 else 1030 *pfc &= ~DCBX_PFC_WILLING_MASK; 1031 1032 if (p_params->pfc.enabled) 1033 *pfc |= DCBX_PFC_ENABLED_MASK; 1034 else 1035 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1036 1037 *pfc &= ~DCBX_PFC_CAPS_MASK; 1038 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 1039 1040 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1041 if (p_params->pfc.prio[i]) 1042 pfc_map |= BIT(i); 1043 1044 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1045 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 1046 1047 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 1048 } 1049 1050 static void 1051 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 1052 struct dcbx_ets_feature *p_ets, 1053 struct qed_dcbx_params *p_params) 1054 { 1055 u8 *bw_map, *tsa_map; 1056 u32 val; 1057 int i; 1058 1059 if (p_params->ets_willing) 1060 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1061 else 1062 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1063 1064 if (p_params->ets_cbs) 1065 p_ets->flags |= DCBX_ETS_CBS_MASK; 1066 else 1067 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1068 1069 if (p_params->ets_enabled) 1070 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1071 else 1072 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1073 1074 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1075 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1076 1077 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1078 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1079 p_ets->pri_tc_tbl[0] = 0; 1080 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1081 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1082 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1083 /* Copy the priority value to the corresponding 4 bits in the 1084 * traffic class table. 1085 */ 1086 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1087 p_ets->pri_tc_tbl[0] |= val; 1088 } 1089 for (i = 0; i < 2; i++) { 1090 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1091 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1092 } 1093 } 1094 1095 static void 1096 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1097 struct dcbx_app_priority_feature *p_app, 1098 struct qed_dcbx_params *p_params, bool ieee) 1099 { 1100 u32 *entry; 1101 int i; 1102 1103 if (p_params->app_willing) 1104 p_app->flags |= DCBX_APP_WILLING_MASK; 1105 else 1106 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1107 1108 if (p_params->app_valid) 1109 p_app->flags |= DCBX_APP_ENABLED_MASK; 1110 else 1111 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1112 1113 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1114 p_app->flags |= (u32)p_params->num_app_entries << 1115 DCBX_APP_NUM_ENTRIES_SHIFT; 1116 1117 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1118 entry = &p_app->app_pri_tbl[i].entry; 1119 *entry = 0; 1120 if (ieee) { 1121 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1122 switch (p_params->app_entry[i].sf_ieee) { 1123 case QED_DCBX_SF_IEEE_ETHTYPE: 1124 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1125 DCBX_APP_SF_IEEE_SHIFT); 1126 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1127 DCBX_APP_SF_SHIFT); 1128 break; 1129 case QED_DCBX_SF_IEEE_TCP_PORT: 1130 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1131 DCBX_APP_SF_IEEE_SHIFT); 1132 *entry |= ((u32)DCBX_APP_SF_PORT << 1133 DCBX_APP_SF_SHIFT); 1134 break; 1135 case QED_DCBX_SF_IEEE_UDP_PORT: 1136 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1137 DCBX_APP_SF_IEEE_SHIFT); 1138 *entry |= ((u32)DCBX_APP_SF_PORT << 1139 DCBX_APP_SF_SHIFT); 1140 break; 1141 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1142 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1143 DCBX_APP_SF_IEEE_SHIFT); 1144 *entry |= ((u32)DCBX_APP_SF_PORT << 1145 DCBX_APP_SF_SHIFT); 1146 break; 1147 } 1148 } else { 1149 *entry &= ~DCBX_APP_SF_MASK; 1150 if (p_params->app_entry[i].ethtype) 1151 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1152 DCBX_APP_SF_SHIFT); 1153 else 1154 *entry |= ((u32)DCBX_APP_SF_PORT << 1155 DCBX_APP_SF_SHIFT); 1156 } 1157 1158 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1159 *entry |= ((u32)p_params->app_entry[i].proto_id << 1160 DCBX_APP_PROTOCOL_ID_SHIFT); 1161 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1162 *entry |= ((u32)(p_params->app_entry[i].prio) << 1163 DCBX_APP_PRI_MAP_SHIFT); 1164 } 1165 } 1166 1167 static void 1168 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1169 struct dcbx_local_params *local_admin, 1170 struct qed_dcbx_set *params) 1171 { 1172 bool ieee = false; 1173 1174 local_admin->flags = 0; 1175 memcpy(&local_admin->features, 1176 &p_hwfn->p_dcbx_info->operational.features, 1177 sizeof(local_admin->features)); 1178 1179 if (params->enabled) { 1180 local_admin->config = params->ver_num; 1181 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1182 } else { 1183 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1184 } 1185 1186 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n", 1187 local_admin->config); 1188 1189 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1190 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1191 ¶ms->config.params); 1192 1193 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1194 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1195 ¶ms->config.params); 1196 1197 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1198 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1199 ¶ms->config.params, ieee); 1200 } 1201 1202 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1203 struct qed_dcbx_set *params, bool hw_commit) 1204 { 1205 struct dcbx_local_params local_admin; 1206 struct qed_dcbx_mib_meta_data data; 1207 u32 resp = 0, param = 0; 1208 int rc = 0; 1209 1210 if (!hw_commit) { 1211 memcpy(&p_hwfn->p_dcbx_info->set, params, 1212 sizeof(struct qed_dcbx_set)); 1213 return 0; 1214 } 1215 1216 /* clear set-parmas cache */ 1217 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1218 1219 memset(&local_admin, 0, sizeof(local_admin)); 1220 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1221 1222 data.addr = p_hwfn->mcp_info->port_addr + 1223 offsetof(struct public_port, local_admin_dcbx_mib); 1224 data.local_admin = &local_admin; 1225 data.size = sizeof(struct dcbx_local_params); 1226 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1227 1228 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1229 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1230 if (rc) 1231 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1232 1233 return rc; 1234 } 1235 1236 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1237 struct qed_dcbx_set *params) 1238 { 1239 struct qed_dcbx_get *dcbx_info; 1240 int rc; 1241 1242 if (p_hwfn->p_dcbx_info->set.config.valid) { 1243 memcpy(params, &p_hwfn->p_dcbx_info->set, 1244 sizeof(struct qed_dcbx_set)); 1245 return 0; 1246 } 1247 1248 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1249 if (!dcbx_info) 1250 return -ENOMEM; 1251 1252 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1253 if (rc) { 1254 kfree(dcbx_info); 1255 return rc; 1256 } 1257 1258 p_hwfn->p_dcbx_info->set.override_flags = 0; 1259 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1260 if (dcbx_info->operational.cee) 1261 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1262 if (dcbx_info->operational.ieee) 1263 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1264 if (dcbx_info->operational.local) 1265 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1266 1267 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1268 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1269 &dcbx_info->operational.params, 1270 sizeof(struct qed_dcbx_admin_params)); 1271 p_hwfn->p_dcbx_info->set.config.valid = true; 1272 1273 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1274 1275 kfree(dcbx_info); 1276 1277 return 0; 1278 } 1279 1280 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1281 enum qed_mib_read_type type) 1282 { 1283 struct qed_dcbx_get *dcbx_info; 1284 1285 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_ATOMIC); 1286 if (!dcbx_info) 1287 return NULL; 1288 1289 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1290 kfree(dcbx_info); 1291 return NULL; 1292 } 1293 1294 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1295 !dcbx_info->operational.enabled) { 1296 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1297 kfree(dcbx_info); 1298 return NULL; 1299 } 1300 1301 return dcbx_info; 1302 } 1303 1304 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1305 { 1306 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1307 struct qed_dcbx_get *dcbx_info; 1308 bool enabled; 1309 1310 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1311 if (!dcbx_info) 1312 return 0; 1313 1314 enabled = dcbx_info->operational.enabled; 1315 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1316 kfree(dcbx_info); 1317 1318 return enabled; 1319 } 1320 1321 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1322 { 1323 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1324 struct qed_dcbx_set dcbx_set; 1325 struct qed_ptt *ptt; 1326 int rc; 1327 1328 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1329 1330 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1331 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1332 if (rc) 1333 return 1; 1334 1335 dcbx_set.enabled = !!state; 1336 1337 ptt = qed_ptt_acquire(hwfn); 1338 if (!ptt) 1339 return 1; 1340 1341 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1342 1343 qed_ptt_release(hwfn, ptt); 1344 1345 return rc ? 1 : 0; 1346 } 1347 1348 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1349 u8 *pgid, u8 *bw_pct, u8 *up_map) 1350 { 1351 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1352 struct qed_dcbx_get *dcbx_info; 1353 1354 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1355 *prio_type = *pgid = *bw_pct = *up_map = 0; 1356 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1357 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1358 return; 1359 } 1360 1361 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1362 if (!dcbx_info) 1363 return; 1364 1365 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1366 kfree(dcbx_info); 1367 } 1368 1369 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1370 { 1371 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1372 struct qed_dcbx_get *dcbx_info; 1373 1374 *bw_pct = 0; 1375 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1376 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1377 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1378 return; 1379 } 1380 1381 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1382 if (!dcbx_info) 1383 return; 1384 1385 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1386 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1387 kfree(dcbx_info); 1388 } 1389 1390 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1391 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1392 { 1393 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1394 *prio = *bwg_id = *bw_pct = *up_map = 0; 1395 } 1396 1397 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1398 int bwg_id, u8 *bw_pct) 1399 { 1400 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1401 *bw_pct = 0; 1402 } 1403 1404 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1405 int priority, u8 *setting) 1406 { 1407 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1408 struct qed_dcbx_get *dcbx_info; 1409 1410 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1411 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1412 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1413 return; 1414 } 1415 1416 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1417 if (!dcbx_info) 1418 return; 1419 1420 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1421 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1422 kfree(dcbx_info); 1423 } 1424 1425 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1426 { 1427 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1428 struct qed_dcbx_set dcbx_set; 1429 struct qed_ptt *ptt; 1430 int rc; 1431 1432 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1433 priority, setting); 1434 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1435 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1436 return; 1437 } 1438 1439 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1440 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1441 if (rc) 1442 return; 1443 1444 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1445 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1446 1447 ptt = qed_ptt_acquire(hwfn); 1448 if (!ptt) 1449 return; 1450 1451 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1452 1453 qed_ptt_release(hwfn, ptt); 1454 } 1455 1456 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1457 { 1458 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1459 struct qed_dcbx_get *dcbx_info; 1460 int rc = 0; 1461 1462 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1463 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1464 if (!dcbx_info) 1465 return 1; 1466 1467 switch (capid) { 1468 case DCB_CAP_ATTR_PG: 1469 case DCB_CAP_ATTR_PFC: 1470 case DCB_CAP_ATTR_UP2TC: 1471 case DCB_CAP_ATTR_GSP: 1472 *cap = true; 1473 break; 1474 case DCB_CAP_ATTR_PG_TCS: 1475 case DCB_CAP_ATTR_PFC_TCS: 1476 *cap = 0x80; 1477 break; 1478 case DCB_CAP_ATTR_DCBX: 1479 *cap = (DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_VER_IEEE | 1480 DCB_CAP_DCBX_STATIC); 1481 break; 1482 default: 1483 *cap = false; 1484 rc = 1; 1485 } 1486 1487 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1488 kfree(dcbx_info); 1489 1490 return rc; 1491 } 1492 1493 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1494 { 1495 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1496 struct qed_dcbx_get *dcbx_info; 1497 int rc = 0; 1498 1499 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1500 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1501 if (!dcbx_info) 1502 return -EINVAL; 1503 1504 switch (tcid) { 1505 case DCB_NUMTCS_ATTR_PG: 1506 *num = dcbx_info->operational.params.max_ets_tc; 1507 break; 1508 case DCB_NUMTCS_ATTR_PFC: 1509 *num = dcbx_info->operational.params.pfc.max_tc; 1510 break; 1511 default: 1512 rc = -EINVAL; 1513 } 1514 1515 kfree(dcbx_info); 1516 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1517 1518 return rc; 1519 } 1520 1521 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1522 { 1523 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1524 struct qed_dcbx_get *dcbx_info; 1525 bool enabled; 1526 1527 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1528 if (!dcbx_info) 1529 return 0; 1530 1531 enabled = dcbx_info->operational.params.pfc.enabled; 1532 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1533 kfree(dcbx_info); 1534 1535 return enabled; 1536 } 1537 1538 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1539 { 1540 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1541 struct qed_dcbx_get *dcbx_info; 1542 u8 mode = 0; 1543 1544 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1545 if (!dcbx_info) 1546 return 0; 1547 1548 if (dcbx_info->operational.ieee) 1549 mode |= DCB_CAP_DCBX_VER_IEEE; 1550 if (dcbx_info->operational.cee) 1551 mode |= DCB_CAP_DCBX_VER_CEE; 1552 if (dcbx_info->operational.local) 1553 mode |= DCB_CAP_DCBX_STATIC; 1554 1555 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1556 kfree(dcbx_info); 1557 1558 return mode; 1559 } 1560 1561 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1562 int tc, 1563 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1564 { 1565 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1566 struct qed_dcbx_set dcbx_set; 1567 struct qed_ptt *ptt; 1568 int rc; 1569 1570 DP_VERBOSE(hwfn, QED_MSG_DCB, 1571 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1572 tc, pri_type, pgid, bw_pct, up_map); 1573 1574 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1575 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1576 return; 1577 } 1578 1579 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1580 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1581 if (rc) 1582 return; 1583 1584 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1585 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1586 1587 ptt = qed_ptt_acquire(hwfn); 1588 if (!ptt) 1589 return; 1590 1591 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1592 1593 qed_ptt_release(hwfn, ptt); 1594 } 1595 1596 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1597 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1598 { 1599 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1600 } 1601 1602 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1603 { 1604 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1605 struct qed_dcbx_set dcbx_set; 1606 struct qed_ptt *ptt; 1607 int rc; 1608 1609 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1610 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1611 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1612 return; 1613 } 1614 1615 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1616 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1617 if (rc) 1618 return; 1619 1620 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1621 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1622 1623 ptt = qed_ptt_acquire(hwfn); 1624 if (!ptt) 1625 return; 1626 1627 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1628 1629 qed_ptt_release(hwfn, ptt); 1630 } 1631 1632 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1633 { 1634 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1635 } 1636 1637 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1638 { 1639 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1640 struct qed_dcbx_set dcbx_set; 1641 struct qed_ptt *ptt; 1642 int rc; 1643 1644 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1645 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1646 if (rc) 1647 return 1; 1648 1649 ptt = qed_ptt_acquire(hwfn); 1650 if (!ptt) 1651 return 1; 1652 1653 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1654 1655 qed_ptt_release(hwfn, ptt); 1656 1657 return rc; 1658 } 1659 1660 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1661 { 1662 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1663 struct qed_dcbx_set dcbx_set; 1664 struct qed_ptt *ptt; 1665 int rc; 1666 1667 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1668 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1669 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1670 if (rc) 1671 return 1; 1672 1673 switch (tcid) { 1674 case DCB_NUMTCS_ATTR_PG: 1675 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1676 dcbx_set.config.params.max_ets_tc = num; 1677 break; 1678 case DCB_NUMTCS_ATTR_PFC: 1679 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1680 dcbx_set.config.params.pfc.max_tc = num; 1681 break; 1682 default: 1683 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1684 return -EINVAL; 1685 } 1686 1687 ptt = qed_ptt_acquire(hwfn); 1688 if (!ptt) 1689 return -EINVAL; 1690 1691 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1692 1693 qed_ptt_release(hwfn, ptt); 1694 1695 return 0; 1696 } 1697 1698 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1699 { 1700 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1701 struct qed_dcbx_set dcbx_set; 1702 struct qed_ptt *ptt; 1703 int rc; 1704 1705 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1706 1707 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1708 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1709 if (rc) 1710 return; 1711 1712 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1713 dcbx_set.config.params.pfc.enabled = !!state; 1714 1715 ptt = qed_ptt_acquire(hwfn); 1716 if (!ptt) 1717 return; 1718 1719 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1720 1721 qed_ptt_release(hwfn, ptt); 1722 } 1723 1724 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1725 { 1726 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1727 struct qed_dcbx_get *dcbx_info; 1728 struct qed_app_entry *entry; 1729 bool ethtype; 1730 u8 prio = 0; 1731 int i; 1732 1733 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1734 if (!dcbx_info) 1735 return -EINVAL; 1736 1737 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1738 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1739 entry = &dcbx_info->operational.params.app_entry[i]; 1740 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1741 prio = entry->prio; 1742 break; 1743 } 1744 } 1745 1746 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1747 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1748 kfree(dcbx_info); 1749 return -EINVAL; 1750 } 1751 1752 kfree(dcbx_info); 1753 1754 return prio; 1755 } 1756 1757 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1758 u8 idtype, u16 idval, u8 pri_map) 1759 { 1760 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1761 struct qed_dcbx_set dcbx_set; 1762 struct qed_app_entry *entry; 1763 struct qed_ptt *ptt; 1764 bool ethtype; 1765 int rc, i; 1766 1767 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1768 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1769 if (rc) 1770 return -EINVAL; 1771 1772 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1773 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1774 entry = &dcbx_set.config.params.app_entry[i]; 1775 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1776 break; 1777 /* First empty slot */ 1778 if (!entry->proto_id) { 1779 dcbx_set.config.params.num_app_entries++; 1780 break; 1781 } 1782 } 1783 1784 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1785 DP_ERR(cdev, "App table is full\n"); 1786 return -EBUSY; 1787 } 1788 1789 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1790 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1791 dcbx_set.config.params.app_entry[i].proto_id = idval; 1792 dcbx_set.config.params.app_entry[i].prio = pri_map; 1793 1794 ptt = qed_ptt_acquire(hwfn); 1795 if (!ptt) 1796 return -EBUSY; 1797 1798 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1799 1800 qed_ptt_release(hwfn, ptt); 1801 1802 return rc; 1803 } 1804 1805 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1806 { 1807 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1808 struct qed_dcbx_set dcbx_set; 1809 struct qed_ptt *ptt; 1810 int rc; 1811 1812 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1813 1814 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && 1815 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) { 1816 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n"); 1817 return 1; 1818 } 1819 1820 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1821 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1822 if (rc) 1823 return 1; 1824 1825 dcbx_set.ver_num = 0; 1826 if (mode & DCB_CAP_DCBX_VER_CEE) { 1827 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1828 dcbx_set.enabled = true; 1829 } 1830 1831 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1832 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1833 dcbx_set.enabled = true; 1834 } 1835 1836 if (mode & DCB_CAP_DCBX_STATIC) { 1837 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1838 dcbx_set.enabled = true; 1839 } 1840 1841 ptt = qed_ptt_acquire(hwfn); 1842 if (!ptt) 1843 return 1; 1844 1845 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1846 1847 qed_ptt_release(hwfn, ptt); 1848 1849 return rc; 1850 } 1851 1852 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1853 { 1854 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1855 struct qed_dcbx_get *dcbx_info; 1856 1857 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1858 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1859 if (!dcbx_info) 1860 return 1; 1861 1862 *flags = 0; 1863 switch (featid) { 1864 case DCB_FEATCFG_ATTR_PG: 1865 if (dcbx_info->operational.params.ets_enabled) 1866 *flags = DCB_FEATCFG_ENABLE; 1867 else 1868 *flags = DCB_FEATCFG_ERROR; 1869 break; 1870 case DCB_FEATCFG_ATTR_PFC: 1871 if (dcbx_info->operational.params.pfc.enabled) 1872 *flags = DCB_FEATCFG_ENABLE; 1873 else 1874 *flags = DCB_FEATCFG_ERROR; 1875 break; 1876 case DCB_FEATCFG_ATTR_APP: 1877 if (dcbx_info->operational.params.app_valid) 1878 *flags = DCB_FEATCFG_ENABLE; 1879 else 1880 *flags = DCB_FEATCFG_ERROR; 1881 break; 1882 default: 1883 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1884 kfree(dcbx_info); 1885 return 1; 1886 } 1887 1888 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1889 kfree(dcbx_info); 1890 1891 return 0; 1892 } 1893 1894 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1895 { 1896 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1897 struct qed_dcbx_set dcbx_set; 1898 bool enabled, willing; 1899 struct qed_ptt *ptt; 1900 int rc; 1901 1902 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1903 featid, flags); 1904 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1905 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1906 if (rc) 1907 return 1; 1908 1909 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1910 willing = !!(flags & DCB_FEATCFG_WILLING); 1911 switch (featid) { 1912 case DCB_FEATCFG_ATTR_PG: 1913 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1914 dcbx_set.config.params.ets_enabled = enabled; 1915 dcbx_set.config.params.ets_willing = willing; 1916 break; 1917 case DCB_FEATCFG_ATTR_PFC: 1918 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1919 dcbx_set.config.params.pfc.enabled = enabled; 1920 dcbx_set.config.params.pfc.willing = willing; 1921 break; 1922 case DCB_FEATCFG_ATTR_APP: 1923 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1924 dcbx_set.config.params.app_willing = willing; 1925 break; 1926 default: 1927 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1928 return 1; 1929 } 1930 1931 ptt = qed_ptt_acquire(hwfn); 1932 if (!ptt) 1933 return 1; 1934 1935 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1936 1937 qed_ptt_release(hwfn, ptt); 1938 1939 return 0; 1940 } 1941 1942 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1943 struct dcb_peer_app_info *info, 1944 u16 *app_count) 1945 { 1946 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1947 struct qed_dcbx_get *dcbx_info; 1948 1949 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1950 if (!dcbx_info) 1951 return -EINVAL; 1952 1953 info->willing = dcbx_info->remote.params.app_willing; 1954 info->error = dcbx_info->remote.params.app_error; 1955 *app_count = dcbx_info->remote.params.num_app_entries; 1956 kfree(dcbx_info); 1957 1958 return 0; 1959 } 1960 1961 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1962 struct dcb_app *table) 1963 { 1964 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1965 struct qed_dcbx_get *dcbx_info; 1966 int i; 1967 1968 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1969 if (!dcbx_info) 1970 return -EINVAL; 1971 1972 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 1973 if (dcbx_info->remote.params.app_entry[i].ethtype) 1974 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 1975 else 1976 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 1977 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 1978 table[i].protocol = 1979 dcbx_info->remote.params.app_entry[i].proto_id; 1980 } 1981 1982 kfree(dcbx_info); 1983 1984 return 0; 1985 } 1986 1987 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 1988 { 1989 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1990 struct qed_dcbx_get *dcbx_info; 1991 int i; 1992 1993 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1994 if (!dcbx_info) 1995 return -EINVAL; 1996 1997 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1998 if (dcbx_info->remote.params.pfc.prio[i]) 1999 pfc->pfc_en |= BIT(i); 2000 2001 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 2002 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 2003 pfc->pfc_en, pfc->tcs_supported); 2004 kfree(dcbx_info); 2005 2006 return 0; 2007 } 2008 2009 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 2010 { 2011 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2012 struct qed_dcbx_get *dcbx_info; 2013 int i; 2014 2015 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2016 if (!dcbx_info) 2017 return -EINVAL; 2018 2019 pg->willing = dcbx_info->remote.params.ets_willing; 2020 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 2021 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 2022 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 2023 } 2024 2025 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 2026 kfree(dcbx_info); 2027 2028 return 0; 2029 } 2030 2031 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 2032 struct ieee_pfc *pfc, bool remote) 2033 { 2034 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2035 struct qed_dcbx_params *params; 2036 struct qed_dcbx_get *dcbx_info; 2037 int rc, i; 2038 2039 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2040 if (!dcbx_info) 2041 return -EINVAL; 2042 2043 if (!dcbx_info->operational.ieee) { 2044 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2045 kfree(dcbx_info); 2046 return -EINVAL; 2047 } 2048 2049 if (remote) { 2050 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2051 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2052 QED_DCBX_REMOTE_MIB); 2053 if (rc) { 2054 kfree(dcbx_info); 2055 return -EINVAL; 2056 } 2057 2058 params = &dcbx_info->remote.params; 2059 } else { 2060 params = &dcbx_info->operational.params; 2061 } 2062 2063 pfc->pfc_cap = params->pfc.max_tc; 2064 pfc->pfc_en = 0; 2065 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2066 if (params->pfc.prio[i]) 2067 pfc->pfc_en |= BIT(i); 2068 2069 kfree(dcbx_info); 2070 2071 return 0; 2072 } 2073 2074 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2075 { 2076 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2077 } 2078 2079 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2080 { 2081 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2082 struct qed_dcbx_get *dcbx_info; 2083 struct qed_dcbx_set dcbx_set; 2084 struct qed_ptt *ptt; 2085 int rc, i; 2086 2087 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2088 if (!dcbx_info) 2089 return -EINVAL; 2090 2091 if (!dcbx_info->operational.ieee) { 2092 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2093 kfree(dcbx_info); 2094 return -EINVAL; 2095 } 2096 2097 kfree(dcbx_info); 2098 2099 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2100 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2101 if (rc) 2102 return -EINVAL; 2103 2104 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2105 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2106 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2107 2108 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap; 2109 2110 ptt = qed_ptt_acquire(hwfn); 2111 if (!ptt) 2112 return -EINVAL; 2113 2114 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2115 2116 qed_ptt_release(hwfn, ptt); 2117 2118 return rc; 2119 } 2120 2121 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2122 struct ieee_ets *ets, bool remote) 2123 { 2124 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2125 struct qed_dcbx_get *dcbx_info; 2126 struct qed_dcbx_params *params; 2127 int rc; 2128 2129 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2130 if (!dcbx_info) 2131 return -EINVAL; 2132 2133 if (!dcbx_info->operational.ieee) { 2134 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2135 kfree(dcbx_info); 2136 return -EINVAL; 2137 } 2138 2139 if (remote) { 2140 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2141 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2142 QED_DCBX_REMOTE_MIB); 2143 if (rc) { 2144 kfree(dcbx_info); 2145 return -EINVAL; 2146 } 2147 2148 params = &dcbx_info->remote.params; 2149 } else { 2150 params = &dcbx_info->operational.params; 2151 } 2152 2153 ets->ets_cap = params->max_ets_tc; 2154 ets->willing = params->ets_willing; 2155 ets->cbs = params->ets_cbs; 2156 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2157 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2158 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2159 kfree(dcbx_info); 2160 2161 return 0; 2162 } 2163 2164 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2165 { 2166 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2167 } 2168 2169 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2170 { 2171 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2172 struct qed_dcbx_get *dcbx_info; 2173 struct qed_dcbx_set dcbx_set; 2174 struct qed_ptt *ptt; 2175 int rc; 2176 2177 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2178 if (!dcbx_info) 2179 return -EINVAL; 2180 2181 if (!dcbx_info->operational.ieee) { 2182 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2183 kfree(dcbx_info); 2184 return -EINVAL; 2185 } 2186 2187 kfree(dcbx_info); 2188 2189 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2190 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2191 if (rc) 2192 return -EINVAL; 2193 2194 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2195 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2196 dcbx_set.config.params.ets_willing = ets->willing; 2197 dcbx_set.config.params.ets_cbs = ets->cbs; 2198 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2199 sizeof(ets->tc_tx_bw)); 2200 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2201 sizeof(ets->tc_tsa)); 2202 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2203 sizeof(ets->prio_tc)); 2204 2205 ptt = qed_ptt_acquire(hwfn); 2206 if (!ptt) 2207 return -EINVAL; 2208 2209 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2210 2211 qed_ptt_release(hwfn, ptt); 2212 2213 return rc; 2214 } 2215 2216 static int 2217 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2218 { 2219 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2220 } 2221 2222 static int 2223 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2224 { 2225 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2226 } 2227 2228 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee) 2229 { 2230 switch (selector) { 2231 case IEEE_8021QAZ_APP_SEL_ETHERTYPE: 2232 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 2233 break; 2234 case IEEE_8021QAZ_APP_SEL_STREAM: 2235 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 2236 break; 2237 case IEEE_8021QAZ_APP_SEL_DGRAM: 2238 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 2239 break; 2240 case IEEE_8021QAZ_APP_SEL_ANY: 2241 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 2242 break; 2243 default: 2244 return -EINVAL; 2245 } 2246 2247 return 0; 2248 } 2249 2250 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2251 { 2252 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2253 struct qed_dcbx_get *dcbx_info; 2254 struct qed_app_entry *entry; 2255 u8 prio = 0; 2256 u8 sf_ieee; 2257 int i; 2258 2259 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n", 2260 app->selector, app->protocol); 2261 2262 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2263 DP_INFO(cdev, "Invalid selector field value %d\n", 2264 app->selector); 2265 return -EINVAL; 2266 } 2267 2268 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2269 if (!dcbx_info) 2270 return -EINVAL; 2271 2272 if (!dcbx_info->operational.ieee) { 2273 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2274 kfree(dcbx_info); 2275 return -EINVAL; 2276 } 2277 2278 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2279 entry = &dcbx_info->operational.params.app_entry[i]; 2280 if ((entry->sf_ieee == sf_ieee) && 2281 (entry->proto_id == app->protocol)) { 2282 prio = entry->prio; 2283 break; 2284 } 2285 } 2286 2287 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2288 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2289 app->protocol); 2290 kfree(dcbx_info); 2291 return -EINVAL; 2292 } 2293 2294 app->priority = ffs(prio) - 1; 2295 2296 kfree(dcbx_info); 2297 2298 return 0; 2299 } 2300 2301 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2302 { 2303 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2304 struct qed_dcbx_get *dcbx_info; 2305 struct qed_dcbx_set dcbx_set; 2306 struct qed_app_entry *entry; 2307 struct qed_ptt *ptt; 2308 u8 sf_ieee; 2309 int rc, i; 2310 2311 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n", 2312 app->selector, app->protocol, app->priority); 2313 if (app->priority >= QED_MAX_PFC_PRIORITIES) { 2314 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2315 return -EINVAL; 2316 } 2317 2318 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2319 DP_INFO(cdev, "Invalid selector field value %d\n", 2320 app->selector); 2321 return -EINVAL; 2322 } 2323 2324 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2325 if (!dcbx_info) 2326 return -EINVAL; 2327 2328 if (!dcbx_info->operational.ieee) { 2329 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2330 kfree(dcbx_info); 2331 return -EINVAL; 2332 } 2333 2334 kfree(dcbx_info); 2335 2336 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2337 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2338 if (rc) 2339 return -EINVAL; 2340 2341 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2342 entry = &dcbx_set.config.params.app_entry[i]; 2343 if ((entry->sf_ieee == sf_ieee) && 2344 (entry->proto_id == app->protocol)) 2345 break; 2346 /* First empty slot */ 2347 if (!entry->proto_id) { 2348 dcbx_set.config.params.num_app_entries++; 2349 break; 2350 } 2351 } 2352 2353 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2354 DP_ERR(cdev, "App table is full\n"); 2355 return -EBUSY; 2356 } 2357 2358 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2359 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee; 2360 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2361 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2362 2363 ptt = qed_ptt_acquire(hwfn); 2364 if (!ptt) 2365 return -EBUSY; 2366 2367 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2368 2369 qed_ptt_release(hwfn, ptt); 2370 2371 return rc; 2372 } 2373 2374 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2375 .getstate = qed_dcbnl_getstate, 2376 .setstate = qed_dcbnl_setstate, 2377 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2378 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2379 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2380 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2381 .getpfccfg = qed_dcbnl_getpfccfg, 2382 .setpfccfg = qed_dcbnl_setpfccfg, 2383 .getcap = qed_dcbnl_getcap, 2384 .getnumtcs = qed_dcbnl_getnumtcs, 2385 .getpfcstate = qed_dcbnl_getpfcstate, 2386 .getdcbx = qed_dcbnl_getdcbx, 2387 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2388 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2389 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2390 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2391 .setall = qed_dcbnl_setall, 2392 .setnumtcs = qed_dcbnl_setnumtcs, 2393 .setpfcstate = qed_dcbnl_setpfcstate, 2394 .setapp = qed_dcbnl_setapp, 2395 .setdcbx = qed_dcbnl_setdcbx, 2396 .setfeatcfg = qed_dcbnl_setfeatcfg, 2397 .getfeatcfg = qed_dcbnl_getfeatcfg, 2398 .getapp = qed_dcbnl_getapp, 2399 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2400 .peer_getapptable = qed_dcbnl_peer_getapptable, 2401 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2402 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2403 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2404 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2405 .ieee_getets = qed_dcbnl_ieee_getets, 2406 .ieee_setets = qed_dcbnl_ieee_setets, 2407 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2408 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2409 .ieee_getapp = qed_dcbnl_ieee_getapp, 2410 .ieee_setapp = qed_dcbnl_ieee_setapp, 2411 }; 2412 2413 #endif 2414