1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/bitops.h> 36 #include <linux/dcbnl.h> 37 #include <linux/errno.h> 38 #include <linux/kernel.h> 39 #include <linux/slab.h> 40 #include <linux/string.h> 41 #include "qed.h" 42 #include "qed_cxt.h" 43 #include "qed_dcbx.h" 44 #include "qed_hsi.h" 45 #include "qed_sp.h" 46 #include "qed_sriov.h" 47 #include "qed_rdma.h" 48 #ifdef CONFIG_DCB 49 #include <linux/qed/qed_eth_if.h> 50 #endif 51 52 #define QED_DCBX_MAX_MIB_READ_TRY (100) 53 #define QED_ETH_TYPE_DEFAULT (0) 54 #define QED_ETH_TYPE_ROCE (0x8915) 55 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 56 #define QED_ETH_TYPE_FCOE (0x8906) 57 #define QED_TCP_PORT_ISCSI (0xCBC) 58 59 #define QED_DCBX_INVALID_PRIORITY 0xFF 60 61 /* Get Traffic Class from priority traffic class table, 4 bits represent 62 * the traffic class corresponding to the priority. 63 */ 64 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 65 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 66 67 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 68 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI}, 69 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE}, 70 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE}, 71 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE}, 72 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}, 73 }; 74 75 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 76 { 77 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 78 DCBX_APP_SF_ETHTYPE); 79 } 80 81 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 82 { 83 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 84 85 /* Old MFW */ 86 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 87 return qed_dcbx_app_ethtype(app_info_bitmap); 88 89 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 90 } 91 92 static bool qed_dcbx_app_port(u32 app_info_bitmap) 93 { 94 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 95 DCBX_APP_SF_PORT); 96 } 97 98 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 99 { 100 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 101 102 /* Old MFW */ 103 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 104 return qed_dcbx_app_port(app_info_bitmap); 105 106 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 107 } 108 109 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 110 { 111 bool ethtype; 112 113 if (ieee) 114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 115 else 116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 117 118 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 119 } 120 121 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 122 { 123 bool port; 124 125 if (ieee) 126 port = qed_dcbx_ieee_app_port(app_info_bitmap, 127 DCBX_APP_SF_IEEE_TCP_PORT); 128 else 129 port = qed_dcbx_app_port(app_info_bitmap); 130 131 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 132 } 133 134 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 135 { 136 bool ethtype; 137 138 if (ieee) 139 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 140 else 141 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 142 143 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 144 } 145 146 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 147 { 148 bool ethtype; 149 150 if (ieee) 151 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 152 else 153 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 154 155 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 156 } 157 158 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 159 { 160 bool port; 161 162 if (ieee) 163 port = qed_dcbx_ieee_app_port(app_info_bitmap, 164 DCBX_APP_SF_IEEE_UDP_PORT); 165 else 166 port = qed_dcbx_app_port(app_info_bitmap); 167 168 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 169 } 170 171 static void 172 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 173 { 174 enum dcbx_protocol_type id; 175 int i; 176 177 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 178 p_data->dcbx_enabled); 179 180 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 181 id = qed_dcbx_app_update[i].id; 182 183 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 184 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 185 qed_dcbx_app_update[i].name, p_data->arr[id].update, 186 p_data->arr[id].enable, p_data->arr[id].priority, 187 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); 188 } 189 } 190 191 static void 192 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 193 struct qed_hw_info *p_info, 194 bool enable, 195 u8 prio, 196 u8 tc, 197 enum dcbx_protocol_type type, 198 enum qed_pci_personality personality) 199 { 200 /* PF update ramrod data */ 201 p_data->arr[type].enable = enable; 202 p_data->arr[type].priority = prio; 203 p_data->arr[type].tc = tc; 204 if (enable) 205 p_data->arr[type].update = UPDATE_DCB; 206 else 207 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP; 208 209 /* QM reconf data */ 210 if (p_info->personality == personality) 211 p_info->offload_tc = tc; 212 } 213 214 /* Update app protocol data and hw_info fields with the TLV info */ 215 static void 216 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 217 struct qed_hwfn *p_hwfn, 218 bool enable, 219 u8 prio, u8 tc, enum dcbx_protocol_type type) 220 { 221 struct qed_hw_info *p_info = &p_hwfn->hw_info; 222 enum qed_pci_personality personality; 223 enum dcbx_protocol_type id; 224 char *name; 225 int i; 226 227 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 228 id = qed_dcbx_app_update[i].id; 229 230 if (type != id) 231 continue; 232 233 personality = qed_dcbx_app_update[i].personality; 234 name = qed_dcbx_app_update[i].name; 235 236 qed_dcbx_set_params(p_data, p_info, enable, 237 prio, tc, type, personality); 238 } 239 } 240 241 static bool 242 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 243 u32 app_prio_bitmap, 244 u16 id, enum dcbx_protocol_type *type, bool ieee) 245 { 246 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 247 *type = DCBX_PROTOCOL_FCOE; 248 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 249 *type = DCBX_PROTOCOL_ROCE; 250 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 251 *type = DCBX_PROTOCOL_ISCSI; 252 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 253 *type = DCBX_PROTOCOL_ETH; 254 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 255 *type = DCBX_PROTOCOL_ROCE_V2; 256 } else { 257 *type = DCBX_MAX_PROTOCOL_TYPE; 258 DP_ERR(p_hwfn, 259 "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n", 260 id, app_prio_bitmap); 261 return false; 262 } 263 264 return true; 265 } 266 267 /* Parse app TLV's to update TC information in hw_info structure for 268 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 269 */ 270 static int 271 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 272 struct qed_dcbx_results *p_data, 273 struct dcbx_app_priority_entry *p_tbl, 274 u32 pri_tc_tbl, int count, u8 dcbx_version) 275 { 276 enum dcbx_protocol_type type; 277 u8 tc, priority_map; 278 bool enable, ieee; 279 u16 protocol_id; 280 int priority; 281 int i; 282 283 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 284 285 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 286 /* Parse APP TLV */ 287 for (i = 0; i < count; i++) { 288 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 289 DCBX_APP_PROTOCOL_ID); 290 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 291 DCBX_APP_PRI_MAP); 292 priority = ffs(priority_map) - 1; 293 if (priority < 0) { 294 DP_ERR(p_hwfn, "Invalid priority\n"); 295 return -EINVAL; 296 } 297 298 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 299 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 300 protocol_id, &type, ieee)) { 301 /* ETH always have the enable bit reset, as it gets 302 * vlan information per packet. For other protocols, 303 * should be set according to the dcbx_enabled 304 * indication, but we only got here if there was an 305 * app tlv for the protocol, so dcbx must be enabled. 306 */ 307 enable = !(type == DCBX_PROTOCOL_ETH); 308 309 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 310 priority, tc, type); 311 } 312 } 313 314 /* Update ramrod protocol data and hw_info fields 315 * with default info when corresponding APP TLV's are not detected. 316 * The enabled field has a different logic for ethernet as only for 317 * ethernet dcb should disabled by default, as the information arrives 318 * from the OS (unless an explicit app tlv was present). 319 */ 320 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 321 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 322 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 323 if (p_data->arr[type].update) 324 continue; 325 326 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 327 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 328 priority, tc, type); 329 } 330 331 return 0; 332 } 333 334 /* Parse app TLV's to update TC information in hw_info structure for 335 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 336 */ 337 static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 338 { 339 struct dcbx_app_priority_feature *p_app; 340 struct dcbx_app_priority_entry *p_tbl; 341 struct qed_dcbx_results data = { 0 }; 342 struct dcbx_ets_feature *p_ets; 343 struct qed_hw_info *p_info; 344 u32 pri_tc_tbl, flags; 345 u8 dcbx_version; 346 int num_entries; 347 int rc = 0; 348 349 flags = p_hwfn->p_dcbx_info->operational.flags; 350 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 351 352 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 353 p_tbl = p_app->app_pri_tbl; 354 355 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 356 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 357 358 p_info = &p_hwfn->hw_info; 359 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 360 361 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, 362 num_entries, dcbx_version); 363 if (rc) 364 return rc; 365 366 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags, 367 DCBX_ETS_MAX_TCS); 368 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC); 369 data.pf_id = p_hwfn->rel_pf_id; 370 data.dcbx_enabled = !!dcbx_version; 371 372 qed_dcbx_dp_protocol(p_hwfn, &data); 373 374 memcpy(&p_hwfn->p_dcbx_info->results, &data, 375 sizeof(struct qed_dcbx_results)); 376 377 return 0; 378 } 379 380 static int 381 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 382 struct qed_ptt *p_ptt, 383 struct qed_dcbx_mib_meta_data *p_data, 384 enum qed_mib_read_type type) 385 { 386 u32 prefix_seq_num, suffix_seq_num; 387 int read_count = 0; 388 int rc = 0; 389 390 /* The data is considered to be valid only if both sequence numbers are 391 * the same. 392 */ 393 do { 394 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 395 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 396 p_data->addr, p_data->size); 397 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 398 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 399 } else { 400 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 401 p_data->addr, p_data->size); 402 prefix_seq_num = p_data->mib->prefix_seq_num; 403 suffix_seq_num = p_data->mib->suffix_seq_num; 404 } 405 read_count++; 406 407 DP_VERBOSE(p_hwfn, 408 QED_MSG_DCB, 409 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 410 type, read_count, prefix_seq_num, suffix_seq_num); 411 } while ((prefix_seq_num != suffix_seq_num) && 412 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 413 414 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 415 DP_ERR(p_hwfn, 416 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 417 type, read_count, prefix_seq_num, suffix_seq_num); 418 rc = -EIO; 419 } 420 421 return rc; 422 } 423 424 static void 425 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 426 struct qed_dcbx_app_prio *p_prio, 427 struct qed_dcbx_results *p_results) 428 { 429 u8 val; 430 431 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 432 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 433 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 434 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 435 436 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 437 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 438 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 439 440 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 441 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 442 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 443 p_prio->roce_v2 = val; 444 } 445 446 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 447 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 448 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 449 450 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 451 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 452 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 453 454 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 455 p_results->arr[DCBX_PROTOCOL_ETH].enable) 456 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 457 458 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 459 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 460 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 461 p_prio->eth); 462 } 463 464 static void 465 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 466 struct dcbx_app_priority_feature *p_app, 467 struct dcbx_app_priority_entry *p_tbl, 468 struct qed_dcbx_params *p_params, bool ieee) 469 { 470 struct qed_app_entry *entry; 471 u8 pri_map; 472 int i; 473 474 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 475 DCBX_APP_WILLING); 476 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 477 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 478 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 479 DCBX_APP_NUM_ENTRIES); 480 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 481 entry = &p_params->app_entry[i]; 482 if (ieee) { 483 u8 sf_ieee; 484 u32 val; 485 486 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 487 DCBX_APP_SF_IEEE); 488 switch (sf_ieee) { 489 case DCBX_APP_SF_IEEE_RESERVED: 490 /* Old MFW */ 491 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 492 DCBX_APP_SF); 493 entry->sf_ieee = val ? 494 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 495 QED_DCBX_SF_IEEE_ETHTYPE; 496 break; 497 case DCBX_APP_SF_IEEE_ETHTYPE: 498 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 499 break; 500 case DCBX_APP_SF_IEEE_TCP_PORT: 501 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 502 break; 503 case DCBX_APP_SF_IEEE_UDP_PORT: 504 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 505 break; 506 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 507 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 508 break; 509 } 510 } else { 511 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 512 DCBX_APP_SF)); 513 } 514 515 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 516 entry->prio = ffs(pri_map) - 1; 517 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 518 DCBX_APP_PROTOCOL_ID); 519 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 520 entry->proto_id, 521 &entry->proto_type, ieee); 522 } 523 524 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 525 "APP params: willing %d, valid %d error = %d\n", 526 p_params->app_willing, p_params->app_valid, 527 p_params->app_error); 528 } 529 530 static void 531 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 532 u32 pfc, struct qed_dcbx_params *p_params) 533 { 534 u8 pfc_map; 535 536 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 537 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 538 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 539 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 540 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 541 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 542 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 543 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 544 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 545 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 546 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 547 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 548 549 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 550 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 551 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 552 p_params->pfc.enabled); 553 } 554 555 static void 556 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 557 struct dcbx_ets_feature *p_ets, 558 struct qed_dcbx_params *p_params) 559 { 560 u32 bw_map[2], tsa_map[2], pri_map; 561 int i; 562 563 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 564 DCBX_ETS_WILLING); 565 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 566 DCBX_ETS_ENABLED); 567 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 568 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 569 DCBX_ETS_MAX_TCS); 570 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 571 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 572 p_params->ets_willing, p_params->ets_enabled, 573 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 574 p_params->max_ets_tc); 575 576 if (p_params->ets_enabled && !p_params->max_ets_tc) { 577 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES; 578 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 579 "ETS params: max_ets_tc is forced to %d\n", 580 p_params->max_ets_tc); 581 } 582 583 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 584 * encoded in a type u32 array of size 2. 585 */ 586 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 587 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 588 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 589 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 590 pri_map = p_ets->pri_tc_tbl[0]; 591 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 592 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 593 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 594 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 595 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 596 "elem %d bw_tbl %x tsa_tbl %x\n", 597 i, p_params->ets_tc_bw_tbl[i], 598 p_params->ets_tc_tsa_tbl[i]); 599 } 600 } 601 602 static void 603 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 604 struct dcbx_app_priority_feature *p_app, 605 struct dcbx_app_priority_entry *p_tbl, 606 struct dcbx_ets_feature *p_ets, 607 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 608 { 609 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 610 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 611 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 612 } 613 614 static void 615 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 616 { 617 struct dcbx_features *p_feat; 618 619 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 620 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 621 p_feat->app.app_pri_tbl, &p_feat->ets, 622 p_feat->pfc, ¶ms->local.params, false); 623 params->local.valid = true; 624 } 625 626 static void 627 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 628 { 629 struct dcbx_features *p_feat; 630 631 p_feat = &p_hwfn->p_dcbx_info->remote.features; 632 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 633 p_feat->app.app_pri_tbl, &p_feat->ets, 634 p_feat->pfc, ¶ms->remote.params, false); 635 params->remote.valid = true; 636 } 637 638 static void 639 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 640 struct qed_dcbx_get *params) 641 { 642 struct qed_dcbx_operational_params *p_operational; 643 struct qed_dcbx_results *p_results; 644 struct dcbx_features *p_feat; 645 bool enabled, err; 646 u32 flags; 647 bool val; 648 649 flags = p_hwfn->p_dcbx_info->operational.flags; 650 651 /* If DCBx version is non zero, then negotiation 652 * was successfuly performed 653 */ 654 p_operational = ¶ms->operational; 655 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 656 DCBX_CONFIG_VERSION_DISABLED); 657 if (!enabled) { 658 p_operational->enabled = enabled; 659 p_operational->valid = false; 660 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n"); 661 return; 662 } 663 664 p_feat = &p_hwfn->p_dcbx_info->operational.features; 665 p_results = &p_hwfn->p_dcbx_info->results; 666 667 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 668 DCBX_CONFIG_VERSION_IEEE); 669 p_operational->ieee = val; 670 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 671 DCBX_CONFIG_VERSION_CEE); 672 p_operational->cee = val; 673 674 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 675 DCBX_CONFIG_VERSION_STATIC); 676 p_operational->local = val; 677 678 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 679 "Version support: ieee %d, cee %d, static %d\n", 680 p_operational->ieee, p_operational->cee, 681 p_operational->local); 682 683 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 684 p_feat->app.app_pri_tbl, &p_feat->ets, 685 p_feat->pfc, ¶ms->operational.params, 686 p_operational->ieee); 687 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 688 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 689 p_operational->err = err; 690 p_operational->enabled = enabled; 691 p_operational->valid = true; 692 } 693 694 static void 695 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 696 struct qed_dcbx_get *params) 697 { 698 struct lldp_config_params_s *p_local; 699 700 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 701 702 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 703 ARRAY_SIZE(p_local->local_chassis_id)); 704 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 705 ARRAY_SIZE(p_local->local_port_id)); 706 } 707 708 static void 709 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 710 struct qed_dcbx_get *params) 711 { 712 struct lldp_status_params_s *p_remote; 713 714 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 715 716 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 717 ARRAY_SIZE(p_remote->peer_chassis_id)); 718 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 719 ARRAY_SIZE(p_remote->peer_port_id)); 720 } 721 722 static int 723 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params, 724 enum qed_mib_read_type type) 725 { 726 switch (type) { 727 case QED_DCBX_REMOTE_MIB: 728 qed_dcbx_get_remote_params(p_hwfn, p_params); 729 break; 730 case QED_DCBX_LOCAL_MIB: 731 qed_dcbx_get_local_params(p_hwfn, p_params); 732 break; 733 case QED_DCBX_OPERATIONAL_MIB: 734 qed_dcbx_get_operational_params(p_hwfn, p_params); 735 break; 736 case QED_DCBX_REMOTE_LLDP_MIB: 737 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params); 738 break; 739 case QED_DCBX_LOCAL_LLDP_MIB: 740 qed_dcbx_get_local_lldp_params(p_hwfn, p_params); 741 break; 742 default: 743 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 744 return -EINVAL; 745 } 746 747 return 0; 748 } 749 750 static int 751 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 752 { 753 struct qed_dcbx_mib_meta_data data; 754 int rc = 0; 755 756 memset(&data, 0, sizeof(data)); 757 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 758 lldp_config_params); 759 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 760 data.size = sizeof(struct lldp_config_params_s); 761 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 762 763 return rc; 764 } 765 766 static int 767 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 768 struct qed_ptt *p_ptt, 769 enum qed_mib_read_type type) 770 { 771 struct qed_dcbx_mib_meta_data data; 772 int rc = 0; 773 774 memset(&data, 0, sizeof(data)); 775 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 776 lldp_status_params); 777 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 778 data.size = sizeof(struct lldp_status_params_s); 779 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 780 781 return rc; 782 } 783 784 static int 785 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 786 struct qed_ptt *p_ptt, 787 enum qed_mib_read_type type) 788 { 789 struct qed_dcbx_mib_meta_data data; 790 int rc = 0; 791 792 memset(&data, 0, sizeof(data)); 793 data.addr = p_hwfn->mcp_info->port_addr + 794 offsetof(struct public_port, operational_dcbx_mib); 795 data.mib = &p_hwfn->p_dcbx_info->operational; 796 data.size = sizeof(struct dcbx_mib); 797 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 798 799 return rc; 800 } 801 802 static int 803 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 804 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 805 { 806 struct qed_dcbx_mib_meta_data data; 807 int rc = 0; 808 809 memset(&data, 0, sizeof(data)); 810 data.addr = p_hwfn->mcp_info->port_addr + 811 offsetof(struct public_port, remote_dcbx_mib); 812 data.mib = &p_hwfn->p_dcbx_info->remote; 813 data.size = sizeof(struct dcbx_mib); 814 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 815 816 return rc; 817 } 818 819 static int 820 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 821 { 822 struct qed_dcbx_mib_meta_data data; 823 int rc = 0; 824 825 memset(&data, 0, sizeof(data)); 826 data.addr = p_hwfn->mcp_info->port_addr + 827 offsetof(struct public_port, local_admin_dcbx_mib); 828 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 829 data.size = sizeof(struct dcbx_local_params); 830 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 831 832 return rc; 833 } 834 835 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 836 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 837 { 838 int rc = -EINVAL; 839 840 switch (type) { 841 case QED_DCBX_OPERATIONAL_MIB: 842 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 843 break; 844 case QED_DCBX_REMOTE_MIB: 845 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 846 break; 847 case QED_DCBX_LOCAL_MIB: 848 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 849 break; 850 case QED_DCBX_REMOTE_LLDP_MIB: 851 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 852 break; 853 case QED_DCBX_LOCAL_LLDP_MIB: 854 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 855 break; 856 default: 857 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 858 } 859 860 return rc; 861 } 862 863 void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type) 864 { 865 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common; 866 void *cookie = hwfn->cdev->ops_cookie; 867 868 if (cookie && op->dcbx_aen) 869 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type); 870 } 871 872 /* Read updated MIB. 873 * Reconfigure QM and invoke PF update ramrod command if operational MIB 874 * change is detected. 875 */ 876 int 877 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 878 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 879 { 880 int rc = 0; 881 882 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 883 if (rc) 884 return rc; 885 886 if (type == QED_DCBX_OPERATIONAL_MIB) { 887 rc = qed_dcbx_process_mib_info(p_hwfn); 888 if (!rc) { 889 /* reconfigure tcs of QM queues according 890 * to negotiation results 891 */ 892 qed_qm_reconf(p_hwfn, p_ptt); 893 894 /* update storm FW with negotiation results */ 895 qed_sp_pf_update(p_hwfn); 896 897 /* for roce PFs, we may want to enable/disable DPM 898 * when DCBx change occurs 899 */ 900 if (p_hwfn->hw_info.personality == 901 QED_PCI_ETH_ROCE) 902 qed_roce_dpm_dcbx(p_hwfn, p_ptt); 903 } 904 } 905 906 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 907 908 if (type == QED_DCBX_OPERATIONAL_MIB) { 909 struct qed_dcbx_results *p_data; 910 u16 val; 911 912 /* Configure in NIG which protocols support EDPM and should 913 * honor PFC. 914 */ 915 p_data = &p_hwfn->p_dcbx_info->results; 916 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) | 917 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc); 918 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT; 919 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN; 920 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val); 921 } 922 923 qed_dcbx_aen(p_hwfn, type); 924 925 return rc; 926 } 927 928 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 929 { 930 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 931 if (!p_hwfn->p_dcbx_info) 932 return -ENOMEM; 933 934 return 0; 935 } 936 937 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn) 938 { 939 kfree(p_hwfn->p_dcbx_info); 940 p_hwfn->p_dcbx_info = NULL; 941 } 942 943 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 944 struct qed_dcbx_results *p_src, 945 enum dcbx_protocol_type type) 946 { 947 p_data->dcb_enable_flag = p_src->arr[type].enable; 948 p_data->dcb_priority = p_src->arr[type].priority; 949 p_data->dcb_tc = p_src->arr[type].tc; 950 } 951 952 /* Set pf update ramrod command params */ 953 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 954 struct pf_update_ramrod_data *p_dest) 955 { 956 struct protocol_dcb_data *p_dcb_data; 957 u8 update_flag; 958 959 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 960 p_dest->update_fcoe_dcb_data_mode = update_flag; 961 962 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 963 p_dest->update_roce_dcb_data_mode = update_flag; 964 965 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 966 p_dest->update_rroce_dcb_data_mode = update_flag; 967 968 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 969 p_dest->update_iscsi_dcb_data_mode = update_flag; 970 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 971 p_dest->update_eth_dcb_data_mode = update_flag; 972 973 p_dcb_data = &p_dest->fcoe_dcb_data; 974 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 975 p_dcb_data = &p_dest->roce_dcb_data; 976 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE); 977 p_dcb_data = &p_dest->rroce_dcb_data; 978 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2); 979 p_dcb_data = &p_dest->iscsi_dcb_data; 980 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 981 p_dcb_data = &p_dest->eth_dcb_data; 982 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 983 } 984 985 #ifdef CONFIG_DCB 986 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 987 struct qed_dcbx_get *p_get, 988 enum qed_mib_read_type type) 989 { 990 struct qed_ptt *p_ptt; 991 int rc; 992 993 if (IS_VF(p_hwfn->cdev)) 994 return -EINVAL; 995 996 p_ptt = qed_ptt_acquire(p_hwfn); 997 if (!p_ptt) 998 return -EBUSY; 999 1000 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 1001 if (rc) 1002 goto out; 1003 1004 rc = qed_dcbx_get_params(p_hwfn, p_get, type); 1005 1006 out: 1007 qed_ptt_release(p_hwfn, p_ptt); 1008 return rc; 1009 } 1010 1011 static void 1012 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 1013 u32 *pfc, struct qed_dcbx_params *p_params) 1014 { 1015 u8 pfc_map = 0; 1016 int i; 1017 1018 *pfc &= ~DCBX_PFC_ERROR_MASK; 1019 1020 if (p_params->pfc.willing) 1021 *pfc |= DCBX_PFC_WILLING_MASK; 1022 else 1023 *pfc &= ~DCBX_PFC_WILLING_MASK; 1024 1025 if (p_params->pfc.enabled) 1026 *pfc |= DCBX_PFC_ENABLED_MASK; 1027 else 1028 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1029 1030 *pfc &= ~DCBX_PFC_CAPS_MASK; 1031 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 1032 1033 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1034 if (p_params->pfc.prio[i]) 1035 pfc_map |= BIT(i); 1036 1037 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1038 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 1039 1040 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 1041 } 1042 1043 static void 1044 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 1045 struct dcbx_ets_feature *p_ets, 1046 struct qed_dcbx_params *p_params) 1047 { 1048 u8 *bw_map, *tsa_map; 1049 u32 val; 1050 int i; 1051 1052 if (p_params->ets_willing) 1053 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1054 else 1055 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1056 1057 if (p_params->ets_cbs) 1058 p_ets->flags |= DCBX_ETS_CBS_MASK; 1059 else 1060 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1061 1062 if (p_params->ets_enabled) 1063 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1064 else 1065 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1066 1067 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1068 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1069 1070 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1071 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1072 p_ets->pri_tc_tbl[0] = 0; 1073 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1074 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1075 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1076 /* Copy the priority value to the corresponding 4 bits in the 1077 * traffic class table. 1078 */ 1079 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1080 p_ets->pri_tc_tbl[0] |= val; 1081 } 1082 for (i = 0; i < 2; i++) { 1083 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1084 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1085 } 1086 } 1087 1088 static void 1089 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1090 struct dcbx_app_priority_feature *p_app, 1091 struct qed_dcbx_params *p_params, bool ieee) 1092 { 1093 u32 *entry; 1094 int i; 1095 1096 if (p_params->app_willing) 1097 p_app->flags |= DCBX_APP_WILLING_MASK; 1098 else 1099 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1100 1101 if (p_params->app_valid) 1102 p_app->flags |= DCBX_APP_ENABLED_MASK; 1103 else 1104 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1105 1106 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1107 p_app->flags |= (u32)p_params->num_app_entries << 1108 DCBX_APP_NUM_ENTRIES_SHIFT; 1109 1110 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1111 entry = &p_app->app_pri_tbl[i].entry; 1112 *entry = 0; 1113 if (ieee) { 1114 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1115 switch (p_params->app_entry[i].sf_ieee) { 1116 case QED_DCBX_SF_IEEE_ETHTYPE: 1117 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1118 DCBX_APP_SF_IEEE_SHIFT); 1119 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1120 DCBX_APP_SF_SHIFT); 1121 break; 1122 case QED_DCBX_SF_IEEE_TCP_PORT: 1123 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1124 DCBX_APP_SF_IEEE_SHIFT); 1125 *entry |= ((u32)DCBX_APP_SF_PORT << 1126 DCBX_APP_SF_SHIFT); 1127 break; 1128 case QED_DCBX_SF_IEEE_UDP_PORT: 1129 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1130 DCBX_APP_SF_IEEE_SHIFT); 1131 *entry |= ((u32)DCBX_APP_SF_PORT << 1132 DCBX_APP_SF_SHIFT); 1133 break; 1134 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1135 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1136 DCBX_APP_SF_IEEE_SHIFT); 1137 *entry |= ((u32)DCBX_APP_SF_PORT << 1138 DCBX_APP_SF_SHIFT); 1139 break; 1140 } 1141 } else { 1142 *entry &= ~DCBX_APP_SF_MASK; 1143 if (p_params->app_entry[i].ethtype) 1144 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1145 DCBX_APP_SF_SHIFT); 1146 else 1147 *entry |= ((u32)DCBX_APP_SF_PORT << 1148 DCBX_APP_SF_SHIFT); 1149 } 1150 1151 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1152 *entry |= ((u32)p_params->app_entry[i].proto_id << 1153 DCBX_APP_PROTOCOL_ID_SHIFT); 1154 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1155 *entry |= ((u32)(p_params->app_entry[i].prio) << 1156 DCBX_APP_PRI_MAP_SHIFT); 1157 } 1158 } 1159 1160 static void 1161 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1162 struct dcbx_local_params *local_admin, 1163 struct qed_dcbx_set *params) 1164 { 1165 bool ieee = false; 1166 1167 local_admin->flags = 0; 1168 memcpy(&local_admin->features, 1169 &p_hwfn->p_dcbx_info->operational.features, 1170 sizeof(local_admin->features)); 1171 1172 if (params->enabled) { 1173 local_admin->config = params->ver_num; 1174 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1175 } else { 1176 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1177 } 1178 1179 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n", 1180 local_admin->config); 1181 1182 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1183 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1184 ¶ms->config.params); 1185 1186 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1187 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1188 ¶ms->config.params); 1189 1190 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1191 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1192 ¶ms->config.params, ieee); 1193 } 1194 1195 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1196 struct qed_dcbx_set *params, bool hw_commit) 1197 { 1198 struct dcbx_local_params local_admin; 1199 struct qed_dcbx_mib_meta_data data; 1200 u32 resp = 0, param = 0; 1201 int rc = 0; 1202 1203 if (!hw_commit) { 1204 memcpy(&p_hwfn->p_dcbx_info->set, params, 1205 sizeof(struct qed_dcbx_set)); 1206 return 0; 1207 } 1208 1209 /* clear set-parmas cache */ 1210 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1211 1212 memset(&local_admin, 0, sizeof(local_admin)); 1213 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1214 1215 data.addr = p_hwfn->mcp_info->port_addr + 1216 offsetof(struct public_port, local_admin_dcbx_mib); 1217 data.local_admin = &local_admin; 1218 data.size = sizeof(struct dcbx_local_params); 1219 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1220 1221 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1222 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1223 if (rc) 1224 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1225 1226 return rc; 1227 } 1228 1229 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1230 struct qed_dcbx_set *params) 1231 { 1232 struct qed_dcbx_get *dcbx_info; 1233 int rc; 1234 1235 if (p_hwfn->p_dcbx_info->set.config.valid) { 1236 memcpy(params, &p_hwfn->p_dcbx_info->set, 1237 sizeof(struct qed_dcbx_set)); 1238 return 0; 1239 } 1240 1241 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1242 if (!dcbx_info) 1243 return -ENOMEM; 1244 1245 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1246 if (rc) { 1247 kfree(dcbx_info); 1248 return rc; 1249 } 1250 1251 p_hwfn->p_dcbx_info->set.override_flags = 0; 1252 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1253 if (dcbx_info->operational.cee) 1254 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1255 if (dcbx_info->operational.ieee) 1256 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1257 if (dcbx_info->operational.local) 1258 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1259 1260 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1261 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1262 &dcbx_info->operational.params, 1263 sizeof(struct qed_dcbx_admin_params)); 1264 p_hwfn->p_dcbx_info->set.config.valid = true; 1265 1266 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1267 1268 kfree(dcbx_info); 1269 1270 return 0; 1271 } 1272 1273 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1274 enum qed_mib_read_type type) 1275 { 1276 struct qed_dcbx_get *dcbx_info; 1277 1278 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_ATOMIC); 1279 if (!dcbx_info) 1280 return NULL; 1281 1282 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1283 kfree(dcbx_info); 1284 return NULL; 1285 } 1286 1287 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1288 !dcbx_info->operational.enabled) { 1289 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1290 kfree(dcbx_info); 1291 return NULL; 1292 } 1293 1294 return dcbx_info; 1295 } 1296 1297 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1298 { 1299 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1300 struct qed_dcbx_get *dcbx_info; 1301 bool enabled; 1302 1303 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1304 if (!dcbx_info) 1305 return 0; 1306 1307 enabled = dcbx_info->operational.enabled; 1308 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1309 kfree(dcbx_info); 1310 1311 return enabled; 1312 } 1313 1314 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1315 { 1316 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1317 struct qed_dcbx_set dcbx_set; 1318 struct qed_ptt *ptt; 1319 int rc; 1320 1321 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1322 1323 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1324 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1325 if (rc) 1326 return 1; 1327 1328 dcbx_set.enabled = !!state; 1329 1330 ptt = qed_ptt_acquire(hwfn); 1331 if (!ptt) 1332 return 1; 1333 1334 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1335 1336 qed_ptt_release(hwfn, ptt); 1337 1338 return rc ? 1 : 0; 1339 } 1340 1341 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1342 u8 *pgid, u8 *bw_pct, u8 *up_map) 1343 { 1344 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1345 struct qed_dcbx_get *dcbx_info; 1346 1347 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1348 *prio_type = *pgid = *bw_pct = *up_map = 0; 1349 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1350 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1351 return; 1352 } 1353 1354 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1355 if (!dcbx_info) 1356 return; 1357 1358 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1359 kfree(dcbx_info); 1360 } 1361 1362 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1363 { 1364 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1365 struct qed_dcbx_get *dcbx_info; 1366 1367 *bw_pct = 0; 1368 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1369 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1370 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1371 return; 1372 } 1373 1374 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1375 if (!dcbx_info) 1376 return; 1377 1378 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1379 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1380 kfree(dcbx_info); 1381 } 1382 1383 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1384 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1385 { 1386 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1387 *prio = *bwg_id = *bw_pct = *up_map = 0; 1388 } 1389 1390 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1391 int bwg_id, u8 *bw_pct) 1392 { 1393 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1394 *bw_pct = 0; 1395 } 1396 1397 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1398 int priority, u8 *setting) 1399 { 1400 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1401 struct qed_dcbx_get *dcbx_info; 1402 1403 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1404 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1405 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1406 return; 1407 } 1408 1409 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1410 if (!dcbx_info) 1411 return; 1412 1413 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1414 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1415 kfree(dcbx_info); 1416 } 1417 1418 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1419 { 1420 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1421 struct qed_dcbx_set dcbx_set; 1422 struct qed_ptt *ptt; 1423 int rc; 1424 1425 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1426 priority, setting); 1427 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1428 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1429 return; 1430 } 1431 1432 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1433 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1434 if (rc) 1435 return; 1436 1437 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1438 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1439 1440 ptt = qed_ptt_acquire(hwfn); 1441 if (!ptt) 1442 return; 1443 1444 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1445 1446 qed_ptt_release(hwfn, ptt); 1447 } 1448 1449 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1450 { 1451 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1452 struct qed_dcbx_get *dcbx_info; 1453 int rc = 0; 1454 1455 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1456 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1457 if (!dcbx_info) 1458 return 1; 1459 1460 switch (capid) { 1461 case DCB_CAP_ATTR_PG: 1462 case DCB_CAP_ATTR_PFC: 1463 case DCB_CAP_ATTR_UP2TC: 1464 case DCB_CAP_ATTR_GSP: 1465 *cap = true; 1466 break; 1467 case DCB_CAP_ATTR_PG_TCS: 1468 case DCB_CAP_ATTR_PFC_TCS: 1469 *cap = 0x80; 1470 break; 1471 case DCB_CAP_ATTR_DCBX: 1472 *cap = (DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE | 1473 DCB_CAP_DCBX_VER_IEEE | DCB_CAP_DCBX_STATIC); 1474 break; 1475 default: 1476 *cap = false; 1477 rc = 1; 1478 } 1479 1480 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1481 kfree(dcbx_info); 1482 1483 return rc; 1484 } 1485 1486 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1487 { 1488 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1489 struct qed_dcbx_get *dcbx_info; 1490 int rc = 0; 1491 1492 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1493 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1494 if (!dcbx_info) 1495 return -EINVAL; 1496 1497 switch (tcid) { 1498 case DCB_NUMTCS_ATTR_PG: 1499 *num = dcbx_info->operational.params.max_ets_tc; 1500 break; 1501 case DCB_NUMTCS_ATTR_PFC: 1502 *num = dcbx_info->operational.params.pfc.max_tc; 1503 break; 1504 default: 1505 rc = -EINVAL; 1506 } 1507 1508 kfree(dcbx_info); 1509 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1510 1511 return rc; 1512 } 1513 1514 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1515 { 1516 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1517 struct qed_dcbx_get *dcbx_info; 1518 bool enabled; 1519 1520 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1521 if (!dcbx_info) 1522 return 0; 1523 1524 enabled = dcbx_info->operational.params.pfc.enabled; 1525 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1526 kfree(dcbx_info); 1527 1528 return enabled; 1529 } 1530 1531 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1532 { 1533 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1534 struct qed_dcbx_get *dcbx_info; 1535 u8 mode = 0; 1536 1537 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1538 if (!dcbx_info) 1539 return 0; 1540 1541 if (dcbx_info->operational.enabled) 1542 mode |= DCB_CAP_DCBX_LLD_MANAGED; 1543 if (dcbx_info->operational.ieee) 1544 mode |= DCB_CAP_DCBX_VER_IEEE; 1545 if (dcbx_info->operational.cee) 1546 mode |= DCB_CAP_DCBX_VER_CEE; 1547 if (dcbx_info->operational.local) 1548 mode |= DCB_CAP_DCBX_STATIC; 1549 1550 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1551 kfree(dcbx_info); 1552 1553 return mode; 1554 } 1555 1556 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1557 int tc, 1558 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1559 { 1560 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1561 struct qed_dcbx_set dcbx_set; 1562 struct qed_ptt *ptt; 1563 int rc; 1564 1565 DP_VERBOSE(hwfn, QED_MSG_DCB, 1566 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1567 tc, pri_type, pgid, bw_pct, up_map); 1568 1569 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1570 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1571 return; 1572 } 1573 1574 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1575 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1576 if (rc) 1577 return; 1578 1579 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1580 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1581 1582 ptt = qed_ptt_acquire(hwfn); 1583 if (!ptt) 1584 return; 1585 1586 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1587 1588 qed_ptt_release(hwfn, ptt); 1589 } 1590 1591 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1592 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1593 { 1594 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1595 } 1596 1597 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1598 { 1599 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1600 struct qed_dcbx_set dcbx_set; 1601 struct qed_ptt *ptt; 1602 int rc; 1603 1604 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1605 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1606 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1607 return; 1608 } 1609 1610 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1611 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1612 if (rc) 1613 return; 1614 1615 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1616 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1617 1618 ptt = qed_ptt_acquire(hwfn); 1619 if (!ptt) 1620 return; 1621 1622 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1623 1624 qed_ptt_release(hwfn, ptt); 1625 } 1626 1627 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1628 { 1629 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1630 } 1631 1632 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1633 { 1634 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1635 struct qed_dcbx_set dcbx_set; 1636 struct qed_ptt *ptt; 1637 int rc; 1638 1639 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1640 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1641 if (rc) 1642 return 1; 1643 1644 ptt = qed_ptt_acquire(hwfn); 1645 if (!ptt) 1646 return 1; 1647 1648 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1649 1650 qed_ptt_release(hwfn, ptt); 1651 1652 return rc; 1653 } 1654 1655 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1656 { 1657 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1658 struct qed_dcbx_set dcbx_set; 1659 struct qed_ptt *ptt; 1660 int rc; 1661 1662 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1663 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1664 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1665 if (rc) 1666 return 1; 1667 1668 switch (tcid) { 1669 case DCB_NUMTCS_ATTR_PG: 1670 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1671 dcbx_set.config.params.max_ets_tc = num; 1672 break; 1673 case DCB_NUMTCS_ATTR_PFC: 1674 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1675 dcbx_set.config.params.pfc.max_tc = num; 1676 break; 1677 default: 1678 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1679 return -EINVAL; 1680 } 1681 1682 ptt = qed_ptt_acquire(hwfn); 1683 if (!ptt) 1684 return -EINVAL; 1685 1686 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1687 1688 qed_ptt_release(hwfn, ptt); 1689 1690 return 0; 1691 } 1692 1693 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1694 { 1695 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1696 struct qed_dcbx_set dcbx_set; 1697 struct qed_ptt *ptt; 1698 int rc; 1699 1700 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1701 1702 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1703 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1704 if (rc) 1705 return; 1706 1707 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1708 dcbx_set.config.params.pfc.enabled = !!state; 1709 1710 ptt = qed_ptt_acquire(hwfn); 1711 if (!ptt) 1712 return; 1713 1714 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1715 1716 qed_ptt_release(hwfn, ptt); 1717 } 1718 1719 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1720 { 1721 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1722 struct qed_dcbx_get *dcbx_info; 1723 struct qed_app_entry *entry; 1724 bool ethtype; 1725 u8 prio = 0; 1726 int i; 1727 1728 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1729 if (!dcbx_info) 1730 return -EINVAL; 1731 1732 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1733 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1734 entry = &dcbx_info->operational.params.app_entry[i]; 1735 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1736 prio = entry->prio; 1737 break; 1738 } 1739 } 1740 1741 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1742 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1743 kfree(dcbx_info); 1744 return -EINVAL; 1745 } 1746 1747 kfree(dcbx_info); 1748 1749 return prio; 1750 } 1751 1752 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1753 u8 idtype, u16 idval, u8 pri_map) 1754 { 1755 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1756 struct qed_dcbx_set dcbx_set; 1757 struct qed_app_entry *entry; 1758 struct qed_ptt *ptt; 1759 bool ethtype; 1760 int rc, i; 1761 1762 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1763 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1764 if (rc) 1765 return -EINVAL; 1766 1767 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1768 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1769 entry = &dcbx_set.config.params.app_entry[i]; 1770 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1771 break; 1772 /* First empty slot */ 1773 if (!entry->proto_id) { 1774 dcbx_set.config.params.num_app_entries++; 1775 break; 1776 } 1777 } 1778 1779 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1780 DP_ERR(cdev, "App table is full\n"); 1781 return -EBUSY; 1782 } 1783 1784 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1785 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1786 dcbx_set.config.params.app_entry[i].proto_id = idval; 1787 dcbx_set.config.params.app_entry[i].prio = pri_map; 1788 1789 ptt = qed_ptt_acquire(hwfn); 1790 if (!ptt) 1791 return -EBUSY; 1792 1793 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1794 1795 qed_ptt_release(hwfn, ptt); 1796 1797 return rc; 1798 } 1799 1800 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1801 { 1802 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1803 struct qed_dcbx_set dcbx_set; 1804 struct qed_ptt *ptt; 1805 int rc; 1806 1807 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1808 1809 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && 1810 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) { 1811 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n"); 1812 return 1; 1813 } 1814 1815 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1816 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1817 if (rc) 1818 return 1; 1819 1820 dcbx_set.ver_num = 0; 1821 if (mode & DCB_CAP_DCBX_VER_CEE) { 1822 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1823 dcbx_set.enabled = true; 1824 } 1825 1826 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1827 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1828 dcbx_set.enabled = true; 1829 } 1830 1831 if (mode & DCB_CAP_DCBX_STATIC) { 1832 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1833 dcbx_set.enabled = true; 1834 } 1835 1836 ptt = qed_ptt_acquire(hwfn); 1837 if (!ptt) 1838 return 1; 1839 1840 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1841 1842 qed_ptt_release(hwfn, ptt); 1843 1844 return rc; 1845 } 1846 1847 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1848 { 1849 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1850 struct qed_dcbx_get *dcbx_info; 1851 1852 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1853 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1854 if (!dcbx_info) 1855 return 1; 1856 1857 *flags = 0; 1858 switch (featid) { 1859 case DCB_FEATCFG_ATTR_PG: 1860 if (dcbx_info->operational.params.ets_enabled) 1861 *flags = DCB_FEATCFG_ENABLE; 1862 else 1863 *flags = DCB_FEATCFG_ERROR; 1864 break; 1865 case DCB_FEATCFG_ATTR_PFC: 1866 if (dcbx_info->operational.params.pfc.enabled) 1867 *flags = DCB_FEATCFG_ENABLE; 1868 else 1869 *flags = DCB_FEATCFG_ERROR; 1870 break; 1871 case DCB_FEATCFG_ATTR_APP: 1872 if (dcbx_info->operational.params.app_valid) 1873 *flags = DCB_FEATCFG_ENABLE; 1874 else 1875 *flags = DCB_FEATCFG_ERROR; 1876 break; 1877 default: 1878 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1879 kfree(dcbx_info); 1880 return 1; 1881 } 1882 1883 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1884 kfree(dcbx_info); 1885 1886 return 0; 1887 } 1888 1889 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1890 { 1891 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1892 struct qed_dcbx_set dcbx_set; 1893 bool enabled, willing; 1894 struct qed_ptt *ptt; 1895 int rc; 1896 1897 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1898 featid, flags); 1899 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1900 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1901 if (rc) 1902 return 1; 1903 1904 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1905 willing = !!(flags & DCB_FEATCFG_WILLING); 1906 switch (featid) { 1907 case DCB_FEATCFG_ATTR_PG: 1908 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1909 dcbx_set.config.params.ets_enabled = enabled; 1910 dcbx_set.config.params.ets_willing = willing; 1911 break; 1912 case DCB_FEATCFG_ATTR_PFC: 1913 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1914 dcbx_set.config.params.pfc.enabled = enabled; 1915 dcbx_set.config.params.pfc.willing = willing; 1916 break; 1917 case DCB_FEATCFG_ATTR_APP: 1918 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1919 dcbx_set.config.params.app_willing = willing; 1920 break; 1921 default: 1922 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1923 return 1; 1924 } 1925 1926 ptt = qed_ptt_acquire(hwfn); 1927 if (!ptt) 1928 return 1; 1929 1930 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1931 1932 qed_ptt_release(hwfn, ptt); 1933 1934 return 0; 1935 } 1936 1937 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1938 struct dcb_peer_app_info *info, 1939 u16 *app_count) 1940 { 1941 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1942 struct qed_dcbx_get *dcbx_info; 1943 1944 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1945 if (!dcbx_info) 1946 return -EINVAL; 1947 1948 info->willing = dcbx_info->remote.params.app_willing; 1949 info->error = dcbx_info->remote.params.app_error; 1950 *app_count = dcbx_info->remote.params.num_app_entries; 1951 kfree(dcbx_info); 1952 1953 return 0; 1954 } 1955 1956 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1957 struct dcb_app *table) 1958 { 1959 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1960 struct qed_dcbx_get *dcbx_info; 1961 int i; 1962 1963 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1964 if (!dcbx_info) 1965 return -EINVAL; 1966 1967 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 1968 if (dcbx_info->remote.params.app_entry[i].ethtype) 1969 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 1970 else 1971 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 1972 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 1973 table[i].protocol = 1974 dcbx_info->remote.params.app_entry[i].proto_id; 1975 } 1976 1977 kfree(dcbx_info); 1978 1979 return 0; 1980 } 1981 1982 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 1983 { 1984 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1985 struct qed_dcbx_get *dcbx_info; 1986 int i; 1987 1988 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1989 if (!dcbx_info) 1990 return -EINVAL; 1991 1992 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1993 if (dcbx_info->remote.params.pfc.prio[i]) 1994 pfc->pfc_en |= BIT(i); 1995 1996 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 1997 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 1998 pfc->pfc_en, pfc->tcs_supported); 1999 kfree(dcbx_info); 2000 2001 return 0; 2002 } 2003 2004 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 2005 { 2006 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2007 struct qed_dcbx_get *dcbx_info; 2008 int i; 2009 2010 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2011 if (!dcbx_info) 2012 return -EINVAL; 2013 2014 pg->willing = dcbx_info->remote.params.ets_willing; 2015 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 2016 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 2017 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 2018 } 2019 2020 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 2021 kfree(dcbx_info); 2022 2023 return 0; 2024 } 2025 2026 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 2027 struct ieee_pfc *pfc, bool remote) 2028 { 2029 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2030 struct qed_dcbx_params *params; 2031 struct qed_dcbx_get *dcbx_info; 2032 int rc, i; 2033 2034 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2035 if (!dcbx_info) 2036 return -EINVAL; 2037 2038 if (!dcbx_info->operational.ieee) { 2039 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2040 kfree(dcbx_info); 2041 return -EINVAL; 2042 } 2043 2044 if (remote) { 2045 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2046 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2047 QED_DCBX_REMOTE_MIB); 2048 if (rc) { 2049 kfree(dcbx_info); 2050 return -EINVAL; 2051 } 2052 2053 params = &dcbx_info->remote.params; 2054 } else { 2055 params = &dcbx_info->operational.params; 2056 } 2057 2058 pfc->pfc_cap = params->pfc.max_tc; 2059 pfc->pfc_en = 0; 2060 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2061 if (params->pfc.prio[i]) 2062 pfc->pfc_en |= BIT(i); 2063 2064 kfree(dcbx_info); 2065 2066 return 0; 2067 } 2068 2069 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2070 { 2071 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2072 } 2073 2074 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2075 { 2076 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2077 struct qed_dcbx_get *dcbx_info; 2078 struct qed_dcbx_set dcbx_set; 2079 struct qed_ptt *ptt; 2080 int rc, i; 2081 2082 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2083 if (!dcbx_info) 2084 return -EINVAL; 2085 2086 if (!dcbx_info->operational.ieee) { 2087 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2088 kfree(dcbx_info); 2089 return -EINVAL; 2090 } 2091 2092 kfree(dcbx_info); 2093 2094 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2095 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2096 if (rc) 2097 return -EINVAL; 2098 2099 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2100 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2101 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2102 2103 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap; 2104 2105 ptt = qed_ptt_acquire(hwfn); 2106 if (!ptt) 2107 return -EINVAL; 2108 2109 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2110 2111 qed_ptt_release(hwfn, ptt); 2112 2113 return rc; 2114 } 2115 2116 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2117 struct ieee_ets *ets, bool remote) 2118 { 2119 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2120 struct qed_dcbx_get *dcbx_info; 2121 struct qed_dcbx_params *params; 2122 int rc; 2123 2124 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2125 if (!dcbx_info) 2126 return -EINVAL; 2127 2128 if (!dcbx_info->operational.ieee) { 2129 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2130 kfree(dcbx_info); 2131 return -EINVAL; 2132 } 2133 2134 if (remote) { 2135 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2136 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2137 QED_DCBX_REMOTE_MIB); 2138 if (rc) { 2139 kfree(dcbx_info); 2140 return -EINVAL; 2141 } 2142 2143 params = &dcbx_info->remote.params; 2144 } else { 2145 params = &dcbx_info->operational.params; 2146 } 2147 2148 ets->ets_cap = params->max_ets_tc; 2149 ets->willing = params->ets_willing; 2150 ets->cbs = params->ets_cbs; 2151 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2152 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2153 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2154 kfree(dcbx_info); 2155 2156 return 0; 2157 } 2158 2159 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2160 { 2161 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2162 } 2163 2164 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2165 { 2166 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2167 struct qed_dcbx_get *dcbx_info; 2168 struct qed_dcbx_set dcbx_set; 2169 struct qed_ptt *ptt; 2170 int rc; 2171 2172 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2173 if (!dcbx_info) 2174 return -EINVAL; 2175 2176 if (!dcbx_info->operational.ieee) { 2177 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2178 kfree(dcbx_info); 2179 return -EINVAL; 2180 } 2181 2182 kfree(dcbx_info); 2183 2184 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2185 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2186 if (rc) 2187 return -EINVAL; 2188 2189 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2190 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2191 dcbx_set.config.params.ets_willing = ets->willing; 2192 dcbx_set.config.params.ets_cbs = ets->cbs; 2193 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2194 sizeof(ets->tc_tx_bw)); 2195 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2196 sizeof(ets->tc_tsa)); 2197 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2198 sizeof(ets->prio_tc)); 2199 2200 ptt = qed_ptt_acquire(hwfn); 2201 if (!ptt) 2202 return -EINVAL; 2203 2204 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2205 2206 qed_ptt_release(hwfn, ptt); 2207 2208 return rc; 2209 } 2210 2211 static int 2212 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2213 { 2214 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2215 } 2216 2217 static int 2218 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2219 { 2220 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2221 } 2222 2223 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee) 2224 { 2225 switch (selector) { 2226 case IEEE_8021QAZ_APP_SEL_ETHERTYPE: 2227 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 2228 break; 2229 case IEEE_8021QAZ_APP_SEL_STREAM: 2230 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 2231 break; 2232 case IEEE_8021QAZ_APP_SEL_DGRAM: 2233 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 2234 break; 2235 case IEEE_8021QAZ_APP_SEL_ANY: 2236 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 2237 break; 2238 default: 2239 return -EINVAL; 2240 } 2241 2242 return 0; 2243 } 2244 2245 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2246 { 2247 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2248 struct qed_dcbx_get *dcbx_info; 2249 struct qed_app_entry *entry; 2250 u8 prio = 0; 2251 u8 sf_ieee; 2252 int i; 2253 2254 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n", 2255 app->selector, app->protocol); 2256 2257 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2258 DP_INFO(cdev, "Invalid selector field value %d\n", 2259 app->selector); 2260 return -EINVAL; 2261 } 2262 2263 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2264 if (!dcbx_info) 2265 return -EINVAL; 2266 2267 if (!dcbx_info->operational.ieee) { 2268 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2269 kfree(dcbx_info); 2270 return -EINVAL; 2271 } 2272 2273 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2274 entry = &dcbx_info->operational.params.app_entry[i]; 2275 if ((entry->sf_ieee == sf_ieee) && 2276 (entry->proto_id == app->protocol)) { 2277 prio = entry->prio; 2278 break; 2279 } 2280 } 2281 2282 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2283 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2284 app->protocol); 2285 kfree(dcbx_info); 2286 return -EINVAL; 2287 } 2288 2289 app->priority = ffs(prio) - 1; 2290 2291 kfree(dcbx_info); 2292 2293 return 0; 2294 } 2295 2296 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2297 { 2298 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2299 struct qed_dcbx_get *dcbx_info; 2300 struct qed_dcbx_set dcbx_set; 2301 struct qed_app_entry *entry; 2302 struct qed_ptt *ptt; 2303 u8 sf_ieee; 2304 int rc, i; 2305 2306 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n", 2307 app->selector, app->protocol, app->priority); 2308 if (app->priority >= QED_MAX_PFC_PRIORITIES) { 2309 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2310 return -EINVAL; 2311 } 2312 2313 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2314 DP_INFO(cdev, "Invalid selector field value %d\n", 2315 app->selector); 2316 return -EINVAL; 2317 } 2318 2319 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2320 if (!dcbx_info) 2321 return -EINVAL; 2322 2323 if (!dcbx_info->operational.ieee) { 2324 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2325 kfree(dcbx_info); 2326 return -EINVAL; 2327 } 2328 2329 kfree(dcbx_info); 2330 2331 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2332 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2333 if (rc) 2334 return -EINVAL; 2335 2336 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2337 entry = &dcbx_set.config.params.app_entry[i]; 2338 if ((entry->sf_ieee == sf_ieee) && 2339 (entry->proto_id == app->protocol)) 2340 break; 2341 /* First empty slot */ 2342 if (!entry->proto_id) { 2343 dcbx_set.config.params.num_app_entries++; 2344 break; 2345 } 2346 } 2347 2348 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2349 DP_ERR(cdev, "App table is full\n"); 2350 return -EBUSY; 2351 } 2352 2353 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2354 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee; 2355 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2356 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2357 2358 ptt = qed_ptt_acquire(hwfn); 2359 if (!ptt) 2360 return -EBUSY; 2361 2362 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2363 2364 qed_ptt_release(hwfn, ptt); 2365 2366 return rc; 2367 } 2368 2369 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2370 .getstate = qed_dcbnl_getstate, 2371 .setstate = qed_dcbnl_setstate, 2372 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2373 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2374 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2375 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2376 .getpfccfg = qed_dcbnl_getpfccfg, 2377 .setpfccfg = qed_dcbnl_setpfccfg, 2378 .getcap = qed_dcbnl_getcap, 2379 .getnumtcs = qed_dcbnl_getnumtcs, 2380 .getpfcstate = qed_dcbnl_getpfcstate, 2381 .getdcbx = qed_dcbnl_getdcbx, 2382 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2383 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2384 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2385 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2386 .setall = qed_dcbnl_setall, 2387 .setnumtcs = qed_dcbnl_setnumtcs, 2388 .setpfcstate = qed_dcbnl_setpfcstate, 2389 .setapp = qed_dcbnl_setapp, 2390 .setdcbx = qed_dcbnl_setdcbx, 2391 .setfeatcfg = qed_dcbnl_setfeatcfg, 2392 .getfeatcfg = qed_dcbnl_getfeatcfg, 2393 .getapp = qed_dcbnl_getapp, 2394 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2395 .peer_getapptable = qed_dcbnl_peer_getapptable, 2396 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2397 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2398 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2399 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2400 .ieee_getets = qed_dcbnl_ieee_getets, 2401 .ieee_setets = qed_dcbnl_ieee_setets, 2402 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2403 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2404 .ieee_getapp = qed_dcbnl_ieee_getapp, 2405 .ieee_setapp = qed_dcbnl_ieee_setapp, 2406 }; 2407 2408 #endif 2409