1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015 QLogic Corporation 3 * 4 * This software is available under the terms of the GNU General Public License 5 * (GPL) Version 2, available from the file COPYING in the main directory of 6 * this source tree. 7 */ 8 9 #include <linux/types.h> 10 #include <asm/byteorder.h> 11 #include <linux/bitops.h> 12 #include <linux/dcbnl.h> 13 #include <linux/errno.h> 14 #include <linux/kernel.h> 15 #include <linux/slab.h> 16 #include <linux/string.h> 17 #include "qed.h" 18 #include "qed_cxt.h" 19 #include "qed_dcbx.h" 20 #include "qed_hsi.h" 21 #include "qed_sp.h" 22 #include "qed_sriov.h" 23 #ifdef CONFIG_DCB 24 #include <linux/qed/qed_eth_if.h> 25 #endif 26 27 #define QED_DCBX_MAX_MIB_READ_TRY (100) 28 #define QED_ETH_TYPE_DEFAULT (0) 29 #define QED_ETH_TYPE_ROCE (0x8915) 30 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 31 #define QED_ETH_TYPE_FCOE (0x8906) 32 #define QED_TCP_PORT_ISCSI (0xCBC) 33 34 #define QED_DCBX_INVALID_PRIORITY 0xFF 35 36 /* Get Traffic Class from priority traffic class table, 4 bits represent 37 * the traffic class corresponding to the priority. 38 */ 39 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 40 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 41 42 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 43 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_DEFAULT}, 44 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_DEFAULT}, 45 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_DEFAULT}, 46 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_DEFAULT}, 47 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH} 48 }; 49 50 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 51 { 52 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 53 DCBX_APP_SF_ETHTYPE); 54 } 55 56 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 57 { 58 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 59 60 /* Old MFW */ 61 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 62 return qed_dcbx_app_ethtype(app_info_bitmap); 63 64 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 65 } 66 67 static bool qed_dcbx_app_port(u32 app_info_bitmap) 68 { 69 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 70 DCBX_APP_SF_PORT); 71 } 72 73 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 74 { 75 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 76 77 /* Old MFW */ 78 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 79 return qed_dcbx_app_port(app_info_bitmap); 80 81 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 82 } 83 84 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 85 { 86 bool ethtype; 87 88 if (ieee) 89 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 90 else 91 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 92 93 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 94 } 95 96 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 97 { 98 bool port; 99 100 if (ieee) 101 port = qed_dcbx_ieee_app_port(app_info_bitmap, 102 DCBX_APP_SF_IEEE_TCP_PORT); 103 else 104 port = qed_dcbx_app_port(app_info_bitmap); 105 106 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 107 } 108 109 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 110 { 111 bool ethtype; 112 113 if (ieee) 114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 115 else 116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 117 118 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 119 } 120 121 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 122 { 123 bool ethtype; 124 125 if (ieee) 126 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 127 else 128 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 129 130 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 131 } 132 133 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 134 { 135 bool port; 136 137 if (ieee) 138 port = qed_dcbx_ieee_app_port(app_info_bitmap, 139 DCBX_APP_SF_IEEE_UDP_PORT); 140 else 141 port = qed_dcbx_app_port(app_info_bitmap); 142 143 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 144 } 145 146 static void 147 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 148 { 149 enum dcbx_protocol_type id; 150 int i; 151 152 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 153 p_data->dcbx_enabled); 154 155 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 156 id = qed_dcbx_app_update[i].id; 157 158 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 159 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 160 qed_dcbx_app_update[i].name, p_data->arr[id].update, 161 p_data->arr[id].enable, p_data->arr[id].priority, 162 p_data->arr[id].tc, p_hwfn->hw_info.num_tc); 163 } 164 } 165 166 static void 167 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 168 struct qed_hw_info *p_info, 169 bool enable, 170 bool update, 171 u8 prio, 172 u8 tc, 173 enum dcbx_protocol_type type, 174 enum qed_pci_personality personality) 175 { 176 /* PF update ramrod data */ 177 p_data->arr[type].update = update; 178 p_data->arr[type].enable = enable; 179 p_data->arr[type].priority = prio; 180 p_data->arr[type].tc = tc; 181 182 /* QM reconf data */ 183 if (p_info->personality == personality) { 184 if (personality == QED_PCI_ETH) 185 p_info->non_offload_tc = tc; 186 else 187 p_info->offload_tc = tc; 188 } 189 } 190 191 /* Update app protocol data and hw_info fields with the TLV info */ 192 static void 193 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 194 struct qed_hwfn *p_hwfn, 195 bool enable, 196 bool update, 197 u8 prio, u8 tc, enum dcbx_protocol_type type) 198 { 199 struct qed_hw_info *p_info = &p_hwfn->hw_info; 200 enum qed_pci_personality personality; 201 enum dcbx_protocol_type id; 202 char *name; 203 int i; 204 205 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 206 id = qed_dcbx_app_update[i].id; 207 208 if (type != id) 209 continue; 210 211 personality = qed_dcbx_app_update[i].personality; 212 name = qed_dcbx_app_update[i].name; 213 214 qed_dcbx_set_params(p_data, p_info, enable, update, 215 prio, tc, type, personality); 216 } 217 } 218 219 static bool 220 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 221 u32 app_prio_bitmap, 222 u16 id, enum dcbx_protocol_type *type, bool ieee) 223 { 224 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 225 *type = DCBX_PROTOCOL_FCOE; 226 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 227 *type = DCBX_PROTOCOL_ROCE; 228 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 229 *type = DCBX_PROTOCOL_ISCSI; 230 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 231 *type = DCBX_PROTOCOL_ETH; 232 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 233 *type = DCBX_PROTOCOL_ROCE_V2; 234 } else { 235 *type = DCBX_MAX_PROTOCOL_TYPE; 236 DP_ERR(p_hwfn, 237 "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n", 238 id, app_prio_bitmap); 239 return false; 240 } 241 242 return true; 243 } 244 245 /* Parse app TLV's to update TC information in hw_info structure for 246 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 247 */ 248 static int 249 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 250 struct qed_dcbx_results *p_data, 251 struct dcbx_app_priority_entry *p_tbl, 252 u32 pri_tc_tbl, int count, u8 dcbx_version) 253 { 254 u8 tc, priority_map; 255 enum dcbx_protocol_type type; 256 bool enable, ieee; 257 u16 protocol_id; 258 int priority; 259 int i; 260 261 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 262 263 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 264 /* Parse APP TLV */ 265 for (i = 0; i < count; i++) { 266 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 267 DCBX_APP_PROTOCOL_ID); 268 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 269 DCBX_APP_PRI_MAP); 270 priority = ffs(priority_map) - 1; 271 if (priority < 0) { 272 DP_ERR(p_hwfn, "Invalid priority\n"); 273 return -EINVAL; 274 } 275 276 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 277 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 278 protocol_id, &type, ieee)) { 279 /* ETH always have the enable bit reset, as it gets 280 * vlan information per packet. For other protocols, 281 * should be set according to the dcbx_enabled 282 * indication, but we only got here if there was an 283 * app tlv for the protocol, so dcbx must be enabled. 284 */ 285 enable = !(type == DCBX_PROTOCOL_ETH); 286 287 qed_dcbx_update_app_info(p_data, p_hwfn, enable, true, 288 priority, tc, type); 289 } 290 } 291 292 /* If RoCE-V2 TLV is not detected, driver need to use RoCE app 293 * data for RoCE-v2 not the default app data. 294 */ 295 if (!p_data->arr[DCBX_PROTOCOL_ROCE_V2].update && 296 p_data->arr[DCBX_PROTOCOL_ROCE].update) { 297 tc = p_data->arr[DCBX_PROTOCOL_ROCE].tc; 298 priority = p_data->arr[DCBX_PROTOCOL_ROCE].priority; 299 qed_dcbx_update_app_info(p_data, p_hwfn, true, true, 300 priority, tc, DCBX_PROTOCOL_ROCE_V2); 301 } 302 303 /* Update ramrod protocol data and hw_info fields 304 * with default info when corresponding APP TLV's are not detected. 305 * The enabled field has a different logic for ethernet as only for 306 * ethernet dcb should disabled by default, as the information arrives 307 * from the OS (unless an explicit app tlv was present). 308 */ 309 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 310 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 311 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 312 if (p_data->arr[type].update) 313 continue; 314 315 enable = !(type == DCBX_PROTOCOL_ETH); 316 qed_dcbx_update_app_info(p_data, p_hwfn, enable, true, 317 priority, tc, type); 318 } 319 320 return 0; 321 } 322 323 /* Parse app TLV's to update TC information in hw_info structure for 324 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 325 */ 326 static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 327 { 328 struct dcbx_app_priority_feature *p_app; 329 struct dcbx_app_priority_entry *p_tbl; 330 struct qed_dcbx_results data = { 0 }; 331 struct dcbx_ets_feature *p_ets; 332 struct qed_hw_info *p_info; 333 u32 pri_tc_tbl, flags; 334 u8 dcbx_version; 335 int num_entries; 336 int rc = 0; 337 338 flags = p_hwfn->p_dcbx_info->operational.flags; 339 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 340 341 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 342 p_tbl = p_app->app_pri_tbl; 343 344 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 345 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 346 347 p_info = &p_hwfn->hw_info; 348 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 349 350 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, 351 num_entries, dcbx_version); 352 if (rc) 353 return rc; 354 355 p_info->num_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS); 356 data.pf_id = p_hwfn->rel_pf_id; 357 data.dcbx_enabled = !!dcbx_version; 358 359 qed_dcbx_dp_protocol(p_hwfn, &data); 360 361 memcpy(&p_hwfn->p_dcbx_info->results, &data, 362 sizeof(struct qed_dcbx_results)); 363 364 return 0; 365 } 366 367 static int 368 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 369 struct qed_ptt *p_ptt, 370 struct qed_dcbx_mib_meta_data *p_data, 371 enum qed_mib_read_type type) 372 { 373 u32 prefix_seq_num, suffix_seq_num; 374 int read_count = 0; 375 int rc = 0; 376 377 /* The data is considered to be valid only if both sequence numbers are 378 * the same. 379 */ 380 do { 381 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 382 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 383 p_data->addr, p_data->size); 384 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 385 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 386 } else { 387 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 388 p_data->addr, p_data->size); 389 prefix_seq_num = p_data->mib->prefix_seq_num; 390 suffix_seq_num = p_data->mib->suffix_seq_num; 391 } 392 read_count++; 393 394 DP_VERBOSE(p_hwfn, 395 QED_MSG_DCB, 396 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 397 type, read_count, prefix_seq_num, suffix_seq_num); 398 } while ((prefix_seq_num != suffix_seq_num) && 399 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 400 401 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 402 DP_ERR(p_hwfn, 403 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 404 type, read_count, prefix_seq_num, suffix_seq_num); 405 rc = -EIO; 406 } 407 408 return rc; 409 } 410 411 #ifdef CONFIG_DCB 412 static void 413 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 414 struct qed_dcbx_app_prio *p_prio, 415 struct qed_dcbx_results *p_results) 416 { 417 u8 val; 418 419 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 420 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 421 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 422 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 423 424 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 425 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 426 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 427 428 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 429 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 430 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 431 p_prio->roce_v2 = val; 432 } 433 434 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 435 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 436 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 437 438 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 439 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 440 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 441 442 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 443 p_results->arr[DCBX_PROTOCOL_ETH].enable) 444 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 445 446 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 447 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 448 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 449 p_prio->eth); 450 } 451 452 static void 453 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 454 struct dcbx_app_priority_feature *p_app, 455 struct dcbx_app_priority_entry *p_tbl, 456 struct qed_dcbx_params *p_params, bool ieee) 457 { 458 struct qed_app_entry *entry; 459 u8 pri_map; 460 int i; 461 462 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 463 DCBX_APP_WILLING); 464 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 465 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 466 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 467 DCBX_APP_NUM_ENTRIES); 468 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 469 entry = &p_params->app_entry[i]; 470 if (ieee) { 471 u8 sf_ieee; 472 u32 val; 473 474 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 475 DCBX_APP_SF_IEEE); 476 switch (sf_ieee) { 477 case DCBX_APP_SF_IEEE_RESERVED: 478 /* Old MFW */ 479 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 480 DCBX_APP_SF); 481 entry->sf_ieee = val ? 482 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 483 QED_DCBX_SF_IEEE_ETHTYPE; 484 break; 485 case DCBX_APP_SF_IEEE_ETHTYPE: 486 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 487 break; 488 case DCBX_APP_SF_IEEE_TCP_PORT: 489 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 490 break; 491 case DCBX_APP_SF_IEEE_UDP_PORT: 492 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 493 break; 494 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 495 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 496 break; 497 } 498 } else { 499 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 500 DCBX_APP_SF)); 501 } 502 503 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 504 entry->prio = ffs(pri_map) - 1; 505 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 506 DCBX_APP_PROTOCOL_ID); 507 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 508 entry->proto_id, 509 &entry->proto_type, ieee); 510 } 511 512 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 513 "APP params: willing %d, valid %d error = %d\n", 514 p_params->app_willing, p_params->app_valid, 515 p_params->app_error); 516 } 517 518 static void 519 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 520 u32 pfc, struct qed_dcbx_params *p_params) 521 { 522 u8 pfc_map; 523 524 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 525 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 526 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 527 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 528 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 529 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 530 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 531 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 532 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 533 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 534 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 535 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 536 537 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 538 "PFC params: willing %d, pfc_bitmap %d\n", 539 p_params->pfc.willing, pfc_map); 540 } 541 542 static void 543 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 544 struct dcbx_ets_feature *p_ets, 545 struct qed_dcbx_params *p_params) 546 { 547 u32 bw_map[2], tsa_map[2], pri_map; 548 int i; 549 550 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 551 DCBX_ETS_WILLING); 552 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 553 DCBX_ETS_ENABLED); 554 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 555 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 556 DCBX_ETS_MAX_TCS); 557 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 558 "ETS params: willing %d, ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 559 p_params->ets_willing, 560 p_params->ets_cbs, 561 p_ets->pri_tc_tbl[0], p_params->max_ets_tc); 562 563 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 564 * encoded in a type u32 array of size 2. 565 */ 566 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 567 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 568 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 569 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 570 pri_map = p_ets->pri_tc_tbl[0]; 571 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 572 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 573 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 574 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 575 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 576 "elem %d bw_tbl %x tsa_tbl %x\n", 577 i, p_params->ets_tc_bw_tbl[i], 578 p_params->ets_tc_tsa_tbl[i]); 579 } 580 } 581 582 static void 583 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 584 struct dcbx_app_priority_feature *p_app, 585 struct dcbx_app_priority_entry *p_tbl, 586 struct dcbx_ets_feature *p_ets, 587 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 588 { 589 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 590 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 591 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 592 } 593 594 static void 595 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, 596 struct qed_ptt *p_ptt, struct qed_dcbx_get *params) 597 { 598 struct dcbx_features *p_feat; 599 600 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 601 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 602 p_feat->app.app_pri_tbl, &p_feat->ets, 603 p_feat->pfc, ¶ms->local.params, false); 604 params->local.valid = true; 605 } 606 607 static void 608 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, 609 struct qed_ptt *p_ptt, struct qed_dcbx_get *params) 610 { 611 struct dcbx_features *p_feat; 612 613 p_feat = &p_hwfn->p_dcbx_info->remote.features; 614 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 615 p_feat->app.app_pri_tbl, &p_feat->ets, 616 p_feat->pfc, ¶ms->remote.params, false); 617 params->remote.valid = true; 618 } 619 620 static void 621 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 622 struct qed_ptt *p_ptt, 623 struct qed_dcbx_get *params) 624 { 625 struct qed_dcbx_operational_params *p_operational; 626 struct qed_dcbx_results *p_results; 627 struct dcbx_features *p_feat; 628 bool enabled, err; 629 u32 flags; 630 bool val; 631 632 flags = p_hwfn->p_dcbx_info->operational.flags; 633 634 /* If DCBx version is non zero, then negotiation 635 * was successfuly performed 636 */ 637 p_operational = ¶ms->operational; 638 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 639 DCBX_CONFIG_VERSION_DISABLED); 640 if (!enabled) { 641 p_operational->enabled = enabled; 642 p_operational->valid = false; 643 return; 644 } 645 646 p_feat = &p_hwfn->p_dcbx_info->operational.features; 647 p_results = &p_hwfn->p_dcbx_info->results; 648 649 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 650 DCBX_CONFIG_VERSION_IEEE); 651 p_operational->ieee = val; 652 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 653 DCBX_CONFIG_VERSION_CEE); 654 p_operational->cee = val; 655 656 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Version support: ieee %d, cee %d\n", 657 p_operational->ieee, p_operational->cee); 658 659 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 660 p_feat->app.app_pri_tbl, &p_feat->ets, 661 p_feat->pfc, ¶ms->operational.params, 662 p_operational->ieee); 663 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 664 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 665 p_operational->err = err; 666 p_operational->enabled = enabled; 667 p_operational->valid = true; 668 } 669 670 static void 671 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 672 struct qed_ptt *p_ptt, 673 struct qed_dcbx_get *params) 674 { 675 struct lldp_config_params_s *p_local; 676 677 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 678 679 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 680 ARRAY_SIZE(p_local->local_chassis_id)); 681 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 682 ARRAY_SIZE(p_local->local_port_id)); 683 } 684 685 static void 686 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 687 struct qed_ptt *p_ptt, 688 struct qed_dcbx_get *params) 689 { 690 struct lldp_status_params_s *p_remote; 691 692 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 693 694 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 695 ARRAY_SIZE(p_remote->peer_chassis_id)); 696 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 697 ARRAY_SIZE(p_remote->peer_port_id)); 698 } 699 700 static int 701 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 702 struct qed_dcbx_get *p_params, 703 enum qed_mib_read_type type) 704 { 705 switch (type) { 706 case QED_DCBX_REMOTE_MIB: 707 qed_dcbx_get_remote_params(p_hwfn, p_ptt, p_params); 708 break; 709 case QED_DCBX_LOCAL_MIB: 710 qed_dcbx_get_local_params(p_hwfn, p_ptt, p_params); 711 break; 712 case QED_DCBX_OPERATIONAL_MIB: 713 qed_dcbx_get_operational_params(p_hwfn, p_ptt, p_params); 714 break; 715 case QED_DCBX_REMOTE_LLDP_MIB: 716 qed_dcbx_get_remote_lldp_params(p_hwfn, p_ptt, p_params); 717 break; 718 case QED_DCBX_LOCAL_LLDP_MIB: 719 qed_dcbx_get_local_lldp_params(p_hwfn, p_ptt, p_params); 720 break; 721 default: 722 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 723 return -EINVAL; 724 } 725 726 return 0; 727 } 728 #endif 729 730 static int 731 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 732 { 733 struct qed_dcbx_mib_meta_data data; 734 int rc = 0; 735 736 memset(&data, 0, sizeof(data)); 737 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 738 lldp_config_params); 739 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 740 data.size = sizeof(struct lldp_config_params_s); 741 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 742 743 return rc; 744 } 745 746 static int 747 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 748 struct qed_ptt *p_ptt, 749 enum qed_mib_read_type type) 750 { 751 struct qed_dcbx_mib_meta_data data; 752 int rc = 0; 753 754 memset(&data, 0, sizeof(data)); 755 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 756 lldp_status_params); 757 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 758 data.size = sizeof(struct lldp_status_params_s); 759 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 760 761 return rc; 762 } 763 764 static int 765 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 766 struct qed_ptt *p_ptt, 767 enum qed_mib_read_type type) 768 { 769 struct qed_dcbx_mib_meta_data data; 770 int rc = 0; 771 772 memset(&data, 0, sizeof(data)); 773 data.addr = p_hwfn->mcp_info->port_addr + 774 offsetof(struct public_port, operational_dcbx_mib); 775 data.mib = &p_hwfn->p_dcbx_info->operational; 776 data.size = sizeof(struct dcbx_mib); 777 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 778 779 return rc; 780 } 781 782 static int 783 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 784 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 785 { 786 struct qed_dcbx_mib_meta_data data; 787 int rc = 0; 788 789 memset(&data, 0, sizeof(data)); 790 data.addr = p_hwfn->mcp_info->port_addr + 791 offsetof(struct public_port, remote_dcbx_mib); 792 data.mib = &p_hwfn->p_dcbx_info->remote; 793 data.size = sizeof(struct dcbx_mib); 794 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 795 796 return rc; 797 } 798 799 static int 800 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 801 { 802 struct qed_dcbx_mib_meta_data data; 803 int rc = 0; 804 805 memset(&data, 0, sizeof(data)); 806 data.addr = p_hwfn->mcp_info->port_addr + 807 offsetof(struct public_port, local_admin_dcbx_mib); 808 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 809 data.size = sizeof(struct dcbx_local_params); 810 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 811 812 return rc; 813 } 814 815 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 816 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 817 { 818 int rc = -EINVAL; 819 820 switch (type) { 821 case QED_DCBX_OPERATIONAL_MIB: 822 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 823 break; 824 case QED_DCBX_REMOTE_MIB: 825 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 826 break; 827 case QED_DCBX_LOCAL_MIB: 828 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 829 break; 830 case QED_DCBX_REMOTE_LLDP_MIB: 831 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 832 break; 833 case QED_DCBX_LOCAL_LLDP_MIB: 834 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 835 break; 836 default: 837 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 838 } 839 840 return rc; 841 } 842 843 /* Read updated MIB. 844 * Reconfigure QM and invoke PF update ramrod command if operational MIB 845 * change is detected. 846 */ 847 int 848 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 849 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 850 { 851 int rc = 0; 852 853 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 854 if (rc) 855 return rc; 856 857 if (type == QED_DCBX_OPERATIONAL_MIB) { 858 rc = qed_dcbx_process_mib_info(p_hwfn); 859 if (!rc) { 860 /* reconfigure tcs of QM queues according 861 * to negotiation results 862 */ 863 qed_qm_reconf(p_hwfn, p_ptt); 864 865 /* update storm FW with negotiation results */ 866 qed_sp_pf_update(p_hwfn); 867 } 868 } 869 870 return rc; 871 } 872 873 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 874 { 875 int rc = 0; 876 877 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 878 if (!p_hwfn->p_dcbx_info) 879 rc = -ENOMEM; 880 881 return rc; 882 } 883 884 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn, 885 struct qed_dcbx_info *p_dcbx_info) 886 { 887 kfree(p_hwfn->p_dcbx_info); 888 } 889 890 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 891 struct qed_dcbx_results *p_src, 892 enum dcbx_protocol_type type) 893 { 894 p_data->dcb_enable_flag = p_src->arr[type].enable; 895 p_data->dcb_priority = p_src->arr[type].priority; 896 p_data->dcb_tc = p_src->arr[type].tc; 897 } 898 899 /* Set pf update ramrod command params */ 900 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 901 struct pf_update_ramrod_data *p_dest) 902 { 903 struct protocol_dcb_data *p_dcb_data; 904 bool update_flag = false; 905 906 p_dest->pf_id = p_src->pf_id; 907 908 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 909 p_dest->update_fcoe_dcb_data_flag = update_flag; 910 911 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 912 p_dest->update_roce_dcb_data_flag = update_flag; 913 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 914 p_dest->update_roce_dcb_data_flag = update_flag; 915 916 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 917 p_dest->update_iscsi_dcb_data_flag = update_flag; 918 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 919 p_dest->update_eth_dcb_data_flag = update_flag; 920 921 p_dcb_data = &p_dest->fcoe_dcb_data; 922 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 923 p_dcb_data = &p_dest->roce_dcb_data; 924 925 if (p_src->arr[DCBX_PROTOCOL_ROCE].update) 926 qed_dcbx_update_protocol_data(p_dcb_data, p_src, 927 DCBX_PROTOCOL_ROCE); 928 if (p_src->arr[DCBX_PROTOCOL_ROCE_V2].update) 929 qed_dcbx_update_protocol_data(p_dcb_data, p_src, 930 DCBX_PROTOCOL_ROCE_V2); 931 932 p_dcb_data = &p_dest->iscsi_dcb_data; 933 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 934 p_dcb_data = &p_dest->eth_dcb_data; 935 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 936 } 937 938 #ifdef CONFIG_DCB 939 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 940 struct qed_dcbx_get *p_get, 941 enum qed_mib_read_type type) 942 { 943 struct qed_ptt *p_ptt; 944 int rc; 945 946 if (IS_VF(p_hwfn->cdev)) 947 return -EINVAL; 948 949 p_ptt = qed_ptt_acquire(p_hwfn); 950 if (!p_ptt) 951 return -EBUSY; 952 953 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 954 if (rc) 955 goto out; 956 957 rc = qed_dcbx_get_params(p_hwfn, p_ptt, p_get, type); 958 959 out: 960 qed_ptt_release(p_hwfn, p_ptt); 961 return rc; 962 } 963 964 static void 965 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 966 u32 *pfc, struct qed_dcbx_params *p_params) 967 { 968 u8 pfc_map = 0; 969 int i; 970 971 if (p_params->pfc.willing) 972 *pfc |= DCBX_PFC_WILLING_MASK; 973 else 974 *pfc &= ~DCBX_PFC_WILLING_MASK; 975 976 if (p_params->pfc.enabled) 977 *pfc |= DCBX_PFC_ENABLED_MASK; 978 else 979 *pfc &= ~DCBX_PFC_ENABLED_MASK; 980 981 *pfc &= ~DCBX_PFC_CAPS_MASK; 982 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 983 984 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 985 if (p_params->pfc.prio[i]) 986 pfc_map |= BIT(i); 987 988 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 989 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 990 991 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 992 } 993 994 static void 995 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 996 struct dcbx_ets_feature *p_ets, 997 struct qed_dcbx_params *p_params) 998 { 999 u8 *bw_map, *tsa_map; 1000 u32 val; 1001 int i; 1002 1003 if (p_params->ets_willing) 1004 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1005 else 1006 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1007 1008 if (p_params->ets_cbs) 1009 p_ets->flags |= DCBX_ETS_CBS_MASK; 1010 else 1011 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1012 1013 if (p_params->ets_enabled) 1014 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1015 else 1016 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1017 1018 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1019 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1020 1021 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1022 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1023 p_ets->pri_tc_tbl[0] = 0; 1024 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1025 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1026 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1027 /* Copy the priority value to the corresponding 4 bits in the 1028 * traffic class table. 1029 */ 1030 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1031 p_ets->pri_tc_tbl[0] |= val; 1032 } 1033 for (i = 0; i < 2; i++) { 1034 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1035 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1036 } 1037 } 1038 1039 static void 1040 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1041 struct dcbx_app_priority_feature *p_app, 1042 struct qed_dcbx_params *p_params, bool ieee) 1043 { 1044 u32 *entry; 1045 int i; 1046 1047 if (p_params->app_willing) 1048 p_app->flags |= DCBX_APP_WILLING_MASK; 1049 else 1050 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1051 1052 if (p_params->app_valid) 1053 p_app->flags |= DCBX_APP_ENABLED_MASK; 1054 else 1055 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1056 1057 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1058 p_app->flags |= (u32)p_params->num_app_entries << 1059 DCBX_APP_NUM_ENTRIES_SHIFT; 1060 1061 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1062 entry = &p_app->app_pri_tbl[i].entry; 1063 *entry = 0; 1064 if (ieee) { 1065 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1066 switch (p_params->app_entry[i].sf_ieee) { 1067 case QED_DCBX_SF_IEEE_ETHTYPE: 1068 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1069 DCBX_APP_SF_IEEE_SHIFT); 1070 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1071 DCBX_APP_SF_SHIFT); 1072 break; 1073 case QED_DCBX_SF_IEEE_TCP_PORT: 1074 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1075 DCBX_APP_SF_IEEE_SHIFT); 1076 *entry |= ((u32)DCBX_APP_SF_PORT << 1077 DCBX_APP_SF_SHIFT); 1078 break; 1079 case QED_DCBX_SF_IEEE_UDP_PORT: 1080 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1081 DCBX_APP_SF_IEEE_SHIFT); 1082 *entry |= ((u32)DCBX_APP_SF_PORT << 1083 DCBX_APP_SF_SHIFT); 1084 break; 1085 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1086 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1087 DCBX_APP_SF_IEEE_SHIFT); 1088 *entry |= ((u32)DCBX_APP_SF_PORT << 1089 DCBX_APP_SF_SHIFT); 1090 break; 1091 } 1092 } else { 1093 *entry &= ~DCBX_APP_SF_MASK; 1094 if (p_params->app_entry[i].ethtype) 1095 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1096 DCBX_APP_SF_SHIFT); 1097 else 1098 *entry |= ((u32)DCBX_APP_SF_PORT << 1099 DCBX_APP_SF_SHIFT); 1100 } 1101 1102 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1103 *entry |= ((u32)p_params->app_entry[i].proto_id << 1104 DCBX_APP_PROTOCOL_ID_SHIFT); 1105 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1106 *entry |= ((u32)(p_params->app_entry[i].prio) << 1107 DCBX_APP_PRI_MAP_SHIFT); 1108 } 1109 } 1110 1111 static void 1112 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1113 struct dcbx_local_params *local_admin, 1114 struct qed_dcbx_set *params) 1115 { 1116 bool ieee = false; 1117 1118 local_admin->flags = 0; 1119 memcpy(&local_admin->features, 1120 &p_hwfn->p_dcbx_info->operational.features, 1121 sizeof(local_admin->features)); 1122 1123 if (params->enabled) { 1124 local_admin->config = params->ver_num; 1125 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1126 } else { 1127 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1128 } 1129 1130 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1131 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1132 ¶ms->config.params); 1133 1134 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1135 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1136 ¶ms->config.params); 1137 1138 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1139 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1140 ¶ms->config.params, ieee); 1141 } 1142 1143 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1144 struct qed_dcbx_set *params, bool hw_commit) 1145 { 1146 struct dcbx_local_params local_admin; 1147 struct qed_dcbx_mib_meta_data data; 1148 u32 resp = 0, param = 0; 1149 int rc = 0; 1150 1151 if (!hw_commit) { 1152 memcpy(&p_hwfn->p_dcbx_info->set, params, 1153 sizeof(struct qed_dcbx_set)); 1154 return 0; 1155 } 1156 1157 /* clear set-parmas cache */ 1158 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1159 1160 memset(&local_admin, 0, sizeof(local_admin)); 1161 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1162 1163 data.addr = p_hwfn->mcp_info->port_addr + 1164 offsetof(struct public_port, local_admin_dcbx_mib); 1165 data.local_admin = &local_admin; 1166 data.size = sizeof(struct dcbx_local_params); 1167 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1168 1169 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1170 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1171 if (rc) 1172 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1173 1174 return rc; 1175 } 1176 1177 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1178 struct qed_dcbx_set *params) 1179 { 1180 struct qed_dcbx_get *dcbx_info; 1181 int rc; 1182 1183 if (p_hwfn->p_dcbx_info->set.config.valid) { 1184 memcpy(params, &p_hwfn->p_dcbx_info->set, 1185 sizeof(struct qed_dcbx_set)); 1186 return 0; 1187 } 1188 1189 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1190 if (!dcbx_info) 1191 return -ENOMEM; 1192 1193 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1194 if (rc) { 1195 kfree(dcbx_info); 1196 return rc; 1197 } 1198 1199 p_hwfn->p_dcbx_info->set.override_flags = 0; 1200 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1201 if (dcbx_info->operational.cee) 1202 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1203 if (dcbx_info->operational.ieee) 1204 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1205 1206 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1207 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1208 &dcbx_info->operational.params, 1209 sizeof(struct qed_dcbx_admin_params)); 1210 p_hwfn->p_dcbx_info->set.config.valid = true; 1211 1212 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1213 1214 kfree(dcbx_info); 1215 1216 return 0; 1217 } 1218 1219 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1220 enum qed_mib_read_type type) 1221 { 1222 struct qed_dcbx_get *dcbx_info; 1223 1224 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1225 if (!dcbx_info) 1226 return NULL; 1227 1228 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1229 kfree(dcbx_info); 1230 return NULL; 1231 } 1232 1233 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1234 !dcbx_info->operational.enabled) { 1235 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1236 kfree(dcbx_info); 1237 return NULL; 1238 } 1239 1240 return dcbx_info; 1241 } 1242 1243 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1244 { 1245 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1246 struct qed_dcbx_get *dcbx_info; 1247 bool enabled; 1248 1249 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1250 if (!dcbx_info) 1251 return 0; 1252 1253 enabled = dcbx_info->operational.enabled; 1254 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1255 kfree(dcbx_info); 1256 1257 return enabled; 1258 } 1259 1260 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1261 { 1262 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1263 struct qed_dcbx_set dcbx_set; 1264 struct qed_ptt *ptt; 1265 int rc; 1266 1267 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1268 1269 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1270 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1271 if (rc) 1272 return 1; 1273 1274 dcbx_set.enabled = !!state; 1275 1276 ptt = qed_ptt_acquire(hwfn); 1277 if (!ptt) 1278 return 1; 1279 1280 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1281 1282 qed_ptt_release(hwfn, ptt); 1283 1284 return rc ? 1 : 0; 1285 } 1286 1287 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1288 u8 *pgid, u8 *bw_pct, u8 *up_map) 1289 { 1290 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1291 struct qed_dcbx_get *dcbx_info; 1292 1293 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1294 *prio_type = *pgid = *bw_pct = *up_map = 0; 1295 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1296 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1297 return; 1298 } 1299 1300 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1301 if (!dcbx_info) 1302 return; 1303 1304 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1305 kfree(dcbx_info); 1306 } 1307 1308 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1309 { 1310 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1311 struct qed_dcbx_get *dcbx_info; 1312 1313 *bw_pct = 0; 1314 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1315 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1316 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1317 return; 1318 } 1319 1320 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1321 if (!dcbx_info) 1322 return; 1323 1324 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1325 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1326 kfree(dcbx_info); 1327 } 1328 1329 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1330 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1331 { 1332 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1333 *prio = *bwg_id = *bw_pct = *up_map = 0; 1334 } 1335 1336 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1337 int bwg_id, u8 *bw_pct) 1338 { 1339 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1340 *bw_pct = 0; 1341 } 1342 1343 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1344 int priority, u8 *setting) 1345 { 1346 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1347 struct qed_dcbx_get *dcbx_info; 1348 1349 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1350 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1351 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1352 return; 1353 } 1354 1355 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1356 if (!dcbx_info) 1357 return; 1358 1359 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1360 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1361 kfree(dcbx_info); 1362 } 1363 1364 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1365 { 1366 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1367 struct qed_dcbx_set dcbx_set; 1368 struct qed_ptt *ptt; 1369 int rc; 1370 1371 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1372 priority, setting); 1373 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1374 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1375 return; 1376 } 1377 1378 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1379 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1380 if (rc) 1381 return; 1382 1383 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1384 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1385 1386 ptt = qed_ptt_acquire(hwfn); 1387 if (!ptt) 1388 return; 1389 1390 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1391 1392 qed_ptt_release(hwfn, ptt); 1393 } 1394 1395 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1396 { 1397 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1398 struct qed_dcbx_get *dcbx_info; 1399 int rc = 0; 1400 1401 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1402 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1403 if (!dcbx_info) 1404 return 1; 1405 1406 switch (capid) { 1407 case DCB_CAP_ATTR_PG: 1408 case DCB_CAP_ATTR_PFC: 1409 case DCB_CAP_ATTR_UP2TC: 1410 case DCB_CAP_ATTR_GSP: 1411 *cap = true; 1412 break; 1413 case DCB_CAP_ATTR_PG_TCS: 1414 case DCB_CAP_ATTR_PFC_TCS: 1415 *cap = 0x80; 1416 break; 1417 case DCB_CAP_ATTR_DCBX: 1418 *cap = (DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE | 1419 DCB_CAP_DCBX_VER_IEEE); 1420 break; 1421 default: 1422 *cap = false; 1423 rc = 1; 1424 } 1425 1426 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1427 kfree(dcbx_info); 1428 1429 return rc; 1430 } 1431 1432 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1433 { 1434 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1435 struct qed_dcbx_get *dcbx_info; 1436 int rc = 0; 1437 1438 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1439 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1440 if (!dcbx_info) 1441 return -EINVAL; 1442 1443 switch (tcid) { 1444 case DCB_NUMTCS_ATTR_PG: 1445 *num = dcbx_info->operational.params.max_ets_tc; 1446 break; 1447 case DCB_NUMTCS_ATTR_PFC: 1448 *num = dcbx_info->operational.params.pfc.max_tc; 1449 break; 1450 default: 1451 rc = -EINVAL; 1452 } 1453 1454 kfree(dcbx_info); 1455 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1456 1457 return rc; 1458 } 1459 1460 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1461 { 1462 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1463 struct qed_dcbx_get *dcbx_info; 1464 bool enabled; 1465 1466 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1467 if (!dcbx_info) 1468 return 0; 1469 1470 enabled = dcbx_info->operational.params.pfc.enabled; 1471 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1472 kfree(dcbx_info); 1473 1474 return enabled; 1475 } 1476 1477 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1478 { 1479 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1480 struct qed_dcbx_get *dcbx_info; 1481 u8 mode = 0; 1482 1483 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1484 if (!dcbx_info) 1485 return 0; 1486 1487 if (dcbx_info->operational.enabled) 1488 mode |= DCB_CAP_DCBX_LLD_MANAGED; 1489 if (dcbx_info->operational.ieee) 1490 mode |= DCB_CAP_DCBX_VER_IEEE; 1491 if (dcbx_info->operational.cee) 1492 mode |= DCB_CAP_DCBX_VER_CEE; 1493 1494 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1495 kfree(dcbx_info); 1496 1497 return mode; 1498 } 1499 1500 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1501 int tc, 1502 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1503 { 1504 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1505 struct qed_dcbx_set dcbx_set; 1506 struct qed_ptt *ptt; 1507 int rc; 1508 1509 DP_VERBOSE(hwfn, QED_MSG_DCB, 1510 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1511 tc, pri_type, pgid, bw_pct, up_map); 1512 1513 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1514 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1515 return; 1516 } 1517 1518 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1519 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1520 if (rc) 1521 return; 1522 1523 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1524 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1525 1526 ptt = qed_ptt_acquire(hwfn); 1527 if (!ptt) 1528 return; 1529 1530 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1531 1532 qed_ptt_release(hwfn, ptt); 1533 } 1534 1535 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1536 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1537 { 1538 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1539 } 1540 1541 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1542 { 1543 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1544 struct qed_dcbx_set dcbx_set; 1545 struct qed_ptt *ptt; 1546 int rc; 1547 1548 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1549 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1550 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1551 return; 1552 } 1553 1554 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1555 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1556 if (rc) 1557 return; 1558 1559 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1560 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1561 1562 ptt = qed_ptt_acquire(hwfn); 1563 if (!ptt) 1564 return; 1565 1566 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1567 1568 qed_ptt_release(hwfn, ptt); 1569 } 1570 1571 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1572 { 1573 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1574 } 1575 1576 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1577 { 1578 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1579 struct qed_dcbx_set dcbx_set; 1580 struct qed_ptt *ptt; 1581 int rc; 1582 1583 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1584 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1585 if (rc) 1586 return 1; 1587 1588 ptt = qed_ptt_acquire(hwfn); 1589 if (!ptt) 1590 return 1; 1591 1592 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1593 1594 qed_ptt_release(hwfn, ptt); 1595 1596 return rc; 1597 } 1598 1599 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1600 { 1601 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1602 struct qed_dcbx_set dcbx_set; 1603 struct qed_ptt *ptt; 1604 int rc; 1605 1606 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1607 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1608 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1609 if (rc) 1610 return 1; 1611 1612 switch (tcid) { 1613 case DCB_NUMTCS_ATTR_PG: 1614 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1615 dcbx_set.config.params.max_ets_tc = num; 1616 break; 1617 case DCB_NUMTCS_ATTR_PFC: 1618 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1619 dcbx_set.config.params.pfc.max_tc = num; 1620 break; 1621 default: 1622 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1623 return -EINVAL; 1624 } 1625 1626 ptt = qed_ptt_acquire(hwfn); 1627 if (!ptt) 1628 return -EINVAL; 1629 1630 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1631 1632 qed_ptt_release(hwfn, ptt); 1633 1634 return 0; 1635 } 1636 1637 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1638 { 1639 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1640 struct qed_dcbx_set dcbx_set; 1641 struct qed_ptt *ptt; 1642 int rc; 1643 1644 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1645 1646 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1647 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1648 if (rc) 1649 return; 1650 1651 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1652 dcbx_set.config.params.pfc.enabled = !!state; 1653 1654 ptt = qed_ptt_acquire(hwfn); 1655 if (!ptt) 1656 return; 1657 1658 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1659 1660 qed_ptt_release(hwfn, ptt); 1661 } 1662 1663 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1664 { 1665 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1666 struct qed_dcbx_get *dcbx_info; 1667 struct qed_app_entry *entry; 1668 bool ethtype; 1669 u8 prio = 0; 1670 int i; 1671 1672 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1673 if (!dcbx_info) 1674 return -EINVAL; 1675 1676 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1677 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1678 entry = &dcbx_info->operational.params.app_entry[i]; 1679 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1680 prio = entry->prio; 1681 break; 1682 } 1683 } 1684 1685 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1686 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1687 kfree(dcbx_info); 1688 return -EINVAL; 1689 } 1690 1691 kfree(dcbx_info); 1692 1693 return prio; 1694 } 1695 1696 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1697 u8 idtype, u16 idval, u8 pri_map) 1698 { 1699 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1700 struct qed_dcbx_set dcbx_set; 1701 struct qed_app_entry *entry; 1702 struct qed_ptt *ptt; 1703 bool ethtype; 1704 int rc, i; 1705 1706 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1707 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1708 if (rc) 1709 return -EINVAL; 1710 1711 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1712 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1713 entry = &dcbx_set.config.params.app_entry[i]; 1714 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1715 break; 1716 /* First empty slot */ 1717 if (!entry->proto_id) { 1718 dcbx_set.config.params.num_app_entries++; 1719 break; 1720 } 1721 } 1722 1723 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1724 DP_ERR(cdev, "App table is full\n"); 1725 return -EBUSY; 1726 } 1727 1728 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1729 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1730 dcbx_set.config.params.app_entry[i].proto_id = idval; 1731 dcbx_set.config.params.app_entry[i].prio = pri_map; 1732 1733 ptt = qed_ptt_acquire(hwfn); 1734 if (!ptt) 1735 return -EBUSY; 1736 1737 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1738 1739 qed_ptt_release(hwfn, ptt); 1740 1741 return rc; 1742 } 1743 1744 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1745 { 1746 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1747 struct qed_dcbx_set dcbx_set; 1748 struct qed_ptt *ptt; 1749 int rc; 1750 1751 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1752 1753 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && !(mode & DCB_CAP_DCBX_VER_CEE)) { 1754 DP_INFO(hwfn, "Allowed mode is cee, ieee or both\n"); 1755 return 1; 1756 } 1757 1758 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1759 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1760 if (rc) 1761 return 1; 1762 1763 dcbx_set.ver_num = 0; 1764 if (mode & DCB_CAP_DCBX_VER_CEE) { 1765 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1766 dcbx_set.enabled = true; 1767 } 1768 1769 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1770 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1771 dcbx_set.enabled = true; 1772 } 1773 1774 ptt = qed_ptt_acquire(hwfn); 1775 if (!ptt) 1776 return 1; 1777 1778 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1779 1780 qed_ptt_release(hwfn, ptt); 1781 1782 return 0; 1783 } 1784 1785 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1786 { 1787 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1788 struct qed_dcbx_get *dcbx_info; 1789 1790 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1791 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1792 if (!dcbx_info) 1793 return 1; 1794 1795 *flags = 0; 1796 switch (featid) { 1797 case DCB_FEATCFG_ATTR_PG: 1798 if (dcbx_info->operational.params.ets_enabled) 1799 *flags = DCB_FEATCFG_ENABLE; 1800 else 1801 *flags = DCB_FEATCFG_ERROR; 1802 break; 1803 case DCB_FEATCFG_ATTR_PFC: 1804 if (dcbx_info->operational.params.pfc.enabled) 1805 *flags = DCB_FEATCFG_ENABLE; 1806 else 1807 *flags = DCB_FEATCFG_ERROR; 1808 break; 1809 case DCB_FEATCFG_ATTR_APP: 1810 if (dcbx_info->operational.params.app_valid) 1811 *flags = DCB_FEATCFG_ENABLE; 1812 else 1813 *flags = DCB_FEATCFG_ERROR; 1814 break; 1815 default: 1816 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1817 kfree(dcbx_info); 1818 return 1; 1819 } 1820 1821 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1822 kfree(dcbx_info); 1823 1824 return 0; 1825 } 1826 1827 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1828 { 1829 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1830 struct qed_dcbx_set dcbx_set; 1831 bool enabled, willing; 1832 struct qed_ptt *ptt; 1833 int rc; 1834 1835 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1836 featid, flags); 1837 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1838 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1839 if (rc) 1840 return 1; 1841 1842 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1843 willing = !!(flags & DCB_FEATCFG_WILLING); 1844 switch (featid) { 1845 case DCB_FEATCFG_ATTR_PG: 1846 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1847 dcbx_set.config.params.ets_enabled = enabled; 1848 dcbx_set.config.params.ets_willing = willing; 1849 break; 1850 case DCB_FEATCFG_ATTR_PFC: 1851 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1852 dcbx_set.config.params.pfc.enabled = enabled; 1853 dcbx_set.config.params.pfc.willing = willing; 1854 break; 1855 case DCB_FEATCFG_ATTR_APP: 1856 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1857 dcbx_set.config.params.app_willing = willing; 1858 break; 1859 default: 1860 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1861 return 1; 1862 } 1863 1864 ptt = qed_ptt_acquire(hwfn); 1865 if (!ptt) 1866 return 1; 1867 1868 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1869 1870 qed_ptt_release(hwfn, ptt); 1871 1872 return 0; 1873 } 1874 1875 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1876 struct dcb_peer_app_info *info, 1877 u16 *app_count) 1878 { 1879 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1880 struct qed_dcbx_get *dcbx_info; 1881 1882 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1883 if (!dcbx_info) 1884 return -EINVAL; 1885 1886 info->willing = dcbx_info->remote.params.app_willing; 1887 info->error = dcbx_info->remote.params.app_error; 1888 *app_count = dcbx_info->remote.params.num_app_entries; 1889 kfree(dcbx_info); 1890 1891 return 0; 1892 } 1893 1894 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1895 struct dcb_app *table) 1896 { 1897 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1898 struct qed_dcbx_get *dcbx_info; 1899 int i; 1900 1901 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1902 if (!dcbx_info) 1903 return -EINVAL; 1904 1905 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 1906 if (dcbx_info->remote.params.app_entry[i].ethtype) 1907 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 1908 else 1909 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 1910 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 1911 table[i].protocol = 1912 dcbx_info->remote.params.app_entry[i].proto_id; 1913 } 1914 1915 kfree(dcbx_info); 1916 1917 return 0; 1918 } 1919 1920 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 1921 { 1922 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1923 struct qed_dcbx_get *dcbx_info; 1924 int i; 1925 1926 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1927 if (!dcbx_info) 1928 return -EINVAL; 1929 1930 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1931 if (dcbx_info->remote.params.pfc.prio[i]) 1932 pfc->pfc_en |= BIT(i); 1933 1934 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 1935 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 1936 pfc->pfc_en, pfc->tcs_supported); 1937 kfree(dcbx_info); 1938 1939 return 0; 1940 } 1941 1942 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 1943 { 1944 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1945 struct qed_dcbx_get *dcbx_info; 1946 int i; 1947 1948 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1949 if (!dcbx_info) 1950 return -EINVAL; 1951 1952 pg->willing = dcbx_info->remote.params.ets_willing; 1953 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1954 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 1955 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 1956 } 1957 1958 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 1959 kfree(dcbx_info); 1960 1961 return 0; 1962 } 1963 1964 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 1965 struct ieee_pfc *pfc, bool remote) 1966 { 1967 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1968 struct qed_dcbx_params *params; 1969 struct qed_dcbx_get *dcbx_info; 1970 int rc, i; 1971 1972 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1973 if (!dcbx_info) 1974 return -EINVAL; 1975 1976 if (!dcbx_info->operational.ieee) { 1977 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 1978 kfree(dcbx_info); 1979 return -EINVAL; 1980 } 1981 1982 if (remote) { 1983 memset(dcbx_info, 0, sizeof(*dcbx_info)); 1984 rc = qed_dcbx_query_params(hwfn, dcbx_info, 1985 QED_DCBX_REMOTE_MIB); 1986 if (rc) { 1987 kfree(dcbx_info); 1988 return -EINVAL; 1989 } 1990 1991 params = &dcbx_info->remote.params; 1992 } else { 1993 params = &dcbx_info->operational.params; 1994 } 1995 1996 pfc->pfc_cap = params->pfc.max_tc; 1997 pfc->pfc_en = 0; 1998 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1999 if (params->pfc.prio[i]) 2000 pfc->pfc_en |= BIT(i); 2001 2002 kfree(dcbx_info); 2003 2004 return 0; 2005 } 2006 2007 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2008 { 2009 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2010 } 2011 2012 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2013 { 2014 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2015 struct qed_dcbx_get *dcbx_info; 2016 struct qed_dcbx_set dcbx_set; 2017 struct qed_ptt *ptt; 2018 int rc, i; 2019 2020 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2021 if (!dcbx_info) 2022 return -EINVAL; 2023 2024 if (!dcbx_info->operational.ieee) { 2025 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2026 kfree(dcbx_info); 2027 return -EINVAL; 2028 } 2029 2030 kfree(dcbx_info); 2031 2032 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2033 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2034 if (rc) 2035 return -EINVAL; 2036 2037 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2038 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2039 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2040 2041 ptt = qed_ptt_acquire(hwfn); 2042 if (!ptt) 2043 return -EINVAL; 2044 2045 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2046 2047 qed_ptt_release(hwfn, ptt); 2048 2049 return rc; 2050 } 2051 2052 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2053 struct ieee_ets *ets, bool remote) 2054 { 2055 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2056 struct qed_dcbx_get *dcbx_info; 2057 struct qed_dcbx_params *params; 2058 int rc; 2059 2060 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2061 if (!dcbx_info) 2062 return -EINVAL; 2063 2064 if (!dcbx_info->operational.ieee) { 2065 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2066 kfree(dcbx_info); 2067 return -EINVAL; 2068 } 2069 2070 if (remote) { 2071 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2072 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2073 QED_DCBX_REMOTE_MIB); 2074 if (rc) { 2075 kfree(dcbx_info); 2076 return -EINVAL; 2077 } 2078 2079 params = &dcbx_info->remote.params; 2080 } else { 2081 params = &dcbx_info->operational.params; 2082 } 2083 2084 ets->ets_cap = params->max_ets_tc; 2085 ets->willing = params->ets_willing; 2086 ets->cbs = params->ets_cbs; 2087 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2088 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2089 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2090 kfree(dcbx_info); 2091 2092 return 0; 2093 } 2094 2095 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2096 { 2097 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2098 } 2099 2100 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2101 { 2102 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2103 struct qed_dcbx_get *dcbx_info; 2104 struct qed_dcbx_set dcbx_set; 2105 struct qed_ptt *ptt; 2106 int rc; 2107 2108 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2109 if (!dcbx_info) 2110 return -EINVAL; 2111 2112 if (!dcbx_info->operational.ieee) { 2113 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2114 kfree(dcbx_info); 2115 return -EINVAL; 2116 } 2117 2118 kfree(dcbx_info); 2119 2120 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2121 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2122 if (rc) 2123 return -EINVAL; 2124 2125 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2126 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2127 dcbx_set.config.params.ets_willing = ets->willing; 2128 dcbx_set.config.params.ets_cbs = ets->cbs; 2129 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2130 sizeof(ets->tc_tx_bw)); 2131 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2132 sizeof(ets->tc_tsa)); 2133 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2134 sizeof(ets->prio_tc)); 2135 2136 ptt = qed_ptt_acquire(hwfn); 2137 if (!ptt) 2138 return -EINVAL; 2139 2140 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2141 2142 qed_ptt_release(hwfn, ptt); 2143 2144 return rc; 2145 } 2146 2147 static int 2148 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2149 { 2150 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2151 } 2152 2153 static int 2154 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2155 { 2156 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2157 } 2158 2159 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2160 { 2161 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2162 struct qed_dcbx_get *dcbx_info; 2163 struct qed_app_entry *entry; 2164 bool ethtype; 2165 u8 prio = 0; 2166 int i; 2167 2168 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2169 if (!dcbx_info) 2170 return -EINVAL; 2171 2172 if (!dcbx_info->operational.ieee) { 2173 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2174 kfree(dcbx_info); 2175 return -EINVAL; 2176 } 2177 2178 /* ieee defines the selector field value for ethertype to be 1 */ 2179 ethtype = !!((app->selector - 1) == DCB_APP_IDTYPE_ETHTYPE); 2180 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2181 entry = &dcbx_info->operational.params.app_entry[i]; 2182 if ((entry->ethtype == ethtype) && 2183 (entry->proto_id == app->protocol)) { 2184 prio = entry->prio; 2185 break; 2186 } 2187 } 2188 2189 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2190 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2191 app->protocol); 2192 kfree(dcbx_info); 2193 return -EINVAL; 2194 } 2195 2196 app->priority = ffs(prio) - 1; 2197 2198 kfree(dcbx_info); 2199 2200 return 0; 2201 } 2202 2203 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2204 { 2205 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2206 struct qed_dcbx_get *dcbx_info; 2207 struct qed_dcbx_set dcbx_set; 2208 struct qed_app_entry *entry; 2209 struct qed_ptt *ptt; 2210 bool ethtype; 2211 int rc, i; 2212 2213 if (app->priority < 0 || app->priority >= QED_MAX_PFC_PRIORITIES) { 2214 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2215 return -EINVAL; 2216 } 2217 2218 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2219 if (!dcbx_info) 2220 return -EINVAL; 2221 2222 if (!dcbx_info->operational.ieee) { 2223 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2224 kfree(dcbx_info); 2225 return -EINVAL; 2226 } 2227 2228 kfree(dcbx_info); 2229 2230 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2231 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2232 if (rc) 2233 return -EINVAL; 2234 2235 /* ieee defines the selector field value for ethertype to be 1 */ 2236 ethtype = !!((app->selector - 1) == DCB_APP_IDTYPE_ETHTYPE); 2237 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2238 entry = &dcbx_set.config.params.app_entry[i]; 2239 if ((entry->ethtype == ethtype) && 2240 (entry->proto_id == app->protocol)) 2241 break; 2242 /* First empty slot */ 2243 if (!entry->proto_id) { 2244 dcbx_set.config.params.num_app_entries++; 2245 break; 2246 } 2247 } 2248 2249 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2250 DP_ERR(cdev, "App table is full\n"); 2251 return -EBUSY; 2252 } 2253 2254 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2255 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 2256 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2257 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2258 2259 ptt = qed_ptt_acquire(hwfn); 2260 if (!ptt) 2261 return -EBUSY; 2262 2263 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2264 2265 qed_ptt_release(hwfn, ptt); 2266 2267 return rc; 2268 } 2269 2270 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2271 .getstate = qed_dcbnl_getstate, 2272 .setstate = qed_dcbnl_setstate, 2273 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2274 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2275 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2276 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2277 .getpfccfg = qed_dcbnl_getpfccfg, 2278 .setpfccfg = qed_dcbnl_setpfccfg, 2279 .getcap = qed_dcbnl_getcap, 2280 .getnumtcs = qed_dcbnl_getnumtcs, 2281 .getpfcstate = qed_dcbnl_getpfcstate, 2282 .getdcbx = qed_dcbnl_getdcbx, 2283 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2284 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2285 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2286 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2287 .setall = qed_dcbnl_setall, 2288 .setnumtcs = qed_dcbnl_setnumtcs, 2289 .setpfcstate = qed_dcbnl_setpfcstate, 2290 .setapp = qed_dcbnl_setapp, 2291 .setdcbx = qed_dcbnl_setdcbx, 2292 .setfeatcfg = qed_dcbnl_setfeatcfg, 2293 .getfeatcfg = qed_dcbnl_getfeatcfg, 2294 .getapp = qed_dcbnl_getapp, 2295 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2296 .peer_getapptable = qed_dcbnl_peer_getapptable, 2297 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2298 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2299 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2300 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2301 .ieee_getets = qed_dcbnl_ieee_getets, 2302 .ieee_setets = qed_dcbnl_ieee_setets, 2303 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2304 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2305 .ieee_getapp = qed_dcbnl_ieee_getapp, 2306 .ieee_setapp = qed_dcbnl_ieee_setapp, 2307 }; 2308 2309 #endif 2310