1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 /* QLogic qed NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #include <linux/types.h> 8 #include <asm/byteorder.h> 9 #include <linux/bitops.h> 10 #include <linux/dcbnl.h> 11 #include <linux/errno.h> 12 #include <linux/kernel.h> 13 #include <linux/slab.h> 14 #include <linux/string.h> 15 #include "qed.h" 16 #include "qed_cxt.h" 17 #include "qed_dcbx.h" 18 #include "qed_hsi.h" 19 #include "qed_sp.h" 20 #include "qed_sriov.h" 21 #include "qed_rdma.h" 22 #ifdef CONFIG_DCB 23 #include <linux/qed/qed_eth_if.h> 24 #endif 25 26 #define QED_DCBX_MAX_MIB_READ_TRY (100) 27 #define QED_ETH_TYPE_DEFAULT (0) 28 #define QED_ETH_TYPE_ROCE (0x8915) 29 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 30 #define QED_ETH_TYPE_FCOE (0x8906) 31 #define QED_TCP_PORT_ISCSI (0xCBC) 32 33 #define QED_DCBX_INVALID_PRIORITY 0xFF 34 35 /* Get Traffic Class from priority traffic class table, 4 bits represent 36 * the traffic class corresponding to the priority. 37 */ 38 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 39 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 40 41 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 42 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI}, 43 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE}, 44 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE}, 45 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE}, 46 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}, 47 }; 48 49 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 50 { 51 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 52 DCBX_APP_SF_ETHTYPE); 53 } 54 55 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 56 { 57 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 58 59 /* Old MFW */ 60 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 61 return qed_dcbx_app_ethtype(app_info_bitmap); 62 63 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 64 } 65 66 static bool qed_dcbx_app_port(u32 app_info_bitmap) 67 { 68 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 69 DCBX_APP_SF_PORT); 70 } 71 72 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 73 { 74 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 75 76 /* Old MFW */ 77 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 78 return qed_dcbx_app_port(app_info_bitmap); 79 80 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 81 } 82 83 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 84 { 85 bool ethtype; 86 87 if (ieee) 88 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 89 else 90 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 91 92 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 93 } 94 95 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 96 { 97 bool port; 98 99 if (ieee) 100 port = qed_dcbx_ieee_app_port(app_info_bitmap, 101 DCBX_APP_SF_IEEE_TCP_PORT); 102 else 103 port = qed_dcbx_app_port(app_info_bitmap); 104 105 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 106 } 107 108 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 109 { 110 bool ethtype; 111 112 if (ieee) 113 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 114 else 115 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 116 117 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 118 } 119 120 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 121 { 122 bool ethtype; 123 124 if (ieee) 125 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 126 else 127 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 128 129 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 130 } 131 132 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 133 { 134 bool port; 135 136 if (ieee) 137 port = qed_dcbx_ieee_app_port(app_info_bitmap, 138 DCBX_APP_SF_IEEE_UDP_PORT); 139 else 140 port = qed_dcbx_app_port(app_info_bitmap); 141 142 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 143 } 144 145 static void 146 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 147 { 148 enum dcbx_protocol_type id; 149 int i; 150 151 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 152 p_data->dcbx_enabled); 153 154 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 155 id = qed_dcbx_app_update[i].id; 156 157 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 158 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 159 qed_dcbx_app_update[i].name, p_data->arr[id].update, 160 p_data->arr[id].enable, p_data->arr[id].priority, 161 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); 162 } 163 } 164 165 static void 166 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 167 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 168 bool app_tlv, bool enable, u8 prio, u8 tc, 169 enum dcbx_protocol_type type, 170 enum qed_pci_personality personality) 171 { 172 /* PF update ramrod data */ 173 p_data->arr[type].enable = enable; 174 p_data->arr[type].priority = prio; 175 p_data->arr[type].tc = tc; 176 if (enable) 177 p_data->arr[type].update = UPDATE_DCB; 178 else 179 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP; 180 181 if (test_bit(QED_MF_DONT_ADD_VLAN0_TAG, &p_hwfn->cdev->mf_bits)) 182 p_data->arr[type].dont_add_vlan0 = true; 183 184 /* QM reconf data */ 185 if (app_tlv && p_hwfn->hw_info.personality == personality) 186 qed_hw_info_set_offload_tc(&p_hwfn->hw_info, tc); 187 188 /* Configure dcbx vlan priority in doorbell block for roce EDPM */ 189 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && 190 type == DCBX_PROTOCOL_ROCE) { 191 qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1); 192 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1); 193 } 194 } 195 196 /* Update app protocol data and hw_info fields with the TLV info */ 197 static void 198 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 199 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 200 bool app_tlv, bool enable, u8 prio, u8 tc, 201 enum dcbx_protocol_type type) 202 { 203 enum qed_pci_personality personality; 204 enum dcbx_protocol_type id; 205 int i; 206 207 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 208 id = qed_dcbx_app_update[i].id; 209 210 if (type != id) 211 continue; 212 213 personality = qed_dcbx_app_update[i].personality; 214 215 qed_dcbx_set_params(p_data, p_hwfn, p_ptt, app_tlv, enable, 216 prio, tc, type, personality); 217 } 218 } 219 220 static bool 221 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 222 u32 app_prio_bitmap, 223 u16 id, enum dcbx_protocol_type *type, bool ieee) 224 { 225 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 226 *type = DCBX_PROTOCOL_FCOE; 227 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 228 *type = DCBX_PROTOCOL_ROCE; 229 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 230 *type = DCBX_PROTOCOL_ISCSI; 231 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 232 *type = DCBX_PROTOCOL_ETH; 233 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 234 *type = DCBX_PROTOCOL_ROCE_V2; 235 } else { 236 *type = DCBX_MAX_PROTOCOL_TYPE; 237 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 238 "No action required, App TLV entry = 0x%x\n", 239 app_prio_bitmap); 240 return false; 241 } 242 243 return true; 244 } 245 246 /* Parse app TLV's to update TC information in hw_info structure for 247 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 248 */ 249 static int 250 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 251 struct qed_dcbx_results *p_data, 252 struct dcbx_app_priority_entry *p_tbl, 253 u32 pri_tc_tbl, int count, u8 dcbx_version) 254 { 255 enum dcbx_protocol_type type; 256 bool enable, ieee, eth_tlv; 257 u8 tc, priority_map; 258 u16 protocol_id; 259 int priority; 260 int i; 261 262 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 263 264 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 265 eth_tlv = false; 266 /* Parse APP TLV */ 267 for (i = 0; i < count; i++) { 268 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 269 DCBX_APP_PROTOCOL_ID); 270 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 271 DCBX_APP_PRI_MAP); 272 priority = ffs(priority_map) - 1; 273 if (priority < 0) { 274 DP_ERR(p_hwfn, "Invalid priority\n"); 275 return -EINVAL; 276 } 277 278 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 279 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 280 protocol_id, &type, ieee)) { 281 /* ETH always have the enable bit reset, as it gets 282 * vlan information per packet. For other protocols, 283 * should be set according to the dcbx_enabled 284 * indication, but we only got here if there was an 285 * app tlv for the protocol, so dcbx must be enabled. 286 */ 287 if (type == DCBX_PROTOCOL_ETH) { 288 enable = false; 289 eth_tlv = true; 290 } else { 291 enable = true; 292 } 293 294 qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, true, 295 enable, priority, tc, type); 296 } 297 } 298 299 /* If Eth TLV is not detected, use UFP TC as default TC */ 300 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && !eth_tlv) 301 p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc; 302 303 /* Update ramrod protocol data and hw_info fields 304 * with default info when corresponding APP TLV's are not detected. 305 * The enabled field has a different logic for ethernet as only for 306 * ethernet dcb should disabled by default, as the information arrives 307 * from the OS (unless an explicit app tlv was present). 308 */ 309 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 310 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 311 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 312 if (p_data->arr[type].update) 313 continue; 314 315 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 316 qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, false, enable, 317 priority, tc, type); 318 } 319 320 return 0; 321 } 322 323 /* Parse app TLV's to update TC information in hw_info structure for 324 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 325 */ 326 static int 327 qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 328 { 329 struct dcbx_app_priority_feature *p_app; 330 struct dcbx_app_priority_entry *p_tbl; 331 struct qed_dcbx_results data = { 0 }; 332 struct dcbx_ets_feature *p_ets; 333 struct qed_hw_info *p_info; 334 u32 pri_tc_tbl, flags; 335 u8 dcbx_version; 336 int num_entries; 337 int rc = 0; 338 339 flags = p_hwfn->p_dcbx_info->operational.flags; 340 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 341 342 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 343 p_tbl = p_app->app_pri_tbl; 344 345 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 346 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 347 348 p_info = &p_hwfn->hw_info; 349 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 350 351 rc = qed_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl, 352 num_entries, dcbx_version); 353 if (rc) 354 return rc; 355 356 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags, 357 DCBX_ETS_MAX_TCS); 358 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC); 359 data.pf_id = p_hwfn->rel_pf_id; 360 data.dcbx_enabled = !!dcbx_version; 361 362 qed_dcbx_dp_protocol(p_hwfn, &data); 363 364 memcpy(&p_hwfn->p_dcbx_info->results, &data, 365 sizeof(struct qed_dcbx_results)); 366 367 return 0; 368 } 369 370 static int 371 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 372 struct qed_ptt *p_ptt, 373 struct qed_dcbx_mib_meta_data *p_data, 374 enum qed_mib_read_type type) 375 { 376 u32 prefix_seq_num, suffix_seq_num; 377 int read_count = 0; 378 int rc = 0; 379 380 /* The data is considered to be valid only if both sequence numbers are 381 * the same. 382 */ 383 do { 384 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 385 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 386 p_data->addr, p_data->size); 387 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 388 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 389 } else { 390 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 391 p_data->addr, p_data->size); 392 prefix_seq_num = p_data->mib->prefix_seq_num; 393 suffix_seq_num = p_data->mib->suffix_seq_num; 394 } 395 read_count++; 396 397 DP_VERBOSE(p_hwfn, 398 QED_MSG_DCB, 399 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 400 type, read_count, prefix_seq_num, suffix_seq_num); 401 } while ((prefix_seq_num != suffix_seq_num) && 402 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 403 404 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 405 DP_ERR(p_hwfn, 406 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 407 type, read_count, prefix_seq_num, suffix_seq_num); 408 rc = -EIO; 409 } 410 411 return rc; 412 } 413 414 static void 415 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 416 struct qed_dcbx_app_prio *p_prio, 417 struct qed_dcbx_results *p_results) 418 { 419 u8 val; 420 421 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 422 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 423 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 424 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 425 426 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 427 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 428 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 429 430 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 431 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 432 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 433 p_prio->roce_v2 = val; 434 } 435 436 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 437 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 438 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 439 440 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 441 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 442 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 443 444 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 445 p_results->arr[DCBX_PROTOCOL_ETH].enable) 446 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 447 448 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 449 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 450 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 451 p_prio->eth); 452 } 453 454 static void 455 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 456 struct dcbx_app_priority_feature *p_app, 457 struct dcbx_app_priority_entry *p_tbl, 458 struct qed_dcbx_params *p_params, bool ieee) 459 { 460 struct qed_app_entry *entry; 461 u8 pri_map; 462 int i; 463 464 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 465 DCBX_APP_WILLING); 466 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 467 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 468 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 469 DCBX_APP_NUM_ENTRIES); 470 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 471 entry = &p_params->app_entry[i]; 472 if (ieee) { 473 u8 sf_ieee; 474 u32 val; 475 476 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 477 DCBX_APP_SF_IEEE); 478 switch (sf_ieee) { 479 case DCBX_APP_SF_IEEE_RESERVED: 480 /* Old MFW */ 481 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 482 DCBX_APP_SF); 483 entry->sf_ieee = val ? 484 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 485 QED_DCBX_SF_IEEE_ETHTYPE; 486 break; 487 case DCBX_APP_SF_IEEE_ETHTYPE: 488 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 489 break; 490 case DCBX_APP_SF_IEEE_TCP_PORT: 491 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 492 break; 493 case DCBX_APP_SF_IEEE_UDP_PORT: 494 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 495 break; 496 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 497 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 498 break; 499 } 500 } else { 501 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 502 DCBX_APP_SF)); 503 } 504 505 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 506 entry->prio = ffs(pri_map) - 1; 507 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 508 DCBX_APP_PROTOCOL_ID); 509 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 510 entry->proto_id, 511 &entry->proto_type, ieee); 512 } 513 514 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 515 "APP params: willing %d, valid %d error = %d\n", 516 p_params->app_willing, p_params->app_valid, 517 p_params->app_error); 518 } 519 520 static void 521 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 522 u32 pfc, struct qed_dcbx_params *p_params) 523 { 524 u8 pfc_map; 525 526 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 527 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 528 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 529 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 530 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 531 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 532 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 533 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 534 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 535 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 536 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 537 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 538 539 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 540 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 541 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 542 p_params->pfc.enabled); 543 } 544 545 static void 546 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 547 struct dcbx_ets_feature *p_ets, 548 struct qed_dcbx_params *p_params) 549 { 550 u32 bw_map[2], tsa_map[2], pri_map; 551 int i; 552 553 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 554 DCBX_ETS_WILLING); 555 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 556 DCBX_ETS_ENABLED); 557 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 558 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 559 DCBX_ETS_MAX_TCS); 560 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 561 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 562 p_params->ets_willing, p_params->ets_enabled, 563 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 564 p_params->max_ets_tc); 565 566 if (p_params->ets_enabled && !p_params->max_ets_tc) { 567 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES; 568 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 569 "ETS params: max_ets_tc is forced to %d\n", 570 p_params->max_ets_tc); 571 } 572 573 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 574 * encoded in a type u32 array of size 2. 575 */ 576 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 577 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 578 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 579 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 580 pri_map = p_ets->pri_tc_tbl[0]; 581 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 582 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 583 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 584 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 585 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 586 "elem %d bw_tbl %x tsa_tbl %x\n", 587 i, p_params->ets_tc_bw_tbl[i], 588 p_params->ets_tc_tsa_tbl[i]); 589 } 590 } 591 592 static void 593 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 594 struct dcbx_app_priority_feature *p_app, 595 struct dcbx_app_priority_entry *p_tbl, 596 struct dcbx_ets_feature *p_ets, 597 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 598 { 599 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 600 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 601 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 602 } 603 604 static void 605 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 606 { 607 struct dcbx_features *p_feat; 608 609 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 610 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 611 p_feat->app.app_pri_tbl, &p_feat->ets, 612 p_feat->pfc, ¶ms->local.params, false); 613 params->local.valid = true; 614 } 615 616 static void 617 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 618 { 619 struct dcbx_features *p_feat; 620 621 p_feat = &p_hwfn->p_dcbx_info->remote.features; 622 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 623 p_feat->app.app_pri_tbl, &p_feat->ets, 624 p_feat->pfc, ¶ms->remote.params, false); 625 params->remote.valid = true; 626 } 627 628 static void 629 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 630 struct qed_dcbx_get *params) 631 { 632 struct qed_dcbx_operational_params *p_operational; 633 struct qed_dcbx_results *p_results; 634 struct dcbx_features *p_feat; 635 bool enabled, err; 636 u32 flags; 637 bool val; 638 639 flags = p_hwfn->p_dcbx_info->operational.flags; 640 641 /* If DCBx version is non zero, then negotiation 642 * was successfuly performed 643 */ 644 p_operational = ¶ms->operational; 645 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 646 DCBX_CONFIG_VERSION_DISABLED); 647 if (!enabled) { 648 p_operational->enabled = enabled; 649 p_operational->valid = false; 650 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n"); 651 return; 652 } 653 654 p_feat = &p_hwfn->p_dcbx_info->operational.features; 655 p_results = &p_hwfn->p_dcbx_info->results; 656 657 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 658 DCBX_CONFIG_VERSION_IEEE); 659 p_operational->ieee = val; 660 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 661 DCBX_CONFIG_VERSION_CEE); 662 p_operational->cee = val; 663 664 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 665 DCBX_CONFIG_VERSION_STATIC); 666 p_operational->local = val; 667 668 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 669 "Version support: ieee %d, cee %d, static %d\n", 670 p_operational->ieee, p_operational->cee, 671 p_operational->local); 672 673 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 674 p_feat->app.app_pri_tbl, &p_feat->ets, 675 p_feat->pfc, ¶ms->operational.params, 676 p_operational->ieee); 677 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 678 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 679 p_operational->err = err; 680 p_operational->enabled = enabled; 681 p_operational->valid = true; 682 } 683 684 static void 685 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 686 struct qed_dcbx_get *params) 687 { 688 struct lldp_config_params_s *p_local; 689 690 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 691 692 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 693 sizeof(p_local->local_chassis_id)); 694 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 695 sizeof(p_local->local_port_id)); 696 } 697 698 static void 699 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 700 struct qed_dcbx_get *params) 701 { 702 struct lldp_status_params_s *p_remote; 703 704 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 705 706 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 707 sizeof(p_remote->peer_chassis_id)); 708 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 709 sizeof(p_remote->peer_port_id)); 710 } 711 712 static int 713 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params, 714 enum qed_mib_read_type type) 715 { 716 switch (type) { 717 case QED_DCBX_REMOTE_MIB: 718 qed_dcbx_get_remote_params(p_hwfn, p_params); 719 break; 720 case QED_DCBX_LOCAL_MIB: 721 qed_dcbx_get_local_params(p_hwfn, p_params); 722 break; 723 case QED_DCBX_OPERATIONAL_MIB: 724 qed_dcbx_get_operational_params(p_hwfn, p_params); 725 break; 726 case QED_DCBX_REMOTE_LLDP_MIB: 727 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params); 728 break; 729 case QED_DCBX_LOCAL_LLDP_MIB: 730 qed_dcbx_get_local_lldp_params(p_hwfn, p_params); 731 break; 732 default: 733 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 734 return -EINVAL; 735 } 736 737 return 0; 738 } 739 740 static int 741 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 742 { 743 struct qed_dcbx_mib_meta_data data; 744 int rc = 0; 745 746 memset(&data, 0, sizeof(data)); 747 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 748 lldp_config_params); 749 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 750 data.size = sizeof(struct lldp_config_params_s); 751 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 752 753 return rc; 754 } 755 756 static int 757 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 758 struct qed_ptt *p_ptt, 759 enum qed_mib_read_type type) 760 { 761 struct qed_dcbx_mib_meta_data data; 762 int rc = 0; 763 764 memset(&data, 0, sizeof(data)); 765 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 766 lldp_status_params); 767 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 768 data.size = sizeof(struct lldp_status_params_s); 769 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 770 771 return rc; 772 } 773 774 static int 775 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 776 struct qed_ptt *p_ptt, 777 enum qed_mib_read_type type) 778 { 779 struct qed_dcbx_mib_meta_data data; 780 int rc = 0; 781 782 memset(&data, 0, sizeof(data)); 783 data.addr = p_hwfn->mcp_info->port_addr + 784 offsetof(struct public_port, operational_dcbx_mib); 785 data.mib = &p_hwfn->p_dcbx_info->operational; 786 data.size = sizeof(struct dcbx_mib); 787 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 788 789 return rc; 790 } 791 792 static int 793 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 794 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 795 { 796 struct qed_dcbx_mib_meta_data data; 797 int rc = 0; 798 799 memset(&data, 0, sizeof(data)); 800 data.addr = p_hwfn->mcp_info->port_addr + 801 offsetof(struct public_port, remote_dcbx_mib); 802 data.mib = &p_hwfn->p_dcbx_info->remote; 803 data.size = sizeof(struct dcbx_mib); 804 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 805 806 return rc; 807 } 808 809 static int 810 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 811 { 812 struct qed_dcbx_mib_meta_data data; 813 int rc = 0; 814 815 memset(&data, 0, sizeof(data)); 816 data.addr = p_hwfn->mcp_info->port_addr + 817 offsetof(struct public_port, local_admin_dcbx_mib); 818 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 819 data.size = sizeof(struct dcbx_local_params); 820 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 821 822 return rc; 823 } 824 825 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 826 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 827 { 828 int rc = -EINVAL; 829 830 switch (type) { 831 case QED_DCBX_OPERATIONAL_MIB: 832 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 833 break; 834 case QED_DCBX_REMOTE_MIB: 835 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 836 break; 837 case QED_DCBX_LOCAL_MIB: 838 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 839 break; 840 case QED_DCBX_REMOTE_LLDP_MIB: 841 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 842 break; 843 case QED_DCBX_LOCAL_LLDP_MIB: 844 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 845 break; 846 default: 847 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 848 } 849 850 return rc; 851 } 852 853 static void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type) 854 { 855 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common; 856 void *cookie = hwfn->cdev->ops_cookie; 857 858 if (cookie && op->dcbx_aen) 859 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type); 860 } 861 862 /* Read updated MIB. 863 * Reconfigure QM and invoke PF update ramrod command if operational MIB 864 * change is detected. 865 */ 866 int 867 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 868 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 869 { 870 int rc = 0; 871 872 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 873 if (rc) 874 return rc; 875 876 if (type == QED_DCBX_OPERATIONAL_MIB) { 877 rc = qed_dcbx_process_mib_info(p_hwfn, p_ptt); 878 if (!rc) { 879 /* reconfigure tcs of QM queues according 880 * to negotiation results 881 */ 882 qed_qm_reconf(p_hwfn, p_ptt); 883 884 /* update storm FW with negotiation results */ 885 qed_sp_pf_update(p_hwfn); 886 887 /* for roce PFs, we may want to enable/disable DPM 888 * when DCBx change occurs 889 */ 890 if (p_hwfn->hw_info.personality == 891 QED_PCI_ETH_ROCE) 892 qed_roce_dpm_dcbx(p_hwfn, p_ptt); 893 } 894 } 895 896 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 897 898 if (type == QED_DCBX_OPERATIONAL_MIB) { 899 struct qed_dcbx_results *p_data; 900 u16 val; 901 902 /* Configure in NIG which protocols support EDPM and should 903 * honor PFC. 904 */ 905 p_data = &p_hwfn->p_dcbx_info->results; 906 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) | 907 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc); 908 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT; 909 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN; 910 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val); 911 } 912 913 qed_dcbx_aen(p_hwfn, type); 914 915 return rc; 916 } 917 918 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 919 { 920 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 921 if (!p_hwfn->p_dcbx_info) 922 return -ENOMEM; 923 924 return 0; 925 } 926 927 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn) 928 { 929 kfree(p_hwfn->p_dcbx_info); 930 p_hwfn->p_dcbx_info = NULL; 931 } 932 933 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 934 struct qed_dcbx_results *p_src, 935 enum dcbx_protocol_type type) 936 { 937 p_data->dcb_enable_flag = p_src->arr[type].enable; 938 p_data->dcb_priority = p_src->arr[type].priority; 939 p_data->dcb_tc = p_src->arr[type].tc; 940 p_data->dcb_dont_add_vlan0 = p_src->arr[type].dont_add_vlan0; 941 } 942 943 /* Set pf update ramrod command params */ 944 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 945 struct pf_update_ramrod_data *p_dest) 946 { 947 struct protocol_dcb_data *p_dcb_data; 948 u8 update_flag; 949 950 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 951 p_dest->update_fcoe_dcb_data_mode = update_flag; 952 953 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 954 p_dest->update_roce_dcb_data_mode = update_flag; 955 956 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 957 p_dest->update_rroce_dcb_data_mode = update_flag; 958 959 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 960 p_dest->update_iscsi_dcb_data_mode = update_flag; 961 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 962 p_dest->update_eth_dcb_data_mode = update_flag; 963 964 p_dcb_data = &p_dest->fcoe_dcb_data; 965 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 966 p_dcb_data = &p_dest->roce_dcb_data; 967 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE); 968 p_dcb_data = &p_dest->rroce_dcb_data; 969 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2); 970 p_dcb_data = &p_dest->iscsi_dcb_data; 971 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 972 p_dcb_data = &p_dest->eth_dcb_data; 973 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 974 } 975 976 u8 qed_dcbx_get_priority_tc(struct qed_hwfn *p_hwfn, u8 pri) 977 { 978 struct qed_dcbx_get *dcbx_info = &p_hwfn->p_dcbx_info->get; 979 980 if (pri >= QED_MAX_PFC_PRIORITIES) { 981 DP_ERR(p_hwfn, "Invalid priority %d\n", pri); 982 return QED_DCBX_DEFAULT_TC; 983 } 984 985 if (!dcbx_info->operational.valid) { 986 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 987 "Dcbx parameters not available\n"); 988 return QED_DCBX_DEFAULT_TC; 989 } 990 991 return dcbx_info->operational.params.ets_pri_tc_tbl[pri]; 992 } 993 994 #ifdef CONFIG_DCB 995 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 996 struct qed_dcbx_get *p_get, 997 enum qed_mib_read_type type) 998 { 999 struct qed_ptt *p_ptt; 1000 int rc; 1001 1002 if (IS_VF(p_hwfn->cdev)) 1003 return -EINVAL; 1004 1005 p_ptt = qed_ptt_acquire(p_hwfn); 1006 if (!p_ptt) 1007 return -EBUSY; 1008 1009 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 1010 if (rc) 1011 goto out; 1012 1013 rc = qed_dcbx_get_params(p_hwfn, p_get, type); 1014 1015 out: 1016 qed_ptt_release(p_hwfn, p_ptt); 1017 return rc; 1018 } 1019 1020 static void 1021 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 1022 u32 *pfc, struct qed_dcbx_params *p_params) 1023 { 1024 u8 pfc_map = 0; 1025 int i; 1026 1027 *pfc &= ~DCBX_PFC_ERROR_MASK; 1028 1029 if (p_params->pfc.willing) 1030 *pfc |= DCBX_PFC_WILLING_MASK; 1031 else 1032 *pfc &= ~DCBX_PFC_WILLING_MASK; 1033 1034 if (p_params->pfc.enabled) 1035 *pfc |= DCBX_PFC_ENABLED_MASK; 1036 else 1037 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1038 1039 *pfc &= ~DCBX_PFC_CAPS_MASK; 1040 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 1041 1042 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1043 if (p_params->pfc.prio[i]) 1044 pfc_map |= BIT(i); 1045 1046 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1047 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 1048 1049 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 1050 } 1051 1052 static void 1053 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 1054 struct dcbx_ets_feature *p_ets, 1055 struct qed_dcbx_params *p_params) 1056 { 1057 u8 *bw_map, *tsa_map; 1058 u32 val; 1059 int i; 1060 1061 if (p_params->ets_willing) 1062 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1063 else 1064 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1065 1066 if (p_params->ets_cbs) 1067 p_ets->flags |= DCBX_ETS_CBS_MASK; 1068 else 1069 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1070 1071 if (p_params->ets_enabled) 1072 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1073 else 1074 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1075 1076 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1077 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1078 1079 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1080 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1081 p_ets->pri_tc_tbl[0] = 0; 1082 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1083 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1084 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1085 /* Copy the priority value to the corresponding 4 bits in the 1086 * traffic class table. 1087 */ 1088 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1089 p_ets->pri_tc_tbl[0] |= val; 1090 } 1091 for (i = 0; i < 2; i++) { 1092 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1093 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1094 } 1095 } 1096 1097 static void 1098 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1099 struct dcbx_app_priority_feature *p_app, 1100 struct qed_dcbx_params *p_params, bool ieee) 1101 { 1102 u32 *entry; 1103 int i; 1104 1105 if (p_params->app_willing) 1106 p_app->flags |= DCBX_APP_WILLING_MASK; 1107 else 1108 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1109 1110 if (p_params->app_valid) 1111 p_app->flags |= DCBX_APP_ENABLED_MASK; 1112 else 1113 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1114 1115 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1116 p_app->flags |= (u32)p_params->num_app_entries << 1117 DCBX_APP_NUM_ENTRIES_SHIFT; 1118 1119 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1120 entry = &p_app->app_pri_tbl[i].entry; 1121 *entry = 0; 1122 if (ieee) { 1123 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1124 switch (p_params->app_entry[i].sf_ieee) { 1125 case QED_DCBX_SF_IEEE_ETHTYPE: 1126 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1127 DCBX_APP_SF_IEEE_SHIFT); 1128 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1129 DCBX_APP_SF_SHIFT); 1130 break; 1131 case QED_DCBX_SF_IEEE_TCP_PORT: 1132 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1133 DCBX_APP_SF_IEEE_SHIFT); 1134 *entry |= ((u32)DCBX_APP_SF_PORT << 1135 DCBX_APP_SF_SHIFT); 1136 break; 1137 case QED_DCBX_SF_IEEE_UDP_PORT: 1138 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1139 DCBX_APP_SF_IEEE_SHIFT); 1140 *entry |= ((u32)DCBX_APP_SF_PORT << 1141 DCBX_APP_SF_SHIFT); 1142 break; 1143 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1144 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1145 DCBX_APP_SF_IEEE_SHIFT); 1146 *entry |= ((u32)DCBX_APP_SF_PORT << 1147 DCBX_APP_SF_SHIFT); 1148 break; 1149 } 1150 } else { 1151 *entry &= ~DCBX_APP_SF_MASK; 1152 if (p_params->app_entry[i].ethtype) 1153 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1154 DCBX_APP_SF_SHIFT); 1155 else 1156 *entry |= ((u32)DCBX_APP_SF_PORT << 1157 DCBX_APP_SF_SHIFT); 1158 } 1159 1160 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1161 *entry |= ((u32)p_params->app_entry[i].proto_id << 1162 DCBX_APP_PROTOCOL_ID_SHIFT); 1163 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1164 *entry |= ((u32)(p_params->app_entry[i].prio) << 1165 DCBX_APP_PRI_MAP_SHIFT); 1166 } 1167 } 1168 1169 static void 1170 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1171 struct dcbx_local_params *local_admin, 1172 struct qed_dcbx_set *params) 1173 { 1174 bool ieee = false; 1175 1176 local_admin->flags = 0; 1177 memcpy(&local_admin->features, 1178 &p_hwfn->p_dcbx_info->operational.features, 1179 sizeof(local_admin->features)); 1180 1181 if (params->enabled) { 1182 local_admin->config = params->ver_num; 1183 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1184 } else { 1185 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1186 } 1187 1188 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n", 1189 local_admin->config); 1190 1191 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1192 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1193 ¶ms->config.params); 1194 1195 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1196 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1197 ¶ms->config.params); 1198 1199 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1200 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1201 ¶ms->config.params, ieee); 1202 } 1203 1204 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1205 struct qed_dcbx_set *params, bool hw_commit) 1206 { 1207 struct dcbx_local_params local_admin; 1208 struct qed_dcbx_mib_meta_data data; 1209 u32 resp = 0, param = 0; 1210 int rc = 0; 1211 1212 if (!hw_commit) { 1213 memcpy(&p_hwfn->p_dcbx_info->set, params, 1214 sizeof(struct qed_dcbx_set)); 1215 return 0; 1216 } 1217 1218 /* clear set-parmas cache */ 1219 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1220 1221 memset(&local_admin, 0, sizeof(local_admin)); 1222 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1223 1224 data.addr = p_hwfn->mcp_info->port_addr + 1225 offsetof(struct public_port, local_admin_dcbx_mib); 1226 data.local_admin = &local_admin; 1227 data.size = sizeof(struct dcbx_local_params); 1228 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1229 1230 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1231 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1232 if (rc) 1233 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1234 1235 return rc; 1236 } 1237 1238 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1239 struct qed_dcbx_set *params) 1240 { 1241 struct qed_dcbx_get *dcbx_info; 1242 int rc; 1243 1244 if (p_hwfn->p_dcbx_info->set.config.valid) { 1245 memcpy(params, &p_hwfn->p_dcbx_info->set, 1246 sizeof(struct qed_dcbx_set)); 1247 return 0; 1248 } 1249 1250 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1251 if (!dcbx_info) 1252 return -ENOMEM; 1253 1254 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1255 if (rc) { 1256 kfree(dcbx_info); 1257 return rc; 1258 } 1259 1260 p_hwfn->p_dcbx_info->set.override_flags = 0; 1261 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1262 if (dcbx_info->operational.cee) 1263 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1264 if (dcbx_info->operational.ieee) 1265 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1266 if (dcbx_info->operational.local) 1267 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1268 1269 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1270 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1271 &dcbx_info->operational.params, 1272 sizeof(struct qed_dcbx_admin_params)); 1273 p_hwfn->p_dcbx_info->set.config.valid = true; 1274 1275 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1276 1277 kfree(dcbx_info); 1278 1279 return 0; 1280 } 1281 1282 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1283 enum qed_mib_read_type type) 1284 { 1285 struct qed_dcbx_get *dcbx_info; 1286 1287 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_ATOMIC); 1288 if (!dcbx_info) 1289 return NULL; 1290 1291 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1292 kfree(dcbx_info); 1293 return NULL; 1294 } 1295 1296 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1297 !dcbx_info->operational.enabled) { 1298 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1299 kfree(dcbx_info); 1300 return NULL; 1301 } 1302 1303 return dcbx_info; 1304 } 1305 1306 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1307 { 1308 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1309 struct qed_dcbx_get *dcbx_info; 1310 bool enabled; 1311 1312 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1313 if (!dcbx_info) 1314 return 0; 1315 1316 enabled = dcbx_info->operational.enabled; 1317 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1318 kfree(dcbx_info); 1319 1320 return enabled; 1321 } 1322 1323 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1324 { 1325 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1326 struct qed_dcbx_set dcbx_set; 1327 struct qed_ptt *ptt; 1328 int rc; 1329 1330 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1331 1332 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1333 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1334 if (rc) 1335 return 1; 1336 1337 dcbx_set.enabled = !!state; 1338 1339 ptt = qed_ptt_acquire(hwfn); 1340 if (!ptt) 1341 return 1; 1342 1343 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1344 1345 qed_ptt_release(hwfn, ptt); 1346 1347 return rc ? 1 : 0; 1348 } 1349 1350 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1351 u8 *pgid, u8 *bw_pct, u8 *up_map) 1352 { 1353 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1354 struct qed_dcbx_get *dcbx_info; 1355 1356 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1357 *prio_type = *pgid = *bw_pct = *up_map = 0; 1358 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1359 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1360 return; 1361 } 1362 1363 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1364 if (!dcbx_info) 1365 return; 1366 1367 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1368 kfree(dcbx_info); 1369 } 1370 1371 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1372 { 1373 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1374 struct qed_dcbx_get *dcbx_info; 1375 1376 *bw_pct = 0; 1377 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1378 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1379 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1380 return; 1381 } 1382 1383 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1384 if (!dcbx_info) 1385 return; 1386 1387 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1388 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1389 kfree(dcbx_info); 1390 } 1391 1392 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1393 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1394 { 1395 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1396 *prio = *bwg_id = *bw_pct = *up_map = 0; 1397 } 1398 1399 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1400 int bwg_id, u8 *bw_pct) 1401 { 1402 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1403 *bw_pct = 0; 1404 } 1405 1406 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1407 int priority, u8 *setting) 1408 { 1409 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1410 struct qed_dcbx_get *dcbx_info; 1411 1412 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1413 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1414 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1415 return; 1416 } 1417 1418 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1419 if (!dcbx_info) 1420 return; 1421 1422 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1423 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1424 kfree(dcbx_info); 1425 } 1426 1427 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1428 { 1429 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1430 struct qed_dcbx_set dcbx_set; 1431 struct qed_ptt *ptt; 1432 int rc; 1433 1434 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1435 priority, setting); 1436 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1437 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1438 return; 1439 } 1440 1441 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1442 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1443 if (rc) 1444 return; 1445 1446 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1447 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1448 1449 ptt = qed_ptt_acquire(hwfn); 1450 if (!ptt) 1451 return; 1452 1453 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1454 1455 qed_ptt_release(hwfn, ptt); 1456 } 1457 1458 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1459 { 1460 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1461 struct qed_dcbx_get *dcbx_info; 1462 int rc = 0; 1463 1464 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1465 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1466 if (!dcbx_info) 1467 return 1; 1468 1469 switch (capid) { 1470 case DCB_CAP_ATTR_PG: 1471 case DCB_CAP_ATTR_PFC: 1472 case DCB_CAP_ATTR_UP2TC: 1473 case DCB_CAP_ATTR_GSP: 1474 *cap = true; 1475 break; 1476 case DCB_CAP_ATTR_PG_TCS: 1477 case DCB_CAP_ATTR_PFC_TCS: 1478 *cap = 0x80; 1479 break; 1480 case DCB_CAP_ATTR_DCBX: 1481 *cap = (DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_VER_IEEE | 1482 DCB_CAP_DCBX_STATIC); 1483 break; 1484 default: 1485 *cap = false; 1486 rc = 1; 1487 } 1488 1489 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1490 kfree(dcbx_info); 1491 1492 return rc; 1493 } 1494 1495 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1496 { 1497 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1498 struct qed_dcbx_get *dcbx_info; 1499 int rc = 0; 1500 1501 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1502 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1503 if (!dcbx_info) 1504 return -EINVAL; 1505 1506 switch (tcid) { 1507 case DCB_NUMTCS_ATTR_PG: 1508 *num = dcbx_info->operational.params.max_ets_tc; 1509 break; 1510 case DCB_NUMTCS_ATTR_PFC: 1511 *num = dcbx_info->operational.params.pfc.max_tc; 1512 break; 1513 default: 1514 rc = -EINVAL; 1515 } 1516 1517 kfree(dcbx_info); 1518 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1519 1520 return rc; 1521 } 1522 1523 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1524 { 1525 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1526 struct qed_dcbx_get *dcbx_info; 1527 bool enabled; 1528 1529 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1530 if (!dcbx_info) 1531 return 0; 1532 1533 enabled = dcbx_info->operational.params.pfc.enabled; 1534 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1535 kfree(dcbx_info); 1536 1537 return enabled; 1538 } 1539 1540 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1541 { 1542 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1543 struct qed_dcbx_get *dcbx_info; 1544 u8 mode = 0; 1545 1546 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1547 if (!dcbx_info) 1548 return 0; 1549 1550 if (dcbx_info->operational.ieee) 1551 mode |= DCB_CAP_DCBX_VER_IEEE; 1552 if (dcbx_info->operational.cee) 1553 mode |= DCB_CAP_DCBX_VER_CEE; 1554 if (dcbx_info->operational.local) 1555 mode |= DCB_CAP_DCBX_STATIC; 1556 1557 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1558 kfree(dcbx_info); 1559 1560 return mode; 1561 } 1562 1563 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1564 int tc, 1565 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1566 { 1567 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1568 struct qed_dcbx_set dcbx_set; 1569 struct qed_ptt *ptt; 1570 int rc; 1571 1572 DP_VERBOSE(hwfn, QED_MSG_DCB, 1573 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1574 tc, pri_type, pgid, bw_pct, up_map); 1575 1576 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1577 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1578 return; 1579 } 1580 1581 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1582 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1583 if (rc) 1584 return; 1585 1586 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1587 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1588 1589 ptt = qed_ptt_acquire(hwfn); 1590 if (!ptt) 1591 return; 1592 1593 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1594 1595 qed_ptt_release(hwfn, ptt); 1596 } 1597 1598 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1599 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1600 { 1601 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1602 } 1603 1604 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1605 { 1606 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1607 struct qed_dcbx_set dcbx_set; 1608 struct qed_ptt *ptt; 1609 int rc; 1610 1611 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1612 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1613 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1614 return; 1615 } 1616 1617 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1618 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1619 if (rc) 1620 return; 1621 1622 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1623 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1624 1625 ptt = qed_ptt_acquire(hwfn); 1626 if (!ptt) 1627 return; 1628 1629 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1630 1631 qed_ptt_release(hwfn, ptt); 1632 } 1633 1634 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1635 { 1636 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1637 } 1638 1639 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1640 { 1641 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1642 struct qed_dcbx_set dcbx_set; 1643 struct qed_ptt *ptt; 1644 int rc; 1645 1646 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1647 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1648 if (rc) 1649 return 1; 1650 1651 ptt = qed_ptt_acquire(hwfn); 1652 if (!ptt) 1653 return 1; 1654 1655 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1656 1657 qed_ptt_release(hwfn, ptt); 1658 1659 return rc; 1660 } 1661 1662 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1663 { 1664 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1665 struct qed_dcbx_set dcbx_set; 1666 struct qed_ptt *ptt; 1667 int rc; 1668 1669 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1670 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1671 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1672 if (rc) 1673 return 1; 1674 1675 switch (tcid) { 1676 case DCB_NUMTCS_ATTR_PG: 1677 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1678 dcbx_set.config.params.max_ets_tc = num; 1679 break; 1680 case DCB_NUMTCS_ATTR_PFC: 1681 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1682 dcbx_set.config.params.pfc.max_tc = num; 1683 break; 1684 default: 1685 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1686 return -EINVAL; 1687 } 1688 1689 ptt = qed_ptt_acquire(hwfn); 1690 if (!ptt) 1691 return -EINVAL; 1692 1693 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1694 1695 qed_ptt_release(hwfn, ptt); 1696 1697 return 0; 1698 } 1699 1700 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1701 { 1702 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1703 struct qed_dcbx_set dcbx_set; 1704 struct qed_ptt *ptt; 1705 int rc; 1706 1707 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1708 1709 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1710 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1711 if (rc) 1712 return; 1713 1714 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1715 dcbx_set.config.params.pfc.enabled = !!state; 1716 1717 ptt = qed_ptt_acquire(hwfn); 1718 if (!ptt) 1719 return; 1720 1721 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1722 1723 qed_ptt_release(hwfn, ptt); 1724 } 1725 1726 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1727 { 1728 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1729 struct qed_dcbx_get *dcbx_info; 1730 struct qed_app_entry *entry; 1731 bool ethtype; 1732 u8 prio = 0; 1733 int i; 1734 1735 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1736 if (!dcbx_info) 1737 return -EINVAL; 1738 1739 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1740 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1741 entry = &dcbx_info->operational.params.app_entry[i]; 1742 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1743 prio = entry->prio; 1744 break; 1745 } 1746 } 1747 1748 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1749 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1750 kfree(dcbx_info); 1751 return -EINVAL; 1752 } 1753 1754 kfree(dcbx_info); 1755 1756 return prio; 1757 } 1758 1759 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1760 u8 idtype, u16 idval, u8 pri_map) 1761 { 1762 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1763 struct qed_dcbx_set dcbx_set; 1764 struct qed_app_entry *entry; 1765 struct qed_ptt *ptt; 1766 bool ethtype; 1767 int rc, i; 1768 1769 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1770 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1771 if (rc) 1772 return -EINVAL; 1773 1774 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1775 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1776 entry = &dcbx_set.config.params.app_entry[i]; 1777 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1778 break; 1779 /* First empty slot */ 1780 if (!entry->proto_id) { 1781 dcbx_set.config.params.num_app_entries++; 1782 break; 1783 } 1784 } 1785 1786 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1787 DP_ERR(cdev, "App table is full\n"); 1788 return -EBUSY; 1789 } 1790 1791 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1792 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1793 dcbx_set.config.params.app_entry[i].proto_id = idval; 1794 dcbx_set.config.params.app_entry[i].prio = pri_map; 1795 1796 ptt = qed_ptt_acquire(hwfn); 1797 if (!ptt) 1798 return -EBUSY; 1799 1800 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1801 1802 qed_ptt_release(hwfn, ptt); 1803 1804 return rc; 1805 } 1806 1807 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1808 { 1809 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1810 struct qed_dcbx_set dcbx_set; 1811 struct qed_ptt *ptt; 1812 int rc; 1813 1814 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1815 1816 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && 1817 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) { 1818 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n"); 1819 return 1; 1820 } 1821 1822 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1823 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1824 if (rc) 1825 return 1; 1826 1827 dcbx_set.ver_num = 0; 1828 if (mode & DCB_CAP_DCBX_VER_CEE) { 1829 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1830 dcbx_set.enabled = true; 1831 } 1832 1833 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1834 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1835 dcbx_set.enabled = true; 1836 } 1837 1838 if (mode & DCB_CAP_DCBX_STATIC) { 1839 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1840 dcbx_set.enabled = true; 1841 } 1842 1843 ptt = qed_ptt_acquire(hwfn); 1844 if (!ptt) 1845 return 1; 1846 1847 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1848 1849 qed_ptt_release(hwfn, ptt); 1850 1851 return rc; 1852 } 1853 1854 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1855 { 1856 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1857 struct qed_dcbx_get *dcbx_info; 1858 1859 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1860 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1861 if (!dcbx_info) 1862 return 1; 1863 1864 *flags = 0; 1865 switch (featid) { 1866 case DCB_FEATCFG_ATTR_PG: 1867 if (dcbx_info->operational.params.ets_enabled) 1868 *flags = DCB_FEATCFG_ENABLE; 1869 else 1870 *flags = DCB_FEATCFG_ERROR; 1871 break; 1872 case DCB_FEATCFG_ATTR_PFC: 1873 if (dcbx_info->operational.params.pfc.enabled) 1874 *flags = DCB_FEATCFG_ENABLE; 1875 else 1876 *flags = DCB_FEATCFG_ERROR; 1877 break; 1878 case DCB_FEATCFG_ATTR_APP: 1879 if (dcbx_info->operational.params.app_valid) 1880 *flags = DCB_FEATCFG_ENABLE; 1881 else 1882 *flags = DCB_FEATCFG_ERROR; 1883 break; 1884 default: 1885 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1886 kfree(dcbx_info); 1887 return 1; 1888 } 1889 1890 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1891 kfree(dcbx_info); 1892 1893 return 0; 1894 } 1895 1896 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1897 { 1898 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1899 struct qed_dcbx_set dcbx_set; 1900 bool enabled, willing; 1901 struct qed_ptt *ptt; 1902 int rc; 1903 1904 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1905 featid, flags); 1906 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1907 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1908 if (rc) 1909 return 1; 1910 1911 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1912 willing = !!(flags & DCB_FEATCFG_WILLING); 1913 switch (featid) { 1914 case DCB_FEATCFG_ATTR_PG: 1915 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1916 dcbx_set.config.params.ets_enabled = enabled; 1917 dcbx_set.config.params.ets_willing = willing; 1918 break; 1919 case DCB_FEATCFG_ATTR_PFC: 1920 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1921 dcbx_set.config.params.pfc.enabled = enabled; 1922 dcbx_set.config.params.pfc.willing = willing; 1923 break; 1924 case DCB_FEATCFG_ATTR_APP: 1925 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1926 dcbx_set.config.params.app_willing = willing; 1927 break; 1928 default: 1929 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1930 return 1; 1931 } 1932 1933 ptt = qed_ptt_acquire(hwfn); 1934 if (!ptt) 1935 return 1; 1936 1937 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1938 1939 qed_ptt_release(hwfn, ptt); 1940 1941 return 0; 1942 } 1943 1944 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1945 struct dcb_peer_app_info *info, 1946 u16 *app_count) 1947 { 1948 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1949 struct qed_dcbx_get *dcbx_info; 1950 1951 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1952 if (!dcbx_info) 1953 return -EINVAL; 1954 1955 info->willing = dcbx_info->remote.params.app_willing; 1956 info->error = dcbx_info->remote.params.app_error; 1957 *app_count = dcbx_info->remote.params.num_app_entries; 1958 kfree(dcbx_info); 1959 1960 return 0; 1961 } 1962 1963 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1964 struct dcb_app *table) 1965 { 1966 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1967 struct qed_dcbx_get *dcbx_info; 1968 int i; 1969 1970 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1971 if (!dcbx_info) 1972 return -EINVAL; 1973 1974 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 1975 if (dcbx_info->remote.params.app_entry[i].ethtype) 1976 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 1977 else 1978 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 1979 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 1980 table[i].protocol = 1981 dcbx_info->remote.params.app_entry[i].proto_id; 1982 } 1983 1984 kfree(dcbx_info); 1985 1986 return 0; 1987 } 1988 1989 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 1990 { 1991 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1992 struct qed_dcbx_get *dcbx_info; 1993 int i; 1994 1995 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1996 if (!dcbx_info) 1997 return -EINVAL; 1998 1999 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2000 if (dcbx_info->remote.params.pfc.prio[i]) 2001 pfc->pfc_en |= BIT(i); 2002 2003 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 2004 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 2005 pfc->pfc_en, pfc->tcs_supported); 2006 kfree(dcbx_info); 2007 2008 return 0; 2009 } 2010 2011 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 2012 { 2013 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2014 struct qed_dcbx_get *dcbx_info; 2015 int i; 2016 2017 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2018 if (!dcbx_info) 2019 return -EINVAL; 2020 2021 pg->willing = dcbx_info->remote.params.ets_willing; 2022 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 2023 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 2024 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 2025 } 2026 2027 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 2028 kfree(dcbx_info); 2029 2030 return 0; 2031 } 2032 2033 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 2034 struct ieee_pfc *pfc, bool remote) 2035 { 2036 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2037 struct qed_dcbx_params *params; 2038 struct qed_dcbx_get *dcbx_info; 2039 int rc, i; 2040 2041 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2042 if (!dcbx_info) 2043 return -EINVAL; 2044 2045 if (!dcbx_info->operational.ieee) { 2046 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2047 kfree(dcbx_info); 2048 return -EINVAL; 2049 } 2050 2051 if (remote) { 2052 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2053 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2054 QED_DCBX_REMOTE_MIB); 2055 if (rc) { 2056 kfree(dcbx_info); 2057 return -EINVAL; 2058 } 2059 2060 params = &dcbx_info->remote.params; 2061 } else { 2062 params = &dcbx_info->operational.params; 2063 } 2064 2065 pfc->pfc_cap = params->pfc.max_tc; 2066 pfc->pfc_en = 0; 2067 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2068 if (params->pfc.prio[i]) 2069 pfc->pfc_en |= BIT(i); 2070 2071 kfree(dcbx_info); 2072 2073 return 0; 2074 } 2075 2076 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2077 { 2078 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2079 } 2080 2081 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2082 { 2083 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2084 struct qed_dcbx_get *dcbx_info; 2085 struct qed_dcbx_set dcbx_set; 2086 struct qed_ptt *ptt; 2087 int rc, i; 2088 2089 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2090 if (!dcbx_info) 2091 return -EINVAL; 2092 2093 if (!dcbx_info->operational.ieee) { 2094 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2095 kfree(dcbx_info); 2096 return -EINVAL; 2097 } 2098 2099 kfree(dcbx_info); 2100 2101 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2102 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2103 if (rc) 2104 return -EINVAL; 2105 2106 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2107 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2108 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2109 2110 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap; 2111 2112 ptt = qed_ptt_acquire(hwfn); 2113 if (!ptt) 2114 return -EINVAL; 2115 2116 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2117 2118 qed_ptt_release(hwfn, ptt); 2119 2120 return rc; 2121 } 2122 2123 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2124 struct ieee_ets *ets, bool remote) 2125 { 2126 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2127 struct qed_dcbx_get *dcbx_info; 2128 struct qed_dcbx_params *params; 2129 int rc; 2130 2131 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2132 if (!dcbx_info) 2133 return -EINVAL; 2134 2135 if (!dcbx_info->operational.ieee) { 2136 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2137 kfree(dcbx_info); 2138 return -EINVAL; 2139 } 2140 2141 if (remote) { 2142 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2143 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2144 QED_DCBX_REMOTE_MIB); 2145 if (rc) { 2146 kfree(dcbx_info); 2147 return -EINVAL; 2148 } 2149 2150 params = &dcbx_info->remote.params; 2151 } else { 2152 params = &dcbx_info->operational.params; 2153 } 2154 2155 ets->ets_cap = params->max_ets_tc; 2156 ets->willing = params->ets_willing; 2157 ets->cbs = params->ets_cbs; 2158 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2159 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2160 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2161 kfree(dcbx_info); 2162 2163 return 0; 2164 } 2165 2166 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2167 { 2168 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2169 } 2170 2171 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2172 { 2173 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2174 struct qed_dcbx_get *dcbx_info; 2175 struct qed_dcbx_set dcbx_set; 2176 struct qed_ptt *ptt; 2177 int rc; 2178 2179 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2180 if (!dcbx_info) 2181 return -EINVAL; 2182 2183 if (!dcbx_info->operational.ieee) { 2184 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2185 kfree(dcbx_info); 2186 return -EINVAL; 2187 } 2188 2189 kfree(dcbx_info); 2190 2191 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2192 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2193 if (rc) 2194 return -EINVAL; 2195 2196 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2197 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2198 dcbx_set.config.params.ets_willing = ets->willing; 2199 dcbx_set.config.params.ets_cbs = ets->cbs; 2200 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2201 sizeof(ets->tc_tx_bw)); 2202 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2203 sizeof(ets->tc_tsa)); 2204 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2205 sizeof(ets->prio_tc)); 2206 2207 ptt = qed_ptt_acquire(hwfn); 2208 if (!ptt) 2209 return -EINVAL; 2210 2211 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2212 2213 qed_ptt_release(hwfn, ptt); 2214 2215 return rc; 2216 } 2217 2218 static int 2219 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2220 { 2221 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2222 } 2223 2224 static int 2225 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2226 { 2227 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2228 } 2229 2230 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee) 2231 { 2232 switch (selector) { 2233 case IEEE_8021QAZ_APP_SEL_ETHERTYPE: 2234 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 2235 break; 2236 case IEEE_8021QAZ_APP_SEL_STREAM: 2237 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 2238 break; 2239 case IEEE_8021QAZ_APP_SEL_DGRAM: 2240 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 2241 break; 2242 case IEEE_8021QAZ_APP_SEL_ANY: 2243 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 2244 break; 2245 default: 2246 return -EINVAL; 2247 } 2248 2249 return 0; 2250 } 2251 2252 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2253 { 2254 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2255 struct qed_dcbx_get *dcbx_info; 2256 struct qed_app_entry *entry; 2257 u8 prio = 0; 2258 u8 sf_ieee; 2259 int i; 2260 2261 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n", 2262 app->selector, app->protocol); 2263 2264 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2265 DP_INFO(cdev, "Invalid selector field value %d\n", 2266 app->selector); 2267 return -EINVAL; 2268 } 2269 2270 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2271 if (!dcbx_info) 2272 return -EINVAL; 2273 2274 if (!dcbx_info->operational.ieee) { 2275 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2276 kfree(dcbx_info); 2277 return -EINVAL; 2278 } 2279 2280 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2281 entry = &dcbx_info->operational.params.app_entry[i]; 2282 if ((entry->sf_ieee == sf_ieee) && 2283 (entry->proto_id == app->protocol)) { 2284 prio = entry->prio; 2285 break; 2286 } 2287 } 2288 2289 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2290 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2291 app->protocol); 2292 kfree(dcbx_info); 2293 return -EINVAL; 2294 } 2295 2296 app->priority = ffs(prio) - 1; 2297 2298 kfree(dcbx_info); 2299 2300 return 0; 2301 } 2302 2303 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2304 { 2305 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2306 struct qed_dcbx_get *dcbx_info; 2307 struct qed_dcbx_set dcbx_set; 2308 struct qed_app_entry *entry; 2309 struct qed_ptt *ptt; 2310 u8 sf_ieee; 2311 int rc, i; 2312 2313 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n", 2314 app->selector, app->protocol, app->priority); 2315 if (app->priority >= QED_MAX_PFC_PRIORITIES) { 2316 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2317 return -EINVAL; 2318 } 2319 2320 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2321 DP_INFO(cdev, "Invalid selector field value %d\n", 2322 app->selector); 2323 return -EINVAL; 2324 } 2325 2326 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2327 if (!dcbx_info) 2328 return -EINVAL; 2329 2330 if (!dcbx_info->operational.ieee) { 2331 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2332 kfree(dcbx_info); 2333 return -EINVAL; 2334 } 2335 2336 kfree(dcbx_info); 2337 2338 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2339 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2340 if (rc) 2341 return -EINVAL; 2342 2343 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2344 entry = &dcbx_set.config.params.app_entry[i]; 2345 if ((entry->sf_ieee == sf_ieee) && 2346 (entry->proto_id == app->protocol)) 2347 break; 2348 /* First empty slot */ 2349 if (!entry->proto_id) { 2350 dcbx_set.config.params.num_app_entries++; 2351 break; 2352 } 2353 } 2354 2355 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2356 DP_ERR(cdev, "App table is full\n"); 2357 return -EBUSY; 2358 } 2359 2360 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2361 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee; 2362 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2363 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2364 2365 ptt = qed_ptt_acquire(hwfn); 2366 if (!ptt) 2367 return -EBUSY; 2368 2369 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2370 2371 qed_ptt_release(hwfn, ptt); 2372 2373 return rc; 2374 } 2375 2376 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2377 .getstate = qed_dcbnl_getstate, 2378 .setstate = qed_dcbnl_setstate, 2379 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2380 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2381 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2382 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2383 .getpfccfg = qed_dcbnl_getpfccfg, 2384 .setpfccfg = qed_dcbnl_setpfccfg, 2385 .getcap = qed_dcbnl_getcap, 2386 .getnumtcs = qed_dcbnl_getnumtcs, 2387 .getpfcstate = qed_dcbnl_getpfcstate, 2388 .getdcbx = qed_dcbnl_getdcbx, 2389 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2390 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2391 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2392 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2393 .setall = qed_dcbnl_setall, 2394 .setnumtcs = qed_dcbnl_setnumtcs, 2395 .setpfcstate = qed_dcbnl_setpfcstate, 2396 .setapp = qed_dcbnl_setapp, 2397 .setdcbx = qed_dcbnl_setdcbx, 2398 .setfeatcfg = qed_dcbnl_setfeatcfg, 2399 .getfeatcfg = qed_dcbnl_getfeatcfg, 2400 .getapp = qed_dcbnl_getapp, 2401 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2402 .peer_getapptable = qed_dcbnl_peer_getapptable, 2403 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2404 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2405 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2406 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2407 .ieee_getets = qed_dcbnl_ieee_getets, 2408 .ieee_setets = qed_dcbnl_ieee_setets, 2409 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2410 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2411 .ieee_getapp = qed_dcbnl_ieee_getapp, 2412 .ieee_setapp = qed_dcbnl_ieee_setapp, 2413 }; 2414 2415 #endif 2416