1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/bitops.h> 36 #include <linux/dcbnl.h> 37 #include <linux/errno.h> 38 #include <linux/kernel.h> 39 #include <linux/slab.h> 40 #include <linux/string.h> 41 #include "qed.h" 42 #include "qed_cxt.h" 43 #include "qed_dcbx.h" 44 #include "qed_hsi.h" 45 #include "qed_sp.h" 46 #include "qed_sriov.h" 47 #include "qed_rdma.h" 48 #ifdef CONFIG_DCB 49 #include <linux/qed/qed_eth_if.h> 50 #endif 51 52 #define QED_DCBX_MAX_MIB_READ_TRY (100) 53 #define QED_ETH_TYPE_DEFAULT (0) 54 #define QED_ETH_TYPE_ROCE (0x8915) 55 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 56 #define QED_ETH_TYPE_FCOE (0x8906) 57 #define QED_TCP_PORT_ISCSI (0xCBC) 58 59 #define QED_DCBX_INVALID_PRIORITY 0xFF 60 61 /* Get Traffic Class from priority traffic class table, 4 bits represent 62 * the traffic class corresponding to the priority. 63 */ 64 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 65 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 66 67 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 68 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI}, 69 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE}, 70 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE}, 71 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE}, 72 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}, 73 }; 74 75 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 76 { 77 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 78 DCBX_APP_SF_ETHTYPE); 79 } 80 81 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 82 { 83 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 84 85 /* Old MFW */ 86 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 87 return qed_dcbx_app_ethtype(app_info_bitmap); 88 89 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 90 } 91 92 static bool qed_dcbx_app_port(u32 app_info_bitmap) 93 { 94 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 95 DCBX_APP_SF_PORT); 96 } 97 98 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 99 { 100 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 101 102 /* Old MFW */ 103 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 104 return qed_dcbx_app_port(app_info_bitmap); 105 106 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 107 } 108 109 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 110 { 111 bool ethtype; 112 113 if (ieee) 114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 115 else 116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 117 118 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 119 } 120 121 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 122 { 123 bool port; 124 125 if (ieee) 126 port = qed_dcbx_ieee_app_port(app_info_bitmap, 127 DCBX_APP_SF_IEEE_TCP_PORT); 128 else 129 port = qed_dcbx_app_port(app_info_bitmap); 130 131 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 132 } 133 134 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 135 { 136 bool ethtype; 137 138 if (ieee) 139 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 140 else 141 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 142 143 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 144 } 145 146 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 147 { 148 bool ethtype; 149 150 if (ieee) 151 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 152 else 153 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 154 155 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 156 } 157 158 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 159 { 160 bool port; 161 162 if (ieee) 163 port = qed_dcbx_ieee_app_port(app_info_bitmap, 164 DCBX_APP_SF_IEEE_UDP_PORT); 165 else 166 port = qed_dcbx_app_port(app_info_bitmap); 167 168 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 169 } 170 171 static void 172 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 173 { 174 enum dcbx_protocol_type id; 175 int i; 176 177 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 178 p_data->dcbx_enabled); 179 180 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 181 id = qed_dcbx_app_update[i].id; 182 183 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 184 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 185 qed_dcbx_app_update[i].name, p_data->arr[id].update, 186 p_data->arr[id].enable, p_data->arr[id].priority, 187 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); 188 } 189 } 190 191 static void 192 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 193 struct qed_hw_info *p_info, 194 bool enable, 195 u8 prio, 196 u8 tc, 197 enum dcbx_protocol_type type, 198 enum qed_pci_personality personality) 199 { 200 /* PF update ramrod data */ 201 p_data->arr[type].enable = enable; 202 p_data->arr[type].priority = prio; 203 p_data->arr[type].tc = tc; 204 if (enable) 205 p_data->arr[type].update = UPDATE_DCB; 206 else 207 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP; 208 209 /* QM reconf data */ 210 if (p_info->personality == personality) 211 p_info->offload_tc = tc; 212 } 213 214 /* Update app protocol data and hw_info fields with the TLV info */ 215 static void 216 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 217 struct qed_hwfn *p_hwfn, 218 bool enable, 219 u8 prio, u8 tc, enum dcbx_protocol_type type) 220 { 221 struct qed_hw_info *p_info = &p_hwfn->hw_info; 222 enum qed_pci_personality personality; 223 enum dcbx_protocol_type id; 224 char *name; 225 int i; 226 227 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 228 id = qed_dcbx_app_update[i].id; 229 230 if (type != id) 231 continue; 232 233 personality = qed_dcbx_app_update[i].personality; 234 name = qed_dcbx_app_update[i].name; 235 236 qed_dcbx_set_params(p_data, p_info, enable, 237 prio, tc, type, personality); 238 } 239 } 240 241 static bool 242 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 243 u32 app_prio_bitmap, 244 u16 id, enum dcbx_protocol_type *type, bool ieee) 245 { 246 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 247 *type = DCBX_PROTOCOL_FCOE; 248 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 249 *type = DCBX_PROTOCOL_ROCE; 250 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 251 *type = DCBX_PROTOCOL_ISCSI; 252 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 253 *type = DCBX_PROTOCOL_ETH; 254 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 255 *type = DCBX_PROTOCOL_ROCE_V2; 256 } else { 257 *type = DCBX_MAX_PROTOCOL_TYPE; 258 DP_ERR(p_hwfn, 259 "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n", 260 id, app_prio_bitmap); 261 return false; 262 } 263 264 return true; 265 } 266 267 /* Parse app TLV's to update TC information in hw_info structure for 268 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 269 */ 270 static int 271 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 272 struct qed_dcbx_results *p_data, 273 struct dcbx_app_priority_entry *p_tbl, 274 u32 pri_tc_tbl, int count, u8 dcbx_version) 275 { 276 enum dcbx_protocol_type type; 277 u8 tc, priority_map; 278 bool enable, ieee; 279 u16 protocol_id; 280 int priority; 281 int i; 282 283 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 284 285 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 286 /* Parse APP TLV */ 287 for (i = 0; i < count; i++) { 288 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 289 DCBX_APP_PROTOCOL_ID); 290 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 291 DCBX_APP_PRI_MAP); 292 priority = ffs(priority_map) - 1; 293 if (priority < 0) { 294 DP_ERR(p_hwfn, "Invalid priority\n"); 295 return -EINVAL; 296 } 297 298 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 299 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 300 protocol_id, &type, ieee)) { 301 /* ETH always have the enable bit reset, as it gets 302 * vlan information per packet. For other protocols, 303 * should be set according to the dcbx_enabled 304 * indication, but we only got here if there was an 305 * app tlv for the protocol, so dcbx must be enabled. 306 */ 307 enable = !(type == DCBX_PROTOCOL_ETH); 308 309 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 310 priority, tc, type); 311 } 312 } 313 314 /* Update ramrod protocol data and hw_info fields 315 * with default info when corresponding APP TLV's are not detected. 316 * The enabled field has a different logic for ethernet as only for 317 * ethernet dcb should disabled by default, as the information arrives 318 * from the OS (unless an explicit app tlv was present). 319 */ 320 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 321 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 322 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 323 if (p_data->arr[type].update) 324 continue; 325 326 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 327 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 328 priority, tc, type); 329 } 330 331 return 0; 332 } 333 334 /* Parse app TLV's to update TC information in hw_info structure for 335 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 336 */ 337 static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 338 { 339 struct dcbx_app_priority_feature *p_app; 340 struct dcbx_app_priority_entry *p_tbl; 341 struct qed_dcbx_results data = { 0 }; 342 struct dcbx_ets_feature *p_ets; 343 struct qed_hw_info *p_info; 344 u32 pri_tc_tbl, flags; 345 u8 dcbx_version; 346 int num_entries; 347 int rc = 0; 348 349 flags = p_hwfn->p_dcbx_info->operational.flags; 350 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 351 352 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 353 p_tbl = p_app->app_pri_tbl; 354 355 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 356 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 357 358 p_info = &p_hwfn->hw_info; 359 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 360 361 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, 362 num_entries, dcbx_version); 363 if (rc) 364 return rc; 365 366 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags, 367 DCBX_ETS_MAX_TCS); 368 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC); 369 data.pf_id = p_hwfn->rel_pf_id; 370 data.dcbx_enabled = !!dcbx_version; 371 372 qed_dcbx_dp_protocol(p_hwfn, &data); 373 374 memcpy(&p_hwfn->p_dcbx_info->results, &data, 375 sizeof(struct qed_dcbx_results)); 376 377 return 0; 378 } 379 380 static int 381 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 382 struct qed_ptt *p_ptt, 383 struct qed_dcbx_mib_meta_data *p_data, 384 enum qed_mib_read_type type) 385 { 386 u32 prefix_seq_num, suffix_seq_num; 387 int read_count = 0; 388 int rc = 0; 389 390 /* The data is considered to be valid only if both sequence numbers are 391 * the same. 392 */ 393 do { 394 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 395 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 396 p_data->addr, p_data->size); 397 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 398 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 399 } else { 400 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 401 p_data->addr, p_data->size); 402 prefix_seq_num = p_data->mib->prefix_seq_num; 403 suffix_seq_num = p_data->mib->suffix_seq_num; 404 } 405 read_count++; 406 407 DP_VERBOSE(p_hwfn, 408 QED_MSG_DCB, 409 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 410 type, read_count, prefix_seq_num, suffix_seq_num); 411 } while ((prefix_seq_num != suffix_seq_num) && 412 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 413 414 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 415 DP_ERR(p_hwfn, 416 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 417 type, read_count, prefix_seq_num, suffix_seq_num); 418 rc = -EIO; 419 } 420 421 return rc; 422 } 423 424 static void 425 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 426 struct qed_dcbx_app_prio *p_prio, 427 struct qed_dcbx_results *p_results) 428 { 429 u8 val; 430 431 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 432 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 433 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 434 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 435 436 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 437 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 438 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 439 440 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 441 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 442 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 443 p_prio->roce_v2 = val; 444 } 445 446 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 447 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 448 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 449 450 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 451 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 452 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 453 454 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 455 p_results->arr[DCBX_PROTOCOL_ETH].enable) 456 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 457 458 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 459 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 460 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 461 p_prio->eth); 462 } 463 464 static void 465 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 466 struct dcbx_app_priority_feature *p_app, 467 struct dcbx_app_priority_entry *p_tbl, 468 struct qed_dcbx_params *p_params, bool ieee) 469 { 470 struct qed_app_entry *entry; 471 u8 pri_map; 472 int i; 473 474 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 475 DCBX_APP_WILLING); 476 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 477 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 478 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 479 DCBX_APP_NUM_ENTRIES); 480 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 481 entry = &p_params->app_entry[i]; 482 if (ieee) { 483 u8 sf_ieee; 484 u32 val; 485 486 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 487 DCBX_APP_SF_IEEE); 488 switch (sf_ieee) { 489 case DCBX_APP_SF_IEEE_RESERVED: 490 /* Old MFW */ 491 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 492 DCBX_APP_SF); 493 entry->sf_ieee = val ? 494 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 495 QED_DCBX_SF_IEEE_ETHTYPE; 496 break; 497 case DCBX_APP_SF_IEEE_ETHTYPE: 498 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 499 break; 500 case DCBX_APP_SF_IEEE_TCP_PORT: 501 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 502 break; 503 case DCBX_APP_SF_IEEE_UDP_PORT: 504 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 505 break; 506 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 507 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 508 break; 509 } 510 } else { 511 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 512 DCBX_APP_SF)); 513 } 514 515 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 516 entry->prio = ffs(pri_map) - 1; 517 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 518 DCBX_APP_PROTOCOL_ID); 519 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 520 entry->proto_id, 521 &entry->proto_type, ieee); 522 } 523 524 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 525 "APP params: willing %d, valid %d error = %d\n", 526 p_params->app_willing, p_params->app_valid, 527 p_params->app_error); 528 } 529 530 static void 531 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 532 u32 pfc, struct qed_dcbx_params *p_params) 533 { 534 u8 pfc_map; 535 536 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 537 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 538 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 539 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 540 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 541 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 542 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 543 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 544 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 545 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 546 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 547 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 548 549 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 550 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 551 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 552 p_params->pfc.enabled); 553 } 554 555 static void 556 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 557 struct dcbx_ets_feature *p_ets, 558 struct qed_dcbx_params *p_params) 559 { 560 u32 bw_map[2], tsa_map[2], pri_map; 561 int i; 562 563 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 564 DCBX_ETS_WILLING); 565 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 566 DCBX_ETS_ENABLED); 567 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 568 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 569 DCBX_ETS_MAX_TCS); 570 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 571 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 572 p_params->ets_willing, p_params->ets_enabled, 573 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 574 p_params->max_ets_tc); 575 576 if (p_params->ets_enabled && !p_params->max_ets_tc) { 577 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES; 578 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 579 "ETS params: max_ets_tc is forced to %d\n", 580 p_params->max_ets_tc); 581 } 582 583 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 584 * encoded in a type u32 array of size 2. 585 */ 586 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 587 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 588 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 589 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 590 pri_map = p_ets->pri_tc_tbl[0]; 591 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 592 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 593 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 594 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 595 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 596 "elem %d bw_tbl %x tsa_tbl %x\n", 597 i, p_params->ets_tc_bw_tbl[i], 598 p_params->ets_tc_tsa_tbl[i]); 599 } 600 } 601 602 static void 603 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 604 struct dcbx_app_priority_feature *p_app, 605 struct dcbx_app_priority_entry *p_tbl, 606 struct dcbx_ets_feature *p_ets, 607 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 608 { 609 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 610 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 611 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 612 } 613 614 static void 615 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 616 { 617 struct dcbx_features *p_feat; 618 619 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 620 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 621 p_feat->app.app_pri_tbl, &p_feat->ets, 622 p_feat->pfc, ¶ms->local.params, false); 623 params->local.valid = true; 624 } 625 626 static void 627 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 628 { 629 struct dcbx_features *p_feat; 630 631 p_feat = &p_hwfn->p_dcbx_info->remote.features; 632 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 633 p_feat->app.app_pri_tbl, &p_feat->ets, 634 p_feat->pfc, ¶ms->remote.params, false); 635 params->remote.valid = true; 636 } 637 638 static void 639 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 640 struct qed_dcbx_get *params) 641 { 642 struct qed_dcbx_operational_params *p_operational; 643 struct qed_dcbx_results *p_results; 644 struct dcbx_features *p_feat; 645 bool enabled, err; 646 u32 flags; 647 bool val; 648 649 flags = p_hwfn->p_dcbx_info->operational.flags; 650 651 /* If DCBx version is non zero, then negotiation 652 * was successfuly performed 653 */ 654 p_operational = ¶ms->operational; 655 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 656 DCBX_CONFIG_VERSION_DISABLED); 657 if (!enabled) { 658 p_operational->enabled = enabled; 659 p_operational->valid = false; 660 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n"); 661 return; 662 } 663 664 p_feat = &p_hwfn->p_dcbx_info->operational.features; 665 p_results = &p_hwfn->p_dcbx_info->results; 666 667 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 668 DCBX_CONFIG_VERSION_IEEE); 669 p_operational->ieee = val; 670 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 671 DCBX_CONFIG_VERSION_CEE); 672 p_operational->cee = val; 673 674 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 675 DCBX_CONFIG_VERSION_STATIC); 676 p_operational->local = val; 677 678 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 679 "Version support: ieee %d, cee %d, static %d\n", 680 p_operational->ieee, p_operational->cee, 681 p_operational->local); 682 683 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 684 p_feat->app.app_pri_tbl, &p_feat->ets, 685 p_feat->pfc, ¶ms->operational.params, 686 p_operational->ieee); 687 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 688 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 689 p_operational->err = err; 690 p_operational->enabled = enabled; 691 p_operational->valid = true; 692 } 693 694 static void 695 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 696 struct qed_dcbx_get *params) 697 { 698 struct lldp_config_params_s *p_local; 699 700 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 701 702 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 703 ARRAY_SIZE(p_local->local_chassis_id)); 704 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 705 ARRAY_SIZE(p_local->local_port_id)); 706 } 707 708 static void 709 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 710 struct qed_dcbx_get *params) 711 { 712 struct lldp_status_params_s *p_remote; 713 714 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 715 716 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 717 ARRAY_SIZE(p_remote->peer_chassis_id)); 718 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 719 ARRAY_SIZE(p_remote->peer_port_id)); 720 } 721 722 static int 723 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params, 724 enum qed_mib_read_type type) 725 { 726 switch (type) { 727 case QED_DCBX_REMOTE_MIB: 728 qed_dcbx_get_remote_params(p_hwfn, p_params); 729 break; 730 case QED_DCBX_LOCAL_MIB: 731 qed_dcbx_get_local_params(p_hwfn, p_params); 732 break; 733 case QED_DCBX_OPERATIONAL_MIB: 734 qed_dcbx_get_operational_params(p_hwfn, p_params); 735 break; 736 case QED_DCBX_REMOTE_LLDP_MIB: 737 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params); 738 break; 739 case QED_DCBX_LOCAL_LLDP_MIB: 740 qed_dcbx_get_local_lldp_params(p_hwfn, p_params); 741 break; 742 default: 743 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 744 return -EINVAL; 745 } 746 747 return 0; 748 } 749 750 static int 751 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 752 { 753 struct qed_dcbx_mib_meta_data data; 754 int rc = 0; 755 756 memset(&data, 0, sizeof(data)); 757 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 758 lldp_config_params); 759 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 760 data.size = sizeof(struct lldp_config_params_s); 761 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 762 763 return rc; 764 } 765 766 static int 767 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 768 struct qed_ptt *p_ptt, 769 enum qed_mib_read_type type) 770 { 771 struct qed_dcbx_mib_meta_data data; 772 int rc = 0; 773 774 memset(&data, 0, sizeof(data)); 775 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 776 lldp_status_params); 777 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 778 data.size = sizeof(struct lldp_status_params_s); 779 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 780 781 return rc; 782 } 783 784 static int 785 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 786 struct qed_ptt *p_ptt, 787 enum qed_mib_read_type type) 788 { 789 struct qed_dcbx_mib_meta_data data; 790 int rc = 0; 791 792 memset(&data, 0, sizeof(data)); 793 data.addr = p_hwfn->mcp_info->port_addr + 794 offsetof(struct public_port, operational_dcbx_mib); 795 data.mib = &p_hwfn->p_dcbx_info->operational; 796 data.size = sizeof(struct dcbx_mib); 797 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 798 799 return rc; 800 } 801 802 static int 803 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 804 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 805 { 806 struct qed_dcbx_mib_meta_data data; 807 int rc = 0; 808 809 memset(&data, 0, sizeof(data)); 810 data.addr = p_hwfn->mcp_info->port_addr + 811 offsetof(struct public_port, remote_dcbx_mib); 812 data.mib = &p_hwfn->p_dcbx_info->remote; 813 data.size = sizeof(struct dcbx_mib); 814 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 815 816 return rc; 817 } 818 819 static int 820 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 821 { 822 struct qed_dcbx_mib_meta_data data; 823 int rc = 0; 824 825 memset(&data, 0, sizeof(data)); 826 data.addr = p_hwfn->mcp_info->port_addr + 827 offsetof(struct public_port, local_admin_dcbx_mib); 828 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 829 data.size = sizeof(struct dcbx_local_params); 830 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 831 832 return rc; 833 } 834 835 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 836 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 837 { 838 int rc = -EINVAL; 839 840 switch (type) { 841 case QED_DCBX_OPERATIONAL_MIB: 842 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 843 break; 844 case QED_DCBX_REMOTE_MIB: 845 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 846 break; 847 case QED_DCBX_LOCAL_MIB: 848 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 849 break; 850 case QED_DCBX_REMOTE_LLDP_MIB: 851 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 852 break; 853 case QED_DCBX_LOCAL_LLDP_MIB: 854 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 855 break; 856 default: 857 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 858 } 859 860 return rc; 861 } 862 863 void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type) 864 { 865 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common; 866 void *cookie = hwfn->cdev->ops_cookie; 867 868 if (cookie && op->dcbx_aen) 869 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type); 870 } 871 872 /* Read updated MIB. 873 * Reconfigure QM and invoke PF update ramrod command if operational MIB 874 * change is detected. 875 */ 876 int 877 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 878 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 879 { 880 int rc = 0; 881 882 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 883 if (rc) 884 return rc; 885 886 if (type == QED_DCBX_OPERATIONAL_MIB) { 887 rc = qed_dcbx_process_mib_info(p_hwfn); 888 if (!rc) { 889 /* reconfigure tcs of QM queues according 890 * to negotiation results 891 */ 892 qed_qm_reconf(p_hwfn, p_ptt); 893 894 /* update storm FW with negotiation results */ 895 qed_sp_pf_update(p_hwfn); 896 897 /* for roce PFs, we may want to enable/disable DPM 898 * when DCBx change occurs 899 */ 900 if (p_hwfn->hw_info.personality == 901 QED_PCI_ETH_ROCE) 902 qed_roce_dpm_dcbx(p_hwfn, p_ptt); 903 } 904 } 905 906 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 907 908 if (type == QED_DCBX_OPERATIONAL_MIB) { 909 struct qed_dcbx_results *p_data; 910 u16 val; 911 912 /* Configure in NIG which protocols support EDPM and should 913 * honor PFC. 914 */ 915 p_data = &p_hwfn->p_dcbx_info->results; 916 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) | 917 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc); 918 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT; 919 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN; 920 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val); 921 } 922 923 qed_dcbx_aen(p_hwfn, type); 924 925 return rc; 926 } 927 928 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 929 { 930 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 931 if (!p_hwfn->p_dcbx_info) 932 return -ENOMEM; 933 934 return 0; 935 } 936 937 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn) 938 { 939 kfree(p_hwfn->p_dcbx_info); 940 p_hwfn->p_dcbx_info = NULL; 941 } 942 943 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 944 struct qed_dcbx_results *p_src, 945 enum dcbx_protocol_type type) 946 { 947 p_data->dcb_enable_flag = p_src->arr[type].enable; 948 p_data->dcb_priority = p_src->arr[type].priority; 949 p_data->dcb_tc = p_src->arr[type].tc; 950 } 951 952 /* Set pf update ramrod command params */ 953 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 954 struct pf_update_ramrod_data *p_dest) 955 { 956 struct protocol_dcb_data *p_dcb_data; 957 bool update_flag = false; 958 959 p_dest->pf_id = p_src->pf_id; 960 961 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 962 p_dest->update_fcoe_dcb_data_mode = update_flag; 963 964 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 965 p_dest->update_roce_dcb_data_mode = update_flag; 966 967 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 968 p_dest->update_rroce_dcb_data_mode = update_flag; 969 970 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 971 p_dest->update_iscsi_dcb_data_mode = update_flag; 972 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 973 p_dest->update_eth_dcb_data_mode = update_flag; 974 975 p_dcb_data = &p_dest->fcoe_dcb_data; 976 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 977 p_dcb_data = &p_dest->roce_dcb_data; 978 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE); 979 p_dcb_data = &p_dest->rroce_dcb_data; 980 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2); 981 p_dcb_data = &p_dest->iscsi_dcb_data; 982 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 983 p_dcb_data = &p_dest->eth_dcb_data; 984 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 985 } 986 987 #ifdef CONFIG_DCB 988 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 989 struct qed_dcbx_get *p_get, 990 enum qed_mib_read_type type) 991 { 992 struct qed_ptt *p_ptt; 993 int rc; 994 995 if (IS_VF(p_hwfn->cdev)) 996 return -EINVAL; 997 998 p_ptt = qed_ptt_acquire(p_hwfn); 999 if (!p_ptt) 1000 return -EBUSY; 1001 1002 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 1003 if (rc) 1004 goto out; 1005 1006 rc = qed_dcbx_get_params(p_hwfn, p_get, type); 1007 1008 out: 1009 qed_ptt_release(p_hwfn, p_ptt); 1010 return rc; 1011 } 1012 1013 static void 1014 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 1015 u32 *pfc, struct qed_dcbx_params *p_params) 1016 { 1017 u8 pfc_map = 0; 1018 int i; 1019 1020 *pfc &= ~DCBX_PFC_ERROR_MASK; 1021 1022 if (p_params->pfc.willing) 1023 *pfc |= DCBX_PFC_WILLING_MASK; 1024 else 1025 *pfc &= ~DCBX_PFC_WILLING_MASK; 1026 1027 if (p_params->pfc.enabled) 1028 *pfc |= DCBX_PFC_ENABLED_MASK; 1029 else 1030 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1031 1032 *pfc &= ~DCBX_PFC_CAPS_MASK; 1033 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 1034 1035 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1036 if (p_params->pfc.prio[i]) 1037 pfc_map |= BIT(i); 1038 1039 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1040 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 1041 1042 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 1043 } 1044 1045 static void 1046 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 1047 struct dcbx_ets_feature *p_ets, 1048 struct qed_dcbx_params *p_params) 1049 { 1050 u8 *bw_map, *tsa_map; 1051 u32 val; 1052 int i; 1053 1054 if (p_params->ets_willing) 1055 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1056 else 1057 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1058 1059 if (p_params->ets_cbs) 1060 p_ets->flags |= DCBX_ETS_CBS_MASK; 1061 else 1062 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1063 1064 if (p_params->ets_enabled) 1065 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1066 else 1067 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1068 1069 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1070 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1071 1072 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1073 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1074 p_ets->pri_tc_tbl[0] = 0; 1075 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1076 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1077 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1078 /* Copy the priority value to the corresponding 4 bits in the 1079 * traffic class table. 1080 */ 1081 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1082 p_ets->pri_tc_tbl[0] |= val; 1083 } 1084 for (i = 0; i < 2; i++) { 1085 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1086 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1087 } 1088 } 1089 1090 static void 1091 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1092 struct dcbx_app_priority_feature *p_app, 1093 struct qed_dcbx_params *p_params, bool ieee) 1094 { 1095 u32 *entry; 1096 int i; 1097 1098 if (p_params->app_willing) 1099 p_app->flags |= DCBX_APP_WILLING_MASK; 1100 else 1101 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1102 1103 if (p_params->app_valid) 1104 p_app->flags |= DCBX_APP_ENABLED_MASK; 1105 else 1106 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1107 1108 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1109 p_app->flags |= (u32)p_params->num_app_entries << 1110 DCBX_APP_NUM_ENTRIES_SHIFT; 1111 1112 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1113 entry = &p_app->app_pri_tbl[i].entry; 1114 *entry = 0; 1115 if (ieee) { 1116 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1117 switch (p_params->app_entry[i].sf_ieee) { 1118 case QED_DCBX_SF_IEEE_ETHTYPE: 1119 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1120 DCBX_APP_SF_IEEE_SHIFT); 1121 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1122 DCBX_APP_SF_SHIFT); 1123 break; 1124 case QED_DCBX_SF_IEEE_TCP_PORT: 1125 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1126 DCBX_APP_SF_IEEE_SHIFT); 1127 *entry |= ((u32)DCBX_APP_SF_PORT << 1128 DCBX_APP_SF_SHIFT); 1129 break; 1130 case QED_DCBX_SF_IEEE_UDP_PORT: 1131 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1132 DCBX_APP_SF_IEEE_SHIFT); 1133 *entry |= ((u32)DCBX_APP_SF_PORT << 1134 DCBX_APP_SF_SHIFT); 1135 break; 1136 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1137 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1138 DCBX_APP_SF_IEEE_SHIFT); 1139 *entry |= ((u32)DCBX_APP_SF_PORT << 1140 DCBX_APP_SF_SHIFT); 1141 break; 1142 } 1143 } else { 1144 *entry &= ~DCBX_APP_SF_MASK; 1145 if (p_params->app_entry[i].ethtype) 1146 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1147 DCBX_APP_SF_SHIFT); 1148 else 1149 *entry |= ((u32)DCBX_APP_SF_PORT << 1150 DCBX_APP_SF_SHIFT); 1151 } 1152 1153 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1154 *entry |= ((u32)p_params->app_entry[i].proto_id << 1155 DCBX_APP_PROTOCOL_ID_SHIFT); 1156 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1157 *entry |= ((u32)(p_params->app_entry[i].prio) << 1158 DCBX_APP_PRI_MAP_SHIFT); 1159 } 1160 } 1161 1162 static void 1163 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1164 struct dcbx_local_params *local_admin, 1165 struct qed_dcbx_set *params) 1166 { 1167 bool ieee = false; 1168 1169 local_admin->flags = 0; 1170 memcpy(&local_admin->features, 1171 &p_hwfn->p_dcbx_info->operational.features, 1172 sizeof(local_admin->features)); 1173 1174 if (params->enabled) { 1175 local_admin->config = params->ver_num; 1176 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1177 } else { 1178 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1179 } 1180 1181 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n", 1182 local_admin->config); 1183 1184 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1185 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1186 ¶ms->config.params); 1187 1188 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1189 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1190 ¶ms->config.params); 1191 1192 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1193 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1194 ¶ms->config.params, ieee); 1195 } 1196 1197 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1198 struct qed_dcbx_set *params, bool hw_commit) 1199 { 1200 struct dcbx_local_params local_admin; 1201 struct qed_dcbx_mib_meta_data data; 1202 u32 resp = 0, param = 0; 1203 int rc = 0; 1204 1205 if (!hw_commit) { 1206 memcpy(&p_hwfn->p_dcbx_info->set, params, 1207 sizeof(struct qed_dcbx_set)); 1208 return 0; 1209 } 1210 1211 /* clear set-parmas cache */ 1212 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1213 1214 memset(&local_admin, 0, sizeof(local_admin)); 1215 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1216 1217 data.addr = p_hwfn->mcp_info->port_addr + 1218 offsetof(struct public_port, local_admin_dcbx_mib); 1219 data.local_admin = &local_admin; 1220 data.size = sizeof(struct dcbx_local_params); 1221 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1222 1223 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1224 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1225 if (rc) 1226 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1227 1228 return rc; 1229 } 1230 1231 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1232 struct qed_dcbx_set *params) 1233 { 1234 struct qed_dcbx_get *dcbx_info; 1235 int rc; 1236 1237 if (p_hwfn->p_dcbx_info->set.config.valid) { 1238 memcpy(params, &p_hwfn->p_dcbx_info->set, 1239 sizeof(struct qed_dcbx_set)); 1240 return 0; 1241 } 1242 1243 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1244 if (!dcbx_info) 1245 return -ENOMEM; 1246 1247 memset(dcbx_info, 0, sizeof(*dcbx_info)); 1248 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1249 if (rc) { 1250 kfree(dcbx_info); 1251 return rc; 1252 } 1253 1254 p_hwfn->p_dcbx_info->set.override_flags = 0; 1255 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1256 if (dcbx_info->operational.cee) 1257 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1258 if (dcbx_info->operational.ieee) 1259 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1260 if (dcbx_info->operational.local) 1261 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1262 1263 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1264 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1265 &dcbx_info->operational.params, 1266 sizeof(struct qed_dcbx_admin_params)); 1267 p_hwfn->p_dcbx_info->set.config.valid = true; 1268 1269 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1270 1271 kfree(dcbx_info); 1272 1273 return 0; 1274 } 1275 1276 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1277 enum qed_mib_read_type type) 1278 { 1279 struct qed_dcbx_get *dcbx_info; 1280 1281 dcbx_info = kmalloc(sizeof(*dcbx_info), GFP_ATOMIC); 1282 if (!dcbx_info) 1283 return NULL; 1284 1285 memset(dcbx_info, 0, sizeof(*dcbx_info)); 1286 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1287 kfree(dcbx_info); 1288 return NULL; 1289 } 1290 1291 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1292 !dcbx_info->operational.enabled) { 1293 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1294 kfree(dcbx_info); 1295 return NULL; 1296 } 1297 1298 return dcbx_info; 1299 } 1300 1301 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1302 { 1303 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1304 struct qed_dcbx_get *dcbx_info; 1305 bool enabled; 1306 1307 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1308 if (!dcbx_info) 1309 return 0; 1310 1311 enabled = dcbx_info->operational.enabled; 1312 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1313 kfree(dcbx_info); 1314 1315 return enabled; 1316 } 1317 1318 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1319 { 1320 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1321 struct qed_dcbx_set dcbx_set; 1322 struct qed_ptt *ptt; 1323 int rc; 1324 1325 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1326 1327 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1328 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1329 if (rc) 1330 return 1; 1331 1332 dcbx_set.enabled = !!state; 1333 1334 ptt = qed_ptt_acquire(hwfn); 1335 if (!ptt) 1336 return 1; 1337 1338 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1339 1340 qed_ptt_release(hwfn, ptt); 1341 1342 return rc ? 1 : 0; 1343 } 1344 1345 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1346 u8 *pgid, u8 *bw_pct, u8 *up_map) 1347 { 1348 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1349 struct qed_dcbx_get *dcbx_info; 1350 1351 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1352 *prio_type = *pgid = *bw_pct = *up_map = 0; 1353 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1354 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1355 return; 1356 } 1357 1358 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1359 if (!dcbx_info) 1360 return; 1361 1362 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1363 kfree(dcbx_info); 1364 } 1365 1366 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1367 { 1368 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1369 struct qed_dcbx_get *dcbx_info; 1370 1371 *bw_pct = 0; 1372 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1373 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1374 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1375 return; 1376 } 1377 1378 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1379 if (!dcbx_info) 1380 return; 1381 1382 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1383 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1384 kfree(dcbx_info); 1385 } 1386 1387 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1388 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1389 { 1390 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1391 *prio = *bwg_id = *bw_pct = *up_map = 0; 1392 } 1393 1394 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1395 int bwg_id, u8 *bw_pct) 1396 { 1397 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1398 *bw_pct = 0; 1399 } 1400 1401 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1402 int priority, u8 *setting) 1403 { 1404 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1405 struct qed_dcbx_get *dcbx_info; 1406 1407 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1408 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1409 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1410 return; 1411 } 1412 1413 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1414 if (!dcbx_info) 1415 return; 1416 1417 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1418 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1419 kfree(dcbx_info); 1420 } 1421 1422 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1423 { 1424 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1425 struct qed_dcbx_set dcbx_set; 1426 struct qed_ptt *ptt; 1427 int rc; 1428 1429 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1430 priority, setting); 1431 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1432 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1433 return; 1434 } 1435 1436 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1437 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1438 if (rc) 1439 return; 1440 1441 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1442 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1443 1444 ptt = qed_ptt_acquire(hwfn); 1445 if (!ptt) 1446 return; 1447 1448 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1449 1450 qed_ptt_release(hwfn, ptt); 1451 } 1452 1453 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1454 { 1455 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1456 struct qed_dcbx_get *dcbx_info; 1457 int rc = 0; 1458 1459 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1460 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1461 if (!dcbx_info) 1462 return 1; 1463 1464 switch (capid) { 1465 case DCB_CAP_ATTR_PG: 1466 case DCB_CAP_ATTR_PFC: 1467 case DCB_CAP_ATTR_UP2TC: 1468 case DCB_CAP_ATTR_GSP: 1469 *cap = true; 1470 break; 1471 case DCB_CAP_ATTR_PG_TCS: 1472 case DCB_CAP_ATTR_PFC_TCS: 1473 *cap = 0x80; 1474 break; 1475 case DCB_CAP_ATTR_DCBX: 1476 *cap = (DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE | 1477 DCB_CAP_DCBX_VER_IEEE | DCB_CAP_DCBX_STATIC); 1478 break; 1479 default: 1480 *cap = false; 1481 rc = 1; 1482 } 1483 1484 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1485 kfree(dcbx_info); 1486 1487 return rc; 1488 } 1489 1490 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1491 { 1492 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1493 struct qed_dcbx_get *dcbx_info; 1494 int rc = 0; 1495 1496 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1497 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1498 if (!dcbx_info) 1499 return -EINVAL; 1500 1501 switch (tcid) { 1502 case DCB_NUMTCS_ATTR_PG: 1503 *num = dcbx_info->operational.params.max_ets_tc; 1504 break; 1505 case DCB_NUMTCS_ATTR_PFC: 1506 *num = dcbx_info->operational.params.pfc.max_tc; 1507 break; 1508 default: 1509 rc = -EINVAL; 1510 } 1511 1512 kfree(dcbx_info); 1513 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1514 1515 return rc; 1516 } 1517 1518 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1519 { 1520 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1521 struct qed_dcbx_get *dcbx_info; 1522 bool enabled; 1523 1524 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1525 if (!dcbx_info) 1526 return 0; 1527 1528 enabled = dcbx_info->operational.params.pfc.enabled; 1529 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1530 kfree(dcbx_info); 1531 1532 return enabled; 1533 } 1534 1535 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1536 { 1537 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1538 struct qed_dcbx_get *dcbx_info; 1539 u8 mode = 0; 1540 1541 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1542 if (!dcbx_info) 1543 return 0; 1544 1545 if (dcbx_info->operational.enabled) 1546 mode |= DCB_CAP_DCBX_LLD_MANAGED; 1547 if (dcbx_info->operational.ieee) 1548 mode |= DCB_CAP_DCBX_VER_IEEE; 1549 if (dcbx_info->operational.cee) 1550 mode |= DCB_CAP_DCBX_VER_CEE; 1551 if (dcbx_info->operational.local) 1552 mode |= DCB_CAP_DCBX_STATIC; 1553 1554 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1555 kfree(dcbx_info); 1556 1557 return mode; 1558 } 1559 1560 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1561 int tc, 1562 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1563 { 1564 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1565 struct qed_dcbx_set dcbx_set; 1566 struct qed_ptt *ptt; 1567 int rc; 1568 1569 DP_VERBOSE(hwfn, QED_MSG_DCB, 1570 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1571 tc, pri_type, pgid, bw_pct, up_map); 1572 1573 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1574 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1575 return; 1576 } 1577 1578 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1579 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1580 if (rc) 1581 return; 1582 1583 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1584 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1585 1586 ptt = qed_ptt_acquire(hwfn); 1587 if (!ptt) 1588 return; 1589 1590 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1591 1592 qed_ptt_release(hwfn, ptt); 1593 } 1594 1595 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1596 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1597 { 1598 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1599 } 1600 1601 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1602 { 1603 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1604 struct qed_dcbx_set dcbx_set; 1605 struct qed_ptt *ptt; 1606 int rc; 1607 1608 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1609 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1610 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1611 return; 1612 } 1613 1614 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1615 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1616 if (rc) 1617 return; 1618 1619 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1620 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1621 1622 ptt = qed_ptt_acquire(hwfn); 1623 if (!ptt) 1624 return; 1625 1626 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1627 1628 qed_ptt_release(hwfn, ptt); 1629 } 1630 1631 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1632 { 1633 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1634 } 1635 1636 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1637 { 1638 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1639 struct qed_dcbx_set dcbx_set; 1640 struct qed_ptt *ptt; 1641 int rc; 1642 1643 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1644 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1645 if (rc) 1646 return 1; 1647 1648 ptt = qed_ptt_acquire(hwfn); 1649 if (!ptt) 1650 return 1; 1651 1652 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1653 1654 qed_ptt_release(hwfn, ptt); 1655 1656 return rc; 1657 } 1658 1659 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1660 { 1661 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1662 struct qed_dcbx_set dcbx_set; 1663 struct qed_ptt *ptt; 1664 int rc; 1665 1666 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1667 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1668 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1669 if (rc) 1670 return 1; 1671 1672 switch (tcid) { 1673 case DCB_NUMTCS_ATTR_PG: 1674 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1675 dcbx_set.config.params.max_ets_tc = num; 1676 break; 1677 case DCB_NUMTCS_ATTR_PFC: 1678 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1679 dcbx_set.config.params.pfc.max_tc = num; 1680 break; 1681 default: 1682 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1683 return -EINVAL; 1684 } 1685 1686 ptt = qed_ptt_acquire(hwfn); 1687 if (!ptt) 1688 return -EINVAL; 1689 1690 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1691 1692 qed_ptt_release(hwfn, ptt); 1693 1694 return 0; 1695 } 1696 1697 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1698 { 1699 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1700 struct qed_dcbx_set dcbx_set; 1701 struct qed_ptt *ptt; 1702 int rc; 1703 1704 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1705 1706 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1707 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1708 if (rc) 1709 return; 1710 1711 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1712 dcbx_set.config.params.pfc.enabled = !!state; 1713 1714 ptt = qed_ptt_acquire(hwfn); 1715 if (!ptt) 1716 return; 1717 1718 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1719 1720 qed_ptt_release(hwfn, ptt); 1721 } 1722 1723 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1724 { 1725 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1726 struct qed_dcbx_get *dcbx_info; 1727 struct qed_app_entry *entry; 1728 bool ethtype; 1729 u8 prio = 0; 1730 int i; 1731 1732 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1733 if (!dcbx_info) 1734 return -EINVAL; 1735 1736 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1737 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1738 entry = &dcbx_info->operational.params.app_entry[i]; 1739 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1740 prio = entry->prio; 1741 break; 1742 } 1743 } 1744 1745 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1746 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1747 kfree(dcbx_info); 1748 return -EINVAL; 1749 } 1750 1751 kfree(dcbx_info); 1752 1753 return prio; 1754 } 1755 1756 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1757 u8 idtype, u16 idval, u8 pri_map) 1758 { 1759 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1760 struct qed_dcbx_set dcbx_set; 1761 struct qed_app_entry *entry; 1762 struct qed_ptt *ptt; 1763 bool ethtype; 1764 int rc, i; 1765 1766 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1767 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1768 if (rc) 1769 return -EINVAL; 1770 1771 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1772 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1773 entry = &dcbx_set.config.params.app_entry[i]; 1774 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1775 break; 1776 /* First empty slot */ 1777 if (!entry->proto_id) { 1778 dcbx_set.config.params.num_app_entries++; 1779 break; 1780 } 1781 } 1782 1783 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1784 DP_ERR(cdev, "App table is full\n"); 1785 return -EBUSY; 1786 } 1787 1788 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1789 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1790 dcbx_set.config.params.app_entry[i].proto_id = idval; 1791 dcbx_set.config.params.app_entry[i].prio = pri_map; 1792 1793 ptt = qed_ptt_acquire(hwfn); 1794 if (!ptt) 1795 return -EBUSY; 1796 1797 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1798 1799 qed_ptt_release(hwfn, ptt); 1800 1801 return rc; 1802 } 1803 1804 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1805 { 1806 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1807 struct qed_dcbx_set dcbx_set; 1808 struct qed_ptt *ptt; 1809 int rc; 1810 1811 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1812 1813 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && 1814 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) { 1815 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n"); 1816 return 1; 1817 } 1818 1819 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1820 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1821 if (rc) 1822 return 1; 1823 1824 dcbx_set.ver_num = 0; 1825 if (mode & DCB_CAP_DCBX_VER_CEE) { 1826 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1827 dcbx_set.enabled = true; 1828 } 1829 1830 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1831 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1832 dcbx_set.enabled = true; 1833 } 1834 1835 if (mode & DCB_CAP_DCBX_STATIC) { 1836 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1837 dcbx_set.enabled = true; 1838 } 1839 1840 ptt = qed_ptt_acquire(hwfn); 1841 if (!ptt) 1842 return 1; 1843 1844 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1845 1846 qed_ptt_release(hwfn, ptt); 1847 1848 return rc; 1849 } 1850 1851 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1852 { 1853 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1854 struct qed_dcbx_get *dcbx_info; 1855 1856 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1857 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1858 if (!dcbx_info) 1859 return 1; 1860 1861 *flags = 0; 1862 switch (featid) { 1863 case DCB_FEATCFG_ATTR_PG: 1864 if (dcbx_info->operational.params.ets_enabled) 1865 *flags = DCB_FEATCFG_ENABLE; 1866 else 1867 *flags = DCB_FEATCFG_ERROR; 1868 break; 1869 case DCB_FEATCFG_ATTR_PFC: 1870 if (dcbx_info->operational.params.pfc.enabled) 1871 *flags = DCB_FEATCFG_ENABLE; 1872 else 1873 *flags = DCB_FEATCFG_ERROR; 1874 break; 1875 case DCB_FEATCFG_ATTR_APP: 1876 if (dcbx_info->operational.params.app_valid) 1877 *flags = DCB_FEATCFG_ENABLE; 1878 else 1879 *flags = DCB_FEATCFG_ERROR; 1880 break; 1881 default: 1882 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1883 kfree(dcbx_info); 1884 return 1; 1885 } 1886 1887 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1888 kfree(dcbx_info); 1889 1890 return 0; 1891 } 1892 1893 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1894 { 1895 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1896 struct qed_dcbx_set dcbx_set; 1897 bool enabled, willing; 1898 struct qed_ptt *ptt; 1899 int rc; 1900 1901 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1902 featid, flags); 1903 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1904 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1905 if (rc) 1906 return 1; 1907 1908 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1909 willing = !!(flags & DCB_FEATCFG_WILLING); 1910 switch (featid) { 1911 case DCB_FEATCFG_ATTR_PG: 1912 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1913 dcbx_set.config.params.ets_enabled = enabled; 1914 dcbx_set.config.params.ets_willing = willing; 1915 break; 1916 case DCB_FEATCFG_ATTR_PFC: 1917 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1918 dcbx_set.config.params.pfc.enabled = enabled; 1919 dcbx_set.config.params.pfc.willing = willing; 1920 break; 1921 case DCB_FEATCFG_ATTR_APP: 1922 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1923 dcbx_set.config.params.app_willing = willing; 1924 break; 1925 default: 1926 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1927 return 1; 1928 } 1929 1930 ptt = qed_ptt_acquire(hwfn); 1931 if (!ptt) 1932 return 1; 1933 1934 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1935 1936 qed_ptt_release(hwfn, ptt); 1937 1938 return 0; 1939 } 1940 1941 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1942 struct dcb_peer_app_info *info, 1943 u16 *app_count) 1944 { 1945 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1946 struct qed_dcbx_get *dcbx_info; 1947 1948 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1949 if (!dcbx_info) 1950 return -EINVAL; 1951 1952 info->willing = dcbx_info->remote.params.app_willing; 1953 info->error = dcbx_info->remote.params.app_error; 1954 *app_count = dcbx_info->remote.params.num_app_entries; 1955 kfree(dcbx_info); 1956 1957 return 0; 1958 } 1959 1960 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1961 struct dcb_app *table) 1962 { 1963 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1964 struct qed_dcbx_get *dcbx_info; 1965 int i; 1966 1967 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1968 if (!dcbx_info) 1969 return -EINVAL; 1970 1971 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 1972 if (dcbx_info->remote.params.app_entry[i].ethtype) 1973 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 1974 else 1975 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 1976 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 1977 table[i].protocol = 1978 dcbx_info->remote.params.app_entry[i].proto_id; 1979 } 1980 1981 kfree(dcbx_info); 1982 1983 return 0; 1984 } 1985 1986 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 1987 { 1988 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1989 struct qed_dcbx_get *dcbx_info; 1990 int i; 1991 1992 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1993 if (!dcbx_info) 1994 return -EINVAL; 1995 1996 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1997 if (dcbx_info->remote.params.pfc.prio[i]) 1998 pfc->pfc_en |= BIT(i); 1999 2000 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 2001 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 2002 pfc->pfc_en, pfc->tcs_supported); 2003 kfree(dcbx_info); 2004 2005 return 0; 2006 } 2007 2008 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 2009 { 2010 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2011 struct qed_dcbx_get *dcbx_info; 2012 int i; 2013 2014 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2015 if (!dcbx_info) 2016 return -EINVAL; 2017 2018 pg->willing = dcbx_info->remote.params.ets_willing; 2019 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 2020 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 2021 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 2022 } 2023 2024 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 2025 kfree(dcbx_info); 2026 2027 return 0; 2028 } 2029 2030 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 2031 struct ieee_pfc *pfc, bool remote) 2032 { 2033 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2034 struct qed_dcbx_params *params; 2035 struct qed_dcbx_get *dcbx_info; 2036 int rc, i; 2037 2038 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2039 if (!dcbx_info) 2040 return -EINVAL; 2041 2042 if (!dcbx_info->operational.ieee) { 2043 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2044 kfree(dcbx_info); 2045 return -EINVAL; 2046 } 2047 2048 if (remote) { 2049 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2050 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2051 QED_DCBX_REMOTE_MIB); 2052 if (rc) { 2053 kfree(dcbx_info); 2054 return -EINVAL; 2055 } 2056 2057 params = &dcbx_info->remote.params; 2058 } else { 2059 params = &dcbx_info->operational.params; 2060 } 2061 2062 pfc->pfc_cap = params->pfc.max_tc; 2063 pfc->pfc_en = 0; 2064 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2065 if (params->pfc.prio[i]) 2066 pfc->pfc_en |= BIT(i); 2067 2068 kfree(dcbx_info); 2069 2070 return 0; 2071 } 2072 2073 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2074 { 2075 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2076 } 2077 2078 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2079 { 2080 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2081 struct qed_dcbx_get *dcbx_info; 2082 struct qed_dcbx_set dcbx_set; 2083 struct qed_ptt *ptt; 2084 int rc, i; 2085 2086 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2087 if (!dcbx_info) 2088 return -EINVAL; 2089 2090 if (!dcbx_info->operational.ieee) { 2091 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2092 kfree(dcbx_info); 2093 return -EINVAL; 2094 } 2095 2096 kfree(dcbx_info); 2097 2098 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2099 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2100 if (rc) 2101 return -EINVAL; 2102 2103 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2104 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2105 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2106 2107 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap; 2108 2109 ptt = qed_ptt_acquire(hwfn); 2110 if (!ptt) 2111 return -EINVAL; 2112 2113 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2114 2115 qed_ptt_release(hwfn, ptt); 2116 2117 return rc; 2118 } 2119 2120 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2121 struct ieee_ets *ets, bool remote) 2122 { 2123 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2124 struct qed_dcbx_get *dcbx_info; 2125 struct qed_dcbx_params *params; 2126 int rc; 2127 2128 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2129 if (!dcbx_info) 2130 return -EINVAL; 2131 2132 if (!dcbx_info->operational.ieee) { 2133 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2134 kfree(dcbx_info); 2135 return -EINVAL; 2136 } 2137 2138 if (remote) { 2139 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2140 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2141 QED_DCBX_REMOTE_MIB); 2142 if (rc) { 2143 kfree(dcbx_info); 2144 return -EINVAL; 2145 } 2146 2147 params = &dcbx_info->remote.params; 2148 } else { 2149 params = &dcbx_info->operational.params; 2150 } 2151 2152 ets->ets_cap = params->max_ets_tc; 2153 ets->willing = params->ets_willing; 2154 ets->cbs = params->ets_cbs; 2155 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2156 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2157 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2158 kfree(dcbx_info); 2159 2160 return 0; 2161 } 2162 2163 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2164 { 2165 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2166 } 2167 2168 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2169 { 2170 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2171 struct qed_dcbx_get *dcbx_info; 2172 struct qed_dcbx_set dcbx_set; 2173 struct qed_ptt *ptt; 2174 int rc; 2175 2176 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2177 if (!dcbx_info) 2178 return -EINVAL; 2179 2180 if (!dcbx_info->operational.ieee) { 2181 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2182 kfree(dcbx_info); 2183 return -EINVAL; 2184 } 2185 2186 kfree(dcbx_info); 2187 2188 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2189 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2190 if (rc) 2191 return -EINVAL; 2192 2193 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2194 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2195 dcbx_set.config.params.ets_willing = ets->willing; 2196 dcbx_set.config.params.ets_cbs = ets->cbs; 2197 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2198 sizeof(ets->tc_tx_bw)); 2199 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2200 sizeof(ets->tc_tsa)); 2201 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2202 sizeof(ets->prio_tc)); 2203 2204 ptt = qed_ptt_acquire(hwfn); 2205 if (!ptt) 2206 return -EINVAL; 2207 2208 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2209 2210 qed_ptt_release(hwfn, ptt); 2211 2212 return rc; 2213 } 2214 2215 static int 2216 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2217 { 2218 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2219 } 2220 2221 static int 2222 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2223 { 2224 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2225 } 2226 2227 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee) 2228 { 2229 switch (selector) { 2230 case IEEE_8021QAZ_APP_SEL_ETHERTYPE: 2231 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 2232 break; 2233 case IEEE_8021QAZ_APP_SEL_STREAM: 2234 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 2235 break; 2236 case IEEE_8021QAZ_APP_SEL_DGRAM: 2237 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 2238 break; 2239 case IEEE_8021QAZ_APP_SEL_ANY: 2240 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 2241 break; 2242 default: 2243 return -EINVAL; 2244 } 2245 2246 return 0; 2247 } 2248 2249 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2250 { 2251 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2252 struct qed_dcbx_get *dcbx_info; 2253 struct qed_app_entry *entry; 2254 u8 prio = 0; 2255 u8 sf_ieee; 2256 int i; 2257 2258 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n", 2259 app->selector, app->protocol); 2260 2261 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2262 DP_INFO(cdev, "Invalid selector field value %d\n", 2263 app->selector); 2264 return -EINVAL; 2265 } 2266 2267 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2268 if (!dcbx_info) 2269 return -EINVAL; 2270 2271 if (!dcbx_info->operational.ieee) { 2272 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2273 kfree(dcbx_info); 2274 return -EINVAL; 2275 } 2276 2277 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2278 entry = &dcbx_info->operational.params.app_entry[i]; 2279 if ((entry->sf_ieee == sf_ieee) && 2280 (entry->proto_id == app->protocol)) { 2281 prio = entry->prio; 2282 break; 2283 } 2284 } 2285 2286 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2287 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2288 app->protocol); 2289 kfree(dcbx_info); 2290 return -EINVAL; 2291 } 2292 2293 app->priority = ffs(prio) - 1; 2294 2295 kfree(dcbx_info); 2296 2297 return 0; 2298 } 2299 2300 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2301 { 2302 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2303 struct qed_dcbx_get *dcbx_info; 2304 struct qed_dcbx_set dcbx_set; 2305 struct qed_app_entry *entry; 2306 struct qed_ptt *ptt; 2307 u8 sf_ieee; 2308 int rc, i; 2309 2310 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n", 2311 app->selector, app->protocol, app->priority); 2312 if (app->priority < 0 || app->priority >= QED_MAX_PFC_PRIORITIES) { 2313 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2314 return -EINVAL; 2315 } 2316 2317 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2318 DP_INFO(cdev, "Invalid selector field value %d\n", 2319 app->selector); 2320 return -EINVAL; 2321 } 2322 2323 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2324 if (!dcbx_info) 2325 return -EINVAL; 2326 2327 if (!dcbx_info->operational.ieee) { 2328 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2329 kfree(dcbx_info); 2330 return -EINVAL; 2331 } 2332 2333 kfree(dcbx_info); 2334 2335 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2336 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2337 if (rc) 2338 return -EINVAL; 2339 2340 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2341 entry = &dcbx_set.config.params.app_entry[i]; 2342 if ((entry->sf_ieee == sf_ieee) && 2343 (entry->proto_id == app->protocol)) 2344 break; 2345 /* First empty slot */ 2346 if (!entry->proto_id) { 2347 dcbx_set.config.params.num_app_entries++; 2348 break; 2349 } 2350 } 2351 2352 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2353 DP_ERR(cdev, "App table is full\n"); 2354 return -EBUSY; 2355 } 2356 2357 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2358 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee; 2359 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2360 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2361 2362 ptt = qed_ptt_acquire(hwfn); 2363 if (!ptt) 2364 return -EBUSY; 2365 2366 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2367 2368 qed_ptt_release(hwfn, ptt); 2369 2370 return rc; 2371 } 2372 2373 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2374 .getstate = qed_dcbnl_getstate, 2375 .setstate = qed_dcbnl_setstate, 2376 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2377 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2378 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2379 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2380 .getpfccfg = qed_dcbnl_getpfccfg, 2381 .setpfccfg = qed_dcbnl_setpfccfg, 2382 .getcap = qed_dcbnl_getcap, 2383 .getnumtcs = qed_dcbnl_getnumtcs, 2384 .getpfcstate = qed_dcbnl_getpfcstate, 2385 .getdcbx = qed_dcbnl_getdcbx, 2386 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2387 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2388 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2389 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2390 .setall = qed_dcbnl_setall, 2391 .setnumtcs = qed_dcbnl_setnumtcs, 2392 .setpfcstate = qed_dcbnl_setpfcstate, 2393 .setapp = qed_dcbnl_setapp, 2394 .setdcbx = qed_dcbnl_setdcbx, 2395 .setfeatcfg = qed_dcbnl_setfeatcfg, 2396 .getfeatcfg = qed_dcbnl_getfeatcfg, 2397 .getapp = qed_dcbnl_getapp, 2398 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2399 .peer_getapptable = qed_dcbnl_peer_getapptable, 2400 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2401 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2402 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2403 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2404 .ieee_getets = qed_dcbnl_ieee_getets, 2405 .ieee_setets = qed_dcbnl_ieee_setets, 2406 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2407 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2408 .ieee_getapp = qed_dcbnl_ieee_getapp, 2409 .ieee_setapp = qed_dcbnl_ieee_setapp, 2410 }; 2411 2412 #endif 2413