1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/bitops.h> 36 #include <linux/dcbnl.h> 37 #include <linux/errno.h> 38 #include <linux/kernel.h> 39 #include <linux/slab.h> 40 #include <linux/string.h> 41 #include "qed.h" 42 #include "qed_cxt.h" 43 #include "qed_dcbx.h" 44 #include "qed_hsi.h" 45 #include "qed_sp.h" 46 #include "qed_sriov.h" 47 #include "qed_rdma.h" 48 #ifdef CONFIG_DCB 49 #include <linux/qed/qed_eth_if.h> 50 #endif 51 52 #define QED_DCBX_MAX_MIB_READ_TRY (100) 53 #define QED_ETH_TYPE_DEFAULT (0) 54 #define QED_ETH_TYPE_ROCE (0x8915) 55 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 56 #define QED_ETH_TYPE_FCOE (0x8906) 57 #define QED_TCP_PORT_ISCSI (0xCBC) 58 59 #define QED_DCBX_INVALID_PRIORITY 0xFF 60 61 /* Get Traffic Class from priority traffic class table, 4 bits represent 62 * the traffic class corresponding to the priority. 63 */ 64 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 65 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 66 67 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 68 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI}, 69 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE}, 70 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE}, 71 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE}, 72 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}, 73 }; 74 75 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 76 { 77 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 78 DCBX_APP_SF_ETHTYPE); 79 } 80 81 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 82 { 83 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 84 85 /* Old MFW */ 86 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 87 return qed_dcbx_app_ethtype(app_info_bitmap); 88 89 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 90 } 91 92 static bool qed_dcbx_app_port(u32 app_info_bitmap) 93 { 94 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 95 DCBX_APP_SF_PORT); 96 } 97 98 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 99 { 100 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 101 102 /* Old MFW */ 103 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 104 return qed_dcbx_app_port(app_info_bitmap); 105 106 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 107 } 108 109 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 110 { 111 bool ethtype; 112 113 if (ieee) 114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 115 else 116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 117 118 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 119 } 120 121 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 122 { 123 bool port; 124 125 if (ieee) 126 port = qed_dcbx_ieee_app_port(app_info_bitmap, 127 DCBX_APP_SF_IEEE_TCP_PORT); 128 else 129 port = qed_dcbx_app_port(app_info_bitmap); 130 131 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 132 } 133 134 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 135 { 136 bool ethtype; 137 138 if (ieee) 139 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 140 else 141 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 142 143 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 144 } 145 146 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 147 { 148 bool ethtype; 149 150 if (ieee) 151 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 152 else 153 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 154 155 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 156 } 157 158 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 159 { 160 bool port; 161 162 if (ieee) 163 port = qed_dcbx_ieee_app_port(app_info_bitmap, 164 DCBX_APP_SF_IEEE_UDP_PORT); 165 else 166 port = qed_dcbx_app_port(app_info_bitmap); 167 168 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 169 } 170 171 static void 172 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 173 { 174 enum dcbx_protocol_type id; 175 int i; 176 177 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 178 p_data->dcbx_enabled); 179 180 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 181 id = qed_dcbx_app_update[i].id; 182 183 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 184 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 185 qed_dcbx_app_update[i].name, p_data->arr[id].update, 186 p_data->arr[id].enable, p_data->arr[id].priority, 187 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); 188 } 189 } 190 191 static void 192 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 193 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 194 bool enable, u8 prio, u8 tc, 195 enum dcbx_protocol_type type, 196 enum qed_pci_personality personality) 197 { 198 /* PF update ramrod data */ 199 p_data->arr[type].enable = enable; 200 p_data->arr[type].priority = prio; 201 p_data->arr[type].tc = tc; 202 if (enable) 203 p_data->arr[type].update = UPDATE_DCB; 204 else 205 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP; 206 207 /* Do not add vlan tag 0 when DCB is enabled and port in UFP/OV mode */ 208 if ((test_bit(QED_MF_8021Q_TAGGING, &p_hwfn->cdev->mf_bits) || 209 test_bit(QED_MF_8021AD_TAGGING, &p_hwfn->cdev->mf_bits))) 210 p_data->arr[type].dont_add_vlan0 = true; 211 212 /* QM reconf data */ 213 if (p_hwfn->hw_info.personality == personality) 214 qed_hw_info_set_offload_tc(&p_hwfn->hw_info, tc); 215 216 /* Configure dcbx vlan priority in doorbell block for roce EDPM */ 217 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && 218 type == DCBX_PROTOCOL_ROCE) { 219 qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1); 220 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1); 221 } 222 } 223 224 /* Update app protocol data and hw_info fields with the TLV info */ 225 static void 226 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 227 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 228 bool enable, u8 prio, u8 tc, 229 enum dcbx_protocol_type type) 230 { 231 enum qed_pci_personality personality; 232 enum dcbx_protocol_type id; 233 int i; 234 235 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 236 id = qed_dcbx_app_update[i].id; 237 238 if (type != id) 239 continue; 240 241 personality = qed_dcbx_app_update[i].personality; 242 243 qed_dcbx_set_params(p_data, p_hwfn, p_ptt, enable, 244 prio, tc, type, personality); 245 } 246 } 247 248 static bool 249 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 250 u32 app_prio_bitmap, 251 u16 id, enum dcbx_protocol_type *type, bool ieee) 252 { 253 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 254 *type = DCBX_PROTOCOL_FCOE; 255 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 256 *type = DCBX_PROTOCOL_ROCE; 257 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 258 *type = DCBX_PROTOCOL_ISCSI; 259 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 260 *type = DCBX_PROTOCOL_ETH; 261 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 262 *type = DCBX_PROTOCOL_ROCE_V2; 263 } else { 264 *type = DCBX_MAX_PROTOCOL_TYPE; 265 DP_ERR(p_hwfn, "No action required, App TLV entry = 0x%x\n", 266 app_prio_bitmap); 267 return false; 268 } 269 270 return true; 271 } 272 273 /* Parse app TLV's to update TC information in hw_info structure for 274 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 275 */ 276 static int 277 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 278 struct qed_dcbx_results *p_data, 279 struct dcbx_app_priority_entry *p_tbl, 280 u32 pri_tc_tbl, int count, u8 dcbx_version) 281 { 282 enum dcbx_protocol_type type; 283 bool enable, ieee, eth_tlv; 284 u8 tc, priority_map; 285 u16 protocol_id; 286 int priority; 287 int i; 288 289 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 290 291 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 292 eth_tlv = false; 293 /* Parse APP TLV */ 294 for (i = 0; i < count; i++) { 295 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 296 DCBX_APP_PROTOCOL_ID); 297 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 298 DCBX_APP_PRI_MAP); 299 priority = ffs(priority_map) - 1; 300 if (priority < 0) { 301 DP_ERR(p_hwfn, "Invalid priority\n"); 302 return -EINVAL; 303 } 304 305 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 306 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 307 protocol_id, &type, ieee)) { 308 /* ETH always have the enable bit reset, as it gets 309 * vlan information per packet. For other protocols, 310 * should be set according to the dcbx_enabled 311 * indication, but we only got here if there was an 312 * app tlv for the protocol, so dcbx must be enabled. 313 */ 314 if (type == DCBX_PROTOCOL_ETH) { 315 enable = false; 316 eth_tlv = true; 317 } else { 318 enable = true; 319 } 320 321 qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, enable, 322 priority, tc, type); 323 } 324 } 325 326 /* If Eth TLV is not detected, use UFP TC as default TC */ 327 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && !eth_tlv) 328 p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc; 329 330 /* Update ramrod protocol data and hw_info fields 331 * with default info when corresponding APP TLV's are not detected. 332 * The enabled field has a different logic for ethernet as only for 333 * ethernet dcb should disabled by default, as the information arrives 334 * from the OS (unless an explicit app tlv was present). 335 */ 336 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 337 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 338 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 339 if (p_data->arr[type].update) 340 continue; 341 342 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 343 qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, enable, 344 priority, tc, type); 345 } 346 347 return 0; 348 } 349 350 /* Parse app TLV's to update TC information in hw_info structure for 351 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 352 */ 353 static int 354 qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 355 { 356 struct dcbx_app_priority_feature *p_app; 357 struct dcbx_app_priority_entry *p_tbl; 358 struct qed_dcbx_results data = { 0 }; 359 struct dcbx_ets_feature *p_ets; 360 struct qed_hw_info *p_info; 361 u32 pri_tc_tbl, flags; 362 u8 dcbx_version; 363 int num_entries; 364 int rc = 0; 365 366 flags = p_hwfn->p_dcbx_info->operational.flags; 367 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 368 369 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 370 p_tbl = p_app->app_pri_tbl; 371 372 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 373 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 374 375 p_info = &p_hwfn->hw_info; 376 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 377 378 rc = qed_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl, 379 num_entries, dcbx_version); 380 if (rc) 381 return rc; 382 383 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags, 384 DCBX_ETS_MAX_TCS); 385 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC); 386 data.pf_id = p_hwfn->rel_pf_id; 387 data.dcbx_enabled = !!dcbx_version; 388 389 qed_dcbx_dp_protocol(p_hwfn, &data); 390 391 memcpy(&p_hwfn->p_dcbx_info->results, &data, 392 sizeof(struct qed_dcbx_results)); 393 394 return 0; 395 } 396 397 static int 398 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 399 struct qed_ptt *p_ptt, 400 struct qed_dcbx_mib_meta_data *p_data, 401 enum qed_mib_read_type type) 402 { 403 u32 prefix_seq_num, suffix_seq_num; 404 int read_count = 0; 405 int rc = 0; 406 407 /* The data is considered to be valid only if both sequence numbers are 408 * the same. 409 */ 410 do { 411 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 412 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 413 p_data->addr, p_data->size); 414 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 415 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 416 } else { 417 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 418 p_data->addr, p_data->size); 419 prefix_seq_num = p_data->mib->prefix_seq_num; 420 suffix_seq_num = p_data->mib->suffix_seq_num; 421 } 422 read_count++; 423 424 DP_VERBOSE(p_hwfn, 425 QED_MSG_DCB, 426 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 427 type, read_count, prefix_seq_num, suffix_seq_num); 428 } while ((prefix_seq_num != suffix_seq_num) && 429 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 430 431 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 432 DP_ERR(p_hwfn, 433 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 434 type, read_count, prefix_seq_num, suffix_seq_num); 435 rc = -EIO; 436 } 437 438 return rc; 439 } 440 441 static void 442 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 443 struct qed_dcbx_app_prio *p_prio, 444 struct qed_dcbx_results *p_results) 445 { 446 u8 val; 447 448 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 449 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 450 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 451 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 452 453 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 454 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 455 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 456 457 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 458 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 459 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 460 p_prio->roce_v2 = val; 461 } 462 463 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 464 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 465 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 466 467 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 468 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 469 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 470 471 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 472 p_results->arr[DCBX_PROTOCOL_ETH].enable) 473 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 474 475 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 476 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 477 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 478 p_prio->eth); 479 } 480 481 static void 482 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 483 struct dcbx_app_priority_feature *p_app, 484 struct dcbx_app_priority_entry *p_tbl, 485 struct qed_dcbx_params *p_params, bool ieee) 486 { 487 struct qed_app_entry *entry; 488 u8 pri_map; 489 int i; 490 491 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 492 DCBX_APP_WILLING); 493 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 494 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 495 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 496 DCBX_APP_NUM_ENTRIES); 497 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 498 entry = &p_params->app_entry[i]; 499 if (ieee) { 500 u8 sf_ieee; 501 u32 val; 502 503 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 504 DCBX_APP_SF_IEEE); 505 switch (sf_ieee) { 506 case DCBX_APP_SF_IEEE_RESERVED: 507 /* Old MFW */ 508 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 509 DCBX_APP_SF); 510 entry->sf_ieee = val ? 511 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 512 QED_DCBX_SF_IEEE_ETHTYPE; 513 break; 514 case DCBX_APP_SF_IEEE_ETHTYPE: 515 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 516 break; 517 case DCBX_APP_SF_IEEE_TCP_PORT: 518 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 519 break; 520 case DCBX_APP_SF_IEEE_UDP_PORT: 521 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 522 break; 523 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 524 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 525 break; 526 } 527 } else { 528 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 529 DCBX_APP_SF)); 530 } 531 532 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 533 entry->prio = ffs(pri_map) - 1; 534 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 535 DCBX_APP_PROTOCOL_ID); 536 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 537 entry->proto_id, 538 &entry->proto_type, ieee); 539 } 540 541 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 542 "APP params: willing %d, valid %d error = %d\n", 543 p_params->app_willing, p_params->app_valid, 544 p_params->app_error); 545 } 546 547 static void 548 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 549 u32 pfc, struct qed_dcbx_params *p_params) 550 { 551 u8 pfc_map; 552 553 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 554 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 555 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 556 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 557 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 558 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 559 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 560 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 561 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 562 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 563 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 564 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 565 566 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 567 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 568 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 569 p_params->pfc.enabled); 570 } 571 572 static void 573 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 574 struct dcbx_ets_feature *p_ets, 575 struct qed_dcbx_params *p_params) 576 { 577 u32 bw_map[2], tsa_map[2], pri_map; 578 int i; 579 580 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 581 DCBX_ETS_WILLING); 582 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 583 DCBX_ETS_ENABLED); 584 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 585 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 586 DCBX_ETS_MAX_TCS); 587 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 588 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 589 p_params->ets_willing, p_params->ets_enabled, 590 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 591 p_params->max_ets_tc); 592 593 if (p_params->ets_enabled && !p_params->max_ets_tc) { 594 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES; 595 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 596 "ETS params: max_ets_tc is forced to %d\n", 597 p_params->max_ets_tc); 598 } 599 600 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 601 * encoded in a type u32 array of size 2. 602 */ 603 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 604 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 605 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 606 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 607 pri_map = p_ets->pri_tc_tbl[0]; 608 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 609 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 610 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 611 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 612 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 613 "elem %d bw_tbl %x tsa_tbl %x\n", 614 i, p_params->ets_tc_bw_tbl[i], 615 p_params->ets_tc_tsa_tbl[i]); 616 } 617 } 618 619 static void 620 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 621 struct dcbx_app_priority_feature *p_app, 622 struct dcbx_app_priority_entry *p_tbl, 623 struct dcbx_ets_feature *p_ets, 624 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 625 { 626 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 627 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 628 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 629 } 630 631 static void 632 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 633 { 634 struct dcbx_features *p_feat; 635 636 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 637 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 638 p_feat->app.app_pri_tbl, &p_feat->ets, 639 p_feat->pfc, ¶ms->local.params, false); 640 params->local.valid = true; 641 } 642 643 static void 644 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 645 { 646 struct dcbx_features *p_feat; 647 648 p_feat = &p_hwfn->p_dcbx_info->remote.features; 649 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 650 p_feat->app.app_pri_tbl, &p_feat->ets, 651 p_feat->pfc, ¶ms->remote.params, false); 652 params->remote.valid = true; 653 } 654 655 static void 656 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 657 struct qed_dcbx_get *params) 658 { 659 struct qed_dcbx_operational_params *p_operational; 660 struct qed_dcbx_results *p_results; 661 struct dcbx_features *p_feat; 662 bool enabled, err; 663 u32 flags; 664 bool val; 665 666 flags = p_hwfn->p_dcbx_info->operational.flags; 667 668 /* If DCBx version is non zero, then negotiation 669 * was successfuly performed 670 */ 671 p_operational = ¶ms->operational; 672 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 673 DCBX_CONFIG_VERSION_DISABLED); 674 if (!enabled) { 675 p_operational->enabled = enabled; 676 p_operational->valid = false; 677 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n"); 678 return; 679 } 680 681 p_feat = &p_hwfn->p_dcbx_info->operational.features; 682 p_results = &p_hwfn->p_dcbx_info->results; 683 684 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 685 DCBX_CONFIG_VERSION_IEEE); 686 p_operational->ieee = val; 687 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 688 DCBX_CONFIG_VERSION_CEE); 689 p_operational->cee = val; 690 691 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 692 DCBX_CONFIG_VERSION_STATIC); 693 p_operational->local = val; 694 695 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 696 "Version support: ieee %d, cee %d, static %d\n", 697 p_operational->ieee, p_operational->cee, 698 p_operational->local); 699 700 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 701 p_feat->app.app_pri_tbl, &p_feat->ets, 702 p_feat->pfc, ¶ms->operational.params, 703 p_operational->ieee); 704 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 705 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 706 p_operational->err = err; 707 p_operational->enabled = enabled; 708 p_operational->valid = true; 709 } 710 711 static void 712 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 713 struct qed_dcbx_get *params) 714 { 715 struct lldp_config_params_s *p_local; 716 717 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 718 719 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 720 sizeof(p_local->local_chassis_id)); 721 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 722 sizeof(p_local->local_port_id)); 723 } 724 725 static void 726 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 727 struct qed_dcbx_get *params) 728 { 729 struct lldp_status_params_s *p_remote; 730 731 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 732 733 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 734 sizeof(p_remote->peer_chassis_id)); 735 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 736 sizeof(p_remote->peer_port_id)); 737 } 738 739 static int 740 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params, 741 enum qed_mib_read_type type) 742 { 743 switch (type) { 744 case QED_DCBX_REMOTE_MIB: 745 qed_dcbx_get_remote_params(p_hwfn, p_params); 746 break; 747 case QED_DCBX_LOCAL_MIB: 748 qed_dcbx_get_local_params(p_hwfn, p_params); 749 break; 750 case QED_DCBX_OPERATIONAL_MIB: 751 qed_dcbx_get_operational_params(p_hwfn, p_params); 752 break; 753 case QED_DCBX_REMOTE_LLDP_MIB: 754 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params); 755 break; 756 case QED_DCBX_LOCAL_LLDP_MIB: 757 qed_dcbx_get_local_lldp_params(p_hwfn, p_params); 758 break; 759 default: 760 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 761 return -EINVAL; 762 } 763 764 return 0; 765 } 766 767 static int 768 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 769 { 770 struct qed_dcbx_mib_meta_data data; 771 int rc = 0; 772 773 memset(&data, 0, sizeof(data)); 774 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 775 lldp_config_params); 776 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 777 data.size = sizeof(struct lldp_config_params_s); 778 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 779 780 return rc; 781 } 782 783 static int 784 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 785 struct qed_ptt *p_ptt, 786 enum qed_mib_read_type type) 787 { 788 struct qed_dcbx_mib_meta_data data; 789 int rc = 0; 790 791 memset(&data, 0, sizeof(data)); 792 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 793 lldp_status_params); 794 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 795 data.size = sizeof(struct lldp_status_params_s); 796 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 797 798 return rc; 799 } 800 801 static int 802 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 803 struct qed_ptt *p_ptt, 804 enum qed_mib_read_type type) 805 { 806 struct qed_dcbx_mib_meta_data data; 807 int rc = 0; 808 809 memset(&data, 0, sizeof(data)); 810 data.addr = p_hwfn->mcp_info->port_addr + 811 offsetof(struct public_port, operational_dcbx_mib); 812 data.mib = &p_hwfn->p_dcbx_info->operational; 813 data.size = sizeof(struct dcbx_mib); 814 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 815 816 return rc; 817 } 818 819 static int 820 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 821 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 822 { 823 struct qed_dcbx_mib_meta_data data; 824 int rc = 0; 825 826 memset(&data, 0, sizeof(data)); 827 data.addr = p_hwfn->mcp_info->port_addr + 828 offsetof(struct public_port, remote_dcbx_mib); 829 data.mib = &p_hwfn->p_dcbx_info->remote; 830 data.size = sizeof(struct dcbx_mib); 831 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 832 833 return rc; 834 } 835 836 static int 837 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 838 { 839 struct qed_dcbx_mib_meta_data data; 840 int rc = 0; 841 842 memset(&data, 0, sizeof(data)); 843 data.addr = p_hwfn->mcp_info->port_addr + 844 offsetof(struct public_port, local_admin_dcbx_mib); 845 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 846 data.size = sizeof(struct dcbx_local_params); 847 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 848 849 return rc; 850 } 851 852 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 853 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 854 { 855 int rc = -EINVAL; 856 857 switch (type) { 858 case QED_DCBX_OPERATIONAL_MIB: 859 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 860 break; 861 case QED_DCBX_REMOTE_MIB: 862 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 863 break; 864 case QED_DCBX_LOCAL_MIB: 865 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 866 break; 867 case QED_DCBX_REMOTE_LLDP_MIB: 868 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 869 break; 870 case QED_DCBX_LOCAL_LLDP_MIB: 871 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 872 break; 873 default: 874 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 875 } 876 877 return rc; 878 } 879 880 static void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type) 881 { 882 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common; 883 void *cookie = hwfn->cdev->ops_cookie; 884 885 if (cookie && op->dcbx_aen) 886 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type); 887 } 888 889 /* Read updated MIB. 890 * Reconfigure QM and invoke PF update ramrod command if operational MIB 891 * change is detected. 892 */ 893 int 894 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 895 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 896 { 897 int rc = 0; 898 899 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 900 if (rc) 901 return rc; 902 903 if (type == QED_DCBX_OPERATIONAL_MIB) { 904 rc = qed_dcbx_process_mib_info(p_hwfn, p_ptt); 905 if (!rc) { 906 /* reconfigure tcs of QM queues according 907 * to negotiation results 908 */ 909 qed_qm_reconf(p_hwfn, p_ptt); 910 911 /* update storm FW with negotiation results */ 912 qed_sp_pf_update(p_hwfn); 913 914 /* for roce PFs, we may want to enable/disable DPM 915 * when DCBx change occurs 916 */ 917 if (p_hwfn->hw_info.personality == 918 QED_PCI_ETH_ROCE) 919 qed_roce_dpm_dcbx(p_hwfn, p_ptt); 920 } 921 } 922 923 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 924 925 if (type == QED_DCBX_OPERATIONAL_MIB) { 926 struct qed_dcbx_results *p_data; 927 u16 val; 928 929 /* Configure in NIG which protocols support EDPM and should 930 * honor PFC. 931 */ 932 p_data = &p_hwfn->p_dcbx_info->results; 933 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) | 934 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc); 935 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT; 936 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN; 937 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val); 938 } 939 940 qed_dcbx_aen(p_hwfn, type); 941 942 return rc; 943 } 944 945 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 946 { 947 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 948 if (!p_hwfn->p_dcbx_info) 949 return -ENOMEM; 950 951 return 0; 952 } 953 954 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn) 955 { 956 kfree(p_hwfn->p_dcbx_info); 957 p_hwfn->p_dcbx_info = NULL; 958 } 959 960 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 961 struct qed_dcbx_results *p_src, 962 enum dcbx_protocol_type type) 963 { 964 p_data->dcb_enable_flag = p_src->arr[type].enable; 965 p_data->dcb_priority = p_src->arr[type].priority; 966 p_data->dcb_tc = p_src->arr[type].tc; 967 p_data->dcb_dont_add_vlan0 = p_src->arr[type].dont_add_vlan0; 968 } 969 970 /* Set pf update ramrod command params */ 971 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 972 struct pf_update_ramrod_data *p_dest) 973 { 974 struct protocol_dcb_data *p_dcb_data; 975 u8 update_flag; 976 977 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 978 p_dest->update_fcoe_dcb_data_mode = update_flag; 979 980 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 981 p_dest->update_roce_dcb_data_mode = update_flag; 982 983 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 984 p_dest->update_rroce_dcb_data_mode = update_flag; 985 986 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 987 p_dest->update_iscsi_dcb_data_mode = update_flag; 988 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 989 p_dest->update_eth_dcb_data_mode = update_flag; 990 991 p_dcb_data = &p_dest->fcoe_dcb_data; 992 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 993 p_dcb_data = &p_dest->roce_dcb_data; 994 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE); 995 p_dcb_data = &p_dest->rroce_dcb_data; 996 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2); 997 p_dcb_data = &p_dest->iscsi_dcb_data; 998 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 999 p_dcb_data = &p_dest->eth_dcb_data; 1000 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 1001 } 1002 1003 u8 qed_dcbx_get_priority_tc(struct qed_hwfn *p_hwfn, u8 pri) 1004 { 1005 struct qed_dcbx_get *dcbx_info = &p_hwfn->p_dcbx_info->get; 1006 1007 if (pri >= QED_MAX_PFC_PRIORITIES) { 1008 DP_ERR(p_hwfn, "Invalid priority %d\n", pri); 1009 return QED_DCBX_DEFAULT_TC; 1010 } 1011 1012 if (!dcbx_info->operational.valid) { 1013 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 1014 "Dcbx parameters not available\n"); 1015 return QED_DCBX_DEFAULT_TC; 1016 } 1017 1018 return dcbx_info->operational.params.ets_pri_tc_tbl[pri]; 1019 } 1020 1021 #ifdef CONFIG_DCB 1022 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 1023 struct qed_dcbx_get *p_get, 1024 enum qed_mib_read_type type) 1025 { 1026 struct qed_ptt *p_ptt; 1027 int rc; 1028 1029 if (IS_VF(p_hwfn->cdev)) 1030 return -EINVAL; 1031 1032 p_ptt = qed_ptt_acquire(p_hwfn); 1033 if (!p_ptt) 1034 return -EBUSY; 1035 1036 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 1037 if (rc) 1038 goto out; 1039 1040 rc = qed_dcbx_get_params(p_hwfn, p_get, type); 1041 1042 out: 1043 qed_ptt_release(p_hwfn, p_ptt); 1044 return rc; 1045 } 1046 1047 static void 1048 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 1049 u32 *pfc, struct qed_dcbx_params *p_params) 1050 { 1051 u8 pfc_map = 0; 1052 int i; 1053 1054 *pfc &= ~DCBX_PFC_ERROR_MASK; 1055 1056 if (p_params->pfc.willing) 1057 *pfc |= DCBX_PFC_WILLING_MASK; 1058 else 1059 *pfc &= ~DCBX_PFC_WILLING_MASK; 1060 1061 if (p_params->pfc.enabled) 1062 *pfc |= DCBX_PFC_ENABLED_MASK; 1063 else 1064 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1065 1066 *pfc &= ~DCBX_PFC_CAPS_MASK; 1067 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 1068 1069 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1070 if (p_params->pfc.prio[i]) 1071 pfc_map |= BIT(i); 1072 1073 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1074 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 1075 1076 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 1077 } 1078 1079 static void 1080 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 1081 struct dcbx_ets_feature *p_ets, 1082 struct qed_dcbx_params *p_params) 1083 { 1084 u8 *bw_map, *tsa_map; 1085 u32 val; 1086 int i; 1087 1088 if (p_params->ets_willing) 1089 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1090 else 1091 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1092 1093 if (p_params->ets_cbs) 1094 p_ets->flags |= DCBX_ETS_CBS_MASK; 1095 else 1096 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1097 1098 if (p_params->ets_enabled) 1099 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1100 else 1101 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1102 1103 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1104 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1105 1106 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1107 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1108 p_ets->pri_tc_tbl[0] = 0; 1109 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1110 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1111 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1112 /* Copy the priority value to the corresponding 4 bits in the 1113 * traffic class table. 1114 */ 1115 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1116 p_ets->pri_tc_tbl[0] |= val; 1117 } 1118 for (i = 0; i < 2; i++) { 1119 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1120 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1121 } 1122 } 1123 1124 static void 1125 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1126 struct dcbx_app_priority_feature *p_app, 1127 struct qed_dcbx_params *p_params, bool ieee) 1128 { 1129 u32 *entry; 1130 int i; 1131 1132 if (p_params->app_willing) 1133 p_app->flags |= DCBX_APP_WILLING_MASK; 1134 else 1135 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1136 1137 if (p_params->app_valid) 1138 p_app->flags |= DCBX_APP_ENABLED_MASK; 1139 else 1140 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1141 1142 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1143 p_app->flags |= (u32)p_params->num_app_entries << 1144 DCBX_APP_NUM_ENTRIES_SHIFT; 1145 1146 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1147 entry = &p_app->app_pri_tbl[i].entry; 1148 *entry = 0; 1149 if (ieee) { 1150 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1151 switch (p_params->app_entry[i].sf_ieee) { 1152 case QED_DCBX_SF_IEEE_ETHTYPE: 1153 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1154 DCBX_APP_SF_IEEE_SHIFT); 1155 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1156 DCBX_APP_SF_SHIFT); 1157 break; 1158 case QED_DCBX_SF_IEEE_TCP_PORT: 1159 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1160 DCBX_APP_SF_IEEE_SHIFT); 1161 *entry |= ((u32)DCBX_APP_SF_PORT << 1162 DCBX_APP_SF_SHIFT); 1163 break; 1164 case QED_DCBX_SF_IEEE_UDP_PORT: 1165 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1166 DCBX_APP_SF_IEEE_SHIFT); 1167 *entry |= ((u32)DCBX_APP_SF_PORT << 1168 DCBX_APP_SF_SHIFT); 1169 break; 1170 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1171 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1172 DCBX_APP_SF_IEEE_SHIFT); 1173 *entry |= ((u32)DCBX_APP_SF_PORT << 1174 DCBX_APP_SF_SHIFT); 1175 break; 1176 } 1177 } else { 1178 *entry &= ~DCBX_APP_SF_MASK; 1179 if (p_params->app_entry[i].ethtype) 1180 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1181 DCBX_APP_SF_SHIFT); 1182 else 1183 *entry |= ((u32)DCBX_APP_SF_PORT << 1184 DCBX_APP_SF_SHIFT); 1185 } 1186 1187 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1188 *entry |= ((u32)p_params->app_entry[i].proto_id << 1189 DCBX_APP_PROTOCOL_ID_SHIFT); 1190 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1191 *entry |= ((u32)(p_params->app_entry[i].prio) << 1192 DCBX_APP_PRI_MAP_SHIFT); 1193 } 1194 } 1195 1196 static void 1197 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1198 struct dcbx_local_params *local_admin, 1199 struct qed_dcbx_set *params) 1200 { 1201 bool ieee = false; 1202 1203 local_admin->flags = 0; 1204 memcpy(&local_admin->features, 1205 &p_hwfn->p_dcbx_info->operational.features, 1206 sizeof(local_admin->features)); 1207 1208 if (params->enabled) { 1209 local_admin->config = params->ver_num; 1210 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1211 } else { 1212 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1213 } 1214 1215 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n", 1216 local_admin->config); 1217 1218 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1219 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1220 ¶ms->config.params); 1221 1222 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1223 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1224 ¶ms->config.params); 1225 1226 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1227 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1228 ¶ms->config.params, ieee); 1229 } 1230 1231 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1232 struct qed_dcbx_set *params, bool hw_commit) 1233 { 1234 struct dcbx_local_params local_admin; 1235 struct qed_dcbx_mib_meta_data data; 1236 u32 resp = 0, param = 0; 1237 int rc = 0; 1238 1239 if (!hw_commit) { 1240 memcpy(&p_hwfn->p_dcbx_info->set, params, 1241 sizeof(struct qed_dcbx_set)); 1242 return 0; 1243 } 1244 1245 /* clear set-parmas cache */ 1246 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1247 1248 memset(&local_admin, 0, sizeof(local_admin)); 1249 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1250 1251 data.addr = p_hwfn->mcp_info->port_addr + 1252 offsetof(struct public_port, local_admin_dcbx_mib); 1253 data.local_admin = &local_admin; 1254 data.size = sizeof(struct dcbx_local_params); 1255 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1256 1257 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1258 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1259 if (rc) 1260 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1261 1262 return rc; 1263 } 1264 1265 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1266 struct qed_dcbx_set *params) 1267 { 1268 struct qed_dcbx_get *dcbx_info; 1269 int rc; 1270 1271 if (p_hwfn->p_dcbx_info->set.config.valid) { 1272 memcpy(params, &p_hwfn->p_dcbx_info->set, 1273 sizeof(struct qed_dcbx_set)); 1274 return 0; 1275 } 1276 1277 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1278 if (!dcbx_info) 1279 return -ENOMEM; 1280 1281 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1282 if (rc) { 1283 kfree(dcbx_info); 1284 return rc; 1285 } 1286 1287 p_hwfn->p_dcbx_info->set.override_flags = 0; 1288 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1289 if (dcbx_info->operational.cee) 1290 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1291 if (dcbx_info->operational.ieee) 1292 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1293 if (dcbx_info->operational.local) 1294 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1295 1296 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1297 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1298 &dcbx_info->operational.params, 1299 sizeof(struct qed_dcbx_admin_params)); 1300 p_hwfn->p_dcbx_info->set.config.valid = true; 1301 1302 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1303 1304 kfree(dcbx_info); 1305 1306 return 0; 1307 } 1308 1309 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1310 enum qed_mib_read_type type) 1311 { 1312 struct qed_dcbx_get *dcbx_info; 1313 1314 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_ATOMIC); 1315 if (!dcbx_info) 1316 return NULL; 1317 1318 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1319 kfree(dcbx_info); 1320 return NULL; 1321 } 1322 1323 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1324 !dcbx_info->operational.enabled) { 1325 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1326 kfree(dcbx_info); 1327 return NULL; 1328 } 1329 1330 return dcbx_info; 1331 } 1332 1333 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1334 { 1335 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1336 struct qed_dcbx_get *dcbx_info; 1337 bool enabled; 1338 1339 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1340 if (!dcbx_info) 1341 return 0; 1342 1343 enabled = dcbx_info->operational.enabled; 1344 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1345 kfree(dcbx_info); 1346 1347 return enabled; 1348 } 1349 1350 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1351 { 1352 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1353 struct qed_dcbx_set dcbx_set; 1354 struct qed_ptt *ptt; 1355 int rc; 1356 1357 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1358 1359 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1360 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1361 if (rc) 1362 return 1; 1363 1364 dcbx_set.enabled = !!state; 1365 1366 ptt = qed_ptt_acquire(hwfn); 1367 if (!ptt) 1368 return 1; 1369 1370 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1371 1372 qed_ptt_release(hwfn, ptt); 1373 1374 return rc ? 1 : 0; 1375 } 1376 1377 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1378 u8 *pgid, u8 *bw_pct, u8 *up_map) 1379 { 1380 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1381 struct qed_dcbx_get *dcbx_info; 1382 1383 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1384 *prio_type = *pgid = *bw_pct = *up_map = 0; 1385 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1386 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1387 return; 1388 } 1389 1390 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1391 if (!dcbx_info) 1392 return; 1393 1394 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1395 kfree(dcbx_info); 1396 } 1397 1398 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1399 { 1400 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1401 struct qed_dcbx_get *dcbx_info; 1402 1403 *bw_pct = 0; 1404 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1405 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1406 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1407 return; 1408 } 1409 1410 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1411 if (!dcbx_info) 1412 return; 1413 1414 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1415 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1416 kfree(dcbx_info); 1417 } 1418 1419 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1420 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1421 { 1422 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1423 *prio = *bwg_id = *bw_pct = *up_map = 0; 1424 } 1425 1426 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1427 int bwg_id, u8 *bw_pct) 1428 { 1429 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1430 *bw_pct = 0; 1431 } 1432 1433 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1434 int priority, u8 *setting) 1435 { 1436 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1437 struct qed_dcbx_get *dcbx_info; 1438 1439 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1440 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1441 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1442 return; 1443 } 1444 1445 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1446 if (!dcbx_info) 1447 return; 1448 1449 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1450 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1451 kfree(dcbx_info); 1452 } 1453 1454 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1455 { 1456 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1457 struct qed_dcbx_set dcbx_set; 1458 struct qed_ptt *ptt; 1459 int rc; 1460 1461 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1462 priority, setting); 1463 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1464 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1465 return; 1466 } 1467 1468 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1469 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1470 if (rc) 1471 return; 1472 1473 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1474 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1475 1476 ptt = qed_ptt_acquire(hwfn); 1477 if (!ptt) 1478 return; 1479 1480 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1481 1482 qed_ptt_release(hwfn, ptt); 1483 } 1484 1485 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1486 { 1487 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1488 struct qed_dcbx_get *dcbx_info; 1489 int rc = 0; 1490 1491 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1492 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1493 if (!dcbx_info) 1494 return 1; 1495 1496 switch (capid) { 1497 case DCB_CAP_ATTR_PG: 1498 case DCB_CAP_ATTR_PFC: 1499 case DCB_CAP_ATTR_UP2TC: 1500 case DCB_CAP_ATTR_GSP: 1501 *cap = true; 1502 break; 1503 case DCB_CAP_ATTR_PG_TCS: 1504 case DCB_CAP_ATTR_PFC_TCS: 1505 *cap = 0x80; 1506 break; 1507 case DCB_CAP_ATTR_DCBX: 1508 *cap = (DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_VER_IEEE | 1509 DCB_CAP_DCBX_STATIC); 1510 break; 1511 default: 1512 *cap = false; 1513 rc = 1; 1514 } 1515 1516 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1517 kfree(dcbx_info); 1518 1519 return rc; 1520 } 1521 1522 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1523 { 1524 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1525 struct qed_dcbx_get *dcbx_info; 1526 int rc = 0; 1527 1528 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1529 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1530 if (!dcbx_info) 1531 return -EINVAL; 1532 1533 switch (tcid) { 1534 case DCB_NUMTCS_ATTR_PG: 1535 *num = dcbx_info->operational.params.max_ets_tc; 1536 break; 1537 case DCB_NUMTCS_ATTR_PFC: 1538 *num = dcbx_info->operational.params.pfc.max_tc; 1539 break; 1540 default: 1541 rc = -EINVAL; 1542 } 1543 1544 kfree(dcbx_info); 1545 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1546 1547 return rc; 1548 } 1549 1550 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1551 { 1552 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1553 struct qed_dcbx_get *dcbx_info; 1554 bool enabled; 1555 1556 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1557 if (!dcbx_info) 1558 return 0; 1559 1560 enabled = dcbx_info->operational.params.pfc.enabled; 1561 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1562 kfree(dcbx_info); 1563 1564 return enabled; 1565 } 1566 1567 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1568 { 1569 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1570 struct qed_dcbx_get *dcbx_info; 1571 u8 mode = 0; 1572 1573 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1574 if (!dcbx_info) 1575 return 0; 1576 1577 if (dcbx_info->operational.ieee) 1578 mode |= DCB_CAP_DCBX_VER_IEEE; 1579 if (dcbx_info->operational.cee) 1580 mode |= DCB_CAP_DCBX_VER_CEE; 1581 if (dcbx_info->operational.local) 1582 mode |= DCB_CAP_DCBX_STATIC; 1583 1584 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1585 kfree(dcbx_info); 1586 1587 return mode; 1588 } 1589 1590 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1591 int tc, 1592 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1593 { 1594 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1595 struct qed_dcbx_set dcbx_set; 1596 struct qed_ptt *ptt; 1597 int rc; 1598 1599 DP_VERBOSE(hwfn, QED_MSG_DCB, 1600 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1601 tc, pri_type, pgid, bw_pct, up_map); 1602 1603 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1604 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1605 return; 1606 } 1607 1608 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1609 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1610 if (rc) 1611 return; 1612 1613 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1614 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1615 1616 ptt = qed_ptt_acquire(hwfn); 1617 if (!ptt) 1618 return; 1619 1620 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1621 1622 qed_ptt_release(hwfn, ptt); 1623 } 1624 1625 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1626 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1627 { 1628 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1629 } 1630 1631 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1632 { 1633 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1634 struct qed_dcbx_set dcbx_set; 1635 struct qed_ptt *ptt; 1636 int rc; 1637 1638 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1639 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1640 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1641 return; 1642 } 1643 1644 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1645 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1646 if (rc) 1647 return; 1648 1649 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1650 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1651 1652 ptt = qed_ptt_acquire(hwfn); 1653 if (!ptt) 1654 return; 1655 1656 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1657 1658 qed_ptt_release(hwfn, ptt); 1659 } 1660 1661 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1662 { 1663 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1664 } 1665 1666 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1667 { 1668 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1669 struct qed_dcbx_set dcbx_set; 1670 struct qed_ptt *ptt; 1671 int rc; 1672 1673 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1674 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1675 if (rc) 1676 return 1; 1677 1678 ptt = qed_ptt_acquire(hwfn); 1679 if (!ptt) 1680 return 1; 1681 1682 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1683 1684 qed_ptt_release(hwfn, ptt); 1685 1686 return rc; 1687 } 1688 1689 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1690 { 1691 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1692 struct qed_dcbx_set dcbx_set; 1693 struct qed_ptt *ptt; 1694 int rc; 1695 1696 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1697 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1698 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1699 if (rc) 1700 return 1; 1701 1702 switch (tcid) { 1703 case DCB_NUMTCS_ATTR_PG: 1704 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1705 dcbx_set.config.params.max_ets_tc = num; 1706 break; 1707 case DCB_NUMTCS_ATTR_PFC: 1708 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1709 dcbx_set.config.params.pfc.max_tc = num; 1710 break; 1711 default: 1712 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1713 return -EINVAL; 1714 } 1715 1716 ptt = qed_ptt_acquire(hwfn); 1717 if (!ptt) 1718 return -EINVAL; 1719 1720 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1721 1722 qed_ptt_release(hwfn, ptt); 1723 1724 return 0; 1725 } 1726 1727 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1728 { 1729 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1730 struct qed_dcbx_set dcbx_set; 1731 struct qed_ptt *ptt; 1732 int rc; 1733 1734 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1735 1736 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1737 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1738 if (rc) 1739 return; 1740 1741 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1742 dcbx_set.config.params.pfc.enabled = !!state; 1743 1744 ptt = qed_ptt_acquire(hwfn); 1745 if (!ptt) 1746 return; 1747 1748 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1749 1750 qed_ptt_release(hwfn, ptt); 1751 } 1752 1753 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1754 { 1755 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1756 struct qed_dcbx_get *dcbx_info; 1757 struct qed_app_entry *entry; 1758 bool ethtype; 1759 u8 prio = 0; 1760 int i; 1761 1762 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1763 if (!dcbx_info) 1764 return -EINVAL; 1765 1766 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1767 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1768 entry = &dcbx_info->operational.params.app_entry[i]; 1769 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1770 prio = entry->prio; 1771 break; 1772 } 1773 } 1774 1775 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1776 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1777 kfree(dcbx_info); 1778 return -EINVAL; 1779 } 1780 1781 kfree(dcbx_info); 1782 1783 return prio; 1784 } 1785 1786 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1787 u8 idtype, u16 idval, u8 pri_map) 1788 { 1789 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1790 struct qed_dcbx_set dcbx_set; 1791 struct qed_app_entry *entry; 1792 struct qed_ptt *ptt; 1793 bool ethtype; 1794 int rc, i; 1795 1796 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1797 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1798 if (rc) 1799 return -EINVAL; 1800 1801 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1802 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1803 entry = &dcbx_set.config.params.app_entry[i]; 1804 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1805 break; 1806 /* First empty slot */ 1807 if (!entry->proto_id) { 1808 dcbx_set.config.params.num_app_entries++; 1809 break; 1810 } 1811 } 1812 1813 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1814 DP_ERR(cdev, "App table is full\n"); 1815 return -EBUSY; 1816 } 1817 1818 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1819 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1820 dcbx_set.config.params.app_entry[i].proto_id = idval; 1821 dcbx_set.config.params.app_entry[i].prio = pri_map; 1822 1823 ptt = qed_ptt_acquire(hwfn); 1824 if (!ptt) 1825 return -EBUSY; 1826 1827 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1828 1829 qed_ptt_release(hwfn, ptt); 1830 1831 return rc; 1832 } 1833 1834 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1835 { 1836 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1837 struct qed_dcbx_set dcbx_set; 1838 struct qed_ptt *ptt; 1839 int rc; 1840 1841 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1842 1843 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && 1844 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) { 1845 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n"); 1846 return 1; 1847 } 1848 1849 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1850 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1851 if (rc) 1852 return 1; 1853 1854 dcbx_set.ver_num = 0; 1855 if (mode & DCB_CAP_DCBX_VER_CEE) { 1856 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1857 dcbx_set.enabled = true; 1858 } 1859 1860 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1861 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1862 dcbx_set.enabled = true; 1863 } 1864 1865 if (mode & DCB_CAP_DCBX_STATIC) { 1866 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1867 dcbx_set.enabled = true; 1868 } 1869 1870 ptt = qed_ptt_acquire(hwfn); 1871 if (!ptt) 1872 return 1; 1873 1874 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1875 1876 qed_ptt_release(hwfn, ptt); 1877 1878 return rc; 1879 } 1880 1881 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1882 { 1883 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1884 struct qed_dcbx_get *dcbx_info; 1885 1886 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1887 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1888 if (!dcbx_info) 1889 return 1; 1890 1891 *flags = 0; 1892 switch (featid) { 1893 case DCB_FEATCFG_ATTR_PG: 1894 if (dcbx_info->operational.params.ets_enabled) 1895 *flags = DCB_FEATCFG_ENABLE; 1896 else 1897 *flags = DCB_FEATCFG_ERROR; 1898 break; 1899 case DCB_FEATCFG_ATTR_PFC: 1900 if (dcbx_info->operational.params.pfc.enabled) 1901 *flags = DCB_FEATCFG_ENABLE; 1902 else 1903 *flags = DCB_FEATCFG_ERROR; 1904 break; 1905 case DCB_FEATCFG_ATTR_APP: 1906 if (dcbx_info->operational.params.app_valid) 1907 *flags = DCB_FEATCFG_ENABLE; 1908 else 1909 *flags = DCB_FEATCFG_ERROR; 1910 break; 1911 default: 1912 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1913 kfree(dcbx_info); 1914 return 1; 1915 } 1916 1917 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1918 kfree(dcbx_info); 1919 1920 return 0; 1921 } 1922 1923 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1924 { 1925 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1926 struct qed_dcbx_set dcbx_set; 1927 bool enabled, willing; 1928 struct qed_ptt *ptt; 1929 int rc; 1930 1931 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1932 featid, flags); 1933 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1934 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1935 if (rc) 1936 return 1; 1937 1938 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1939 willing = !!(flags & DCB_FEATCFG_WILLING); 1940 switch (featid) { 1941 case DCB_FEATCFG_ATTR_PG: 1942 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1943 dcbx_set.config.params.ets_enabled = enabled; 1944 dcbx_set.config.params.ets_willing = willing; 1945 break; 1946 case DCB_FEATCFG_ATTR_PFC: 1947 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1948 dcbx_set.config.params.pfc.enabled = enabled; 1949 dcbx_set.config.params.pfc.willing = willing; 1950 break; 1951 case DCB_FEATCFG_ATTR_APP: 1952 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1953 dcbx_set.config.params.app_willing = willing; 1954 break; 1955 default: 1956 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1957 return 1; 1958 } 1959 1960 ptt = qed_ptt_acquire(hwfn); 1961 if (!ptt) 1962 return 1; 1963 1964 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1965 1966 qed_ptt_release(hwfn, ptt); 1967 1968 return 0; 1969 } 1970 1971 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1972 struct dcb_peer_app_info *info, 1973 u16 *app_count) 1974 { 1975 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1976 struct qed_dcbx_get *dcbx_info; 1977 1978 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1979 if (!dcbx_info) 1980 return -EINVAL; 1981 1982 info->willing = dcbx_info->remote.params.app_willing; 1983 info->error = dcbx_info->remote.params.app_error; 1984 *app_count = dcbx_info->remote.params.num_app_entries; 1985 kfree(dcbx_info); 1986 1987 return 0; 1988 } 1989 1990 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1991 struct dcb_app *table) 1992 { 1993 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1994 struct qed_dcbx_get *dcbx_info; 1995 int i; 1996 1997 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1998 if (!dcbx_info) 1999 return -EINVAL; 2000 2001 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 2002 if (dcbx_info->remote.params.app_entry[i].ethtype) 2003 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 2004 else 2005 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 2006 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 2007 table[i].protocol = 2008 dcbx_info->remote.params.app_entry[i].proto_id; 2009 } 2010 2011 kfree(dcbx_info); 2012 2013 return 0; 2014 } 2015 2016 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 2017 { 2018 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2019 struct qed_dcbx_get *dcbx_info; 2020 int i; 2021 2022 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2023 if (!dcbx_info) 2024 return -EINVAL; 2025 2026 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2027 if (dcbx_info->remote.params.pfc.prio[i]) 2028 pfc->pfc_en |= BIT(i); 2029 2030 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 2031 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 2032 pfc->pfc_en, pfc->tcs_supported); 2033 kfree(dcbx_info); 2034 2035 return 0; 2036 } 2037 2038 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 2039 { 2040 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2041 struct qed_dcbx_get *dcbx_info; 2042 int i; 2043 2044 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2045 if (!dcbx_info) 2046 return -EINVAL; 2047 2048 pg->willing = dcbx_info->remote.params.ets_willing; 2049 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 2050 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 2051 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 2052 } 2053 2054 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 2055 kfree(dcbx_info); 2056 2057 return 0; 2058 } 2059 2060 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 2061 struct ieee_pfc *pfc, bool remote) 2062 { 2063 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2064 struct qed_dcbx_params *params; 2065 struct qed_dcbx_get *dcbx_info; 2066 int rc, i; 2067 2068 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2069 if (!dcbx_info) 2070 return -EINVAL; 2071 2072 if (!dcbx_info->operational.ieee) { 2073 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2074 kfree(dcbx_info); 2075 return -EINVAL; 2076 } 2077 2078 if (remote) { 2079 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2080 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2081 QED_DCBX_REMOTE_MIB); 2082 if (rc) { 2083 kfree(dcbx_info); 2084 return -EINVAL; 2085 } 2086 2087 params = &dcbx_info->remote.params; 2088 } else { 2089 params = &dcbx_info->operational.params; 2090 } 2091 2092 pfc->pfc_cap = params->pfc.max_tc; 2093 pfc->pfc_en = 0; 2094 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2095 if (params->pfc.prio[i]) 2096 pfc->pfc_en |= BIT(i); 2097 2098 kfree(dcbx_info); 2099 2100 return 0; 2101 } 2102 2103 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2104 { 2105 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2106 } 2107 2108 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2109 { 2110 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2111 struct qed_dcbx_get *dcbx_info; 2112 struct qed_dcbx_set dcbx_set; 2113 struct qed_ptt *ptt; 2114 int rc, i; 2115 2116 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2117 if (!dcbx_info) 2118 return -EINVAL; 2119 2120 if (!dcbx_info->operational.ieee) { 2121 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2122 kfree(dcbx_info); 2123 return -EINVAL; 2124 } 2125 2126 kfree(dcbx_info); 2127 2128 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2129 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2130 if (rc) 2131 return -EINVAL; 2132 2133 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2134 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2135 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2136 2137 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap; 2138 2139 ptt = qed_ptt_acquire(hwfn); 2140 if (!ptt) 2141 return -EINVAL; 2142 2143 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2144 2145 qed_ptt_release(hwfn, ptt); 2146 2147 return rc; 2148 } 2149 2150 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2151 struct ieee_ets *ets, bool remote) 2152 { 2153 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2154 struct qed_dcbx_get *dcbx_info; 2155 struct qed_dcbx_params *params; 2156 int rc; 2157 2158 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2159 if (!dcbx_info) 2160 return -EINVAL; 2161 2162 if (!dcbx_info->operational.ieee) { 2163 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2164 kfree(dcbx_info); 2165 return -EINVAL; 2166 } 2167 2168 if (remote) { 2169 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2170 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2171 QED_DCBX_REMOTE_MIB); 2172 if (rc) { 2173 kfree(dcbx_info); 2174 return -EINVAL; 2175 } 2176 2177 params = &dcbx_info->remote.params; 2178 } else { 2179 params = &dcbx_info->operational.params; 2180 } 2181 2182 ets->ets_cap = params->max_ets_tc; 2183 ets->willing = params->ets_willing; 2184 ets->cbs = params->ets_cbs; 2185 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2186 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2187 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2188 kfree(dcbx_info); 2189 2190 return 0; 2191 } 2192 2193 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2194 { 2195 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2196 } 2197 2198 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2199 { 2200 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2201 struct qed_dcbx_get *dcbx_info; 2202 struct qed_dcbx_set dcbx_set; 2203 struct qed_ptt *ptt; 2204 int rc; 2205 2206 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2207 if (!dcbx_info) 2208 return -EINVAL; 2209 2210 if (!dcbx_info->operational.ieee) { 2211 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2212 kfree(dcbx_info); 2213 return -EINVAL; 2214 } 2215 2216 kfree(dcbx_info); 2217 2218 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2219 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2220 if (rc) 2221 return -EINVAL; 2222 2223 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2224 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2225 dcbx_set.config.params.ets_willing = ets->willing; 2226 dcbx_set.config.params.ets_cbs = ets->cbs; 2227 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2228 sizeof(ets->tc_tx_bw)); 2229 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2230 sizeof(ets->tc_tsa)); 2231 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2232 sizeof(ets->prio_tc)); 2233 2234 ptt = qed_ptt_acquire(hwfn); 2235 if (!ptt) 2236 return -EINVAL; 2237 2238 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2239 2240 qed_ptt_release(hwfn, ptt); 2241 2242 return rc; 2243 } 2244 2245 static int 2246 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2247 { 2248 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2249 } 2250 2251 static int 2252 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2253 { 2254 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2255 } 2256 2257 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee) 2258 { 2259 switch (selector) { 2260 case IEEE_8021QAZ_APP_SEL_ETHERTYPE: 2261 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 2262 break; 2263 case IEEE_8021QAZ_APP_SEL_STREAM: 2264 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 2265 break; 2266 case IEEE_8021QAZ_APP_SEL_DGRAM: 2267 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 2268 break; 2269 case IEEE_8021QAZ_APP_SEL_ANY: 2270 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 2271 break; 2272 default: 2273 return -EINVAL; 2274 } 2275 2276 return 0; 2277 } 2278 2279 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2280 { 2281 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2282 struct qed_dcbx_get *dcbx_info; 2283 struct qed_app_entry *entry; 2284 u8 prio = 0; 2285 u8 sf_ieee; 2286 int i; 2287 2288 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n", 2289 app->selector, app->protocol); 2290 2291 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2292 DP_INFO(cdev, "Invalid selector field value %d\n", 2293 app->selector); 2294 return -EINVAL; 2295 } 2296 2297 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2298 if (!dcbx_info) 2299 return -EINVAL; 2300 2301 if (!dcbx_info->operational.ieee) { 2302 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2303 kfree(dcbx_info); 2304 return -EINVAL; 2305 } 2306 2307 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2308 entry = &dcbx_info->operational.params.app_entry[i]; 2309 if ((entry->sf_ieee == sf_ieee) && 2310 (entry->proto_id == app->protocol)) { 2311 prio = entry->prio; 2312 break; 2313 } 2314 } 2315 2316 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2317 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2318 app->protocol); 2319 kfree(dcbx_info); 2320 return -EINVAL; 2321 } 2322 2323 app->priority = ffs(prio) - 1; 2324 2325 kfree(dcbx_info); 2326 2327 return 0; 2328 } 2329 2330 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2331 { 2332 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2333 struct qed_dcbx_get *dcbx_info; 2334 struct qed_dcbx_set dcbx_set; 2335 struct qed_app_entry *entry; 2336 struct qed_ptt *ptt; 2337 u8 sf_ieee; 2338 int rc, i; 2339 2340 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n", 2341 app->selector, app->protocol, app->priority); 2342 if (app->priority >= QED_MAX_PFC_PRIORITIES) { 2343 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2344 return -EINVAL; 2345 } 2346 2347 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2348 DP_INFO(cdev, "Invalid selector field value %d\n", 2349 app->selector); 2350 return -EINVAL; 2351 } 2352 2353 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2354 if (!dcbx_info) 2355 return -EINVAL; 2356 2357 if (!dcbx_info->operational.ieee) { 2358 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2359 kfree(dcbx_info); 2360 return -EINVAL; 2361 } 2362 2363 kfree(dcbx_info); 2364 2365 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2366 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2367 if (rc) 2368 return -EINVAL; 2369 2370 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2371 entry = &dcbx_set.config.params.app_entry[i]; 2372 if ((entry->sf_ieee == sf_ieee) && 2373 (entry->proto_id == app->protocol)) 2374 break; 2375 /* First empty slot */ 2376 if (!entry->proto_id) { 2377 dcbx_set.config.params.num_app_entries++; 2378 break; 2379 } 2380 } 2381 2382 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2383 DP_ERR(cdev, "App table is full\n"); 2384 return -EBUSY; 2385 } 2386 2387 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2388 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee; 2389 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2390 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2391 2392 ptt = qed_ptt_acquire(hwfn); 2393 if (!ptt) 2394 return -EBUSY; 2395 2396 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2397 2398 qed_ptt_release(hwfn, ptt); 2399 2400 return rc; 2401 } 2402 2403 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2404 .getstate = qed_dcbnl_getstate, 2405 .setstate = qed_dcbnl_setstate, 2406 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2407 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2408 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2409 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2410 .getpfccfg = qed_dcbnl_getpfccfg, 2411 .setpfccfg = qed_dcbnl_setpfccfg, 2412 .getcap = qed_dcbnl_getcap, 2413 .getnumtcs = qed_dcbnl_getnumtcs, 2414 .getpfcstate = qed_dcbnl_getpfcstate, 2415 .getdcbx = qed_dcbnl_getdcbx, 2416 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2417 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2418 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2419 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2420 .setall = qed_dcbnl_setall, 2421 .setnumtcs = qed_dcbnl_setnumtcs, 2422 .setpfcstate = qed_dcbnl_setpfcstate, 2423 .setapp = qed_dcbnl_setapp, 2424 .setdcbx = qed_dcbnl_setdcbx, 2425 .setfeatcfg = qed_dcbnl_setfeatcfg, 2426 .getfeatcfg = qed_dcbnl_getfeatcfg, 2427 .getapp = qed_dcbnl_getapp, 2428 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2429 .peer_getapptable = qed_dcbnl_peer_getapptable, 2430 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2431 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2432 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2433 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2434 .ieee_getets = qed_dcbnl_ieee_getets, 2435 .ieee_setets = qed_dcbnl_ieee_setets, 2436 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2437 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2438 .ieee_getapp = qed_dcbnl_ieee_getapp, 2439 .ieee_setapp = qed_dcbnl_ieee_setapp, 2440 }; 2441 2442 #endif 2443