1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 #include <linux/bitops.h> 36 #include <linux/dcbnl.h> 37 #include <linux/errno.h> 38 #include <linux/kernel.h> 39 #include <linux/slab.h> 40 #include <linux/string.h> 41 #include "qed.h" 42 #include "qed_cxt.h" 43 #include "qed_dcbx.h" 44 #include "qed_hsi.h" 45 #include "qed_sp.h" 46 #include "qed_sriov.h" 47 #include "qed_rdma.h" 48 #ifdef CONFIG_DCB 49 #include <linux/qed/qed_eth_if.h> 50 #endif 51 52 #define QED_DCBX_MAX_MIB_READ_TRY (100) 53 #define QED_ETH_TYPE_DEFAULT (0) 54 #define QED_ETH_TYPE_ROCE (0x8915) 55 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 56 #define QED_ETH_TYPE_FCOE (0x8906) 57 #define QED_TCP_PORT_ISCSI (0xCBC) 58 59 #define QED_DCBX_INVALID_PRIORITY 0xFF 60 61 /* Get Traffic Class from priority traffic class table, 4 bits represent 62 * the traffic class corresponding to the priority. 63 */ 64 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 65 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 66 67 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 68 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI}, 69 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE}, 70 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE}, 71 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE}, 72 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}, 73 }; 74 75 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 76 { 77 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 78 DCBX_APP_SF_ETHTYPE); 79 } 80 81 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 82 { 83 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 84 85 /* Old MFW */ 86 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 87 return qed_dcbx_app_ethtype(app_info_bitmap); 88 89 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 90 } 91 92 static bool qed_dcbx_app_port(u32 app_info_bitmap) 93 { 94 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 95 DCBX_APP_SF_PORT); 96 } 97 98 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 99 { 100 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 101 102 /* Old MFW */ 103 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 104 return qed_dcbx_app_port(app_info_bitmap); 105 106 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 107 } 108 109 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 110 { 111 bool ethtype; 112 113 if (ieee) 114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 115 else 116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 117 118 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT)); 119 } 120 121 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 122 { 123 bool port; 124 125 if (ieee) 126 port = qed_dcbx_ieee_app_port(app_info_bitmap, 127 DCBX_APP_SF_IEEE_TCP_PORT); 128 else 129 port = qed_dcbx_app_port(app_info_bitmap); 130 131 return !!(port && (proto_id == QED_TCP_PORT_ISCSI)); 132 } 133 134 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 135 { 136 bool ethtype; 137 138 if (ieee) 139 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 140 else 141 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 142 143 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE)); 144 } 145 146 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 147 { 148 bool ethtype; 149 150 if (ieee) 151 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap); 152 else 153 ethtype = qed_dcbx_app_ethtype(app_info_bitmap); 154 155 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE)); 156 } 157 158 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 159 { 160 bool port; 161 162 if (ieee) 163 port = qed_dcbx_ieee_app_port(app_info_bitmap, 164 DCBX_APP_SF_IEEE_UDP_PORT); 165 else 166 port = qed_dcbx_app_port(app_info_bitmap); 167 168 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2)); 169 } 170 171 static void 172 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 173 { 174 enum dcbx_protocol_type id; 175 int i; 176 177 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 178 p_data->dcbx_enabled); 179 180 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 181 id = qed_dcbx_app_update[i].id; 182 183 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 184 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 185 qed_dcbx_app_update[i].name, p_data->arr[id].update, 186 p_data->arr[id].enable, p_data->arr[id].priority, 187 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); 188 } 189 } 190 191 static void 192 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 193 struct qed_hw_info *p_info, 194 bool enable, 195 u8 prio, 196 u8 tc, 197 enum dcbx_protocol_type type, 198 enum qed_pci_personality personality) 199 { 200 /* PF update ramrod data */ 201 p_data->arr[type].enable = enable; 202 p_data->arr[type].priority = prio; 203 p_data->arr[type].tc = tc; 204 if (enable) 205 p_data->arr[type].update = UPDATE_DCB; 206 else 207 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP; 208 209 /* QM reconf data */ 210 if (p_info->personality == personality) 211 p_info->offload_tc = tc; 212 } 213 214 /* Update app protocol data and hw_info fields with the TLV info */ 215 static void 216 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 217 struct qed_hwfn *p_hwfn, 218 bool enable, 219 u8 prio, u8 tc, enum dcbx_protocol_type type) 220 { 221 struct qed_hw_info *p_info = &p_hwfn->hw_info; 222 enum qed_pci_personality personality; 223 enum dcbx_protocol_type id; 224 char *name; 225 int i; 226 227 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 228 id = qed_dcbx_app_update[i].id; 229 230 if (type != id) 231 continue; 232 233 personality = qed_dcbx_app_update[i].personality; 234 name = qed_dcbx_app_update[i].name; 235 236 qed_dcbx_set_params(p_data, p_info, enable, 237 prio, tc, type, personality); 238 } 239 } 240 241 static bool 242 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 243 u32 app_prio_bitmap, 244 u16 id, enum dcbx_protocol_type *type, bool ieee) 245 { 246 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) { 247 *type = DCBX_PROTOCOL_FCOE; 248 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) { 249 *type = DCBX_PROTOCOL_ROCE; 250 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) { 251 *type = DCBX_PROTOCOL_ISCSI; 252 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 253 *type = DCBX_PROTOCOL_ETH; 254 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) { 255 *type = DCBX_PROTOCOL_ROCE_V2; 256 } else { 257 *type = DCBX_MAX_PROTOCOL_TYPE; 258 DP_ERR(p_hwfn, 259 "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n", 260 id, app_prio_bitmap); 261 return false; 262 } 263 264 return true; 265 } 266 267 /* Parse app TLV's to update TC information in hw_info structure for 268 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 269 */ 270 static int 271 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 272 struct qed_dcbx_results *p_data, 273 struct dcbx_app_priority_entry *p_tbl, 274 u32 pri_tc_tbl, int count, u8 dcbx_version) 275 { 276 enum dcbx_protocol_type type; 277 bool enable, ieee, eth_tlv; 278 u8 tc, priority_map; 279 u16 protocol_id; 280 int priority; 281 int i; 282 283 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 284 285 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 286 eth_tlv = false; 287 /* Parse APP TLV */ 288 for (i = 0; i < count; i++) { 289 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 290 DCBX_APP_PROTOCOL_ID); 291 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 292 DCBX_APP_PRI_MAP); 293 priority = ffs(priority_map) - 1; 294 if (priority < 0) { 295 DP_ERR(p_hwfn, "Invalid priority\n"); 296 return -EINVAL; 297 } 298 299 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 300 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 301 protocol_id, &type, ieee)) { 302 /* ETH always have the enable bit reset, as it gets 303 * vlan information per packet. For other protocols, 304 * should be set according to the dcbx_enabled 305 * indication, but we only got here if there was an 306 * app tlv for the protocol, so dcbx must be enabled. 307 */ 308 if (type == DCBX_PROTOCOL_ETH) { 309 enable = false; 310 eth_tlv = true; 311 } else { 312 enable = true; 313 } 314 315 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 316 priority, tc, type); 317 } 318 } 319 320 /* If Eth TLV is not detected, use UFP TC as default TC */ 321 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && !eth_tlv) 322 p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc; 323 324 /* Update ramrod protocol data and hw_info fields 325 * with default info when corresponding APP TLV's are not detected. 326 * The enabled field has a different logic for ethernet as only for 327 * ethernet dcb should disabled by default, as the information arrives 328 * from the OS (unless an explicit app tlv was present). 329 */ 330 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 331 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 332 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 333 if (p_data->arr[type].update) 334 continue; 335 336 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 337 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 338 priority, tc, type); 339 } 340 341 return 0; 342 } 343 344 /* Parse app TLV's to update TC information in hw_info structure for 345 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 346 */ 347 static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 348 { 349 struct dcbx_app_priority_feature *p_app; 350 struct dcbx_app_priority_entry *p_tbl; 351 struct qed_dcbx_results data = { 0 }; 352 struct dcbx_ets_feature *p_ets; 353 struct qed_hw_info *p_info; 354 u32 pri_tc_tbl, flags; 355 u8 dcbx_version; 356 int num_entries; 357 int rc = 0; 358 359 flags = p_hwfn->p_dcbx_info->operational.flags; 360 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 361 362 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 363 p_tbl = p_app->app_pri_tbl; 364 365 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 366 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 367 368 p_info = &p_hwfn->hw_info; 369 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 370 371 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, 372 num_entries, dcbx_version); 373 if (rc) 374 return rc; 375 376 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags, 377 DCBX_ETS_MAX_TCS); 378 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC); 379 data.pf_id = p_hwfn->rel_pf_id; 380 data.dcbx_enabled = !!dcbx_version; 381 382 qed_dcbx_dp_protocol(p_hwfn, &data); 383 384 memcpy(&p_hwfn->p_dcbx_info->results, &data, 385 sizeof(struct qed_dcbx_results)); 386 387 return 0; 388 } 389 390 static int 391 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 392 struct qed_ptt *p_ptt, 393 struct qed_dcbx_mib_meta_data *p_data, 394 enum qed_mib_read_type type) 395 { 396 u32 prefix_seq_num, suffix_seq_num; 397 int read_count = 0; 398 int rc = 0; 399 400 /* The data is considered to be valid only if both sequence numbers are 401 * the same. 402 */ 403 do { 404 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 405 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 406 p_data->addr, p_data->size); 407 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 408 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 409 } else { 410 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 411 p_data->addr, p_data->size); 412 prefix_seq_num = p_data->mib->prefix_seq_num; 413 suffix_seq_num = p_data->mib->suffix_seq_num; 414 } 415 read_count++; 416 417 DP_VERBOSE(p_hwfn, 418 QED_MSG_DCB, 419 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 420 type, read_count, prefix_seq_num, suffix_seq_num); 421 } while ((prefix_seq_num != suffix_seq_num) && 422 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 423 424 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 425 DP_ERR(p_hwfn, 426 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 427 type, read_count, prefix_seq_num, suffix_seq_num); 428 rc = -EIO; 429 } 430 431 return rc; 432 } 433 434 static void 435 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn, 436 struct qed_dcbx_app_prio *p_prio, 437 struct qed_dcbx_results *p_results) 438 { 439 u8 val; 440 441 p_prio->roce = QED_DCBX_INVALID_PRIORITY; 442 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY; 443 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY; 444 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY; 445 446 if (p_results->arr[DCBX_PROTOCOL_ROCE].update && 447 p_results->arr[DCBX_PROTOCOL_ROCE].enable) 448 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; 449 450 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update && 451 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) { 452 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority; 453 p_prio->roce_v2 = val; 454 } 455 456 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update && 457 p_results->arr[DCBX_PROTOCOL_ISCSI].enable) 458 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority; 459 460 if (p_results->arr[DCBX_PROTOCOL_FCOE].update && 461 p_results->arr[DCBX_PROTOCOL_FCOE].enable) 462 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority; 463 464 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 465 p_results->arr[DCBX_PROTOCOL_ETH].enable) 466 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 467 468 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 469 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n", 470 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, 471 p_prio->eth); 472 } 473 474 static void 475 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn, 476 struct dcbx_app_priority_feature *p_app, 477 struct dcbx_app_priority_entry *p_tbl, 478 struct qed_dcbx_params *p_params, bool ieee) 479 { 480 struct qed_app_entry *entry; 481 u8 pri_map; 482 int i; 483 484 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags, 485 DCBX_APP_WILLING); 486 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED); 487 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR); 488 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags, 489 DCBX_APP_NUM_ENTRIES); 490 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 491 entry = &p_params->app_entry[i]; 492 if (ieee) { 493 u8 sf_ieee; 494 u32 val; 495 496 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry, 497 DCBX_APP_SF_IEEE); 498 switch (sf_ieee) { 499 case DCBX_APP_SF_IEEE_RESERVED: 500 /* Old MFW */ 501 val = QED_MFW_GET_FIELD(p_tbl[i].entry, 502 DCBX_APP_SF); 503 entry->sf_ieee = val ? 504 QED_DCBX_SF_IEEE_TCP_UDP_PORT : 505 QED_DCBX_SF_IEEE_ETHTYPE; 506 break; 507 case DCBX_APP_SF_IEEE_ETHTYPE: 508 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 509 break; 510 case DCBX_APP_SF_IEEE_TCP_PORT: 511 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 512 break; 513 case DCBX_APP_SF_IEEE_UDP_PORT: 514 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 515 break; 516 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 517 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 518 break; 519 } 520 } else { 521 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry, 522 DCBX_APP_SF)); 523 } 524 525 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 526 entry->prio = ffs(pri_map) - 1; 527 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 528 DCBX_APP_PROTOCOL_ID); 529 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 530 entry->proto_id, 531 &entry->proto_type, ieee); 532 } 533 534 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 535 "APP params: willing %d, valid %d error = %d\n", 536 p_params->app_willing, p_params->app_valid, 537 p_params->app_error); 538 } 539 540 static void 541 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn, 542 u32 pfc, struct qed_dcbx_params *p_params) 543 { 544 u8 pfc_map; 545 546 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); 547 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); 548 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); 549 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 550 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 551 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 552 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 553 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 554 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 555 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 556 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 557 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 558 559 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 560 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 561 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 562 p_params->pfc.enabled); 563 } 564 565 static void 566 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn, 567 struct dcbx_ets_feature *p_ets, 568 struct qed_dcbx_params *p_params) 569 { 570 u32 bw_map[2], tsa_map[2], pri_map; 571 int i; 572 573 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags, 574 DCBX_ETS_WILLING); 575 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags, 576 DCBX_ETS_ENABLED); 577 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS); 578 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags, 579 DCBX_ETS_MAX_TCS); 580 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 581 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 582 p_params->ets_willing, p_params->ets_enabled, 583 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 584 p_params->max_ets_tc); 585 586 if (p_params->ets_enabled && !p_params->max_ets_tc) { 587 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES; 588 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 589 "ETS params: max_ets_tc is forced to %d\n", 590 p_params->max_ets_tc); 591 } 592 593 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 594 * encoded in a type u32 array of size 2. 595 */ 596 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]); 597 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]); 598 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]); 599 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]); 600 pri_map = p_ets->pri_tc_tbl[0]; 601 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 602 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 603 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 604 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i); 605 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 606 "elem %d bw_tbl %x tsa_tbl %x\n", 607 i, p_params->ets_tc_bw_tbl[i], 608 p_params->ets_tc_tsa_tbl[i]); 609 } 610 } 611 612 static void 613 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn, 614 struct dcbx_app_priority_feature *p_app, 615 struct dcbx_app_priority_entry *p_tbl, 616 struct dcbx_ets_feature *p_ets, 617 u32 pfc, struct qed_dcbx_params *p_params, bool ieee) 618 { 619 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 620 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 621 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 622 } 623 624 static void 625 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 626 { 627 struct dcbx_features *p_feat; 628 629 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 630 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 631 p_feat->app.app_pri_tbl, &p_feat->ets, 632 p_feat->pfc, ¶ms->local.params, false); 633 params->local.valid = true; 634 } 635 636 static void 637 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params) 638 { 639 struct dcbx_features *p_feat; 640 641 p_feat = &p_hwfn->p_dcbx_info->remote.features; 642 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 643 p_feat->app.app_pri_tbl, &p_feat->ets, 644 p_feat->pfc, ¶ms->remote.params, false); 645 params->remote.valid = true; 646 } 647 648 static void 649 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn, 650 struct qed_dcbx_get *params) 651 { 652 struct qed_dcbx_operational_params *p_operational; 653 struct qed_dcbx_results *p_results; 654 struct dcbx_features *p_feat; 655 bool enabled, err; 656 u32 flags; 657 bool val; 658 659 flags = p_hwfn->p_dcbx_info->operational.flags; 660 661 /* If DCBx version is non zero, then negotiation 662 * was successfuly performed 663 */ 664 p_operational = ¶ms->operational; 665 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 666 DCBX_CONFIG_VERSION_DISABLED); 667 if (!enabled) { 668 p_operational->enabled = enabled; 669 p_operational->valid = false; 670 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n"); 671 return; 672 } 673 674 p_feat = &p_hwfn->p_dcbx_info->operational.features; 675 p_results = &p_hwfn->p_dcbx_info->results; 676 677 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 678 DCBX_CONFIG_VERSION_IEEE); 679 p_operational->ieee = val; 680 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 681 DCBX_CONFIG_VERSION_CEE); 682 p_operational->cee = val; 683 684 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) == 685 DCBX_CONFIG_VERSION_STATIC); 686 p_operational->local = val; 687 688 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 689 "Version support: ieee %d, cee %d, static %d\n", 690 p_operational->ieee, p_operational->cee, 691 p_operational->local); 692 693 qed_dcbx_get_common_params(p_hwfn, &p_feat->app, 694 p_feat->app.app_pri_tbl, &p_feat->ets, 695 p_feat->pfc, ¶ms->operational.params, 696 p_operational->ieee); 697 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results); 698 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 699 p_operational->err = err; 700 p_operational->enabled = enabled; 701 p_operational->valid = true; 702 } 703 704 static void 705 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn, 706 struct qed_dcbx_get *params) 707 { 708 struct lldp_config_params_s *p_local; 709 710 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 711 712 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id, 713 ARRAY_SIZE(p_local->local_chassis_id)); 714 memcpy(params->lldp_local.local_port_id, p_local->local_port_id, 715 ARRAY_SIZE(p_local->local_port_id)); 716 } 717 718 static void 719 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn, 720 struct qed_dcbx_get *params) 721 { 722 struct lldp_status_params_s *p_remote; 723 724 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 725 726 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id, 727 ARRAY_SIZE(p_remote->peer_chassis_id)); 728 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 729 ARRAY_SIZE(p_remote->peer_port_id)); 730 } 731 732 static int 733 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params, 734 enum qed_mib_read_type type) 735 { 736 switch (type) { 737 case QED_DCBX_REMOTE_MIB: 738 qed_dcbx_get_remote_params(p_hwfn, p_params); 739 break; 740 case QED_DCBX_LOCAL_MIB: 741 qed_dcbx_get_local_params(p_hwfn, p_params); 742 break; 743 case QED_DCBX_OPERATIONAL_MIB: 744 qed_dcbx_get_operational_params(p_hwfn, p_params); 745 break; 746 case QED_DCBX_REMOTE_LLDP_MIB: 747 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params); 748 break; 749 case QED_DCBX_LOCAL_LLDP_MIB: 750 qed_dcbx_get_local_lldp_params(p_hwfn, p_params); 751 break; 752 default: 753 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 754 return -EINVAL; 755 } 756 757 return 0; 758 } 759 760 static int 761 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 762 { 763 struct qed_dcbx_mib_meta_data data; 764 int rc = 0; 765 766 memset(&data, 0, sizeof(data)); 767 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 768 lldp_config_params); 769 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 770 data.size = sizeof(struct lldp_config_params_s); 771 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 772 773 return rc; 774 } 775 776 static int 777 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 778 struct qed_ptt *p_ptt, 779 enum qed_mib_read_type type) 780 { 781 struct qed_dcbx_mib_meta_data data; 782 int rc = 0; 783 784 memset(&data, 0, sizeof(data)); 785 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 786 lldp_status_params); 787 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 788 data.size = sizeof(struct lldp_status_params_s); 789 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 790 791 return rc; 792 } 793 794 static int 795 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 796 struct qed_ptt *p_ptt, 797 enum qed_mib_read_type type) 798 { 799 struct qed_dcbx_mib_meta_data data; 800 int rc = 0; 801 802 memset(&data, 0, sizeof(data)); 803 data.addr = p_hwfn->mcp_info->port_addr + 804 offsetof(struct public_port, operational_dcbx_mib); 805 data.mib = &p_hwfn->p_dcbx_info->operational; 806 data.size = sizeof(struct dcbx_mib); 807 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 808 809 return rc; 810 } 811 812 static int 813 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 814 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 815 { 816 struct qed_dcbx_mib_meta_data data; 817 int rc = 0; 818 819 memset(&data, 0, sizeof(data)); 820 data.addr = p_hwfn->mcp_info->port_addr + 821 offsetof(struct public_port, remote_dcbx_mib); 822 data.mib = &p_hwfn->p_dcbx_info->remote; 823 data.size = sizeof(struct dcbx_mib); 824 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 825 826 return rc; 827 } 828 829 static int 830 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 831 { 832 struct qed_dcbx_mib_meta_data data; 833 int rc = 0; 834 835 memset(&data, 0, sizeof(data)); 836 data.addr = p_hwfn->mcp_info->port_addr + 837 offsetof(struct public_port, local_admin_dcbx_mib); 838 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 839 data.size = sizeof(struct dcbx_local_params); 840 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 841 842 return rc; 843 } 844 845 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 846 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 847 { 848 int rc = -EINVAL; 849 850 switch (type) { 851 case QED_DCBX_OPERATIONAL_MIB: 852 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 853 break; 854 case QED_DCBX_REMOTE_MIB: 855 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 856 break; 857 case QED_DCBX_LOCAL_MIB: 858 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 859 break; 860 case QED_DCBX_REMOTE_LLDP_MIB: 861 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 862 break; 863 case QED_DCBX_LOCAL_LLDP_MIB: 864 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 865 break; 866 default: 867 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 868 } 869 870 return rc; 871 } 872 873 void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type) 874 { 875 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common; 876 void *cookie = hwfn->cdev->ops_cookie; 877 878 if (cookie && op->dcbx_aen) 879 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type); 880 } 881 882 /* Read updated MIB. 883 * Reconfigure QM and invoke PF update ramrod command if operational MIB 884 * change is detected. 885 */ 886 int 887 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 888 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 889 { 890 int rc = 0; 891 892 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 893 if (rc) 894 return rc; 895 896 if (type == QED_DCBX_OPERATIONAL_MIB) { 897 rc = qed_dcbx_process_mib_info(p_hwfn); 898 if (!rc) { 899 /* reconfigure tcs of QM queues according 900 * to negotiation results 901 */ 902 qed_qm_reconf(p_hwfn, p_ptt); 903 904 /* update storm FW with negotiation results */ 905 qed_sp_pf_update(p_hwfn); 906 907 /* for roce PFs, we may want to enable/disable DPM 908 * when DCBx change occurs 909 */ 910 if (p_hwfn->hw_info.personality == 911 QED_PCI_ETH_ROCE) 912 qed_roce_dpm_dcbx(p_hwfn, p_ptt); 913 } 914 } 915 916 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 917 918 if (type == QED_DCBX_OPERATIONAL_MIB) { 919 struct qed_dcbx_results *p_data; 920 u16 val; 921 922 /* Configure in NIG which protocols support EDPM and should 923 * honor PFC. 924 */ 925 p_data = &p_hwfn->p_dcbx_info->results; 926 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) | 927 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc); 928 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT; 929 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN; 930 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val); 931 } 932 933 qed_dcbx_aen(p_hwfn, type); 934 935 return rc; 936 } 937 938 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 939 { 940 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 941 if (!p_hwfn->p_dcbx_info) 942 return -ENOMEM; 943 944 return 0; 945 } 946 947 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn) 948 { 949 kfree(p_hwfn->p_dcbx_info); 950 p_hwfn->p_dcbx_info = NULL; 951 } 952 953 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 954 struct qed_dcbx_results *p_src, 955 enum dcbx_protocol_type type) 956 { 957 p_data->dcb_enable_flag = p_src->arr[type].enable; 958 p_data->dcb_priority = p_src->arr[type].priority; 959 p_data->dcb_tc = p_src->arr[type].tc; 960 } 961 962 /* Set pf update ramrod command params */ 963 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 964 struct pf_update_ramrod_data *p_dest) 965 { 966 struct protocol_dcb_data *p_dcb_data; 967 u8 update_flag; 968 969 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 970 p_dest->update_fcoe_dcb_data_mode = update_flag; 971 972 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 973 p_dest->update_roce_dcb_data_mode = update_flag; 974 975 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 976 p_dest->update_rroce_dcb_data_mode = update_flag; 977 978 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 979 p_dest->update_iscsi_dcb_data_mode = update_flag; 980 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 981 p_dest->update_eth_dcb_data_mode = update_flag; 982 983 p_dcb_data = &p_dest->fcoe_dcb_data; 984 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 985 p_dcb_data = &p_dest->roce_dcb_data; 986 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE); 987 p_dcb_data = &p_dest->rroce_dcb_data; 988 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2); 989 p_dcb_data = &p_dest->iscsi_dcb_data; 990 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 991 p_dcb_data = &p_dest->eth_dcb_data; 992 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 993 } 994 995 #ifdef CONFIG_DCB 996 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn, 997 struct qed_dcbx_get *p_get, 998 enum qed_mib_read_type type) 999 { 1000 struct qed_ptt *p_ptt; 1001 int rc; 1002 1003 if (IS_VF(p_hwfn->cdev)) 1004 return -EINVAL; 1005 1006 p_ptt = qed_ptt_acquire(p_hwfn); 1007 if (!p_ptt) 1008 return -EBUSY; 1009 1010 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 1011 if (rc) 1012 goto out; 1013 1014 rc = qed_dcbx_get_params(p_hwfn, p_get, type); 1015 1016 out: 1017 qed_ptt_release(p_hwfn, p_ptt); 1018 return rc; 1019 } 1020 1021 static void 1022 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn, 1023 u32 *pfc, struct qed_dcbx_params *p_params) 1024 { 1025 u8 pfc_map = 0; 1026 int i; 1027 1028 *pfc &= ~DCBX_PFC_ERROR_MASK; 1029 1030 if (p_params->pfc.willing) 1031 *pfc |= DCBX_PFC_WILLING_MASK; 1032 else 1033 *pfc &= ~DCBX_PFC_WILLING_MASK; 1034 1035 if (p_params->pfc.enabled) 1036 *pfc |= DCBX_PFC_ENABLED_MASK; 1037 else 1038 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1039 1040 *pfc &= ~DCBX_PFC_CAPS_MASK; 1041 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT; 1042 1043 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 1044 if (p_params->pfc.prio[i]) 1045 pfc_map |= BIT(i); 1046 1047 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1048 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT); 1049 1050 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc); 1051 } 1052 1053 static void 1054 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn, 1055 struct dcbx_ets_feature *p_ets, 1056 struct qed_dcbx_params *p_params) 1057 { 1058 u8 *bw_map, *tsa_map; 1059 u32 val; 1060 int i; 1061 1062 if (p_params->ets_willing) 1063 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1064 else 1065 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1066 1067 if (p_params->ets_cbs) 1068 p_ets->flags |= DCBX_ETS_CBS_MASK; 1069 else 1070 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1071 1072 if (p_params->ets_enabled) 1073 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1074 else 1075 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1076 1077 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1078 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT; 1079 1080 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1081 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1082 p_ets->pri_tc_tbl[0] = 0; 1083 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 1084 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1085 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1086 /* Copy the priority value to the corresponding 4 bits in the 1087 * traffic class table. 1088 */ 1089 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1090 p_ets->pri_tc_tbl[0] |= val; 1091 } 1092 for (i = 0; i < 2; i++) { 1093 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]); 1094 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]); 1095 } 1096 } 1097 1098 static void 1099 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn, 1100 struct dcbx_app_priority_feature *p_app, 1101 struct qed_dcbx_params *p_params, bool ieee) 1102 { 1103 u32 *entry; 1104 int i; 1105 1106 if (p_params->app_willing) 1107 p_app->flags |= DCBX_APP_WILLING_MASK; 1108 else 1109 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1110 1111 if (p_params->app_valid) 1112 p_app->flags |= DCBX_APP_ENABLED_MASK; 1113 else 1114 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1115 1116 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1117 p_app->flags |= (u32)p_params->num_app_entries << 1118 DCBX_APP_NUM_ENTRIES_SHIFT; 1119 1120 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 1121 entry = &p_app->app_pri_tbl[i].entry; 1122 *entry = 0; 1123 if (ieee) { 1124 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1125 switch (p_params->app_entry[i].sf_ieee) { 1126 case QED_DCBX_SF_IEEE_ETHTYPE: 1127 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1128 DCBX_APP_SF_IEEE_SHIFT); 1129 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1130 DCBX_APP_SF_SHIFT); 1131 break; 1132 case QED_DCBX_SF_IEEE_TCP_PORT: 1133 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1134 DCBX_APP_SF_IEEE_SHIFT); 1135 *entry |= ((u32)DCBX_APP_SF_PORT << 1136 DCBX_APP_SF_SHIFT); 1137 break; 1138 case QED_DCBX_SF_IEEE_UDP_PORT: 1139 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1140 DCBX_APP_SF_IEEE_SHIFT); 1141 *entry |= ((u32)DCBX_APP_SF_PORT << 1142 DCBX_APP_SF_SHIFT); 1143 break; 1144 case QED_DCBX_SF_IEEE_TCP_UDP_PORT: 1145 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1146 DCBX_APP_SF_IEEE_SHIFT); 1147 *entry |= ((u32)DCBX_APP_SF_PORT << 1148 DCBX_APP_SF_SHIFT); 1149 break; 1150 } 1151 } else { 1152 *entry &= ~DCBX_APP_SF_MASK; 1153 if (p_params->app_entry[i].ethtype) 1154 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1155 DCBX_APP_SF_SHIFT); 1156 else 1157 *entry |= ((u32)DCBX_APP_SF_PORT << 1158 DCBX_APP_SF_SHIFT); 1159 } 1160 1161 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1162 *entry |= ((u32)p_params->app_entry[i].proto_id << 1163 DCBX_APP_PROTOCOL_ID_SHIFT); 1164 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1165 *entry |= ((u32)(p_params->app_entry[i].prio) << 1166 DCBX_APP_PRI_MAP_SHIFT); 1167 } 1168 } 1169 1170 static void 1171 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn, 1172 struct dcbx_local_params *local_admin, 1173 struct qed_dcbx_set *params) 1174 { 1175 bool ieee = false; 1176 1177 local_admin->flags = 0; 1178 memcpy(&local_admin->features, 1179 &p_hwfn->p_dcbx_info->operational.features, 1180 sizeof(local_admin->features)); 1181 1182 if (params->enabled) { 1183 local_admin->config = params->ver_num; 1184 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1185 } else { 1186 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1187 } 1188 1189 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n", 1190 local_admin->config); 1191 1192 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG) 1193 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1194 ¶ms->config.params); 1195 1196 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG) 1197 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1198 ¶ms->config.params); 1199 1200 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG) 1201 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1202 ¶ms->config.params, ieee); 1203 } 1204 1205 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 1206 struct qed_dcbx_set *params, bool hw_commit) 1207 { 1208 struct dcbx_local_params local_admin; 1209 struct qed_dcbx_mib_meta_data data; 1210 u32 resp = 0, param = 0; 1211 int rc = 0; 1212 1213 if (!hw_commit) { 1214 memcpy(&p_hwfn->p_dcbx_info->set, params, 1215 sizeof(struct qed_dcbx_set)); 1216 return 0; 1217 } 1218 1219 /* clear set-parmas cache */ 1220 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set)); 1221 1222 memset(&local_admin, 0, sizeof(local_admin)); 1223 qed_dcbx_set_local_params(p_hwfn, &local_admin, params); 1224 1225 data.addr = p_hwfn->mcp_info->port_addr + 1226 offsetof(struct public_port, local_admin_dcbx_mib); 1227 data.local_admin = &local_admin; 1228 data.size = sizeof(struct dcbx_local_params); 1229 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1230 1231 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1232 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m); 1233 if (rc) 1234 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n"); 1235 1236 return rc; 1237 } 1238 1239 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn, 1240 struct qed_dcbx_set *params) 1241 { 1242 struct qed_dcbx_get *dcbx_info; 1243 int rc; 1244 1245 if (p_hwfn->p_dcbx_info->set.config.valid) { 1246 memcpy(params, &p_hwfn->p_dcbx_info->set, 1247 sizeof(struct qed_dcbx_set)); 1248 return 0; 1249 } 1250 1251 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL); 1252 if (!dcbx_info) 1253 return -ENOMEM; 1254 1255 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB); 1256 if (rc) { 1257 kfree(dcbx_info); 1258 return rc; 1259 } 1260 1261 p_hwfn->p_dcbx_info->set.override_flags = 0; 1262 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1263 if (dcbx_info->operational.cee) 1264 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1265 if (dcbx_info->operational.ieee) 1266 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1267 if (dcbx_info->operational.local) 1268 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1269 1270 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1271 memcpy(&p_hwfn->p_dcbx_info->set.config.params, 1272 &dcbx_info->operational.params, 1273 sizeof(struct qed_dcbx_admin_params)); 1274 p_hwfn->p_dcbx_info->set.config.valid = true; 1275 1276 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set)); 1277 1278 kfree(dcbx_info); 1279 1280 return 0; 1281 } 1282 1283 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn, 1284 enum qed_mib_read_type type) 1285 { 1286 struct qed_dcbx_get *dcbx_info; 1287 1288 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_ATOMIC); 1289 if (!dcbx_info) 1290 return NULL; 1291 1292 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) { 1293 kfree(dcbx_info); 1294 return NULL; 1295 } 1296 1297 if ((type == QED_DCBX_OPERATIONAL_MIB) && 1298 !dcbx_info->operational.enabled) { 1299 DP_INFO(hwfn, "DCBX is not enabled/operational\n"); 1300 kfree(dcbx_info); 1301 return NULL; 1302 } 1303 1304 return dcbx_info; 1305 } 1306 1307 static u8 qed_dcbnl_getstate(struct qed_dev *cdev) 1308 { 1309 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1310 struct qed_dcbx_get *dcbx_info; 1311 bool enabled; 1312 1313 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1314 if (!dcbx_info) 1315 return 0; 1316 1317 enabled = dcbx_info->operational.enabled; 1318 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled); 1319 kfree(dcbx_info); 1320 1321 return enabled; 1322 } 1323 1324 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state) 1325 { 1326 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1327 struct qed_dcbx_set dcbx_set; 1328 struct qed_ptt *ptt; 1329 int rc; 1330 1331 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state); 1332 1333 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1334 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1335 if (rc) 1336 return 1; 1337 1338 dcbx_set.enabled = !!state; 1339 1340 ptt = qed_ptt_acquire(hwfn); 1341 if (!ptt) 1342 return 1; 1343 1344 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1345 1346 qed_ptt_release(hwfn, ptt); 1347 1348 return rc ? 1 : 0; 1349 } 1350 1351 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type, 1352 u8 *pgid, u8 *bw_pct, u8 *up_map) 1353 { 1354 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1355 struct qed_dcbx_get *dcbx_info; 1356 1357 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc); 1358 *prio_type = *pgid = *bw_pct = *up_map = 0; 1359 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1360 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1361 return; 1362 } 1363 1364 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1365 if (!dcbx_info) 1366 return; 1367 1368 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc]; 1369 kfree(dcbx_info); 1370 } 1371 1372 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct) 1373 { 1374 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1375 struct qed_dcbx_get *dcbx_info; 1376 1377 *bw_pct = 0; 1378 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid); 1379 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1380 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1381 return; 1382 } 1383 1384 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1385 if (!dcbx_info) 1386 return; 1387 1388 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid]; 1389 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct); 1390 kfree(dcbx_info); 1391 } 1392 1393 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio, 1394 u8 *bwg_id, u8 *bw_pct, u8 *up_map) 1395 { 1396 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1397 *prio = *bwg_id = *bw_pct = *up_map = 0; 1398 } 1399 1400 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev, 1401 int bwg_id, u8 *bw_pct) 1402 { 1403 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1404 *bw_pct = 0; 1405 } 1406 1407 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev, 1408 int priority, u8 *setting) 1409 { 1410 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1411 struct qed_dcbx_get *dcbx_info; 1412 1413 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority); 1414 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1415 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1416 return; 1417 } 1418 1419 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1420 if (!dcbx_info) 1421 return; 1422 1423 *setting = dcbx_info->operational.params.pfc.prio[priority]; 1424 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting); 1425 kfree(dcbx_info); 1426 } 1427 1428 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting) 1429 { 1430 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1431 struct qed_dcbx_set dcbx_set; 1432 struct qed_ptt *ptt; 1433 int rc; 1434 1435 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n", 1436 priority, setting); 1437 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) { 1438 DP_INFO(hwfn, "Invalid priority %d\n", priority); 1439 return; 1440 } 1441 1442 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1443 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1444 if (rc) 1445 return; 1446 1447 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1448 dcbx_set.config.params.pfc.prio[priority] = !!setting; 1449 1450 ptt = qed_ptt_acquire(hwfn); 1451 if (!ptt) 1452 return; 1453 1454 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1455 1456 qed_ptt_release(hwfn, ptt); 1457 } 1458 1459 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap) 1460 { 1461 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1462 struct qed_dcbx_get *dcbx_info; 1463 int rc = 0; 1464 1465 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid); 1466 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1467 if (!dcbx_info) 1468 return 1; 1469 1470 switch (capid) { 1471 case DCB_CAP_ATTR_PG: 1472 case DCB_CAP_ATTR_PFC: 1473 case DCB_CAP_ATTR_UP2TC: 1474 case DCB_CAP_ATTR_GSP: 1475 *cap = true; 1476 break; 1477 case DCB_CAP_ATTR_PG_TCS: 1478 case DCB_CAP_ATTR_PFC_TCS: 1479 *cap = 0x80; 1480 break; 1481 case DCB_CAP_ATTR_DCBX: 1482 *cap = (DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE | 1483 DCB_CAP_DCBX_VER_IEEE | DCB_CAP_DCBX_STATIC); 1484 break; 1485 default: 1486 *cap = false; 1487 rc = 1; 1488 } 1489 1490 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap); 1491 kfree(dcbx_info); 1492 1493 return rc; 1494 } 1495 1496 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num) 1497 { 1498 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1499 struct qed_dcbx_get *dcbx_info; 1500 int rc = 0; 1501 1502 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid); 1503 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1504 if (!dcbx_info) 1505 return -EINVAL; 1506 1507 switch (tcid) { 1508 case DCB_NUMTCS_ATTR_PG: 1509 *num = dcbx_info->operational.params.max_ets_tc; 1510 break; 1511 case DCB_NUMTCS_ATTR_PFC: 1512 *num = dcbx_info->operational.params.pfc.max_tc; 1513 break; 1514 default: 1515 rc = -EINVAL; 1516 } 1517 1518 kfree(dcbx_info); 1519 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num); 1520 1521 return rc; 1522 } 1523 1524 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev) 1525 { 1526 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1527 struct qed_dcbx_get *dcbx_info; 1528 bool enabled; 1529 1530 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1531 if (!dcbx_info) 1532 return 0; 1533 1534 enabled = dcbx_info->operational.params.pfc.enabled; 1535 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled); 1536 kfree(dcbx_info); 1537 1538 return enabled; 1539 } 1540 1541 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev) 1542 { 1543 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1544 struct qed_dcbx_get *dcbx_info; 1545 u8 mode = 0; 1546 1547 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1548 if (!dcbx_info) 1549 return 0; 1550 1551 if (dcbx_info->operational.enabled) 1552 mode |= DCB_CAP_DCBX_LLD_MANAGED; 1553 if (dcbx_info->operational.ieee) 1554 mode |= DCB_CAP_DCBX_VER_IEEE; 1555 if (dcbx_info->operational.cee) 1556 mode |= DCB_CAP_DCBX_VER_CEE; 1557 if (dcbx_info->operational.local) 1558 mode |= DCB_CAP_DCBX_STATIC; 1559 1560 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode); 1561 kfree(dcbx_info); 1562 1563 return mode; 1564 } 1565 1566 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev, 1567 int tc, 1568 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1569 { 1570 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1571 struct qed_dcbx_set dcbx_set; 1572 struct qed_ptt *ptt; 1573 int rc; 1574 1575 DP_VERBOSE(hwfn, QED_MSG_DCB, 1576 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n", 1577 tc, pri_type, pgid, bw_pct, up_map); 1578 1579 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) { 1580 DP_INFO(hwfn, "Invalid tc %d\n", tc); 1581 return; 1582 } 1583 1584 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1585 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1586 if (rc) 1587 return; 1588 1589 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1590 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid; 1591 1592 ptt = qed_ptt_acquire(hwfn); 1593 if (!ptt) 1594 return; 1595 1596 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1597 1598 qed_ptt_release(hwfn, ptt); 1599 } 1600 1601 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio, 1602 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map) 1603 { 1604 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1605 } 1606 1607 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1608 { 1609 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1610 struct qed_dcbx_set dcbx_set; 1611 struct qed_ptt *ptt; 1612 int rc; 1613 1614 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct); 1615 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) { 1616 DP_INFO(hwfn, "Invalid pgid %d\n", pgid); 1617 return; 1618 } 1619 1620 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1621 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1622 if (rc) 1623 return; 1624 1625 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1626 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct; 1627 1628 ptt = qed_ptt_acquire(hwfn); 1629 if (!ptt) 1630 return; 1631 1632 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1633 1634 qed_ptt_release(hwfn, ptt); 1635 } 1636 1637 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct) 1638 { 1639 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n"); 1640 } 1641 1642 static u8 qed_dcbnl_setall(struct qed_dev *cdev) 1643 { 1644 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1645 struct qed_dcbx_set dcbx_set; 1646 struct qed_ptt *ptt; 1647 int rc; 1648 1649 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1650 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1651 if (rc) 1652 return 1; 1653 1654 ptt = qed_ptt_acquire(hwfn); 1655 if (!ptt) 1656 return 1; 1657 1658 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1); 1659 1660 qed_ptt_release(hwfn, ptt); 1661 1662 return rc; 1663 } 1664 1665 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num) 1666 { 1667 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1668 struct qed_dcbx_set dcbx_set; 1669 struct qed_ptt *ptt; 1670 int rc; 1671 1672 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num); 1673 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1674 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1675 if (rc) 1676 return 1; 1677 1678 switch (tcid) { 1679 case DCB_NUMTCS_ATTR_PG: 1680 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1681 dcbx_set.config.params.max_ets_tc = num; 1682 break; 1683 case DCB_NUMTCS_ATTR_PFC: 1684 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1685 dcbx_set.config.params.pfc.max_tc = num; 1686 break; 1687 default: 1688 DP_INFO(hwfn, "Invalid tcid %d\n", tcid); 1689 return -EINVAL; 1690 } 1691 1692 ptt = qed_ptt_acquire(hwfn); 1693 if (!ptt) 1694 return -EINVAL; 1695 1696 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1697 1698 qed_ptt_release(hwfn, ptt); 1699 1700 return 0; 1701 } 1702 1703 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state) 1704 { 1705 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1706 struct qed_dcbx_set dcbx_set; 1707 struct qed_ptt *ptt; 1708 int rc; 1709 1710 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state); 1711 1712 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1713 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1714 if (rc) 1715 return; 1716 1717 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1718 dcbx_set.config.params.pfc.enabled = !!state; 1719 1720 ptt = qed_ptt_acquire(hwfn); 1721 if (!ptt) 1722 return; 1723 1724 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1725 1726 qed_ptt_release(hwfn, ptt); 1727 } 1728 1729 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval) 1730 { 1731 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1732 struct qed_dcbx_get *dcbx_info; 1733 struct qed_app_entry *entry; 1734 bool ethtype; 1735 u8 prio = 0; 1736 int i; 1737 1738 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1739 if (!dcbx_info) 1740 return -EINVAL; 1741 1742 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1743 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1744 entry = &dcbx_info->operational.params.app_entry[i]; 1745 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) { 1746 prio = entry->prio; 1747 break; 1748 } 1749 } 1750 1751 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1752 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval); 1753 kfree(dcbx_info); 1754 return -EINVAL; 1755 } 1756 1757 kfree(dcbx_info); 1758 1759 return prio; 1760 } 1761 1762 static int qed_dcbnl_setapp(struct qed_dev *cdev, 1763 u8 idtype, u16 idval, u8 pri_map) 1764 { 1765 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1766 struct qed_dcbx_set dcbx_set; 1767 struct qed_app_entry *entry; 1768 struct qed_ptt *ptt; 1769 bool ethtype; 1770 int rc, i; 1771 1772 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1773 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1774 if (rc) 1775 return -EINVAL; 1776 1777 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE); 1778 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 1779 entry = &dcbx_set.config.params.app_entry[i]; 1780 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) 1781 break; 1782 /* First empty slot */ 1783 if (!entry->proto_id) { 1784 dcbx_set.config.params.num_app_entries++; 1785 break; 1786 } 1787 } 1788 1789 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 1790 DP_ERR(cdev, "App table is full\n"); 1791 return -EBUSY; 1792 } 1793 1794 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1795 dcbx_set.config.params.app_entry[i].ethtype = ethtype; 1796 dcbx_set.config.params.app_entry[i].proto_id = idval; 1797 dcbx_set.config.params.app_entry[i].prio = pri_map; 1798 1799 ptt = qed_ptt_acquire(hwfn); 1800 if (!ptt) 1801 return -EBUSY; 1802 1803 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1804 1805 qed_ptt_release(hwfn, ptt); 1806 1807 return rc; 1808 } 1809 1810 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode) 1811 { 1812 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1813 struct qed_dcbx_set dcbx_set; 1814 struct qed_ptt *ptt; 1815 int rc; 1816 1817 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode); 1818 1819 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && 1820 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) { 1821 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n"); 1822 return 1; 1823 } 1824 1825 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1826 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1827 if (rc) 1828 return 1; 1829 1830 dcbx_set.ver_num = 0; 1831 if (mode & DCB_CAP_DCBX_VER_CEE) { 1832 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1833 dcbx_set.enabled = true; 1834 } 1835 1836 if (mode & DCB_CAP_DCBX_VER_IEEE) { 1837 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1838 dcbx_set.enabled = true; 1839 } 1840 1841 if (mode & DCB_CAP_DCBX_STATIC) { 1842 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1843 dcbx_set.enabled = true; 1844 } 1845 1846 ptt = qed_ptt_acquire(hwfn); 1847 if (!ptt) 1848 return 1; 1849 1850 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1851 1852 qed_ptt_release(hwfn, ptt); 1853 1854 return rc; 1855 } 1856 1857 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags) 1858 { 1859 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1860 struct qed_dcbx_get *dcbx_info; 1861 1862 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid); 1863 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 1864 if (!dcbx_info) 1865 return 1; 1866 1867 *flags = 0; 1868 switch (featid) { 1869 case DCB_FEATCFG_ATTR_PG: 1870 if (dcbx_info->operational.params.ets_enabled) 1871 *flags = DCB_FEATCFG_ENABLE; 1872 else 1873 *flags = DCB_FEATCFG_ERROR; 1874 break; 1875 case DCB_FEATCFG_ATTR_PFC: 1876 if (dcbx_info->operational.params.pfc.enabled) 1877 *flags = DCB_FEATCFG_ENABLE; 1878 else 1879 *flags = DCB_FEATCFG_ERROR; 1880 break; 1881 case DCB_FEATCFG_ATTR_APP: 1882 if (dcbx_info->operational.params.app_valid) 1883 *flags = DCB_FEATCFG_ENABLE; 1884 else 1885 *flags = DCB_FEATCFG_ERROR; 1886 break; 1887 default: 1888 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1889 kfree(dcbx_info); 1890 return 1; 1891 } 1892 1893 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags); 1894 kfree(dcbx_info); 1895 1896 return 0; 1897 } 1898 1899 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags) 1900 { 1901 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1902 struct qed_dcbx_set dcbx_set; 1903 bool enabled, willing; 1904 struct qed_ptt *ptt; 1905 int rc; 1906 1907 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n", 1908 featid, flags); 1909 memset(&dcbx_set, 0, sizeof(dcbx_set)); 1910 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 1911 if (rc) 1912 return 1; 1913 1914 enabled = !!(flags & DCB_FEATCFG_ENABLE); 1915 willing = !!(flags & DCB_FEATCFG_WILLING); 1916 switch (featid) { 1917 case DCB_FEATCFG_ATTR_PG: 1918 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 1919 dcbx_set.config.params.ets_enabled = enabled; 1920 dcbx_set.config.params.ets_willing = willing; 1921 break; 1922 case DCB_FEATCFG_ATTR_PFC: 1923 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 1924 dcbx_set.config.params.pfc.enabled = enabled; 1925 dcbx_set.config.params.pfc.willing = willing; 1926 break; 1927 case DCB_FEATCFG_ATTR_APP: 1928 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 1929 dcbx_set.config.params.app_willing = willing; 1930 break; 1931 default: 1932 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid); 1933 return 1; 1934 } 1935 1936 ptt = qed_ptt_acquire(hwfn); 1937 if (!ptt) 1938 return 1; 1939 1940 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 1941 1942 qed_ptt_release(hwfn, ptt); 1943 1944 return 0; 1945 } 1946 1947 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev, 1948 struct dcb_peer_app_info *info, 1949 u16 *app_count) 1950 { 1951 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1952 struct qed_dcbx_get *dcbx_info; 1953 1954 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1955 if (!dcbx_info) 1956 return -EINVAL; 1957 1958 info->willing = dcbx_info->remote.params.app_willing; 1959 info->error = dcbx_info->remote.params.app_error; 1960 *app_count = dcbx_info->remote.params.num_app_entries; 1961 kfree(dcbx_info); 1962 1963 return 0; 1964 } 1965 1966 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev, 1967 struct dcb_app *table) 1968 { 1969 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1970 struct qed_dcbx_get *dcbx_info; 1971 int i; 1972 1973 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1974 if (!dcbx_info) 1975 return -EINVAL; 1976 1977 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) { 1978 if (dcbx_info->remote.params.app_entry[i].ethtype) 1979 table[i].selector = DCB_APP_IDTYPE_ETHTYPE; 1980 else 1981 table[i].selector = DCB_APP_IDTYPE_PORTNUM; 1982 table[i].priority = dcbx_info->remote.params.app_entry[i].prio; 1983 table[i].protocol = 1984 dcbx_info->remote.params.app_entry[i].proto_id; 1985 } 1986 1987 kfree(dcbx_info); 1988 1989 return 0; 1990 } 1991 1992 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc) 1993 { 1994 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 1995 struct qed_dcbx_get *dcbx_info; 1996 int i; 1997 1998 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 1999 if (!dcbx_info) 2000 return -EINVAL; 2001 2002 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2003 if (dcbx_info->remote.params.pfc.prio[i]) 2004 pfc->pfc_en |= BIT(i); 2005 2006 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc; 2007 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n", 2008 pfc->pfc_en, pfc->tcs_supported); 2009 kfree(dcbx_info); 2010 2011 return 0; 2012 } 2013 2014 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg) 2015 { 2016 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2017 struct qed_dcbx_get *dcbx_info; 2018 int i; 2019 2020 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB); 2021 if (!dcbx_info) 2022 return -EINVAL; 2023 2024 pg->willing = dcbx_info->remote.params.ets_willing; 2025 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) { 2026 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i]; 2027 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i]; 2028 } 2029 2030 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing); 2031 kfree(dcbx_info); 2032 2033 return 0; 2034 } 2035 2036 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev, 2037 struct ieee_pfc *pfc, bool remote) 2038 { 2039 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2040 struct qed_dcbx_params *params; 2041 struct qed_dcbx_get *dcbx_info; 2042 int rc, i; 2043 2044 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2045 if (!dcbx_info) 2046 return -EINVAL; 2047 2048 if (!dcbx_info->operational.ieee) { 2049 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2050 kfree(dcbx_info); 2051 return -EINVAL; 2052 } 2053 2054 if (remote) { 2055 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2056 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2057 QED_DCBX_REMOTE_MIB); 2058 if (rc) { 2059 kfree(dcbx_info); 2060 return -EINVAL; 2061 } 2062 2063 params = &dcbx_info->remote.params; 2064 } else { 2065 params = &dcbx_info->operational.params; 2066 } 2067 2068 pfc->pfc_cap = params->pfc.max_tc; 2069 pfc->pfc_en = 0; 2070 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2071 if (params->pfc.prio[i]) 2072 pfc->pfc_en |= BIT(i); 2073 2074 kfree(dcbx_info); 2075 2076 return 0; 2077 } 2078 2079 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2080 { 2081 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false); 2082 } 2083 2084 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2085 { 2086 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2087 struct qed_dcbx_get *dcbx_info; 2088 struct qed_dcbx_set dcbx_set; 2089 struct qed_ptt *ptt; 2090 int rc, i; 2091 2092 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2093 if (!dcbx_info) 2094 return -EINVAL; 2095 2096 if (!dcbx_info->operational.ieee) { 2097 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2098 kfree(dcbx_info); 2099 return -EINVAL; 2100 } 2101 2102 kfree(dcbx_info); 2103 2104 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2105 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2106 if (rc) 2107 return -EINVAL; 2108 2109 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG; 2110 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) 2111 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i)); 2112 2113 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap; 2114 2115 ptt = qed_ptt_acquire(hwfn); 2116 if (!ptt) 2117 return -EINVAL; 2118 2119 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2120 2121 qed_ptt_release(hwfn, ptt); 2122 2123 return rc; 2124 } 2125 2126 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev, 2127 struct ieee_ets *ets, bool remote) 2128 { 2129 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2130 struct qed_dcbx_get *dcbx_info; 2131 struct qed_dcbx_params *params; 2132 int rc; 2133 2134 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2135 if (!dcbx_info) 2136 return -EINVAL; 2137 2138 if (!dcbx_info->operational.ieee) { 2139 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2140 kfree(dcbx_info); 2141 return -EINVAL; 2142 } 2143 2144 if (remote) { 2145 memset(dcbx_info, 0, sizeof(*dcbx_info)); 2146 rc = qed_dcbx_query_params(hwfn, dcbx_info, 2147 QED_DCBX_REMOTE_MIB); 2148 if (rc) { 2149 kfree(dcbx_info); 2150 return -EINVAL; 2151 } 2152 2153 params = &dcbx_info->remote.params; 2154 } else { 2155 params = &dcbx_info->operational.params; 2156 } 2157 2158 ets->ets_cap = params->max_ets_tc; 2159 ets->willing = params->ets_willing; 2160 ets->cbs = params->ets_cbs; 2161 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw)); 2162 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa)); 2163 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc)); 2164 kfree(dcbx_info); 2165 2166 return 0; 2167 } 2168 2169 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2170 { 2171 return qed_dcbnl_get_ieee_ets(cdev, ets, false); 2172 } 2173 2174 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets) 2175 { 2176 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2177 struct qed_dcbx_get *dcbx_info; 2178 struct qed_dcbx_set dcbx_set; 2179 struct qed_ptt *ptt; 2180 int rc; 2181 2182 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2183 if (!dcbx_info) 2184 return -EINVAL; 2185 2186 if (!dcbx_info->operational.ieee) { 2187 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2188 kfree(dcbx_info); 2189 return -EINVAL; 2190 } 2191 2192 kfree(dcbx_info); 2193 2194 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2195 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2196 if (rc) 2197 return -EINVAL; 2198 2199 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG; 2200 dcbx_set.config.params.max_ets_tc = ets->ets_cap; 2201 dcbx_set.config.params.ets_willing = ets->willing; 2202 dcbx_set.config.params.ets_cbs = ets->cbs; 2203 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw, 2204 sizeof(ets->tc_tx_bw)); 2205 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa, 2206 sizeof(ets->tc_tsa)); 2207 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc, 2208 sizeof(ets->prio_tc)); 2209 2210 ptt = qed_ptt_acquire(hwfn); 2211 if (!ptt) 2212 return -EINVAL; 2213 2214 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2215 2216 qed_ptt_release(hwfn, ptt); 2217 2218 return rc; 2219 } 2220 2221 static int 2222 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets) 2223 { 2224 return qed_dcbnl_get_ieee_ets(cdev, ets, true); 2225 } 2226 2227 static int 2228 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc) 2229 { 2230 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true); 2231 } 2232 2233 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee) 2234 { 2235 switch (selector) { 2236 case IEEE_8021QAZ_APP_SEL_ETHERTYPE: 2237 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE; 2238 break; 2239 case IEEE_8021QAZ_APP_SEL_STREAM: 2240 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT; 2241 break; 2242 case IEEE_8021QAZ_APP_SEL_DGRAM: 2243 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT; 2244 break; 2245 case IEEE_8021QAZ_APP_SEL_ANY: 2246 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT; 2247 break; 2248 default: 2249 return -EINVAL; 2250 } 2251 2252 return 0; 2253 } 2254 2255 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app) 2256 { 2257 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2258 struct qed_dcbx_get *dcbx_info; 2259 struct qed_app_entry *entry; 2260 u8 prio = 0; 2261 u8 sf_ieee; 2262 int i; 2263 2264 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n", 2265 app->selector, app->protocol); 2266 2267 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2268 DP_INFO(cdev, "Invalid selector field value %d\n", 2269 app->selector); 2270 return -EINVAL; 2271 } 2272 2273 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2274 if (!dcbx_info) 2275 return -EINVAL; 2276 2277 if (!dcbx_info->operational.ieee) { 2278 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2279 kfree(dcbx_info); 2280 return -EINVAL; 2281 } 2282 2283 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2284 entry = &dcbx_info->operational.params.app_entry[i]; 2285 if ((entry->sf_ieee == sf_ieee) && 2286 (entry->proto_id == app->protocol)) { 2287 prio = entry->prio; 2288 break; 2289 } 2290 } 2291 2292 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2293 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector, 2294 app->protocol); 2295 kfree(dcbx_info); 2296 return -EINVAL; 2297 } 2298 2299 app->priority = ffs(prio) - 1; 2300 2301 kfree(dcbx_info); 2302 2303 return 0; 2304 } 2305 2306 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app) 2307 { 2308 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 2309 struct qed_dcbx_get *dcbx_info; 2310 struct qed_dcbx_set dcbx_set; 2311 struct qed_app_entry *entry; 2312 struct qed_ptt *ptt; 2313 u8 sf_ieee; 2314 int rc, i; 2315 2316 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n", 2317 app->selector, app->protocol, app->priority); 2318 if (app->priority >= QED_MAX_PFC_PRIORITIES) { 2319 DP_INFO(hwfn, "Invalid priority %d\n", app->priority); 2320 return -EINVAL; 2321 } 2322 2323 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) { 2324 DP_INFO(cdev, "Invalid selector field value %d\n", 2325 app->selector); 2326 return -EINVAL; 2327 } 2328 2329 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB); 2330 if (!dcbx_info) 2331 return -EINVAL; 2332 2333 if (!dcbx_info->operational.ieee) { 2334 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n"); 2335 kfree(dcbx_info); 2336 return -EINVAL; 2337 } 2338 2339 kfree(dcbx_info); 2340 2341 memset(&dcbx_set, 0, sizeof(dcbx_set)); 2342 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set); 2343 if (rc) 2344 return -EINVAL; 2345 2346 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) { 2347 entry = &dcbx_set.config.params.app_entry[i]; 2348 if ((entry->sf_ieee == sf_ieee) && 2349 (entry->proto_id == app->protocol)) 2350 break; 2351 /* First empty slot */ 2352 if (!entry->proto_id) { 2353 dcbx_set.config.params.num_app_entries++; 2354 break; 2355 } 2356 } 2357 2358 if (i == QED_DCBX_MAX_APP_PROTOCOL) { 2359 DP_ERR(cdev, "App table is full\n"); 2360 return -EBUSY; 2361 } 2362 2363 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG; 2364 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee; 2365 dcbx_set.config.params.app_entry[i].proto_id = app->protocol; 2366 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority); 2367 2368 ptt = qed_ptt_acquire(hwfn); 2369 if (!ptt) 2370 return -EBUSY; 2371 2372 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0); 2373 2374 qed_ptt_release(hwfn, ptt); 2375 2376 return rc; 2377 } 2378 2379 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = { 2380 .getstate = qed_dcbnl_getstate, 2381 .setstate = qed_dcbnl_setstate, 2382 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx, 2383 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx, 2384 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx, 2385 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx, 2386 .getpfccfg = qed_dcbnl_getpfccfg, 2387 .setpfccfg = qed_dcbnl_setpfccfg, 2388 .getcap = qed_dcbnl_getcap, 2389 .getnumtcs = qed_dcbnl_getnumtcs, 2390 .getpfcstate = qed_dcbnl_getpfcstate, 2391 .getdcbx = qed_dcbnl_getdcbx, 2392 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx, 2393 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx, 2394 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx, 2395 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx, 2396 .setall = qed_dcbnl_setall, 2397 .setnumtcs = qed_dcbnl_setnumtcs, 2398 .setpfcstate = qed_dcbnl_setpfcstate, 2399 .setapp = qed_dcbnl_setapp, 2400 .setdcbx = qed_dcbnl_setdcbx, 2401 .setfeatcfg = qed_dcbnl_setfeatcfg, 2402 .getfeatcfg = qed_dcbnl_getfeatcfg, 2403 .getapp = qed_dcbnl_getapp, 2404 .peer_getappinfo = qed_dcbnl_peer_getappinfo, 2405 .peer_getapptable = qed_dcbnl_peer_getapptable, 2406 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc, 2407 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg, 2408 .ieee_getpfc = qed_dcbnl_ieee_getpfc, 2409 .ieee_setpfc = qed_dcbnl_ieee_setpfc, 2410 .ieee_getets = qed_dcbnl_ieee_getets, 2411 .ieee_setets = qed_dcbnl_ieee_setets, 2412 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc, 2413 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets, 2414 .ieee_getapp = qed_dcbnl_ieee_getapp, 2415 .ieee_setapp = qed_dcbnl_ieee_setapp, 2416 }; 2417 2418 #endif 2419