1 /* QLogic qed NIC Driver 2 * Copyright (c) 2015 QLogic Corporation 3 * 4 * This software is available under the terms of the GNU General Public License 5 * (GPL) Version 2, available from the file COPYING in the main directory of 6 * this source tree. 7 */ 8 9 #include <linux/types.h> 10 #include <asm/byteorder.h> 11 #include <linux/bitops.h> 12 #include <linux/errno.h> 13 #include <linux/kernel.h> 14 #include <linux/slab.h> 15 #include <linux/string.h> 16 #include "qed.h" 17 #include "qed_cxt.h" 18 #include "qed_dcbx.h" 19 #include "qed_hsi.h" 20 #include "qed_sp.h" 21 22 #define QED_DCBX_MAX_MIB_READ_TRY (100) 23 #define QED_ETH_TYPE_DEFAULT (0) 24 #define QED_ETH_TYPE_ROCE (0x8915) 25 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7) 26 #define QED_ETH_TYPE_FCOE (0x8906) 27 #define QED_TCP_PORT_ISCSI (0xCBC) 28 29 #define QED_DCBX_INVALID_PRIORITY 0xFF 30 31 /* Get Traffic Class from priority traffic class table, 4 bits represent 32 * the traffic class corresponding to the priority. 33 */ 34 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 35 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 36 37 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = { 38 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_DEFAULT}, 39 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_DEFAULT}, 40 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_DEFAULT}, 41 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_DEFAULT}, 42 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH} 43 }; 44 45 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap) 46 { 47 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 48 DCBX_APP_SF_ETHTYPE); 49 } 50 51 static bool qed_dcbx_app_port(u32 app_info_bitmap) 52 { 53 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) == 54 DCBX_APP_SF_PORT); 55 } 56 57 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id) 58 { 59 return !!(qed_dcbx_app_ethtype(app_info_bitmap) && 60 proto_id == QED_ETH_TYPE_DEFAULT); 61 } 62 63 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id) 64 { 65 return !!(qed_dcbx_app_port(app_info_bitmap) && 66 proto_id == QED_TCP_PORT_ISCSI); 67 } 68 69 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id) 70 { 71 return !!(qed_dcbx_app_ethtype(app_info_bitmap) && 72 proto_id == QED_ETH_TYPE_FCOE); 73 } 74 75 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id) 76 { 77 return !!(qed_dcbx_app_ethtype(app_info_bitmap) && 78 proto_id == QED_ETH_TYPE_ROCE); 79 } 80 81 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id) 82 { 83 return !!(qed_dcbx_app_port(app_info_bitmap) && 84 proto_id == QED_UDP_PORT_TYPE_ROCE_V2); 85 } 86 87 static void 88 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) 89 { 90 enum dcbx_protocol_type id; 91 int i; 92 93 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n", 94 p_data->dcbx_enabled); 95 96 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 97 id = qed_dcbx_app_update[i].id; 98 99 DP_VERBOSE(p_hwfn, QED_MSG_DCB, 100 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n", 101 qed_dcbx_app_update[i].name, p_data->arr[id].update, 102 p_data->arr[id].enable, p_data->arr[id].priority, 103 p_data->arr[id].tc, p_hwfn->hw_info.num_tc); 104 } 105 } 106 107 static void 108 qed_dcbx_set_params(struct qed_dcbx_results *p_data, 109 struct qed_hw_info *p_info, 110 bool enable, 111 bool update, 112 u8 prio, 113 u8 tc, 114 enum dcbx_protocol_type type, 115 enum qed_pci_personality personality) 116 { 117 /* PF update ramrod data */ 118 p_data->arr[type].update = update; 119 p_data->arr[type].enable = enable; 120 p_data->arr[type].priority = prio; 121 p_data->arr[type].tc = tc; 122 123 /* QM reconf data */ 124 if (p_info->personality == personality) { 125 if (personality == QED_PCI_ETH) 126 p_info->non_offload_tc = tc; 127 else 128 p_info->offload_tc = tc; 129 } 130 } 131 132 /* Update app protocol data and hw_info fields with the TLV info */ 133 static void 134 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 135 struct qed_hwfn *p_hwfn, 136 bool enable, 137 bool update, 138 u8 prio, u8 tc, enum dcbx_protocol_type type) 139 { 140 struct qed_hw_info *p_info = &p_hwfn->hw_info; 141 enum qed_pci_personality personality; 142 enum dcbx_protocol_type id; 143 char *name; 144 int i; 145 146 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) { 147 id = qed_dcbx_app_update[i].id; 148 149 if (type != id) 150 continue; 151 152 personality = qed_dcbx_app_update[i].personality; 153 name = qed_dcbx_app_update[i].name; 154 155 qed_dcbx_set_params(p_data, p_info, enable, update, 156 prio, tc, type, personality); 157 } 158 } 159 160 static bool 161 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn, 162 u32 app_prio_bitmap, 163 u16 id, enum dcbx_protocol_type *type) 164 { 165 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id)) { 166 *type = DCBX_PROTOCOL_FCOE; 167 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id)) { 168 *type = DCBX_PROTOCOL_ROCE; 169 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id)) { 170 *type = DCBX_PROTOCOL_ISCSI; 171 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id)) { 172 *type = DCBX_PROTOCOL_ETH; 173 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id)) { 174 *type = DCBX_PROTOCOL_ROCE_V2; 175 } else { 176 *type = DCBX_MAX_PROTOCOL_TYPE; 177 DP_ERR(p_hwfn, 178 "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n", 179 id, app_prio_bitmap); 180 return false; 181 } 182 183 return true; 184 } 185 186 /* Parse app TLV's to update TC information in hw_info structure for 187 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 188 */ 189 static int 190 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 191 struct qed_dcbx_results *p_data, 192 struct dcbx_app_priority_entry *p_tbl, 193 u32 pri_tc_tbl, int count, bool dcbx_enabled) 194 { 195 u8 tc, priority, priority_map; 196 enum dcbx_protocol_type type; 197 u16 protocol_id; 198 bool enable; 199 int i; 200 201 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); 202 203 /* Parse APP TLV */ 204 for (i = 0; i < count; i++) { 205 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, 206 DCBX_APP_PROTOCOL_ID); 207 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry, 208 DCBX_APP_PRI_MAP); 209 priority = ffs(priority_map) - 1; 210 if (priority < 0) { 211 DP_ERR(p_hwfn, "Invalid priority\n"); 212 return -EINVAL; 213 } 214 215 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority); 216 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 217 protocol_id, &type)) { 218 /* ETH always have the enable bit reset, as it gets 219 * vlan information per packet. For other protocols, 220 * should be set according to the dcbx_enabled 221 * indication, but we only got here if there was an 222 * app tlv for the protocol, so dcbx must be enabled. 223 */ 224 enable = !!(type == DCBX_PROTOCOL_ETH); 225 226 qed_dcbx_update_app_info(p_data, p_hwfn, enable, true, 227 priority, tc, type); 228 } 229 } 230 231 /* If RoCE-V2 TLV is not detected, driver need to use RoCE app 232 * data for RoCE-v2 not the default app data. 233 */ 234 if (!p_data->arr[DCBX_PROTOCOL_ROCE_V2].update && 235 p_data->arr[DCBX_PROTOCOL_ROCE].update) { 236 tc = p_data->arr[DCBX_PROTOCOL_ROCE].tc; 237 priority = p_data->arr[DCBX_PROTOCOL_ROCE].priority; 238 qed_dcbx_update_app_info(p_data, p_hwfn, true, true, 239 priority, tc, DCBX_PROTOCOL_ROCE_V2); 240 } 241 242 /* Update ramrod protocol data and hw_info fields 243 * with default info when corresponding APP TLV's are not detected. 244 * The enabled field has a different logic for ethernet as only for 245 * ethernet dcb should disabled by default, as the information arrives 246 * from the OS (unless an explicit app tlv was present). 247 */ 248 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 249 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 250 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 251 if (p_data->arr[type].update) 252 continue; 253 254 enable = (type == DCBX_PROTOCOL_ETH) ? false : dcbx_enabled; 255 qed_dcbx_update_app_info(p_data, p_hwfn, enable, true, 256 priority, tc, type); 257 } 258 259 return 0; 260 } 261 262 /* Parse app TLV's to update TC information in hw_info structure for 263 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 264 */ 265 static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 266 { 267 struct dcbx_app_priority_feature *p_app; 268 struct dcbx_app_priority_entry *p_tbl; 269 struct qed_dcbx_results data = { 0 }; 270 struct dcbx_ets_feature *p_ets; 271 struct qed_hw_info *p_info; 272 u32 pri_tc_tbl, flags; 273 bool dcbx_enabled; 274 int num_entries; 275 int rc = 0; 276 277 /* If DCBx version is non zero, then negotiation was 278 * successfuly performed 279 */ 280 flags = p_hwfn->p_dcbx_info->operational.flags; 281 dcbx_enabled = !!QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION); 282 283 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 284 p_tbl = p_app->app_pri_tbl; 285 286 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 287 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 288 289 p_info = &p_hwfn->hw_info; 290 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 291 292 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, 293 num_entries, dcbx_enabled); 294 if (rc) 295 return rc; 296 297 p_info->num_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS); 298 data.pf_id = p_hwfn->rel_pf_id; 299 data.dcbx_enabled = dcbx_enabled; 300 301 qed_dcbx_dp_protocol(p_hwfn, &data); 302 303 memcpy(&p_hwfn->p_dcbx_info->results, &data, 304 sizeof(struct qed_dcbx_results)); 305 306 return 0; 307 } 308 309 static int 310 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn, 311 struct qed_ptt *p_ptt, 312 struct qed_dcbx_mib_meta_data *p_data, 313 enum qed_mib_read_type type) 314 { 315 u32 prefix_seq_num, suffix_seq_num; 316 int read_count = 0; 317 int rc = 0; 318 319 /* The data is considered to be valid only if both sequence numbers are 320 * the same. 321 */ 322 do { 323 if (type == QED_DCBX_REMOTE_LLDP_MIB) { 324 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 325 p_data->addr, p_data->size); 326 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 327 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 328 } else { 329 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib, 330 p_data->addr, p_data->size); 331 prefix_seq_num = p_data->mib->prefix_seq_num; 332 suffix_seq_num = p_data->mib->suffix_seq_num; 333 } 334 read_count++; 335 336 DP_VERBOSE(p_hwfn, 337 QED_MSG_DCB, 338 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 339 type, read_count, prefix_seq_num, suffix_seq_num); 340 } while ((prefix_seq_num != suffix_seq_num) && 341 (read_count < QED_DCBX_MAX_MIB_READ_TRY)); 342 343 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) { 344 DP_ERR(p_hwfn, 345 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n", 346 type, read_count, prefix_seq_num, suffix_seq_num); 347 rc = -EIO; 348 } 349 350 return rc; 351 } 352 353 static int 354 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 355 { 356 struct qed_dcbx_mib_meta_data data; 357 int rc = 0; 358 359 memset(&data, 0, sizeof(data)); 360 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 361 lldp_config_params); 362 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 363 data.size = sizeof(struct lldp_config_params_s); 364 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 365 366 return rc; 367 } 368 369 static int 370 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn, 371 struct qed_ptt *p_ptt, 372 enum qed_mib_read_type type) 373 { 374 struct qed_dcbx_mib_meta_data data; 375 int rc = 0; 376 377 memset(&data, 0, sizeof(data)); 378 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 379 lldp_status_params); 380 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 381 data.size = sizeof(struct lldp_status_params_s); 382 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 383 384 return rc; 385 } 386 387 static int 388 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn, 389 struct qed_ptt *p_ptt, 390 enum qed_mib_read_type type) 391 { 392 struct qed_dcbx_mib_meta_data data; 393 int rc = 0; 394 395 memset(&data, 0, sizeof(data)); 396 data.addr = p_hwfn->mcp_info->port_addr + 397 offsetof(struct public_port, operational_dcbx_mib); 398 data.mib = &p_hwfn->p_dcbx_info->operational; 399 data.size = sizeof(struct dcbx_mib); 400 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 401 402 return rc; 403 } 404 405 static int 406 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn, 407 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 408 { 409 struct qed_dcbx_mib_meta_data data; 410 int rc = 0; 411 412 memset(&data, 0, sizeof(data)); 413 data.addr = p_hwfn->mcp_info->port_addr + 414 offsetof(struct public_port, remote_dcbx_mib); 415 data.mib = &p_hwfn->p_dcbx_info->remote; 416 data.size = sizeof(struct dcbx_mib); 417 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 418 419 return rc; 420 } 421 422 static int 423 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 424 { 425 struct qed_dcbx_mib_meta_data data; 426 int rc = 0; 427 428 memset(&data, 0, sizeof(data)); 429 data.addr = p_hwfn->mcp_info->port_addr + 430 offsetof(struct public_port, local_admin_dcbx_mib); 431 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 432 data.size = sizeof(struct dcbx_local_params); 433 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size); 434 435 return rc; 436 } 437 438 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn, 439 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 440 { 441 int rc = -EINVAL; 442 443 switch (type) { 444 case QED_DCBX_OPERATIONAL_MIB: 445 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 446 break; 447 case QED_DCBX_REMOTE_MIB: 448 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 449 break; 450 case QED_DCBX_LOCAL_MIB: 451 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt); 452 break; 453 case QED_DCBX_REMOTE_LLDP_MIB: 454 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 455 break; 456 case QED_DCBX_LOCAL_LLDP_MIB: 457 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 458 break; 459 default: 460 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 461 } 462 463 return rc; 464 } 465 466 /* Read updated MIB. 467 * Reconfigure QM and invoke PF update ramrod command if operational MIB 468 * change is detected. 469 */ 470 int 471 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 472 struct qed_ptt *p_ptt, enum qed_mib_read_type type) 473 { 474 int rc = 0; 475 476 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type); 477 if (rc) 478 return rc; 479 480 if (type == QED_DCBX_OPERATIONAL_MIB) { 481 rc = qed_dcbx_process_mib_info(p_hwfn); 482 if (!rc) { 483 /* reconfigure tcs of QM queues according 484 * to negotiation results 485 */ 486 qed_qm_reconf(p_hwfn, p_ptt); 487 488 /* update storm FW with negotiation results */ 489 qed_sp_pf_update(p_hwfn); 490 } 491 } 492 493 return rc; 494 } 495 496 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn) 497 { 498 int rc = 0; 499 500 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL); 501 if (!p_hwfn->p_dcbx_info) { 502 DP_NOTICE(p_hwfn, 503 "Failed to allocate 'struct qed_dcbx_info'\n"); 504 rc = -ENOMEM; 505 } 506 507 return rc; 508 } 509 510 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn, 511 struct qed_dcbx_info *p_dcbx_info) 512 { 513 kfree(p_hwfn->p_dcbx_info); 514 } 515 516 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 517 struct qed_dcbx_results *p_src, 518 enum dcbx_protocol_type type) 519 { 520 p_data->dcb_enable_flag = p_src->arr[type].enable; 521 p_data->dcb_priority = p_src->arr[type].priority; 522 p_data->dcb_tc = p_src->arr[type].tc; 523 } 524 525 /* Set pf update ramrod command params */ 526 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src, 527 struct pf_update_ramrod_data *p_dest) 528 { 529 struct protocol_dcb_data *p_dcb_data; 530 bool update_flag = false; 531 532 p_dest->pf_id = p_src->pf_id; 533 534 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update; 535 p_dest->update_fcoe_dcb_data_flag = update_flag; 536 537 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update; 538 p_dest->update_roce_dcb_data_flag = update_flag; 539 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update; 540 p_dest->update_roce_dcb_data_flag = update_flag; 541 542 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update; 543 p_dest->update_iscsi_dcb_data_flag = update_flag; 544 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 545 p_dest->update_eth_dcb_data_flag = update_flag; 546 547 p_dcb_data = &p_dest->fcoe_dcb_data; 548 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE); 549 p_dcb_data = &p_dest->roce_dcb_data; 550 551 if (p_src->arr[DCBX_PROTOCOL_ROCE].update) 552 qed_dcbx_update_protocol_data(p_dcb_data, p_src, 553 DCBX_PROTOCOL_ROCE); 554 if (p_src->arr[DCBX_PROTOCOL_ROCE_V2].update) 555 qed_dcbx_update_protocol_data(p_dcb_data, p_src, 556 DCBX_PROTOCOL_ROCE_V2); 557 558 p_dcb_data = &p_dest->iscsi_dcb_data; 559 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI); 560 p_dcb_data = &p_dest->eth_dcb_data; 561 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 562 } 563