1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 2e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 3fe56b9e6SYuval Mintz * 4e8f1cb50SMintz, Yuval * This software is available to you under a choice of one of two 5e8f1cb50SMintz, Yuval * licenses. You may choose to be licensed under the terms of the GNU 6e8f1cb50SMintz, Yuval * General Public License (GPL) Version 2, available from the file 7e8f1cb50SMintz, Yuval * COPYING in the main directory of this source tree, or the 8e8f1cb50SMintz, Yuval * OpenIB.org BSD license below: 9e8f1cb50SMintz, Yuval * 10e8f1cb50SMintz, Yuval * Redistribution and use in source and binary forms, with or 11e8f1cb50SMintz, Yuval * without modification, are permitted provided that the following 12e8f1cb50SMintz, Yuval * conditions are met: 13e8f1cb50SMintz, Yuval * 14e8f1cb50SMintz, Yuval * - Redistributions of source code must retain the above 15e8f1cb50SMintz, Yuval * copyright notice, this list of conditions and the following 16e8f1cb50SMintz, Yuval * disclaimer. 17e8f1cb50SMintz, Yuval * 18e8f1cb50SMintz, Yuval * - Redistributions in binary form must reproduce the above 19e8f1cb50SMintz, Yuval * copyright notice, this list of conditions and the following 20e8f1cb50SMintz, Yuval * disclaimer in the documentation and /or other materials 21e8f1cb50SMintz, Yuval * provided with the distribution. 22e8f1cb50SMintz, Yuval * 23e8f1cb50SMintz, Yuval * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e8f1cb50SMintz, Yuval * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e8f1cb50SMintz, Yuval * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e8f1cb50SMintz, Yuval * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e8f1cb50SMintz, Yuval * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e8f1cb50SMintz, Yuval * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e8f1cb50SMintz, Yuval * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e8f1cb50SMintz, Yuval * SOFTWARE. 31fe56b9e6SYuval Mintz */ 32fe56b9e6SYuval Mintz 33fe56b9e6SYuval Mintz #include <linux/types.h> 34fe56b9e6SYuval Mintz #include <linux/bitops.h> 35fe56b9e6SYuval Mintz #include <linux/dma-mapping.h> 36fe56b9e6SYuval Mintz #include <linux/errno.h> 37fe56b9e6SYuval Mintz #include <linux/kernel.h> 38fe56b9e6SYuval Mintz #include <linux/list.h> 39fe56b9e6SYuval Mintz #include <linux/log2.h> 40fe56b9e6SYuval Mintz #include <linux/pci.h> 41fe56b9e6SYuval Mintz #include <linux/slab.h> 42fe56b9e6SYuval Mintz #include <linux/string.h> 43fe56b9e6SYuval Mintz #include <linux/bitops.h> 44fe56b9e6SYuval Mintz #include "qed.h" 45fe56b9e6SYuval Mintz #include "qed_cxt.h" 46fe56b9e6SYuval Mintz #include "qed_dev_api.h" 47fe56b9e6SYuval Mintz #include "qed_hsi.h" 48fe56b9e6SYuval Mintz #include "qed_hw.h" 49fe56b9e6SYuval Mintz #include "qed_init_ops.h" 50fe56b9e6SYuval Mintz #include "qed_reg_addr.h" 511408cc1fSYuval Mintz #include "qed_sriov.h" 52fe56b9e6SYuval Mintz 53fe56b9e6SYuval Mintz /* Max number of connection types in HW (DQ/CDU etc.) */ 54fe56b9e6SYuval Mintz #define MAX_CONN_TYPES PROTOCOLID_COMMON 55fe56b9e6SYuval Mintz #define NUM_TASK_TYPES 2 56fe56b9e6SYuval Mintz #define NUM_TASK_PF_SEGMENTS 4 571408cc1fSYuval Mintz #define NUM_TASK_VF_SEGMENTS 1 58fe56b9e6SYuval Mintz 59fe56b9e6SYuval Mintz /* QM constants */ 60fe56b9e6SYuval Mintz #define QM_PQ_ELEMENT_SIZE 4 /* in bytes */ 61fe56b9e6SYuval Mintz 62fe56b9e6SYuval Mintz /* Doorbell-Queue constants */ 63fe56b9e6SYuval Mintz #define DQ_RANGE_SHIFT 4 64fe56b9e6SYuval Mintz #define DQ_RANGE_ALIGN BIT(DQ_RANGE_SHIFT) 65fe56b9e6SYuval Mintz 66dbb799c3SYuval Mintz /* Searcher constants */ 67dbb799c3SYuval Mintz #define SRC_MIN_NUM_ELEMS 256 68dbb799c3SYuval Mintz 69dbb799c3SYuval Mintz /* Timers constants */ 70dbb799c3SYuval Mintz #define TM_SHIFT 7 71dbb799c3SYuval Mintz #define TM_ALIGN BIT(TM_SHIFT) 72dbb799c3SYuval Mintz #define TM_ELEM_SIZE 4 73dbb799c3SYuval Mintz 74be086e7cSMintz, Yuval #define ILT_DEFAULT_HW_P_SIZE 4 7551ff1725SRam Amrani 76fe56b9e6SYuval Mintz #define ILT_PAGE_IN_BYTES(hw_p_size) (1U << ((hw_p_size) + 12)) 77fe56b9e6SYuval Mintz #define ILT_CFG_REG(cli, reg) PSWRQ2_REG_ ## cli ## _ ## reg ## _RT_OFFSET 78fe56b9e6SYuval Mintz 79fe56b9e6SYuval Mintz /* ILT entry structure */ 80fe56b9e6SYuval Mintz #define ILT_ENTRY_PHY_ADDR_MASK 0x000FFFFFFFFFFFULL 81fe56b9e6SYuval Mintz #define ILT_ENTRY_PHY_ADDR_SHIFT 0 82fe56b9e6SYuval Mintz #define ILT_ENTRY_VALID_MASK 0x1ULL 83fe56b9e6SYuval Mintz #define ILT_ENTRY_VALID_SHIFT 52 84fe56b9e6SYuval Mintz #define ILT_ENTRY_IN_REGS 2 85fe56b9e6SYuval Mintz #define ILT_REG_SIZE_IN_BYTES 4 86fe56b9e6SYuval Mintz 87fe56b9e6SYuval Mintz /* connection context union */ 88fe56b9e6SYuval Mintz union conn_context { 89fe56b9e6SYuval Mintz struct core_conn_context core_ctx; 90fe56b9e6SYuval Mintz struct eth_conn_context eth_ctx; 91dbb799c3SYuval Mintz struct iscsi_conn_context iscsi_ctx; 921e128c81SArun Easi struct fcoe_conn_context fcoe_ctx; 93dbb799c3SYuval Mintz struct roce_conn_context roce_ctx; 94fe56b9e6SYuval Mintz }; 95fe56b9e6SYuval Mintz 961e128c81SArun Easi /* TYPE-0 task context - iSCSI, FCOE */ 97dbb799c3SYuval Mintz union type0_task_context { 98dbb799c3SYuval Mintz struct iscsi_task_context iscsi_ctx; 991e128c81SArun Easi struct fcoe_task_context fcoe_ctx; 100dbb799c3SYuval Mintz }; 101dbb799c3SYuval Mintz 102dbb799c3SYuval Mintz /* TYPE-1 task context - ROCE */ 103dbb799c3SYuval Mintz union type1_task_context { 104dbb799c3SYuval Mintz struct rdma_task_context roce_ctx; 105dbb799c3SYuval Mintz }; 106dbb799c3SYuval Mintz 107dbb799c3SYuval Mintz struct src_ent { 108dbb799c3SYuval Mintz u8 opaque[56]; 109dbb799c3SYuval Mintz u64 next; 110dbb799c3SYuval Mintz }; 111dbb799c3SYuval Mintz 112dbb799c3SYuval Mintz #define CDUT_SEG_ALIGNMET 3 /* in 4k chunks */ 113dbb799c3SYuval Mintz #define CDUT_SEG_ALIGNMET_IN_BYTES (1 << (CDUT_SEG_ALIGNMET + 12)) 114dbb799c3SYuval Mintz 115fe56b9e6SYuval Mintz #define CONN_CXT_SIZE(p_hwfn) \ 116fe56b9e6SYuval Mintz ALIGNED_TYPE_SIZE(union conn_context, p_hwfn) 117fe56b9e6SYuval Mintz 118dbb799c3SYuval Mintz #define SRQ_CXT_SIZE (sizeof(struct rdma_srq_context)) 119dbb799c3SYuval Mintz 120dbb799c3SYuval Mintz #define TYPE0_TASK_CXT_SIZE(p_hwfn) \ 121dbb799c3SYuval Mintz ALIGNED_TYPE_SIZE(union type0_task_context, p_hwfn) 122dbb799c3SYuval Mintz 123dbb799c3SYuval Mintz /* Alignment is inherent to the type1_task_context structure */ 124dbb799c3SYuval Mintz #define TYPE1_TASK_CXT_SIZE(p_hwfn) sizeof(union type1_task_context) 125dbb799c3SYuval Mintz 126fe56b9e6SYuval Mintz /* PF per protocl configuration object */ 127dbb799c3SYuval Mintz #define TASK_SEGMENTS (NUM_TASK_PF_SEGMENTS + NUM_TASK_VF_SEGMENTS) 128dbb799c3SYuval Mintz #define TASK_SEGMENT_VF (NUM_TASK_PF_SEGMENTS) 129dbb799c3SYuval Mintz 130dbb799c3SYuval Mintz struct qed_tid_seg { 131dbb799c3SYuval Mintz u32 count; 132dbb799c3SYuval Mintz u8 type; 133dbb799c3SYuval Mintz bool has_fl_mem; 134dbb799c3SYuval Mintz }; 135dbb799c3SYuval Mintz 136fe56b9e6SYuval Mintz struct qed_conn_type_cfg { 137fe56b9e6SYuval Mintz u32 cid_count; 138fe56b9e6SYuval Mintz u32 cid_start; 1391408cc1fSYuval Mintz u32 cids_per_vf; 140dbb799c3SYuval Mintz struct qed_tid_seg tid_seg[TASK_SEGMENTS]; 141fe56b9e6SYuval Mintz }; 142fe56b9e6SYuval Mintz 143fe56b9e6SYuval Mintz /* ILT Client configuration, Per connection type (protocol) resources. */ 144fe56b9e6SYuval Mintz #define ILT_CLI_PF_BLOCKS (1 + NUM_TASK_PF_SEGMENTS * 2) 1451408cc1fSYuval Mintz #define ILT_CLI_VF_BLOCKS (1 + NUM_TASK_VF_SEGMENTS * 2) 146fe56b9e6SYuval Mintz #define CDUC_BLK (0) 147dbb799c3SYuval Mintz #define SRQ_BLK (0) 148dbb799c3SYuval Mintz #define CDUT_SEG_BLK(n) (1 + (u8)(n)) 149dbb799c3SYuval Mintz #define CDUT_FL_SEG_BLK(n, X) (1 + (n) + NUM_TASK_ ## X ## _SEGMENTS) 150fe56b9e6SYuval Mintz 151fe56b9e6SYuval Mintz enum ilt_clients { 152fe56b9e6SYuval Mintz ILT_CLI_CDUC, 153dbb799c3SYuval Mintz ILT_CLI_CDUT, 154fe56b9e6SYuval Mintz ILT_CLI_QM, 155dbb799c3SYuval Mintz ILT_CLI_TM, 156dbb799c3SYuval Mintz ILT_CLI_SRC, 157dbb799c3SYuval Mintz ILT_CLI_TSDM, 158fe56b9e6SYuval Mintz ILT_CLI_MAX 159fe56b9e6SYuval Mintz }; 160fe56b9e6SYuval Mintz 161fe56b9e6SYuval Mintz struct ilt_cfg_pair { 162fe56b9e6SYuval Mintz u32 reg; 163fe56b9e6SYuval Mintz u32 val; 164fe56b9e6SYuval Mintz }; 165fe56b9e6SYuval Mintz 166fe56b9e6SYuval Mintz struct qed_ilt_cli_blk { 167fe56b9e6SYuval Mintz u32 total_size; /* 0 means not active */ 168fe56b9e6SYuval Mintz u32 real_size_in_page; 169fe56b9e6SYuval Mintz u32 start_line; 170dbb799c3SYuval Mintz u32 dynamic_line_cnt; 171fe56b9e6SYuval Mintz }; 172fe56b9e6SYuval Mintz 173fe56b9e6SYuval Mintz struct qed_ilt_client_cfg { 174fe56b9e6SYuval Mintz bool active; 175fe56b9e6SYuval Mintz 176fe56b9e6SYuval Mintz /* ILT boundaries */ 177fe56b9e6SYuval Mintz struct ilt_cfg_pair first; 178fe56b9e6SYuval Mintz struct ilt_cfg_pair last; 179fe56b9e6SYuval Mintz struct ilt_cfg_pair p_size; 180fe56b9e6SYuval Mintz 181fe56b9e6SYuval Mintz /* ILT client blocks for PF */ 182fe56b9e6SYuval Mintz struct qed_ilt_cli_blk pf_blks[ILT_CLI_PF_BLOCKS]; 183fe56b9e6SYuval Mintz u32 pf_total_lines; 1841408cc1fSYuval Mintz 1851408cc1fSYuval Mintz /* ILT client blocks for VFs */ 1861408cc1fSYuval Mintz struct qed_ilt_cli_blk vf_blks[ILT_CLI_VF_BLOCKS]; 1871408cc1fSYuval Mintz u32 vf_total_lines; 188fe56b9e6SYuval Mintz }; 189fe56b9e6SYuval Mintz 190fe56b9e6SYuval Mintz /* Per Path - 191fe56b9e6SYuval Mintz * ILT shadow table 192fe56b9e6SYuval Mintz * Protocol acquired CID lists 193fe56b9e6SYuval Mintz * PF start line in ILT 194fe56b9e6SYuval Mintz */ 195fe56b9e6SYuval Mintz struct qed_dma_mem { 196fe56b9e6SYuval Mintz dma_addr_t p_phys; 197fe56b9e6SYuval Mintz void *p_virt; 198fe56b9e6SYuval Mintz size_t size; 199fe56b9e6SYuval Mintz }; 200fe56b9e6SYuval Mintz 201fe56b9e6SYuval Mintz struct qed_cid_acquired_map { 202fe56b9e6SYuval Mintz u32 start_cid; 203fe56b9e6SYuval Mintz u32 max_count; 204fe56b9e6SYuval Mintz unsigned long *cid_map; 205fe56b9e6SYuval Mintz }; 206fe56b9e6SYuval Mintz 207fe56b9e6SYuval Mintz struct qed_cxt_mngr { 208fe56b9e6SYuval Mintz /* Per protocl configuration */ 209fe56b9e6SYuval Mintz struct qed_conn_type_cfg conn_cfg[MAX_CONN_TYPES]; 210fe56b9e6SYuval Mintz 211fe56b9e6SYuval Mintz /* computed ILT structure */ 212fe56b9e6SYuval Mintz struct qed_ilt_client_cfg clients[ILT_CLI_MAX]; 213fe56b9e6SYuval Mintz 214dbb799c3SYuval Mintz /* Task type sizes */ 215dbb799c3SYuval Mintz u32 task_type_size[NUM_TASK_TYPES]; 216dbb799c3SYuval Mintz 2171408cc1fSYuval Mintz /* total number of VFs for this hwfn - 2181408cc1fSYuval Mintz * ALL VFs are symmetric in terms of HW resources 2191408cc1fSYuval Mintz */ 2201408cc1fSYuval Mintz u32 vf_count; 2211408cc1fSYuval Mintz 222fe56b9e6SYuval Mintz /* Acquired CIDs */ 223fe56b9e6SYuval Mintz struct qed_cid_acquired_map acquired[MAX_CONN_TYPES]; 224fe56b9e6SYuval Mintz 225fe56b9e6SYuval Mintz /* ILT shadow table */ 226fe56b9e6SYuval Mintz struct qed_dma_mem *ilt_shadow; 227fe56b9e6SYuval Mintz u32 pf_start_line; 228dbb799c3SYuval Mintz 229dbb799c3SYuval Mintz /* Mutex for a dynamic ILT allocation */ 230dbb799c3SYuval Mintz struct mutex mutex; 231dbb799c3SYuval Mintz 232dbb799c3SYuval Mintz /* SRC T2 */ 233dbb799c3SYuval Mintz struct qed_dma_mem *t2; 234dbb799c3SYuval Mintz u32 t2_num_pages; 235dbb799c3SYuval Mintz u64 first_free; 236dbb799c3SYuval Mintz u64 last_free; 237d51e4af5SChopra, Manish 238d51e4af5SChopra, Manish /* total number of SRQ's for this hwfn */ 239d51e4af5SChopra, Manish u32 srq_count; 240d51e4af5SChopra, Manish 241d51e4af5SChopra, Manish /* Maximal number of L2 steering filters */ 242d51e4af5SChopra, Manish u32 arfs_count; 243fe56b9e6SYuval Mintz }; 244dbb799c3SYuval Mintz static bool src_proto(enum protocol_type type) 245dbb799c3SYuval Mintz { 246dbb799c3SYuval Mintz return type == PROTOCOLID_ISCSI || 2475f8cb033SMintz, Yuval type == PROTOCOLID_FCOE; 248dbb799c3SYuval Mintz } 249dbb799c3SYuval Mintz 250dbb799c3SYuval Mintz static bool tm_cid_proto(enum protocol_type type) 251dbb799c3SYuval Mintz { 252dbb799c3SYuval Mintz return type == PROTOCOLID_ISCSI || 2531e128c81SArun Easi type == PROTOCOLID_FCOE || 254dbb799c3SYuval Mintz type == PROTOCOLID_ROCE; 255dbb799c3SYuval Mintz } 256fe56b9e6SYuval Mintz 2571e128c81SArun Easi static bool tm_tid_proto(enum protocol_type type) 2581e128c81SArun Easi { 2591e128c81SArun Easi return type == PROTOCOLID_FCOE; 2601e128c81SArun Easi } 2611e128c81SArun Easi 2621408cc1fSYuval Mintz /* counts the iids for the CDU/CDUC ILT client configuration */ 2631408cc1fSYuval Mintz struct qed_cdu_iids { 2641408cc1fSYuval Mintz u32 pf_cids; 2651408cc1fSYuval Mintz u32 per_vf_cids; 2661408cc1fSYuval Mintz }; 2671408cc1fSYuval Mintz 2681408cc1fSYuval Mintz static void qed_cxt_cdu_iids(struct qed_cxt_mngr *p_mngr, 2691408cc1fSYuval Mintz struct qed_cdu_iids *iids) 270fe56b9e6SYuval Mintz { 2711408cc1fSYuval Mintz u32 type; 272fe56b9e6SYuval Mintz 2731408cc1fSYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) { 2741408cc1fSYuval Mintz iids->pf_cids += p_mngr->conn_cfg[type].cid_count; 2751408cc1fSYuval Mintz iids->per_vf_cids += p_mngr->conn_cfg[type].cids_per_vf; 2761408cc1fSYuval Mintz } 277fe56b9e6SYuval Mintz } 278fe56b9e6SYuval Mintz 279dbb799c3SYuval Mintz /* counts the iids for the Searcher block configuration */ 280dbb799c3SYuval Mintz struct qed_src_iids { 281dbb799c3SYuval Mintz u32 pf_cids; 282dbb799c3SYuval Mintz u32 per_vf_cids; 283dbb799c3SYuval Mintz }; 284dbb799c3SYuval Mintz 285dbb799c3SYuval Mintz static void qed_cxt_src_iids(struct qed_cxt_mngr *p_mngr, 286dbb799c3SYuval Mintz struct qed_src_iids *iids) 287dbb799c3SYuval Mintz { 288dbb799c3SYuval Mintz u32 i; 289dbb799c3SYuval Mintz 290dbb799c3SYuval Mintz for (i = 0; i < MAX_CONN_TYPES; i++) { 291dbb799c3SYuval Mintz if (!src_proto(i)) 292dbb799c3SYuval Mintz continue; 293dbb799c3SYuval Mintz 294dbb799c3SYuval Mintz iids->pf_cids += p_mngr->conn_cfg[i].cid_count; 295dbb799c3SYuval Mintz iids->per_vf_cids += p_mngr->conn_cfg[i].cids_per_vf; 296dbb799c3SYuval Mintz } 297d51e4af5SChopra, Manish 298d51e4af5SChopra, Manish /* Add L2 filtering filters in addition */ 299d51e4af5SChopra, Manish iids->pf_cids += p_mngr->arfs_count; 300dbb799c3SYuval Mintz } 301dbb799c3SYuval Mintz 302dbb799c3SYuval Mintz /* counts the iids for the Timers block configuration */ 303dbb799c3SYuval Mintz struct qed_tm_iids { 304dbb799c3SYuval Mintz u32 pf_cids; 305dbb799c3SYuval Mintz u32 pf_tids[NUM_TASK_PF_SEGMENTS]; /* per segment */ 306dbb799c3SYuval Mintz u32 pf_tids_total; 307dbb799c3SYuval Mintz u32 per_vf_cids; 308dbb799c3SYuval Mintz u32 per_vf_tids; 309dbb799c3SYuval Mintz }; 310dbb799c3SYuval Mintz 31144531ba4SMichal Kalderon static void qed_cxt_tm_iids(struct qed_hwfn *p_hwfn, 31244531ba4SMichal Kalderon struct qed_cxt_mngr *p_mngr, 313dbb799c3SYuval Mintz struct qed_tm_iids *iids) 314dbb799c3SYuval Mintz { 31544531ba4SMichal Kalderon bool tm_vf_required = false; 31644531ba4SMichal Kalderon bool tm_required = false; 31744531ba4SMichal Kalderon int i, j; 318dbb799c3SYuval Mintz 31944531ba4SMichal Kalderon /* Timers is a special case -> we don't count how many cids require 32044531ba4SMichal Kalderon * timers but what's the max cid that will be used by the timer block. 32144531ba4SMichal Kalderon * therefore we traverse in reverse order, and once we hit a protocol 32244531ba4SMichal Kalderon * that requires the timers memory, we'll sum all the protocols up 32344531ba4SMichal Kalderon * to that one. 32444531ba4SMichal Kalderon */ 32544531ba4SMichal Kalderon for (i = MAX_CONN_TYPES - 1; i >= 0; i--) { 326dbb799c3SYuval Mintz struct qed_conn_type_cfg *p_cfg = &p_mngr->conn_cfg[i]; 327dbb799c3SYuval Mintz 32844531ba4SMichal Kalderon if (tm_cid_proto(i) || tm_required) { 32944531ba4SMichal Kalderon if (p_cfg->cid_count) 33044531ba4SMichal Kalderon tm_required = true; 33144531ba4SMichal Kalderon 332dbb799c3SYuval Mintz iids->pf_cids += p_cfg->cid_count; 33344531ba4SMichal Kalderon } 33444531ba4SMichal Kalderon 33544531ba4SMichal Kalderon if (tm_cid_proto(i) || tm_vf_required) { 33644531ba4SMichal Kalderon if (p_cfg->cids_per_vf) 33744531ba4SMichal Kalderon tm_vf_required = true; 33844531ba4SMichal Kalderon 339dbb799c3SYuval Mintz iids->per_vf_cids += p_cfg->cids_per_vf; 340dbb799c3SYuval Mintz } 3411e128c81SArun Easi 3421e128c81SArun Easi if (tm_tid_proto(i)) { 3431e128c81SArun Easi struct qed_tid_seg *segs = p_cfg->tid_seg; 3441e128c81SArun Easi 3451e128c81SArun Easi /* for each segment there is at most one 3461e128c81SArun Easi * protocol for which count is not 0. 3471e128c81SArun Easi */ 3481e128c81SArun Easi for (j = 0; j < NUM_TASK_PF_SEGMENTS; j++) 3491e128c81SArun Easi iids->pf_tids[j] += segs[j].count; 3501e128c81SArun Easi 3511e128c81SArun Easi /* The last array elelment is for the VFs. As for PF 3521e128c81SArun Easi * segments there can be only one protocol for 3531e128c81SArun Easi * which this value is not 0. 3541e128c81SArun Easi */ 3551e128c81SArun Easi iids->per_vf_tids += segs[NUM_TASK_PF_SEGMENTS].count; 3561e128c81SArun Easi } 357dbb799c3SYuval Mintz } 358dbb799c3SYuval Mintz 359dbb799c3SYuval Mintz iids->pf_cids = roundup(iids->pf_cids, TM_ALIGN); 360dbb799c3SYuval Mintz iids->per_vf_cids = roundup(iids->per_vf_cids, TM_ALIGN); 361dbb799c3SYuval Mintz iids->per_vf_tids = roundup(iids->per_vf_tids, TM_ALIGN); 362dbb799c3SYuval Mintz 363dbb799c3SYuval Mintz for (iids->pf_tids_total = 0, j = 0; j < NUM_TASK_PF_SEGMENTS; j++) { 364dbb799c3SYuval Mintz iids->pf_tids[j] = roundup(iids->pf_tids[j], TM_ALIGN); 365dbb799c3SYuval Mintz iids->pf_tids_total += iids->pf_tids[j]; 366dbb799c3SYuval Mintz } 367dbb799c3SYuval Mintz } 368dbb799c3SYuval Mintz 369fe56b9e6SYuval Mintz static void qed_cxt_qm_iids(struct qed_hwfn *p_hwfn, 370fe56b9e6SYuval Mintz struct qed_qm_iids *iids) 371fe56b9e6SYuval Mintz { 372fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 373dbb799c3SYuval Mintz struct qed_tid_seg *segs; 374dbb799c3SYuval Mintz u32 vf_cids = 0, type, j; 375dbb799c3SYuval Mintz u32 vf_tids = 0; 376fe56b9e6SYuval Mintz 3771408cc1fSYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) { 378fe56b9e6SYuval Mintz iids->cids += p_mngr->conn_cfg[type].cid_count; 3791408cc1fSYuval Mintz vf_cids += p_mngr->conn_cfg[type].cids_per_vf; 380dbb799c3SYuval Mintz 381dbb799c3SYuval Mintz segs = p_mngr->conn_cfg[type].tid_seg; 382dbb799c3SYuval Mintz /* for each segment there is at most one 383dbb799c3SYuval Mintz * protocol for which count is not 0. 384dbb799c3SYuval Mintz */ 385dbb799c3SYuval Mintz for (j = 0; j < NUM_TASK_PF_SEGMENTS; j++) 386dbb799c3SYuval Mintz iids->tids += segs[j].count; 387dbb799c3SYuval Mintz 388dbb799c3SYuval Mintz /* The last array elelment is for the VFs. As for PF 389dbb799c3SYuval Mintz * segments there can be only one protocol for 390dbb799c3SYuval Mintz * which this value is not 0. 391dbb799c3SYuval Mintz */ 392dbb799c3SYuval Mintz vf_tids += segs[NUM_TASK_PF_SEGMENTS].count; 3931408cc1fSYuval Mintz } 394fe56b9e6SYuval Mintz 3951408cc1fSYuval Mintz iids->vf_cids += vf_cids * p_mngr->vf_count; 396dbb799c3SYuval Mintz iids->tids += vf_tids * p_mngr->vf_count; 397dbb799c3SYuval Mintz 3981408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 399dbb799c3SYuval Mintz "iids: CIDS %08x vf_cids %08x tids %08x vf_tids %08x\n", 400dbb799c3SYuval Mintz iids->cids, iids->vf_cids, iids->tids, vf_tids); 401dbb799c3SYuval Mintz } 402dbb799c3SYuval Mintz 403dbb799c3SYuval Mintz static struct qed_tid_seg *qed_cxt_tid_seg_info(struct qed_hwfn *p_hwfn, 404dbb799c3SYuval Mintz u32 seg) 405dbb799c3SYuval Mintz { 406dbb799c3SYuval Mintz struct qed_cxt_mngr *p_cfg = p_hwfn->p_cxt_mngr; 407dbb799c3SYuval Mintz u32 i; 408dbb799c3SYuval Mintz 409dbb799c3SYuval Mintz /* Find the protocol with tid count > 0 for this segment. 410dbb799c3SYuval Mintz * Note: there can only be one and this is already validated. 411dbb799c3SYuval Mintz */ 412dbb799c3SYuval Mintz for (i = 0; i < MAX_CONN_TYPES; i++) 413dbb799c3SYuval Mintz if (p_cfg->conn_cfg[i].tid_seg[seg].count) 414dbb799c3SYuval Mintz return &p_cfg->conn_cfg[i].tid_seg[seg]; 415dbb799c3SYuval Mintz return NULL; 416dbb799c3SYuval Mintz } 417dbb799c3SYuval Mintz 4188c93beafSYuval Mintz static void qed_cxt_set_srq_count(struct qed_hwfn *p_hwfn, u32 num_srqs) 419dbb799c3SYuval Mintz { 420dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr; 421dbb799c3SYuval Mintz 422dbb799c3SYuval Mintz p_mgr->srq_count = num_srqs; 423dbb799c3SYuval Mintz } 424dbb799c3SYuval Mintz 4258c93beafSYuval Mintz static u32 qed_cxt_get_srq_count(struct qed_hwfn *p_hwfn) 426dbb799c3SYuval Mintz { 427dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr; 428dbb799c3SYuval Mintz 429dbb799c3SYuval Mintz return p_mgr->srq_count; 430fe56b9e6SYuval Mintz } 431fe56b9e6SYuval Mintz 432fe56b9e6SYuval Mintz /* set the iids count per protocol */ 433fe56b9e6SYuval Mintz static void qed_cxt_set_proto_cid_count(struct qed_hwfn *p_hwfn, 434fe56b9e6SYuval Mintz enum protocol_type type, 4351408cc1fSYuval Mintz u32 cid_count, u32 vf_cid_cnt) 436fe56b9e6SYuval Mintz { 437fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr; 438fe56b9e6SYuval Mintz struct qed_conn_type_cfg *p_conn = &p_mgr->conn_cfg[type]; 439fe56b9e6SYuval Mintz 440fe56b9e6SYuval Mintz p_conn->cid_count = roundup(cid_count, DQ_RANGE_ALIGN); 4411408cc1fSYuval Mintz p_conn->cids_per_vf = roundup(vf_cid_cnt, DQ_RANGE_ALIGN); 442dbb799c3SYuval Mintz 443dbb799c3SYuval Mintz if (type == PROTOCOLID_ROCE) { 444dbb799c3SYuval Mintz u32 page_sz = p_mgr->clients[ILT_CLI_CDUC].p_size.val; 445dbb799c3SYuval Mintz u32 cxt_size = CONN_CXT_SIZE(p_hwfn); 446dbb799c3SYuval Mintz u32 elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size; 447f3e48119SRam Amrani u32 align = elems_per_page * DQ_RANGE_ALIGN; 448dbb799c3SYuval Mintz 449f3e48119SRam Amrani p_conn->cid_count = roundup(p_conn->cid_count, align); 450dbb799c3SYuval Mintz } 4511408cc1fSYuval Mintz } 4521408cc1fSYuval Mintz 4531408cc1fSYuval Mintz u32 qed_cxt_get_proto_cid_count(struct qed_hwfn *p_hwfn, 4541a635e48SYuval Mintz enum protocol_type type, u32 *vf_cid) 4551408cc1fSYuval Mintz { 4561408cc1fSYuval Mintz if (vf_cid) 4571408cc1fSYuval Mintz *vf_cid = p_hwfn->p_cxt_mngr->conn_cfg[type].cids_per_vf; 4581408cc1fSYuval Mintz 4591408cc1fSYuval Mintz return p_hwfn->p_cxt_mngr->conn_cfg[type].cid_count; 460fe56b9e6SYuval Mintz } 461fe56b9e6SYuval Mintz 462dbb799c3SYuval Mintz u32 qed_cxt_get_proto_cid_start(struct qed_hwfn *p_hwfn, 463dbb799c3SYuval Mintz enum protocol_type type) 464dbb799c3SYuval Mintz { 465dbb799c3SYuval Mintz return p_hwfn->p_cxt_mngr->acquired[type].start_cid; 466dbb799c3SYuval Mintz } 467dbb799c3SYuval Mintz 468dbb799c3SYuval Mintz u32 qed_cxt_get_proto_tid_count(struct qed_hwfn *p_hwfn, 469dbb799c3SYuval Mintz enum protocol_type type) 470dbb799c3SYuval Mintz { 471dbb799c3SYuval Mintz u32 cnt = 0; 472dbb799c3SYuval Mintz int i; 473dbb799c3SYuval Mintz 474dbb799c3SYuval Mintz for (i = 0; i < TASK_SEGMENTS; i++) 475dbb799c3SYuval Mintz cnt += p_hwfn->p_cxt_mngr->conn_cfg[type].tid_seg[i].count; 476dbb799c3SYuval Mintz 477dbb799c3SYuval Mintz return cnt; 478dbb799c3SYuval Mintz } 479dbb799c3SYuval Mintz 4801a635e48SYuval Mintz static void qed_cxt_set_proto_tid_count(struct qed_hwfn *p_hwfn, 481dbb799c3SYuval Mintz enum protocol_type proto, 4821a635e48SYuval Mintz u8 seg, 4831a635e48SYuval Mintz u8 seg_type, u32 count, bool has_fl) 484dbb799c3SYuval Mintz { 485dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 486dbb799c3SYuval Mintz struct qed_tid_seg *p_seg = &p_mngr->conn_cfg[proto].tid_seg[seg]; 487dbb799c3SYuval Mintz 488dbb799c3SYuval Mintz p_seg->count = count; 489dbb799c3SYuval Mintz p_seg->has_fl_mem = has_fl; 490dbb799c3SYuval Mintz p_seg->type = seg_type; 491dbb799c3SYuval Mintz } 492dbb799c3SYuval Mintz 493fe56b9e6SYuval Mintz static void qed_ilt_cli_blk_fill(struct qed_ilt_client_cfg *p_cli, 494fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk, 4951a635e48SYuval Mintz u32 start_line, u32 total_size, u32 elem_size) 496fe56b9e6SYuval Mintz { 497fe56b9e6SYuval Mintz u32 ilt_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val); 498fe56b9e6SYuval Mintz 499fe56b9e6SYuval Mintz /* verify thatits called only once for each block */ 500fe56b9e6SYuval Mintz if (p_blk->total_size) 501fe56b9e6SYuval Mintz return; 502fe56b9e6SYuval Mintz 503fe56b9e6SYuval Mintz p_blk->total_size = total_size; 504fe56b9e6SYuval Mintz p_blk->real_size_in_page = 0; 505fe56b9e6SYuval Mintz if (elem_size) 506fe56b9e6SYuval Mintz p_blk->real_size_in_page = (ilt_size / elem_size) * elem_size; 507fe56b9e6SYuval Mintz p_blk->start_line = start_line; 508fe56b9e6SYuval Mintz } 509fe56b9e6SYuval Mintz 510fe56b9e6SYuval Mintz static void qed_ilt_cli_adv_line(struct qed_hwfn *p_hwfn, 511fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *p_cli, 512fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk, 513fe56b9e6SYuval Mintz u32 *p_line, enum ilt_clients client_id) 514fe56b9e6SYuval Mintz { 515fe56b9e6SYuval Mintz if (!p_blk->total_size) 516fe56b9e6SYuval Mintz return; 517fe56b9e6SYuval Mintz 518fe56b9e6SYuval Mintz if (!p_cli->active) 519fe56b9e6SYuval Mintz p_cli->first.val = *p_line; 520fe56b9e6SYuval Mintz 521fe56b9e6SYuval Mintz p_cli->active = true; 5221a635e48SYuval Mintz *p_line += DIV_ROUND_UP(p_blk->total_size, p_blk->real_size_in_page); 523fe56b9e6SYuval Mintz p_cli->last.val = *p_line - 1; 524fe56b9e6SYuval Mintz 525fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 526fe56b9e6SYuval Mintz "ILT[Client %d] - Lines: [%08x - %08x]. Block - Size %08x [Real %08x] Start line %d\n", 527fe56b9e6SYuval Mintz client_id, p_cli->first.val, 528fe56b9e6SYuval Mintz p_cli->last.val, p_blk->total_size, 529fe56b9e6SYuval Mintz p_blk->real_size_in_page, p_blk->start_line); 530fe56b9e6SYuval Mintz } 531fe56b9e6SYuval Mintz 532dbb799c3SYuval Mintz static u32 qed_ilt_get_dynamic_line_cnt(struct qed_hwfn *p_hwfn, 533dbb799c3SYuval Mintz enum ilt_clients ilt_client) 534dbb799c3SYuval Mintz { 535dbb799c3SYuval Mintz u32 cid_count = p_hwfn->p_cxt_mngr->conn_cfg[PROTOCOLID_ROCE].cid_count; 536dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 537dbb799c3SYuval Mintz u32 lines_to_skip = 0; 538dbb799c3SYuval Mintz u32 cxts_per_p; 539dbb799c3SYuval Mintz 540dbb799c3SYuval Mintz if (ilt_client == ILT_CLI_CDUC) { 541dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC]; 542dbb799c3SYuval Mintz 543dbb799c3SYuval Mintz cxts_per_p = ILT_PAGE_IN_BYTES(p_cli->p_size.val) / 544dbb799c3SYuval Mintz (u32) CONN_CXT_SIZE(p_hwfn); 545dbb799c3SYuval Mintz 546dbb799c3SYuval Mintz lines_to_skip = cid_count / cxts_per_p; 547dbb799c3SYuval Mintz } 548dbb799c3SYuval Mintz 549dbb799c3SYuval Mintz return lines_to_skip; 550dbb799c3SYuval Mintz } 551dbb799c3SYuval Mintz 552f9dc4d1fSRam Amrani static struct qed_ilt_client_cfg *qed_cxt_set_cli(struct qed_ilt_client_cfg 553f9dc4d1fSRam Amrani *p_cli) 554f9dc4d1fSRam Amrani { 555f9dc4d1fSRam Amrani p_cli->active = false; 556f9dc4d1fSRam Amrani p_cli->first.val = 0; 557f9dc4d1fSRam Amrani p_cli->last.val = 0; 558f9dc4d1fSRam Amrani return p_cli; 559f9dc4d1fSRam Amrani } 560f9dc4d1fSRam Amrani 561f9dc4d1fSRam Amrani static struct qed_ilt_cli_blk *qed_cxt_set_blk(struct qed_ilt_cli_blk *p_blk) 562f9dc4d1fSRam Amrani { 563f9dc4d1fSRam Amrani p_blk->total_size = 0; 564f9dc4d1fSRam Amrani return p_blk; 565f9dc4d1fSRam Amrani } 566f9dc4d1fSRam Amrani 567f9dc4d1fSRam Amrani int qed_cxt_cfg_ilt_compute(struct qed_hwfn *p_hwfn, u32 *line_count) 568fe56b9e6SYuval Mintz { 569fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 570dbb799c3SYuval Mintz u32 curr_line, total, i, task_size, line; 571fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *p_cli; 572fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk; 5731408cc1fSYuval Mintz struct qed_cdu_iids cdu_iids; 574dbb799c3SYuval Mintz struct qed_src_iids src_iids; 575fe56b9e6SYuval Mintz struct qed_qm_iids qm_iids; 576dbb799c3SYuval Mintz struct qed_tm_iids tm_iids; 577dbb799c3SYuval Mintz struct qed_tid_seg *p_seg; 578fe56b9e6SYuval Mintz 579fe56b9e6SYuval Mintz memset(&qm_iids, 0, sizeof(qm_iids)); 5801408cc1fSYuval Mintz memset(&cdu_iids, 0, sizeof(cdu_iids)); 581dbb799c3SYuval Mintz memset(&src_iids, 0, sizeof(src_iids)); 582dbb799c3SYuval Mintz memset(&tm_iids, 0, sizeof(tm_iids)); 583fe56b9e6SYuval Mintz 584fe56b9e6SYuval Mintz p_mngr->pf_start_line = RESC_START(p_hwfn, QED_ILT); 585fe56b9e6SYuval Mintz 586fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 587fe56b9e6SYuval Mintz "hwfn [%d] - Set context manager starting line to be 0x%08x\n", 588fe56b9e6SYuval Mintz p_hwfn->my_id, p_hwfn->p_cxt_mngr->pf_start_line); 589fe56b9e6SYuval Mintz 590fe56b9e6SYuval Mintz /* CDUC */ 591f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_CDUC]); 592f9dc4d1fSRam Amrani 593fe56b9e6SYuval Mintz curr_line = p_mngr->pf_start_line; 5941408cc1fSYuval Mintz 5951408cc1fSYuval Mintz /* CDUC PF */ 596fe56b9e6SYuval Mintz p_cli->pf_total_lines = 0; 597fe56b9e6SYuval Mintz 598fe56b9e6SYuval Mintz /* get the counters for the CDUC and QM clients */ 5991408cc1fSYuval Mintz qed_cxt_cdu_iids(p_mngr, &cdu_iids); 600fe56b9e6SYuval Mintz 601f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[CDUC_BLK]); 602fe56b9e6SYuval Mintz 6031408cc1fSYuval Mintz total = cdu_iids.pf_cids * CONN_CXT_SIZE(p_hwfn); 604fe56b9e6SYuval Mintz 605fe56b9e6SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 606fe56b9e6SYuval Mintz total, CONN_CXT_SIZE(p_hwfn)); 607fe56b9e6SYuval Mintz 608fe56b9e6SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_CDUC); 609fe56b9e6SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line; 610fe56b9e6SYuval Mintz 611dbb799c3SYuval Mintz p_blk->dynamic_line_cnt = qed_ilt_get_dynamic_line_cnt(p_hwfn, 612dbb799c3SYuval Mintz ILT_CLI_CDUC); 613dbb799c3SYuval Mintz 6141408cc1fSYuval Mintz /* CDUC VF */ 615f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->vf_blks[CDUC_BLK]); 6161408cc1fSYuval Mintz total = cdu_iids.per_vf_cids * CONN_CXT_SIZE(p_hwfn); 6171408cc1fSYuval Mintz 6181408cc1fSYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 6191408cc1fSYuval Mintz total, CONN_CXT_SIZE(p_hwfn)); 6201408cc1fSYuval Mintz 6211408cc1fSYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_CDUC); 6221408cc1fSYuval Mintz p_cli->vf_total_lines = curr_line - p_blk->start_line; 6231408cc1fSYuval Mintz 6241408cc1fSYuval Mintz for (i = 1; i < p_mngr->vf_count; i++) 6251408cc1fSYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 6261408cc1fSYuval Mintz ILT_CLI_CDUC); 6271408cc1fSYuval Mintz 628dbb799c3SYuval Mintz /* CDUT PF */ 629f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_CDUT]); 630dbb799c3SYuval Mintz p_cli->first.val = curr_line; 631dbb799c3SYuval Mintz 632dbb799c3SYuval Mintz /* first the 'working' task memory */ 633dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) { 634dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, i); 635dbb799c3SYuval Mintz if (!p_seg || p_seg->count == 0) 636dbb799c3SYuval Mintz continue; 637dbb799c3SYuval Mintz 638f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[CDUT_SEG_BLK(i)]); 639dbb799c3SYuval Mintz total = p_seg->count * p_mngr->task_type_size[p_seg->type]; 640dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, total, 641dbb799c3SYuval Mintz p_mngr->task_type_size[p_seg->type]); 642dbb799c3SYuval Mintz 643dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 644dbb799c3SYuval Mintz ILT_CLI_CDUT); 645dbb799c3SYuval Mintz } 646dbb799c3SYuval Mintz 647dbb799c3SYuval Mintz /* next the 'init' task memory (forced load memory) */ 648dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) { 649dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, i); 650dbb799c3SYuval Mintz if (!p_seg || p_seg->count == 0) 651dbb799c3SYuval Mintz continue; 652dbb799c3SYuval Mintz 653f9dc4d1fSRam Amrani p_blk = 654f9dc4d1fSRam Amrani qed_cxt_set_blk(&p_cli->pf_blks[CDUT_FL_SEG_BLK(i, PF)]); 655dbb799c3SYuval Mintz 656dbb799c3SYuval Mintz if (!p_seg->has_fl_mem) { 657dbb799c3SYuval Mintz /* The segment is active (total size pf 'working' 658dbb799c3SYuval Mintz * memory is > 0) but has no FL (forced-load, Init) 659dbb799c3SYuval Mintz * memory. Thus: 660dbb799c3SYuval Mintz * 661dbb799c3SYuval Mintz * 1. The total-size in the corrsponding FL block of 662dbb799c3SYuval Mintz * the ILT client is set to 0 - No ILT line are 663dbb799c3SYuval Mintz * provisioned and no ILT memory allocated. 664dbb799c3SYuval Mintz * 665dbb799c3SYuval Mintz * 2. The start-line of said block is set to the 666dbb799c3SYuval Mintz * start line of the matching working memory 667dbb799c3SYuval Mintz * block in the ILT client. This is later used to 668dbb799c3SYuval Mintz * configure the CDU segment offset registers and 669dbb799c3SYuval Mintz * results in an FL command for TIDs of this 670dbb799c3SYuval Mintz * segement behaves as regular load commands 671dbb799c3SYuval Mintz * (loading TIDs from the working memory). 672dbb799c3SYuval Mintz */ 673dbb799c3SYuval Mintz line = p_cli->pf_blks[CDUT_SEG_BLK(i)].start_line; 674dbb799c3SYuval Mintz 675dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, line, 0, 0); 676dbb799c3SYuval Mintz continue; 677dbb799c3SYuval Mintz } 678dbb799c3SYuval Mintz total = p_seg->count * p_mngr->task_type_size[p_seg->type]; 679dbb799c3SYuval Mintz 680dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, 681dbb799c3SYuval Mintz curr_line, total, 682dbb799c3SYuval Mintz p_mngr->task_type_size[p_seg->type]); 683dbb799c3SYuval Mintz 684dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 685dbb799c3SYuval Mintz ILT_CLI_CDUT); 686dbb799c3SYuval Mintz } 687dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_cli->pf_blks[0].start_line; 688dbb799c3SYuval Mintz 689dbb799c3SYuval Mintz /* CDUT VF */ 690dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, TASK_SEGMENT_VF); 691dbb799c3SYuval Mintz if (p_seg && p_seg->count) { 692dbb799c3SYuval Mintz /* Stricly speaking we need to iterate over all VF 693dbb799c3SYuval Mintz * task segment types, but a VF has only 1 segment 694dbb799c3SYuval Mintz */ 695dbb799c3SYuval Mintz 696dbb799c3SYuval Mintz /* 'working' memory */ 697dbb799c3SYuval Mintz total = p_seg->count * p_mngr->task_type_size[p_seg->type]; 698dbb799c3SYuval Mintz 699f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->vf_blks[CDUT_SEG_BLK(0)]); 700dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, 701dbb799c3SYuval Mintz curr_line, total, 702dbb799c3SYuval Mintz p_mngr->task_type_size[p_seg->type]); 703dbb799c3SYuval Mintz 704dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 705dbb799c3SYuval Mintz ILT_CLI_CDUT); 706dbb799c3SYuval Mintz 707dbb799c3SYuval Mintz /* 'init' memory */ 708f9dc4d1fSRam Amrani p_blk = 709f9dc4d1fSRam Amrani qed_cxt_set_blk(&p_cli->vf_blks[CDUT_FL_SEG_BLK(0, VF)]); 710dbb799c3SYuval Mintz if (!p_seg->has_fl_mem) { 711dbb799c3SYuval Mintz /* see comment above */ 712dbb799c3SYuval Mintz line = p_cli->vf_blks[CDUT_SEG_BLK(0)].start_line; 713dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, line, 0, 0); 714dbb799c3SYuval Mintz } else { 715dbb799c3SYuval Mintz task_size = p_mngr->task_type_size[p_seg->type]; 716dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, 717dbb799c3SYuval Mintz curr_line, total, task_size); 718dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 719dbb799c3SYuval Mintz ILT_CLI_CDUT); 720dbb799c3SYuval Mintz } 721dbb799c3SYuval Mintz p_cli->vf_total_lines = curr_line - 722dbb799c3SYuval Mintz p_cli->vf_blks[0].start_line; 723dbb799c3SYuval Mintz 724dbb799c3SYuval Mintz /* Now for the rest of the VFs */ 725dbb799c3SYuval Mintz for (i = 1; i < p_mngr->vf_count; i++) { 726dbb799c3SYuval Mintz p_blk = &p_cli->vf_blks[CDUT_SEG_BLK(0)]; 727dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 728dbb799c3SYuval Mintz ILT_CLI_CDUT); 729dbb799c3SYuval Mintz 730dbb799c3SYuval Mintz p_blk = &p_cli->vf_blks[CDUT_FL_SEG_BLK(0, VF)]; 731dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 732dbb799c3SYuval Mintz ILT_CLI_CDUT); 733dbb799c3SYuval Mintz } 734dbb799c3SYuval Mintz } 735dbb799c3SYuval Mintz 736fe56b9e6SYuval Mintz /* QM */ 737f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_QM]); 738f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[0]); 739fe56b9e6SYuval Mintz 740fe56b9e6SYuval Mintz qed_cxt_qm_iids(p_hwfn, &qm_iids); 7411408cc1fSYuval Mintz total = qed_qm_pf_mem_size(p_hwfn->rel_pf_id, qm_iids.cids, 742dbb799c3SYuval Mintz qm_iids.vf_cids, qm_iids.tids, 7431408cc1fSYuval Mintz p_hwfn->qm_info.num_pqs, 7441408cc1fSYuval Mintz p_hwfn->qm_info.num_vf_pqs); 745fe56b9e6SYuval Mintz 7461408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, 7471408cc1fSYuval Mintz QED_MSG_ILT, 748dbb799c3SYuval Mintz "QM ILT Info, (cids=%d, vf_cids=%d, tids=%d, num_pqs=%d, num_vf_pqs=%d, memory_size=%d)\n", 7491408cc1fSYuval Mintz qm_iids.cids, 7501408cc1fSYuval Mintz qm_iids.vf_cids, 751dbb799c3SYuval Mintz qm_iids.tids, 7521408cc1fSYuval Mintz p_hwfn->qm_info.num_pqs, p_hwfn->qm_info.num_vf_pqs, total); 753fe56b9e6SYuval Mintz 754fe56b9e6SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, 755fe56b9e6SYuval Mintz curr_line, total * 0x1000, 756fe56b9e6SYuval Mintz QM_PQ_ELEMENT_SIZE); 757fe56b9e6SYuval Mintz 758fe56b9e6SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_QM); 759fe56b9e6SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line; 760fe56b9e6SYuval Mintz 761dbb799c3SYuval Mintz /* SRC */ 762f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_SRC]); 763dbb799c3SYuval Mintz qed_cxt_src_iids(p_mngr, &src_iids); 764dbb799c3SYuval Mintz 765dbb799c3SYuval Mintz /* Both the PF and VFs searcher connections are stored in the per PF 766dbb799c3SYuval Mintz * database. Thus sum the PF searcher cids and all the VFs searcher 767dbb799c3SYuval Mintz * cids. 768dbb799c3SYuval Mintz */ 769dbb799c3SYuval Mintz total = src_iids.pf_cids + src_iids.per_vf_cids * p_mngr->vf_count; 770dbb799c3SYuval Mintz if (total) { 771dbb799c3SYuval Mintz u32 local_max = max_t(u32, total, 772dbb799c3SYuval Mintz SRC_MIN_NUM_ELEMS); 773dbb799c3SYuval Mintz 774dbb799c3SYuval Mintz total = roundup_pow_of_two(local_max); 775dbb799c3SYuval Mintz 776f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[0]); 777dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 778dbb799c3SYuval Mintz total * sizeof(struct src_ent), 779dbb799c3SYuval Mintz sizeof(struct src_ent)); 780dbb799c3SYuval Mintz 781dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 782dbb799c3SYuval Mintz ILT_CLI_SRC); 783dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line; 784dbb799c3SYuval Mintz } 785dbb799c3SYuval Mintz 786dbb799c3SYuval Mintz /* TM PF */ 787f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_TM]); 78844531ba4SMichal Kalderon qed_cxt_tm_iids(p_hwfn, p_mngr, &tm_iids); 789dbb799c3SYuval Mintz total = tm_iids.pf_cids + tm_iids.pf_tids_total; 790dbb799c3SYuval Mintz if (total) { 791f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[0]); 792dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 793dbb799c3SYuval Mintz total * TM_ELEM_SIZE, TM_ELEM_SIZE); 794dbb799c3SYuval Mintz 795dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 796dbb799c3SYuval Mintz ILT_CLI_TM); 797dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line; 798dbb799c3SYuval Mintz } 799dbb799c3SYuval Mintz 800dbb799c3SYuval Mintz /* TM VF */ 801dbb799c3SYuval Mintz total = tm_iids.per_vf_cids + tm_iids.per_vf_tids; 802dbb799c3SYuval Mintz if (total) { 803f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->vf_blks[0]); 804dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 805dbb799c3SYuval Mintz total * TM_ELEM_SIZE, TM_ELEM_SIZE); 806dbb799c3SYuval Mintz 807dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 808dbb799c3SYuval Mintz ILT_CLI_TM); 809dbb799c3SYuval Mintz 81070566b42SMintz, Yuval p_cli->vf_total_lines = curr_line - p_blk->start_line; 811dbb799c3SYuval Mintz for (i = 1; i < p_mngr->vf_count; i++) 812dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 813dbb799c3SYuval Mintz ILT_CLI_TM); 814dbb799c3SYuval Mintz } 815dbb799c3SYuval Mintz 816dbb799c3SYuval Mintz /* TSDM (SRQ CONTEXT) */ 817dbb799c3SYuval Mintz total = qed_cxt_get_srq_count(p_hwfn); 818dbb799c3SYuval Mintz 819dbb799c3SYuval Mintz if (total) { 820f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_TSDM]); 821f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[SRQ_BLK]); 822dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 823dbb799c3SYuval Mintz total * SRQ_CXT_SIZE, SRQ_CXT_SIZE); 824dbb799c3SYuval Mintz 825dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 826dbb799c3SYuval Mintz ILT_CLI_TSDM); 827dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line; 828dbb799c3SYuval Mintz } 829dbb799c3SYuval Mintz 830f9dc4d1fSRam Amrani *line_count = curr_line - p_hwfn->p_cxt_mngr->pf_start_line; 831f9dc4d1fSRam Amrani 832fe56b9e6SYuval Mintz if (curr_line - p_hwfn->p_cxt_mngr->pf_start_line > 833f9dc4d1fSRam Amrani RESC_NUM(p_hwfn, QED_ILT)) 834fe56b9e6SYuval Mintz return -EINVAL; 835f9dc4d1fSRam Amrani 836f9dc4d1fSRam Amrani return 0; 837fe56b9e6SYuval Mintz } 838fe56b9e6SYuval Mintz 839f9dc4d1fSRam Amrani u32 qed_cxt_cfg_ilt_compute_excess(struct qed_hwfn *p_hwfn, u32 used_lines) 840f9dc4d1fSRam Amrani { 841f9dc4d1fSRam Amrani struct qed_ilt_client_cfg *p_cli; 842f9dc4d1fSRam Amrani u32 excess_lines, available_lines; 843f9dc4d1fSRam Amrani struct qed_cxt_mngr *p_mngr; 844f9dc4d1fSRam Amrani u32 ilt_page_size, elem_size; 845f9dc4d1fSRam Amrani struct qed_tid_seg *p_seg; 846f9dc4d1fSRam Amrani int i; 847f9dc4d1fSRam Amrani 848f9dc4d1fSRam Amrani available_lines = RESC_NUM(p_hwfn, QED_ILT); 849f9dc4d1fSRam Amrani excess_lines = used_lines - available_lines; 850f9dc4d1fSRam Amrani 851f9dc4d1fSRam Amrani if (!excess_lines) 852f9dc4d1fSRam Amrani return 0; 853f9dc4d1fSRam Amrani 854f9dc4d1fSRam Amrani if (p_hwfn->hw_info.personality != QED_PCI_ETH_ROCE) 855f9dc4d1fSRam Amrani return 0; 856f9dc4d1fSRam Amrani 857f9dc4d1fSRam Amrani p_mngr = p_hwfn->p_cxt_mngr; 858f9dc4d1fSRam Amrani p_cli = &p_mngr->clients[ILT_CLI_CDUT]; 859f9dc4d1fSRam Amrani ilt_page_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val); 860f9dc4d1fSRam Amrani 861f9dc4d1fSRam Amrani for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) { 862f9dc4d1fSRam Amrani p_seg = qed_cxt_tid_seg_info(p_hwfn, i); 863f9dc4d1fSRam Amrani if (!p_seg || p_seg->count == 0) 864f9dc4d1fSRam Amrani continue; 865f9dc4d1fSRam Amrani 866f9dc4d1fSRam Amrani elem_size = p_mngr->task_type_size[p_seg->type]; 867f9dc4d1fSRam Amrani if (!elem_size) 868f9dc4d1fSRam Amrani continue; 869f9dc4d1fSRam Amrani 870f9dc4d1fSRam Amrani return (ilt_page_size / elem_size) * excess_lines; 871f9dc4d1fSRam Amrani } 872f9dc4d1fSRam Amrani 873f9dc4d1fSRam Amrani DP_NOTICE(p_hwfn, "failed computing excess ILT lines\n"); 874fe56b9e6SYuval Mintz return 0; 875fe56b9e6SYuval Mintz } 876fe56b9e6SYuval Mintz 877dbb799c3SYuval Mintz static void qed_cxt_src_t2_free(struct qed_hwfn *p_hwfn) 878dbb799c3SYuval Mintz { 879dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 880dbb799c3SYuval Mintz u32 i; 881dbb799c3SYuval Mintz 882dbb799c3SYuval Mintz if (!p_mngr->t2) 883dbb799c3SYuval Mintz return; 884dbb799c3SYuval Mintz 885dbb799c3SYuval Mintz for (i = 0; i < p_mngr->t2_num_pages; i++) 886dbb799c3SYuval Mintz if (p_mngr->t2[i].p_virt) 887dbb799c3SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev, 888dbb799c3SYuval Mintz p_mngr->t2[i].size, 889dbb799c3SYuval Mintz p_mngr->t2[i].p_virt, 890dbb799c3SYuval Mintz p_mngr->t2[i].p_phys); 891dbb799c3SYuval Mintz 892dbb799c3SYuval Mintz kfree(p_mngr->t2); 893dbb799c3SYuval Mintz p_mngr->t2 = NULL; 894dbb799c3SYuval Mintz } 895dbb799c3SYuval Mintz 896dbb799c3SYuval Mintz static int qed_cxt_src_t2_alloc(struct qed_hwfn *p_hwfn) 897dbb799c3SYuval Mintz { 898dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 899dbb799c3SYuval Mintz u32 conn_num, total_size, ent_per_page, psz, i; 900dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_src; 901dbb799c3SYuval Mintz struct qed_src_iids src_iids; 902dbb799c3SYuval Mintz struct qed_dma_mem *p_t2; 903dbb799c3SYuval Mintz int rc; 904dbb799c3SYuval Mintz 905dbb799c3SYuval Mintz memset(&src_iids, 0, sizeof(src_iids)); 906dbb799c3SYuval Mintz 907dbb799c3SYuval Mintz /* if the SRC ILT client is inactive - there are no connection 908dbb799c3SYuval Mintz * requiring the searcer, leave. 909dbb799c3SYuval Mintz */ 910dbb799c3SYuval Mintz p_src = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_SRC]; 911dbb799c3SYuval Mintz if (!p_src->active) 912dbb799c3SYuval Mintz return 0; 913dbb799c3SYuval Mintz 914dbb799c3SYuval Mintz qed_cxt_src_iids(p_mngr, &src_iids); 915dbb799c3SYuval Mintz conn_num = src_iids.pf_cids + src_iids.per_vf_cids * p_mngr->vf_count; 916dbb799c3SYuval Mintz total_size = conn_num * sizeof(struct src_ent); 917dbb799c3SYuval Mintz 918dbb799c3SYuval Mintz /* use the same page size as the SRC ILT client */ 919dbb799c3SYuval Mintz psz = ILT_PAGE_IN_BYTES(p_src->p_size.val); 920dbb799c3SYuval Mintz p_mngr->t2_num_pages = DIV_ROUND_UP(total_size, psz); 921dbb799c3SYuval Mintz 922dbb799c3SYuval Mintz /* allocate t2 */ 9232591c280SJoe Perches p_mngr->t2 = kcalloc(p_mngr->t2_num_pages, sizeof(struct qed_dma_mem), 924dbb799c3SYuval Mintz GFP_KERNEL); 925dbb799c3SYuval Mintz if (!p_mngr->t2) { 926dbb799c3SYuval Mintz rc = -ENOMEM; 927dbb799c3SYuval Mintz goto t2_fail; 928dbb799c3SYuval Mintz } 929dbb799c3SYuval Mintz 930dbb799c3SYuval Mintz /* allocate t2 pages */ 931dbb799c3SYuval Mintz for (i = 0; i < p_mngr->t2_num_pages; i++) { 932dbb799c3SYuval Mintz u32 size = min_t(u32, total_size, psz); 933dbb799c3SYuval Mintz void **p_virt = &p_mngr->t2[i].p_virt; 934dbb799c3SYuval Mintz 935dbb799c3SYuval Mintz *p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 936dbb799c3SYuval Mintz size, 937dbb799c3SYuval Mintz &p_mngr->t2[i].p_phys, GFP_KERNEL); 938dbb799c3SYuval Mintz if (!p_mngr->t2[i].p_virt) { 939dbb799c3SYuval Mintz rc = -ENOMEM; 940dbb799c3SYuval Mintz goto t2_fail; 941dbb799c3SYuval Mintz } 942dbb799c3SYuval Mintz memset(*p_virt, 0, size); 943dbb799c3SYuval Mintz p_mngr->t2[i].size = size; 944dbb799c3SYuval Mintz total_size -= size; 945dbb799c3SYuval Mintz } 946dbb799c3SYuval Mintz 947dbb799c3SYuval Mintz /* Set the t2 pointers */ 948dbb799c3SYuval Mintz 949dbb799c3SYuval Mintz /* entries per page - must be a power of two */ 950dbb799c3SYuval Mintz ent_per_page = psz / sizeof(struct src_ent); 951dbb799c3SYuval Mintz 952dbb799c3SYuval Mintz p_mngr->first_free = (u64) p_mngr->t2[0].p_phys; 953dbb799c3SYuval Mintz 954dbb799c3SYuval Mintz p_t2 = &p_mngr->t2[(conn_num - 1) / ent_per_page]; 955dbb799c3SYuval Mintz p_mngr->last_free = (u64) p_t2->p_phys + 956dbb799c3SYuval Mintz ((conn_num - 1) & (ent_per_page - 1)) * sizeof(struct src_ent); 957dbb799c3SYuval Mintz 958dbb799c3SYuval Mintz for (i = 0; i < p_mngr->t2_num_pages; i++) { 959dbb799c3SYuval Mintz u32 ent_num = min_t(u32, 960dbb799c3SYuval Mintz ent_per_page, 961dbb799c3SYuval Mintz conn_num); 962dbb799c3SYuval Mintz struct src_ent *entries = p_mngr->t2[i].p_virt; 963dbb799c3SYuval Mintz u64 p_ent_phys = (u64) p_mngr->t2[i].p_phys, val; 964dbb799c3SYuval Mintz u32 j; 965dbb799c3SYuval Mintz 966dbb799c3SYuval Mintz for (j = 0; j < ent_num - 1; j++) { 967dbb799c3SYuval Mintz val = p_ent_phys + (j + 1) * sizeof(struct src_ent); 968dbb799c3SYuval Mintz entries[j].next = cpu_to_be64(val); 969dbb799c3SYuval Mintz } 970dbb799c3SYuval Mintz 971dbb799c3SYuval Mintz if (i < p_mngr->t2_num_pages - 1) 972dbb799c3SYuval Mintz val = (u64) p_mngr->t2[i + 1].p_phys; 973dbb799c3SYuval Mintz else 974dbb799c3SYuval Mintz val = 0; 975dbb799c3SYuval Mintz entries[j].next = cpu_to_be64(val); 976dbb799c3SYuval Mintz 97701e517f1SDan Carpenter conn_num -= ent_num; 978dbb799c3SYuval Mintz } 979dbb799c3SYuval Mintz 980dbb799c3SYuval Mintz return 0; 981dbb799c3SYuval Mintz 982dbb799c3SYuval Mintz t2_fail: 983dbb799c3SYuval Mintz qed_cxt_src_t2_free(p_hwfn); 984dbb799c3SYuval Mintz return rc; 985dbb799c3SYuval Mintz } 986dbb799c3SYuval Mintz 987fe56b9e6SYuval Mintz #define for_each_ilt_valid_client(pos, clients) \ 988dbb799c3SYuval Mintz for (pos = 0; pos < ILT_CLI_MAX; pos++) \ 989dbb799c3SYuval Mintz if (!clients[pos].active) { \ 990dbb799c3SYuval Mintz continue; \ 991dbb799c3SYuval Mintz } else \ 992fe56b9e6SYuval Mintz 993fe56b9e6SYuval Mintz /* Total number of ILT lines used by this PF */ 994fe56b9e6SYuval Mintz static u32 qed_cxt_ilt_shadow_size(struct qed_ilt_client_cfg *ilt_clients) 995fe56b9e6SYuval Mintz { 996fe56b9e6SYuval Mintz u32 size = 0; 997fe56b9e6SYuval Mintz u32 i; 998fe56b9e6SYuval Mintz 999dbb799c3SYuval Mintz for_each_ilt_valid_client(i, ilt_clients) 1000dbb799c3SYuval Mintz size += (ilt_clients[i].last.val - ilt_clients[i].first.val + 1); 1001fe56b9e6SYuval Mintz 1002fe56b9e6SYuval Mintz return size; 1003fe56b9e6SYuval Mintz } 1004fe56b9e6SYuval Mintz 1005fe56b9e6SYuval Mintz static void qed_ilt_shadow_free(struct qed_hwfn *p_hwfn) 1006fe56b9e6SYuval Mintz { 1007fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *p_cli = p_hwfn->p_cxt_mngr->clients; 1008fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1009fe56b9e6SYuval Mintz u32 ilt_size, i; 1010fe56b9e6SYuval Mintz 1011fe56b9e6SYuval Mintz ilt_size = qed_cxt_ilt_shadow_size(p_cli); 1012fe56b9e6SYuval Mintz 1013fe56b9e6SYuval Mintz for (i = 0; p_mngr->ilt_shadow && i < ilt_size; i++) { 1014fe56b9e6SYuval Mintz struct qed_dma_mem *p_dma = &p_mngr->ilt_shadow[i]; 1015fe56b9e6SYuval Mintz 1016fe56b9e6SYuval Mintz if (p_dma->p_virt) 1017fe56b9e6SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev, 1018fe56b9e6SYuval Mintz p_dma->size, p_dma->p_virt, 1019fe56b9e6SYuval Mintz p_dma->p_phys); 1020fe56b9e6SYuval Mintz p_dma->p_virt = NULL; 1021fe56b9e6SYuval Mintz } 1022fe56b9e6SYuval Mintz kfree(p_mngr->ilt_shadow); 1023fe56b9e6SYuval Mintz } 1024fe56b9e6SYuval Mintz 1025fe56b9e6SYuval Mintz static int qed_ilt_blk_alloc(struct qed_hwfn *p_hwfn, 1026fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk, 1027fe56b9e6SYuval Mintz enum ilt_clients ilt_client, 1028fe56b9e6SYuval Mintz u32 start_line_offset) 1029fe56b9e6SYuval Mintz { 1030fe56b9e6SYuval Mintz struct qed_dma_mem *ilt_shadow = p_hwfn->p_cxt_mngr->ilt_shadow; 1031dbb799c3SYuval Mintz u32 lines, line, sz_left, lines_to_skip = 0; 1032dbb799c3SYuval Mintz 1033dbb799c3SYuval Mintz /* Special handling for RoCE that supports dynamic allocation */ 1034dbb799c3SYuval Mintz if ((p_hwfn->hw_info.personality == QED_PCI_ETH_ROCE) && 1035dbb799c3SYuval Mintz ((ilt_client == ILT_CLI_CDUT) || ilt_client == ILT_CLI_TSDM)) 1036dbb799c3SYuval Mintz return 0; 1037dbb799c3SYuval Mintz 1038dbb799c3SYuval Mintz lines_to_skip = p_blk->dynamic_line_cnt; 1039fe56b9e6SYuval Mintz 1040fe56b9e6SYuval Mintz if (!p_blk->total_size) 1041fe56b9e6SYuval Mintz return 0; 1042fe56b9e6SYuval Mintz 1043fe56b9e6SYuval Mintz sz_left = p_blk->total_size; 1044dbb799c3SYuval Mintz lines = DIV_ROUND_UP(sz_left, p_blk->real_size_in_page) - lines_to_skip; 1045fe56b9e6SYuval Mintz line = p_blk->start_line + start_line_offset - 1046dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->pf_start_line + lines_to_skip; 1047fe56b9e6SYuval Mintz 1048fe56b9e6SYuval Mintz for (; lines; lines--) { 1049fe56b9e6SYuval Mintz dma_addr_t p_phys; 1050fe56b9e6SYuval Mintz void *p_virt; 1051fe56b9e6SYuval Mintz u32 size; 1052fe56b9e6SYuval Mintz 10531a635e48SYuval Mintz size = min_t(u32, sz_left, p_blk->real_size_in_page); 1054fe56b9e6SYuval Mintz p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 10551a635e48SYuval Mintz size, &p_phys, GFP_KERNEL); 1056fe56b9e6SYuval Mintz if (!p_virt) 1057fe56b9e6SYuval Mintz return -ENOMEM; 1058fe56b9e6SYuval Mintz memset(p_virt, 0, size); 1059fe56b9e6SYuval Mintz 1060fe56b9e6SYuval Mintz ilt_shadow[line].p_phys = p_phys; 1061fe56b9e6SYuval Mintz ilt_shadow[line].p_virt = p_virt; 1062fe56b9e6SYuval Mintz ilt_shadow[line].size = size; 1063fe56b9e6SYuval Mintz 1064fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 1065fe56b9e6SYuval Mintz "ILT shadow: Line [%d] Physical 0x%llx Virtual %p Size %d\n", 1066fe56b9e6SYuval Mintz line, (u64)p_phys, p_virt, size); 1067fe56b9e6SYuval Mintz 1068fe56b9e6SYuval Mintz sz_left -= size; 1069fe56b9e6SYuval Mintz line++; 1070fe56b9e6SYuval Mintz } 1071fe56b9e6SYuval Mintz 1072fe56b9e6SYuval Mintz return 0; 1073fe56b9e6SYuval Mintz } 1074fe56b9e6SYuval Mintz 1075fe56b9e6SYuval Mintz static int qed_ilt_shadow_alloc(struct qed_hwfn *p_hwfn) 1076fe56b9e6SYuval Mintz { 1077fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1078fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *clients = p_mngr->clients; 1079fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk; 10801408cc1fSYuval Mintz u32 size, i, j, k; 1081fe56b9e6SYuval Mintz int rc; 1082fe56b9e6SYuval Mintz 1083fe56b9e6SYuval Mintz size = qed_cxt_ilt_shadow_size(clients); 1084fe56b9e6SYuval Mintz p_mngr->ilt_shadow = kcalloc(size, sizeof(struct qed_dma_mem), 1085fe56b9e6SYuval Mintz GFP_KERNEL); 1086fe56b9e6SYuval Mintz if (!p_mngr->ilt_shadow) { 1087fe56b9e6SYuval Mintz rc = -ENOMEM; 1088fe56b9e6SYuval Mintz goto ilt_shadow_fail; 1089fe56b9e6SYuval Mintz } 1090fe56b9e6SYuval Mintz 1091fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 1092fe56b9e6SYuval Mintz "Allocated 0x%x bytes for ilt shadow\n", 1093fe56b9e6SYuval Mintz (u32)(size * sizeof(struct qed_dma_mem))); 1094fe56b9e6SYuval Mintz 1095fe56b9e6SYuval Mintz for_each_ilt_valid_client(i, clients) { 1096fe56b9e6SYuval Mintz for (j = 0; j < ILT_CLI_PF_BLOCKS; j++) { 1097fe56b9e6SYuval Mintz p_blk = &clients[i].pf_blks[j]; 1098fe56b9e6SYuval Mintz rc = qed_ilt_blk_alloc(p_hwfn, p_blk, i, 0); 10991a635e48SYuval Mintz if (rc) 1100fe56b9e6SYuval Mintz goto ilt_shadow_fail; 1101fe56b9e6SYuval Mintz } 11021408cc1fSYuval Mintz for (k = 0; k < p_mngr->vf_count; k++) { 11031408cc1fSYuval Mintz for (j = 0; j < ILT_CLI_VF_BLOCKS; j++) { 11041408cc1fSYuval Mintz u32 lines = clients[i].vf_total_lines * k; 11051408cc1fSYuval Mintz 11061408cc1fSYuval Mintz p_blk = &clients[i].vf_blks[j]; 11071408cc1fSYuval Mintz rc = qed_ilt_blk_alloc(p_hwfn, p_blk, i, lines); 11081a635e48SYuval Mintz if (rc) 11091408cc1fSYuval Mintz goto ilt_shadow_fail; 11101408cc1fSYuval Mintz } 11111408cc1fSYuval Mintz } 1112fe56b9e6SYuval Mintz } 1113fe56b9e6SYuval Mintz 1114fe56b9e6SYuval Mintz return 0; 1115fe56b9e6SYuval Mintz 1116fe56b9e6SYuval Mintz ilt_shadow_fail: 1117fe56b9e6SYuval Mintz qed_ilt_shadow_free(p_hwfn); 1118fe56b9e6SYuval Mintz return rc; 1119fe56b9e6SYuval Mintz } 1120fe56b9e6SYuval Mintz 1121fe56b9e6SYuval Mintz static void qed_cid_map_free(struct qed_hwfn *p_hwfn) 1122fe56b9e6SYuval Mintz { 1123fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1124fe56b9e6SYuval Mintz u32 type; 1125fe56b9e6SYuval Mintz 1126fe56b9e6SYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) { 1127fe56b9e6SYuval Mintz kfree(p_mngr->acquired[type].cid_map); 1128fe56b9e6SYuval Mintz p_mngr->acquired[type].max_count = 0; 1129fe56b9e6SYuval Mintz p_mngr->acquired[type].start_cid = 0; 1130fe56b9e6SYuval Mintz } 1131fe56b9e6SYuval Mintz } 1132fe56b9e6SYuval Mintz 1133fe56b9e6SYuval Mintz static int qed_cid_map_alloc(struct qed_hwfn *p_hwfn) 1134fe56b9e6SYuval Mintz { 1135fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1136fe56b9e6SYuval Mintz u32 start_cid = 0; 1137fe56b9e6SYuval Mintz u32 type; 1138fe56b9e6SYuval Mintz 1139fe56b9e6SYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) { 1140fe56b9e6SYuval Mintz u32 cid_cnt = p_hwfn->p_cxt_mngr->conn_cfg[type].cid_count; 1141fe56b9e6SYuval Mintz u32 size; 1142fe56b9e6SYuval Mintz 1143fe56b9e6SYuval Mintz if (cid_cnt == 0) 1144fe56b9e6SYuval Mintz continue; 1145fe56b9e6SYuval Mintz 1146fe56b9e6SYuval Mintz size = DIV_ROUND_UP(cid_cnt, 1147fe56b9e6SYuval Mintz sizeof(unsigned long) * BITS_PER_BYTE) * 1148fe56b9e6SYuval Mintz sizeof(unsigned long); 1149fe56b9e6SYuval Mintz p_mngr->acquired[type].cid_map = kzalloc(size, GFP_KERNEL); 1150fe56b9e6SYuval Mintz if (!p_mngr->acquired[type].cid_map) 1151fe56b9e6SYuval Mintz goto cid_map_fail; 1152fe56b9e6SYuval Mintz 1153fe56b9e6SYuval Mintz p_mngr->acquired[type].max_count = cid_cnt; 1154fe56b9e6SYuval Mintz p_mngr->acquired[type].start_cid = start_cid; 1155fe56b9e6SYuval Mintz 1156fe56b9e6SYuval Mintz p_hwfn->p_cxt_mngr->conn_cfg[type].cid_start = start_cid; 1157fe56b9e6SYuval Mintz 1158fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_CXT, 1159fe56b9e6SYuval Mintz "Type %08x start: %08x count %08x\n", 1160fe56b9e6SYuval Mintz type, p_mngr->acquired[type].start_cid, 1161fe56b9e6SYuval Mintz p_mngr->acquired[type].max_count); 1162fe56b9e6SYuval Mintz start_cid += cid_cnt; 1163fe56b9e6SYuval Mintz } 1164fe56b9e6SYuval Mintz 1165fe56b9e6SYuval Mintz return 0; 1166fe56b9e6SYuval Mintz 1167fe56b9e6SYuval Mintz cid_map_fail: 1168fe56b9e6SYuval Mintz qed_cid_map_free(p_hwfn); 1169fe56b9e6SYuval Mintz return -ENOMEM; 1170fe56b9e6SYuval Mintz } 1171fe56b9e6SYuval Mintz 1172fe56b9e6SYuval Mintz int qed_cxt_mngr_alloc(struct qed_hwfn *p_hwfn) 1173fe56b9e6SYuval Mintz { 1174dbb799c3SYuval Mintz struct qed_ilt_client_cfg *clients; 1175fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr; 1176fe56b9e6SYuval Mintz u32 i; 1177fe56b9e6SYuval Mintz 117860fffb3bSYuval Mintz p_mngr = kzalloc(sizeof(*p_mngr), GFP_KERNEL); 11792591c280SJoe Perches if (!p_mngr) 1180fe56b9e6SYuval Mintz return -ENOMEM; 1181fe56b9e6SYuval Mintz 1182fe56b9e6SYuval Mintz /* Initialize ILT client registers */ 1183dbb799c3SYuval Mintz clients = p_mngr->clients; 1184dbb799c3SYuval Mintz clients[ILT_CLI_CDUC].first.reg = ILT_CFG_REG(CDUC, FIRST_ILT); 1185dbb799c3SYuval Mintz clients[ILT_CLI_CDUC].last.reg = ILT_CFG_REG(CDUC, LAST_ILT); 1186dbb799c3SYuval Mintz clients[ILT_CLI_CDUC].p_size.reg = ILT_CFG_REG(CDUC, P_SIZE); 1187fe56b9e6SYuval Mintz 1188dbb799c3SYuval Mintz clients[ILT_CLI_QM].first.reg = ILT_CFG_REG(QM, FIRST_ILT); 1189dbb799c3SYuval Mintz clients[ILT_CLI_QM].last.reg = ILT_CFG_REG(QM, LAST_ILT); 1190dbb799c3SYuval Mintz clients[ILT_CLI_QM].p_size.reg = ILT_CFG_REG(QM, P_SIZE); 1191fe56b9e6SYuval Mintz 1192dbb799c3SYuval Mintz clients[ILT_CLI_TM].first.reg = ILT_CFG_REG(TM, FIRST_ILT); 1193dbb799c3SYuval Mintz clients[ILT_CLI_TM].last.reg = ILT_CFG_REG(TM, LAST_ILT); 1194dbb799c3SYuval Mintz clients[ILT_CLI_TM].p_size.reg = ILT_CFG_REG(TM, P_SIZE); 1195dbb799c3SYuval Mintz 1196dbb799c3SYuval Mintz clients[ILT_CLI_SRC].first.reg = ILT_CFG_REG(SRC, FIRST_ILT); 1197dbb799c3SYuval Mintz clients[ILT_CLI_SRC].last.reg = ILT_CFG_REG(SRC, LAST_ILT); 1198dbb799c3SYuval Mintz clients[ILT_CLI_SRC].p_size.reg = ILT_CFG_REG(SRC, P_SIZE); 1199dbb799c3SYuval Mintz 1200dbb799c3SYuval Mintz clients[ILT_CLI_CDUT].first.reg = ILT_CFG_REG(CDUT, FIRST_ILT); 1201dbb799c3SYuval Mintz clients[ILT_CLI_CDUT].last.reg = ILT_CFG_REG(CDUT, LAST_ILT); 1202dbb799c3SYuval Mintz clients[ILT_CLI_CDUT].p_size.reg = ILT_CFG_REG(CDUT, P_SIZE); 1203dbb799c3SYuval Mintz 1204dbb799c3SYuval Mintz clients[ILT_CLI_TSDM].first.reg = ILT_CFG_REG(TSDM, FIRST_ILT); 1205dbb799c3SYuval Mintz clients[ILT_CLI_TSDM].last.reg = ILT_CFG_REG(TSDM, LAST_ILT); 1206dbb799c3SYuval Mintz clients[ILT_CLI_TSDM].p_size.reg = ILT_CFG_REG(TSDM, P_SIZE); 1207be086e7cSMintz, Yuval /* default ILT page size for all clients is 64K */ 1208fe56b9e6SYuval Mintz for (i = 0; i < ILT_CLI_MAX; i++) 1209fe56b9e6SYuval Mintz p_mngr->clients[i].p_size.val = ILT_DEFAULT_HW_P_SIZE; 1210fe56b9e6SYuval Mintz 1211dbb799c3SYuval Mintz /* Initialize task sizes */ 1212dbb799c3SYuval Mintz p_mngr->task_type_size[0] = TYPE0_TASK_CXT_SIZE(p_hwfn); 1213dbb799c3SYuval Mintz p_mngr->task_type_size[1] = TYPE1_TASK_CXT_SIZE(p_hwfn); 1214dbb799c3SYuval Mintz 12151408cc1fSYuval Mintz if (p_hwfn->cdev->p_iov_info) 12161408cc1fSYuval Mintz p_mngr->vf_count = p_hwfn->cdev->p_iov_info->total_vfs; 1217dbb799c3SYuval Mintz /* Initialize the dynamic ILT allocation mutex */ 1218dbb799c3SYuval Mintz mutex_init(&p_mngr->mutex); 12191408cc1fSYuval Mintz 1220fe56b9e6SYuval Mintz /* Set the cxt mangr pointer priori to further allocations */ 1221fe56b9e6SYuval Mintz p_hwfn->p_cxt_mngr = p_mngr; 1222fe56b9e6SYuval Mintz 1223fe56b9e6SYuval Mintz return 0; 1224fe56b9e6SYuval Mintz } 1225fe56b9e6SYuval Mintz 1226fe56b9e6SYuval Mintz int qed_cxt_tables_alloc(struct qed_hwfn *p_hwfn) 1227fe56b9e6SYuval Mintz { 1228fe56b9e6SYuval Mintz int rc; 1229fe56b9e6SYuval Mintz 1230fe56b9e6SYuval Mintz /* Allocate the ILT shadow table */ 1231fe56b9e6SYuval Mintz rc = qed_ilt_shadow_alloc(p_hwfn); 12322591c280SJoe Perches if (rc) 1233fe56b9e6SYuval Mintz goto tables_alloc_fail; 1234fe56b9e6SYuval Mintz 1235dbb799c3SYuval Mintz /* Allocate the T2 table */ 1236dbb799c3SYuval Mintz rc = qed_cxt_src_t2_alloc(p_hwfn); 12372591c280SJoe Perches if (rc) 1238dbb799c3SYuval Mintz goto tables_alloc_fail; 1239dbb799c3SYuval Mintz 1240fe56b9e6SYuval Mintz /* Allocate and initialize the acquired cids bitmaps */ 1241fe56b9e6SYuval Mintz rc = qed_cid_map_alloc(p_hwfn); 12422591c280SJoe Perches if (rc) 1243fe56b9e6SYuval Mintz goto tables_alloc_fail; 1244fe56b9e6SYuval Mintz 1245fe56b9e6SYuval Mintz return 0; 1246fe56b9e6SYuval Mintz 1247fe56b9e6SYuval Mintz tables_alloc_fail: 1248fe56b9e6SYuval Mintz qed_cxt_mngr_free(p_hwfn); 1249fe56b9e6SYuval Mintz return rc; 1250fe56b9e6SYuval Mintz } 1251fe56b9e6SYuval Mintz 1252fe56b9e6SYuval Mintz void qed_cxt_mngr_free(struct qed_hwfn *p_hwfn) 1253fe56b9e6SYuval Mintz { 1254fe56b9e6SYuval Mintz if (!p_hwfn->p_cxt_mngr) 1255fe56b9e6SYuval Mintz return; 1256fe56b9e6SYuval Mintz 1257fe56b9e6SYuval Mintz qed_cid_map_free(p_hwfn); 1258dbb799c3SYuval Mintz qed_cxt_src_t2_free(p_hwfn); 1259fe56b9e6SYuval Mintz qed_ilt_shadow_free(p_hwfn); 1260fe56b9e6SYuval Mintz kfree(p_hwfn->p_cxt_mngr); 1261fe56b9e6SYuval Mintz 1262fe56b9e6SYuval Mintz p_hwfn->p_cxt_mngr = NULL; 1263fe56b9e6SYuval Mintz } 1264fe56b9e6SYuval Mintz 1265fe56b9e6SYuval Mintz void qed_cxt_mngr_setup(struct qed_hwfn *p_hwfn) 1266fe56b9e6SYuval Mintz { 1267fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1268fe56b9e6SYuval Mintz int type; 1269fe56b9e6SYuval Mintz 1270fe56b9e6SYuval Mintz /* Reset acquired cids */ 1271fe56b9e6SYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) { 1272fe56b9e6SYuval Mintz u32 cid_cnt = p_hwfn->p_cxt_mngr->conn_cfg[type].cid_count; 1273fe56b9e6SYuval Mintz 1274fe56b9e6SYuval Mintz if (cid_cnt == 0) 1275fe56b9e6SYuval Mintz continue; 1276fe56b9e6SYuval Mintz 1277fe56b9e6SYuval Mintz memset(p_mngr->acquired[type].cid_map, 0, 1278fe56b9e6SYuval Mintz DIV_ROUND_UP(cid_cnt, 1279fe56b9e6SYuval Mintz sizeof(unsigned long) * BITS_PER_BYTE) * 1280fe56b9e6SYuval Mintz sizeof(unsigned long)); 1281fe56b9e6SYuval Mintz } 1282fe56b9e6SYuval Mintz } 1283fe56b9e6SYuval Mintz 1284fe56b9e6SYuval Mintz /* CDU Common */ 1285fe56b9e6SYuval Mintz #define CDUC_CXT_SIZE_SHIFT \ 1286fe56b9e6SYuval Mintz CDU_REG_CID_ADDR_PARAMS_CONTEXT_SIZE_SHIFT 1287fe56b9e6SYuval Mintz 1288fe56b9e6SYuval Mintz #define CDUC_CXT_SIZE_MASK \ 1289fe56b9e6SYuval Mintz (CDU_REG_CID_ADDR_PARAMS_CONTEXT_SIZE >> CDUC_CXT_SIZE_SHIFT) 1290fe56b9e6SYuval Mintz 1291fe56b9e6SYuval Mintz #define CDUC_BLOCK_WASTE_SHIFT \ 1292fe56b9e6SYuval Mintz CDU_REG_CID_ADDR_PARAMS_BLOCK_WASTE_SHIFT 1293fe56b9e6SYuval Mintz 1294fe56b9e6SYuval Mintz #define CDUC_BLOCK_WASTE_MASK \ 1295fe56b9e6SYuval Mintz (CDU_REG_CID_ADDR_PARAMS_BLOCK_WASTE >> CDUC_BLOCK_WASTE_SHIFT) 1296fe56b9e6SYuval Mintz 1297fe56b9e6SYuval Mintz #define CDUC_NCIB_SHIFT \ 1298fe56b9e6SYuval Mintz CDU_REG_CID_ADDR_PARAMS_NCIB_SHIFT 1299fe56b9e6SYuval Mintz 1300fe56b9e6SYuval Mintz #define CDUC_NCIB_MASK \ 1301fe56b9e6SYuval Mintz (CDU_REG_CID_ADDR_PARAMS_NCIB >> CDUC_NCIB_SHIFT) 1302fe56b9e6SYuval Mintz 1303dbb799c3SYuval Mintz #define CDUT_TYPE0_CXT_SIZE_SHIFT \ 1304dbb799c3SYuval Mintz CDU_REG_SEGMENT0_PARAMS_T0_TID_SIZE_SHIFT 1305dbb799c3SYuval Mintz 1306dbb799c3SYuval Mintz #define CDUT_TYPE0_CXT_SIZE_MASK \ 1307dbb799c3SYuval Mintz (CDU_REG_SEGMENT0_PARAMS_T0_TID_SIZE >> \ 1308dbb799c3SYuval Mintz CDUT_TYPE0_CXT_SIZE_SHIFT) 1309dbb799c3SYuval Mintz 1310dbb799c3SYuval Mintz #define CDUT_TYPE0_BLOCK_WASTE_SHIFT \ 1311dbb799c3SYuval Mintz CDU_REG_SEGMENT0_PARAMS_T0_TID_BLOCK_WASTE_SHIFT 1312dbb799c3SYuval Mintz 1313dbb799c3SYuval Mintz #define CDUT_TYPE0_BLOCK_WASTE_MASK \ 1314dbb799c3SYuval Mintz (CDU_REG_SEGMENT0_PARAMS_T0_TID_BLOCK_WASTE >> \ 1315dbb799c3SYuval Mintz CDUT_TYPE0_BLOCK_WASTE_SHIFT) 1316dbb799c3SYuval Mintz 1317dbb799c3SYuval Mintz #define CDUT_TYPE0_NCIB_SHIFT \ 1318dbb799c3SYuval Mintz CDU_REG_SEGMENT0_PARAMS_T0_NUM_TIDS_IN_BLOCK_SHIFT 1319dbb799c3SYuval Mintz 1320dbb799c3SYuval Mintz #define CDUT_TYPE0_NCIB_MASK \ 1321dbb799c3SYuval Mintz (CDU_REG_SEGMENT0_PARAMS_T0_NUM_TIDS_IN_BLOCK >> \ 1322dbb799c3SYuval Mintz CDUT_TYPE0_NCIB_SHIFT) 1323dbb799c3SYuval Mintz 1324dbb799c3SYuval Mintz #define CDUT_TYPE1_CXT_SIZE_SHIFT \ 1325dbb799c3SYuval Mintz CDU_REG_SEGMENT1_PARAMS_T1_TID_SIZE_SHIFT 1326dbb799c3SYuval Mintz 1327dbb799c3SYuval Mintz #define CDUT_TYPE1_CXT_SIZE_MASK \ 1328dbb799c3SYuval Mintz (CDU_REG_SEGMENT1_PARAMS_T1_TID_SIZE >> \ 1329dbb799c3SYuval Mintz CDUT_TYPE1_CXT_SIZE_SHIFT) 1330dbb799c3SYuval Mintz 1331dbb799c3SYuval Mintz #define CDUT_TYPE1_BLOCK_WASTE_SHIFT \ 1332dbb799c3SYuval Mintz CDU_REG_SEGMENT1_PARAMS_T1_TID_BLOCK_WASTE_SHIFT 1333dbb799c3SYuval Mintz 1334dbb799c3SYuval Mintz #define CDUT_TYPE1_BLOCK_WASTE_MASK \ 1335dbb799c3SYuval Mintz (CDU_REG_SEGMENT1_PARAMS_T1_TID_BLOCK_WASTE >> \ 1336dbb799c3SYuval Mintz CDUT_TYPE1_BLOCK_WASTE_SHIFT) 1337dbb799c3SYuval Mintz 1338dbb799c3SYuval Mintz #define CDUT_TYPE1_NCIB_SHIFT \ 1339dbb799c3SYuval Mintz CDU_REG_SEGMENT1_PARAMS_T1_NUM_TIDS_IN_BLOCK_SHIFT 1340dbb799c3SYuval Mintz 1341dbb799c3SYuval Mintz #define CDUT_TYPE1_NCIB_MASK \ 1342dbb799c3SYuval Mintz (CDU_REG_SEGMENT1_PARAMS_T1_NUM_TIDS_IN_BLOCK >> \ 1343dbb799c3SYuval Mintz CDUT_TYPE1_NCIB_SHIFT) 1344dbb799c3SYuval Mintz 1345fe56b9e6SYuval Mintz static void qed_cdu_init_common(struct qed_hwfn *p_hwfn) 1346fe56b9e6SYuval Mintz { 1347fe56b9e6SYuval Mintz u32 page_sz, elems_per_page, block_waste, cxt_size, cdu_params = 0; 1348fe56b9e6SYuval Mintz 1349fe56b9e6SYuval Mintz /* CDUC - connection configuration */ 1350fe56b9e6SYuval Mintz page_sz = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC].p_size.val; 1351fe56b9e6SYuval Mintz cxt_size = CONN_CXT_SIZE(p_hwfn); 1352fe56b9e6SYuval Mintz elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size; 1353fe56b9e6SYuval Mintz block_waste = ILT_PAGE_IN_BYTES(page_sz) - elems_per_page * cxt_size; 1354fe56b9e6SYuval Mintz 1355fe56b9e6SYuval Mintz SET_FIELD(cdu_params, CDUC_CXT_SIZE, cxt_size); 1356fe56b9e6SYuval Mintz SET_FIELD(cdu_params, CDUC_BLOCK_WASTE, block_waste); 1357fe56b9e6SYuval Mintz SET_FIELD(cdu_params, CDUC_NCIB, elems_per_page); 1358fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, CDU_REG_CID_ADDR_PARAMS_RT_OFFSET, cdu_params); 1359dbb799c3SYuval Mintz 1360dbb799c3SYuval Mintz /* CDUT - type-0 tasks configuration */ 1361dbb799c3SYuval Mintz page_sz = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT].p_size.val; 1362dbb799c3SYuval Mintz cxt_size = p_hwfn->p_cxt_mngr->task_type_size[0]; 1363dbb799c3SYuval Mintz elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size; 1364dbb799c3SYuval Mintz block_waste = ILT_PAGE_IN_BYTES(page_sz) - elems_per_page * cxt_size; 1365dbb799c3SYuval Mintz 1366dbb799c3SYuval Mintz /* cxt size and block-waste are multipes of 8 */ 1367dbb799c3SYuval Mintz cdu_params = 0; 1368dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE0_CXT_SIZE, (cxt_size >> 3)); 1369dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE0_BLOCK_WASTE, (block_waste >> 3)); 1370dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE0_NCIB, elems_per_page); 1371dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, CDU_REG_SEGMENT0_PARAMS_RT_OFFSET, cdu_params); 1372dbb799c3SYuval Mintz 1373dbb799c3SYuval Mintz /* CDUT - type-1 tasks configuration */ 1374dbb799c3SYuval Mintz cxt_size = p_hwfn->p_cxt_mngr->task_type_size[1]; 1375dbb799c3SYuval Mintz elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size; 1376dbb799c3SYuval Mintz block_waste = ILT_PAGE_IN_BYTES(page_sz) - elems_per_page * cxt_size; 1377dbb799c3SYuval Mintz 1378dbb799c3SYuval Mintz /* cxt size and block-waste are multipes of 8 */ 1379dbb799c3SYuval Mintz cdu_params = 0; 1380dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE1_CXT_SIZE, (cxt_size >> 3)); 1381dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE1_BLOCK_WASTE, (block_waste >> 3)); 1382dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE1_NCIB, elems_per_page); 1383dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, CDU_REG_SEGMENT1_PARAMS_RT_OFFSET, cdu_params); 1384dbb799c3SYuval Mintz } 1385dbb799c3SYuval Mintz 1386dbb799c3SYuval Mintz /* CDU PF */ 1387dbb799c3SYuval Mintz #define CDU_SEG_REG_TYPE_SHIFT CDU_SEG_TYPE_OFFSET_REG_TYPE_SHIFT 1388dbb799c3SYuval Mintz #define CDU_SEG_REG_TYPE_MASK 0x1 1389dbb799c3SYuval Mintz #define CDU_SEG_REG_OFFSET_SHIFT 0 1390dbb799c3SYuval Mintz #define CDU_SEG_REG_OFFSET_MASK CDU_SEG_TYPE_OFFSET_REG_OFFSET_MASK 1391dbb799c3SYuval Mintz 1392dbb799c3SYuval Mintz static void qed_cdu_init_pf(struct qed_hwfn *p_hwfn) 1393dbb799c3SYuval Mintz { 1394dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 1395dbb799c3SYuval Mintz struct qed_tid_seg *p_seg; 1396dbb799c3SYuval Mintz u32 cdu_seg_params, offset; 1397dbb799c3SYuval Mintz int i; 1398dbb799c3SYuval Mintz 1399dbb799c3SYuval Mintz static const u32 rt_type_offset_arr[] = { 1400dbb799c3SYuval Mintz CDU_REG_PF_SEG0_TYPE_OFFSET_RT_OFFSET, 1401dbb799c3SYuval Mintz CDU_REG_PF_SEG1_TYPE_OFFSET_RT_OFFSET, 1402dbb799c3SYuval Mintz CDU_REG_PF_SEG2_TYPE_OFFSET_RT_OFFSET, 1403dbb799c3SYuval Mintz CDU_REG_PF_SEG3_TYPE_OFFSET_RT_OFFSET 1404dbb799c3SYuval Mintz }; 1405dbb799c3SYuval Mintz 1406dbb799c3SYuval Mintz static const u32 rt_type_offset_fl_arr[] = { 1407dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG0_TYPE_OFFSET_RT_OFFSET, 1408dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG1_TYPE_OFFSET_RT_OFFSET, 1409dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG2_TYPE_OFFSET_RT_OFFSET, 1410dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG3_TYPE_OFFSET_RT_OFFSET 1411dbb799c3SYuval Mintz }; 1412dbb799c3SYuval Mintz 1413dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT]; 1414dbb799c3SYuval Mintz 1415dbb799c3SYuval Mintz /* There are initializations only for CDUT during pf Phase */ 1416dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) { 1417dbb799c3SYuval Mintz /* Segment 0 */ 1418dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, i); 1419dbb799c3SYuval Mintz if (!p_seg) 1420dbb799c3SYuval Mintz continue; 1421dbb799c3SYuval Mintz 1422dbb799c3SYuval Mintz /* Note: start_line is already adjusted for the CDU 1423dbb799c3SYuval Mintz * segment register granularity, so we just need to 1424dbb799c3SYuval Mintz * divide. Adjustment is implicit as we assume ILT 1425dbb799c3SYuval Mintz * Page size is larger than 32K! 1426dbb799c3SYuval Mintz */ 1427dbb799c3SYuval Mintz offset = (ILT_PAGE_IN_BYTES(p_cli->p_size.val) * 1428dbb799c3SYuval Mintz (p_cli->pf_blks[CDUT_SEG_BLK(i)].start_line - 1429dbb799c3SYuval Mintz p_cli->first.val)) / CDUT_SEG_ALIGNMET_IN_BYTES; 1430dbb799c3SYuval Mintz 1431dbb799c3SYuval Mintz cdu_seg_params = 0; 1432dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_TYPE, p_seg->type); 1433dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_OFFSET, offset); 1434dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, rt_type_offset_arr[i], cdu_seg_params); 1435dbb799c3SYuval Mintz 1436dbb799c3SYuval Mintz offset = (ILT_PAGE_IN_BYTES(p_cli->p_size.val) * 1437dbb799c3SYuval Mintz (p_cli->pf_blks[CDUT_FL_SEG_BLK(i, PF)].start_line - 1438dbb799c3SYuval Mintz p_cli->first.val)) / CDUT_SEG_ALIGNMET_IN_BYTES; 1439dbb799c3SYuval Mintz 1440dbb799c3SYuval Mintz cdu_seg_params = 0; 1441dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_TYPE, p_seg->type); 1442dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_OFFSET, offset); 1443dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, rt_type_offset_fl_arr[i], cdu_seg_params); 1444dbb799c3SYuval Mintz } 1445fe56b9e6SYuval Mintz } 1446fe56b9e6SYuval Mintz 144715582962SRahul Verma void qed_qm_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 1448fe56b9e6SYuval Mintz { 1449fe56b9e6SYuval Mintz struct qed_qm_pf_rt_init_params params; 1450fe56b9e6SYuval Mintz struct qed_qm_info *qm_info = &p_hwfn->qm_info; 1451fe56b9e6SYuval Mintz struct qed_qm_iids iids; 1452fe56b9e6SYuval Mintz 1453fe56b9e6SYuval Mintz memset(&iids, 0, sizeof(iids)); 1454fe56b9e6SYuval Mintz qed_cxt_qm_iids(p_hwfn, &iids); 1455fe56b9e6SYuval Mintz 1456fe56b9e6SYuval Mintz memset(¶ms, 0, sizeof(params)); 1457fe56b9e6SYuval Mintz params.port_id = p_hwfn->port_id; 1458fe56b9e6SYuval Mintz params.pf_id = p_hwfn->rel_pf_id; 1459fe56b9e6SYuval Mintz params.max_phys_tcs_per_port = qm_info->max_phys_tcs_per_port; 1460fe56b9e6SYuval Mintz params.is_first_pf = p_hwfn->first_on_engine; 1461fe56b9e6SYuval Mintz params.num_pf_cids = iids.cids; 14621408cc1fSYuval Mintz params.num_vf_cids = iids.vf_cids; 1463c9f0523bSMintz, Yuval params.num_tids = iids.tids; 1464fe56b9e6SYuval Mintz params.start_pq = qm_info->start_pq; 14651408cc1fSYuval Mintz params.num_pf_pqs = qm_info->num_pqs - qm_info->num_vf_pqs; 14661408cc1fSYuval Mintz params.num_vf_pqs = qm_info->num_vf_pqs; 1467fc48b7a6SYuval Mintz params.start_vport = qm_info->start_vport; 1468fc48b7a6SYuval Mintz params.num_vports = qm_info->num_vports; 1469fe56b9e6SYuval Mintz params.pf_wfq = qm_info->pf_wfq; 1470fe56b9e6SYuval Mintz params.pf_rl = qm_info->pf_rl; 1471fe56b9e6SYuval Mintz params.pq_params = qm_info->qm_pq_params; 1472fe56b9e6SYuval Mintz params.vport_params = qm_info->qm_vport_params; 1473fe56b9e6SYuval Mintz 147415582962SRahul Verma qed_qm_pf_rt_init(p_hwfn, p_ptt, ¶ms); 1475fe56b9e6SYuval Mintz } 1476fe56b9e6SYuval Mintz 1477fe56b9e6SYuval Mintz /* CM PF */ 1478b5a9ee7cSAriel Elior void qed_cm_init_pf(struct qed_hwfn *p_hwfn) 1479fe56b9e6SYuval Mintz { 1480fe56b9e6SYuval Mintz /* XCM pure-LB queue */ 1481b5a9ee7cSAriel Elior STORE_RT_REG(p_hwfn, XCM_REG_CON_PHY_Q3_RT_OFFSET, 1482b5a9ee7cSAriel Elior qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB)); 1483fe56b9e6SYuval Mintz } 1484fe56b9e6SYuval Mintz 1485fe56b9e6SYuval Mintz /* DQ PF */ 1486fe56b9e6SYuval Mintz static void qed_dq_init_pf(struct qed_hwfn *p_hwfn) 1487fe56b9e6SYuval Mintz { 1488fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 14891408cc1fSYuval Mintz u32 dq_pf_max_cid = 0, dq_vf_max_cid = 0; 1490fe56b9e6SYuval Mintz 1491fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[0].cid_count >> DQ_RANGE_SHIFT); 1492fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_0_RT_OFFSET, dq_pf_max_cid); 1493fe56b9e6SYuval Mintz 14941408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[0].cids_per_vf >> DQ_RANGE_SHIFT); 14951408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_0_RT_OFFSET, dq_vf_max_cid); 14961408cc1fSYuval Mintz 1497fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[1].cid_count >> DQ_RANGE_SHIFT); 1498fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_1_RT_OFFSET, dq_pf_max_cid); 1499fe56b9e6SYuval Mintz 15001408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[1].cids_per_vf >> DQ_RANGE_SHIFT); 15011408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_1_RT_OFFSET, dq_vf_max_cid); 15021408cc1fSYuval Mintz 1503fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[2].cid_count >> DQ_RANGE_SHIFT); 1504fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_2_RT_OFFSET, dq_pf_max_cid); 1505fe56b9e6SYuval Mintz 15061408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[2].cids_per_vf >> DQ_RANGE_SHIFT); 15071408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_2_RT_OFFSET, dq_vf_max_cid); 15081408cc1fSYuval Mintz 1509fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[3].cid_count >> DQ_RANGE_SHIFT); 1510fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_3_RT_OFFSET, dq_pf_max_cid); 1511fe56b9e6SYuval Mintz 15121408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[3].cids_per_vf >> DQ_RANGE_SHIFT); 15131408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_3_RT_OFFSET, dq_vf_max_cid); 15141408cc1fSYuval Mintz 1515fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[4].cid_count >> DQ_RANGE_SHIFT); 1516fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_4_RT_OFFSET, dq_pf_max_cid); 1517fe56b9e6SYuval Mintz 15181408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[4].cids_per_vf >> DQ_RANGE_SHIFT); 15191408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_4_RT_OFFSET, dq_vf_max_cid); 15201408cc1fSYuval Mintz 1521fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[5].cid_count >> DQ_RANGE_SHIFT); 1522fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_5_RT_OFFSET, dq_pf_max_cid); 15231408cc1fSYuval Mintz 15241408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[5].cids_per_vf >> DQ_RANGE_SHIFT); 15251408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_5_RT_OFFSET, dq_vf_max_cid); 15261408cc1fSYuval Mintz 15271408cc1fSYuval Mintz /* Connection types 6 & 7 are not in use, yet they must be configured 15281408cc1fSYuval Mintz * as the highest possible connection. Not configuring them means the 15291408cc1fSYuval Mintz * defaults will be used, and with a large number of cids a bug may 15301408cc1fSYuval Mintz * occur, if the defaults will be smaller than dq_pf_max_cid / 15311408cc1fSYuval Mintz * dq_vf_max_cid. 15321408cc1fSYuval Mintz */ 15331408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_6_RT_OFFSET, dq_pf_max_cid); 15341408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_6_RT_OFFSET, dq_vf_max_cid); 15351408cc1fSYuval Mintz 15361408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_7_RT_OFFSET, dq_pf_max_cid); 15371408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_7_RT_OFFSET, dq_vf_max_cid); 1538fe56b9e6SYuval Mintz } 1539fe56b9e6SYuval Mintz 1540fe56b9e6SYuval Mintz static void qed_ilt_bounds_init(struct qed_hwfn *p_hwfn) 1541fe56b9e6SYuval Mintz { 1542fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *ilt_clients; 1543fe56b9e6SYuval Mintz int i; 1544fe56b9e6SYuval Mintz 1545fe56b9e6SYuval Mintz ilt_clients = p_hwfn->p_cxt_mngr->clients; 1546fe56b9e6SYuval Mintz for_each_ilt_valid_client(i, ilt_clients) { 1547fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, 1548fe56b9e6SYuval Mintz ilt_clients[i].first.reg, 1549fe56b9e6SYuval Mintz ilt_clients[i].first.val); 1550fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, 1551dbb799c3SYuval Mintz ilt_clients[i].last.reg, ilt_clients[i].last.val); 1552fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, 1553fe56b9e6SYuval Mintz ilt_clients[i].p_size.reg, 1554fe56b9e6SYuval Mintz ilt_clients[i].p_size.val); 1555fe56b9e6SYuval Mintz } 1556fe56b9e6SYuval Mintz } 1557fe56b9e6SYuval Mintz 15581408cc1fSYuval Mintz static void qed_ilt_vf_bounds_init(struct qed_hwfn *p_hwfn) 15591408cc1fSYuval Mintz { 15601408cc1fSYuval Mintz struct qed_ilt_client_cfg *p_cli; 15611408cc1fSYuval Mintz u32 blk_factor; 15621408cc1fSYuval Mintz 15631408cc1fSYuval Mintz /* For simplicty we set the 'block' to be an ILT page */ 15641408cc1fSYuval Mintz if (p_hwfn->cdev->p_iov_info) { 15651408cc1fSYuval Mintz struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info; 15661408cc1fSYuval Mintz 15671408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, 15681408cc1fSYuval Mintz PSWRQ2_REG_VF_BASE_RT_OFFSET, 15691408cc1fSYuval Mintz p_iov->first_vf_in_pf); 15701408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, 15711408cc1fSYuval Mintz PSWRQ2_REG_VF_LAST_ILT_RT_OFFSET, 15721408cc1fSYuval Mintz p_iov->first_vf_in_pf + p_iov->total_vfs); 15731408cc1fSYuval Mintz } 15741408cc1fSYuval Mintz 15751408cc1fSYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC]; 15761408cc1fSYuval Mintz blk_factor = ilog2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10); 15771408cc1fSYuval Mintz if (p_cli->active) { 15781408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, 15791408cc1fSYuval Mintz PSWRQ2_REG_CDUC_BLOCKS_FACTOR_RT_OFFSET, 15801408cc1fSYuval Mintz blk_factor); 15811408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, 15821408cc1fSYuval Mintz PSWRQ2_REG_CDUC_NUMBER_OF_PF_BLOCKS_RT_OFFSET, 15831408cc1fSYuval Mintz p_cli->pf_total_lines); 15841408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, 15851408cc1fSYuval Mintz PSWRQ2_REG_CDUC_VF_BLOCKS_RT_OFFSET, 15861408cc1fSYuval Mintz p_cli->vf_total_lines); 15871408cc1fSYuval Mintz } 1588dbb799c3SYuval Mintz 1589dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT]; 1590dbb799c3SYuval Mintz blk_factor = ilog2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10); 1591dbb799c3SYuval Mintz if (p_cli->active) { 1592dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1593dbb799c3SYuval Mintz PSWRQ2_REG_CDUT_BLOCKS_FACTOR_RT_OFFSET, 1594dbb799c3SYuval Mintz blk_factor); 1595dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1596dbb799c3SYuval Mintz PSWRQ2_REG_CDUT_NUMBER_OF_PF_BLOCKS_RT_OFFSET, 1597dbb799c3SYuval Mintz p_cli->pf_total_lines); 1598dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1599dbb799c3SYuval Mintz PSWRQ2_REG_CDUT_VF_BLOCKS_RT_OFFSET, 1600dbb799c3SYuval Mintz p_cli->vf_total_lines); 1601dbb799c3SYuval Mintz } 1602dbb799c3SYuval Mintz 1603dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TM]; 1604dbb799c3SYuval Mintz blk_factor = ilog2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10); 1605dbb799c3SYuval Mintz if (p_cli->active) { 1606dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1607dbb799c3SYuval Mintz PSWRQ2_REG_TM_BLOCKS_FACTOR_RT_OFFSET, blk_factor); 1608dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1609dbb799c3SYuval Mintz PSWRQ2_REG_TM_NUMBER_OF_PF_BLOCKS_RT_OFFSET, 1610dbb799c3SYuval Mintz p_cli->pf_total_lines); 1611dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1612dbb799c3SYuval Mintz PSWRQ2_REG_TM_VF_BLOCKS_RT_OFFSET, 1613dbb799c3SYuval Mintz p_cli->vf_total_lines); 1614dbb799c3SYuval Mintz } 16151408cc1fSYuval Mintz } 16161408cc1fSYuval Mintz 1617fe56b9e6SYuval Mintz /* ILT (PSWRQ2) PF */ 1618fe56b9e6SYuval Mintz static void qed_ilt_init_pf(struct qed_hwfn *p_hwfn) 1619fe56b9e6SYuval Mintz { 1620fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *clients; 1621fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr; 1622fe56b9e6SYuval Mintz struct qed_dma_mem *p_shdw; 1623fe56b9e6SYuval Mintz u32 line, rt_offst, i; 1624fe56b9e6SYuval Mintz 1625fe56b9e6SYuval Mintz qed_ilt_bounds_init(p_hwfn); 16261408cc1fSYuval Mintz qed_ilt_vf_bounds_init(p_hwfn); 1627fe56b9e6SYuval Mintz 1628fe56b9e6SYuval Mintz p_mngr = p_hwfn->p_cxt_mngr; 1629fe56b9e6SYuval Mintz p_shdw = p_mngr->ilt_shadow; 1630fe56b9e6SYuval Mintz clients = p_hwfn->p_cxt_mngr->clients; 1631fe56b9e6SYuval Mintz 1632fe56b9e6SYuval Mintz for_each_ilt_valid_client(i, clients) { 1633fe56b9e6SYuval Mintz /** Client's 1st val and RT array are absolute, ILT shadows' 1634fe56b9e6SYuval Mintz * lines are relative. 1635fe56b9e6SYuval Mintz */ 1636fe56b9e6SYuval Mintz line = clients[i].first.val - p_mngr->pf_start_line; 1637fe56b9e6SYuval Mintz rt_offst = PSWRQ2_REG_ILT_MEMORY_RT_OFFSET + 1638fe56b9e6SYuval Mintz clients[i].first.val * ILT_ENTRY_IN_REGS; 1639fe56b9e6SYuval Mintz 1640fe56b9e6SYuval Mintz for (; line <= clients[i].last.val - p_mngr->pf_start_line; 1641fe56b9e6SYuval Mintz line++, rt_offst += ILT_ENTRY_IN_REGS) { 1642fe56b9e6SYuval Mintz u64 ilt_hw_entry = 0; 1643fe56b9e6SYuval Mintz 1644fe56b9e6SYuval Mintz /** p_virt could be NULL incase of dynamic 1645fe56b9e6SYuval Mintz * allocation 1646fe56b9e6SYuval Mintz */ 1647fe56b9e6SYuval Mintz if (p_shdw[line].p_virt) { 1648fe56b9e6SYuval Mintz SET_FIELD(ilt_hw_entry, ILT_ENTRY_VALID, 1ULL); 1649fe56b9e6SYuval Mintz SET_FIELD(ilt_hw_entry, ILT_ENTRY_PHY_ADDR, 1650fe56b9e6SYuval Mintz (p_shdw[line].p_phys >> 12)); 1651fe56b9e6SYuval Mintz 1652fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 1653fe56b9e6SYuval Mintz "Setting RT[0x%08x] from ILT[0x%08x] [Client is %d] to Physical addr: 0x%llx\n", 1654fe56b9e6SYuval Mintz rt_offst, line, i, 1655fe56b9e6SYuval Mintz (u64)(p_shdw[line].p_phys >> 12)); 1656fe56b9e6SYuval Mintz } 1657fe56b9e6SYuval Mintz 1658fe56b9e6SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_offst, ilt_hw_entry); 1659fe56b9e6SYuval Mintz } 1660fe56b9e6SYuval Mintz } 1661fe56b9e6SYuval Mintz } 1662fe56b9e6SYuval Mintz 1663dbb799c3SYuval Mintz /* SRC (Searcher) PF */ 1664dbb799c3SYuval Mintz static void qed_src_init_pf(struct qed_hwfn *p_hwfn) 1665dbb799c3SYuval Mintz { 1666dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1667dbb799c3SYuval Mintz u32 rounded_conn_num, conn_num, conn_max; 1668dbb799c3SYuval Mintz struct qed_src_iids src_iids; 1669dbb799c3SYuval Mintz 1670dbb799c3SYuval Mintz memset(&src_iids, 0, sizeof(src_iids)); 1671dbb799c3SYuval Mintz qed_cxt_src_iids(p_mngr, &src_iids); 1672dbb799c3SYuval Mintz conn_num = src_iids.pf_cids + src_iids.per_vf_cids * p_mngr->vf_count; 1673dbb799c3SYuval Mintz if (!conn_num) 1674dbb799c3SYuval Mintz return; 1675dbb799c3SYuval Mintz 1676dbb799c3SYuval Mintz conn_max = max_t(u32, conn_num, SRC_MIN_NUM_ELEMS); 1677dbb799c3SYuval Mintz rounded_conn_num = roundup_pow_of_two(conn_max); 1678dbb799c3SYuval Mintz 1679dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, SRC_REG_COUNTFREE_RT_OFFSET, conn_num); 1680dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, SRC_REG_NUMBER_HASH_BITS_RT_OFFSET, 1681dbb799c3SYuval Mintz ilog2(rounded_conn_num)); 1682dbb799c3SYuval Mintz 1683dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, SRC_REG_FIRSTFREE_RT_OFFSET, 1684dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->first_free); 1685dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, SRC_REG_LASTFREE_RT_OFFSET, 1686dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->last_free); 1687dbb799c3SYuval Mintz } 1688dbb799c3SYuval Mintz 1689dbb799c3SYuval Mintz /* Timers PF */ 1690dbb799c3SYuval Mintz #define TM_CFG_NUM_IDS_SHIFT 0 1691dbb799c3SYuval Mintz #define TM_CFG_NUM_IDS_MASK 0xFFFFULL 1692dbb799c3SYuval Mintz #define TM_CFG_PRE_SCAN_OFFSET_SHIFT 16 1693dbb799c3SYuval Mintz #define TM_CFG_PRE_SCAN_OFFSET_MASK 0x1FFULL 1694dbb799c3SYuval Mintz #define TM_CFG_PARENT_PF_SHIFT 25 1695dbb799c3SYuval Mintz #define TM_CFG_PARENT_PF_MASK 0x7ULL 1696dbb799c3SYuval Mintz 1697dbb799c3SYuval Mintz #define TM_CFG_CID_PRE_SCAN_ROWS_SHIFT 30 1698dbb799c3SYuval Mintz #define TM_CFG_CID_PRE_SCAN_ROWS_MASK 0x1FFULL 1699dbb799c3SYuval Mintz 1700dbb799c3SYuval Mintz #define TM_CFG_TID_OFFSET_SHIFT 30 1701dbb799c3SYuval Mintz #define TM_CFG_TID_OFFSET_MASK 0x7FFFFULL 1702dbb799c3SYuval Mintz #define TM_CFG_TID_PRE_SCAN_ROWS_SHIFT 49 1703dbb799c3SYuval Mintz #define TM_CFG_TID_PRE_SCAN_ROWS_MASK 0x1FFULL 1704dbb799c3SYuval Mintz 1705dbb799c3SYuval Mintz static void qed_tm_init_pf(struct qed_hwfn *p_hwfn) 1706dbb799c3SYuval Mintz { 1707dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1708dbb799c3SYuval Mintz u32 active_seg_mask = 0, tm_offset, rt_reg; 1709dbb799c3SYuval Mintz struct qed_tm_iids tm_iids; 1710dbb799c3SYuval Mintz u64 cfg_word; 1711dbb799c3SYuval Mintz u8 i; 1712dbb799c3SYuval Mintz 1713dbb799c3SYuval Mintz memset(&tm_iids, 0, sizeof(tm_iids)); 171444531ba4SMichal Kalderon qed_cxt_tm_iids(p_hwfn, p_mngr, &tm_iids); 1715dbb799c3SYuval Mintz 1716dbb799c3SYuval Mintz /* @@@TBD No pre-scan for now */ 1717dbb799c3SYuval Mintz 1718dbb799c3SYuval Mintz /* Note: We assume consecutive VFs for a PF */ 1719dbb799c3SYuval Mintz for (i = 0; i < p_mngr->vf_count; i++) { 1720dbb799c3SYuval Mintz cfg_word = 0; 1721dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.per_vf_cids); 1722dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); 1723dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, p_hwfn->rel_pf_id); 1724dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_CID_PRE_SCAN_ROWS, 0); 1725dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_CONN_MEM_RT_OFFSET + 1726dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) * 1727dbb799c3SYuval Mintz (p_hwfn->cdev->p_iov_info->first_vf_in_pf + i); 1728dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word); 1729dbb799c3SYuval Mintz } 1730dbb799c3SYuval Mintz 1731dbb799c3SYuval Mintz cfg_word = 0; 1732dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.pf_cids); 1733dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); 1734dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, 0); /* n/a for PF */ 1735dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_CID_PRE_SCAN_ROWS, 0); /* scan all */ 1736dbb799c3SYuval Mintz 1737dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_CONN_MEM_RT_OFFSET + 1738dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) * 1739dbb799c3SYuval Mintz (NUM_OF_VFS(p_hwfn->cdev) + p_hwfn->rel_pf_id); 1740dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word); 1741dbb799c3SYuval Mintz 1742dbb799c3SYuval Mintz /* enale scan */ 1743dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, TM_REG_PF_ENABLE_CONN_RT_OFFSET, 1744dbb799c3SYuval Mintz tm_iids.pf_cids ? 0x1 : 0x0); 1745dbb799c3SYuval Mintz 1746dbb799c3SYuval Mintz /* @@@TBD how to enable the scan for the VFs */ 1747dbb799c3SYuval Mintz 1748dbb799c3SYuval Mintz tm_offset = tm_iids.per_vf_cids; 1749dbb799c3SYuval Mintz 1750dbb799c3SYuval Mintz /* Note: We assume consecutive VFs for a PF */ 1751dbb799c3SYuval Mintz for (i = 0; i < p_mngr->vf_count; i++) { 1752dbb799c3SYuval Mintz cfg_word = 0; 1753dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.per_vf_tids); 1754dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); 1755dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, p_hwfn->rel_pf_id); 1756dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_OFFSET, tm_offset); 1757dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_PRE_SCAN_ROWS, (u64) 0); 1758dbb799c3SYuval Mintz 1759dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_TASK_MEM_RT_OFFSET + 1760dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) * 1761dbb799c3SYuval Mintz (p_hwfn->cdev->p_iov_info->first_vf_in_pf + i); 1762dbb799c3SYuval Mintz 1763dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word); 1764dbb799c3SYuval Mintz } 1765dbb799c3SYuval Mintz 1766dbb799c3SYuval Mintz tm_offset = tm_iids.pf_cids; 1767dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) { 1768dbb799c3SYuval Mintz cfg_word = 0; 1769dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.pf_tids[i]); 1770dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); 1771dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, 0); 1772dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_OFFSET, tm_offset); 1773dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_PRE_SCAN_ROWS, (u64) 0); 1774dbb799c3SYuval Mintz 1775dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_TASK_MEM_RT_OFFSET + 1776dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) * 1777dbb799c3SYuval Mintz (NUM_OF_VFS(p_hwfn->cdev) + 1778dbb799c3SYuval Mintz p_hwfn->rel_pf_id * NUM_TASK_PF_SEGMENTS + i); 1779dbb799c3SYuval Mintz 1780dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word); 17811a635e48SYuval Mintz active_seg_mask |= (tm_iids.pf_tids[i] ? BIT(i) : 0); 1782dbb799c3SYuval Mintz 1783dbb799c3SYuval Mintz tm_offset += tm_iids.pf_tids[i]; 1784dbb799c3SYuval Mintz } 1785dbb799c3SYuval Mintz 1786dbb799c3SYuval Mintz if (p_hwfn->hw_info.personality == QED_PCI_ETH_ROCE) 1787dbb799c3SYuval Mintz active_seg_mask = 0; 1788dbb799c3SYuval Mintz 1789dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, TM_REG_PF_ENABLE_TASK_RT_OFFSET, active_seg_mask); 1790dbb799c3SYuval Mintz 1791dbb799c3SYuval Mintz /* @@@TBD how to enable the scan for the VFs */ 1792dbb799c3SYuval Mintz } 1793dbb799c3SYuval Mintz 17941e128c81SArun Easi static void qed_prs_init_common(struct qed_hwfn *p_hwfn) 17951e128c81SArun Easi { 17961e128c81SArun Easi if ((p_hwfn->hw_info.personality == QED_PCI_FCOE) && 17971e128c81SArun Easi p_hwfn->pf_params.fcoe_pf_params.is_target) 17981e128c81SArun Easi STORE_RT_REG(p_hwfn, 17991e128c81SArun Easi PRS_REG_SEARCH_RESP_INITIATOR_TYPE_RT_OFFSET, 0); 18001e128c81SArun Easi } 18011e128c81SArun Easi 18021e128c81SArun Easi static void qed_prs_init_pf(struct qed_hwfn *p_hwfn) 18031e128c81SArun Easi { 18041e128c81SArun Easi struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 18051e128c81SArun Easi struct qed_conn_type_cfg *p_fcoe; 18061e128c81SArun Easi struct qed_tid_seg *p_tid; 18071e128c81SArun Easi 18081e128c81SArun Easi p_fcoe = &p_mngr->conn_cfg[PROTOCOLID_FCOE]; 18091e128c81SArun Easi 18101e128c81SArun Easi /* If FCoE is active set the MAX OX_ID (tid) in the Parser */ 18111e128c81SArun Easi if (!p_fcoe->cid_count) 18121e128c81SArun Easi return; 18131e128c81SArun Easi 18141e128c81SArun Easi p_tid = &p_fcoe->tid_seg[QED_CXT_FCOE_TID_SEG]; 18151e128c81SArun Easi if (p_hwfn->pf_params.fcoe_pf_params.is_target) { 18161e128c81SArun Easi STORE_RT_REG_AGG(p_hwfn, 18171e128c81SArun Easi PRS_REG_TASK_ID_MAX_TARGET_PF_RT_OFFSET, 18181e128c81SArun Easi p_tid->count); 18191e128c81SArun Easi } else { 18201e128c81SArun Easi STORE_RT_REG_AGG(p_hwfn, 18211e128c81SArun Easi PRS_REG_TASK_ID_MAX_INITIATOR_PF_RT_OFFSET, 18221e128c81SArun Easi p_tid->count); 18231e128c81SArun Easi } 18241e128c81SArun Easi } 18251e128c81SArun Easi 1826fe56b9e6SYuval Mintz void qed_cxt_hw_init_common(struct qed_hwfn *p_hwfn) 1827fe56b9e6SYuval Mintz { 1828fe56b9e6SYuval Mintz qed_cdu_init_common(p_hwfn); 18291e128c81SArun Easi qed_prs_init_common(p_hwfn); 1830fe56b9e6SYuval Mintz } 1831fe56b9e6SYuval Mintz 183215582962SRahul Verma void qed_cxt_hw_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 1833fe56b9e6SYuval Mintz { 183415582962SRahul Verma qed_qm_init_pf(p_hwfn, p_ptt); 1835fe56b9e6SYuval Mintz qed_cm_init_pf(p_hwfn); 1836fe56b9e6SYuval Mintz qed_dq_init_pf(p_hwfn); 1837dbb799c3SYuval Mintz qed_cdu_init_pf(p_hwfn); 1838fe56b9e6SYuval Mintz qed_ilt_init_pf(p_hwfn); 1839dbb799c3SYuval Mintz qed_src_init_pf(p_hwfn); 1840dbb799c3SYuval Mintz qed_tm_init_pf(p_hwfn); 18411e128c81SArun Easi qed_prs_init_pf(p_hwfn); 1842fe56b9e6SYuval Mintz } 1843fe56b9e6SYuval Mintz 1844fe56b9e6SYuval Mintz int qed_cxt_acquire_cid(struct qed_hwfn *p_hwfn, 18451a635e48SYuval Mintz enum protocol_type type, u32 *p_cid) 1846fe56b9e6SYuval Mintz { 1847fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1848fe56b9e6SYuval Mintz u32 rel_cid; 1849fe56b9e6SYuval Mintz 1850fe56b9e6SYuval Mintz if (type >= MAX_CONN_TYPES || !p_mngr->acquired[type].cid_map) { 1851fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Invalid protocol type %d", type); 1852fe56b9e6SYuval Mintz return -EINVAL; 1853fe56b9e6SYuval Mintz } 1854fe56b9e6SYuval Mintz 1855fe56b9e6SYuval Mintz rel_cid = find_first_zero_bit(p_mngr->acquired[type].cid_map, 1856fe56b9e6SYuval Mintz p_mngr->acquired[type].max_count); 1857fe56b9e6SYuval Mintz 1858fe56b9e6SYuval Mintz if (rel_cid >= p_mngr->acquired[type].max_count) { 18591a635e48SYuval Mintz DP_NOTICE(p_hwfn, "no CID available for protocol %d\n", type); 1860fe56b9e6SYuval Mintz return -EINVAL; 1861fe56b9e6SYuval Mintz } 1862fe56b9e6SYuval Mintz 1863fe56b9e6SYuval Mintz __set_bit(rel_cid, p_mngr->acquired[type].cid_map); 1864fe56b9e6SYuval Mintz 1865fe56b9e6SYuval Mintz *p_cid = rel_cid + p_mngr->acquired[type].start_cid; 1866fe56b9e6SYuval Mintz 1867fe56b9e6SYuval Mintz return 0; 1868fe56b9e6SYuval Mintz } 1869fe56b9e6SYuval Mintz 1870fe56b9e6SYuval Mintz static bool qed_cxt_test_cid_acquired(struct qed_hwfn *p_hwfn, 18711a635e48SYuval Mintz u32 cid, enum protocol_type *p_type) 1872fe56b9e6SYuval Mintz { 1873fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1874fe56b9e6SYuval Mintz struct qed_cid_acquired_map *p_map; 1875fe56b9e6SYuval Mintz enum protocol_type p; 1876fe56b9e6SYuval Mintz u32 rel_cid; 1877fe56b9e6SYuval Mintz 1878fe56b9e6SYuval Mintz /* Iterate over protocols and find matching cid range */ 1879fe56b9e6SYuval Mintz for (p = 0; p < MAX_CONN_TYPES; p++) { 1880fe56b9e6SYuval Mintz p_map = &p_mngr->acquired[p]; 1881fe56b9e6SYuval Mintz 1882fe56b9e6SYuval Mintz if (!p_map->cid_map) 1883fe56b9e6SYuval Mintz continue; 1884fe56b9e6SYuval Mintz if (cid >= p_map->start_cid && 1885fe56b9e6SYuval Mintz cid < p_map->start_cid + p_map->max_count) 1886fe56b9e6SYuval Mintz break; 1887fe56b9e6SYuval Mintz } 1888fe56b9e6SYuval Mintz *p_type = p; 1889fe56b9e6SYuval Mintz 1890fe56b9e6SYuval Mintz if (p == MAX_CONN_TYPES) { 1891fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Invalid CID %d", cid); 1892fe56b9e6SYuval Mintz return false; 1893fe56b9e6SYuval Mintz } 1894fe56b9e6SYuval Mintz 1895fe56b9e6SYuval Mintz rel_cid = cid - p_map->start_cid; 1896fe56b9e6SYuval Mintz if (!test_bit(rel_cid, p_map->cid_map)) { 1897fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "CID %d not acquired", cid); 1898fe56b9e6SYuval Mintz return false; 1899fe56b9e6SYuval Mintz } 1900fe56b9e6SYuval Mintz return true; 1901fe56b9e6SYuval Mintz } 1902fe56b9e6SYuval Mintz 19031a635e48SYuval Mintz void qed_cxt_release_cid(struct qed_hwfn *p_hwfn, u32 cid) 1904fe56b9e6SYuval Mintz { 1905fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1906fe56b9e6SYuval Mintz enum protocol_type type; 1907fe56b9e6SYuval Mintz bool b_acquired; 1908fe56b9e6SYuval Mintz u32 rel_cid; 1909fe56b9e6SYuval Mintz 1910fe56b9e6SYuval Mintz /* Test acquired and find matching per-protocol map */ 1911fe56b9e6SYuval Mintz b_acquired = qed_cxt_test_cid_acquired(p_hwfn, cid, &type); 1912fe56b9e6SYuval Mintz 1913fe56b9e6SYuval Mintz if (!b_acquired) 1914fe56b9e6SYuval Mintz return; 1915fe56b9e6SYuval Mintz 1916fe56b9e6SYuval Mintz rel_cid = cid - p_mngr->acquired[type].start_cid; 1917fe56b9e6SYuval Mintz __clear_bit(rel_cid, p_mngr->acquired[type].cid_map); 1918fe56b9e6SYuval Mintz } 1919fe56b9e6SYuval Mintz 19201a635e48SYuval Mintz int qed_cxt_get_cid_info(struct qed_hwfn *p_hwfn, struct qed_cxt_info *p_info) 1921fe56b9e6SYuval Mintz { 1922fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1923fe56b9e6SYuval Mintz u32 conn_cxt_size, hw_p_size, cxts_per_p, line; 1924fe56b9e6SYuval Mintz enum protocol_type type; 1925fe56b9e6SYuval Mintz bool b_acquired; 1926fe56b9e6SYuval Mintz 1927fe56b9e6SYuval Mintz /* Test acquired and find matching per-protocol map */ 1928fe56b9e6SYuval Mintz b_acquired = qed_cxt_test_cid_acquired(p_hwfn, p_info->iid, &type); 1929fe56b9e6SYuval Mintz 1930fe56b9e6SYuval Mintz if (!b_acquired) 1931fe56b9e6SYuval Mintz return -EINVAL; 1932fe56b9e6SYuval Mintz 1933fe56b9e6SYuval Mintz /* set the protocl type */ 1934fe56b9e6SYuval Mintz p_info->type = type; 1935fe56b9e6SYuval Mintz 1936fe56b9e6SYuval Mintz /* compute context virtual pointer */ 1937fe56b9e6SYuval Mintz hw_p_size = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC].p_size.val; 1938fe56b9e6SYuval Mintz 1939fe56b9e6SYuval Mintz conn_cxt_size = CONN_CXT_SIZE(p_hwfn); 1940fe56b9e6SYuval Mintz cxts_per_p = ILT_PAGE_IN_BYTES(hw_p_size) / conn_cxt_size; 1941fe56b9e6SYuval Mintz line = p_info->iid / cxts_per_p; 1942fe56b9e6SYuval Mintz 1943fe56b9e6SYuval Mintz /* Make sure context is allocated (dynamic allocation) */ 1944fe56b9e6SYuval Mintz if (!p_mngr->ilt_shadow[line].p_virt) 1945fe56b9e6SYuval Mintz return -EINVAL; 1946fe56b9e6SYuval Mintz 1947fe56b9e6SYuval Mintz p_info->p_cxt = p_mngr->ilt_shadow[line].p_virt + 1948fe56b9e6SYuval Mintz p_info->iid % cxts_per_p * conn_cxt_size; 1949fe56b9e6SYuval Mintz 1950fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_ILT | QED_MSG_CXT), 1951fe56b9e6SYuval Mintz "Accessing ILT shadow[%d]: CXT pointer is at %p (for iid %d)\n", 1952fe56b9e6SYuval Mintz p_info->iid / cxts_per_p, p_info->p_cxt, p_info->iid); 1953fe56b9e6SYuval Mintz 1954fe56b9e6SYuval Mintz return 0; 1955fe56b9e6SYuval Mintz } 1956fe56b9e6SYuval Mintz 19578c93beafSYuval Mintz static void qed_rdma_set_pf_params(struct qed_hwfn *p_hwfn, 1958f9dc4d1fSRam Amrani struct qed_rdma_pf_params *p_params, 1959f9dc4d1fSRam Amrani u32 num_tasks) 1960dbb799c3SYuval Mintz { 1961f9dc4d1fSRam Amrani u32 num_cons, num_qps, num_srqs; 1962dbb799c3SYuval Mintz enum protocol_type proto; 1963dbb799c3SYuval Mintz 1964dbb799c3SYuval Mintz num_srqs = min_t(u32, 32 * 1024, p_params->num_srqs); 1965dbb799c3SYuval Mintz 1966dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) { 1967dbb799c3SYuval Mintz case QED_PCI_ETH_ROCE: 1968dbb799c3SYuval Mintz num_qps = min_t(u32, ROCE_MAX_QPS, p_params->num_qps); 1969dbb799c3SYuval Mintz num_cons = num_qps * 2; /* each QP requires two connections */ 1970dbb799c3SYuval Mintz proto = PROTOCOLID_ROCE; 1971dbb799c3SYuval Mintz break; 1972dbb799c3SYuval Mintz default: 1973dbb799c3SYuval Mintz return; 1974dbb799c3SYuval Mintz } 1975dbb799c3SYuval Mintz 1976dbb799c3SYuval Mintz if (num_cons && num_tasks) { 1977dbb799c3SYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, proto, num_cons, 0); 1978dbb799c3SYuval Mintz 1979dbb799c3SYuval Mintz /* Deliberatly passing ROCE for tasks id. This is because 1980dbb799c3SYuval Mintz * iWARP / RoCE share the task id. 1981dbb799c3SYuval Mintz */ 1982dbb799c3SYuval Mintz qed_cxt_set_proto_tid_count(p_hwfn, PROTOCOLID_ROCE, 1983dbb799c3SYuval Mintz QED_CXT_ROCE_TID_SEG, 1, 1984dbb799c3SYuval Mintz num_tasks, false); 1985dbb799c3SYuval Mintz qed_cxt_set_srq_count(p_hwfn, num_srqs); 1986dbb799c3SYuval Mintz } else { 1987dbb799c3SYuval Mintz DP_INFO(p_hwfn->cdev, 1988dbb799c3SYuval Mintz "RDMA personality used without setting params!\n"); 1989dbb799c3SYuval Mintz } 1990dbb799c3SYuval Mintz } 1991dbb799c3SYuval Mintz 1992f9dc4d1fSRam Amrani int qed_cxt_set_pf_params(struct qed_hwfn *p_hwfn, u32 rdma_tasks) 1993fe56b9e6SYuval Mintz { 1994fe56b9e6SYuval Mintz /* Set the number of required CORE connections */ 1995fe56b9e6SYuval Mintz u32 core_cids = 1; /* SPQ */ 1996fe56b9e6SYuval Mintz 19970a7fb11cSYuval Mintz if (p_hwfn->using_ll2) 19980a7fb11cSYuval Mintz core_cids += 4; 19991408cc1fSYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, PROTOCOLID_CORE, core_cids, 0); 2000fe56b9e6SYuval Mintz 2001dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) { 2002dbb799c3SYuval Mintz case QED_PCI_ETH_ROCE: 2003dbb799c3SYuval Mintz { 2004dbb799c3SYuval Mintz qed_rdma_set_pf_params(p_hwfn, 2005dbb799c3SYuval Mintz &p_hwfn-> 2006f9dc4d1fSRam Amrani pf_params.rdma_pf_params, 2007f9dc4d1fSRam Amrani rdma_tasks); 2008dbb799c3SYuval Mintz /* no need for break since RoCE coexist with Ethernet */ 2009dbb799c3SYuval Mintz } 2010dbb799c3SYuval Mintz case QED_PCI_ETH: 2011dbb799c3SYuval Mintz { 2012dbb799c3SYuval Mintz struct qed_eth_pf_params *p_params = 2013dbb799c3SYuval Mintz &p_hwfn->pf_params.eth_pf_params; 2014dbb799c3SYuval Mintz 2015fe56b9e6SYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, PROTOCOLID_ETH, 20161408cc1fSYuval Mintz p_params->num_cons, 1); 2017d51e4af5SChopra, Manish p_hwfn->p_cxt_mngr->arfs_count = p_params->num_arfs_filters; 2018dbb799c3SYuval Mintz break; 2019dbb799c3SYuval Mintz } 20201e128c81SArun Easi case QED_PCI_FCOE: 20211e128c81SArun Easi { 20221e128c81SArun Easi struct qed_fcoe_pf_params *p_params; 20231e128c81SArun Easi 20241e128c81SArun Easi p_params = &p_hwfn->pf_params.fcoe_pf_params; 20251e128c81SArun Easi 20261e128c81SArun Easi if (p_params->num_cons && p_params->num_tasks) { 20271e128c81SArun Easi qed_cxt_set_proto_cid_count(p_hwfn, 20281e128c81SArun Easi PROTOCOLID_FCOE, 20291e128c81SArun Easi p_params->num_cons, 20301e128c81SArun Easi 0); 20311e128c81SArun Easi 20321e128c81SArun Easi qed_cxt_set_proto_tid_count(p_hwfn, PROTOCOLID_FCOE, 20331e128c81SArun Easi QED_CXT_FCOE_TID_SEG, 0, 20341e128c81SArun Easi p_params->num_tasks, true); 20351e128c81SArun Easi } else { 20361e128c81SArun Easi DP_INFO(p_hwfn->cdev, 20371e128c81SArun Easi "Fcoe personality used without setting params!\n"); 20381e128c81SArun Easi } 20391e128c81SArun Easi break; 20401e128c81SArun Easi } 2041dbb799c3SYuval Mintz case QED_PCI_ISCSI: 2042dbb799c3SYuval Mintz { 2043dbb799c3SYuval Mintz struct qed_iscsi_pf_params *p_params; 2044dbb799c3SYuval Mintz 2045dbb799c3SYuval Mintz p_params = &p_hwfn->pf_params.iscsi_pf_params; 2046dbb799c3SYuval Mintz 2047dbb799c3SYuval Mintz if (p_params->num_cons && p_params->num_tasks) { 2048dbb799c3SYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, 2049dbb799c3SYuval Mintz PROTOCOLID_ISCSI, 2050dbb799c3SYuval Mintz p_params->num_cons, 2051dbb799c3SYuval Mintz 0); 2052dbb799c3SYuval Mintz 2053dbb799c3SYuval Mintz qed_cxt_set_proto_tid_count(p_hwfn, 2054dbb799c3SYuval Mintz PROTOCOLID_ISCSI, 2055dbb799c3SYuval Mintz QED_CXT_ISCSI_TID_SEG, 2056dbb799c3SYuval Mintz 0, 2057dbb799c3SYuval Mintz p_params->num_tasks, 2058dbb799c3SYuval Mintz true); 2059dbb799c3SYuval Mintz } else { 2060dbb799c3SYuval Mintz DP_INFO(p_hwfn->cdev, 2061dbb799c3SYuval Mintz "Iscsi personality used without setting params!\n"); 2062dbb799c3SYuval Mintz } 2063dbb799c3SYuval Mintz break; 2064dbb799c3SYuval Mintz } 2065dbb799c3SYuval Mintz default: 2066dbb799c3SYuval Mintz return -EINVAL; 2067dbb799c3SYuval Mintz } 2068dbb799c3SYuval Mintz 2069dbb799c3SYuval Mintz return 0; 2070dbb799c3SYuval Mintz } 2071dbb799c3SYuval Mintz 2072dbb799c3SYuval Mintz int qed_cxt_get_tid_mem_info(struct qed_hwfn *p_hwfn, 2073dbb799c3SYuval Mintz struct qed_tid_mem *p_info) 2074dbb799c3SYuval Mintz { 2075dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 2076dbb799c3SYuval Mintz u32 proto, seg, total_lines, i, shadow_line; 2077dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 2078dbb799c3SYuval Mintz struct qed_ilt_cli_blk *p_fl_seg; 2079dbb799c3SYuval Mintz struct qed_tid_seg *p_seg_info; 2080dbb799c3SYuval Mintz 2081dbb799c3SYuval Mintz /* Verify the personality */ 2082dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) { 20831e128c81SArun Easi case QED_PCI_FCOE: 20841e128c81SArun Easi proto = PROTOCOLID_FCOE; 20851e128c81SArun Easi seg = QED_CXT_FCOE_TID_SEG; 20861e128c81SArun Easi break; 2087dbb799c3SYuval Mintz case QED_PCI_ISCSI: 2088dbb799c3SYuval Mintz proto = PROTOCOLID_ISCSI; 2089dbb799c3SYuval Mintz seg = QED_CXT_ISCSI_TID_SEG; 2090dbb799c3SYuval Mintz break; 2091dbb799c3SYuval Mintz default: 2092dbb799c3SYuval Mintz return -EINVAL; 2093dbb799c3SYuval Mintz } 2094dbb799c3SYuval Mintz 2095dbb799c3SYuval Mintz p_cli = &p_mngr->clients[ILT_CLI_CDUT]; 2096dbb799c3SYuval Mintz if (!p_cli->active) 2097dbb799c3SYuval Mintz return -EINVAL; 2098dbb799c3SYuval Mintz 2099dbb799c3SYuval Mintz p_seg_info = &p_mngr->conn_cfg[proto].tid_seg[seg]; 2100dbb799c3SYuval Mintz if (!p_seg_info->has_fl_mem) 2101dbb799c3SYuval Mintz return -EINVAL; 2102dbb799c3SYuval Mintz 2103dbb799c3SYuval Mintz p_fl_seg = &p_cli->pf_blks[CDUT_FL_SEG_BLK(seg, PF)]; 2104dbb799c3SYuval Mintz total_lines = DIV_ROUND_UP(p_fl_seg->total_size, 2105dbb799c3SYuval Mintz p_fl_seg->real_size_in_page); 2106dbb799c3SYuval Mintz 2107dbb799c3SYuval Mintz for (i = 0; i < total_lines; i++) { 2108dbb799c3SYuval Mintz shadow_line = i + p_fl_seg->start_line - 2109dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->pf_start_line; 2110dbb799c3SYuval Mintz p_info->blocks[i] = p_mngr->ilt_shadow[shadow_line].p_virt; 2111dbb799c3SYuval Mintz } 2112dbb799c3SYuval Mintz p_info->waste = ILT_PAGE_IN_BYTES(p_cli->p_size.val) - 2113dbb799c3SYuval Mintz p_fl_seg->real_size_in_page; 2114dbb799c3SYuval Mintz p_info->tid_size = p_mngr->task_type_size[p_seg_info->type]; 2115dbb799c3SYuval Mintz p_info->num_tids_per_block = p_fl_seg->real_size_in_page / 2116dbb799c3SYuval Mintz p_info->tid_size; 2117dbb799c3SYuval Mintz 2118dbb799c3SYuval Mintz return 0; 2119dbb799c3SYuval Mintz } 2120dbb799c3SYuval Mintz 2121dbb799c3SYuval Mintz /* This function is very RoCE oriented, if another protocol in the future 2122dbb799c3SYuval Mintz * will want this feature we'll need to modify the function to be more generic 2123dbb799c3SYuval Mintz */ 2124dbb799c3SYuval Mintz int 2125dbb799c3SYuval Mintz qed_cxt_dynamic_ilt_alloc(struct qed_hwfn *p_hwfn, 2126dbb799c3SYuval Mintz enum qed_cxt_elem_type elem_type, u32 iid) 2127dbb799c3SYuval Mintz { 2128dbb799c3SYuval Mintz u32 reg_offset, shadow_line, elem_size, hw_p_size, elems_per_p, line; 2129dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 2130dbb799c3SYuval Mintz struct qed_ilt_cli_blk *p_blk; 2131dbb799c3SYuval Mintz struct qed_ptt *p_ptt; 2132dbb799c3SYuval Mintz dma_addr_t p_phys; 2133dbb799c3SYuval Mintz u64 ilt_hw_entry; 2134dbb799c3SYuval Mintz void *p_virt; 2135dbb799c3SYuval Mintz int rc = 0; 2136dbb799c3SYuval Mintz 2137dbb799c3SYuval Mintz switch (elem_type) { 2138dbb799c3SYuval Mintz case QED_ELEM_CXT: 2139dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC]; 2140dbb799c3SYuval Mintz elem_size = CONN_CXT_SIZE(p_hwfn); 2141dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUC_BLK]; 2142dbb799c3SYuval Mintz break; 2143dbb799c3SYuval Mintz case QED_ELEM_SRQ: 2144dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM]; 2145dbb799c3SYuval Mintz elem_size = SRQ_CXT_SIZE; 2146dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[SRQ_BLK]; 2147dbb799c3SYuval Mintz break; 2148dbb799c3SYuval Mintz case QED_ELEM_TASK: 2149dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT]; 2150dbb799c3SYuval Mintz elem_size = TYPE1_TASK_CXT_SIZE(p_hwfn); 2151dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUT_SEG_BLK(QED_CXT_ROCE_TID_SEG)]; 2152dbb799c3SYuval Mintz break; 2153dbb799c3SYuval Mintz default: 2154dbb799c3SYuval Mintz DP_NOTICE(p_hwfn, "-EINVALID elem type = %d", elem_type); 2155dbb799c3SYuval Mintz return -EINVAL; 2156dbb799c3SYuval Mintz } 2157dbb799c3SYuval Mintz 2158dbb799c3SYuval Mintz /* Calculate line in ilt */ 2159dbb799c3SYuval Mintz hw_p_size = p_cli->p_size.val; 2160dbb799c3SYuval Mintz elems_per_p = ILT_PAGE_IN_BYTES(hw_p_size) / elem_size; 2161dbb799c3SYuval Mintz line = p_blk->start_line + (iid / elems_per_p); 2162dbb799c3SYuval Mintz shadow_line = line - p_hwfn->p_cxt_mngr->pf_start_line; 2163dbb799c3SYuval Mintz 2164dbb799c3SYuval Mintz /* If line is already allocated, do nothing, otherwise allocate it and 2165dbb799c3SYuval Mintz * write it to the PSWRQ2 registers. 2166dbb799c3SYuval Mintz * This section can be run in parallel from different contexts and thus 2167dbb799c3SYuval Mintz * a mutex protection is needed. 2168dbb799c3SYuval Mintz */ 2169dbb799c3SYuval Mintz 2170dbb799c3SYuval Mintz mutex_lock(&p_hwfn->p_cxt_mngr->mutex); 2171dbb799c3SYuval Mintz 2172dbb799c3SYuval Mintz if (p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].p_virt) 2173dbb799c3SYuval Mintz goto out0; 2174dbb799c3SYuval Mintz 2175dbb799c3SYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn); 2176dbb799c3SYuval Mintz if (!p_ptt) { 2177dbb799c3SYuval Mintz DP_NOTICE(p_hwfn, 2178dbb799c3SYuval Mintz "QED_TIME_OUT on ptt acquire - dynamic allocation"); 2179dbb799c3SYuval Mintz rc = -EBUSY; 2180dbb799c3SYuval Mintz goto out0; 2181dbb799c3SYuval Mintz } 2182dbb799c3SYuval Mintz 2183dbb799c3SYuval Mintz p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 2184dbb799c3SYuval Mintz p_blk->real_size_in_page, 2185dbb799c3SYuval Mintz &p_phys, GFP_KERNEL); 2186dbb799c3SYuval Mintz if (!p_virt) { 2187dbb799c3SYuval Mintz rc = -ENOMEM; 2188dbb799c3SYuval Mintz goto out1; 2189dbb799c3SYuval Mintz } 2190dbb799c3SYuval Mintz memset(p_virt, 0, p_blk->real_size_in_page); 2191dbb799c3SYuval Mintz 2192dbb799c3SYuval Mintz /* configuration of refTagMask to 0xF is required for RoCE DIF MR only, 2193dbb799c3SYuval Mintz * to compensate for a HW bug, but it is configured even if DIF is not 2194dbb799c3SYuval Mintz * enabled. This is harmless and allows us to avoid a dedicated API. We 2195dbb799c3SYuval Mintz * configure the field for all of the contexts on the newly allocated 2196dbb799c3SYuval Mintz * page. 2197dbb799c3SYuval Mintz */ 2198dbb799c3SYuval Mintz if (elem_type == QED_ELEM_TASK) { 2199dbb799c3SYuval Mintz u32 elem_i; 2200dbb799c3SYuval Mintz u8 *elem_start = (u8 *)p_virt; 2201dbb799c3SYuval Mintz union type1_task_context *elem; 2202dbb799c3SYuval Mintz 2203dbb799c3SYuval Mintz for (elem_i = 0; elem_i < elems_per_p; elem_i++) { 2204dbb799c3SYuval Mintz elem = (union type1_task_context *)elem_start; 2205dbb799c3SYuval Mintz SET_FIELD(elem->roce_ctx.tdif_context.flags1, 2206dbb799c3SYuval Mintz TDIF_TASK_CONTEXT_REFTAGMASK, 0xf); 2207dbb799c3SYuval Mintz elem_start += TYPE1_TASK_CXT_SIZE(p_hwfn); 2208dbb799c3SYuval Mintz } 2209dbb799c3SYuval Mintz } 2210dbb799c3SYuval Mintz 2211dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].p_virt = p_virt; 2212dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].p_phys = p_phys; 2213dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].size = 2214dbb799c3SYuval Mintz p_blk->real_size_in_page; 2215dbb799c3SYuval Mintz 2216dbb799c3SYuval Mintz /* compute absolute offset */ 2217dbb799c3SYuval Mintz reg_offset = PSWRQ2_REG_ILT_MEMORY + 2218dbb799c3SYuval Mintz (line * ILT_REG_SIZE_IN_BYTES * ILT_ENTRY_IN_REGS); 2219dbb799c3SYuval Mintz 2220dbb799c3SYuval Mintz ilt_hw_entry = 0; 2221dbb799c3SYuval Mintz SET_FIELD(ilt_hw_entry, ILT_ENTRY_VALID, 1ULL); 2222dbb799c3SYuval Mintz SET_FIELD(ilt_hw_entry, 2223dbb799c3SYuval Mintz ILT_ENTRY_PHY_ADDR, 2224dbb799c3SYuval Mintz (p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].p_phys >> 12)); 2225dbb799c3SYuval Mintz 2226dbb799c3SYuval Mintz /* Write via DMAE since the PSWRQ2_REG_ILT_MEMORY line is a wide-bus */ 2227dbb799c3SYuval Mintz qed_dmae_host2grc(p_hwfn, p_ptt, (u64) (uintptr_t)&ilt_hw_entry, 2228dbb799c3SYuval Mintz reg_offset, sizeof(ilt_hw_entry) / sizeof(u32), 0); 2229dbb799c3SYuval Mintz 2230dbb799c3SYuval Mintz if (elem_type == QED_ELEM_CXT) { 2231dbb799c3SYuval Mintz u32 last_cid_allocated = (1 + (iid / elems_per_p)) * 2232dbb799c3SYuval Mintz elems_per_p; 2233dbb799c3SYuval Mintz 2234dbb799c3SYuval Mintz /* Update the relevant register in the parser */ 2235dbb799c3SYuval Mintz qed_wr(p_hwfn, p_ptt, PRS_REG_ROCE_DEST_QP_MAX_PF, 2236dbb799c3SYuval Mintz last_cid_allocated - 1); 2237dbb799c3SYuval Mintz 2238dbb799c3SYuval Mintz if (!p_hwfn->b_rdma_enabled_in_prs) { 2239dbb799c3SYuval Mintz /* Enable RoCE search */ 2240dbb799c3SYuval Mintz qed_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 1); 2241dbb799c3SYuval Mintz p_hwfn->b_rdma_enabled_in_prs = true; 2242dbb799c3SYuval Mintz } 2243dbb799c3SYuval Mintz } 2244dbb799c3SYuval Mintz 2245dbb799c3SYuval Mintz out1: 2246dbb799c3SYuval Mintz qed_ptt_release(p_hwfn, p_ptt); 2247dbb799c3SYuval Mintz out0: 2248dbb799c3SYuval Mintz mutex_unlock(&p_hwfn->p_cxt_mngr->mutex); 2249dbb799c3SYuval Mintz 2250dbb799c3SYuval Mintz return rc; 2251dbb799c3SYuval Mintz } 2252dbb799c3SYuval Mintz 2253dbb799c3SYuval Mintz /* This function is very RoCE oriented, if another protocol in the future 2254dbb799c3SYuval Mintz * will want this feature we'll need to modify the function to be more generic 2255dbb799c3SYuval Mintz */ 2256dbb799c3SYuval Mintz static int 2257dbb799c3SYuval Mintz qed_cxt_free_ilt_range(struct qed_hwfn *p_hwfn, 2258dbb799c3SYuval Mintz enum qed_cxt_elem_type elem_type, 2259dbb799c3SYuval Mintz u32 start_iid, u32 count) 2260dbb799c3SYuval Mintz { 2261dbb799c3SYuval Mintz u32 start_line, end_line, shadow_start_line, shadow_end_line; 2262dbb799c3SYuval Mintz u32 reg_offset, elem_size, hw_p_size, elems_per_p; 2263dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 2264dbb799c3SYuval Mintz struct qed_ilt_cli_blk *p_blk; 2265dbb799c3SYuval Mintz u32 end_iid = start_iid + count; 2266dbb799c3SYuval Mintz struct qed_ptt *p_ptt; 2267dbb799c3SYuval Mintz u64 ilt_hw_entry = 0; 2268dbb799c3SYuval Mintz u32 i; 2269dbb799c3SYuval Mintz 2270dbb799c3SYuval Mintz switch (elem_type) { 2271dbb799c3SYuval Mintz case QED_ELEM_CXT: 2272dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC]; 2273dbb799c3SYuval Mintz elem_size = CONN_CXT_SIZE(p_hwfn); 2274dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUC_BLK]; 2275dbb799c3SYuval Mintz break; 2276dbb799c3SYuval Mintz case QED_ELEM_SRQ: 2277dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM]; 2278dbb799c3SYuval Mintz elem_size = SRQ_CXT_SIZE; 2279dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[SRQ_BLK]; 2280dbb799c3SYuval Mintz break; 2281dbb799c3SYuval Mintz case QED_ELEM_TASK: 2282dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT]; 2283dbb799c3SYuval Mintz elem_size = TYPE1_TASK_CXT_SIZE(p_hwfn); 2284dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUT_SEG_BLK(QED_CXT_ROCE_TID_SEG)]; 2285dbb799c3SYuval Mintz break; 2286dbb799c3SYuval Mintz default: 2287dbb799c3SYuval Mintz DP_NOTICE(p_hwfn, "-EINVALID elem type = %d", elem_type); 2288dbb799c3SYuval Mintz return -EINVAL; 2289dbb799c3SYuval Mintz } 2290dbb799c3SYuval Mintz 2291dbb799c3SYuval Mintz /* Calculate line in ilt */ 2292dbb799c3SYuval Mintz hw_p_size = p_cli->p_size.val; 2293dbb799c3SYuval Mintz elems_per_p = ILT_PAGE_IN_BYTES(hw_p_size) / elem_size; 2294dbb799c3SYuval Mintz start_line = p_blk->start_line + (start_iid / elems_per_p); 2295dbb799c3SYuval Mintz end_line = p_blk->start_line + (end_iid / elems_per_p); 2296dbb799c3SYuval Mintz if (((end_iid + 1) / elems_per_p) != (end_iid / elems_per_p)) 2297dbb799c3SYuval Mintz end_line--; 2298dbb799c3SYuval Mintz 2299dbb799c3SYuval Mintz shadow_start_line = start_line - p_hwfn->p_cxt_mngr->pf_start_line; 2300dbb799c3SYuval Mintz shadow_end_line = end_line - p_hwfn->p_cxt_mngr->pf_start_line; 2301dbb799c3SYuval Mintz 2302dbb799c3SYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn); 2303dbb799c3SYuval Mintz if (!p_ptt) { 2304dbb799c3SYuval Mintz DP_NOTICE(p_hwfn, 2305dbb799c3SYuval Mintz "QED_TIME_OUT on ptt acquire - dynamic allocation"); 2306dbb799c3SYuval Mintz return -EBUSY; 2307dbb799c3SYuval Mintz } 2308dbb799c3SYuval Mintz 2309dbb799c3SYuval Mintz for (i = shadow_start_line; i < shadow_end_line; i++) { 2310dbb799c3SYuval Mintz if (!p_hwfn->p_cxt_mngr->ilt_shadow[i].p_virt) 2311dbb799c3SYuval Mintz continue; 2312dbb799c3SYuval Mintz 2313dbb799c3SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev, 2314dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].size, 2315dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].p_virt, 2316dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].p_phys); 2317dbb799c3SYuval Mintz 2318dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].p_virt = NULL; 2319dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].p_phys = 0; 2320dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].size = 0; 2321dbb799c3SYuval Mintz 2322dbb799c3SYuval Mintz /* compute absolute offset */ 2323dbb799c3SYuval Mintz reg_offset = PSWRQ2_REG_ILT_MEMORY + 2324dbb799c3SYuval Mintz ((start_line++) * ILT_REG_SIZE_IN_BYTES * 2325dbb799c3SYuval Mintz ILT_ENTRY_IN_REGS); 2326dbb799c3SYuval Mintz 2327dbb799c3SYuval Mintz /* Write via DMAE since the PSWRQ2_REG_ILT_MEMORY line is a 2328dbb799c3SYuval Mintz * wide-bus. 2329dbb799c3SYuval Mintz */ 2330dbb799c3SYuval Mintz qed_dmae_host2grc(p_hwfn, p_ptt, 2331dbb799c3SYuval Mintz (u64) (uintptr_t) &ilt_hw_entry, 2332dbb799c3SYuval Mintz reg_offset, 2333dbb799c3SYuval Mintz sizeof(ilt_hw_entry) / sizeof(u32), 2334dbb799c3SYuval Mintz 0); 2335dbb799c3SYuval Mintz } 2336dbb799c3SYuval Mintz 2337dbb799c3SYuval Mintz qed_ptt_release(p_hwfn, p_ptt); 2338dbb799c3SYuval Mintz 2339dbb799c3SYuval Mintz return 0; 2340dbb799c3SYuval Mintz } 2341dbb799c3SYuval Mintz 2342dbb799c3SYuval Mintz int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto) 2343dbb799c3SYuval Mintz { 2344dbb799c3SYuval Mintz int rc; 2345dbb799c3SYuval Mintz u32 cid; 2346dbb799c3SYuval Mintz 2347dbb799c3SYuval Mintz /* Free Connection CXT */ 2348dbb799c3SYuval Mintz rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_CXT, 2349dbb799c3SYuval Mintz qed_cxt_get_proto_cid_start(p_hwfn, 2350dbb799c3SYuval Mintz proto), 2351dbb799c3SYuval Mintz qed_cxt_get_proto_cid_count(p_hwfn, 2352dbb799c3SYuval Mintz proto, &cid)); 2353dbb799c3SYuval Mintz 2354dbb799c3SYuval Mintz if (rc) 2355dbb799c3SYuval Mintz return rc; 2356dbb799c3SYuval Mintz 2357dbb799c3SYuval Mintz /* Free Task CXT */ 2358dbb799c3SYuval Mintz rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_TASK, 0, 2359dbb799c3SYuval Mintz qed_cxt_get_proto_tid_count(p_hwfn, proto)); 2360dbb799c3SYuval Mintz if (rc) 2361dbb799c3SYuval Mintz return rc; 2362dbb799c3SYuval Mintz 2363dbb799c3SYuval Mintz /* Free TSDM CXT */ 2364dbb799c3SYuval Mintz rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_SRQ, 0, 2365dbb799c3SYuval Mintz qed_cxt_get_srq_count(p_hwfn)); 2366dbb799c3SYuval Mintz 2367dbb799c3SYuval Mintz return rc; 2368dbb799c3SYuval Mintz } 2369dbb799c3SYuval Mintz 2370dbb799c3SYuval Mintz int qed_cxt_get_task_ctx(struct qed_hwfn *p_hwfn, 2371dbb799c3SYuval Mintz u32 tid, u8 ctx_type, void **pp_task_ctx) 2372dbb799c3SYuval Mintz { 2373dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 2374dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 2375dbb799c3SYuval Mintz struct qed_tid_seg *p_seg_info; 23761e128c81SArun Easi struct qed_ilt_cli_blk *p_seg; 2377dbb799c3SYuval Mintz u32 num_tids_per_block; 23781e128c81SArun Easi u32 tid_size, ilt_idx; 23791e128c81SArun Easi u32 total_lines; 23801e128c81SArun Easi u32 proto, seg; 2381dbb799c3SYuval Mintz 2382dbb799c3SYuval Mintz /* Verify the personality */ 2383dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) { 23841e128c81SArun Easi case QED_PCI_FCOE: 23851e128c81SArun Easi proto = PROTOCOLID_FCOE; 23861e128c81SArun Easi seg = QED_CXT_FCOE_TID_SEG; 23871e128c81SArun Easi break; 2388dbb799c3SYuval Mintz case QED_PCI_ISCSI: 2389dbb799c3SYuval Mintz proto = PROTOCOLID_ISCSI; 2390dbb799c3SYuval Mintz seg = QED_CXT_ISCSI_TID_SEG; 2391dbb799c3SYuval Mintz break; 2392dbb799c3SYuval Mintz default: 2393dbb799c3SYuval Mintz return -EINVAL; 2394dbb799c3SYuval Mintz } 2395dbb799c3SYuval Mintz 2396dbb799c3SYuval Mintz p_cli = &p_mngr->clients[ILT_CLI_CDUT]; 2397dbb799c3SYuval Mintz if (!p_cli->active) 2398dbb799c3SYuval Mintz return -EINVAL; 2399dbb799c3SYuval Mintz 2400dbb799c3SYuval Mintz p_seg_info = &p_mngr->conn_cfg[proto].tid_seg[seg]; 2401dbb799c3SYuval Mintz 2402dbb799c3SYuval Mintz if (ctx_type == QED_CTX_WORKING_MEM) { 2403dbb799c3SYuval Mintz p_seg = &p_cli->pf_blks[CDUT_SEG_BLK(seg)]; 2404dbb799c3SYuval Mintz } else if (ctx_type == QED_CTX_FL_MEM) { 2405dbb799c3SYuval Mintz if (!p_seg_info->has_fl_mem) 2406dbb799c3SYuval Mintz return -EINVAL; 2407dbb799c3SYuval Mintz p_seg = &p_cli->pf_blks[CDUT_FL_SEG_BLK(seg, PF)]; 2408dbb799c3SYuval Mintz } else { 2409dbb799c3SYuval Mintz return -EINVAL; 2410dbb799c3SYuval Mintz } 2411dbb799c3SYuval Mintz total_lines = DIV_ROUND_UP(p_seg->total_size, p_seg->real_size_in_page); 2412dbb799c3SYuval Mintz tid_size = p_mngr->task_type_size[p_seg_info->type]; 2413dbb799c3SYuval Mintz num_tids_per_block = p_seg->real_size_in_page / tid_size; 2414dbb799c3SYuval Mintz 2415dbb799c3SYuval Mintz if (total_lines < tid / num_tids_per_block) 2416dbb799c3SYuval Mintz return -EINVAL; 2417dbb799c3SYuval Mintz 2418dbb799c3SYuval Mintz ilt_idx = tid / num_tids_per_block + p_seg->start_line - 2419dbb799c3SYuval Mintz p_mngr->pf_start_line; 2420dbb799c3SYuval Mintz *pp_task_ctx = (u8 *)p_mngr->ilt_shadow[ilt_idx].p_virt + 2421dbb799c3SYuval Mintz (tid % num_tids_per_block) * tid_size; 2422fe56b9e6SYuval Mintz 2423fe56b9e6SYuval Mintz return 0; 2424fe56b9e6SYuval Mintz } 2425