1fe56b9e6SYuval Mintz /* QLogic qed NIC Driver 2e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 3fe56b9e6SYuval Mintz * 4e8f1cb50SMintz, Yuval * This software is available to you under a choice of one of two 5e8f1cb50SMintz, Yuval * licenses. You may choose to be licensed under the terms of the GNU 6e8f1cb50SMintz, Yuval * General Public License (GPL) Version 2, available from the file 7e8f1cb50SMintz, Yuval * COPYING in the main directory of this source tree, or the 8e8f1cb50SMintz, Yuval * OpenIB.org BSD license below: 9e8f1cb50SMintz, Yuval * 10e8f1cb50SMintz, Yuval * Redistribution and use in source and binary forms, with or 11e8f1cb50SMintz, Yuval * without modification, are permitted provided that the following 12e8f1cb50SMintz, Yuval * conditions are met: 13e8f1cb50SMintz, Yuval * 14e8f1cb50SMintz, Yuval * - Redistributions of source code must retain the above 15e8f1cb50SMintz, Yuval * copyright notice, this list of conditions and the following 16e8f1cb50SMintz, Yuval * disclaimer. 17e8f1cb50SMintz, Yuval * 18e8f1cb50SMintz, Yuval * - Redistributions in binary form must reproduce the above 19e8f1cb50SMintz, Yuval * copyright notice, this list of conditions and the following 20e8f1cb50SMintz, Yuval * disclaimer in the documentation and /or other materials 21e8f1cb50SMintz, Yuval * provided with the distribution. 22e8f1cb50SMintz, Yuval * 23e8f1cb50SMintz, Yuval * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e8f1cb50SMintz, Yuval * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e8f1cb50SMintz, Yuval * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e8f1cb50SMintz, Yuval * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e8f1cb50SMintz, Yuval * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e8f1cb50SMintz, Yuval * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e8f1cb50SMintz, Yuval * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e8f1cb50SMintz, Yuval * SOFTWARE. 31fe56b9e6SYuval Mintz */ 32fe56b9e6SYuval Mintz 33fe56b9e6SYuval Mintz #include <linux/types.h> 34fe56b9e6SYuval Mintz #include <linux/bitops.h> 35fe56b9e6SYuval Mintz #include <linux/dma-mapping.h> 36fe56b9e6SYuval Mintz #include <linux/errno.h> 37fe56b9e6SYuval Mintz #include <linux/kernel.h> 38fe56b9e6SYuval Mintz #include <linux/list.h> 39fe56b9e6SYuval Mintz #include <linux/log2.h> 40fe56b9e6SYuval Mintz #include <linux/pci.h> 41fe56b9e6SYuval Mintz #include <linux/slab.h> 42fe56b9e6SYuval Mintz #include <linux/string.h> 43fe56b9e6SYuval Mintz #include <linux/bitops.h> 44fe56b9e6SYuval Mintz #include "qed.h" 45fe56b9e6SYuval Mintz #include "qed_cxt.h" 46fe56b9e6SYuval Mintz #include "qed_dev_api.h" 47fe56b9e6SYuval Mintz #include "qed_hsi.h" 48fe56b9e6SYuval Mintz #include "qed_hw.h" 49fe56b9e6SYuval Mintz #include "qed_init_ops.h" 5039dbc646SYuval Bason #include "qed_rdma.h" 51fe56b9e6SYuval Mintz #include "qed_reg_addr.h" 521408cc1fSYuval Mintz #include "qed_sriov.h" 53fe56b9e6SYuval Mintz 54fe56b9e6SYuval Mintz /* Max number of connection types in HW (DQ/CDU etc.) */ 55fe56b9e6SYuval Mintz #define MAX_CONN_TYPES PROTOCOLID_COMMON 56fe56b9e6SYuval Mintz #define NUM_TASK_TYPES 2 57fe56b9e6SYuval Mintz #define NUM_TASK_PF_SEGMENTS 4 581408cc1fSYuval Mintz #define NUM_TASK_VF_SEGMENTS 1 59fe56b9e6SYuval Mintz 60fe56b9e6SYuval Mintz /* QM constants */ 61fe56b9e6SYuval Mintz #define QM_PQ_ELEMENT_SIZE 4 /* in bytes */ 62fe56b9e6SYuval Mintz 63fe56b9e6SYuval Mintz /* Doorbell-Queue constants */ 64fe56b9e6SYuval Mintz #define DQ_RANGE_SHIFT 4 65fe56b9e6SYuval Mintz #define DQ_RANGE_ALIGN BIT(DQ_RANGE_SHIFT) 66fe56b9e6SYuval Mintz 67dbb799c3SYuval Mintz /* Searcher constants */ 68dbb799c3SYuval Mintz #define SRC_MIN_NUM_ELEMS 256 69dbb799c3SYuval Mintz 70dbb799c3SYuval Mintz /* Timers constants */ 71dbb799c3SYuval Mintz #define TM_SHIFT 7 72dbb799c3SYuval Mintz #define TM_ALIGN BIT(TM_SHIFT) 73dbb799c3SYuval Mintz #define TM_ELEM_SIZE 4 74dbb799c3SYuval Mintz 75be086e7cSMintz, Yuval #define ILT_DEFAULT_HW_P_SIZE 4 7651ff1725SRam Amrani 77fe56b9e6SYuval Mintz #define ILT_PAGE_IN_BYTES(hw_p_size) (1U << ((hw_p_size) + 12)) 78fe56b9e6SYuval Mintz #define ILT_CFG_REG(cli, reg) PSWRQ2_REG_ ## cli ## _ ## reg ## _RT_OFFSET 79fe56b9e6SYuval Mintz 80fe56b9e6SYuval Mintz /* ILT entry structure */ 81fdd13dd3SShahed Shaikh #define ILT_ENTRY_PHY_ADDR_MASK (~0ULL >> 12) 82fe56b9e6SYuval Mintz #define ILT_ENTRY_PHY_ADDR_SHIFT 0 83fe56b9e6SYuval Mintz #define ILT_ENTRY_VALID_MASK 0x1ULL 84fe56b9e6SYuval Mintz #define ILT_ENTRY_VALID_SHIFT 52 85fe56b9e6SYuval Mintz #define ILT_ENTRY_IN_REGS 2 86fe56b9e6SYuval Mintz #define ILT_REG_SIZE_IN_BYTES 4 87fe56b9e6SYuval Mintz 88fe56b9e6SYuval Mintz /* connection context union */ 89fe56b9e6SYuval Mintz union conn_context { 9021dd79e8STomer Tayar struct e4_core_conn_context core_ctx; 9121dd79e8STomer Tayar struct e4_eth_conn_context eth_ctx; 9221dd79e8STomer Tayar struct e4_iscsi_conn_context iscsi_ctx; 9321dd79e8STomer Tayar struct e4_fcoe_conn_context fcoe_ctx; 9421dd79e8STomer Tayar struct e4_roce_conn_context roce_ctx; 95fe56b9e6SYuval Mintz }; 96fe56b9e6SYuval Mintz 971e128c81SArun Easi /* TYPE-0 task context - iSCSI, FCOE */ 98dbb799c3SYuval Mintz union type0_task_context { 9921dd79e8STomer Tayar struct e4_iscsi_task_context iscsi_ctx; 10021dd79e8STomer Tayar struct e4_fcoe_task_context fcoe_ctx; 101dbb799c3SYuval Mintz }; 102dbb799c3SYuval Mintz 103dbb799c3SYuval Mintz /* TYPE-1 task context - ROCE */ 104dbb799c3SYuval Mintz union type1_task_context { 10521dd79e8STomer Tayar struct e4_rdma_task_context roce_ctx; 106dbb799c3SYuval Mintz }; 107dbb799c3SYuval Mintz 108dbb799c3SYuval Mintz struct src_ent { 109dbb799c3SYuval Mintz u8 opaque[56]; 110dbb799c3SYuval Mintz u64 next; 111dbb799c3SYuval Mintz }; 112dbb799c3SYuval Mintz 113dbb799c3SYuval Mintz #define CDUT_SEG_ALIGNMET 3 /* in 4k chunks */ 114a2e7699eSTomer Tayar #define CDUT_SEG_ALIGNMET_IN_BYTES BIT(CDUT_SEG_ALIGNMET + 12) 115dbb799c3SYuval Mintz 116fe56b9e6SYuval Mintz #define CONN_CXT_SIZE(p_hwfn) \ 117fe56b9e6SYuval Mintz ALIGNED_TYPE_SIZE(union conn_context, p_hwfn) 118fe56b9e6SYuval Mintz 119dbb799c3SYuval Mintz #define SRQ_CXT_SIZE (sizeof(struct rdma_srq_context)) 120dbb799c3SYuval Mintz 121dbb799c3SYuval Mintz #define TYPE0_TASK_CXT_SIZE(p_hwfn) \ 122dbb799c3SYuval Mintz ALIGNED_TYPE_SIZE(union type0_task_context, p_hwfn) 123dbb799c3SYuval Mintz 124dbb799c3SYuval Mintz /* Alignment is inherent to the type1_task_context structure */ 125dbb799c3SYuval Mintz #define TYPE1_TASK_CXT_SIZE(p_hwfn) sizeof(union type1_task_context) 126dbb799c3SYuval Mintz 127fe56b9e6SYuval Mintz /* PF per protocl configuration object */ 128dbb799c3SYuval Mintz #define TASK_SEGMENTS (NUM_TASK_PF_SEGMENTS + NUM_TASK_VF_SEGMENTS) 129dbb799c3SYuval Mintz #define TASK_SEGMENT_VF (NUM_TASK_PF_SEGMENTS) 130dbb799c3SYuval Mintz 131dbb799c3SYuval Mintz struct qed_tid_seg { 132dbb799c3SYuval Mintz u32 count; 133dbb799c3SYuval Mintz u8 type; 134dbb799c3SYuval Mintz bool has_fl_mem; 135dbb799c3SYuval Mintz }; 136dbb799c3SYuval Mintz 137fe56b9e6SYuval Mintz struct qed_conn_type_cfg { 138fe56b9e6SYuval Mintz u32 cid_count; 1391408cc1fSYuval Mintz u32 cids_per_vf; 140dbb799c3SYuval Mintz struct qed_tid_seg tid_seg[TASK_SEGMENTS]; 141fe56b9e6SYuval Mintz }; 142fe56b9e6SYuval Mintz 143fe56b9e6SYuval Mintz /* ILT Client configuration, Per connection type (protocol) resources. */ 144fe56b9e6SYuval Mintz #define ILT_CLI_PF_BLOCKS (1 + NUM_TASK_PF_SEGMENTS * 2) 1451408cc1fSYuval Mintz #define ILT_CLI_VF_BLOCKS (1 + NUM_TASK_VF_SEGMENTS * 2) 146fe56b9e6SYuval Mintz #define CDUC_BLK (0) 147dbb799c3SYuval Mintz #define SRQ_BLK (0) 148dbb799c3SYuval Mintz #define CDUT_SEG_BLK(n) (1 + (u8)(n)) 149dbb799c3SYuval Mintz #define CDUT_FL_SEG_BLK(n, X) (1 + (n) + NUM_TASK_ ## X ## _SEGMENTS) 150fe56b9e6SYuval Mintz 151fe56b9e6SYuval Mintz enum ilt_clients { 152fe56b9e6SYuval Mintz ILT_CLI_CDUC, 153dbb799c3SYuval Mintz ILT_CLI_CDUT, 154fe56b9e6SYuval Mintz ILT_CLI_QM, 155dbb799c3SYuval Mintz ILT_CLI_TM, 156dbb799c3SYuval Mintz ILT_CLI_SRC, 157dbb799c3SYuval Mintz ILT_CLI_TSDM, 158fe56b9e6SYuval Mintz ILT_CLI_MAX 159fe56b9e6SYuval Mintz }; 160fe56b9e6SYuval Mintz 161fe56b9e6SYuval Mintz struct ilt_cfg_pair { 162fe56b9e6SYuval Mintz u32 reg; 163fe56b9e6SYuval Mintz u32 val; 164fe56b9e6SYuval Mintz }; 165fe56b9e6SYuval Mintz 166fe56b9e6SYuval Mintz struct qed_ilt_cli_blk { 167fe56b9e6SYuval Mintz u32 total_size; /* 0 means not active */ 168fe56b9e6SYuval Mintz u32 real_size_in_page; 169fe56b9e6SYuval Mintz u32 start_line; 170dbb799c3SYuval Mintz u32 dynamic_line_cnt; 171fe56b9e6SYuval Mintz }; 172fe56b9e6SYuval Mintz 173fe56b9e6SYuval Mintz struct qed_ilt_client_cfg { 174fe56b9e6SYuval Mintz bool active; 175fe56b9e6SYuval Mintz 176fe56b9e6SYuval Mintz /* ILT boundaries */ 177fe56b9e6SYuval Mintz struct ilt_cfg_pair first; 178fe56b9e6SYuval Mintz struct ilt_cfg_pair last; 179fe56b9e6SYuval Mintz struct ilt_cfg_pair p_size; 180fe56b9e6SYuval Mintz 181fe56b9e6SYuval Mintz /* ILT client blocks for PF */ 182fe56b9e6SYuval Mintz struct qed_ilt_cli_blk pf_blks[ILT_CLI_PF_BLOCKS]; 183fe56b9e6SYuval Mintz u32 pf_total_lines; 1841408cc1fSYuval Mintz 1851408cc1fSYuval Mintz /* ILT client blocks for VFs */ 1861408cc1fSYuval Mintz struct qed_ilt_cli_blk vf_blks[ILT_CLI_VF_BLOCKS]; 1871408cc1fSYuval Mintz u32 vf_total_lines; 188fe56b9e6SYuval Mintz }; 189fe56b9e6SYuval Mintz 190fe56b9e6SYuval Mintz /* Per Path - 191fe56b9e6SYuval Mintz * ILT shadow table 192fe56b9e6SYuval Mintz * Protocol acquired CID lists 193fe56b9e6SYuval Mintz * PF start line in ILT 194fe56b9e6SYuval Mintz */ 195fe56b9e6SYuval Mintz struct qed_dma_mem { 196fe56b9e6SYuval Mintz dma_addr_t p_phys; 197fe56b9e6SYuval Mintz void *p_virt; 198fe56b9e6SYuval Mintz size_t size; 199fe56b9e6SYuval Mintz }; 200fe56b9e6SYuval Mintz 201fe56b9e6SYuval Mintz struct qed_cid_acquired_map { 202fe56b9e6SYuval Mintz u32 start_cid; 203fe56b9e6SYuval Mintz u32 max_count; 204fe56b9e6SYuval Mintz unsigned long *cid_map; 205fe56b9e6SYuval Mintz }; 206fe56b9e6SYuval Mintz 207fe56b9e6SYuval Mintz struct qed_cxt_mngr { 208fe56b9e6SYuval Mintz /* Per protocl configuration */ 209fe56b9e6SYuval Mintz struct qed_conn_type_cfg conn_cfg[MAX_CONN_TYPES]; 210fe56b9e6SYuval Mintz 211fe56b9e6SYuval Mintz /* computed ILT structure */ 212fe56b9e6SYuval Mintz struct qed_ilt_client_cfg clients[ILT_CLI_MAX]; 213fe56b9e6SYuval Mintz 214dbb799c3SYuval Mintz /* Task type sizes */ 215dbb799c3SYuval Mintz u32 task_type_size[NUM_TASK_TYPES]; 216dbb799c3SYuval Mintz 2171408cc1fSYuval Mintz /* total number of VFs for this hwfn - 2181408cc1fSYuval Mintz * ALL VFs are symmetric in terms of HW resources 2191408cc1fSYuval Mintz */ 2201408cc1fSYuval Mintz u32 vf_count; 2211408cc1fSYuval Mintz 222fe56b9e6SYuval Mintz /* Acquired CIDs */ 223fe56b9e6SYuval Mintz struct qed_cid_acquired_map acquired[MAX_CONN_TYPES]; 224fe56b9e6SYuval Mintz 2256bea61daSMintz, Yuval struct qed_cid_acquired_map 2266bea61daSMintz, Yuval acquired_vf[MAX_CONN_TYPES][MAX_NUM_VFS]; 2276bea61daSMintz, Yuval 228fe56b9e6SYuval Mintz /* ILT shadow table */ 229fe56b9e6SYuval Mintz struct qed_dma_mem *ilt_shadow; 230fe56b9e6SYuval Mintz u32 pf_start_line; 231dbb799c3SYuval Mintz 232dbb799c3SYuval Mintz /* Mutex for a dynamic ILT allocation */ 233dbb799c3SYuval Mintz struct mutex mutex; 234dbb799c3SYuval Mintz 235dbb799c3SYuval Mintz /* SRC T2 */ 236dbb799c3SYuval Mintz struct qed_dma_mem *t2; 237dbb799c3SYuval Mintz u32 t2_num_pages; 238dbb799c3SYuval Mintz u64 first_free; 239dbb799c3SYuval Mintz u64 last_free; 240d51e4af5SChopra, Manish 241d51e4af5SChopra, Manish /* total number of SRQ's for this hwfn */ 242d51e4af5SChopra, Manish u32 srq_count; 243d51e4af5SChopra, Manish 244d51e4af5SChopra, Manish /* Maximal number of L2 steering filters */ 245d51e4af5SChopra, Manish u32 arfs_count; 246fe56b9e6SYuval Mintz }; 247dbb799c3SYuval Mintz static bool src_proto(enum protocol_type type) 248dbb799c3SYuval Mintz { 249dbb799c3SYuval Mintz return type == PROTOCOLID_ISCSI || 2505d7dc962SKalderon, Michal type == PROTOCOLID_FCOE || 2515d7dc962SKalderon, Michal type == PROTOCOLID_IWARP; 252dbb799c3SYuval Mintz } 253dbb799c3SYuval Mintz 254dbb799c3SYuval Mintz static bool tm_cid_proto(enum protocol_type type) 255dbb799c3SYuval Mintz { 256dbb799c3SYuval Mintz return type == PROTOCOLID_ISCSI || 2571e128c81SArun Easi type == PROTOCOLID_FCOE || 2585d7dc962SKalderon, Michal type == PROTOCOLID_ROCE || 2595d7dc962SKalderon, Michal type == PROTOCOLID_IWARP; 260dbb799c3SYuval Mintz } 261fe56b9e6SYuval Mintz 2621e128c81SArun Easi static bool tm_tid_proto(enum protocol_type type) 2631e128c81SArun Easi { 2641e128c81SArun Easi return type == PROTOCOLID_FCOE; 2651e128c81SArun Easi } 2661e128c81SArun Easi 2671408cc1fSYuval Mintz /* counts the iids for the CDU/CDUC ILT client configuration */ 2681408cc1fSYuval Mintz struct qed_cdu_iids { 2691408cc1fSYuval Mintz u32 pf_cids; 2701408cc1fSYuval Mintz u32 per_vf_cids; 2711408cc1fSYuval Mintz }; 2721408cc1fSYuval Mintz 2731408cc1fSYuval Mintz static void qed_cxt_cdu_iids(struct qed_cxt_mngr *p_mngr, 2741408cc1fSYuval Mintz struct qed_cdu_iids *iids) 275fe56b9e6SYuval Mintz { 2761408cc1fSYuval Mintz u32 type; 277fe56b9e6SYuval Mintz 2781408cc1fSYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) { 2791408cc1fSYuval Mintz iids->pf_cids += p_mngr->conn_cfg[type].cid_count; 2801408cc1fSYuval Mintz iids->per_vf_cids += p_mngr->conn_cfg[type].cids_per_vf; 2811408cc1fSYuval Mintz } 282fe56b9e6SYuval Mintz } 283fe56b9e6SYuval Mintz 284dbb799c3SYuval Mintz /* counts the iids for the Searcher block configuration */ 285dbb799c3SYuval Mintz struct qed_src_iids { 286dbb799c3SYuval Mintz u32 pf_cids; 287dbb799c3SYuval Mintz u32 per_vf_cids; 288dbb799c3SYuval Mintz }; 289dbb799c3SYuval Mintz 290dbb799c3SYuval Mintz static void qed_cxt_src_iids(struct qed_cxt_mngr *p_mngr, 291dbb799c3SYuval Mintz struct qed_src_iids *iids) 292dbb799c3SYuval Mintz { 293dbb799c3SYuval Mintz u32 i; 294dbb799c3SYuval Mintz 295dbb799c3SYuval Mintz for (i = 0; i < MAX_CONN_TYPES; i++) { 296dbb799c3SYuval Mintz if (!src_proto(i)) 297dbb799c3SYuval Mintz continue; 298dbb799c3SYuval Mintz 299dbb799c3SYuval Mintz iids->pf_cids += p_mngr->conn_cfg[i].cid_count; 300dbb799c3SYuval Mintz iids->per_vf_cids += p_mngr->conn_cfg[i].cids_per_vf; 301dbb799c3SYuval Mintz } 302d51e4af5SChopra, Manish 303d51e4af5SChopra, Manish /* Add L2 filtering filters in addition */ 304d51e4af5SChopra, Manish iids->pf_cids += p_mngr->arfs_count; 305dbb799c3SYuval Mintz } 306dbb799c3SYuval Mintz 307dbb799c3SYuval Mintz /* counts the iids for the Timers block configuration */ 308dbb799c3SYuval Mintz struct qed_tm_iids { 309dbb799c3SYuval Mintz u32 pf_cids; 310dbb799c3SYuval Mintz u32 pf_tids[NUM_TASK_PF_SEGMENTS]; /* per segment */ 311dbb799c3SYuval Mintz u32 pf_tids_total; 312dbb799c3SYuval Mintz u32 per_vf_cids; 313dbb799c3SYuval Mintz u32 per_vf_tids; 314dbb799c3SYuval Mintz }; 315dbb799c3SYuval Mintz 31644531ba4SMichal Kalderon static void qed_cxt_tm_iids(struct qed_hwfn *p_hwfn, 31744531ba4SMichal Kalderon struct qed_cxt_mngr *p_mngr, 318dbb799c3SYuval Mintz struct qed_tm_iids *iids) 319dbb799c3SYuval Mintz { 32044531ba4SMichal Kalderon bool tm_vf_required = false; 32144531ba4SMichal Kalderon bool tm_required = false; 32244531ba4SMichal Kalderon int i, j; 323dbb799c3SYuval Mintz 32444531ba4SMichal Kalderon /* Timers is a special case -> we don't count how many cids require 32544531ba4SMichal Kalderon * timers but what's the max cid that will be used by the timer block. 32644531ba4SMichal Kalderon * therefore we traverse in reverse order, and once we hit a protocol 32744531ba4SMichal Kalderon * that requires the timers memory, we'll sum all the protocols up 32844531ba4SMichal Kalderon * to that one. 32944531ba4SMichal Kalderon */ 33044531ba4SMichal Kalderon for (i = MAX_CONN_TYPES - 1; i >= 0; i--) { 331dbb799c3SYuval Mintz struct qed_conn_type_cfg *p_cfg = &p_mngr->conn_cfg[i]; 332dbb799c3SYuval Mintz 33344531ba4SMichal Kalderon if (tm_cid_proto(i) || tm_required) { 33444531ba4SMichal Kalderon if (p_cfg->cid_count) 33544531ba4SMichal Kalderon tm_required = true; 33644531ba4SMichal Kalderon 337dbb799c3SYuval Mintz iids->pf_cids += p_cfg->cid_count; 33844531ba4SMichal Kalderon } 33944531ba4SMichal Kalderon 34044531ba4SMichal Kalderon if (tm_cid_proto(i) || tm_vf_required) { 34144531ba4SMichal Kalderon if (p_cfg->cids_per_vf) 34244531ba4SMichal Kalderon tm_vf_required = true; 34344531ba4SMichal Kalderon 344dbb799c3SYuval Mintz iids->per_vf_cids += p_cfg->cids_per_vf; 345dbb799c3SYuval Mintz } 3461e128c81SArun Easi 3471e128c81SArun Easi if (tm_tid_proto(i)) { 3481e128c81SArun Easi struct qed_tid_seg *segs = p_cfg->tid_seg; 3491e128c81SArun Easi 3501e128c81SArun Easi /* for each segment there is at most one 3511e128c81SArun Easi * protocol for which count is not 0. 3521e128c81SArun Easi */ 3531e128c81SArun Easi for (j = 0; j < NUM_TASK_PF_SEGMENTS; j++) 3541e128c81SArun Easi iids->pf_tids[j] += segs[j].count; 3551e128c81SArun Easi 3561e128c81SArun Easi /* The last array elelment is for the VFs. As for PF 3571e128c81SArun Easi * segments there can be only one protocol for 3581e128c81SArun Easi * which this value is not 0. 3591e128c81SArun Easi */ 3601e128c81SArun Easi iids->per_vf_tids += segs[NUM_TASK_PF_SEGMENTS].count; 3611e128c81SArun Easi } 362dbb799c3SYuval Mintz } 363dbb799c3SYuval Mintz 364dbb799c3SYuval Mintz iids->pf_cids = roundup(iids->pf_cids, TM_ALIGN); 365dbb799c3SYuval Mintz iids->per_vf_cids = roundup(iids->per_vf_cids, TM_ALIGN); 366dbb799c3SYuval Mintz iids->per_vf_tids = roundup(iids->per_vf_tids, TM_ALIGN); 367dbb799c3SYuval Mintz 368dbb799c3SYuval Mintz for (iids->pf_tids_total = 0, j = 0; j < NUM_TASK_PF_SEGMENTS; j++) { 369dbb799c3SYuval Mintz iids->pf_tids[j] = roundup(iids->pf_tids[j], TM_ALIGN); 370dbb799c3SYuval Mintz iids->pf_tids_total += iids->pf_tids[j]; 371dbb799c3SYuval Mintz } 372dbb799c3SYuval Mintz } 373dbb799c3SYuval Mintz 374fe56b9e6SYuval Mintz static void qed_cxt_qm_iids(struct qed_hwfn *p_hwfn, 375fe56b9e6SYuval Mintz struct qed_qm_iids *iids) 376fe56b9e6SYuval Mintz { 377fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 378dbb799c3SYuval Mintz struct qed_tid_seg *segs; 379dbb799c3SYuval Mintz u32 vf_cids = 0, type, j; 380dbb799c3SYuval Mintz u32 vf_tids = 0; 381fe56b9e6SYuval Mintz 3821408cc1fSYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) { 383fe56b9e6SYuval Mintz iids->cids += p_mngr->conn_cfg[type].cid_count; 3841408cc1fSYuval Mintz vf_cids += p_mngr->conn_cfg[type].cids_per_vf; 385dbb799c3SYuval Mintz 386dbb799c3SYuval Mintz segs = p_mngr->conn_cfg[type].tid_seg; 387dbb799c3SYuval Mintz /* for each segment there is at most one 388dbb799c3SYuval Mintz * protocol for which count is not 0. 389dbb799c3SYuval Mintz */ 390dbb799c3SYuval Mintz for (j = 0; j < NUM_TASK_PF_SEGMENTS; j++) 391dbb799c3SYuval Mintz iids->tids += segs[j].count; 392dbb799c3SYuval Mintz 393dbb799c3SYuval Mintz /* The last array elelment is for the VFs. As for PF 394dbb799c3SYuval Mintz * segments there can be only one protocol for 395dbb799c3SYuval Mintz * which this value is not 0. 396dbb799c3SYuval Mintz */ 397dbb799c3SYuval Mintz vf_tids += segs[NUM_TASK_PF_SEGMENTS].count; 3981408cc1fSYuval Mintz } 399fe56b9e6SYuval Mintz 4001408cc1fSYuval Mintz iids->vf_cids += vf_cids * p_mngr->vf_count; 401dbb799c3SYuval Mintz iids->tids += vf_tids * p_mngr->vf_count; 402dbb799c3SYuval Mintz 4031408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 404dbb799c3SYuval Mintz "iids: CIDS %08x vf_cids %08x tids %08x vf_tids %08x\n", 405dbb799c3SYuval Mintz iids->cids, iids->vf_cids, iids->tids, vf_tids); 406dbb799c3SYuval Mintz } 407dbb799c3SYuval Mintz 408dbb799c3SYuval Mintz static struct qed_tid_seg *qed_cxt_tid_seg_info(struct qed_hwfn *p_hwfn, 409dbb799c3SYuval Mintz u32 seg) 410dbb799c3SYuval Mintz { 411dbb799c3SYuval Mintz struct qed_cxt_mngr *p_cfg = p_hwfn->p_cxt_mngr; 412dbb799c3SYuval Mintz u32 i; 413dbb799c3SYuval Mintz 414dbb799c3SYuval Mintz /* Find the protocol with tid count > 0 for this segment. 415dbb799c3SYuval Mintz * Note: there can only be one and this is already validated. 416dbb799c3SYuval Mintz */ 417dbb799c3SYuval Mintz for (i = 0; i < MAX_CONN_TYPES; i++) 418dbb799c3SYuval Mintz if (p_cfg->conn_cfg[i].tid_seg[seg].count) 419dbb799c3SYuval Mintz return &p_cfg->conn_cfg[i].tid_seg[seg]; 420dbb799c3SYuval Mintz return NULL; 421dbb799c3SYuval Mintz } 422dbb799c3SYuval Mintz 4238c93beafSYuval Mintz static void qed_cxt_set_srq_count(struct qed_hwfn *p_hwfn, u32 num_srqs) 424dbb799c3SYuval Mintz { 425dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr; 426dbb799c3SYuval Mintz 427dbb799c3SYuval Mintz p_mgr->srq_count = num_srqs; 428dbb799c3SYuval Mintz } 429dbb799c3SYuval Mintz 43039dbc646SYuval Bason u32 qed_cxt_get_srq_count(struct qed_hwfn *p_hwfn) 431dbb799c3SYuval Mintz { 432dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr; 433dbb799c3SYuval Mintz 434dbb799c3SYuval Mintz return p_mgr->srq_count; 435fe56b9e6SYuval Mintz } 436fe56b9e6SYuval Mintz 437fe56b9e6SYuval Mintz /* set the iids count per protocol */ 438fe56b9e6SYuval Mintz static void qed_cxt_set_proto_cid_count(struct qed_hwfn *p_hwfn, 439fe56b9e6SYuval Mintz enum protocol_type type, 4401408cc1fSYuval Mintz u32 cid_count, u32 vf_cid_cnt) 441fe56b9e6SYuval Mintz { 442fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr; 443fe56b9e6SYuval Mintz struct qed_conn_type_cfg *p_conn = &p_mgr->conn_cfg[type]; 444fe56b9e6SYuval Mintz 445fe56b9e6SYuval Mintz p_conn->cid_count = roundup(cid_count, DQ_RANGE_ALIGN); 4461408cc1fSYuval Mintz p_conn->cids_per_vf = roundup(vf_cid_cnt, DQ_RANGE_ALIGN); 447dbb799c3SYuval Mintz 448dbb799c3SYuval Mintz if (type == PROTOCOLID_ROCE) { 449dbb799c3SYuval Mintz u32 page_sz = p_mgr->clients[ILT_CLI_CDUC].p_size.val; 450dbb799c3SYuval Mintz u32 cxt_size = CONN_CXT_SIZE(p_hwfn); 451dbb799c3SYuval Mintz u32 elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size; 452f3e48119SRam Amrani u32 align = elems_per_page * DQ_RANGE_ALIGN; 453dbb799c3SYuval Mintz 454f3e48119SRam Amrani p_conn->cid_count = roundup(p_conn->cid_count, align); 455dbb799c3SYuval Mintz } 4561408cc1fSYuval Mintz } 4571408cc1fSYuval Mintz 4581408cc1fSYuval Mintz u32 qed_cxt_get_proto_cid_count(struct qed_hwfn *p_hwfn, 4591a635e48SYuval Mintz enum protocol_type type, u32 *vf_cid) 4601408cc1fSYuval Mintz { 4611408cc1fSYuval Mintz if (vf_cid) 4621408cc1fSYuval Mintz *vf_cid = p_hwfn->p_cxt_mngr->conn_cfg[type].cids_per_vf; 4631408cc1fSYuval Mintz 4641408cc1fSYuval Mintz return p_hwfn->p_cxt_mngr->conn_cfg[type].cid_count; 465fe56b9e6SYuval Mintz } 466fe56b9e6SYuval Mintz 467dbb799c3SYuval Mintz u32 qed_cxt_get_proto_cid_start(struct qed_hwfn *p_hwfn, 468dbb799c3SYuval Mintz enum protocol_type type) 469dbb799c3SYuval Mintz { 470dbb799c3SYuval Mintz return p_hwfn->p_cxt_mngr->acquired[type].start_cid; 471dbb799c3SYuval Mintz } 472dbb799c3SYuval Mintz 473dbb799c3SYuval Mintz u32 qed_cxt_get_proto_tid_count(struct qed_hwfn *p_hwfn, 474dbb799c3SYuval Mintz enum protocol_type type) 475dbb799c3SYuval Mintz { 476dbb799c3SYuval Mintz u32 cnt = 0; 477dbb799c3SYuval Mintz int i; 478dbb799c3SYuval Mintz 479dbb799c3SYuval Mintz for (i = 0; i < TASK_SEGMENTS; i++) 480dbb799c3SYuval Mintz cnt += p_hwfn->p_cxt_mngr->conn_cfg[type].tid_seg[i].count; 481dbb799c3SYuval Mintz 482dbb799c3SYuval Mintz return cnt; 483dbb799c3SYuval Mintz } 484dbb799c3SYuval Mintz 4851a635e48SYuval Mintz static void qed_cxt_set_proto_tid_count(struct qed_hwfn *p_hwfn, 486dbb799c3SYuval Mintz enum protocol_type proto, 4871a635e48SYuval Mintz u8 seg, 4881a635e48SYuval Mintz u8 seg_type, u32 count, bool has_fl) 489dbb799c3SYuval Mintz { 490dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 491dbb799c3SYuval Mintz struct qed_tid_seg *p_seg = &p_mngr->conn_cfg[proto].tid_seg[seg]; 492dbb799c3SYuval Mintz 493dbb799c3SYuval Mintz p_seg->count = count; 494dbb799c3SYuval Mintz p_seg->has_fl_mem = has_fl; 495dbb799c3SYuval Mintz p_seg->type = seg_type; 496dbb799c3SYuval Mintz } 497dbb799c3SYuval Mintz 498fe56b9e6SYuval Mintz static void qed_ilt_cli_blk_fill(struct qed_ilt_client_cfg *p_cli, 499fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk, 5001a635e48SYuval Mintz u32 start_line, u32 total_size, u32 elem_size) 501fe56b9e6SYuval Mintz { 502fe56b9e6SYuval Mintz u32 ilt_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val); 503fe56b9e6SYuval Mintz 504fe56b9e6SYuval Mintz /* verify thatits called only once for each block */ 505fe56b9e6SYuval Mintz if (p_blk->total_size) 506fe56b9e6SYuval Mintz return; 507fe56b9e6SYuval Mintz 508fe56b9e6SYuval Mintz p_blk->total_size = total_size; 509fe56b9e6SYuval Mintz p_blk->real_size_in_page = 0; 510fe56b9e6SYuval Mintz if (elem_size) 511fe56b9e6SYuval Mintz p_blk->real_size_in_page = (ilt_size / elem_size) * elem_size; 512fe56b9e6SYuval Mintz p_blk->start_line = start_line; 513fe56b9e6SYuval Mintz } 514fe56b9e6SYuval Mintz 515fe56b9e6SYuval Mintz static void qed_ilt_cli_adv_line(struct qed_hwfn *p_hwfn, 516fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *p_cli, 517fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk, 518fe56b9e6SYuval Mintz u32 *p_line, enum ilt_clients client_id) 519fe56b9e6SYuval Mintz { 520fe56b9e6SYuval Mintz if (!p_blk->total_size) 521fe56b9e6SYuval Mintz return; 522fe56b9e6SYuval Mintz 523fe56b9e6SYuval Mintz if (!p_cli->active) 524fe56b9e6SYuval Mintz p_cli->first.val = *p_line; 525fe56b9e6SYuval Mintz 526fe56b9e6SYuval Mintz p_cli->active = true; 5271a635e48SYuval Mintz *p_line += DIV_ROUND_UP(p_blk->total_size, p_blk->real_size_in_page); 528fe56b9e6SYuval Mintz p_cli->last.val = *p_line - 1; 529fe56b9e6SYuval Mintz 530fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 531fe56b9e6SYuval Mintz "ILT[Client %d] - Lines: [%08x - %08x]. Block - Size %08x [Real %08x] Start line %d\n", 532fe56b9e6SYuval Mintz client_id, p_cli->first.val, 533fe56b9e6SYuval Mintz p_cli->last.val, p_blk->total_size, 534fe56b9e6SYuval Mintz p_blk->real_size_in_page, p_blk->start_line); 535fe56b9e6SYuval Mintz } 536fe56b9e6SYuval Mintz 537dbb799c3SYuval Mintz static u32 qed_ilt_get_dynamic_line_cnt(struct qed_hwfn *p_hwfn, 538dbb799c3SYuval Mintz enum ilt_clients ilt_client) 539dbb799c3SYuval Mintz { 540dbb799c3SYuval Mintz u32 cid_count = p_hwfn->p_cxt_mngr->conn_cfg[PROTOCOLID_ROCE].cid_count; 541dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 542dbb799c3SYuval Mintz u32 lines_to_skip = 0; 543dbb799c3SYuval Mintz u32 cxts_per_p; 544dbb799c3SYuval Mintz 545dbb799c3SYuval Mintz if (ilt_client == ILT_CLI_CDUC) { 546dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC]; 547dbb799c3SYuval Mintz 548dbb799c3SYuval Mintz cxts_per_p = ILT_PAGE_IN_BYTES(p_cli->p_size.val) / 549dbb799c3SYuval Mintz (u32) CONN_CXT_SIZE(p_hwfn); 550dbb799c3SYuval Mintz 551dbb799c3SYuval Mintz lines_to_skip = cid_count / cxts_per_p; 552dbb799c3SYuval Mintz } 553dbb799c3SYuval Mintz 554dbb799c3SYuval Mintz return lines_to_skip; 555dbb799c3SYuval Mintz } 556dbb799c3SYuval Mintz 557f9dc4d1fSRam Amrani static struct qed_ilt_client_cfg *qed_cxt_set_cli(struct qed_ilt_client_cfg 558f9dc4d1fSRam Amrani *p_cli) 559f9dc4d1fSRam Amrani { 560f9dc4d1fSRam Amrani p_cli->active = false; 561f9dc4d1fSRam Amrani p_cli->first.val = 0; 562f9dc4d1fSRam Amrani p_cli->last.val = 0; 563f9dc4d1fSRam Amrani return p_cli; 564f9dc4d1fSRam Amrani } 565f9dc4d1fSRam Amrani 566f9dc4d1fSRam Amrani static struct qed_ilt_cli_blk *qed_cxt_set_blk(struct qed_ilt_cli_blk *p_blk) 567f9dc4d1fSRam Amrani { 568f9dc4d1fSRam Amrani p_blk->total_size = 0; 569f9dc4d1fSRam Amrani return p_blk; 570f9dc4d1fSRam Amrani } 571f9dc4d1fSRam Amrani 572f9dc4d1fSRam Amrani int qed_cxt_cfg_ilt_compute(struct qed_hwfn *p_hwfn, u32 *line_count) 573fe56b9e6SYuval Mintz { 574fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 575dbb799c3SYuval Mintz u32 curr_line, total, i, task_size, line; 576fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *p_cli; 577fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk; 5781408cc1fSYuval Mintz struct qed_cdu_iids cdu_iids; 579dbb799c3SYuval Mintz struct qed_src_iids src_iids; 580fe56b9e6SYuval Mintz struct qed_qm_iids qm_iids; 581dbb799c3SYuval Mintz struct qed_tm_iids tm_iids; 582dbb799c3SYuval Mintz struct qed_tid_seg *p_seg; 583fe56b9e6SYuval Mintz 584fe56b9e6SYuval Mintz memset(&qm_iids, 0, sizeof(qm_iids)); 5851408cc1fSYuval Mintz memset(&cdu_iids, 0, sizeof(cdu_iids)); 586dbb799c3SYuval Mintz memset(&src_iids, 0, sizeof(src_iids)); 587dbb799c3SYuval Mintz memset(&tm_iids, 0, sizeof(tm_iids)); 588fe56b9e6SYuval Mintz 589fe56b9e6SYuval Mintz p_mngr->pf_start_line = RESC_START(p_hwfn, QED_ILT); 590fe56b9e6SYuval Mintz 591fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 592fe56b9e6SYuval Mintz "hwfn [%d] - Set context manager starting line to be 0x%08x\n", 593fe56b9e6SYuval Mintz p_hwfn->my_id, p_hwfn->p_cxt_mngr->pf_start_line); 594fe56b9e6SYuval Mintz 595fe56b9e6SYuval Mintz /* CDUC */ 596f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_CDUC]); 597f9dc4d1fSRam Amrani 598fe56b9e6SYuval Mintz curr_line = p_mngr->pf_start_line; 5991408cc1fSYuval Mintz 6001408cc1fSYuval Mintz /* CDUC PF */ 601fe56b9e6SYuval Mintz p_cli->pf_total_lines = 0; 602fe56b9e6SYuval Mintz 603fe56b9e6SYuval Mintz /* get the counters for the CDUC and QM clients */ 6041408cc1fSYuval Mintz qed_cxt_cdu_iids(p_mngr, &cdu_iids); 605fe56b9e6SYuval Mintz 606f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[CDUC_BLK]); 607fe56b9e6SYuval Mintz 6081408cc1fSYuval Mintz total = cdu_iids.pf_cids * CONN_CXT_SIZE(p_hwfn); 609fe56b9e6SYuval Mintz 610fe56b9e6SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 611fe56b9e6SYuval Mintz total, CONN_CXT_SIZE(p_hwfn)); 612fe56b9e6SYuval Mintz 613fe56b9e6SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_CDUC); 614fe56b9e6SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line; 615fe56b9e6SYuval Mintz 616dbb799c3SYuval Mintz p_blk->dynamic_line_cnt = qed_ilt_get_dynamic_line_cnt(p_hwfn, 617dbb799c3SYuval Mintz ILT_CLI_CDUC); 618dbb799c3SYuval Mintz 6191408cc1fSYuval Mintz /* CDUC VF */ 620f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->vf_blks[CDUC_BLK]); 6211408cc1fSYuval Mintz total = cdu_iids.per_vf_cids * CONN_CXT_SIZE(p_hwfn); 6221408cc1fSYuval Mintz 6231408cc1fSYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 6241408cc1fSYuval Mintz total, CONN_CXT_SIZE(p_hwfn)); 6251408cc1fSYuval Mintz 6261408cc1fSYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_CDUC); 6271408cc1fSYuval Mintz p_cli->vf_total_lines = curr_line - p_blk->start_line; 6281408cc1fSYuval Mintz 6291408cc1fSYuval Mintz for (i = 1; i < p_mngr->vf_count; i++) 6301408cc1fSYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 6311408cc1fSYuval Mintz ILT_CLI_CDUC); 6321408cc1fSYuval Mintz 633dbb799c3SYuval Mintz /* CDUT PF */ 634f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_CDUT]); 635dbb799c3SYuval Mintz p_cli->first.val = curr_line; 636dbb799c3SYuval Mintz 637dbb799c3SYuval Mintz /* first the 'working' task memory */ 638dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) { 639dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, i); 640dbb799c3SYuval Mintz if (!p_seg || p_seg->count == 0) 641dbb799c3SYuval Mintz continue; 642dbb799c3SYuval Mintz 643f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[CDUT_SEG_BLK(i)]); 644dbb799c3SYuval Mintz total = p_seg->count * p_mngr->task_type_size[p_seg->type]; 645dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, total, 646dbb799c3SYuval Mintz p_mngr->task_type_size[p_seg->type]); 647dbb799c3SYuval Mintz 648dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 649dbb799c3SYuval Mintz ILT_CLI_CDUT); 650dbb799c3SYuval Mintz } 651dbb799c3SYuval Mintz 652dbb799c3SYuval Mintz /* next the 'init' task memory (forced load memory) */ 653dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) { 654dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, i); 655dbb799c3SYuval Mintz if (!p_seg || p_seg->count == 0) 656dbb799c3SYuval Mintz continue; 657dbb799c3SYuval Mintz 658f9dc4d1fSRam Amrani p_blk = 659f9dc4d1fSRam Amrani qed_cxt_set_blk(&p_cli->pf_blks[CDUT_FL_SEG_BLK(i, PF)]); 660dbb799c3SYuval Mintz 661dbb799c3SYuval Mintz if (!p_seg->has_fl_mem) { 662dbb799c3SYuval Mintz /* The segment is active (total size pf 'working' 663dbb799c3SYuval Mintz * memory is > 0) but has no FL (forced-load, Init) 664dbb799c3SYuval Mintz * memory. Thus: 665dbb799c3SYuval Mintz * 666dbb799c3SYuval Mintz * 1. The total-size in the corrsponding FL block of 667dbb799c3SYuval Mintz * the ILT client is set to 0 - No ILT line are 668dbb799c3SYuval Mintz * provisioned and no ILT memory allocated. 669dbb799c3SYuval Mintz * 670dbb799c3SYuval Mintz * 2. The start-line of said block is set to the 671dbb799c3SYuval Mintz * start line of the matching working memory 672dbb799c3SYuval Mintz * block in the ILT client. This is later used to 673dbb799c3SYuval Mintz * configure the CDU segment offset registers and 674dbb799c3SYuval Mintz * results in an FL command for TIDs of this 675dbb799c3SYuval Mintz * segement behaves as regular load commands 676dbb799c3SYuval Mintz * (loading TIDs from the working memory). 677dbb799c3SYuval Mintz */ 678dbb799c3SYuval Mintz line = p_cli->pf_blks[CDUT_SEG_BLK(i)].start_line; 679dbb799c3SYuval Mintz 680dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, line, 0, 0); 681dbb799c3SYuval Mintz continue; 682dbb799c3SYuval Mintz } 683dbb799c3SYuval Mintz total = p_seg->count * p_mngr->task_type_size[p_seg->type]; 684dbb799c3SYuval Mintz 685dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, 686dbb799c3SYuval Mintz curr_line, total, 687dbb799c3SYuval Mintz p_mngr->task_type_size[p_seg->type]); 688dbb799c3SYuval Mintz 689dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 690dbb799c3SYuval Mintz ILT_CLI_CDUT); 691dbb799c3SYuval Mintz } 692dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_cli->pf_blks[0].start_line; 693dbb799c3SYuval Mintz 694dbb799c3SYuval Mintz /* CDUT VF */ 695dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, TASK_SEGMENT_VF); 696dbb799c3SYuval Mintz if (p_seg && p_seg->count) { 697dbb799c3SYuval Mintz /* Stricly speaking we need to iterate over all VF 698dbb799c3SYuval Mintz * task segment types, but a VF has only 1 segment 699dbb799c3SYuval Mintz */ 700dbb799c3SYuval Mintz 701dbb799c3SYuval Mintz /* 'working' memory */ 702dbb799c3SYuval Mintz total = p_seg->count * p_mngr->task_type_size[p_seg->type]; 703dbb799c3SYuval Mintz 704f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->vf_blks[CDUT_SEG_BLK(0)]); 705dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, 706dbb799c3SYuval Mintz curr_line, total, 707dbb799c3SYuval Mintz p_mngr->task_type_size[p_seg->type]); 708dbb799c3SYuval Mintz 709dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 710dbb799c3SYuval Mintz ILT_CLI_CDUT); 711dbb799c3SYuval Mintz 712dbb799c3SYuval Mintz /* 'init' memory */ 713f9dc4d1fSRam Amrani p_blk = 714f9dc4d1fSRam Amrani qed_cxt_set_blk(&p_cli->vf_blks[CDUT_FL_SEG_BLK(0, VF)]); 715dbb799c3SYuval Mintz if (!p_seg->has_fl_mem) { 716dbb799c3SYuval Mintz /* see comment above */ 717dbb799c3SYuval Mintz line = p_cli->vf_blks[CDUT_SEG_BLK(0)].start_line; 718dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, line, 0, 0); 719dbb799c3SYuval Mintz } else { 720dbb799c3SYuval Mintz task_size = p_mngr->task_type_size[p_seg->type]; 721dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, 722dbb799c3SYuval Mintz curr_line, total, task_size); 723dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 724dbb799c3SYuval Mintz ILT_CLI_CDUT); 725dbb799c3SYuval Mintz } 726dbb799c3SYuval Mintz p_cli->vf_total_lines = curr_line - 727dbb799c3SYuval Mintz p_cli->vf_blks[0].start_line; 728dbb799c3SYuval Mintz 729dbb799c3SYuval Mintz /* Now for the rest of the VFs */ 730dbb799c3SYuval Mintz for (i = 1; i < p_mngr->vf_count; i++) { 731dbb799c3SYuval Mintz p_blk = &p_cli->vf_blks[CDUT_SEG_BLK(0)]; 732dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 733dbb799c3SYuval Mintz ILT_CLI_CDUT); 734dbb799c3SYuval Mintz 735dbb799c3SYuval Mintz p_blk = &p_cli->vf_blks[CDUT_FL_SEG_BLK(0, VF)]; 736dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 737dbb799c3SYuval Mintz ILT_CLI_CDUT); 738dbb799c3SYuval Mintz } 739dbb799c3SYuval Mintz } 740dbb799c3SYuval Mintz 741fe56b9e6SYuval Mintz /* QM */ 742f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_QM]); 743f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[0]); 744fe56b9e6SYuval Mintz 745fe56b9e6SYuval Mintz qed_cxt_qm_iids(p_hwfn, &qm_iids); 746da090917STomer Tayar total = qed_qm_pf_mem_size(qm_iids.cids, 747dbb799c3SYuval Mintz qm_iids.vf_cids, qm_iids.tids, 7481408cc1fSYuval Mintz p_hwfn->qm_info.num_pqs, 7491408cc1fSYuval Mintz p_hwfn->qm_info.num_vf_pqs); 750fe56b9e6SYuval Mintz 7511408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, 7521408cc1fSYuval Mintz QED_MSG_ILT, 753dbb799c3SYuval Mintz "QM ILT Info, (cids=%d, vf_cids=%d, tids=%d, num_pqs=%d, num_vf_pqs=%d, memory_size=%d)\n", 7541408cc1fSYuval Mintz qm_iids.cids, 7551408cc1fSYuval Mintz qm_iids.vf_cids, 756dbb799c3SYuval Mintz qm_iids.tids, 7571408cc1fSYuval Mintz p_hwfn->qm_info.num_pqs, p_hwfn->qm_info.num_vf_pqs, total); 758fe56b9e6SYuval Mintz 759fe56b9e6SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, 760fe56b9e6SYuval Mintz curr_line, total * 0x1000, 761fe56b9e6SYuval Mintz QM_PQ_ELEMENT_SIZE); 762fe56b9e6SYuval Mintz 763fe56b9e6SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_QM); 764fe56b9e6SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line; 765fe56b9e6SYuval Mintz 766dbb799c3SYuval Mintz /* SRC */ 767f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_SRC]); 768dbb799c3SYuval Mintz qed_cxt_src_iids(p_mngr, &src_iids); 769dbb799c3SYuval Mintz 770dbb799c3SYuval Mintz /* Both the PF and VFs searcher connections are stored in the per PF 771dbb799c3SYuval Mintz * database. Thus sum the PF searcher cids and all the VFs searcher 772dbb799c3SYuval Mintz * cids. 773dbb799c3SYuval Mintz */ 774dbb799c3SYuval Mintz total = src_iids.pf_cids + src_iids.per_vf_cids * p_mngr->vf_count; 775dbb799c3SYuval Mintz if (total) { 776dbb799c3SYuval Mintz u32 local_max = max_t(u32, total, 777dbb799c3SYuval Mintz SRC_MIN_NUM_ELEMS); 778dbb799c3SYuval Mintz 779dbb799c3SYuval Mintz total = roundup_pow_of_two(local_max); 780dbb799c3SYuval Mintz 781f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[0]); 782dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 783dbb799c3SYuval Mintz total * sizeof(struct src_ent), 784dbb799c3SYuval Mintz sizeof(struct src_ent)); 785dbb799c3SYuval Mintz 786dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 787dbb799c3SYuval Mintz ILT_CLI_SRC); 788dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line; 789dbb799c3SYuval Mintz } 790dbb799c3SYuval Mintz 791dbb799c3SYuval Mintz /* TM PF */ 792f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_TM]); 79344531ba4SMichal Kalderon qed_cxt_tm_iids(p_hwfn, p_mngr, &tm_iids); 794dbb799c3SYuval Mintz total = tm_iids.pf_cids + tm_iids.pf_tids_total; 795dbb799c3SYuval Mintz if (total) { 796f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[0]); 797dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 798dbb799c3SYuval Mintz total * TM_ELEM_SIZE, TM_ELEM_SIZE); 799dbb799c3SYuval Mintz 800dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 801dbb799c3SYuval Mintz ILT_CLI_TM); 802dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line; 803dbb799c3SYuval Mintz } 804dbb799c3SYuval Mintz 805dbb799c3SYuval Mintz /* TM VF */ 806dbb799c3SYuval Mintz total = tm_iids.per_vf_cids + tm_iids.per_vf_tids; 807dbb799c3SYuval Mintz if (total) { 808f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->vf_blks[0]); 809dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 810dbb799c3SYuval Mintz total * TM_ELEM_SIZE, TM_ELEM_SIZE); 811dbb799c3SYuval Mintz 812dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 813dbb799c3SYuval Mintz ILT_CLI_TM); 814dbb799c3SYuval Mintz 81570566b42SMintz, Yuval p_cli->vf_total_lines = curr_line - p_blk->start_line; 816dbb799c3SYuval Mintz for (i = 1; i < p_mngr->vf_count; i++) 817dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 818dbb799c3SYuval Mintz ILT_CLI_TM); 819dbb799c3SYuval Mintz } 820dbb799c3SYuval Mintz 821dbb799c3SYuval Mintz /* TSDM (SRQ CONTEXT) */ 822dbb799c3SYuval Mintz total = qed_cxt_get_srq_count(p_hwfn); 823dbb799c3SYuval Mintz 824dbb799c3SYuval Mintz if (total) { 825f9dc4d1fSRam Amrani p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_TSDM]); 826f9dc4d1fSRam Amrani p_blk = qed_cxt_set_blk(&p_cli->pf_blks[SRQ_BLK]); 827dbb799c3SYuval Mintz qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line, 828dbb799c3SYuval Mintz total * SRQ_CXT_SIZE, SRQ_CXT_SIZE); 829dbb799c3SYuval Mintz 830dbb799c3SYuval Mintz qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, 831dbb799c3SYuval Mintz ILT_CLI_TSDM); 832dbb799c3SYuval Mintz p_cli->pf_total_lines = curr_line - p_blk->start_line; 833dbb799c3SYuval Mintz } 834dbb799c3SYuval Mintz 835f9dc4d1fSRam Amrani *line_count = curr_line - p_hwfn->p_cxt_mngr->pf_start_line; 836f9dc4d1fSRam Amrani 837fe56b9e6SYuval Mintz if (curr_line - p_hwfn->p_cxt_mngr->pf_start_line > 838f9dc4d1fSRam Amrani RESC_NUM(p_hwfn, QED_ILT)) 839fe56b9e6SYuval Mintz return -EINVAL; 840f9dc4d1fSRam Amrani 841f9dc4d1fSRam Amrani return 0; 842fe56b9e6SYuval Mintz } 843fe56b9e6SYuval Mintz 844f9dc4d1fSRam Amrani u32 qed_cxt_cfg_ilt_compute_excess(struct qed_hwfn *p_hwfn, u32 used_lines) 845f9dc4d1fSRam Amrani { 846f9dc4d1fSRam Amrani struct qed_ilt_client_cfg *p_cli; 847f9dc4d1fSRam Amrani u32 excess_lines, available_lines; 848f9dc4d1fSRam Amrani struct qed_cxt_mngr *p_mngr; 849f9dc4d1fSRam Amrani u32 ilt_page_size, elem_size; 850f9dc4d1fSRam Amrani struct qed_tid_seg *p_seg; 851f9dc4d1fSRam Amrani int i; 852f9dc4d1fSRam Amrani 853f9dc4d1fSRam Amrani available_lines = RESC_NUM(p_hwfn, QED_ILT); 854f9dc4d1fSRam Amrani excess_lines = used_lines - available_lines; 855f9dc4d1fSRam Amrani 856f9dc4d1fSRam Amrani if (!excess_lines) 857f9dc4d1fSRam Amrani return 0; 858f9dc4d1fSRam Amrani 859c851a9dcSKalderon, Michal if (!QED_IS_RDMA_PERSONALITY(p_hwfn)) 860f9dc4d1fSRam Amrani return 0; 861f9dc4d1fSRam Amrani 862f9dc4d1fSRam Amrani p_mngr = p_hwfn->p_cxt_mngr; 863f9dc4d1fSRam Amrani p_cli = &p_mngr->clients[ILT_CLI_CDUT]; 864f9dc4d1fSRam Amrani ilt_page_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val); 865f9dc4d1fSRam Amrani 866f9dc4d1fSRam Amrani for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) { 867f9dc4d1fSRam Amrani p_seg = qed_cxt_tid_seg_info(p_hwfn, i); 868f9dc4d1fSRam Amrani if (!p_seg || p_seg->count == 0) 869f9dc4d1fSRam Amrani continue; 870f9dc4d1fSRam Amrani 871f9dc4d1fSRam Amrani elem_size = p_mngr->task_type_size[p_seg->type]; 872f9dc4d1fSRam Amrani if (!elem_size) 873f9dc4d1fSRam Amrani continue; 874f9dc4d1fSRam Amrani 875f9dc4d1fSRam Amrani return (ilt_page_size / elem_size) * excess_lines; 876f9dc4d1fSRam Amrani } 877f9dc4d1fSRam Amrani 878f9dc4d1fSRam Amrani DP_NOTICE(p_hwfn, "failed computing excess ILT lines\n"); 879fe56b9e6SYuval Mintz return 0; 880fe56b9e6SYuval Mintz } 881fe56b9e6SYuval Mintz 882dbb799c3SYuval Mintz static void qed_cxt_src_t2_free(struct qed_hwfn *p_hwfn) 883dbb799c3SYuval Mintz { 884dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 885dbb799c3SYuval Mintz u32 i; 886dbb799c3SYuval Mintz 887dbb799c3SYuval Mintz if (!p_mngr->t2) 888dbb799c3SYuval Mintz return; 889dbb799c3SYuval Mintz 890dbb799c3SYuval Mintz for (i = 0; i < p_mngr->t2_num_pages; i++) 891dbb799c3SYuval Mintz if (p_mngr->t2[i].p_virt) 892dbb799c3SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev, 893dbb799c3SYuval Mintz p_mngr->t2[i].size, 894dbb799c3SYuval Mintz p_mngr->t2[i].p_virt, 895dbb799c3SYuval Mintz p_mngr->t2[i].p_phys); 896dbb799c3SYuval Mintz 897dbb799c3SYuval Mintz kfree(p_mngr->t2); 898dbb799c3SYuval Mintz p_mngr->t2 = NULL; 899dbb799c3SYuval Mintz } 900dbb799c3SYuval Mintz 901dbb799c3SYuval Mintz static int qed_cxt_src_t2_alloc(struct qed_hwfn *p_hwfn) 902dbb799c3SYuval Mintz { 903dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 904dbb799c3SYuval Mintz u32 conn_num, total_size, ent_per_page, psz, i; 905dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_src; 906dbb799c3SYuval Mintz struct qed_src_iids src_iids; 907dbb799c3SYuval Mintz struct qed_dma_mem *p_t2; 908dbb799c3SYuval Mintz int rc; 909dbb799c3SYuval Mintz 910dbb799c3SYuval Mintz memset(&src_iids, 0, sizeof(src_iids)); 911dbb799c3SYuval Mintz 912dbb799c3SYuval Mintz /* if the SRC ILT client is inactive - there are no connection 913dbb799c3SYuval Mintz * requiring the searcer, leave. 914dbb799c3SYuval Mintz */ 915dbb799c3SYuval Mintz p_src = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_SRC]; 916dbb799c3SYuval Mintz if (!p_src->active) 917dbb799c3SYuval Mintz return 0; 918dbb799c3SYuval Mintz 919dbb799c3SYuval Mintz qed_cxt_src_iids(p_mngr, &src_iids); 920dbb799c3SYuval Mintz conn_num = src_iids.pf_cids + src_iids.per_vf_cids * p_mngr->vf_count; 921dbb799c3SYuval Mintz total_size = conn_num * sizeof(struct src_ent); 922dbb799c3SYuval Mintz 923dbb799c3SYuval Mintz /* use the same page size as the SRC ILT client */ 924dbb799c3SYuval Mintz psz = ILT_PAGE_IN_BYTES(p_src->p_size.val); 925dbb799c3SYuval Mintz p_mngr->t2_num_pages = DIV_ROUND_UP(total_size, psz); 926dbb799c3SYuval Mintz 927dbb799c3SYuval Mintz /* allocate t2 */ 9282591c280SJoe Perches p_mngr->t2 = kcalloc(p_mngr->t2_num_pages, sizeof(struct qed_dma_mem), 929dbb799c3SYuval Mintz GFP_KERNEL); 930dbb799c3SYuval Mintz if (!p_mngr->t2) { 931dbb799c3SYuval Mintz rc = -ENOMEM; 932dbb799c3SYuval Mintz goto t2_fail; 933dbb799c3SYuval Mintz } 934dbb799c3SYuval Mintz 935dbb799c3SYuval Mintz /* allocate t2 pages */ 936dbb799c3SYuval Mintz for (i = 0; i < p_mngr->t2_num_pages; i++) { 937dbb799c3SYuval Mintz u32 size = min_t(u32, total_size, psz); 938dbb799c3SYuval Mintz void **p_virt = &p_mngr->t2[i].p_virt; 939dbb799c3SYuval Mintz 940ff2e351eSYueHaibing *p_virt = dma_zalloc_coherent(&p_hwfn->cdev->pdev->dev, 941ff2e351eSYueHaibing size, &p_mngr->t2[i].p_phys, 942ff2e351eSYueHaibing GFP_KERNEL); 943dbb799c3SYuval Mintz if (!p_mngr->t2[i].p_virt) { 944dbb799c3SYuval Mintz rc = -ENOMEM; 945dbb799c3SYuval Mintz goto t2_fail; 946dbb799c3SYuval Mintz } 947dbb799c3SYuval Mintz p_mngr->t2[i].size = size; 948dbb799c3SYuval Mintz total_size -= size; 949dbb799c3SYuval Mintz } 950dbb799c3SYuval Mintz 951dbb799c3SYuval Mintz /* Set the t2 pointers */ 952dbb799c3SYuval Mintz 953dbb799c3SYuval Mintz /* entries per page - must be a power of two */ 954dbb799c3SYuval Mintz ent_per_page = psz / sizeof(struct src_ent); 955dbb799c3SYuval Mintz 956dbb799c3SYuval Mintz p_mngr->first_free = (u64) p_mngr->t2[0].p_phys; 957dbb799c3SYuval Mintz 958dbb799c3SYuval Mintz p_t2 = &p_mngr->t2[(conn_num - 1) / ent_per_page]; 959dbb799c3SYuval Mintz p_mngr->last_free = (u64) p_t2->p_phys + 960dbb799c3SYuval Mintz ((conn_num - 1) & (ent_per_page - 1)) * sizeof(struct src_ent); 961dbb799c3SYuval Mintz 962dbb799c3SYuval Mintz for (i = 0; i < p_mngr->t2_num_pages; i++) { 963dbb799c3SYuval Mintz u32 ent_num = min_t(u32, 964dbb799c3SYuval Mintz ent_per_page, 965dbb799c3SYuval Mintz conn_num); 966dbb799c3SYuval Mintz struct src_ent *entries = p_mngr->t2[i].p_virt; 967dbb799c3SYuval Mintz u64 p_ent_phys = (u64) p_mngr->t2[i].p_phys, val; 968dbb799c3SYuval Mintz u32 j; 969dbb799c3SYuval Mintz 970dbb799c3SYuval Mintz for (j = 0; j < ent_num - 1; j++) { 971dbb799c3SYuval Mintz val = p_ent_phys + (j + 1) * sizeof(struct src_ent); 972dbb799c3SYuval Mintz entries[j].next = cpu_to_be64(val); 973dbb799c3SYuval Mintz } 974dbb799c3SYuval Mintz 975dbb799c3SYuval Mintz if (i < p_mngr->t2_num_pages - 1) 976dbb799c3SYuval Mintz val = (u64) p_mngr->t2[i + 1].p_phys; 977dbb799c3SYuval Mintz else 978dbb799c3SYuval Mintz val = 0; 979dbb799c3SYuval Mintz entries[j].next = cpu_to_be64(val); 980dbb799c3SYuval Mintz 98101e517f1SDan Carpenter conn_num -= ent_num; 982dbb799c3SYuval Mintz } 983dbb799c3SYuval Mintz 984dbb799c3SYuval Mintz return 0; 985dbb799c3SYuval Mintz 986dbb799c3SYuval Mintz t2_fail: 987dbb799c3SYuval Mintz qed_cxt_src_t2_free(p_hwfn); 988dbb799c3SYuval Mintz return rc; 989dbb799c3SYuval Mintz } 990dbb799c3SYuval Mintz 991fe56b9e6SYuval Mintz #define for_each_ilt_valid_client(pos, clients) \ 992dbb799c3SYuval Mintz for (pos = 0; pos < ILT_CLI_MAX; pos++) \ 993dbb799c3SYuval Mintz if (!clients[pos].active) { \ 994dbb799c3SYuval Mintz continue; \ 995dbb799c3SYuval Mintz } else \ 996fe56b9e6SYuval Mintz 997fe56b9e6SYuval Mintz /* Total number of ILT lines used by this PF */ 998fe56b9e6SYuval Mintz static u32 qed_cxt_ilt_shadow_size(struct qed_ilt_client_cfg *ilt_clients) 999fe56b9e6SYuval Mintz { 1000fe56b9e6SYuval Mintz u32 size = 0; 1001fe56b9e6SYuval Mintz u32 i; 1002fe56b9e6SYuval Mintz 1003dbb799c3SYuval Mintz for_each_ilt_valid_client(i, ilt_clients) 1004dbb799c3SYuval Mintz size += (ilt_clients[i].last.val - ilt_clients[i].first.val + 1); 1005fe56b9e6SYuval Mintz 1006fe56b9e6SYuval Mintz return size; 1007fe56b9e6SYuval Mintz } 1008fe56b9e6SYuval Mintz 1009fe56b9e6SYuval Mintz static void qed_ilt_shadow_free(struct qed_hwfn *p_hwfn) 1010fe56b9e6SYuval Mintz { 1011fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *p_cli = p_hwfn->p_cxt_mngr->clients; 1012fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1013fe56b9e6SYuval Mintz u32 ilt_size, i; 1014fe56b9e6SYuval Mintz 1015fe56b9e6SYuval Mintz ilt_size = qed_cxt_ilt_shadow_size(p_cli); 1016fe56b9e6SYuval Mintz 1017fe56b9e6SYuval Mintz for (i = 0; p_mngr->ilt_shadow && i < ilt_size; i++) { 1018fe56b9e6SYuval Mintz struct qed_dma_mem *p_dma = &p_mngr->ilt_shadow[i]; 1019fe56b9e6SYuval Mintz 1020fe56b9e6SYuval Mintz if (p_dma->p_virt) 1021fe56b9e6SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev, 1022fe56b9e6SYuval Mintz p_dma->size, p_dma->p_virt, 1023fe56b9e6SYuval Mintz p_dma->p_phys); 1024fe56b9e6SYuval Mintz p_dma->p_virt = NULL; 1025fe56b9e6SYuval Mintz } 1026fe56b9e6SYuval Mintz kfree(p_mngr->ilt_shadow); 1027fe56b9e6SYuval Mintz } 1028fe56b9e6SYuval Mintz 1029fe56b9e6SYuval Mintz static int qed_ilt_blk_alloc(struct qed_hwfn *p_hwfn, 1030fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk, 1031fe56b9e6SYuval Mintz enum ilt_clients ilt_client, 1032fe56b9e6SYuval Mintz u32 start_line_offset) 1033fe56b9e6SYuval Mintz { 1034fe56b9e6SYuval Mintz struct qed_dma_mem *ilt_shadow = p_hwfn->p_cxt_mngr->ilt_shadow; 1035dbb799c3SYuval Mintz u32 lines, line, sz_left, lines_to_skip = 0; 1036dbb799c3SYuval Mintz 1037dbb799c3SYuval Mintz /* Special handling for RoCE that supports dynamic allocation */ 1038c851a9dcSKalderon, Michal if (QED_IS_RDMA_PERSONALITY(p_hwfn) && 1039dbb799c3SYuval Mintz ((ilt_client == ILT_CLI_CDUT) || ilt_client == ILT_CLI_TSDM)) 1040dbb799c3SYuval Mintz return 0; 1041dbb799c3SYuval Mintz 1042dbb799c3SYuval Mintz lines_to_skip = p_blk->dynamic_line_cnt; 1043fe56b9e6SYuval Mintz 1044fe56b9e6SYuval Mintz if (!p_blk->total_size) 1045fe56b9e6SYuval Mintz return 0; 1046fe56b9e6SYuval Mintz 1047fe56b9e6SYuval Mintz sz_left = p_blk->total_size; 1048dbb799c3SYuval Mintz lines = DIV_ROUND_UP(sz_left, p_blk->real_size_in_page) - lines_to_skip; 1049fe56b9e6SYuval Mintz line = p_blk->start_line + start_line_offset - 1050dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->pf_start_line + lines_to_skip; 1051fe56b9e6SYuval Mintz 1052fe56b9e6SYuval Mintz for (; lines; lines--) { 1053fe56b9e6SYuval Mintz dma_addr_t p_phys; 1054fe56b9e6SYuval Mintz void *p_virt; 1055fe56b9e6SYuval Mintz u32 size; 1056fe56b9e6SYuval Mintz 10571a635e48SYuval Mintz size = min_t(u32, sz_left, p_blk->real_size_in_page); 10585f58dff9SHimanshu Jha p_virt = dma_zalloc_coherent(&p_hwfn->cdev->pdev->dev, size, 10595f58dff9SHimanshu Jha &p_phys, GFP_KERNEL); 1060fe56b9e6SYuval Mintz if (!p_virt) 1061fe56b9e6SYuval Mintz return -ENOMEM; 1062fe56b9e6SYuval Mintz 1063fe56b9e6SYuval Mintz ilt_shadow[line].p_phys = p_phys; 1064fe56b9e6SYuval Mintz ilt_shadow[line].p_virt = p_virt; 1065fe56b9e6SYuval Mintz ilt_shadow[line].size = size; 1066fe56b9e6SYuval Mintz 1067fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 1068fe56b9e6SYuval Mintz "ILT shadow: Line [%d] Physical 0x%llx Virtual %p Size %d\n", 1069fe56b9e6SYuval Mintz line, (u64)p_phys, p_virt, size); 1070fe56b9e6SYuval Mintz 1071fe56b9e6SYuval Mintz sz_left -= size; 1072fe56b9e6SYuval Mintz line++; 1073fe56b9e6SYuval Mintz } 1074fe56b9e6SYuval Mintz 1075fe56b9e6SYuval Mintz return 0; 1076fe56b9e6SYuval Mintz } 1077fe56b9e6SYuval Mintz 1078fe56b9e6SYuval Mintz static int qed_ilt_shadow_alloc(struct qed_hwfn *p_hwfn) 1079fe56b9e6SYuval Mintz { 1080fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1081fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *clients = p_mngr->clients; 1082fe56b9e6SYuval Mintz struct qed_ilt_cli_blk *p_blk; 10831408cc1fSYuval Mintz u32 size, i, j, k; 1084fe56b9e6SYuval Mintz int rc; 1085fe56b9e6SYuval Mintz 1086fe56b9e6SYuval Mintz size = qed_cxt_ilt_shadow_size(clients); 1087fe56b9e6SYuval Mintz p_mngr->ilt_shadow = kcalloc(size, sizeof(struct qed_dma_mem), 1088fe56b9e6SYuval Mintz GFP_KERNEL); 1089fe56b9e6SYuval Mintz if (!p_mngr->ilt_shadow) { 1090fe56b9e6SYuval Mintz rc = -ENOMEM; 1091fe56b9e6SYuval Mintz goto ilt_shadow_fail; 1092fe56b9e6SYuval Mintz } 1093fe56b9e6SYuval Mintz 1094fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 1095fe56b9e6SYuval Mintz "Allocated 0x%x bytes for ilt shadow\n", 1096fe56b9e6SYuval Mintz (u32)(size * sizeof(struct qed_dma_mem))); 1097fe56b9e6SYuval Mintz 1098fe56b9e6SYuval Mintz for_each_ilt_valid_client(i, clients) { 1099fe56b9e6SYuval Mintz for (j = 0; j < ILT_CLI_PF_BLOCKS; j++) { 1100fe56b9e6SYuval Mintz p_blk = &clients[i].pf_blks[j]; 1101fe56b9e6SYuval Mintz rc = qed_ilt_blk_alloc(p_hwfn, p_blk, i, 0); 11021a635e48SYuval Mintz if (rc) 1103fe56b9e6SYuval Mintz goto ilt_shadow_fail; 1104fe56b9e6SYuval Mintz } 11051408cc1fSYuval Mintz for (k = 0; k < p_mngr->vf_count; k++) { 11061408cc1fSYuval Mintz for (j = 0; j < ILT_CLI_VF_BLOCKS; j++) { 11071408cc1fSYuval Mintz u32 lines = clients[i].vf_total_lines * k; 11081408cc1fSYuval Mintz 11091408cc1fSYuval Mintz p_blk = &clients[i].vf_blks[j]; 11101408cc1fSYuval Mintz rc = qed_ilt_blk_alloc(p_hwfn, p_blk, i, lines); 11111a635e48SYuval Mintz if (rc) 11121408cc1fSYuval Mintz goto ilt_shadow_fail; 11131408cc1fSYuval Mintz } 11141408cc1fSYuval Mintz } 1115fe56b9e6SYuval Mintz } 1116fe56b9e6SYuval Mintz 1117fe56b9e6SYuval Mintz return 0; 1118fe56b9e6SYuval Mintz 1119fe56b9e6SYuval Mintz ilt_shadow_fail: 1120fe56b9e6SYuval Mintz qed_ilt_shadow_free(p_hwfn); 1121fe56b9e6SYuval Mintz return rc; 1122fe56b9e6SYuval Mintz } 1123fe56b9e6SYuval Mintz 1124fe56b9e6SYuval Mintz static void qed_cid_map_free(struct qed_hwfn *p_hwfn) 1125fe56b9e6SYuval Mintz { 1126fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 11276bea61daSMintz, Yuval u32 type, vf; 1128fe56b9e6SYuval Mintz 1129fe56b9e6SYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) { 1130fe56b9e6SYuval Mintz kfree(p_mngr->acquired[type].cid_map); 1131fe56b9e6SYuval Mintz p_mngr->acquired[type].max_count = 0; 1132fe56b9e6SYuval Mintz p_mngr->acquired[type].start_cid = 0; 11336bea61daSMintz, Yuval 11346bea61daSMintz, Yuval for (vf = 0; vf < MAX_NUM_VFS; vf++) { 11356bea61daSMintz, Yuval kfree(p_mngr->acquired_vf[type][vf].cid_map); 11366bea61daSMintz, Yuval p_mngr->acquired_vf[type][vf].max_count = 0; 11376bea61daSMintz, Yuval p_mngr->acquired_vf[type][vf].start_cid = 0; 1138fe56b9e6SYuval Mintz } 1139fe56b9e6SYuval Mintz } 11406bea61daSMintz, Yuval } 11416bea61daSMintz, Yuval 11426bea61daSMintz, Yuval static int 11436bea61daSMintz, Yuval qed_cid_map_alloc_single(struct qed_hwfn *p_hwfn, 11446bea61daSMintz, Yuval u32 type, 11456bea61daSMintz, Yuval u32 cid_start, 11466bea61daSMintz, Yuval u32 cid_count, struct qed_cid_acquired_map *p_map) 11476bea61daSMintz, Yuval { 11486bea61daSMintz, Yuval u32 size; 11496bea61daSMintz, Yuval 11506bea61daSMintz, Yuval if (!cid_count) 11516bea61daSMintz, Yuval return 0; 11526bea61daSMintz, Yuval 11536bea61daSMintz, Yuval size = DIV_ROUND_UP(cid_count, 11546bea61daSMintz, Yuval sizeof(unsigned long) * BITS_PER_BYTE) * 11556bea61daSMintz, Yuval sizeof(unsigned long); 11566bea61daSMintz, Yuval p_map->cid_map = kzalloc(size, GFP_KERNEL); 11576bea61daSMintz, Yuval if (!p_map->cid_map) 11586bea61daSMintz, Yuval return -ENOMEM; 11596bea61daSMintz, Yuval 11606bea61daSMintz, Yuval p_map->max_count = cid_count; 11616bea61daSMintz, Yuval p_map->start_cid = cid_start; 11626bea61daSMintz, Yuval 11636bea61daSMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_CXT, 11646bea61daSMintz, Yuval "Type %08x start: %08x count %08x\n", 11656bea61daSMintz, Yuval type, p_map->start_cid, p_map->max_count); 11666bea61daSMintz, Yuval 11676bea61daSMintz, Yuval return 0; 11686bea61daSMintz, Yuval } 1169fe56b9e6SYuval Mintz 1170fe56b9e6SYuval Mintz static int qed_cid_map_alloc(struct qed_hwfn *p_hwfn) 1171fe56b9e6SYuval Mintz { 1172fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 11736bea61daSMintz, Yuval u32 start_cid = 0, vf_start_cid = 0; 11746bea61daSMintz, Yuval u32 type, vf; 1175fe56b9e6SYuval Mintz 1176fe56b9e6SYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) { 11776bea61daSMintz, Yuval struct qed_conn_type_cfg *p_cfg = &p_mngr->conn_cfg[type]; 11786bea61daSMintz, Yuval struct qed_cid_acquired_map *p_map; 1179fe56b9e6SYuval Mintz 11806bea61daSMintz, Yuval /* Handle PF maps */ 11816bea61daSMintz, Yuval p_map = &p_mngr->acquired[type]; 11826bea61daSMintz, Yuval if (qed_cid_map_alloc_single(p_hwfn, type, start_cid, 11836bea61daSMintz, Yuval p_cfg->cid_count, p_map)) 1184fe56b9e6SYuval Mintz goto cid_map_fail; 1185fe56b9e6SYuval Mintz 11866bea61daSMintz, Yuval /* Handle VF maps */ 11876bea61daSMintz, Yuval for (vf = 0; vf < MAX_NUM_VFS; vf++) { 11886bea61daSMintz, Yuval p_map = &p_mngr->acquired_vf[type][vf]; 11896bea61daSMintz, Yuval if (qed_cid_map_alloc_single(p_hwfn, type, 11906bea61daSMintz, Yuval vf_start_cid, 11916bea61daSMintz, Yuval p_cfg->cids_per_vf, p_map)) 11926bea61daSMintz, Yuval goto cid_map_fail; 11936bea61daSMintz, Yuval } 1194fe56b9e6SYuval Mintz 11956bea61daSMintz, Yuval start_cid += p_cfg->cid_count; 11966bea61daSMintz, Yuval vf_start_cid += p_cfg->cids_per_vf; 1197fe56b9e6SYuval Mintz } 1198fe56b9e6SYuval Mintz 1199fe56b9e6SYuval Mintz return 0; 1200fe56b9e6SYuval Mintz 1201fe56b9e6SYuval Mintz cid_map_fail: 1202fe56b9e6SYuval Mintz qed_cid_map_free(p_hwfn); 1203fe56b9e6SYuval Mintz return -ENOMEM; 1204fe56b9e6SYuval Mintz } 1205fe56b9e6SYuval Mintz 1206fe56b9e6SYuval Mintz int qed_cxt_mngr_alloc(struct qed_hwfn *p_hwfn) 1207fe56b9e6SYuval Mintz { 1208dbb799c3SYuval Mintz struct qed_ilt_client_cfg *clients; 1209fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr; 1210fe56b9e6SYuval Mintz u32 i; 1211fe56b9e6SYuval Mintz 121260fffb3bSYuval Mintz p_mngr = kzalloc(sizeof(*p_mngr), GFP_KERNEL); 12132591c280SJoe Perches if (!p_mngr) 1214fe56b9e6SYuval Mintz return -ENOMEM; 1215fe56b9e6SYuval Mintz 1216fe56b9e6SYuval Mintz /* Initialize ILT client registers */ 1217dbb799c3SYuval Mintz clients = p_mngr->clients; 1218dbb799c3SYuval Mintz clients[ILT_CLI_CDUC].first.reg = ILT_CFG_REG(CDUC, FIRST_ILT); 1219dbb799c3SYuval Mintz clients[ILT_CLI_CDUC].last.reg = ILT_CFG_REG(CDUC, LAST_ILT); 1220dbb799c3SYuval Mintz clients[ILT_CLI_CDUC].p_size.reg = ILT_CFG_REG(CDUC, P_SIZE); 1221fe56b9e6SYuval Mintz 1222dbb799c3SYuval Mintz clients[ILT_CLI_QM].first.reg = ILT_CFG_REG(QM, FIRST_ILT); 1223dbb799c3SYuval Mintz clients[ILT_CLI_QM].last.reg = ILT_CFG_REG(QM, LAST_ILT); 1224dbb799c3SYuval Mintz clients[ILT_CLI_QM].p_size.reg = ILT_CFG_REG(QM, P_SIZE); 1225fe56b9e6SYuval Mintz 1226dbb799c3SYuval Mintz clients[ILT_CLI_TM].first.reg = ILT_CFG_REG(TM, FIRST_ILT); 1227dbb799c3SYuval Mintz clients[ILT_CLI_TM].last.reg = ILT_CFG_REG(TM, LAST_ILT); 1228dbb799c3SYuval Mintz clients[ILT_CLI_TM].p_size.reg = ILT_CFG_REG(TM, P_SIZE); 1229dbb799c3SYuval Mintz 1230dbb799c3SYuval Mintz clients[ILT_CLI_SRC].first.reg = ILT_CFG_REG(SRC, FIRST_ILT); 1231dbb799c3SYuval Mintz clients[ILT_CLI_SRC].last.reg = ILT_CFG_REG(SRC, LAST_ILT); 1232dbb799c3SYuval Mintz clients[ILT_CLI_SRC].p_size.reg = ILT_CFG_REG(SRC, P_SIZE); 1233dbb799c3SYuval Mintz 1234dbb799c3SYuval Mintz clients[ILT_CLI_CDUT].first.reg = ILT_CFG_REG(CDUT, FIRST_ILT); 1235dbb799c3SYuval Mintz clients[ILT_CLI_CDUT].last.reg = ILT_CFG_REG(CDUT, LAST_ILT); 1236dbb799c3SYuval Mintz clients[ILT_CLI_CDUT].p_size.reg = ILT_CFG_REG(CDUT, P_SIZE); 1237dbb799c3SYuval Mintz 1238dbb799c3SYuval Mintz clients[ILT_CLI_TSDM].first.reg = ILT_CFG_REG(TSDM, FIRST_ILT); 1239dbb799c3SYuval Mintz clients[ILT_CLI_TSDM].last.reg = ILT_CFG_REG(TSDM, LAST_ILT); 1240dbb799c3SYuval Mintz clients[ILT_CLI_TSDM].p_size.reg = ILT_CFG_REG(TSDM, P_SIZE); 1241be086e7cSMintz, Yuval /* default ILT page size for all clients is 64K */ 1242fe56b9e6SYuval Mintz for (i = 0; i < ILT_CLI_MAX; i++) 1243fe56b9e6SYuval Mintz p_mngr->clients[i].p_size.val = ILT_DEFAULT_HW_P_SIZE; 1244fe56b9e6SYuval Mintz 1245dbb799c3SYuval Mintz /* Initialize task sizes */ 1246dbb799c3SYuval Mintz p_mngr->task_type_size[0] = TYPE0_TASK_CXT_SIZE(p_hwfn); 1247dbb799c3SYuval Mintz p_mngr->task_type_size[1] = TYPE1_TASK_CXT_SIZE(p_hwfn); 1248dbb799c3SYuval Mintz 12491408cc1fSYuval Mintz if (p_hwfn->cdev->p_iov_info) 12501408cc1fSYuval Mintz p_mngr->vf_count = p_hwfn->cdev->p_iov_info->total_vfs; 1251dbb799c3SYuval Mintz /* Initialize the dynamic ILT allocation mutex */ 1252dbb799c3SYuval Mintz mutex_init(&p_mngr->mutex); 12531408cc1fSYuval Mintz 1254fe56b9e6SYuval Mintz /* Set the cxt mangr pointer priori to further allocations */ 1255fe56b9e6SYuval Mintz p_hwfn->p_cxt_mngr = p_mngr; 1256fe56b9e6SYuval Mintz 1257fe56b9e6SYuval Mintz return 0; 1258fe56b9e6SYuval Mintz } 1259fe56b9e6SYuval Mintz 1260fe56b9e6SYuval Mintz int qed_cxt_tables_alloc(struct qed_hwfn *p_hwfn) 1261fe56b9e6SYuval Mintz { 1262fe56b9e6SYuval Mintz int rc; 1263fe56b9e6SYuval Mintz 1264fe56b9e6SYuval Mintz /* Allocate the ILT shadow table */ 1265fe56b9e6SYuval Mintz rc = qed_ilt_shadow_alloc(p_hwfn); 12662591c280SJoe Perches if (rc) 1267fe56b9e6SYuval Mintz goto tables_alloc_fail; 1268fe56b9e6SYuval Mintz 1269dbb799c3SYuval Mintz /* Allocate the T2 table */ 1270dbb799c3SYuval Mintz rc = qed_cxt_src_t2_alloc(p_hwfn); 12712591c280SJoe Perches if (rc) 1272dbb799c3SYuval Mintz goto tables_alloc_fail; 1273dbb799c3SYuval Mintz 1274fe56b9e6SYuval Mintz /* Allocate and initialize the acquired cids bitmaps */ 1275fe56b9e6SYuval Mintz rc = qed_cid_map_alloc(p_hwfn); 12762591c280SJoe Perches if (rc) 1277fe56b9e6SYuval Mintz goto tables_alloc_fail; 1278fe56b9e6SYuval Mintz 1279fe56b9e6SYuval Mintz return 0; 1280fe56b9e6SYuval Mintz 1281fe56b9e6SYuval Mintz tables_alloc_fail: 1282fe56b9e6SYuval Mintz qed_cxt_mngr_free(p_hwfn); 1283fe56b9e6SYuval Mintz return rc; 1284fe56b9e6SYuval Mintz } 1285fe56b9e6SYuval Mintz 1286fe56b9e6SYuval Mintz void qed_cxt_mngr_free(struct qed_hwfn *p_hwfn) 1287fe56b9e6SYuval Mintz { 1288fe56b9e6SYuval Mintz if (!p_hwfn->p_cxt_mngr) 1289fe56b9e6SYuval Mintz return; 1290fe56b9e6SYuval Mintz 1291fe56b9e6SYuval Mintz qed_cid_map_free(p_hwfn); 1292dbb799c3SYuval Mintz qed_cxt_src_t2_free(p_hwfn); 1293fe56b9e6SYuval Mintz qed_ilt_shadow_free(p_hwfn); 1294fe56b9e6SYuval Mintz kfree(p_hwfn->p_cxt_mngr); 1295fe56b9e6SYuval Mintz 1296fe56b9e6SYuval Mintz p_hwfn->p_cxt_mngr = NULL; 1297fe56b9e6SYuval Mintz } 1298fe56b9e6SYuval Mintz 1299fe56b9e6SYuval Mintz void qed_cxt_mngr_setup(struct qed_hwfn *p_hwfn) 1300fe56b9e6SYuval Mintz { 1301fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 13026bea61daSMintz, Yuval struct qed_cid_acquired_map *p_map; 13036bea61daSMintz, Yuval struct qed_conn_type_cfg *p_cfg; 1304fe56b9e6SYuval Mintz int type; 13056bea61daSMintz, Yuval u32 len; 1306fe56b9e6SYuval Mintz 1307fe56b9e6SYuval Mintz /* Reset acquired cids */ 1308fe56b9e6SYuval Mintz for (type = 0; type < MAX_CONN_TYPES; type++) { 13096bea61daSMintz, Yuval u32 vf; 1310fe56b9e6SYuval Mintz 13116bea61daSMintz, Yuval p_cfg = &p_mngr->conn_cfg[type]; 13126bea61daSMintz, Yuval if (p_cfg->cid_count) { 13136bea61daSMintz, Yuval p_map = &p_mngr->acquired[type]; 13146bea61daSMintz, Yuval len = DIV_ROUND_UP(p_map->max_count, 13156bea61daSMintz, Yuval sizeof(unsigned long) * 13166bea61daSMintz, Yuval BITS_PER_BYTE) * 13176bea61daSMintz, Yuval sizeof(unsigned long); 13186bea61daSMintz, Yuval memset(p_map->cid_map, 0, len); 13196bea61daSMintz, Yuval } 13206bea61daSMintz, Yuval 13216bea61daSMintz, Yuval if (!p_cfg->cids_per_vf) 1322fe56b9e6SYuval Mintz continue; 1323fe56b9e6SYuval Mintz 13246bea61daSMintz, Yuval for (vf = 0; vf < MAX_NUM_VFS; vf++) { 13256bea61daSMintz, Yuval p_map = &p_mngr->acquired_vf[type][vf]; 13266bea61daSMintz, Yuval len = DIV_ROUND_UP(p_map->max_count, 13276bea61daSMintz, Yuval sizeof(unsigned long) * 13286bea61daSMintz, Yuval BITS_PER_BYTE) * 13296bea61daSMintz, Yuval sizeof(unsigned long); 13306bea61daSMintz, Yuval memset(p_map->cid_map, 0, len); 13316bea61daSMintz, Yuval } 1332fe56b9e6SYuval Mintz } 1333fe56b9e6SYuval Mintz } 1334fe56b9e6SYuval Mintz 1335fe56b9e6SYuval Mintz /* CDU Common */ 1336fe56b9e6SYuval Mintz #define CDUC_CXT_SIZE_SHIFT \ 1337fe56b9e6SYuval Mintz CDU_REG_CID_ADDR_PARAMS_CONTEXT_SIZE_SHIFT 1338fe56b9e6SYuval Mintz 1339fe56b9e6SYuval Mintz #define CDUC_CXT_SIZE_MASK \ 1340fe56b9e6SYuval Mintz (CDU_REG_CID_ADDR_PARAMS_CONTEXT_SIZE >> CDUC_CXT_SIZE_SHIFT) 1341fe56b9e6SYuval Mintz 1342fe56b9e6SYuval Mintz #define CDUC_BLOCK_WASTE_SHIFT \ 1343fe56b9e6SYuval Mintz CDU_REG_CID_ADDR_PARAMS_BLOCK_WASTE_SHIFT 1344fe56b9e6SYuval Mintz 1345fe56b9e6SYuval Mintz #define CDUC_BLOCK_WASTE_MASK \ 1346fe56b9e6SYuval Mintz (CDU_REG_CID_ADDR_PARAMS_BLOCK_WASTE >> CDUC_BLOCK_WASTE_SHIFT) 1347fe56b9e6SYuval Mintz 1348fe56b9e6SYuval Mintz #define CDUC_NCIB_SHIFT \ 1349fe56b9e6SYuval Mintz CDU_REG_CID_ADDR_PARAMS_NCIB_SHIFT 1350fe56b9e6SYuval Mintz 1351fe56b9e6SYuval Mintz #define CDUC_NCIB_MASK \ 1352fe56b9e6SYuval Mintz (CDU_REG_CID_ADDR_PARAMS_NCIB >> CDUC_NCIB_SHIFT) 1353fe56b9e6SYuval Mintz 1354dbb799c3SYuval Mintz #define CDUT_TYPE0_CXT_SIZE_SHIFT \ 1355dbb799c3SYuval Mintz CDU_REG_SEGMENT0_PARAMS_T0_TID_SIZE_SHIFT 1356dbb799c3SYuval Mintz 1357dbb799c3SYuval Mintz #define CDUT_TYPE0_CXT_SIZE_MASK \ 1358dbb799c3SYuval Mintz (CDU_REG_SEGMENT0_PARAMS_T0_TID_SIZE >> \ 1359dbb799c3SYuval Mintz CDUT_TYPE0_CXT_SIZE_SHIFT) 1360dbb799c3SYuval Mintz 1361dbb799c3SYuval Mintz #define CDUT_TYPE0_BLOCK_WASTE_SHIFT \ 1362dbb799c3SYuval Mintz CDU_REG_SEGMENT0_PARAMS_T0_TID_BLOCK_WASTE_SHIFT 1363dbb799c3SYuval Mintz 1364dbb799c3SYuval Mintz #define CDUT_TYPE0_BLOCK_WASTE_MASK \ 1365dbb799c3SYuval Mintz (CDU_REG_SEGMENT0_PARAMS_T0_TID_BLOCK_WASTE >> \ 1366dbb799c3SYuval Mintz CDUT_TYPE0_BLOCK_WASTE_SHIFT) 1367dbb799c3SYuval Mintz 1368dbb799c3SYuval Mintz #define CDUT_TYPE0_NCIB_SHIFT \ 1369dbb799c3SYuval Mintz CDU_REG_SEGMENT0_PARAMS_T0_NUM_TIDS_IN_BLOCK_SHIFT 1370dbb799c3SYuval Mintz 1371dbb799c3SYuval Mintz #define CDUT_TYPE0_NCIB_MASK \ 1372dbb799c3SYuval Mintz (CDU_REG_SEGMENT0_PARAMS_T0_NUM_TIDS_IN_BLOCK >> \ 1373dbb799c3SYuval Mintz CDUT_TYPE0_NCIB_SHIFT) 1374dbb799c3SYuval Mintz 1375dbb799c3SYuval Mintz #define CDUT_TYPE1_CXT_SIZE_SHIFT \ 1376dbb799c3SYuval Mintz CDU_REG_SEGMENT1_PARAMS_T1_TID_SIZE_SHIFT 1377dbb799c3SYuval Mintz 1378dbb799c3SYuval Mintz #define CDUT_TYPE1_CXT_SIZE_MASK \ 1379dbb799c3SYuval Mintz (CDU_REG_SEGMENT1_PARAMS_T1_TID_SIZE >> \ 1380dbb799c3SYuval Mintz CDUT_TYPE1_CXT_SIZE_SHIFT) 1381dbb799c3SYuval Mintz 1382dbb799c3SYuval Mintz #define CDUT_TYPE1_BLOCK_WASTE_SHIFT \ 1383dbb799c3SYuval Mintz CDU_REG_SEGMENT1_PARAMS_T1_TID_BLOCK_WASTE_SHIFT 1384dbb799c3SYuval Mintz 1385dbb799c3SYuval Mintz #define CDUT_TYPE1_BLOCK_WASTE_MASK \ 1386dbb799c3SYuval Mintz (CDU_REG_SEGMENT1_PARAMS_T1_TID_BLOCK_WASTE >> \ 1387dbb799c3SYuval Mintz CDUT_TYPE1_BLOCK_WASTE_SHIFT) 1388dbb799c3SYuval Mintz 1389dbb799c3SYuval Mintz #define CDUT_TYPE1_NCIB_SHIFT \ 1390dbb799c3SYuval Mintz CDU_REG_SEGMENT1_PARAMS_T1_NUM_TIDS_IN_BLOCK_SHIFT 1391dbb799c3SYuval Mintz 1392dbb799c3SYuval Mintz #define CDUT_TYPE1_NCIB_MASK \ 1393dbb799c3SYuval Mintz (CDU_REG_SEGMENT1_PARAMS_T1_NUM_TIDS_IN_BLOCK >> \ 1394dbb799c3SYuval Mintz CDUT_TYPE1_NCIB_SHIFT) 1395dbb799c3SYuval Mintz 1396fe56b9e6SYuval Mintz static void qed_cdu_init_common(struct qed_hwfn *p_hwfn) 1397fe56b9e6SYuval Mintz { 1398fe56b9e6SYuval Mintz u32 page_sz, elems_per_page, block_waste, cxt_size, cdu_params = 0; 1399fe56b9e6SYuval Mintz 1400fe56b9e6SYuval Mintz /* CDUC - connection configuration */ 1401fe56b9e6SYuval Mintz page_sz = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC].p_size.val; 1402fe56b9e6SYuval Mintz cxt_size = CONN_CXT_SIZE(p_hwfn); 1403fe56b9e6SYuval Mintz elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size; 1404fe56b9e6SYuval Mintz block_waste = ILT_PAGE_IN_BYTES(page_sz) - elems_per_page * cxt_size; 1405fe56b9e6SYuval Mintz 1406fe56b9e6SYuval Mintz SET_FIELD(cdu_params, CDUC_CXT_SIZE, cxt_size); 1407fe56b9e6SYuval Mintz SET_FIELD(cdu_params, CDUC_BLOCK_WASTE, block_waste); 1408fe56b9e6SYuval Mintz SET_FIELD(cdu_params, CDUC_NCIB, elems_per_page); 1409fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, CDU_REG_CID_ADDR_PARAMS_RT_OFFSET, cdu_params); 1410dbb799c3SYuval Mintz 1411dbb799c3SYuval Mintz /* CDUT - type-0 tasks configuration */ 1412dbb799c3SYuval Mintz page_sz = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT].p_size.val; 1413dbb799c3SYuval Mintz cxt_size = p_hwfn->p_cxt_mngr->task_type_size[0]; 1414dbb799c3SYuval Mintz elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size; 1415dbb799c3SYuval Mintz block_waste = ILT_PAGE_IN_BYTES(page_sz) - elems_per_page * cxt_size; 1416dbb799c3SYuval Mintz 1417dbb799c3SYuval Mintz /* cxt size and block-waste are multipes of 8 */ 1418dbb799c3SYuval Mintz cdu_params = 0; 1419dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE0_CXT_SIZE, (cxt_size >> 3)); 1420dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE0_BLOCK_WASTE, (block_waste >> 3)); 1421dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE0_NCIB, elems_per_page); 1422dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, CDU_REG_SEGMENT0_PARAMS_RT_OFFSET, cdu_params); 1423dbb799c3SYuval Mintz 1424dbb799c3SYuval Mintz /* CDUT - type-1 tasks configuration */ 1425dbb799c3SYuval Mintz cxt_size = p_hwfn->p_cxt_mngr->task_type_size[1]; 1426dbb799c3SYuval Mintz elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size; 1427dbb799c3SYuval Mintz block_waste = ILT_PAGE_IN_BYTES(page_sz) - elems_per_page * cxt_size; 1428dbb799c3SYuval Mintz 1429dbb799c3SYuval Mintz /* cxt size and block-waste are multipes of 8 */ 1430dbb799c3SYuval Mintz cdu_params = 0; 1431dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE1_CXT_SIZE, (cxt_size >> 3)); 1432dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE1_BLOCK_WASTE, (block_waste >> 3)); 1433dbb799c3SYuval Mintz SET_FIELD(cdu_params, CDUT_TYPE1_NCIB, elems_per_page); 1434dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, CDU_REG_SEGMENT1_PARAMS_RT_OFFSET, cdu_params); 1435dbb799c3SYuval Mintz } 1436dbb799c3SYuval Mintz 1437dbb799c3SYuval Mintz /* CDU PF */ 1438dbb799c3SYuval Mintz #define CDU_SEG_REG_TYPE_SHIFT CDU_SEG_TYPE_OFFSET_REG_TYPE_SHIFT 1439dbb799c3SYuval Mintz #define CDU_SEG_REG_TYPE_MASK 0x1 1440dbb799c3SYuval Mintz #define CDU_SEG_REG_OFFSET_SHIFT 0 1441dbb799c3SYuval Mintz #define CDU_SEG_REG_OFFSET_MASK CDU_SEG_TYPE_OFFSET_REG_OFFSET_MASK 1442dbb799c3SYuval Mintz 1443dbb799c3SYuval Mintz static void qed_cdu_init_pf(struct qed_hwfn *p_hwfn) 1444dbb799c3SYuval Mintz { 1445dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 1446dbb799c3SYuval Mintz struct qed_tid_seg *p_seg; 1447dbb799c3SYuval Mintz u32 cdu_seg_params, offset; 1448dbb799c3SYuval Mintz int i; 1449dbb799c3SYuval Mintz 1450dbb799c3SYuval Mintz static const u32 rt_type_offset_arr[] = { 1451dbb799c3SYuval Mintz CDU_REG_PF_SEG0_TYPE_OFFSET_RT_OFFSET, 1452dbb799c3SYuval Mintz CDU_REG_PF_SEG1_TYPE_OFFSET_RT_OFFSET, 1453dbb799c3SYuval Mintz CDU_REG_PF_SEG2_TYPE_OFFSET_RT_OFFSET, 1454dbb799c3SYuval Mintz CDU_REG_PF_SEG3_TYPE_OFFSET_RT_OFFSET 1455dbb799c3SYuval Mintz }; 1456dbb799c3SYuval Mintz 1457dbb799c3SYuval Mintz static const u32 rt_type_offset_fl_arr[] = { 1458dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG0_TYPE_OFFSET_RT_OFFSET, 1459dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG1_TYPE_OFFSET_RT_OFFSET, 1460dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG2_TYPE_OFFSET_RT_OFFSET, 1461dbb799c3SYuval Mintz CDU_REG_PF_FL_SEG3_TYPE_OFFSET_RT_OFFSET 1462dbb799c3SYuval Mintz }; 1463dbb799c3SYuval Mintz 1464dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT]; 1465dbb799c3SYuval Mintz 1466dbb799c3SYuval Mintz /* There are initializations only for CDUT during pf Phase */ 1467dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) { 1468dbb799c3SYuval Mintz /* Segment 0 */ 1469dbb799c3SYuval Mintz p_seg = qed_cxt_tid_seg_info(p_hwfn, i); 1470dbb799c3SYuval Mintz if (!p_seg) 1471dbb799c3SYuval Mintz continue; 1472dbb799c3SYuval Mintz 1473dbb799c3SYuval Mintz /* Note: start_line is already adjusted for the CDU 1474dbb799c3SYuval Mintz * segment register granularity, so we just need to 1475dbb799c3SYuval Mintz * divide. Adjustment is implicit as we assume ILT 1476dbb799c3SYuval Mintz * Page size is larger than 32K! 1477dbb799c3SYuval Mintz */ 1478dbb799c3SYuval Mintz offset = (ILT_PAGE_IN_BYTES(p_cli->p_size.val) * 1479dbb799c3SYuval Mintz (p_cli->pf_blks[CDUT_SEG_BLK(i)].start_line - 1480dbb799c3SYuval Mintz p_cli->first.val)) / CDUT_SEG_ALIGNMET_IN_BYTES; 1481dbb799c3SYuval Mintz 1482dbb799c3SYuval Mintz cdu_seg_params = 0; 1483dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_TYPE, p_seg->type); 1484dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_OFFSET, offset); 1485dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, rt_type_offset_arr[i], cdu_seg_params); 1486dbb799c3SYuval Mintz 1487dbb799c3SYuval Mintz offset = (ILT_PAGE_IN_BYTES(p_cli->p_size.val) * 1488dbb799c3SYuval Mintz (p_cli->pf_blks[CDUT_FL_SEG_BLK(i, PF)].start_line - 1489dbb799c3SYuval Mintz p_cli->first.val)) / CDUT_SEG_ALIGNMET_IN_BYTES; 1490dbb799c3SYuval Mintz 1491dbb799c3SYuval Mintz cdu_seg_params = 0; 1492dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_TYPE, p_seg->type); 1493dbb799c3SYuval Mintz SET_FIELD(cdu_seg_params, CDU_SEG_REG_OFFSET, offset); 1494dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, rt_type_offset_fl_arr[i], cdu_seg_params); 1495dbb799c3SYuval Mintz } 1496fe56b9e6SYuval Mintz } 1497fe56b9e6SYuval Mintz 1498da090917STomer Tayar void qed_qm_init_pf(struct qed_hwfn *p_hwfn, 1499da090917STomer Tayar struct qed_ptt *p_ptt, bool is_pf_loading) 1500fe56b9e6SYuval Mintz { 1501fe56b9e6SYuval Mintz struct qed_qm_info *qm_info = &p_hwfn->qm_info; 1502da090917STomer Tayar struct qed_qm_pf_rt_init_params params; 1503da090917STomer Tayar struct qed_mcp_link_state *p_link; 1504fe56b9e6SYuval Mintz struct qed_qm_iids iids; 1505fe56b9e6SYuval Mintz 1506fe56b9e6SYuval Mintz memset(&iids, 0, sizeof(iids)); 1507fe56b9e6SYuval Mintz qed_cxt_qm_iids(p_hwfn, &iids); 1508fe56b9e6SYuval Mintz 1509da090917STomer Tayar p_link = &QED_LEADING_HWFN(p_hwfn->cdev)->mcp_info->link_output; 1510da090917STomer Tayar 1511fe56b9e6SYuval Mintz memset(¶ms, 0, sizeof(params)); 1512fe56b9e6SYuval Mintz params.port_id = p_hwfn->port_id; 1513fe56b9e6SYuval Mintz params.pf_id = p_hwfn->rel_pf_id; 1514fe56b9e6SYuval Mintz params.max_phys_tcs_per_port = qm_info->max_phys_tcs_per_port; 1515da090917STomer Tayar params.is_pf_loading = is_pf_loading; 1516fe56b9e6SYuval Mintz params.num_pf_cids = iids.cids; 15171408cc1fSYuval Mintz params.num_vf_cids = iids.vf_cids; 1518c9f0523bSMintz, Yuval params.num_tids = iids.tids; 1519fe56b9e6SYuval Mintz params.start_pq = qm_info->start_pq; 15201408cc1fSYuval Mintz params.num_pf_pqs = qm_info->num_pqs - qm_info->num_vf_pqs; 15211408cc1fSYuval Mintz params.num_vf_pqs = qm_info->num_vf_pqs; 1522fc48b7a6SYuval Mintz params.start_vport = qm_info->start_vport; 1523fc48b7a6SYuval Mintz params.num_vports = qm_info->num_vports; 1524fe56b9e6SYuval Mintz params.pf_wfq = qm_info->pf_wfq; 1525fe56b9e6SYuval Mintz params.pf_rl = qm_info->pf_rl; 1526da090917STomer Tayar params.link_speed = p_link->speed; 1527fe56b9e6SYuval Mintz params.pq_params = qm_info->qm_pq_params; 1528fe56b9e6SYuval Mintz params.vport_params = qm_info->qm_vport_params; 1529fe56b9e6SYuval Mintz 153015582962SRahul Verma qed_qm_pf_rt_init(p_hwfn, p_ptt, ¶ms); 1531fe56b9e6SYuval Mintz } 1532fe56b9e6SYuval Mintz 1533fe56b9e6SYuval Mintz /* CM PF */ 1534bf774d14SYueHaibing static void qed_cm_init_pf(struct qed_hwfn *p_hwfn) 1535fe56b9e6SYuval Mintz { 1536fe56b9e6SYuval Mintz /* XCM pure-LB queue */ 1537b5a9ee7cSAriel Elior STORE_RT_REG(p_hwfn, XCM_REG_CON_PHY_Q3_RT_OFFSET, 1538b5a9ee7cSAriel Elior qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB)); 1539fe56b9e6SYuval Mintz } 1540fe56b9e6SYuval Mintz 1541fe56b9e6SYuval Mintz /* DQ PF */ 1542fe56b9e6SYuval Mintz static void qed_dq_init_pf(struct qed_hwfn *p_hwfn) 1543fe56b9e6SYuval Mintz { 1544fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 15451408cc1fSYuval Mintz u32 dq_pf_max_cid = 0, dq_vf_max_cid = 0; 1546fe56b9e6SYuval Mintz 1547fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[0].cid_count >> DQ_RANGE_SHIFT); 1548fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_0_RT_OFFSET, dq_pf_max_cid); 1549fe56b9e6SYuval Mintz 15501408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[0].cids_per_vf >> DQ_RANGE_SHIFT); 15511408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_0_RT_OFFSET, dq_vf_max_cid); 15521408cc1fSYuval Mintz 1553fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[1].cid_count >> DQ_RANGE_SHIFT); 1554fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_1_RT_OFFSET, dq_pf_max_cid); 1555fe56b9e6SYuval Mintz 15561408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[1].cids_per_vf >> DQ_RANGE_SHIFT); 15571408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_1_RT_OFFSET, dq_vf_max_cid); 15581408cc1fSYuval Mintz 1559fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[2].cid_count >> DQ_RANGE_SHIFT); 1560fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_2_RT_OFFSET, dq_pf_max_cid); 1561fe56b9e6SYuval Mintz 15621408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[2].cids_per_vf >> DQ_RANGE_SHIFT); 15631408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_2_RT_OFFSET, dq_vf_max_cid); 15641408cc1fSYuval Mintz 1565fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[3].cid_count >> DQ_RANGE_SHIFT); 1566fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_3_RT_OFFSET, dq_pf_max_cid); 1567fe56b9e6SYuval Mintz 15681408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[3].cids_per_vf >> DQ_RANGE_SHIFT); 15691408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_3_RT_OFFSET, dq_vf_max_cid); 15701408cc1fSYuval Mintz 1571fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[4].cid_count >> DQ_RANGE_SHIFT); 1572fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_4_RT_OFFSET, dq_pf_max_cid); 1573fe56b9e6SYuval Mintz 15741408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[4].cids_per_vf >> DQ_RANGE_SHIFT); 15751408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_4_RT_OFFSET, dq_vf_max_cid); 15761408cc1fSYuval Mintz 1577fe56b9e6SYuval Mintz dq_pf_max_cid += (p_mngr->conn_cfg[5].cid_count >> DQ_RANGE_SHIFT); 1578fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_5_RT_OFFSET, dq_pf_max_cid); 15791408cc1fSYuval Mintz 15801408cc1fSYuval Mintz dq_vf_max_cid += (p_mngr->conn_cfg[5].cids_per_vf >> DQ_RANGE_SHIFT); 15811408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_5_RT_OFFSET, dq_vf_max_cid); 15821408cc1fSYuval Mintz 15831408cc1fSYuval Mintz /* Connection types 6 & 7 are not in use, yet they must be configured 15841408cc1fSYuval Mintz * as the highest possible connection. Not configuring them means the 15851408cc1fSYuval Mintz * defaults will be used, and with a large number of cids a bug may 15861408cc1fSYuval Mintz * occur, if the defaults will be smaller than dq_pf_max_cid / 15871408cc1fSYuval Mintz * dq_vf_max_cid. 15881408cc1fSYuval Mintz */ 15891408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_6_RT_OFFSET, dq_pf_max_cid); 15901408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_6_RT_OFFSET, dq_vf_max_cid); 15911408cc1fSYuval Mintz 15921408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_7_RT_OFFSET, dq_pf_max_cid); 15931408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_7_RT_OFFSET, dq_vf_max_cid); 1594fe56b9e6SYuval Mintz } 1595fe56b9e6SYuval Mintz 1596fe56b9e6SYuval Mintz static void qed_ilt_bounds_init(struct qed_hwfn *p_hwfn) 1597fe56b9e6SYuval Mintz { 1598fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *ilt_clients; 1599fe56b9e6SYuval Mintz int i; 1600fe56b9e6SYuval Mintz 1601fe56b9e6SYuval Mintz ilt_clients = p_hwfn->p_cxt_mngr->clients; 1602fe56b9e6SYuval Mintz for_each_ilt_valid_client(i, ilt_clients) { 1603fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, 1604fe56b9e6SYuval Mintz ilt_clients[i].first.reg, 1605fe56b9e6SYuval Mintz ilt_clients[i].first.val); 1606fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, 1607dbb799c3SYuval Mintz ilt_clients[i].last.reg, ilt_clients[i].last.val); 1608fe56b9e6SYuval Mintz STORE_RT_REG(p_hwfn, 1609fe56b9e6SYuval Mintz ilt_clients[i].p_size.reg, 1610fe56b9e6SYuval Mintz ilt_clients[i].p_size.val); 1611fe56b9e6SYuval Mintz } 1612fe56b9e6SYuval Mintz } 1613fe56b9e6SYuval Mintz 16141408cc1fSYuval Mintz static void qed_ilt_vf_bounds_init(struct qed_hwfn *p_hwfn) 16151408cc1fSYuval Mintz { 16161408cc1fSYuval Mintz struct qed_ilt_client_cfg *p_cli; 16171408cc1fSYuval Mintz u32 blk_factor; 16181408cc1fSYuval Mintz 16191408cc1fSYuval Mintz /* For simplicty we set the 'block' to be an ILT page */ 16201408cc1fSYuval Mintz if (p_hwfn->cdev->p_iov_info) { 16211408cc1fSYuval Mintz struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info; 16221408cc1fSYuval Mintz 16231408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, 16241408cc1fSYuval Mintz PSWRQ2_REG_VF_BASE_RT_OFFSET, 16251408cc1fSYuval Mintz p_iov->first_vf_in_pf); 16261408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, 16271408cc1fSYuval Mintz PSWRQ2_REG_VF_LAST_ILT_RT_OFFSET, 16281408cc1fSYuval Mintz p_iov->first_vf_in_pf + p_iov->total_vfs); 16291408cc1fSYuval Mintz } 16301408cc1fSYuval Mintz 16311408cc1fSYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC]; 16321408cc1fSYuval Mintz blk_factor = ilog2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10); 16331408cc1fSYuval Mintz if (p_cli->active) { 16341408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, 16351408cc1fSYuval Mintz PSWRQ2_REG_CDUC_BLOCKS_FACTOR_RT_OFFSET, 16361408cc1fSYuval Mintz blk_factor); 16371408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, 16381408cc1fSYuval Mintz PSWRQ2_REG_CDUC_NUMBER_OF_PF_BLOCKS_RT_OFFSET, 16391408cc1fSYuval Mintz p_cli->pf_total_lines); 16401408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, 16411408cc1fSYuval Mintz PSWRQ2_REG_CDUC_VF_BLOCKS_RT_OFFSET, 16421408cc1fSYuval Mintz p_cli->vf_total_lines); 16431408cc1fSYuval Mintz } 1644dbb799c3SYuval Mintz 1645dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT]; 1646dbb799c3SYuval Mintz blk_factor = ilog2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10); 1647dbb799c3SYuval Mintz if (p_cli->active) { 1648dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1649dbb799c3SYuval Mintz PSWRQ2_REG_CDUT_BLOCKS_FACTOR_RT_OFFSET, 1650dbb799c3SYuval Mintz blk_factor); 1651dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1652dbb799c3SYuval Mintz PSWRQ2_REG_CDUT_NUMBER_OF_PF_BLOCKS_RT_OFFSET, 1653dbb799c3SYuval Mintz p_cli->pf_total_lines); 1654dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1655dbb799c3SYuval Mintz PSWRQ2_REG_CDUT_VF_BLOCKS_RT_OFFSET, 1656dbb799c3SYuval Mintz p_cli->vf_total_lines); 1657dbb799c3SYuval Mintz } 1658dbb799c3SYuval Mintz 1659dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TM]; 1660dbb799c3SYuval Mintz blk_factor = ilog2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10); 1661dbb799c3SYuval Mintz if (p_cli->active) { 1662dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1663dbb799c3SYuval Mintz PSWRQ2_REG_TM_BLOCKS_FACTOR_RT_OFFSET, blk_factor); 1664dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1665dbb799c3SYuval Mintz PSWRQ2_REG_TM_NUMBER_OF_PF_BLOCKS_RT_OFFSET, 1666dbb799c3SYuval Mintz p_cli->pf_total_lines); 1667dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, 1668dbb799c3SYuval Mintz PSWRQ2_REG_TM_VF_BLOCKS_RT_OFFSET, 1669dbb799c3SYuval Mintz p_cli->vf_total_lines); 1670dbb799c3SYuval Mintz } 16711408cc1fSYuval Mintz } 16721408cc1fSYuval Mintz 1673fe56b9e6SYuval Mintz /* ILT (PSWRQ2) PF */ 1674fe56b9e6SYuval Mintz static void qed_ilt_init_pf(struct qed_hwfn *p_hwfn) 1675fe56b9e6SYuval Mintz { 1676fe56b9e6SYuval Mintz struct qed_ilt_client_cfg *clients; 1677fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr; 1678fe56b9e6SYuval Mintz struct qed_dma_mem *p_shdw; 1679fe56b9e6SYuval Mintz u32 line, rt_offst, i; 1680fe56b9e6SYuval Mintz 1681fe56b9e6SYuval Mintz qed_ilt_bounds_init(p_hwfn); 16821408cc1fSYuval Mintz qed_ilt_vf_bounds_init(p_hwfn); 1683fe56b9e6SYuval Mintz 1684fe56b9e6SYuval Mintz p_mngr = p_hwfn->p_cxt_mngr; 1685fe56b9e6SYuval Mintz p_shdw = p_mngr->ilt_shadow; 1686fe56b9e6SYuval Mintz clients = p_hwfn->p_cxt_mngr->clients; 1687fe56b9e6SYuval Mintz 1688fe56b9e6SYuval Mintz for_each_ilt_valid_client(i, clients) { 1689fe56b9e6SYuval Mintz /** Client's 1st val and RT array are absolute, ILT shadows' 1690fe56b9e6SYuval Mintz * lines are relative. 1691fe56b9e6SYuval Mintz */ 1692fe56b9e6SYuval Mintz line = clients[i].first.val - p_mngr->pf_start_line; 1693fe56b9e6SYuval Mintz rt_offst = PSWRQ2_REG_ILT_MEMORY_RT_OFFSET + 1694fe56b9e6SYuval Mintz clients[i].first.val * ILT_ENTRY_IN_REGS; 1695fe56b9e6SYuval Mintz 1696fe56b9e6SYuval Mintz for (; line <= clients[i].last.val - p_mngr->pf_start_line; 1697fe56b9e6SYuval Mintz line++, rt_offst += ILT_ENTRY_IN_REGS) { 1698fe56b9e6SYuval Mintz u64 ilt_hw_entry = 0; 1699fe56b9e6SYuval Mintz 1700fe56b9e6SYuval Mintz /** p_virt could be NULL incase of dynamic 1701fe56b9e6SYuval Mintz * allocation 1702fe56b9e6SYuval Mintz */ 1703fe56b9e6SYuval Mintz if (p_shdw[line].p_virt) { 1704fe56b9e6SYuval Mintz SET_FIELD(ilt_hw_entry, ILT_ENTRY_VALID, 1ULL); 1705fe56b9e6SYuval Mintz SET_FIELD(ilt_hw_entry, ILT_ENTRY_PHY_ADDR, 1706fe56b9e6SYuval Mintz (p_shdw[line].p_phys >> 12)); 1707fe56b9e6SYuval Mintz 1708fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_ILT, 1709fe56b9e6SYuval Mintz "Setting RT[0x%08x] from ILT[0x%08x] [Client is %d] to Physical addr: 0x%llx\n", 1710fe56b9e6SYuval Mintz rt_offst, line, i, 1711fe56b9e6SYuval Mintz (u64)(p_shdw[line].p_phys >> 12)); 1712fe56b9e6SYuval Mintz } 1713fe56b9e6SYuval Mintz 1714fe56b9e6SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_offst, ilt_hw_entry); 1715fe56b9e6SYuval Mintz } 1716fe56b9e6SYuval Mintz } 1717fe56b9e6SYuval Mintz } 1718fe56b9e6SYuval Mintz 1719dbb799c3SYuval Mintz /* SRC (Searcher) PF */ 1720dbb799c3SYuval Mintz static void qed_src_init_pf(struct qed_hwfn *p_hwfn) 1721dbb799c3SYuval Mintz { 1722dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1723dbb799c3SYuval Mintz u32 rounded_conn_num, conn_num, conn_max; 1724dbb799c3SYuval Mintz struct qed_src_iids src_iids; 1725dbb799c3SYuval Mintz 1726dbb799c3SYuval Mintz memset(&src_iids, 0, sizeof(src_iids)); 1727dbb799c3SYuval Mintz qed_cxt_src_iids(p_mngr, &src_iids); 1728dbb799c3SYuval Mintz conn_num = src_iids.pf_cids + src_iids.per_vf_cids * p_mngr->vf_count; 1729dbb799c3SYuval Mintz if (!conn_num) 1730dbb799c3SYuval Mintz return; 1731dbb799c3SYuval Mintz 1732dbb799c3SYuval Mintz conn_max = max_t(u32, conn_num, SRC_MIN_NUM_ELEMS); 1733dbb799c3SYuval Mintz rounded_conn_num = roundup_pow_of_two(conn_max); 1734dbb799c3SYuval Mintz 1735dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, SRC_REG_COUNTFREE_RT_OFFSET, conn_num); 1736dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, SRC_REG_NUMBER_HASH_BITS_RT_OFFSET, 1737dbb799c3SYuval Mintz ilog2(rounded_conn_num)); 1738dbb799c3SYuval Mintz 1739dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, SRC_REG_FIRSTFREE_RT_OFFSET, 1740dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->first_free); 1741dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, SRC_REG_LASTFREE_RT_OFFSET, 1742dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->last_free); 1743dbb799c3SYuval Mintz } 1744dbb799c3SYuval Mintz 1745dbb799c3SYuval Mintz /* Timers PF */ 1746dbb799c3SYuval Mintz #define TM_CFG_NUM_IDS_SHIFT 0 1747dbb799c3SYuval Mintz #define TM_CFG_NUM_IDS_MASK 0xFFFFULL 1748dbb799c3SYuval Mintz #define TM_CFG_PRE_SCAN_OFFSET_SHIFT 16 1749dbb799c3SYuval Mintz #define TM_CFG_PRE_SCAN_OFFSET_MASK 0x1FFULL 1750dbb799c3SYuval Mintz #define TM_CFG_PARENT_PF_SHIFT 25 1751dbb799c3SYuval Mintz #define TM_CFG_PARENT_PF_MASK 0x7ULL 1752dbb799c3SYuval Mintz 1753dbb799c3SYuval Mintz #define TM_CFG_CID_PRE_SCAN_ROWS_SHIFT 30 1754dbb799c3SYuval Mintz #define TM_CFG_CID_PRE_SCAN_ROWS_MASK 0x1FFULL 1755dbb799c3SYuval Mintz 1756dbb799c3SYuval Mintz #define TM_CFG_TID_OFFSET_SHIFT 30 1757dbb799c3SYuval Mintz #define TM_CFG_TID_OFFSET_MASK 0x7FFFFULL 1758dbb799c3SYuval Mintz #define TM_CFG_TID_PRE_SCAN_ROWS_SHIFT 49 1759dbb799c3SYuval Mintz #define TM_CFG_TID_PRE_SCAN_ROWS_MASK 0x1FFULL 1760dbb799c3SYuval Mintz 1761dbb799c3SYuval Mintz static void qed_tm_init_pf(struct qed_hwfn *p_hwfn) 1762dbb799c3SYuval Mintz { 1763dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1764dbb799c3SYuval Mintz u32 active_seg_mask = 0, tm_offset, rt_reg; 1765dbb799c3SYuval Mintz struct qed_tm_iids tm_iids; 1766dbb799c3SYuval Mintz u64 cfg_word; 1767dbb799c3SYuval Mintz u8 i; 1768dbb799c3SYuval Mintz 1769dbb799c3SYuval Mintz memset(&tm_iids, 0, sizeof(tm_iids)); 177044531ba4SMichal Kalderon qed_cxt_tm_iids(p_hwfn, p_mngr, &tm_iids); 1771dbb799c3SYuval Mintz 1772dbb799c3SYuval Mintz /* @@@TBD No pre-scan for now */ 1773dbb799c3SYuval Mintz 1774dbb799c3SYuval Mintz /* Note: We assume consecutive VFs for a PF */ 1775dbb799c3SYuval Mintz for (i = 0; i < p_mngr->vf_count; i++) { 1776dbb799c3SYuval Mintz cfg_word = 0; 1777dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.per_vf_cids); 1778dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); 1779dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, p_hwfn->rel_pf_id); 1780dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_CID_PRE_SCAN_ROWS, 0); 1781dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_CONN_MEM_RT_OFFSET + 1782dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) * 1783dbb799c3SYuval Mintz (p_hwfn->cdev->p_iov_info->first_vf_in_pf + i); 1784dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word); 1785dbb799c3SYuval Mintz } 1786dbb799c3SYuval Mintz 1787dbb799c3SYuval Mintz cfg_word = 0; 1788dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.pf_cids); 1789dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); 1790dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, 0); /* n/a for PF */ 1791dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_CID_PRE_SCAN_ROWS, 0); /* scan all */ 1792dbb799c3SYuval Mintz 1793dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_CONN_MEM_RT_OFFSET + 1794dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) * 1795dbb799c3SYuval Mintz (NUM_OF_VFS(p_hwfn->cdev) + p_hwfn->rel_pf_id); 1796dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word); 1797dbb799c3SYuval Mintz 1798dbb799c3SYuval Mintz /* enale scan */ 1799dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, TM_REG_PF_ENABLE_CONN_RT_OFFSET, 1800dbb799c3SYuval Mintz tm_iids.pf_cids ? 0x1 : 0x0); 1801dbb799c3SYuval Mintz 1802dbb799c3SYuval Mintz /* @@@TBD how to enable the scan for the VFs */ 1803dbb799c3SYuval Mintz 1804dbb799c3SYuval Mintz tm_offset = tm_iids.per_vf_cids; 1805dbb799c3SYuval Mintz 1806dbb799c3SYuval Mintz /* Note: We assume consecutive VFs for a PF */ 1807dbb799c3SYuval Mintz for (i = 0; i < p_mngr->vf_count; i++) { 1808dbb799c3SYuval Mintz cfg_word = 0; 1809dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.per_vf_tids); 1810dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); 1811dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, p_hwfn->rel_pf_id); 1812dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_OFFSET, tm_offset); 1813dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_PRE_SCAN_ROWS, (u64) 0); 1814dbb799c3SYuval Mintz 1815dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_TASK_MEM_RT_OFFSET + 1816dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) * 1817dbb799c3SYuval Mintz (p_hwfn->cdev->p_iov_info->first_vf_in_pf + i); 1818dbb799c3SYuval Mintz 1819dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word); 1820dbb799c3SYuval Mintz } 1821dbb799c3SYuval Mintz 1822dbb799c3SYuval Mintz tm_offset = tm_iids.pf_cids; 1823dbb799c3SYuval Mintz for (i = 0; i < NUM_TASK_PF_SEGMENTS; i++) { 1824dbb799c3SYuval Mintz cfg_word = 0; 1825dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.pf_tids[i]); 1826dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); 1827dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_PARENT_PF, 0); 1828dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_OFFSET, tm_offset); 1829dbb799c3SYuval Mintz SET_FIELD(cfg_word, TM_CFG_TID_PRE_SCAN_ROWS, (u64) 0); 1830dbb799c3SYuval Mintz 1831dbb799c3SYuval Mintz rt_reg = TM_REG_CONFIG_TASK_MEM_RT_OFFSET + 1832dbb799c3SYuval Mintz (sizeof(cfg_word) / sizeof(u32)) * 1833dbb799c3SYuval Mintz (NUM_OF_VFS(p_hwfn->cdev) + 1834dbb799c3SYuval Mintz p_hwfn->rel_pf_id * NUM_TASK_PF_SEGMENTS + i); 1835dbb799c3SYuval Mintz 1836dbb799c3SYuval Mintz STORE_RT_REG_AGG(p_hwfn, rt_reg, cfg_word); 18371a635e48SYuval Mintz active_seg_mask |= (tm_iids.pf_tids[i] ? BIT(i) : 0); 1838dbb799c3SYuval Mintz 1839dbb799c3SYuval Mintz tm_offset += tm_iids.pf_tids[i]; 1840dbb799c3SYuval Mintz } 1841dbb799c3SYuval Mintz 1842c851a9dcSKalderon, Michal if (QED_IS_RDMA_PERSONALITY(p_hwfn)) 1843dbb799c3SYuval Mintz active_seg_mask = 0; 1844dbb799c3SYuval Mintz 1845dbb799c3SYuval Mintz STORE_RT_REG(p_hwfn, TM_REG_PF_ENABLE_TASK_RT_OFFSET, active_seg_mask); 1846dbb799c3SYuval Mintz 1847dbb799c3SYuval Mintz /* @@@TBD how to enable the scan for the VFs */ 1848dbb799c3SYuval Mintz } 1849dbb799c3SYuval Mintz 18501e128c81SArun Easi static void qed_prs_init_common(struct qed_hwfn *p_hwfn) 18511e128c81SArun Easi { 18521e128c81SArun Easi if ((p_hwfn->hw_info.personality == QED_PCI_FCOE) && 18531e128c81SArun Easi p_hwfn->pf_params.fcoe_pf_params.is_target) 18541e128c81SArun Easi STORE_RT_REG(p_hwfn, 18551e128c81SArun Easi PRS_REG_SEARCH_RESP_INITIATOR_TYPE_RT_OFFSET, 0); 18561e128c81SArun Easi } 18571e128c81SArun Easi 18581e128c81SArun Easi static void qed_prs_init_pf(struct qed_hwfn *p_hwfn) 18591e128c81SArun Easi { 18601e128c81SArun Easi struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 18611e128c81SArun Easi struct qed_conn_type_cfg *p_fcoe; 18621e128c81SArun Easi struct qed_tid_seg *p_tid; 18631e128c81SArun Easi 18641e128c81SArun Easi p_fcoe = &p_mngr->conn_cfg[PROTOCOLID_FCOE]; 18651e128c81SArun Easi 18661e128c81SArun Easi /* If FCoE is active set the MAX OX_ID (tid) in the Parser */ 18671e128c81SArun Easi if (!p_fcoe->cid_count) 18681e128c81SArun Easi return; 18691e128c81SArun Easi 18701e128c81SArun Easi p_tid = &p_fcoe->tid_seg[QED_CXT_FCOE_TID_SEG]; 18711e128c81SArun Easi if (p_hwfn->pf_params.fcoe_pf_params.is_target) { 18721e128c81SArun Easi STORE_RT_REG_AGG(p_hwfn, 18731e128c81SArun Easi PRS_REG_TASK_ID_MAX_TARGET_PF_RT_OFFSET, 18741e128c81SArun Easi p_tid->count); 18751e128c81SArun Easi } else { 18761e128c81SArun Easi STORE_RT_REG_AGG(p_hwfn, 18771e128c81SArun Easi PRS_REG_TASK_ID_MAX_INITIATOR_PF_RT_OFFSET, 18781e128c81SArun Easi p_tid->count); 18791e128c81SArun Easi } 18801e128c81SArun Easi } 18811e128c81SArun Easi 1882fe56b9e6SYuval Mintz void qed_cxt_hw_init_common(struct qed_hwfn *p_hwfn) 1883fe56b9e6SYuval Mintz { 1884fe56b9e6SYuval Mintz qed_cdu_init_common(p_hwfn); 18851e128c81SArun Easi qed_prs_init_common(p_hwfn); 1886fe56b9e6SYuval Mintz } 1887fe56b9e6SYuval Mintz 188815582962SRahul Verma void qed_cxt_hw_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 1889fe56b9e6SYuval Mintz { 1890da090917STomer Tayar qed_qm_init_pf(p_hwfn, p_ptt, true); 1891fe56b9e6SYuval Mintz qed_cm_init_pf(p_hwfn); 1892fe56b9e6SYuval Mintz qed_dq_init_pf(p_hwfn); 1893dbb799c3SYuval Mintz qed_cdu_init_pf(p_hwfn); 1894fe56b9e6SYuval Mintz qed_ilt_init_pf(p_hwfn); 1895dbb799c3SYuval Mintz qed_src_init_pf(p_hwfn); 1896dbb799c3SYuval Mintz qed_tm_init_pf(p_hwfn); 18971e128c81SArun Easi qed_prs_init_pf(p_hwfn); 1898fe56b9e6SYuval Mintz } 1899fe56b9e6SYuval Mintz 19006bea61daSMintz, Yuval int _qed_cxt_acquire_cid(struct qed_hwfn *p_hwfn, 19016bea61daSMintz, Yuval enum protocol_type type, u32 *p_cid, u8 vfid) 1902fe56b9e6SYuval Mintz { 1903fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 19046bea61daSMintz, Yuval struct qed_cid_acquired_map *p_map; 1905fe56b9e6SYuval Mintz u32 rel_cid; 1906fe56b9e6SYuval Mintz 19076bea61daSMintz, Yuval if (type >= MAX_CONN_TYPES) { 1908fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Invalid protocol type %d", type); 1909fe56b9e6SYuval Mintz return -EINVAL; 1910fe56b9e6SYuval Mintz } 1911fe56b9e6SYuval Mintz 19126bea61daSMintz, Yuval if (vfid >= MAX_NUM_VFS && vfid != QED_CXT_PF_CID) { 19136bea61daSMintz, Yuval DP_NOTICE(p_hwfn, "VF [%02x] is out of range\n", vfid); 19146bea61daSMintz, Yuval return -EINVAL; 19156bea61daSMintz, Yuval } 1916fe56b9e6SYuval Mintz 19176bea61daSMintz, Yuval /* Determine the right map to take this CID from */ 19186bea61daSMintz, Yuval if (vfid == QED_CXT_PF_CID) 19196bea61daSMintz, Yuval p_map = &p_mngr->acquired[type]; 19206bea61daSMintz, Yuval else 19216bea61daSMintz, Yuval p_map = &p_mngr->acquired_vf[type][vfid]; 19226bea61daSMintz, Yuval 19236bea61daSMintz, Yuval if (!p_map->cid_map) { 19246bea61daSMintz, Yuval DP_NOTICE(p_hwfn, "Invalid protocol type %d", type); 19256bea61daSMintz, Yuval return -EINVAL; 19266bea61daSMintz, Yuval } 19276bea61daSMintz, Yuval 19286bea61daSMintz, Yuval rel_cid = find_first_zero_bit(p_map->cid_map, p_map->max_count); 19296bea61daSMintz, Yuval 19306bea61daSMintz, Yuval if (rel_cid >= p_map->max_count) { 19311a635e48SYuval Mintz DP_NOTICE(p_hwfn, "no CID available for protocol %d\n", type); 1932fe56b9e6SYuval Mintz return -EINVAL; 1933fe56b9e6SYuval Mintz } 1934fe56b9e6SYuval Mintz 19356bea61daSMintz, Yuval __set_bit(rel_cid, p_map->cid_map); 1936fe56b9e6SYuval Mintz 19376bea61daSMintz, Yuval *p_cid = rel_cid + p_map->start_cid; 19386bea61daSMintz, Yuval 19396bea61daSMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_CXT, 19406bea61daSMintz, Yuval "Acquired cid 0x%08x [rel. %08x] vfid %02x type %d\n", 19416bea61daSMintz, Yuval *p_cid, rel_cid, vfid, type); 1942fe56b9e6SYuval Mintz 1943fe56b9e6SYuval Mintz return 0; 1944fe56b9e6SYuval Mintz } 1945fe56b9e6SYuval Mintz 19466bea61daSMintz, Yuval int qed_cxt_acquire_cid(struct qed_hwfn *p_hwfn, 19476bea61daSMintz, Yuval enum protocol_type type, u32 *p_cid) 19486bea61daSMintz, Yuval { 19496bea61daSMintz, Yuval return _qed_cxt_acquire_cid(p_hwfn, type, p_cid, QED_CXT_PF_CID); 19506bea61daSMintz, Yuval } 19516bea61daSMintz, Yuval 1952fe56b9e6SYuval Mintz static bool qed_cxt_test_cid_acquired(struct qed_hwfn *p_hwfn, 19536bea61daSMintz, Yuval u32 cid, 19546bea61daSMintz, Yuval u8 vfid, 19556bea61daSMintz, Yuval enum protocol_type *p_type, 19566bea61daSMintz, Yuval struct qed_cid_acquired_map **pp_map) 1957fe56b9e6SYuval Mintz { 1958fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 1959fe56b9e6SYuval Mintz u32 rel_cid; 1960fe56b9e6SYuval Mintz 1961fe56b9e6SYuval Mintz /* Iterate over protocols and find matching cid range */ 19626bea61daSMintz, Yuval for (*p_type = 0; *p_type < MAX_CONN_TYPES; (*p_type)++) { 19636bea61daSMintz, Yuval if (vfid == QED_CXT_PF_CID) 19646bea61daSMintz, Yuval *pp_map = &p_mngr->acquired[*p_type]; 19656bea61daSMintz, Yuval else 19666bea61daSMintz, Yuval *pp_map = &p_mngr->acquired_vf[*p_type][vfid]; 1967fe56b9e6SYuval Mintz 19686bea61daSMintz, Yuval if (!((*pp_map)->cid_map)) 1969fe56b9e6SYuval Mintz continue; 19706bea61daSMintz, Yuval if (cid >= (*pp_map)->start_cid && 19716bea61daSMintz, Yuval cid < (*pp_map)->start_cid + (*pp_map)->max_count) 1972fe56b9e6SYuval Mintz break; 1973fe56b9e6SYuval Mintz } 1974fe56b9e6SYuval Mintz 19756bea61daSMintz, Yuval if (*p_type == MAX_CONN_TYPES) { 19766bea61daSMintz, Yuval DP_NOTICE(p_hwfn, "Invalid CID %d vfid %02x", cid, vfid); 19776bea61daSMintz, Yuval goto fail; 1978fe56b9e6SYuval Mintz } 1979fe56b9e6SYuval Mintz 19806bea61daSMintz, Yuval rel_cid = cid - (*pp_map)->start_cid; 19816bea61daSMintz, Yuval if (!test_bit(rel_cid, (*pp_map)->cid_map)) { 19826bea61daSMintz, Yuval DP_NOTICE(p_hwfn, "CID %d [vifd %02x] not acquired", 19836bea61daSMintz, Yuval cid, vfid); 19846bea61daSMintz, Yuval goto fail; 1985fe56b9e6SYuval Mintz } 19866bea61daSMintz, Yuval 1987fe56b9e6SYuval Mintz return true; 19886bea61daSMintz, Yuval fail: 19896bea61daSMintz, Yuval *p_type = MAX_CONN_TYPES; 19906bea61daSMintz, Yuval *pp_map = NULL; 19916bea61daSMintz, Yuval return false; 1992fe56b9e6SYuval Mintz } 1993fe56b9e6SYuval Mintz 19946bea61daSMintz, Yuval void _qed_cxt_release_cid(struct qed_hwfn *p_hwfn, u32 cid, u8 vfid) 1995fe56b9e6SYuval Mintz { 19966bea61daSMintz, Yuval struct qed_cid_acquired_map *p_map = NULL; 1997fe56b9e6SYuval Mintz enum protocol_type type; 1998fe56b9e6SYuval Mintz bool b_acquired; 1999fe56b9e6SYuval Mintz u32 rel_cid; 2000fe56b9e6SYuval Mintz 20016bea61daSMintz, Yuval if (vfid != QED_CXT_PF_CID && vfid > MAX_NUM_VFS) { 20026bea61daSMintz, Yuval DP_NOTICE(p_hwfn, 20036bea61daSMintz, Yuval "Trying to return incorrect CID belonging to VF %02x\n", 20046bea61daSMintz, Yuval vfid); 20056bea61daSMintz, Yuval return; 20066bea61daSMintz, Yuval } 20076bea61daSMintz, Yuval 2008fe56b9e6SYuval Mintz /* Test acquired and find matching per-protocol map */ 20096bea61daSMintz, Yuval b_acquired = qed_cxt_test_cid_acquired(p_hwfn, cid, vfid, 20106bea61daSMintz, Yuval &type, &p_map); 2011fe56b9e6SYuval Mintz 2012fe56b9e6SYuval Mintz if (!b_acquired) 2013fe56b9e6SYuval Mintz return; 2014fe56b9e6SYuval Mintz 20156bea61daSMintz, Yuval rel_cid = cid - p_map->start_cid; 20166bea61daSMintz, Yuval clear_bit(rel_cid, p_map->cid_map); 20176bea61daSMintz, Yuval 20186bea61daSMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_CXT, 20196bea61daSMintz, Yuval "Released CID 0x%08x [rel. %08x] vfid %02x type %d\n", 20206bea61daSMintz, Yuval cid, rel_cid, vfid, type); 20216bea61daSMintz, Yuval } 20226bea61daSMintz, Yuval 20236bea61daSMintz, Yuval void qed_cxt_release_cid(struct qed_hwfn *p_hwfn, u32 cid) 20246bea61daSMintz, Yuval { 20256bea61daSMintz, Yuval _qed_cxt_release_cid(p_hwfn, cid, QED_CXT_PF_CID); 2026fe56b9e6SYuval Mintz } 2027fe56b9e6SYuval Mintz 20281a635e48SYuval Mintz int qed_cxt_get_cid_info(struct qed_hwfn *p_hwfn, struct qed_cxt_info *p_info) 2029fe56b9e6SYuval Mintz { 2030fe56b9e6SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 20316bea61daSMintz, Yuval struct qed_cid_acquired_map *p_map = NULL; 2032fe56b9e6SYuval Mintz u32 conn_cxt_size, hw_p_size, cxts_per_p, line; 2033fe56b9e6SYuval Mintz enum protocol_type type; 2034fe56b9e6SYuval Mintz bool b_acquired; 2035fe56b9e6SYuval Mintz 2036fe56b9e6SYuval Mintz /* Test acquired and find matching per-protocol map */ 20376bea61daSMintz, Yuval b_acquired = qed_cxt_test_cid_acquired(p_hwfn, p_info->iid, 20386bea61daSMintz, Yuval QED_CXT_PF_CID, &type, &p_map); 2039fe56b9e6SYuval Mintz 2040fe56b9e6SYuval Mintz if (!b_acquired) 2041fe56b9e6SYuval Mintz return -EINVAL; 2042fe56b9e6SYuval Mintz 2043fe56b9e6SYuval Mintz /* set the protocl type */ 2044fe56b9e6SYuval Mintz p_info->type = type; 2045fe56b9e6SYuval Mintz 2046fe56b9e6SYuval Mintz /* compute context virtual pointer */ 2047fe56b9e6SYuval Mintz hw_p_size = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC].p_size.val; 2048fe56b9e6SYuval Mintz 2049fe56b9e6SYuval Mintz conn_cxt_size = CONN_CXT_SIZE(p_hwfn); 2050fe56b9e6SYuval Mintz cxts_per_p = ILT_PAGE_IN_BYTES(hw_p_size) / conn_cxt_size; 2051fe56b9e6SYuval Mintz line = p_info->iid / cxts_per_p; 2052fe56b9e6SYuval Mintz 2053fe56b9e6SYuval Mintz /* Make sure context is allocated (dynamic allocation) */ 2054fe56b9e6SYuval Mintz if (!p_mngr->ilt_shadow[line].p_virt) 2055fe56b9e6SYuval Mintz return -EINVAL; 2056fe56b9e6SYuval Mintz 2057fe56b9e6SYuval Mintz p_info->p_cxt = p_mngr->ilt_shadow[line].p_virt + 2058fe56b9e6SYuval Mintz p_info->iid % cxts_per_p * conn_cxt_size; 2059fe56b9e6SYuval Mintz 2060fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, (QED_MSG_ILT | QED_MSG_CXT), 2061fe56b9e6SYuval Mintz "Accessing ILT shadow[%d]: CXT pointer is at %p (for iid %d)\n", 2062fe56b9e6SYuval Mintz p_info->iid / cxts_per_p, p_info->p_cxt, p_info->iid); 2063fe56b9e6SYuval Mintz 2064fe56b9e6SYuval Mintz return 0; 2065fe56b9e6SYuval Mintz } 2066fe56b9e6SYuval Mintz 20678c93beafSYuval Mintz static void qed_rdma_set_pf_params(struct qed_hwfn *p_hwfn, 2068f9dc4d1fSRam Amrani struct qed_rdma_pf_params *p_params, 2069f9dc4d1fSRam Amrani u32 num_tasks) 2070dbb799c3SYuval Mintz { 2071f9dc4d1fSRam Amrani u32 num_cons, num_qps, num_srqs; 2072dbb799c3SYuval Mintz enum protocol_type proto; 2073dbb799c3SYuval Mintz 207439dbc646SYuval Bason num_srqs = min_t(u32, QED_RDMA_MAX_SRQS, p_params->num_srqs); 2075dbb799c3SYuval Mintz 2076e0a8f9deSMichal Kalderon if (p_hwfn->mcp_info->func_info.protocol == QED_PCI_ETH_RDMA) { 2077e0a8f9deSMichal Kalderon DP_NOTICE(p_hwfn, 2078e0a8f9deSMichal Kalderon "Current day drivers don't support RoCE & iWARP simultaneously on the same PF. Default to RoCE-only\n"); 2079e0a8f9deSMichal Kalderon p_hwfn->hw_info.personality = QED_PCI_ETH_ROCE; 2080e0a8f9deSMichal Kalderon } 2081e0a8f9deSMichal Kalderon 2082dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) { 20835d7dc962SKalderon, Michal case QED_PCI_ETH_IWARP: 20845d7dc962SKalderon, Michal /* Each QP requires one connection */ 20855d7dc962SKalderon, Michal num_cons = min_t(u32, IWARP_MAX_QPS, p_params->num_qps); 20865d7dc962SKalderon, Michal proto = PROTOCOLID_IWARP; 20875d7dc962SKalderon, Michal break; 2088dbb799c3SYuval Mintz case QED_PCI_ETH_ROCE: 2089dbb799c3SYuval Mintz num_qps = min_t(u32, ROCE_MAX_QPS, p_params->num_qps); 2090dbb799c3SYuval Mintz num_cons = num_qps * 2; /* each QP requires two connections */ 2091dbb799c3SYuval Mintz proto = PROTOCOLID_ROCE; 2092dbb799c3SYuval Mintz break; 2093dbb799c3SYuval Mintz default: 2094dbb799c3SYuval Mintz return; 2095dbb799c3SYuval Mintz } 2096dbb799c3SYuval Mintz 2097dbb799c3SYuval Mintz if (num_cons && num_tasks) { 2098dbb799c3SYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, proto, num_cons, 0); 2099dbb799c3SYuval Mintz 2100dbb799c3SYuval Mintz /* Deliberatly passing ROCE for tasks id. This is because 2101dbb799c3SYuval Mintz * iWARP / RoCE share the task id. 2102dbb799c3SYuval Mintz */ 2103dbb799c3SYuval Mintz qed_cxt_set_proto_tid_count(p_hwfn, PROTOCOLID_ROCE, 2104dbb799c3SYuval Mintz QED_CXT_ROCE_TID_SEG, 1, 2105dbb799c3SYuval Mintz num_tasks, false); 2106dbb799c3SYuval Mintz qed_cxt_set_srq_count(p_hwfn, num_srqs); 2107dbb799c3SYuval Mintz } else { 2108dbb799c3SYuval Mintz DP_INFO(p_hwfn->cdev, 2109dbb799c3SYuval Mintz "RDMA personality used without setting params!\n"); 2110dbb799c3SYuval Mintz } 2111dbb799c3SYuval Mintz } 2112dbb799c3SYuval Mintz 2113f9dc4d1fSRam Amrani int qed_cxt_set_pf_params(struct qed_hwfn *p_hwfn, u32 rdma_tasks) 2114fe56b9e6SYuval Mintz { 2115fe56b9e6SYuval Mintz /* Set the number of required CORE connections */ 2116fe56b9e6SYuval Mintz u32 core_cids = 1; /* SPQ */ 2117fe56b9e6SYuval Mintz 21180a7fb11cSYuval Mintz if (p_hwfn->using_ll2) 21190a7fb11cSYuval Mintz core_cids += 4; 21201408cc1fSYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, PROTOCOLID_CORE, core_cids, 0); 2121fe56b9e6SYuval Mintz 2122dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) { 21235d7dc962SKalderon, Michal case QED_PCI_ETH_RDMA: 21245d7dc962SKalderon, Michal case QED_PCI_ETH_IWARP: 2125dbb799c3SYuval Mintz case QED_PCI_ETH_ROCE: 2126dbb799c3SYuval Mintz { 2127dbb799c3SYuval Mintz qed_rdma_set_pf_params(p_hwfn, 2128dbb799c3SYuval Mintz &p_hwfn-> 2129f9dc4d1fSRam Amrani pf_params.rdma_pf_params, 2130f9dc4d1fSRam Amrani rdma_tasks); 2131dbb799c3SYuval Mintz /* no need for break since RoCE coexist with Ethernet */ 2132dbb799c3SYuval Mintz } 2133dbb799c3SYuval Mintz case QED_PCI_ETH: 2134dbb799c3SYuval Mintz { 2135dbb799c3SYuval Mintz struct qed_eth_pf_params *p_params = 2136dbb799c3SYuval Mintz &p_hwfn->pf_params.eth_pf_params; 2137dbb799c3SYuval Mintz 213808bc8f15SMintz, Yuval if (!p_params->num_vf_cons) 213908bc8f15SMintz, Yuval p_params->num_vf_cons = 214008bc8f15SMintz, Yuval ETH_PF_PARAMS_VF_CONS_DEFAULT; 2141fe56b9e6SYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, PROTOCOLID_ETH, 214208bc8f15SMintz, Yuval p_params->num_cons, 214308bc8f15SMintz, Yuval p_params->num_vf_cons); 2144d51e4af5SChopra, Manish p_hwfn->p_cxt_mngr->arfs_count = p_params->num_arfs_filters; 2145dbb799c3SYuval Mintz break; 2146dbb799c3SYuval Mintz } 21471e128c81SArun Easi case QED_PCI_FCOE: 21481e128c81SArun Easi { 21491e128c81SArun Easi struct qed_fcoe_pf_params *p_params; 21501e128c81SArun Easi 21511e128c81SArun Easi p_params = &p_hwfn->pf_params.fcoe_pf_params; 21521e128c81SArun Easi 21531e128c81SArun Easi if (p_params->num_cons && p_params->num_tasks) { 21541e128c81SArun Easi qed_cxt_set_proto_cid_count(p_hwfn, 21551e128c81SArun Easi PROTOCOLID_FCOE, 21561e128c81SArun Easi p_params->num_cons, 21571e128c81SArun Easi 0); 21581e128c81SArun Easi 21591e128c81SArun Easi qed_cxt_set_proto_tid_count(p_hwfn, PROTOCOLID_FCOE, 21601e128c81SArun Easi QED_CXT_FCOE_TID_SEG, 0, 21611e128c81SArun Easi p_params->num_tasks, true); 21621e128c81SArun Easi } else { 21631e128c81SArun Easi DP_INFO(p_hwfn->cdev, 21641e128c81SArun Easi "Fcoe personality used without setting params!\n"); 21651e128c81SArun Easi } 21661e128c81SArun Easi break; 21671e128c81SArun Easi } 2168dbb799c3SYuval Mintz case QED_PCI_ISCSI: 2169dbb799c3SYuval Mintz { 2170dbb799c3SYuval Mintz struct qed_iscsi_pf_params *p_params; 2171dbb799c3SYuval Mintz 2172dbb799c3SYuval Mintz p_params = &p_hwfn->pf_params.iscsi_pf_params; 2173dbb799c3SYuval Mintz 2174dbb799c3SYuval Mintz if (p_params->num_cons && p_params->num_tasks) { 2175dbb799c3SYuval Mintz qed_cxt_set_proto_cid_count(p_hwfn, 2176dbb799c3SYuval Mintz PROTOCOLID_ISCSI, 2177dbb799c3SYuval Mintz p_params->num_cons, 2178dbb799c3SYuval Mintz 0); 2179dbb799c3SYuval Mintz 2180dbb799c3SYuval Mintz qed_cxt_set_proto_tid_count(p_hwfn, 2181dbb799c3SYuval Mintz PROTOCOLID_ISCSI, 2182dbb799c3SYuval Mintz QED_CXT_ISCSI_TID_SEG, 2183dbb799c3SYuval Mintz 0, 2184dbb799c3SYuval Mintz p_params->num_tasks, 2185dbb799c3SYuval Mintz true); 2186dbb799c3SYuval Mintz } else { 2187dbb799c3SYuval Mintz DP_INFO(p_hwfn->cdev, 2188dbb799c3SYuval Mintz "Iscsi personality used without setting params!\n"); 2189dbb799c3SYuval Mintz } 2190dbb799c3SYuval Mintz break; 2191dbb799c3SYuval Mintz } 2192dbb799c3SYuval Mintz default: 2193dbb799c3SYuval Mintz return -EINVAL; 2194dbb799c3SYuval Mintz } 2195dbb799c3SYuval Mintz 2196dbb799c3SYuval Mintz return 0; 2197dbb799c3SYuval Mintz } 2198dbb799c3SYuval Mintz 2199dbb799c3SYuval Mintz int qed_cxt_get_tid_mem_info(struct qed_hwfn *p_hwfn, 2200dbb799c3SYuval Mintz struct qed_tid_mem *p_info) 2201dbb799c3SYuval Mintz { 2202dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 2203dbb799c3SYuval Mintz u32 proto, seg, total_lines, i, shadow_line; 2204dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 2205dbb799c3SYuval Mintz struct qed_ilt_cli_blk *p_fl_seg; 2206dbb799c3SYuval Mintz struct qed_tid_seg *p_seg_info; 2207dbb799c3SYuval Mintz 2208dbb799c3SYuval Mintz /* Verify the personality */ 2209dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) { 22101e128c81SArun Easi case QED_PCI_FCOE: 22111e128c81SArun Easi proto = PROTOCOLID_FCOE; 22121e128c81SArun Easi seg = QED_CXT_FCOE_TID_SEG; 22131e128c81SArun Easi break; 2214dbb799c3SYuval Mintz case QED_PCI_ISCSI: 2215dbb799c3SYuval Mintz proto = PROTOCOLID_ISCSI; 2216dbb799c3SYuval Mintz seg = QED_CXT_ISCSI_TID_SEG; 2217dbb799c3SYuval Mintz break; 2218dbb799c3SYuval Mintz default: 2219dbb799c3SYuval Mintz return -EINVAL; 2220dbb799c3SYuval Mintz } 2221dbb799c3SYuval Mintz 2222dbb799c3SYuval Mintz p_cli = &p_mngr->clients[ILT_CLI_CDUT]; 2223dbb799c3SYuval Mintz if (!p_cli->active) 2224dbb799c3SYuval Mintz return -EINVAL; 2225dbb799c3SYuval Mintz 2226dbb799c3SYuval Mintz p_seg_info = &p_mngr->conn_cfg[proto].tid_seg[seg]; 2227dbb799c3SYuval Mintz if (!p_seg_info->has_fl_mem) 2228dbb799c3SYuval Mintz return -EINVAL; 2229dbb799c3SYuval Mintz 2230dbb799c3SYuval Mintz p_fl_seg = &p_cli->pf_blks[CDUT_FL_SEG_BLK(seg, PF)]; 2231dbb799c3SYuval Mintz total_lines = DIV_ROUND_UP(p_fl_seg->total_size, 2232dbb799c3SYuval Mintz p_fl_seg->real_size_in_page); 2233dbb799c3SYuval Mintz 2234dbb799c3SYuval Mintz for (i = 0; i < total_lines; i++) { 2235dbb799c3SYuval Mintz shadow_line = i + p_fl_seg->start_line - 2236dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->pf_start_line; 2237dbb799c3SYuval Mintz p_info->blocks[i] = p_mngr->ilt_shadow[shadow_line].p_virt; 2238dbb799c3SYuval Mintz } 2239dbb799c3SYuval Mintz p_info->waste = ILT_PAGE_IN_BYTES(p_cli->p_size.val) - 2240dbb799c3SYuval Mintz p_fl_seg->real_size_in_page; 2241dbb799c3SYuval Mintz p_info->tid_size = p_mngr->task_type_size[p_seg_info->type]; 2242dbb799c3SYuval Mintz p_info->num_tids_per_block = p_fl_seg->real_size_in_page / 2243dbb799c3SYuval Mintz p_info->tid_size; 2244dbb799c3SYuval Mintz 2245dbb799c3SYuval Mintz return 0; 2246dbb799c3SYuval Mintz } 2247dbb799c3SYuval Mintz 2248dbb799c3SYuval Mintz /* This function is very RoCE oriented, if another protocol in the future 2249dbb799c3SYuval Mintz * will want this feature we'll need to modify the function to be more generic 2250dbb799c3SYuval Mintz */ 2251dbb799c3SYuval Mintz int 2252dbb799c3SYuval Mintz qed_cxt_dynamic_ilt_alloc(struct qed_hwfn *p_hwfn, 2253dbb799c3SYuval Mintz enum qed_cxt_elem_type elem_type, u32 iid) 2254dbb799c3SYuval Mintz { 2255dbb799c3SYuval Mintz u32 reg_offset, shadow_line, elem_size, hw_p_size, elems_per_p, line; 2256dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 2257dbb799c3SYuval Mintz struct qed_ilt_cli_blk *p_blk; 2258dbb799c3SYuval Mintz struct qed_ptt *p_ptt; 2259dbb799c3SYuval Mintz dma_addr_t p_phys; 2260dbb799c3SYuval Mintz u64 ilt_hw_entry; 2261dbb799c3SYuval Mintz void *p_virt; 2262dbb799c3SYuval Mintz int rc = 0; 2263dbb799c3SYuval Mintz 2264dbb799c3SYuval Mintz switch (elem_type) { 2265dbb799c3SYuval Mintz case QED_ELEM_CXT: 2266dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC]; 2267dbb799c3SYuval Mintz elem_size = CONN_CXT_SIZE(p_hwfn); 2268dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUC_BLK]; 2269dbb799c3SYuval Mintz break; 2270dbb799c3SYuval Mintz case QED_ELEM_SRQ: 2271dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM]; 2272dbb799c3SYuval Mintz elem_size = SRQ_CXT_SIZE; 2273dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[SRQ_BLK]; 2274dbb799c3SYuval Mintz break; 2275dbb799c3SYuval Mintz case QED_ELEM_TASK: 2276dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT]; 2277dbb799c3SYuval Mintz elem_size = TYPE1_TASK_CXT_SIZE(p_hwfn); 2278dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUT_SEG_BLK(QED_CXT_ROCE_TID_SEG)]; 2279dbb799c3SYuval Mintz break; 2280dbb799c3SYuval Mintz default: 2281dbb799c3SYuval Mintz DP_NOTICE(p_hwfn, "-EINVALID elem type = %d", elem_type); 2282dbb799c3SYuval Mintz return -EINVAL; 2283dbb799c3SYuval Mintz } 2284dbb799c3SYuval Mintz 2285dbb799c3SYuval Mintz /* Calculate line in ilt */ 2286dbb799c3SYuval Mintz hw_p_size = p_cli->p_size.val; 2287dbb799c3SYuval Mintz elems_per_p = ILT_PAGE_IN_BYTES(hw_p_size) / elem_size; 2288dbb799c3SYuval Mintz line = p_blk->start_line + (iid / elems_per_p); 2289dbb799c3SYuval Mintz shadow_line = line - p_hwfn->p_cxt_mngr->pf_start_line; 2290dbb799c3SYuval Mintz 2291dbb799c3SYuval Mintz /* If line is already allocated, do nothing, otherwise allocate it and 2292dbb799c3SYuval Mintz * write it to the PSWRQ2 registers. 2293dbb799c3SYuval Mintz * This section can be run in parallel from different contexts and thus 2294dbb799c3SYuval Mintz * a mutex protection is needed. 2295dbb799c3SYuval Mintz */ 2296dbb799c3SYuval Mintz 2297dbb799c3SYuval Mintz mutex_lock(&p_hwfn->p_cxt_mngr->mutex); 2298dbb799c3SYuval Mintz 2299dbb799c3SYuval Mintz if (p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].p_virt) 2300dbb799c3SYuval Mintz goto out0; 2301dbb799c3SYuval Mintz 2302dbb799c3SYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn); 2303dbb799c3SYuval Mintz if (!p_ptt) { 2304dbb799c3SYuval Mintz DP_NOTICE(p_hwfn, 2305dbb799c3SYuval Mintz "QED_TIME_OUT on ptt acquire - dynamic allocation"); 2306dbb799c3SYuval Mintz rc = -EBUSY; 2307dbb799c3SYuval Mintz goto out0; 2308dbb799c3SYuval Mintz } 2309dbb799c3SYuval Mintz 23105f58dff9SHimanshu Jha p_virt = dma_zalloc_coherent(&p_hwfn->cdev->pdev->dev, 23115f58dff9SHimanshu Jha p_blk->real_size_in_page, &p_phys, 23125f58dff9SHimanshu Jha GFP_KERNEL); 2313dbb799c3SYuval Mintz if (!p_virt) { 2314dbb799c3SYuval Mintz rc = -ENOMEM; 2315dbb799c3SYuval Mintz goto out1; 2316dbb799c3SYuval Mintz } 2317dbb799c3SYuval Mintz 2318dbb799c3SYuval Mintz /* configuration of refTagMask to 0xF is required for RoCE DIF MR only, 2319dbb799c3SYuval Mintz * to compensate for a HW bug, but it is configured even if DIF is not 2320dbb799c3SYuval Mintz * enabled. This is harmless and allows us to avoid a dedicated API. We 2321dbb799c3SYuval Mintz * configure the field for all of the contexts on the newly allocated 2322dbb799c3SYuval Mintz * page. 2323dbb799c3SYuval Mintz */ 2324dbb799c3SYuval Mintz if (elem_type == QED_ELEM_TASK) { 2325dbb799c3SYuval Mintz u32 elem_i; 2326dbb799c3SYuval Mintz u8 *elem_start = (u8 *)p_virt; 2327dbb799c3SYuval Mintz union type1_task_context *elem; 2328dbb799c3SYuval Mintz 2329dbb799c3SYuval Mintz for (elem_i = 0; elem_i < elems_per_p; elem_i++) { 2330dbb799c3SYuval Mintz elem = (union type1_task_context *)elem_start; 2331dbb799c3SYuval Mintz SET_FIELD(elem->roce_ctx.tdif_context.flags1, 2332a2e7699eSTomer Tayar TDIF_TASK_CONTEXT_REF_TAG_MASK, 0xf); 2333dbb799c3SYuval Mintz elem_start += TYPE1_TASK_CXT_SIZE(p_hwfn); 2334dbb799c3SYuval Mintz } 2335dbb799c3SYuval Mintz } 2336dbb799c3SYuval Mintz 2337dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].p_virt = p_virt; 2338dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].p_phys = p_phys; 2339dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].size = 2340dbb799c3SYuval Mintz p_blk->real_size_in_page; 2341dbb799c3SYuval Mintz 2342dbb799c3SYuval Mintz /* compute absolute offset */ 2343dbb799c3SYuval Mintz reg_offset = PSWRQ2_REG_ILT_MEMORY + 2344dbb799c3SYuval Mintz (line * ILT_REG_SIZE_IN_BYTES * ILT_ENTRY_IN_REGS); 2345dbb799c3SYuval Mintz 2346dbb799c3SYuval Mintz ilt_hw_entry = 0; 2347dbb799c3SYuval Mintz SET_FIELD(ilt_hw_entry, ILT_ENTRY_VALID, 1ULL); 2348dbb799c3SYuval Mintz SET_FIELD(ilt_hw_entry, 2349dbb799c3SYuval Mintz ILT_ENTRY_PHY_ADDR, 2350dbb799c3SYuval Mintz (p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].p_phys >> 12)); 2351dbb799c3SYuval Mintz 2352dbb799c3SYuval Mintz /* Write via DMAE since the PSWRQ2_REG_ILT_MEMORY line is a wide-bus */ 2353dbb799c3SYuval Mintz qed_dmae_host2grc(p_hwfn, p_ptt, (u64) (uintptr_t)&ilt_hw_entry, 2354dbb799c3SYuval Mintz reg_offset, sizeof(ilt_hw_entry) / sizeof(u32), 0); 2355dbb799c3SYuval Mintz 2356dbb799c3SYuval Mintz if (elem_type == QED_ELEM_CXT) { 2357dbb799c3SYuval Mintz u32 last_cid_allocated = (1 + (iid / elems_per_p)) * 2358dbb799c3SYuval Mintz elems_per_p; 2359dbb799c3SYuval Mintz 2360dbb799c3SYuval Mintz /* Update the relevant register in the parser */ 2361dbb799c3SYuval Mintz qed_wr(p_hwfn, p_ptt, PRS_REG_ROCE_DEST_QP_MAX_PF, 2362dbb799c3SYuval Mintz last_cid_allocated - 1); 2363dbb799c3SYuval Mintz 2364dbb799c3SYuval Mintz if (!p_hwfn->b_rdma_enabled_in_prs) { 2365c851a9dcSKalderon, Michal /* Enable RDMA search */ 2366dbb799c3SYuval Mintz qed_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 1); 2367dbb799c3SYuval Mintz p_hwfn->b_rdma_enabled_in_prs = true; 2368dbb799c3SYuval Mintz } 2369dbb799c3SYuval Mintz } 2370dbb799c3SYuval Mintz 2371dbb799c3SYuval Mintz out1: 2372dbb799c3SYuval Mintz qed_ptt_release(p_hwfn, p_ptt); 2373dbb799c3SYuval Mintz out0: 2374dbb799c3SYuval Mintz mutex_unlock(&p_hwfn->p_cxt_mngr->mutex); 2375dbb799c3SYuval Mintz 2376dbb799c3SYuval Mintz return rc; 2377dbb799c3SYuval Mintz } 2378dbb799c3SYuval Mintz 2379dbb799c3SYuval Mintz /* This function is very RoCE oriented, if another protocol in the future 2380dbb799c3SYuval Mintz * will want this feature we'll need to modify the function to be more generic 2381dbb799c3SYuval Mintz */ 2382dbb799c3SYuval Mintz static int 2383dbb799c3SYuval Mintz qed_cxt_free_ilt_range(struct qed_hwfn *p_hwfn, 2384dbb799c3SYuval Mintz enum qed_cxt_elem_type elem_type, 2385dbb799c3SYuval Mintz u32 start_iid, u32 count) 2386dbb799c3SYuval Mintz { 2387dbb799c3SYuval Mintz u32 start_line, end_line, shadow_start_line, shadow_end_line; 2388dbb799c3SYuval Mintz u32 reg_offset, elem_size, hw_p_size, elems_per_p; 2389dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 2390dbb799c3SYuval Mintz struct qed_ilt_cli_blk *p_blk; 2391dbb799c3SYuval Mintz u32 end_iid = start_iid + count; 2392dbb799c3SYuval Mintz struct qed_ptt *p_ptt; 2393dbb799c3SYuval Mintz u64 ilt_hw_entry = 0; 2394dbb799c3SYuval Mintz u32 i; 2395dbb799c3SYuval Mintz 2396dbb799c3SYuval Mintz switch (elem_type) { 2397dbb799c3SYuval Mintz case QED_ELEM_CXT: 2398dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC]; 2399dbb799c3SYuval Mintz elem_size = CONN_CXT_SIZE(p_hwfn); 2400dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUC_BLK]; 2401dbb799c3SYuval Mintz break; 2402dbb799c3SYuval Mintz case QED_ELEM_SRQ: 2403dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM]; 2404dbb799c3SYuval Mintz elem_size = SRQ_CXT_SIZE; 2405dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[SRQ_BLK]; 2406dbb799c3SYuval Mintz break; 2407dbb799c3SYuval Mintz case QED_ELEM_TASK: 2408dbb799c3SYuval Mintz p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT]; 2409dbb799c3SYuval Mintz elem_size = TYPE1_TASK_CXT_SIZE(p_hwfn); 2410dbb799c3SYuval Mintz p_blk = &p_cli->pf_blks[CDUT_SEG_BLK(QED_CXT_ROCE_TID_SEG)]; 2411dbb799c3SYuval Mintz break; 2412dbb799c3SYuval Mintz default: 2413dbb799c3SYuval Mintz DP_NOTICE(p_hwfn, "-EINVALID elem type = %d", elem_type); 2414dbb799c3SYuval Mintz return -EINVAL; 2415dbb799c3SYuval Mintz } 2416dbb799c3SYuval Mintz 2417dbb799c3SYuval Mintz /* Calculate line in ilt */ 2418dbb799c3SYuval Mintz hw_p_size = p_cli->p_size.val; 2419dbb799c3SYuval Mintz elems_per_p = ILT_PAGE_IN_BYTES(hw_p_size) / elem_size; 2420dbb799c3SYuval Mintz start_line = p_blk->start_line + (start_iid / elems_per_p); 2421dbb799c3SYuval Mintz end_line = p_blk->start_line + (end_iid / elems_per_p); 2422dbb799c3SYuval Mintz if (((end_iid + 1) / elems_per_p) != (end_iid / elems_per_p)) 2423dbb799c3SYuval Mintz end_line--; 2424dbb799c3SYuval Mintz 2425dbb799c3SYuval Mintz shadow_start_line = start_line - p_hwfn->p_cxt_mngr->pf_start_line; 2426dbb799c3SYuval Mintz shadow_end_line = end_line - p_hwfn->p_cxt_mngr->pf_start_line; 2427dbb799c3SYuval Mintz 2428dbb799c3SYuval Mintz p_ptt = qed_ptt_acquire(p_hwfn); 2429dbb799c3SYuval Mintz if (!p_ptt) { 2430dbb799c3SYuval Mintz DP_NOTICE(p_hwfn, 2431dbb799c3SYuval Mintz "QED_TIME_OUT on ptt acquire - dynamic allocation"); 2432dbb799c3SYuval Mintz return -EBUSY; 2433dbb799c3SYuval Mintz } 2434dbb799c3SYuval Mintz 2435dbb799c3SYuval Mintz for (i = shadow_start_line; i < shadow_end_line; i++) { 2436dbb799c3SYuval Mintz if (!p_hwfn->p_cxt_mngr->ilt_shadow[i].p_virt) 2437dbb799c3SYuval Mintz continue; 2438dbb799c3SYuval Mintz 2439dbb799c3SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev, 2440dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].size, 2441dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].p_virt, 2442dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].p_phys); 2443dbb799c3SYuval Mintz 2444dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].p_virt = NULL; 2445dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].p_phys = 0; 2446dbb799c3SYuval Mintz p_hwfn->p_cxt_mngr->ilt_shadow[i].size = 0; 2447dbb799c3SYuval Mintz 2448dbb799c3SYuval Mintz /* compute absolute offset */ 2449dbb799c3SYuval Mintz reg_offset = PSWRQ2_REG_ILT_MEMORY + 2450dbb799c3SYuval Mintz ((start_line++) * ILT_REG_SIZE_IN_BYTES * 2451dbb799c3SYuval Mintz ILT_ENTRY_IN_REGS); 2452dbb799c3SYuval Mintz 2453dbb799c3SYuval Mintz /* Write via DMAE since the PSWRQ2_REG_ILT_MEMORY line is a 2454dbb799c3SYuval Mintz * wide-bus. 2455dbb799c3SYuval Mintz */ 2456dbb799c3SYuval Mintz qed_dmae_host2grc(p_hwfn, p_ptt, 2457dbb799c3SYuval Mintz (u64) (uintptr_t) &ilt_hw_entry, 2458dbb799c3SYuval Mintz reg_offset, 2459dbb799c3SYuval Mintz sizeof(ilt_hw_entry) / sizeof(u32), 2460dbb799c3SYuval Mintz 0); 2461dbb799c3SYuval Mintz } 2462dbb799c3SYuval Mintz 2463dbb799c3SYuval Mintz qed_ptt_release(p_hwfn, p_ptt); 2464dbb799c3SYuval Mintz 2465dbb799c3SYuval Mintz return 0; 2466dbb799c3SYuval Mintz } 2467dbb799c3SYuval Mintz 2468dbb799c3SYuval Mintz int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto) 2469dbb799c3SYuval Mintz { 2470dbb799c3SYuval Mintz int rc; 2471dbb799c3SYuval Mintz u32 cid; 2472dbb799c3SYuval Mintz 2473dbb799c3SYuval Mintz /* Free Connection CXT */ 2474dbb799c3SYuval Mintz rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_CXT, 2475dbb799c3SYuval Mintz qed_cxt_get_proto_cid_start(p_hwfn, 2476dbb799c3SYuval Mintz proto), 2477dbb799c3SYuval Mintz qed_cxt_get_proto_cid_count(p_hwfn, 2478dbb799c3SYuval Mintz proto, &cid)); 2479dbb799c3SYuval Mintz 2480dbb799c3SYuval Mintz if (rc) 2481dbb799c3SYuval Mintz return rc; 2482dbb799c3SYuval Mintz 24839de506a5SMichal Kalderon /* Free Task CXT ( Intentionally RoCE as task-id is shared between 24849de506a5SMichal Kalderon * RoCE and iWARP ) 24859de506a5SMichal Kalderon */ 24869de506a5SMichal Kalderon proto = PROTOCOLID_ROCE; 2487dbb799c3SYuval Mintz rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_TASK, 0, 2488dbb799c3SYuval Mintz qed_cxt_get_proto_tid_count(p_hwfn, proto)); 2489dbb799c3SYuval Mintz if (rc) 2490dbb799c3SYuval Mintz return rc; 2491dbb799c3SYuval Mintz 2492dbb799c3SYuval Mintz /* Free TSDM CXT */ 2493dbb799c3SYuval Mintz rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_SRQ, 0, 2494dbb799c3SYuval Mintz qed_cxt_get_srq_count(p_hwfn)); 2495dbb799c3SYuval Mintz 2496dbb799c3SYuval Mintz return rc; 2497dbb799c3SYuval Mintz } 2498dbb799c3SYuval Mintz 2499dbb799c3SYuval Mintz int qed_cxt_get_task_ctx(struct qed_hwfn *p_hwfn, 2500dbb799c3SYuval Mintz u32 tid, u8 ctx_type, void **pp_task_ctx) 2501dbb799c3SYuval Mintz { 2502dbb799c3SYuval Mintz struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr; 2503dbb799c3SYuval Mintz struct qed_ilt_client_cfg *p_cli; 2504dbb799c3SYuval Mintz struct qed_tid_seg *p_seg_info; 25051e128c81SArun Easi struct qed_ilt_cli_blk *p_seg; 2506dbb799c3SYuval Mintz u32 num_tids_per_block; 25071e128c81SArun Easi u32 tid_size, ilt_idx; 25081e128c81SArun Easi u32 total_lines; 25091e128c81SArun Easi u32 proto, seg; 2510dbb799c3SYuval Mintz 2511dbb799c3SYuval Mintz /* Verify the personality */ 2512dbb799c3SYuval Mintz switch (p_hwfn->hw_info.personality) { 25131e128c81SArun Easi case QED_PCI_FCOE: 25141e128c81SArun Easi proto = PROTOCOLID_FCOE; 25151e128c81SArun Easi seg = QED_CXT_FCOE_TID_SEG; 25161e128c81SArun Easi break; 2517dbb799c3SYuval Mintz case QED_PCI_ISCSI: 2518dbb799c3SYuval Mintz proto = PROTOCOLID_ISCSI; 2519dbb799c3SYuval Mintz seg = QED_CXT_ISCSI_TID_SEG; 2520dbb799c3SYuval Mintz break; 2521dbb799c3SYuval Mintz default: 2522dbb799c3SYuval Mintz return -EINVAL; 2523dbb799c3SYuval Mintz } 2524dbb799c3SYuval Mintz 2525dbb799c3SYuval Mintz p_cli = &p_mngr->clients[ILT_CLI_CDUT]; 2526dbb799c3SYuval Mintz if (!p_cli->active) 2527dbb799c3SYuval Mintz return -EINVAL; 2528dbb799c3SYuval Mintz 2529dbb799c3SYuval Mintz p_seg_info = &p_mngr->conn_cfg[proto].tid_seg[seg]; 2530dbb799c3SYuval Mintz 2531dbb799c3SYuval Mintz if (ctx_type == QED_CTX_WORKING_MEM) { 2532dbb799c3SYuval Mintz p_seg = &p_cli->pf_blks[CDUT_SEG_BLK(seg)]; 2533dbb799c3SYuval Mintz } else if (ctx_type == QED_CTX_FL_MEM) { 2534dbb799c3SYuval Mintz if (!p_seg_info->has_fl_mem) 2535dbb799c3SYuval Mintz return -EINVAL; 2536dbb799c3SYuval Mintz p_seg = &p_cli->pf_blks[CDUT_FL_SEG_BLK(seg, PF)]; 2537dbb799c3SYuval Mintz } else { 2538dbb799c3SYuval Mintz return -EINVAL; 2539dbb799c3SYuval Mintz } 2540dbb799c3SYuval Mintz total_lines = DIV_ROUND_UP(p_seg->total_size, p_seg->real_size_in_page); 2541dbb799c3SYuval Mintz tid_size = p_mngr->task_type_size[p_seg_info->type]; 2542dbb799c3SYuval Mintz num_tids_per_block = p_seg->real_size_in_page / tid_size; 2543dbb799c3SYuval Mintz 2544dbb799c3SYuval Mintz if (total_lines < tid / num_tids_per_block) 2545dbb799c3SYuval Mintz return -EINVAL; 2546dbb799c3SYuval Mintz 2547dbb799c3SYuval Mintz ilt_idx = tid / num_tids_per_block + p_seg->start_line - 2548dbb799c3SYuval Mintz p_mngr->pf_start_line; 2549dbb799c3SYuval Mintz *pp_task_ctx = (u8 *)p_mngr->ilt_shadow[ilt_idx].p_virt + 2550dbb799c3SYuval Mintz (tid % num_tids_per_block) * tid_size; 2551fe56b9e6SYuval Mintz 2552fe56b9e6SYuval Mintz return 0; 2553fe56b9e6SYuval Mintz } 2554