1 /* 2 * Copyright (C) 2003 - 2009 NetXen, Inc. 3 * Copyright (C) 2009 - QLogic Corporation. 4 * All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 * 19 * The full GNU General Public License is included in this distribution 20 * in the file called "COPYING". 21 * 22 */ 23 24 #include <linux/netdevice.h> 25 #include <linux/delay.h> 26 #include <linux/slab.h> 27 #include <linux/if_vlan.h> 28 #include <net/checksum.h> 29 #include "netxen_nic.h" 30 #include "netxen_nic_hw.h" 31 32 struct crb_addr_pair { 33 u32 addr; 34 u32 data; 35 }; 36 37 #define NETXEN_MAX_CRB_XFORM 60 38 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; 39 #define NETXEN_ADDR_ERROR (0xffffffff) 40 41 #define crb_addr_transform(name) \ 42 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \ 43 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20 44 45 #define NETXEN_NIC_XDMA_RESET 0x8000ff 46 47 static void 48 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 49 struct nx_host_rds_ring *rds_ring); 50 static int netxen_p3_has_mn(struct netxen_adapter *adapter); 51 52 static void crb_addr_transform_setup(void) 53 { 54 crb_addr_transform(XDMA); 55 crb_addr_transform(TIMR); 56 crb_addr_transform(SRE); 57 crb_addr_transform(SQN3); 58 crb_addr_transform(SQN2); 59 crb_addr_transform(SQN1); 60 crb_addr_transform(SQN0); 61 crb_addr_transform(SQS3); 62 crb_addr_transform(SQS2); 63 crb_addr_transform(SQS1); 64 crb_addr_transform(SQS0); 65 crb_addr_transform(RPMX7); 66 crb_addr_transform(RPMX6); 67 crb_addr_transform(RPMX5); 68 crb_addr_transform(RPMX4); 69 crb_addr_transform(RPMX3); 70 crb_addr_transform(RPMX2); 71 crb_addr_transform(RPMX1); 72 crb_addr_transform(RPMX0); 73 crb_addr_transform(ROMUSB); 74 crb_addr_transform(SN); 75 crb_addr_transform(QMN); 76 crb_addr_transform(QMS); 77 crb_addr_transform(PGNI); 78 crb_addr_transform(PGND); 79 crb_addr_transform(PGN3); 80 crb_addr_transform(PGN2); 81 crb_addr_transform(PGN1); 82 crb_addr_transform(PGN0); 83 crb_addr_transform(PGSI); 84 crb_addr_transform(PGSD); 85 crb_addr_transform(PGS3); 86 crb_addr_transform(PGS2); 87 crb_addr_transform(PGS1); 88 crb_addr_transform(PGS0); 89 crb_addr_transform(PS); 90 crb_addr_transform(PH); 91 crb_addr_transform(NIU); 92 crb_addr_transform(I2Q); 93 crb_addr_transform(EG); 94 crb_addr_transform(MN); 95 crb_addr_transform(MS); 96 crb_addr_transform(CAS2); 97 crb_addr_transform(CAS1); 98 crb_addr_transform(CAS0); 99 crb_addr_transform(CAM); 100 crb_addr_transform(C2C1); 101 crb_addr_transform(C2C0); 102 crb_addr_transform(SMB); 103 crb_addr_transform(OCM0); 104 crb_addr_transform(I2C0); 105 } 106 107 void netxen_release_rx_buffers(struct netxen_adapter *adapter) 108 { 109 struct netxen_recv_context *recv_ctx; 110 struct nx_host_rds_ring *rds_ring; 111 struct netxen_rx_buffer *rx_buf; 112 int i, ring; 113 114 recv_ctx = &adapter->recv_ctx; 115 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 116 rds_ring = &recv_ctx->rds_rings[ring]; 117 for (i = 0; i < rds_ring->num_desc; ++i) { 118 rx_buf = &(rds_ring->rx_buf_arr[i]); 119 if (rx_buf->state == NETXEN_BUFFER_FREE) 120 continue; 121 pci_unmap_single(adapter->pdev, 122 rx_buf->dma, 123 rds_ring->dma_size, 124 PCI_DMA_FROMDEVICE); 125 if (rx_buf->skb != NULL) 126 dev_kfree_skb_any(rx_buf->skb); 127 } 128 } 129 } 130 131 void netxen_release_tx_buffers(struct netxen_adapter *adapter) 132 { 133 struct netxen_cmd_buffer *cmd_buf; 134 struct netxen_skb_frag *buffrag; 135 int i, j; 136 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 137 138 cmd_buf = tx_ring->cmd_buf_arr; 139 for (i = 0; i < tx_ring->num_desc; i++) { 140 buffrag = cmd_buf->frag_array; 141 if (buffrag->dma) { 142 pci_unmap_single(adapter->pdev, buffrag->dma, 143 buffrag->length, PCI_DMA_TODEVICE); 144 buffrag->dma = 0ULL; 145 } 146 for (j = 1; j < cmd_buf->frag_count; j++) { 147 buffrag++; 148 if (buffrag->dma) { 149 pci_unmap_page(adapter->pdev, buffrag->dma, 150 buffrag->length, 151 PCI_DMA_TODEVICE); 152 buffrag->dma = 0ULL; 153 } 154 } 155 if (cmd_buf->skb) { 156 dev_kfree_skb_any(cmd_buf->skb); 157 cmd_buf->skb = NULL; 158 } 159 cmd_buf++; 160 } 161 } 162 163 void netxen_free_sw_resources(struct netxen_adapter *adapter) 164 { 165 struct netxen_recv_context *recv_ctx; 166 struct nx_host_rds_ring *rds_ring; 167 struct nx_host_tx_ring *tx_ring; 168 int ring; 169 170 recv_ctx = &adapter->recv_ctx; 171 172 if (recv_ctx->rds_rings == NULL) 173 goto skip_rds; 174 175 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 176 rds_ring = &recv_ctx->rds_rings[ring]; 177 vfree(rds_ring->rx_buf_arr); 178 rds_ring->rx_buf_arr = NULL; 179 } 180 kfree(recv_ctx->rds_rings); 181 182 skip_rds: 183 if (adapter->tx_ring == NULL) 184 return; 185 186 tx_ring = adapter->tx_ring; 187 vfree(tx_ring->cmd_buf_arr); 188 kfree(tx_ring); 189 adapter->tx_ring = NULL; 190 } 191 192 int netxen_alloc_sw_resources(struct netxen_adapter *adapter) 193 { 194 struct netxen_recv_context *recv_ctx; 195 struct nx_host_rds_ring *rds_ring; 196 struct nx_host_sds_ring *sds_ring; 197 struct nx_host_tx_ring *tx_ring; 198 struct netxen_rx_buffer *rx_buf; 199 int ring, i; 200 201 struct netxen_cmd_buffer *cmd_buf_arr; 202 struct net_device *netdev = adapter->netdev; 203 204 tx_ring = kzalloc(sizeof(struct nx_host_tx_ring), GFP_KERNEL); 205 if (tx_ring == NULL) 206 return -ENOMEM; 207 208 adapter->tx_ring = tx_ring; 209 210 tx_ring->num_desc = adapter->num_txd; 211 tx_ring->txq = netdev_get_tx_queue(netdev, 0); 212 213 cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring)); 214 if (cmd_buf_arr == NULL) 215 goto err_out; 216 217 tx_ring->cmd_buf_arr = cmd_buf_arr; 218 219 recv_ctx = &adapter->recv_ctx; 220 221 rds_ring = kcalloc(adapter->max_rds_rings, 222 sizeof(struct nx_host_rds_ring), GFP_KERNEL); 223 if (rds_ring == NULL) 224 goto err_out; 225 226 recv_ctx->rds_rings = rds_ring; 227 228 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 229 rds_ring = &recv_ctx->rds_rings[ring]; 230 switch (ring) { 231 case RCV_RING_NORMAL: 232 rds_ring->num_desc = adapter->num_rxd; 233 if (adapter->ahw.cut_through) { 234 rds_ring->dma_size = 235 NX_CT_DEFAULT_RX_BUF_LEN; 236 rds_ring->skb_size = 237 NX_CT_DEFAULT_RX_BUF_LEN; 238 } else { 239 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 240 rds_ring->dma_size = 241 NX_P3_RX_BUF_MAX_LEN; 242 else 243 rds_ring->dma_size = 244 NX_P2_RX_BUF_MAX_LEN; 245 rds_ring->skb_size = 246 rds_ring->dma_size + NET_IP_ALIGN; 247 } 248 break; 249 250 case RCV_RING_JUMBO: 251 rds_ring->num_desc = adapter->num_jumbo_rxd; 252 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 253 rds_ring->dma_size = 254 NX_P3_RX_JUMBO_BUF_MAX_LEN; 255 else 256 rds_ring->dma_size = 257 NX_P2_RX_JUMBO_BUF_MAX_LEN; 258 259 if (adapter->capabilities & NX_CAP0_HW_LRO) 260 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA; 261 262 rds_ring->skb_size = 263 rds_ring->dma_size + NET_IP_ALIGN; 264 break; 265 266 case RCV_RING_LRO: 267 rds_ring->num_desc = adapter->num_lro_rxd; 268 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH; 269 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; 270 break; 271 272 } 273 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring)); 274 if (rds_ring->rx_buf_arr == NULL) 275 /* free whatever was already allocated */ 276 goto err_out; 277 278 INIT_LIST_HEAD(&rds_ring->free_list); 279 /* 280 * Now go through all of them, set reference handles 281 * and put them in the queues. 282 */ 283 rx_buf = rds_ring->rx_buf_arr; 284 for (i = 0; i < rds_ring->num_desc; i++) { 285 list_add_tail(&rx_buf->list, 286 &rds_ring->free_list); 287 rx_buf->ref_handle = i; 288 rx_buf->state = NETXEN_BUFFER_FREE; 289 rx_buf++; 290 } 291 spin_lock_init(&rds_ring->lock); 292 } 293 294 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 295 sds_ring = &recv_ctx->sds_rings[ring]; 296 sds_ring->irq = adapter->msix_entries[ring].vector; 297 sds_ring->adapter = adapter; 298 sds_ring->num_desc = adapter->num_rxd; 299 300 for (i = 0; i < NUM_RCV_DESC_RINGS; i++) 301 INIT_LIST_HEAD(&sds_ring->free_list[i]); 302 } 303 304 return 0; 305 306 err_out: 307 netxen_free_sw_resources(adapter); 308 return -ENOMEM; 309 } 310 311 /* 312 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB 313 * address to external PCI CRB address. 314 */ 315 static u32 netxen_decode_crb_addr(u32 addr) 316 { 317 int i; 318 u32 base_addr, offset, pci_base; 319 320 crb_addr_transform_setup(); 321 322 pci_base = NETXEN_ADDR_ERROR; 323 base_addr = addr & 0xfff00000; 324 offset = addr & 0x000fffff; 325 326 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) { 327 if (crb_addr_xform[i] == base_addr) { 328 pci_base = i << 20; 329 break; 330 } 331 } 332 if (pci_base == NETXEN_ADDR_ERROR) 333 return pci_base; 334 else 335 return pci_base + offset; 336 } 337 338 #define NETXEN_MAX_ROM_WAIT_USEC 100 339 340 static int netxen_wait_rom_done(struct netxen_adapter *adapter) 341 { 342 long timeout = 0; 343 long done = 0; 344 345 cond_resched(); 346 347 while (done == 0) { 348 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS); 349 done &= 2; 350 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) { 351 dev_err(&adapter->pdev->dev, 352 "Timeout reached waiting for rom done"); 353 return -EIO; 354 } 355 udelay(1); 356 } 357 return 0; 358 } 359 360 static int do_rom_fast_read(struct netxen_adapter *adapter, 361 int addr, int *valp) 362 { 363 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); 364 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 365 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); 366 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); 367 if (netxen_wait_rom_done(adapter)) { 368 printk("Error waiting for rom done\n"); 369 return -EIO; 370 } 371 /* reset abyte_cnt and dummy_byte_cnt */ 372 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); 373 udelay(10); 374 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 375 376 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA); 377 return 0; 378 } 379 380 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 381 u8 *bytes, size_t size) 382 { 383 int addridx; 384 int ret = 0; 385 386 for (addridx = addr; addridx < (addr + size); addridx += 4) { 387 int v; 388 ret = do_rom_fast_read(adapter, addridx, &v); 389 if (ret != 0) 390 break; 391 *(__le32 *)bytes = cpu_to_le32(v); 392 bytes += 4; 393 } 394 395 return ret; 396 } 397 398 int 399 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 400 u8 *bytes, size_t size) 401 { 402 int ret; 403 404 ret = netxen_rom_lock(adapter); 405 if (ret < 0) 406 return ret; 407 408 ret = do_rom_fast_read_words(adapter, addr, bytes, size); 409 410 netxen_rom_unlock(adapter); 411 return ret; 412 } 413 414 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) 415 { 416 int ret; 417 418 if (netxen_rom_lock(adapter) != 0) 419 return -EIO; 420 421 ret = do_rom_fast_read(adapter, addr, valp); 422 netxen_rom_unlock(adapter); 423 return ret; 424 } 425 426 #define NETXEN_BOARDTYPE 0x4008 427 #define NETXEN_BOARDNUM 0x400c 428 #define NETXEN_CHIPNUM 0x4010 429 430 int netxen_pinit_from_rom(struct netxen_adapter *adapter) 431 { 432 int addr, val; 433 int i, n, init_delay = 0; 434 struct crb_addr_pair *buf; 435 unsigned offset; 436 u32 off; 437 438 /* resetall */ 439 netxen_rom_lock(adapter); 440 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xfeffffff); 441 netxen_rom_unlock(adapter); 442 443 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 444 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 445 (n != 0xcafecafe) || 446 netxen_rom_fast_read(adapter, 4, &n) != 0) { 447 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 448 "n: %08x\n", netxen_nic_driver_name, n); 449 return -EIO; 450 } 451 offset = n & 0xffffU; 452 n = (n >> 16) & 0xffffU; 453 } else { 454 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 455 !(n & 0x80000000)) { 456 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 457 "n: %08x\n", netxen_nic_driver_name, n); 458 return -EIO; 459 } 460 offset = 1; 461 n &= ~0x80000000; 462 } 463 464 if (n >= 1024) { 465 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not" 466 " initialized.\n", __func__, n); 467 return -EIO; 468 } 469 470 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); 471 if (buf == NULL) 472 return -ENOMEM; 473 474 for (i = 0; i < n; i++) { 475 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 || 476 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) { 477 kfree(buf); 478 return -EIO; 479 } 480 481 buf[i].addr = addr; 482 buf[i].data = val; 483 484 } 485 486 for (i = 0; i < n; i++) { 487 488 off = netxen_decode_crb_addr(buf[i].addr); 489 if (off == NETXEN_ADDR_ERROR) { 490 printk(KERN_ERR"CRB init value out of range %x\n", 491 buf[i].addr); 492 continue; 493 } 494 off += NETXEN_PCI_CRBSPACE; 495 496 if (off & 1) 497 continue; 498 499 /* skipping cold reboot MAGIC */ 500 if (off == NETXEN_CAM_RAM(0x1fc)) 501 continue; 502 503 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 504 if (off == (NETXEN_CRB_I2C0 + 0x1c)) 505 continue; 506 /* do not reset PCI */ 507 if (off == (ROMUSB_GLB + 0xbc)) 508 continue; 509 if (off == (ROMUSB_GLB + 0xa8)) 510 continue; 511 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */ 512 continue; 513 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */ 514 continue; 515 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */ 516 continue; 517 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET) 518 continue; 519 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) && 520 !NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 521 buf[i].data = 0x1020; 522 /* skip the function enable register */ 523 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION)) 524 continue; 525 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2)) 526 continue; 527 if ((off & 0x0ff00000) == NETXEN_CRB_SMB) 528 continue; 529 } 530 531 init_delay = 1; 532 /* After writing this register, HW needs time for CRB */ 533 /* to quiet down (else crb_window returns 0xffffffff) */ 534 if (off == NETXEN_ROMUSB_GLB_SW_RESET) { 535 init_delay = 1000; 536 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 537 /* hold xdma in reset also */ 538 buf[i].data = NETXEN_NIC_XDMA_RESET; 539 buf[i].data = 0x8000ff; 540 } 541 } 542 543 NXWR32(adapter, off, buf[i].data); 544 545 msleep(init_delay); 546 } 547 kfree(buf); 548 549 /* disable_peg_cache_all */ 550 551 /* unreset_net_cache */ 552 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 553 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET); 554 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f)); 555 } 556 557 /* p2dn replyCount */ 558 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e); 559 /* disable_peg_cache 0 */ 560 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8); 561 /* disable_peg_cache 1 */ 562 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8); 563 564 /* peg_clr_all */ 565 566 /* peg_clr 0 */ 567 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0); 568 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0); 569 /* peg_clr 1 */ 570 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0); 571 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0); 572 /* peg_clr 2 */ 573 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0); 574 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0); 575 /* peg_clr 3 */ 576 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0); 577 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0); 578 return 0; 579 } 580 581 static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section) 582 { 583 uint32_t i; 584 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 585 __le32 entries = cpu_to_le32(directory->num_entries); 586 587 for (i = 0; i < entries; i++) { 588 589 __le32 offs = cpu_to_le32(directory->findex) + 590 (i * cpu_to_le32(directory->entry_size)); 591 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8)); 592 593 if (tab_type == section) 594 return (struct uni_table_desc *) &unirom[offs]; 595 } 596 597 return NULL; 598 } 599 600 #define QLCNIC_FILEHEADER_SIZE (14 * 4) 601 602 static int 603 netxen_nic_validate_header(struct netxen_adapter *adapter) 604 { 605 const u8 *unirom = adapter->fw->data; 606 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 607 u32 fw_file_size = adapter->fw->size; 608 u32 tab_size; 609 __le32 entries; 610 __le32 entry_size; 611 612 if (fw_file_size < QLCNIC_FILEHEADER_SIZE) 613 return -EINVAL; 614 615 entries = cpu_to_le32(directory->num_entries); 616 entry_size = cpu_to_le32(directory->entry_size); 617 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size); 618 619 if (fw_file_size < tab_size) 620 return -EINVAL; 621 622 return 0; 623 } 624 625 static int 626 netxen_nic_validate_bootld(struct netxen_adapter *adapter) 627 { 628 struct uni_table_desc *tab_desc; 629 struct uni_data_desc *descr; 630 const u8 *unirom = adapter->fw->data; 631 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 632 NX_UNI_BOOTLD_IDX_OFF)); 633 u32 offs; 634 u32 tab_size; 635 u32 data_size; 636 637 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_BOOTLD); 638 639 if (!tab_desc) 640 return -EINVAL; 641 642 tab_size = cpu_to_le32(tab_desc->findex) + 643 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 644 645 if (adapter->fw->size < tab_size) 646 return -EINVAL; 647 648 offs = cpu_to_le32(tab_desc->findex) + 649 (cpu_to_le32(tab_desc->entry_size) * (idx)); 650 descr = (struct uni_data_desc *)&unirom[offs]; 651 652 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 653 654 if (adapter->fw->size < data_size) 655 return -EINVAL; 656 657 return 0; 658 } 659 660 static int 661 netxen_nic_validate_fw(struct netxen_adapter *adapter) 662 { 663 struct uni_table_desc *tab_desc; 664 struct uni_data_desc *descr; 665 const u8 *unirom = adapter->fw->data; 666 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 667 NX_UNI_FIRMWARE_IDX_OFF)); 668 u32 offs; 669 u32 tab_size; 670 u32 data_size; 671 672 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_FW); 673 674 if (!tab_desc) 675 return -EINVAL; 676 677 tab_size = cpu_to_le32(tab_desc->findex) + 678 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 679 680 if (adapter->fw->size < tab_size) 681 return -EINVAL; 682 683 offs = cpu_to_le32(tab_desc->findex) + 684 (cpu_to_le32(tab_desc->entry_size) * (idx)); 685 descr = (struct uni_data_desc *)&unirom[offs]; 686 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 687 688 if (adapter->fw->size < data_size) 689 return -EINVAL; 690 691 return 0; 692 } 693 694 695 static int 696 netxen_nic_validate_product_offs(struct netxen_adapter *adapter) 697 { 698 struct uni_table_desc *ptab_descr; 699 const u8 *unirom = adapter->fw->data; 700 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ? 701 1 : netxen_p3_has_mn(adapter); 702 __le32 entries; 703 __le32 entry_size; 704 u32 tab_size; 705 u32 i; 706 707 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL); 708 if (ptab_descr == NULL) 709 return -EINVAL; 710 711 entries = cpu_to_le32(ptab_descr->num_entries); 712 entry_size = cpu_to_le32(ptab_descr->entry_size); 713 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size); 714 715 if (adapter->fw->size < tab_size) 716 return -EINVAL; 717 718 nomn: 719 for (i = 0; i < entries; i++) { 720 721 __le32 flags, file_chiprev, offs; 722 u8 chiprev = adapter->ahw.revision_id; 723 uint32_t flagbit; 724 725 offs = cpu_to_le32(ptab_descr->findex) + 726 (i * cpu_to_le32(ptab_descr->entry_size)); 727 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF)); 728 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] + 729 NX_UNI_CHIP_REV_OFF)); 730 731 flagbit = mn_present ? 1 : 2; 732 733 if ((chiprev == file_chiprev) && 734 ((1ULL << flagbit) & flags)) { 735 adapter->file_prd_off = offs; 736 return 0; 737 } 738 } 739 740 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 741 mn_present = 0; 742 goto nomn; 743 } 744 745 return -EINVAL; 746 } 747 748 static int 749 netxen_nic_validate_unified_romimage(struct netxen_adapter *adapter) 750 { 751 if (netxen_nic_validate_header(adapter)) { 752 dev_err(&adapter->pdev->dev, 753 "unified image: header validation failed\n"); 754 return -EINVAL; 755 } 756 757 if (netxen_nic_validate_product_offs(adapter)) { 758 dev_err(&adapter->pdev->dev, 759 "unified image: product validation failed\n"); 760 return -EINVAL; 761 } 762 763 if (netxen_nic_validate_bootld(adapter)) { 764 dev_err(&adapter->pdev->dev, 765 "unified image: bootld validation failed\n"); 766 return -EINVAL; 767 } 768 769 if (netxen_nic_validate_fw(adapter)) { 770 dev_err(&adapter->pdev->dev, 771 "unified image: firmware validation failed\n"); 772 return -EINVAL; 773 } 774 775 return 0; 776 } 777 778 static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter, 779 u32 section, u32 idx_offset) 780 { 781 const u8 *unirom = adapter->fw->data; 782 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 783 idx_offset)); 784 struct uni_table_desc *tab_desc; 785 __le32 offs; 786 787 tab_desc = nx_get_table_desc(unirom, section); 788 789 if (tab_desc == NULL) 790 return NULL; 791 792 offs = cpu_to_le32(tab_desc->findex) + 793 (cpu_to_le32(tab_desc->entry_size) * idx); 794 795 return (struct uni_data_desc *)&unirom[offs]; 796 } 797 798 static u8 * 799 nx_get_bootld_offs(struct netxen_adapter *adapter) 800 { 801 u32 offs = NETXEN_BOOTLD_START; 802 803 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 804 offs = cpu_to_le32((nx_get_data_desc(adapter, 805 NX_UNI_DIR_SECT_BOOTLD, 806 NX_UNI_BOOTLD_IDX_OFF))->findex); 807 808 return (u8 *)&adapter->fw->data[offs]; 809 } 810 811 static u8 * 812 nx_get_fw_offs(struct netxen_adapter *adapter) 813 { 814 u32 offs = NETXEN_IMAGE_START; 815 816 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 817 offs = cpu_to_le32((nx_get_data_desc(adapter, 818 NX_UNI_DIR_SECT_FW, 819 NX_UNI_FIRMWARE_IDX_OFF))->findex); 820 821 return (u8 *)&adapter->fw->data[offs]; 822 } 823 824 static __le32 825 nx_get_fw_size(struct netxen_adapter *adapter) 826 { 827 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 828 return cpu_to_le32((nx_get_data_desc(adapter, 829 NX_UNI_DIR_SECT_FW, 830 NX_UNI_FIRMWARE_IDX_OFF))->size); 831 else 832 return cpu_to_le32( 833 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]); 834 } 835 836 static __le32 837 nx_get_fw_version(struct netxen_adapter *adapter) 838 { 839 struct uni_data_desc *fw_data_desc; 840 const struct firmware *fw = adapter->fw; 841 __le32 major, minor, sub; 842 const u8 *ver_str; 843 int i, ret = 0; 844 845 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 846 847 fw_data_desc = nx_get_data_desc(adapter, 848 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF); 849 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) + 850 cpu_to_le32(fw_data_desc->size) - 17; 851 852 for (i = 0; i < 12; i++) { 853 if (!strncmp(&ver_str[i], "REV=", 4)) { 854 ret = sscanf(&ver_str[i+4], "%u.%u.%u ", 855 &major, &minor, &sub); 856 break; 857 } 858 } 859 860 if (ret != 3) 861 return 0; 862 863 return major + (minor << 8) + (sub << 16); 864 865 } else 866 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]); 867 } 868 869 static __le32 870 nx_get_bios_version(struct netxen_adapter *adapter) 871 { 872 const struct firmware *fw = adapter->fw; 873 __le32 bios_ver, prd_off = adapter->file_prd_off; 874 875 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 876 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off]) 877 + NX_UNI_BIOS_VERSION_OFF)); 878 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + 879 (bios_ver >> 24); 880 } else 881 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]); 882 883 } 884 885 int 886 netxen_need_fw_reset(struct netxen_adapter *adapter) 887 { 888 u32 count, old_count; 889 u32 val, version, major, minor, build; 890 int i, timeout; 891 u8 fw_type; 892 893 /* NX2031 firmware doesn't support heartbit */ 894 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 895 return 1; 896 897 if (adapter->need_fw_reset) 898 return 1; 899 900 /* last attempt had failed */ 901 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED) 902 return 1; 903 904 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 905 906 for (i = 0; i < 10; i++) { 907 908 timeout = msleep_interruptible(200); 909 if (timeout) { 910 NXWR32(adapter, CRB_CMDPEG_STATE, 911 PHAN_INITIALIZE_FAILED); 912 return -EINTR; 913 } 914 915 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 916 if (count != old_count) 917 break; 918 } 919 920 /* firmware is dead */ 921 if (count == old_count) 922 return 1; 923 924 /* check if we have got newer or different file firmware */ 925 if (adapter->fw) { 926 927 val = nx_get_fw_version(adapter); 928 929 version = NETXEN_DECODE_VERSION(val); 930 931 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR); 932 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR); 933 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB); 934 935 if (version > NETXEN_VERSION_CODE(major, minor, build)) 936 return 1; 937 938 if (version == NETXEN_VERSION_CODE(major, minor, build) && 939 adapter->fw_type != NX_UNIFIED_ROMIMAGE) { 940 941 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL); 942 fw_type = (val & 0x4) ? 943 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE; 944 945 if (adapter->fw_type != fw_type) 946 return 1; 947 } 948 } 949 950 return 0; 951 } 952 953 #define NETXEN_MIN_P3_FW_SUPP NETXEN_VERSION_CODE(4, 0, 505) 954 955 int 956 netxen_check_flash_fw_compatibility(struct netxen_adapter *adapter) 957 { 958 u32 flash_fw_ver, min_fw_ver; 959 960 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 961 return 0; 962 963 if (netxen_rom_fast_read(adapter, 964 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) { 965 dev_err(&adapter->pdev->dev, "Unable to read flash fw" 966 "version\n"); 967 return -EIO; 968 } 969 970 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver); 971 min_fw_ver = NETXEN_MIN_P3_FW_SUPP; 972 if (flash_fw_ver >= min_fw_ver) 973 return 0; 974 975 dev_info(&adapter->pdev->dev, "Flash fw[%d.%d.%d] is < min fw supported" 976 "[4.0.505]. Please update firmware on flash\n", 977 _major(flash_fw_ver), _minor(flash_fw_ver), 978 _build(flash_fw_ver)); 979 return -EINVAL; 980 } 981 982 static char *fw_name[] = { 983 NX_P2_MN_ROMIMAGE_NAME, 984 NX_P3_CT_ROMIMAGE_NAME, 985 NX_P3_MN_ROMIMAGE_NAME, 986 NX_UNIFIED_ROMIMAGE_NAME, 987 NX_FLASH_ROMIMAGE_NAME, 988 }; 989 990 int 991 netxen_load_firmware(struct netxen_adapter *adapter) 992 { 993 u64 *ptr64; 994 u32 i, flashaddr, size; 995 const struct firmware *fw = adapter->fw; 996 struct pci_dev *pdev = adapter->pdev; 997 998 dev_info(&pdev->dev, "loading firmware from %s\n", 999 fw_name[adapter->fw_type]); 1000 1001 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1002 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1); 1003 1004 if (fw) { 1005 __le64 data; 1006 1007 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 1008 1009 ptr64 = (u64 *)nx_get_bootld_offs(adapter); 1010 flashaddr = NETXEN_BOOTLD_START; 1011 1012 for (i = 0; i < size; i++) { 1013 data = cpu_to_le64(ptr64[i]); 1014 1015 if (adapter->pci_mem_write(adapter, flashaddr, data)) 1016 return -EIO; 1017 1018 flashaddr += 8; 1019 } 1020 1021 size = (__force u32)nx_get_fw_size(adapter) / 8; 1022 1023 ptr64 = (u64 *)nx_get_fw_offs(adapter); 1024 flashaddr = NETXEN_IMAGE_START; 1025 1026 for (i = 0; i < size; i++) { 1027 data = cpu_to_le64(ptr64[i]); 1028 1029 if (adapter->pci_mem_write(adapter, 1030 flashaddr, data)) 1031 return -EIO; 1032 1033 flashaddr += 8; 1034 } 1035 1036 size = (__force u32)nx_get_fw_size(adapter) % 8; 1037 if (size) { 1038 data = cpu_to_le64(ptr64[i]); 1039 1040 if (adapter->pci_mem_write(adapter, 1041 flashaddr, data)) 1042 return -EIO; 1043 } 1044 1045 } else { 1046 u64 data; 1047 u32 hi, lo; 1048 1049 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 1050 flashaddr = NETXEN_BOOTLD_START; 1051 1052 for (i = 0; i < size; i++) { 1053 if (netxen_rom_fast_read(adapter, 1054 flashaddr, (int *)&lo) != 0) 1055 return -EIO; 1056 if (netxen_rom_fast_read(adapter, 1057 flashaddr + 4, (int *)&hi) != 0) 1058 return -EIO; 1059 1060 /* hi, lo are already in host endian byteorder */ 1061 data = (((u64)hi << 32) | lo); 1062 1063 if (adapter->pci_mem_write(adapter, 1064 flashaddr, data)) 1065 return -EIO; 1066 1067 flashaddr += 8; 1068 } 1069 } 1070 msleep(1); 1071 1072 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) { 1073 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020); 1074 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e); 1075 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1076 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d); 1077 else { 1078 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff); 1079 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0); 1080 } 1081 1082 return 0; 1083 } 1084 1085 static int 1086 netxen_validate_firmware(struct netxen_adapter *adapter) 1087 { 1088 __le32 val; 1089 __le32 flash_fw_ver; 1090 u32 file_fw_ver, min_ver, bios; 1091 struct pci_dev *pdev = adapter->pdev; 1092 const struct firmware *fw = adapter->fw; 1093 u8 fw_type = adapter->fw_type; 1094 u32 crbinit_fix_fw; 1095 1096 if (fw_type == NX_UNIFIED_ROMIMAGE) { 1097 if (netxen_nic_validate_unified_romimage(adapter)) 1098 return -EINVAL; 1099 } else { 1100 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]); 1101 if ((__force u32)val != NETXEN_BDINFO_MAGIC) 1102 return -EINVAL; 1103 1104 if (fw->size < NX_FW_MIN_SIZE) 1105 return -EINVAL; 1106 } 1107 1108 val = nx_get_fw_version(adapter); 1109 1110 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1111 min_ver = NETXEN_MIN_P3_FW_SUPP; 1112 else 1113 min_ver = NETXEN_VERSION_CODE(3, 4, 216); 1114 1115 file_fw_ver = NETXEN_DECODE_VERSION(val); 1116 1117 if ((_major(file_fw_ver) > _NETXEN_NIC_LINUX_MAJOR) || 1118 (file_fw_ver < min_ver)) { 1119 dev_err(&pdev->dev, 1120 "%s: firmware version %d.%d.%d unsupported\n", 1121 fw_name[fw_type], _major(file_fw_ver), _minor(file_fw_ver), 1122 _build(file_fw_ver)); 1123 return -EINVAL; 1124 } 1125 val = nx_get_bios_version(adapter); 1126 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios); 1127 if ((__force u32)val != bios) { 1128 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n", 1129 fw_name[fw_type]); 1130 return -EINVAL; 1131 } 1132 1133 if (netxen_rom_fast_read(adapter, 1134 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) { 1135 dev_err(&pdev->dev, "Unable to read flash fw version\n"); 1136 return -EIO; 1137 } 1138 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver); 1139 1140 /* New fw from file is not allowed, if fw on flash is < 4.0.554 */ 1141 crbinit_fix_fw = NETXEN_VERSION_CODE(4, 0, 554); 1142 if (file_fw_ver >= crbinit_fix_fw && flash_fw_ver < crbinit_fix_fw && 1143 NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 1144 dev_err(&pdev->dev, "Incompatibility detected between driver " 1145 "and firmware version on flash. This configuration " 1146 "is not recommended. Please update the firmware on " 1147 "flash immediately\n"); 1148 return -EINVAL; 1149 } 1150 1151 /* check if flashed firmware is newer only for no-mn and P2 case*/ 1152 if (!netxen_p3_has_mn(adapter) || 1153 NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1154 if (flash_fw_ver > file_fw_ver) { 1155 dev_info(&pdev->dev, "%s: firmware is older than flash\n", 1156 fw_name[fw_type]); 1157 return -EINVAL; 1158 } 1159 } 1160 1161 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC); 1162 return 0; 1163 } 1164 1165 static void 1166 nx_get_next_fwtype(struct netxen_adapter *adapter) 1167 { 1168 u8 fw_type; 1169 1170 switch (adapter->fw_type) { 1171 case NX_UNKNOWN_ROMIMAGE: 1172 fw_type = NX_UNIFIED_ROMIMAGE; 1173 break; 1174 1175 case NX_UNIFIED_ROMIMAGE: 1176 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 1177 fw_type = NX_FLASH_ROMIMAGE; 1178 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1179 fw_type = NX_P2_MN_ROMIMAGE; 1180 else if (netxen_p3_has_mn(adapter)) 1181 fw_type = NX_P3_MN_ROMIMAGE; 1182 else 1183 fw_type = NX_P3_CT_ROMIMAGE; 1184 break; 1185 1186 case NX_P3_MN_ROMIMAGE: 1187 fw_type = NX_P3_CT_ROMIMAGE; 1188 break; 1189 1190 case NX_P2_MN_ROMIMAGE: 1191 case NX_P3_CT_ROMIMAGE: 1192 default: 1193 fw_type = NX_FLASH_ROMIMAGE; 1194 break; 1195 } 1196 1197 adapter->fw_type = fw_type; 1198 } 1199 1200 static int 1201 netxen_p3_has_mn(struct netxen_adapter *adapter) 1202 { 1203 u32 capability, flashed_ver; 1204 capability = 0; 1205 1206 /* NX2031 always had MN */ 1207 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1208 return 1; 1209 1210 netxen_rom_fast_read(adapter, 1211 NX_FW_VERSION_OFFSET, (int *)&flashed_ver); 1212 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver); 1213 1214 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) { 1215 1216 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY); 1217 if (capability & NX_PEG_TUNE_MN_PRESENT) 1218 return 1; 1219 } 1220 return 0; 1221 } 1222 1223 void netxen_request_firmware(struct netxen_adapter *adapter) 1224 { 1225 struct pci_dev *pdev = adapter->pdev; 1226 int rc = 0; 1227 1228 adapter->fw_type = NX_UNKNOWN_ROMIMAGE; 1229 1230 next: 1231 nx_get_next_fwtype(adapter); 1232 1233 if (adapter->fw_type == NX_FLASH_ROMIMAGE) { 1234 adapter->fw = NULL; 1235 } else { 1236 rc = request_firmware(&adapter->fw, 1237 fw_name[adapter->fw_type], &pdev->dev); 1238 if (rc != 0) 1239 goto next; 1240 1241 rc = netxen_validate_firmware(adapter); 1242 if (rc != 0) { 1243 release_firmware(adapter->fw); 1244 msleep(1); 1245 goto next; 1246 } 1247 } 1248 } 1249 1250 1251 void 1252 netxen_release_firmware(struct netxen_adapter *adapter) 1253 { 1254 release_firmware(adapter->fw); 1255 adapter->fw = NULL; 1256 } 1257 1258 int netxen_init_dummy_dma(struct netxen_adapter *adapter) 1259 { 1260 u64 addr; 1261 u32 hi, lo; 1262 1263 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1264 return 0; 1265 1266 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev, 1267 NETXEN_HOST_DUMMY_DMA_SIZE, 1268 &adapter->dummy_dma.phys_addr); 1269 if (adapter->dummy_dma.addr == NULL) { 1270 dev_err(&adapter->pdev->dev, 1271 "ERROR: Could not allocate dummy DMA memory\n"); 1272 return -ENOMEM; 1273 } 1274 1275 addr = (uint64_t) adapter->dummy_dma.phys_addr; 1276 hi = (addr >> 32) & 0xffffffff; 1277 lo = addr & 0xffffffff; 1278 1279 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi); 1280 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo); 1281 1282 return 0; 1283 } 1284 1285 /* 1286 * NetXen DMA watchdog control: 1287 * 1288 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive 1289 * Bit 1 : disable_request => 1 req disable dma watchdog 1290 * Bit 2 : enable_request => 1 req enable dma watchdog 1291 * Bit 3-31 : unused 1292 */ 1293 void netxen_free_dummy_dma(struct netxen_adapter *adapter) 1294 { 1295 int i = 100; 1296 u32 ctrl; 1297 1298 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1299 return; 1300 1301 if (!adapter->dummy_dma.addr) 1302 return; 1303 1304 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1305 if ((ctrl & 0x1) != 0) { 1306 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2)); 1307 1308 while ((ctrl & 0x1) != 0) { 1309 1310 msleep(50); 1311 1312 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1313 1314 if (--i == 0) 1315 break; 1316 } 1317 } 1318 1319 if (i) { 1320 pci_free_consistent(adapter->pdev, 1321 NETXEN_HOST_DUMMY_DMA_SIZE, 1322 adapter->dummy_dma.addr, 1323 adapter->dummy_dma.phys_addr); 1324 adapter->dummy_dma.addr = NULL; 1325 } else 1326 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n"); 1327 } 1328 1329 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val) 1330 { 1331 u32 val = 0; 1332 int retries = 60; 1333 1334 if (pegtune_val) 1335 return 0; 1336 1337 do { 1338 val = NXRD32(adapter, CRB_CMDPEG_STATE); 1339 switch (val) { 1340 case PHAN_INITIALIZE_COMPLETE: 1341 case PHAN_INITIALIZE_ACK: 1342 return 0; 1343 case PHAN_INITIALIZE_FAILED: 1344 goto out_err; 1345 default: 1346 break; 1347 } 1348 1349 msleep(500); 1350 1351 } while (--retries); 1352 1353 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); 1354 1355 out_err: 1356 dev_warn(&adapter->pdev->dev, "firmware init failed\n"); 1357 return -EIO; 1358 } 1359 1360 static int 1361 netxen_receive_peg_ready(struct netxen_adapter *adapter) 1362 { 1363 u32 val = 0; 1364 int retries = 2000; 1365 1366 do { 1367 val = NXRD32(adapter, CRB_RCVPEG_STATE); 1368 1369 if (val == PHAN_PEG_RCV_INITIALIZED) 1370 return 0; 1371 1372 msleep(10); 1373 1374 } while (--retries); 1375 1376 if (!retries) { 1377 printk(KERN_ERR "Receive Peg initialization not " 1378 "complete, state: 0x%x.\n", val); 1379 return -EIO; 1380 } 1381 1382 return 0; 1383 } 1384 1385 int netxen_init_firmware(struct netxen_adapter *adapter) 1386 { 1387 int err; 1388 1389 err = netxen_receive_peg_ready(adapter); 1390 if (err) 1391 return err; 1392 1393 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT); 1394 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE); 1395 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK); 1396 1397 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1398 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC); 1399 1400 return err; 1401 } 1402 1403 static void 1404 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg) 1405 { 1406 u32 cable_OUI; 1407 u16 cable_len; 1408 u16 link_speed; 1409 u8 link_status, module, duplex, autoneg; 1410 struct net_device *netdev = adapter->netdev; 1411 1412 adapter->has_link_events = 1; 1413 1414 cable_OUI = msg->body[1] & 0xffffffff; 1415 cable_len = (msg->body[1] >> 32) & 0xffff; 1416 link_speed = (msg->body[1] >> 48) & 0xffff; 1417 1418 link_status = msg->body[2] & 0xff; 1419 duplex = (msg->body[2] >> 16) & 0xff; 1420 autoneg = (msg->body[2] >> 24) & 0xff; 1421 1422 module = (msg->body[2] >> 8) & 0xff; 1423 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) { 1424 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n", 1425 netdev->name, cable_OUI, cable_len); 1426 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) { 1427 printk(KERN_INFO "%s: unsupported cable length %d\n", 1428 netdev->name, cable_len); 1429 } 1430 1431 /* update link parameters */ 1432 if (duplex == LINKEVENT_FULL_DUPLEX) 1433 adapter->link_duplex = DUPLEX_FULL; 1434 else 1435 adapter->link_duplex = DUPLEX_HALF; 1436 adapter->module_type = module; 1437 adapter->link_autoneg = autoneg; 1438 adapter->link_speed = link_speed; 1439 1440 netxen_advert_link_change(adapter, link_status); 1441 } 1442 1443 static void 1444 netxen_handle_fw_message(int desc_cnt, int index, 1445 struct nx_host_sds_ring *sds_ring) 1446 { 1447 nx_fw_msg_t msg; 1448 struct status_desc *desc; 1449 int i = 0, opcode; 1450 1451 while (desc_cnt > 0 && i < 8) { 1452 desc = &sds_ring->desc_head[index]; 1453 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]); 1454 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]); 1455 1456 index = get_next_index(index, sds_ring->num_desc); 1457 desc_cnt--; 1458 } 1459 1460 opcode = netxen_get_nic_msg_opcode(msg.body[0]); 1461 switch (opcode) { 1462 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE: 1463 netxen_handle_linkevent(sds_ring->adapter, &msg); 1464 break; 1465 default: 1466 break; 1467 } 1468 } 1469 1470 static int 1471 netxen_alloc_rx_skb(struct netxen_adapter *adapter, 1472 struct nx_host_rds_ring *rds_ring, 1473 struct netxen_rx_buffer *buffer) 1474 { 1475 struct sk_buff *skb; 1476 dma_addr_t dma; 1477 struct pci_dev *pdev = adapter->pdev; 1478 1479 buffer->skb = netdev_alloc_skb(adapter->netdev, rds_ring->skb_size); 1480 if (!buffer->skb) 1481 return 1; 1482 1483 skb = buffer->skb; 1484 1485 if (!adapter->ahw.cut_through) 1486 skb_reserve(skb, 2); 1487 1488 dma = pci_map_single(pdev, skb->data, 1489 rds_ring->dma_size, PCI_DMA_FROMDEVICE); 1490 1491 if (pci_dma_mapping_error(pdev, dma)) { 1492 dev_kfree_skb_any(skb); 1493 buffer->skb = NULL; 1494 return 1; 1495 } 1496 1497 buffer->skb = skb; 1498 buffer->dma = dma; 1499 buffer->state = NETXEN_BUFFER_BUSY; 1500 1501 return 0; 1502 } 1503 1504 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter, 1505 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum) 1506 { 1507 struct netxen_rx_buffer *buffer; 1508 struct sk_buff *skb; 1509 1510 buffer = &rds_ring->rx_buf_arr[index]; 1511 1512 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size, 1513 PCI_DMA_FROMDEVICE); 1514 1515 skb = buffer->skb; 1516 if (!skb) 1517 goto no_skb; 1518 1519 if (likely((adapter->netdev->features & NETIF_F_RXCSUM) 1520 && cksum == STATUS_CKSUM_OK)) { 1521 adapter->stats.csummed++; 1522 skb->ip_summed = CHECKSUM_UNNECESSARY; 1523 } else 1524 skb->ip_summed = CHECKSUM_NONE; 1525 1526 buffer->skb = NULL; 1527 no_skb: 1528 buffer->state = NETXEN_BUFFER_FREE; 1529 return skb; 1530 } 1531 1532 static struct netxen_rx_buffer * 1533 netxen_process_rcv(struct netxen_adapter *adapter, 1534 struct nx_host_sds_ring *sds_ring, 1535 int ring, u64 sts_data0) 1536 { 1537 struct net_device *netdev = adapter->netdev; 1538 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1539 struct netxen_rx_buffer *buffer; 1540 struct sk_buff *skb; 1541 struct nx_host_rds_ring *rds_ring; 1542 int index, length, cksum, pkt_offset; 1543 1544 if (unlikely(ring >= adapter->max_rds_rings)) 1545 return NULL; 1546 1547 rds_ring = &recv_ctx->rds_rings[ring]; 1548 1549 index = netxen_get_sts_refhandle(sts_data0); 1550 if (unlikely(index >= rds_ring->num_desc)) 1551 return NULL; 1552 1553 buffer = &rds_ring->rx_buf_arr[index]; 1554 1555 length = netxen_get_sts_totallength(sts_data0); 1556 cksum = netxen_get_sts_status(sts_data0); 1557 pkt_offset = netxen_get_sts_pkt_offset(sts_data0); 1558 1559 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum); 1560 if (!skb) 1561 return buffer; 1562 1563 if (length > rds_ring->skb_size) 1564 skb_put(skb, rds_ring->skb_size); 1565 else 1566 skb_put(skb, length); 1567 1568 1569 if (pkt_offset) 1570 skb_pull(skb, pkt_offset); 1571 1572 skb->protocol = eth_type_trans(skb, netdev); 1573 1574 napi_gro_receive(&sds_ring->napi, skb); 1575 1576 adapter->stats.rx_pkts++; 1577 adapter->stats.rxbytes += length; 1578 1579 return buffer; 1580 } 1581 1582 #define TCP_HDR_SIZE 20 1583 #define TCP_TS_OPTION_SIZE 12 1584 #define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE) 1585 1586 static struct netxen_rx_buffer * 1587 netxen_process_lro(struct netxen_adapter *adapter, 1588 struct nx_host_sds_ring *sds_ring, 1589 int ring, u64 sts_data0, u64 sts_data1) 1590 { 1591 struct net_device *netdev = adapter->netdev; 1592 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1593 struct netxen_rx_buffer *buffer; 1594 struct sk_buff *skb; 1595 struct nx_host_rds_ring *rds_ring; 1596 struct iphdr *iph; 1597 struct tcphdr *th; 1598 bool push, timestamp; 1599 int l2_hdr_offset, l4_hdr_offset; 1600 int index; 1601 u16 lro_length, length, data_offset; 1602 u32 seq_number; 1603 u8 vhdr_len = 0; 1604 1605 if (unlikely(ring >= adapter->max_rds_rings)) 1606 return NULL; 1607 1608 rds_ring = &recv_ctx->rds_rings[ring]; 1609 1610 index = netxen_get_lro_sts_refhandle(sts_data0); 1611 if (unlikely(index >= rds_ring->num_desc)) 1612 return NULL; 1613 1614 buffer = &rds_ring->rx_buf_arr[index]; 1615 1616 timestamp = netxen_get_lro_sts_timestamp(sts_data0); 1617 lro_length = netxen_get_lro_sts_length(sts_data0); 1618 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0); 1619 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0); 1620 push = netxen_get_lro_sts_push_flag(sts_data0); 1621 seq_number = netxen_get_lro_sts_seq_number(sts_data1); 1622 1623 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK); 1624 if (!skb) 1625 return buffer; 1626 1627 if (timestamp) 1628 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE; 1629 else 1630 data_offset = l4_hdr_offset + TCP_HDR_SIZE; 1631 1632 skb_put(skb, lro_length + data_offset); 1633 1634 skb_pull(skb, l2_hdr_offset); 1635 skb->protocol = eth_type_trans(skb, netdev); 1636 1637 if (skb->protocol == htons(ETH_P_8021Q)) 1638 vhdr_len = VLAN_HLEN; 1639 iph = (struct iphdr *)(skb->data + vhdr_len); 1640 th = (struct tcphdr *)((skb->data + vhdr_len) + (iph->ihl << 2)); 1641 1642 length = (iph->ihl << 2) + (th->doff << 2) + lro_length; 1643 csum_replace2(&iph->check, iph->tot_len, htons(length)); 1644 iph->tot_len = htons(length); 1645 th->psh = push; 1646 th->seq = htonl(seq_number); 1647 1648 length = skb->len; 1649 1650 if (adapter->flags & NETXEN_FW_MSS_CAP) 1651 skb_shinfo(skb)->gso_size = netxen_get_lro_sts_mss(sts_data1); 1652 1653 netif_receive_skb(skb); 1654 1655 adapter->stats.lro_pkts++; 1656 adapter->stats.rxbytes += length; 1657 1658 return buffer; 1659 } 1660 1661 #define netxen_merge_rx_buffers(list, head) \ 1662 do { list_splice_tail_init(list, head); } while (0); 1663 1664 int 1665 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max) 1666 { 1667 struct netxen_adapter *adapter = sds_ring->adapter; 1668 1669 struct list_head *cur; 1670 1671 struct status_desc *desc; 1672 struct netxen_rx_buffer *rxbuf; 1673 1674 u32 consumer = sds_ring->consumer; 1675 1676 int count = 0; 1677 u64 sts_data0, sts_data1; 1678 int opcode, ring = 0, desc_cnt; 1679 1680 while (count < max) { 1681 desc = &sds_ring->desc_head[consumer]; 1682 sts_data0 = le64_to_cpu(desc->status_desc_data[0]); 1683 1684 if (!(sts_data0 & STATUS_OWNER_HOST)) 1685 break; 1686 1687 desc_cnt = netxen_get_sts_desc_cnt(sts_data0); 1688 1689 opcode = netxen_get_sts_opcode(sts_data0); 1690 1691 switch (opcode) { 1692 case NETXEN_NIC_RXPKT_DESC: 1693 case NETXEN_OLD_RXPKT_DESC: 1694 case NETXEN_NIC_SYN_OFFLOAD: 1695 ring = netxen_get_sts_type(sts_data0); 1696 rxbuf = netxen_process_rcv(adapter, sds_ring, 1697 ring, sts_data0); 1698 break; 1699 case NETXEN_NIC_LRO_DESC: 1700 ring = netxen_get_lro_sts_type(sts_data0); 1701 sts_data1 = le64_to_cpu(desc->status_desc_data[1]); 1702 rxbuf = netxen_process_lro(adapter, sds_ring, 1703 ring, sts_data0, sts_data1); 1704 break; 1705 case NETXEN_NIC_RESPONSE_DESC: 1706 netxen_handle_fw_message(desc_cnt, consumer, sds_ring); 1707 default: 1708 goto skip; 1709 } 1710 1711 WARN_ON(desc_cnt > 1); 1712 1713 if (rxbuf) 1714 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]); 1715 1716 skip: 1717 for (; desc_cnt > 0; desc_cnt--) { 1718 desc = &sds_ring->desc_head[consumer]; 1719 desc->status_desc_data[0] = 1720 cpu_to_le64(STATUS_OWNER_PHANTOM); 1721 consumer = get_next_index(consumer, sds_ring->num_desc); 1722 } 1723 count++; 1724 } 1725 1726 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 1727 struct nx_host_rds_ring *rds_ring = 1728 &adapter->recv_ctx.rds_rings[ring]; 1729 1730 if (!list_empty(&sds_ring->free_list[ring])) { 1731 list_for_each(cur, &sds_ring->free_list[ring]) { 1732 rxbuf = list_entry(cur, 1733 struct netxen_rx_buffer, list); 1734 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf); 1735 } 1736 spin_lock(&rds_ring->lock); 1737 netxen_merge_rx_buffers(&sds_ring->free_list[ring], 1738 &rds_ring->free_list); 1739 spin_unlock(&rds_ring->lock); 1740 } 1741 1742 netxen_post_rx_buffers_nodb(adapter, rds_ring); 1743 } 1744 1745 if (count) { 1746 sds_ring->consumer = consumer; 1747 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer); 1748 } 1749 1750 return count; 1751 } 1752 1753 /* Process Command status ring */ 1754 int netxen_process_cmd_ring(struct netxen_adapter *adapter) 1755 { 1756 u32 sw_consumer, hw_consumer; 1757 int count = 0, i; 1758 struct netxen_cmd_buffer *buffer; 1759 struct pci_dev *pdev = adapter->pdev; 1760 struct net_device *netdev = adapter->netdev; 1761 struct netxen_skb_frag *frag; 1762 int done = 0; 1763 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 1764 1765 if (!spin_trylock(&adapter->tx_clean_lock)) 1766 return 1; 1767 1768 sw_consumer = tx_ring->sw_consumer; 1769 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1770 1771 while (sw_consumer != hw_consumer) { 1772 buffer = &tx_ring->cmd_buf_arr[sw_consumer]; 1773 if (buffer->skb) { 1774 frag = &buffer->frag_array[0]; 1775 pci_unmap_single(pdev, frag->dma, frag->length, 1776 PCI_DMA_TODEVICE); 1777 frag->dma = 0ULL; 1778 for (i = 1; i < buffer->frag_count; i++) { 1779 frag++; /* Get the next frag */ 1780 pci_unmap_page(pdev, frag->dma, frag->length, 1781 PCI_DMA_TODEVICE); 1782 frag->dma = 0ULL; 1783 } 1784 1785 adapter->stats.xmitfinished++; 1786 dev_kfree_skb_any(buffer->skb); 1787 buffer->skb = NULL; 1788 } 1789 1790 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc); 1791 if (++count >= MAX_STATUS_HANDLE) 1792 break; 1793 } 1794 1795 if (count && netif_running(netdev)) { 1796 tx_ring->sw_consumer = sw_consumer; 1797 1798 smp_mb(); 1799 1800 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) 1801 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH) 1802 netif_wake_queue(netdev); 1803 adapter->tx_timeo_cnt = 0; 1804 } 1805 /* 1806 * If everything is freed up to consumer then check if the ring is full 1807 * If the ring is full then check if more needs to be freed and 1808 * schedule the call back again. 1809 * 1810 * This happens when there are 2 CPUs. One could be freeing and the 1811 * other filling it. If the ring is full when we get out of here and 1812 * the card has already interrupted the host then the host can miss the 1813 * interrupt. 1814 * 1815 * There is still a possible race condition and the host could miss an 1816 * interrupt. The card has to take care of this. 1817 */ 1818 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1819 done = (sw_consumer == hw_consumer); 1820 spin_unlock(&adapter->tx_clean_lock); 1821 1822 return done; 1823 } 1824 1825 void 1826 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid, 1827 struct nx_host_rds_ring *rds_ring) 1828 { 1829 struct rcv_desc *pdesc; 1830 struct netxen_rx_buffer *buffer; 1831 int producer, count = 0; 1832 netxen_ctx_msg msg = 0; 1833 struct list_head *head; 1834 1835 producer = rds_ring->producer; 1836 1837 head = &rds_ring->free_list; 1838 while (!list_empty(head)) { 1839 1840 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1841 1842 if (!buffer->skb) { 1843 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1844 break; 1845 } 1846 1847 count++; 1848 list_del(&buffer->list); 1849 1850 /* make a rcv descriptor */ 1851 pdesc = &rds_ring->desc_head[producer]; 1852 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1853 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1854 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1855 1856 producer = get_next_index(producer, rds_ring->num_desc); 1857 } 1858 1859 if (count) { 1860 rds_ring->producer = producer; 1861 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1862 (producer-1) & (rds_ring->num_desc-1)); 1863 1864 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1865 /* 1866 * Write a doorbell msg to tell phanmon of change in 1867 * receive ring producer 1868 * Only for firmware version < 4.0.0 1869 */ 1870 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID); 1871 netxen_set_msg_privid(msg); 1872 netxen_set_msg_count(msg, 1873 ((producer - 1) & 1874 (rds_ring->num_desc - 1))); 1875 netxen_set_msg_ctxid(msg, adapter->portnum); 1876 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid)); 1877 NXWRIO(adapter, DB_NORMALIZE(adapter, 1878 NETXEN_RCV_PRODUCER_OFFSET), msg); 1879 } 1880 } 1881 } 1882 1883 static void 1884 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 1885 struct nx_host_rds_ring *rds_ring) 1886 { 1887 struct rcv_desc *pdesc; 1888 struct netxen_rx_buffer *buffer; 1889 int producer, count = 0; 1890 struct list_head *head; 1891 1892 if (!spin_trylock(&rds_ring->lock)) 1893 return; 1894 1895 producer = rds_ring->producer; 1896 1897 head = &rds_ring->free_list; 1898 while (!list_empty(head)) { 1899 1900 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1901 1902 if (!buffer->skb) { 1903 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1904 break; 1905 } 1906 1907 count++; 1908 list_del(&buffer->list); 1909 1910 /* make a rcv descriptor */ 1911 pdesc = &rds_ring->desc_head[producer]; 1912 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1913 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1914 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1915 1916 producer = get_next_index(producer, rds_ring->num_desc); 1917 } 1918 1919 if (count) { 1920 rds_ring->producer = producer; 1921 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1922 (producer - 1) & (rds_ring->num_desc - 1)); 1923 } 1924 spin_unlock(&rds_ring->lock); 1925 } 1926 1927 void netxen_nic_clear_stats(struct netxen_adapter *adapter) 1928 { 1929 memset(&adapter->stats, 0, sizeof(adapter->stats)); 1930 } 1931 1932