1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2003 - 2009 NetXen, Inc. 4 * Copyright (C) 2009 - QLogic Corporation. 5 * All rights reserved. 6 */ 7 8 #include <linux/netdevice.h> 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/if_vlan.h> 12 #include <net/checksum.h> 13 #include "netxen_nic.h" 14 #include "netxen_nic_hw.h" 15 16 struct crb_addr_pair { 17 u32 addr; 18 u32 data; 19 }; 20 21 #define NETXEN_MAX_CRB_XFORM 60 22 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; 23 #define NETXEN_ADDR_ERROR (0xffffffff) 24 25 #define crb_addr_transform(name) \ 26 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \ 27 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20 28 29 #define NETXEN_NIC_XDMA_RESET 0x8000ff 30 31 static void 32 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 33 struct nx_host_rds_ring *rds_ring); 34 static int netxen_p3_has_mn(struct netxen_adapter *adapter); 35 36 static void crb_addr_transform_setup(void) 37 { 38 crb_addr_transform(XDMA); 39 crb_addr_transform(TIMR); 40 crb_addr_transform(SRE); 41 crb_addr_transform(SQN3); 42 crb_addr_transform(SQN2); 43 crb_addr_transform(SQN1); 44 crb_addr_transform(SQN0); 45 crb_addr_transform(SQS3); 46 crb_addr_transform(SQS2); 47 crb_addr_transform(SQS1); 48 crb_addr_transform(SQS0); 49 crb_addr_transform(RPMX7); 50 crb_addr_transform(RPMX6); 51 crb_addr_transform(RPMX5); 52 crb_addr_transform(RPMX4); 53 crb_addr_transform(RPMX3); 54 crb_addr_transform(RPMX2); 55 crb_addr_transform(RPMX1); 56 crb_addr_transform(RPMX0); 57 crb_addr_transform(ROMUSB); 58 crb_addr_transform(SN); 59 crb_addr_transform(QMN); 60 crb_addr_transform(QMS); 61 crb_addr_transform(PGNI); 62 crb_addr_transform(PGND); 63 crb_addr_transform(PGN3); 64 crb_addr_transform(PGN2); 65 crb_addr_transform(PGN1); 66 crb_addr_transform(PGN0); 67 crb_addr_transform(PGSI); 68 crb_addr_transform(PGSD); 69 crb_addr_transform(PGS3); 70 crb_addr_transform(PGS2); 71 crb_addr_transform(PGS1); 72 crb_addr_transform(PGS0); 73 crb_addr_transform(PS); 74 crb_addr_transform(PH); 75 crb_addr_transform(NIU); 76 crb_addr_transform(I2Q); 77 crb_addr_transform(EG); 78 crb_addr_transform(MN); 79 crb_addr_transform(MS); 80 crb_addr_transform(CAS2); 81 crb_addr_transform(CAS1); 82 crb_addr_transform(CAS0); 83 crb_addr_transform(CAM); 84 crb_addr_transform(C2C1); 85 crb_addr_transform(C2C0); 86 crb_addr_transform(SMB); 87 crb_addr_transform(OCM0); 88 crb_addr_transform(I2C0); 89 } 90 91 void netxen_release_rx_buffers(struct netxen_adapter *adapter) 92 { 93 struct netxen_recv_context *recv_ctx; 94 struct nx_host_rds_ring *rds_ring; 95 struct netxen_rx_buffer *rx_buf; 96 int i, ring; 97 98 recv_ctx = &adapter->recv_ctx; 99 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 100 rds_ring = &recv_ctx->rds_rings[ring]; 101 for (i = 0; i < rds_ring->num_desc; ++i) { 102 rx_buf = &(rds_ring->rx_buf_arr[i]); 103 if (rx_buf->state == NETXEN_BUFFER_FREE) 104 continue; 105 pci_unmap_single(adapter->pdev, 106 rx_buf->dma, 107 rds_ring->dma_size, 108 PCI_DMA_FROMDEVICE); 109 if (rx_buf->skb != NULL) 110 dev_kfree_skb_any(rx_buf->skb); 111 } 112 } 113 } 114 115 void netxen_release_tx_buffers(struct netxen_adapter *adapter) 116 { 117 struct netxen_cmd_buffer *cmd_buf; 118 struct netxen_skb_frag *buffrag; 119 int i, j; 120 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 121 122 spin_lock_bh(&adapter->tx_clean_lock); 123 cmd_buf = tx_ring->cmd_buf_arr; 124 for (i = 0; i < tx_ring->num_desc; i++) { 125 buffrag = cmd_buf->frag_array; 126 if (buffrag->dma) { 127 pci_unmap_single(adapter->pdev, buffrag->dma, 128 buffrag->length, PCI_DMA_TODEVICE); 129 buffrag->dma = 0ULL; 130 } 131 for (j = 1; j < cmd_buf->frag_count; j++) { 132 buffrag++; 133 if (buffrag->dma) { 134 pci_unmap_page(adapter->pdev, buffrag->dma, 135 buffrag->length, 136 PCI_DMA_TODEVICE); 137 buffrag->dma = 0ULL; 138 } 139 } 140 if (cmd_buf->skb) { 141 dev_kfree_skb_any(cmd_buf->skb); 142 cmd_buf->skb = NULL; 143 } 144 cmd_buf++; 145 } 146 spin_unlock_bh(&adapter->tx_clean_lock); 147 } 148 149 void netxen_free_sw_resources(struct netxen_adapter *adapter) 150 { 151 struct netxen_recv_context *recv_ctx; 152 struct nx_host_rds_ring *rds_ring; 153 struct nx_host_tx_ring *tx_ring; 154 int ring; 155 156 recv_ctx = &adapter->recv_ctx; 157 158 if (recv_ctx->rds_rings == NULL) 159 goto skip_rds; 160 161 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 162 rds_ring = &recv_ctx->rds_rings[ring]; 163 vfree(rds_ring->rx_buf_arr); 164 rds_ring->rx_buf_arr = NULL; 165 } 166 kfree(recv_ctx->rds_rings); 167 168 skip_rds: 169 if (adapter->tx_ring == NULL) 170 return; 171 172 tx_ring = adapter->tx_ring; 173 vfree(tx_ring->cmd_buf_arr); 174 kfree(tx_ring); 175 adapter->tx_ring = NULL; 176 } 177 178 int netxen_alloc_sw_resources(struct netxen_adapter *adapter) 179 { 180 struct netxen_recv_context *recv_ctx; 181 struct nx_host_rds_ring *rds_ring; 182 struct nx_host_sds_ring *sds_ring; 183 struct nx_host_tx_ring *tx_ring; 184 struct netxen_rx_buffer *rx_buf; 185 int ring, i; 186 187 struct netxen_cmd_buffer *cmd_buf_arr; 188 struct net_device *netdev = adapter->netdev; 189 190 tx_ring = kzalloc(sizeof(struct nx_host_tx_ring), GFP_KERNEL); 191 if (tx_ring == NULL) 192 return -ENOMEM; 193 194 adapter->tx_ring = tx_ring; 195 196 tx_ring->num_desc = adapter->num_txd; 197 tx_ring->txq = netdev_get_tx_queue(netdev, 0); 198 199 cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring)); 200 if (cmd_buf_arr == NULL) 201 goto err_out; 202 203 tx_ring->cmd_buf_arr = cmd_buf_arr; 204 205 recv_ctx = &adapter->recv_ctx; 206 207 rds_ring = kcalloc(adapter->max_rds_rings, 208 sizeof(struct nx_host_rds_ring), GFP_KERNEL); 209 if (rds_ring == NULL) 210 goto err_out; 211 212 recv_ctx->rds_rings = rds_ring; 213 214 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 215 rds_ring = &recv_ctx->rds_rings[ring]; 216 switch (ring) { 217 case RCV_RING_NORMAL: 218 rds_ring->num_desc = adapter->num_rxd; 219 if (adapter->ahw.cut_through) { 220 rds_ring->dma_size = 221 NX_CT_DEFAULT_RX_BUF_LEN; 222 rds_ring->skb_size = 223 NX_CT_DEFAULT_RX_BUF_LEN; 224 } else { 225 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 226 rds_ring->dma_size = 227 NX_P3_RX_BUF_MAX_LEN; 228 else 229 rds_ring->dma_size = 230 NX_P2_RX_BUF_MAX_LEN; 231 rds_ring->skb_size = 232 rds_ring->dma_size + NET_IP_ALIGN; 233 } 234 break; 235 236 case RCV_RING_JUMBO: 237 rds_ring->num_desc = adapter->num_jumbo_rxd; 238 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 239 rds_ring->dma_size = 240 NX_P3_RX_JUMBO_BUF_MAX_LEN; 241 else 242 rds_ring->dma_size = 243 NX_P2_RX_JUMBO_BUF_MAX_LEN; 244 245 if (adapter->capabilities & NX_CAP0_HW_LRO) 246 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA; 247 248 rds_ring->skb_size = 249 rds_ring->dma_size + NET_IP_ALIGN; 250 break; 251 252 case RCV_RING_LRO: 253 rds_ring->num_desc = adapter->num_lro_rxd; 254 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH; 255 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; 256 break; 257 258 } 259 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring)); 260 if (rds_ring->rx_buf_arr == NULL) 261 /* free whatever was already allocated */ 262 goto err_out; 263 264 INIT_LIST_HEAD(&rds_ring->free_list); 265 /* 266 * Now go through all of them, set reference handles 267 * and put them in the queues. 268 */ 269 rx_buf = rds_ring->rx_buf_arr; 270 for (i = 0; i < rds_ring->num_desc; i++) { 271 list_add_tail(&rx_buf->list, 272 &rds_ring->free_list); 273 rx_buf->ref_handle = i; 274 rx_buf->state = NETXEN_BUFFER_FREE; 275 rx_buf++; 276 } 277 spin_lock_init(&rds_ring->lock); 278 } 279 280 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 281 sds_ring = &recv_ctx->sds_rings[ring]; 282 sds_ring->irq = adapter->msix_entries[ring].vector; 283 sds_ring->adapter = adapter; 284 sds_ring->num_desc = adapter->num_rxd; 285 286 for (i = 0; i < NUM_RCV_DESC_RINGS; i++) 287 INIT_LIST_HEAD(&sds_ring->free_list[i]); 288 } 289 290 return 0; 291 292 err_out: 293 netxen_free_sw_resources(adapter); 294 return -ENOMEM; 295 } 296 297 /* 298 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB 299 * address to external PCI CRB address. 300 */ 301 static u32 netxen_decode_crb_addr(u32 addr) 302 { 303 int i; 304 u32 base_addr, offset, pci_base; 305 306 crb_addr_transform_setup(); 307 308 pci_base = NETXEN_ADDR_ERROR; 309 base_addr = addr & 0xfff00000; 310 offset = addr & 0x000fffff; 311 312 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) { 313 if (crb_addr_xform[i] == base_addr) { 314 pci_base = i << 20; 315 break; 316 } 317 } 318 if (pci_base == NETXEN_ADDR_ERROR) 319 return pci_base; 320 else 321 return pci_base + offset; 322 } 323 324 #define NETXEN_MAX_ROM_WAIT_USEC 100 325 326 static int netxen_wait_rom_done(struct netxen_adapter *adapter) 327 { 328 long timeout = 0; 329 long done = 0; 330 331 cond_resched(); 332 333 while (done == 0) { 334 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS); 335 done &= 2; 336 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) { 337 dev_err(&adapter->pdev->dev, 338 "Timeout reached waiting for rom done"); 339 return -EIO; 340 } 341 udelay(1); 342 } 343 return 0; 344 } 345 346 static int do_rom_fast_read(struct netxen_adapter *adapter, 347 int addr, int *valp) 348 { 349 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); 350 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 351 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); 352 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); 353 if (netxen_wait_rom_done(adapter)) { 354 printk("Error waiting for rom done\n"); 355 return -EIO; 356 } 357 /* reset abyte_cnt and dummy_byte_cnt */ 358 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); 359 udelay(10); 360 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 361 362 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA); 363 return 0; 364 } 365 366 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 367 u8 *bytes, size_t size) 368 { 369 int addridx; 370 int ret = 0; 371 372 for (addridx = addr; addridx < (addr + size); addridx += 4) { 373 int v; 374 ret = do_rom_fast_read(adapter, addridx, &v); 375 if (ret != 0) 376 break; 377 *(__le32 *)bytes = cpu_to_le32(v); 378 bytes += 4; 379 } 380 381 return ret; 382 } 383 384 int 385 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 386 u8 *bytes, size_t size) 387 { 388 int ret; 389 390 ret = netxen_rom_lock(adapter); 391 if (ret < 0) 392 return ret; 393 394 ret = do_rom_fast_read_words(adapter, addr, bytes, size); 395 396 netxen_rom_unlock(adapter); 397 return ret; 398 } 399 400 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) 401 { 402 int ret; 403 404 if (netxen_rom_lock(adapter) != 0) 405 return -EIO; 406 407 ret = do_rom_fast_read(adapter, addr, valp); 408 netxen_rom_unlock(adapter); 409 return ret; 410 } 411 412 #define NETXEN_BOARDTYPE 0x4008 413 #define NETXEN_BOARDNUM 0x400c 414 #define NETXEN_CHIPNUM 0x4010 415 416 int netxen_pinit_from_rom(struct netxen_adapter *adapter) 417 { 418 int addr, val; 419 int i, n, init_delay = 0; 420 struct crb_addr_pair *buf; 421 unsigned offset; 422 u32 off; 423 424 /* resetall */ 425 netxen_rom_lock(adapter); 426 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xfeffffff); 427 netxen_rom_unlock(adapter); 428 429 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 430 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 431 (n != 0xcafecafe) || 432 netxen_rom_fast_read(adapter, 4, &n) != 0) { 433 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 434 "n: %08x\n", netxen_nic_driver_name, n); 435 return -EIO; 436 } 437 offset = n & 0xffffU; 438 n = (n >> 16) & 0xffffU; 439 } else { 440 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 441 !(n & 0x80000000)) { 442 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 443 "n: %08x\n", netxen_nic_driver_name, n); 444 return -EIO; 445 } 446 offset = 1; 447 n &= ~0x80000000; 448 } 449 450 if (n >= 1024) { 451 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not" 452 " initialized.\n", __func__, n); 453 return -EIO; 454 } 455 456 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); 457 if (buf == NULL) 458 return -ENOMEM; 459 460 for (i = 0; i < n; i++) { 461 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 || 462 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) { 463 kfree(buf); 464 return -EIO; 465 } 466 467 buf[i].addr = addr; 468 buf[i].data = val; 469 470 } 471 472 for (i = 0; i < n; i++) { 473 474 off = netxen_decode_crb_addr(buf[i].addr); 475 if (off == NETXEN_ADDR_ERROR) { 476 printk(KERN_ERR"CRB init value out of range %x\n", 477 buf[i].addr); 478 continue; 479 } 480 off += NETXEN_PCI_CRBSPACE; 481 482 if (off & 1) 483 continue; 484 485 /* skipping cold reboot MAGIC */ 486 if (off == NETXEN_CAM_RAM(0x1fc)) 487 continue; 488 489 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 490 if (off == (NETXEN_CRB_I2C0 + 0x1c)) 491 continue; 492 /* do not reset PCI */ 493 if (off == (ROMUSB_GLB + 0xbc)) 494 continue; 495 if (off == (ROMUSB_GLB + 0xa8)) 496 continue; 497 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */ 498 continue; 499 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */ 500 continue; 501 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */ 502 continue; 503 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET) 504 continue; 505 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) && 506 !NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 507 buf[i].data = 0x1020; 508 /* skip the function enable register */ 509 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION)) 510 continue; 511 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2)) 512 continue; 513 if ((off & 0x0ff00000) == NETXEN_CRB_SMB) 514 continue; 515 } 516 517 init_delay = 1; 518 /* After writing this register, HW needs time for CRB */ 519 /* to quiet down (else crb_window returns 0xffffffff) */ 520 if (off == NETXEN_ROMUSB_GLB_SW_RESET) { 521 init_delay = 1000; 522 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 523 /* hold xdma in reset also */ 524 buf[i].data = NETXEN_NIC_XDMA_RESET; 525 buf[i].data = 0x8000ff; 526 } 527 } 528 529 NXWR32(adapter, off, buf[i].data); 530 531 msleep(init_delay); 532 } 533 kfree(buf); 534 535 /* disable_peg_cache_all */ 536 537 /* unreset_net_cache */ 538 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 539 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET); 540 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f)); 541 } 542 543 /* p2dn replyCount */ 544 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e); 545 /* disable_peg_cache 0 */ 546 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8); 547 /* disable_peg_cache 1 */ 548 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8); 549 550 /* peg_clr_all */ 551 552 /* peg_clr 0 */ 553 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0); 554 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0); 555 /* peg_clr 1 */ 556 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0); 557 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0); 558 /* peg_clr 2 */ 559 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0); 560 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0); 561 /* peg_clr 3 */ 562 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0); 563 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0); 564 return 0; 565 } 566 567 static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section) 568 { 569 uint32_t i; 570 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 571 __le32 entries = cpu_to_le32(directory->num_entries); 572 573 for (i = 0; i < entries; i++) { 574 575 __le32 offs = cpu_to_le32(directory->findex) + 576 (i * cpu_to_le32(directory->entry_size)); 577 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8)); 578 579 if (tab_type == section) 580 return (struct uni_table_desc *) &unirom[offs]; 581 } 582 583 return NULL; 584 } 585 586 #define QLCNIC_FILEHEADER_SIZE (14 * 4) 587 588 static int 589 netxen_nic_validate_header(struct netxen_adapter *adapter) 590 { 591 const u8 *unirom = adapter->fw->data; 592 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 593 u32 fw_file_size = adapter->fw->size; 594 u32 tab_size; 595 __le32 entries; 596 __le32 entry_size; 597 598 if (fw_file_size < QLCNIC_FILEHEADER_SIZE) 599 return -EINVAL; 600 601 entries = cpu_to_le32(directory->num_entries); 602 entry_size = cpu_to_le32(directory->entry_size); 603 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size); 604 605 if (fw_file_size < tab_size) 606 return -EINVAL; 607 608 return 0; 609 } 610 611 static int 612 netxen_nic_validate_bootld(struct netxen_adapter *adapter) 613 { 614 struct uni_table_desc *tab_desc; 615 struct uni_data_desc *descr; 616 const u8 *unirom = adapter->fw->data; 617 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 618 NX_UNI_BOOTLD_IDX_OFF)); 619 u32 offs; 620 u32 tab_size; 621 u32 data_size; 622 623 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_BOOTLD); 624 625 if (!tab_desc) 626 return -EINVAL; 627 628 tab_size = cpu_to_le32(tab_desc->findex) + 629 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 630 631 if (adapter->fw->size < tab_size) 632 return -EINVAL; 633 634 offs = cpu_to_le32(tab_desc->findex) + 635 (cpu_to_le32(tab_desc->entry_size) * (idx)); 636 descr = (struct uni_data_desc *)&unirom[offs]; 637 638 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 639 640 if (adapter->fw->size < data_size) 641 return -EINVAL; 642 643 return 0; 644 } 645 646 static int 647 netxen_nic_validate_fw(struct netxen_adapter *adapter) 648 { 649 struct uni_table_desc *tab_desc; 650 struct uni_data_desc *descr; 651 const u8 *unirom = adapter->fw->data; 652 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 653 NX_UNI_FIRMWARE_IDX_OFF)); 654 u32 offs; 655 u32 tab_size; 656 u32 data_size; 657 658 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_FW); 659 660 if (!tab_desc) 661 return -EINVAL; 662 663 tab_size = cpu_to_le32(tab_desc->findex) + 664 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 665 666 if (adapter->fw->size < tab_size) 667 return -EINVAL; 668 669 offs = cpu_to_le32(tab_desc->findex) + 670 (cpu_to_le32(tab_desc->entry_size) * (idx)); 671 descr = (struct uni_data_desc *)&unirom[offs]; 672 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 673 674 if (adapter->fw->size < data_size) 675 return -EINVAL; 676 677 return 0; 678 } 679 680 681 static int 682 netxen_nic_validate_product_offs(struct netxen_adapter *adapter) 683 { 684 struct uni_table_desc *ptab_descr; 685 const u8 *unirom = adapter->fw->data; 686 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ? 687 1 : netxen_p3_has_mn(adapter); 688 __le32 entries; 689 __le32 entry_size; 690 u32 tab_size; 691 u32 i; 692 693 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL); 694 if (ptab_descr == NULL) 695 return -EINVAL; 696 697 entries = cpu_to_le32(ptab_descr->num_entries); 698 entry_size = cpu_to_le32(ptab_descr->entry_size); 699 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size); 700 701 if (adapter->fw->size < tab_size) 702 return -EINVAL; 703 704 nomn: 705 for (i = 0; i < entries; i++) { 706 707 __le32 flags, file_chiprev, offs; 708 u8 chiprev = adapter->ahw.revision_id; 709 uint32_t flagbit; 710 711 offs = cpu_to_le32(ptab_descr->findex) + 712 (i * cpu_to_le32(ptab_descr->entry_size)); 713 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF)); 714 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] + 715 NX_UNI_CHIP_REV_OFF)); 716 717 flagbit = mn_present ? 1 : 2; 718 719 if ((chiprev == file_chiprev) && 720 ((1ULL << flagbit) & flags)) { 721 adapter->file_prd_off = offs; 722 return 0; 723 } 724 } 725 726 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 727 mn_present = 0; 728 goto nomn; 729 } 730 731 return -EINVAL; 732 } 733 734 static int 735 netxen_nic_validate_unified_romimage(struct netxen_adapter *adapter) 736 { 737 if (netxen_nic_validate_header(adapter)) { 738 dev_err(&adapter->pdev->dev, 739 "unified image: header validation failed\n"); 740 return -EINVAL; 741 } 742 743 if (netxen_nic_validate_product_offs(adapter)) { 744 dev_err(&adapter->pdev->dev, 745 "unified image: product validation failed\n"); 746 return -EINVAL; 747 } 748 749 if (netxen_nic_validate_bootld(adapter)) { 750 dev_err(&adapter->pdev->dev, 751 "unified image: bootld validation failed\n"); 752 return -EINVAL; 753 } 754 755 if (netxen_nic_validate_fw(adapter)) { 756 dev_err(&adapter->pdev->dev, 757 "unified image: firmware validation failed\n"); 758 return -EINVAL; 759 } 760 761 return 0; 762 } 763 764 static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter, 765 u32 section, u32 idx_offset) 766 { 767 const u8 *unirom = adapter->fw->data; 768 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 769 idx_offset)); 770 struct uni_table_desc *tab_desc; 771 __le32 offs; 772 773 tab_desc = nx_get_table_desc(unirom, section); 774 775 if (tab_desc == NULL) 776 return NULL; 777 778 offs = cpu_to_le32(tab_desc->findex) + 779 (cpu_to_le32(tab_desc->entry_size) * idx); 780 781 return (struct uni_data_desc *)&unirom[offs]; 782 } 783 784 static u8 * 785 nx_get_bootld_offs(struct netxen_adapter *adapter) 786 { 787 u32 offs = NETXEN_BOOTLD_START; 788 789 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 790 offs = cpu_to_le32((nx_get_data_desc(adapter, 791 NX_UNI_DIR_SECT_BOOTLD, 792 NX_UNI_BOOTLD_IDX_OFF))->findex); 793 794 return (u8 *)&adapter->fw->data[offs]; 795 } 796 797 static u8 * 798 nx_get_fw_offs(struct netxen_adapter *adapter) 799 { 800 u32 offs = NETXEN_IMAGE_START; 801 802 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 803 offs = cpu_to_le32((nx_get_data_desc(adapter, 804 NX_UNI_DIR_SECT_FW, 805 NX_UNI_FIRMWARE_IDX_OFF))->findex); 806 807 return (u8 *)&adapter->fw->data[offs]; 808 } 809 810 static __le32 811 nx_get_fw_size(struct netxen_adapter *adapter) 812 { 813 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 814 return cpu_to_le32((nx_get_data_desc(adapter, 815 NX_UNI_DIR_SECT_FW, 816 NX_UNI_FIRMWARE_IDX_OFF))->size); 817 else 818 return cpu_to_le32( 819 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]); 820 } 821 822 static __le32 823 nx_get_fw_version(struct netxen_adapter *adapter) 824 { 825 struct uni_data_desc *fw_data_desc; 826 const struct firmware *fw = adapter->fw; 827 __le32 major, minor, sub; 828 const u8 *ver_str; 829 int i, ret = 0; 830 831 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 832 833 fw_data_desc = nx_get_data_desc(adapter, 834 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF); 835 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) + 836 cpu_to_le32(fw_data_desc->size) - 17; 837 838 for (i = 0; i < 12; i++) { 839 if (!strncmp(&ver_str[i], "REV=", 4)) { 840 ret = sscanf(&ver_str[i+4], "%u.%u.%u ", 841 &major, &minor, &sub); 842 break; 843 } 844 } 845 846 if (ret != 3) 847 return 0; 848 849 return major + (minor << 8) + (sub << 16); 850 851 } else 852 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]); 853 } 854 855 static __le32 856 nx_get_bios_version(struct netxen_adapter *adapter) 857 { 858 const struct firmware *fw = adapter->fw; 859 __le32 bios_ver, prd_off = adapter->file_prd_off; 860 861 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 862 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off]) 863 + NX_UNI_BIOS_VERSION_OFF)); 864 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + 865 (bios_ver >> 24); 866 } else 867 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]); 868 869 } 870 871 int 872 netxen_need_fw_reset(struct netxen_adapter *adapter) 873 { 874 u32 count, old_count; 875 u32 val, version, major, minor, build; 876 int i, timeout; 877 u8 fw_type; 878 879 /* NX2031 firmware doesn't support heartbit */ 880 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 881 return 1; 882 883 if (adapter->need_fw_reset) 884 return 1; 885 886 /* last attempt had failed */ 887 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED) 888 return 1; 889 890 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 891 892 for (i = 0; i < 10; i++) { 893 894 timeout = msleep_interruptible(200); 895 if (timeout) { 896 NXWR32(adapter, CRB_CMDPEG_STATE, 897 PHAN_INITIALIZE_FAILED); 898 return -EINTR; 899 } 900 901 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 902 if (count != old_count) 903 break; 904 } 905 906 /* firmware is dead */ 907 if (count == old_count) 908 return 1; 909 910 /* check if we have got newer or different file firmware */ 911 if (adapter->fw) { 912 913 val = nx_get_fw_version(adapter); 914 915 version = NETXEN_DECODE_VERSION(val); 916 917 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR); 918 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR); 919 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB); 920 921 if (version > NETXEN_VERSION_CODE(major, minor, build)) 922 return 1; 923 924 if (version == NETXEN_VERSION_CODE(major, minor, build) && 925 adapter->fw_type != NX_UNIFIED_ROMIMAGE) { 926 927 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL); 928 fw_type = (val & 0x4) ? 929 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE; 930 931 if (adapter->fw_type != fw_type) 932 return 1; 933 } 934 } 935 936 return 0; 937 } 938 939 #define NETXEN_MIN_P3_FW_SUPP NETXEN_VERSION_CODE(4, 0, 505) 940 941 int 942 netxen_check_flash_fw_compatibility(struct netxen_adapter *adapter) 943 { 944 u32 flash_fw_ver, min_fw_ver; 945 946 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 947 return 0; 948 949 if (netxen_rom_fast_read(adapter, 950 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) { 951 dev_err(&adapter->pdev->dev, "Unable to read flash fw" 952 "version\n"); 953 return -EIO; 954 } 955 956 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver); 957 min_fw_ver = NETXEN_MIN_P3_FW_SUPP; 958 if (flash_fw_ver >= min_fw_ver) 959 return 0; 960 961 dev_info(&adapter->pdev->dev, "Flash fw[%d.%d.%d] is < min fw supported" 962 "[4.0.505]. Please update firmware on flash\n", 963 _major(flash_fw_ver), _minor(flash_fw_ver), 964 _build(flash_fw_ver)); 965 return -EINVAL; 966 } 967 968 static char *fw_name[] = { 969 NX_P2_MN_ROMIMAGE_NAME, 970 NX_P3_CT_ROMIMAGE_NAME, 971 NX_P3_MN_ROMIMAGE_NAME, 972 NX_UNIFIED_ROMIMAGE_NAME, 973 NX_FLASH_ROMIMAGE_NAME, 974 }; 975 976 int 977 netxen_load_firmware(struct netxen_adapter *adapter) 978 { 979 u64 *ptr64; 980 u32 i, flashaddr, size; 981 const struct firmware *fw = adapter->fw; 982 struct pci_dev *pdev = adapter->pdev; 983 984 dev_info(&pdev->dev, "loading firmware from %s\n", 985 fw_name[adapter->fw_type]); 986 987 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 988 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1); 989 990 if (fw) { 991 __le64 data; 992 993 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 994 995 ptr64 = (u64 *)nx_get_bootld_offs(adapter); 996 flashaddr = NETXEN_BOOTLD_START; 997 998 for (i = 0; i < size; i++) { 999 data = cpu_to_le64(ptr64[i]); 1000 1001 if (adapter->pci_mem_write(adapter, flashaddr, data)) 1002 return -EIO; 1003 1004 flashaddr += 8; 1005 } 1006 1007 size = (__force u32)nx_get_fw_size(adapter) / 8; 1008 1009 ptr64 = (u64 *)nx_get_fw_offs(adapter); 1010 flashaddr = NETXEN_IMAGE_START; 1011 1012 for (i = 0; i < size; i++) { 1013 data = cpu_to_le64(ptr64[i]); 1014 1015 if (adapter->pci_mem_write(adapter, 1016 flashaddr, data)) 1017 return -EIO; 1018 1019 flashaddr += 8; 1020 } 1021 1022 size = (__force u32)nx_get_fw_size(adapter) % 8; 1023 if (size) { 1024 data = cpu_to_le64(ptr64[i]); 1025 1026 if (adapter->pci_mem_write(adapter, 1027 flashaddr, data)) 1028 return -EIO; 1029 } 1030 1031 } else { 1032 u64 data; 1033 u32 hi, lo; 1034 1035 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 1036 flashaddr = NETXEN_BOOTLD_START; 1037 1038 for (i = 0; i < size; i++) { 1039 if (netxen_rom_fast_read(adapter, 1040 flashaddr, (int *)&lo) != 0) 1041 return -EIO; 1042 if (netxen_rom_fast_read(adapter, 1043 flashaddr + 4, (int *)&hi) != 0) 1044 return -EIO; 1045 1046 /* hi, lo are already in host endian byteorder */ 1047 data = (((u64)hi << 32) | lo); 1048 1049 if (adapter->pci_mem_write(adapter, 1050 flashaddr, data)) 1051 return -EIO; 1052 1053 flashaddr += 8; 1054 } 1055 } 1056 msleep(1); 1057 1058 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) { 1059 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020); 1060 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e); 1061 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1062 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d); 1063 else { 1064 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff); 1065 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0); 1066 } 1067 1068 return 0; 1069 } 1070 1071 static int 1072 netxen_validate_firmware(struct netxen_adapter *adapter) 1073 { 1074 __le32 val; 1075 __le32 flash_fw_ver; 1076 u32 file_fw_ver, min_ver, bios; 1077 struct pci_dev *pdev = adapter->pdev; 1078 const struct firmware *fw = adapter->fw; 1079 u8 fw_type = adapter->fw_type; 1080 u32 crbinit_fix_fw; 1081 1082 if (fw_type == NX_UNIFIED_ROMIMAGE) { 1083 if (netxen_nic_validate_unified_romimage(adapter)) 1084 return -EINVAL; 1085 } else { 1086 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]); 1087 if ((__force u32)val != NETXEN_BDINFO_MAGIC) 1088 return -EINVAL; 1089 1090 if (fw->size < NX_FW_MIN_SIZE) 1091 return -EINVAL; 1092 } 1093 1094 val = nx_get_fw_version(adapter); 1095 1096 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1097 min_ver = NETXEN_MIN_P3_FW_SUPP; 1098 else 1099 min_ver = NETXEN_VERSION_CODE(3, 4, 216); 1100 1101 file_fw_ver = NETXEN_DECODE_VERSION(val); 1102 1103 if ((_major(file_fw_ver) > _NETXEN_NIC_LINUX_MAJOR) || 1104 (file_fw_ver < min_ver)) { 1105 dev_err(&pdev->dev, 1106 "%s: firmware version %d.%d.%d unsupported\n", 1107 fw_name[fw_type], _major(file_fw_ver), _minor(file_fw_ver), 1108 _build(file_fw_ver)); 1109 return -EINVAL; 1110 } 1111 val = nx_get_bios_version(adapter); 1112 if (netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios)) 1113 return -EIO; 1114 if ((__force u32)val != bios) { 1115 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n", 1116 fw_name[fw_type]); 1117 return -EINVAL; 1118 } 1119 1120 if (netxen_rom_fast_read(adapter, 1121 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) { 1122 dev_err(&pdev->dev, "Unable to read flash fw version\n"); 1123 return -EIO; 1124 } 1125 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver); 1126 1127 /* New fw from file is not allowed, if fw on flash is < 4.0.554 */ 1128 crbinit_fix_fw = NETXEN_VERSION_CODE(4, 0, 554); 1129 if (file_fw_ver >= crbinit_fix_fw && flash_fw_ver < crbinit_fix_fw && 1130 NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 1131 dev_err(&pdev->dev, "Incompatibility detected between driver " 1132 "and firmware version on flash. This configuration " 1133 "is not recommended. Please update the firmware on " 1134 "flash immediately\n"); 1135 return -EINVAL; 1136 } 1137 1138 /* check if flashed firmware is newer only for no-mn and P2 case*/ 1139 if (!netxen_p3_has_mn(adapter) || 1140 NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1141 if (flash_fw_ver > file_fw_ver) { 1142 dev_info(&pdev->dev, "%s: firmware is older than flash\n", 1143 fw_name[fw_type]); 1144 return -EINVAL; 1145 } 1146 } 1147 1148 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC); 1149 return 0; 1150 } 1151 1152 static void 1153 nx_get_next_fwtype(struct netxen_adapter *adapter) 1154 { 1155 u8 fw_type; 1156 1157 switch (adapter->fw_type) { 1158 case NX_UNKNOWN_ROMIMAGE: 1159 fw_type = NX_UNIFIED_ROMIMAGE; 1160 break; 1161 1162 case NX_UNIFIED_ROMIMAGE: 1163 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 1164 fw_type = NX_FLASH_ROMIMAGE; 1165 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1166 fw_type = NX_P2_MN_ROMIMAGE; 1167 else if (netxen_p3_has_mn(adapter)) 1168 fw_type = NX_P3_MN_ROMIMAGE; 1169 else 1170 fw_type = NX_P3_CT_ROMIMAGE; 1171 break; 1172 1173 case NX_P3_MN_ROMIMAGE: 1174 fw_type = NX_P3_CT_ROMIMAGE; 1175 break; 1176 1177 case NX_P2_MN_ROMIMAGE: 1178 case NX_P3_CT_ROMIMAGE: 1179 default: 1180 fw_type = NX_FLASH_ROMIMAGE; 1181 break; 1182 } 1183 1184 adapter->fw_type = fw_type; 1185 } 1186 1187 static int 1188 netxen_p3_has_mn(struct netxen_adapter *adapter) 1189 { 1190 u32 capability, flashed_ver; 1191 capability = 0; 1192 1193 /* NX2031 always had MN */ 1194 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1195 return 1; 1196 1197 netxen_rom_fast_read(adapter, 1198 NX_FW_VERSION_OFFSET, (int *)&flashed_ver); 1199 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver); 1200 1201 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) { 1202 1203 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY); 1204 if (capability & NX_PEG_TUNE_MN_PRESENT) 1205 return 1; 1206 } 1207 return 0; 1208 } 1209 1210 void netxen_request_firmware(struct netxen_adapter *adapter) 1211 { 1212 struct pci_dev *pdev = adapter->pdev; 1213 int rc = 0; 1214 1215 adapter->fw_type = NX_UNKNOWN_ROMIMAGE; 1216 1217 next: 1218 nx_get_next_fwtype(adapter); 1219 1220 if (adapter->fw_type == NX_FLASH_ROMIMAGE) { 1221 adapter->fw = NULL; 1222 } else { 1223 rc = request_firmware(&adapter->fw, 1224 fw_name[adapter->fw_type], &pdev->dev); 1225 if (rc != 0) 1226 goto next; 1227 1228 rc = netxen_validate_firmware(adapter); 1229 if (rc != 0) { 1230 release_firmware(adapter->fw); 1231 msleep(1); 1232 goto next; 1233 } 1234 } 1235 } 1236 1237 1238 void 1239 netxen_release_firmware(struct netxen_adapter *adapter) 1240 { 1241 release_firmware(adapter->fw); 1242 adapter->fw = NULL; 1243 } 1244 1245 int netxen_init_dummy_dma(struct netxen_adapter *adapter) 1246 { 1247 u64 addr; 1248 u32 hi, lo; 1249 1250 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1251 return 0; 1252 1253 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev, 1254 NETXEN_HOST_DUMMY_DMA_SIZE, 1255 &adapter->dummy_dma.phys_addr); 1256 if (adapter->dummy_dma.addr == NULL) { 1257 dev_err(&adapter->pdev->dev, 1258 "ERROR: Could not allocate dummy DMA memory\n"); 1259 return -ENOMEM; 1260 } 1261 1262 addr = (uint64_t) adapter->dummy_dma.phys_addr; 1263 hi = (addr >> 32) & 0xffffffff; 1264 lo = addr & 0xffffffff; 1265 1266 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi); 1267 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo); 1268 1269 return 0; 1270 } 1271 1272 /* 1273 * NetXen DMA watchdog control: 1274 * 1275 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive 1276 * Bit 1 : disable_request => 1 req disable dma watchdog 1277 * Bit 2 : enable_request => 1 req enable dma watchdog 1278 * Bit 3-31 : unused 1279 */ 1280 void netxen_free_dummy_dma(struct netxen_adapter *adapter) 1281 { 1282 int i = 100; 1283 u32 ctrl; 1284 1285 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1286 return; 1287 1288 if (!adapter->dummy_dma.addr) 1289 return; 1290 1291 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1292 if ((ctrl & 0x1) != 0) { 1293 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2)); 1294 1295 while ((ctrl & 0x1) != 0) { 1296 1297 msleep(50); 1298 1299 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1300 1301 if (--i == 0) 1302 break; 1303 } 1304 } 1305 1306 if (i) { 1307 pci_free_consistent(adapter->pdev, 1308 NETXEN_HOST_DUMMY_DMA_SIZE, 1309 adapter->dummy_dma.addr, 1310 adapter->dummy_dma.phys_addr); 1311 adapter->dummy_dma.addr = NULL; 1312 } else 1313 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n"); 1314 } 1315 1316 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val) 1317 { 1318 u32 val = 0; 1319 int retries = 60; 1320 1321 if (pegtune_val) 1322 return 0; 1323 1324 do { 1325 val = NXRD32(adapter, CRB_CMDPEG_STATE); 1326 switch (val) { 1327 case PHAN_INITIALIZE_COMPLETE: 1328 case PHAN_INITIALIZE_ACK: 1329 return 0; 1330 case PHAN_INITIALIZE_FAILED: 1331 goto out_err; 1332 default: 1333 break; 1334 } 1335 1336 msleep(500); 1337 1338 } while (--retries); 1339 1340 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); 1341 1342 out_err: 1343 dev_warn(&adapter->pdev->dev, "firmware init failed\n"); 1344 return -EIO; 1345 } 1346 1347 static int 1348 netxen_receive_peg_ready(struct netxen_adapter *adapter) 1349 { 1350 u32 val = 0; 1351 int retries = 2000; 1352 1353 do { 1354 val = NXRD32(adapter, CRB_RCVPEG_STATE); 1355 1356 if (val == PHAN_PEG_RCV_INITIALIZED) 1357 return 0; 1358 1359 msleep(10); 1360 1361 } while (--retries); 1362 1363 pr_err("Receive Peg initialization not complete, state: 0x%x.\n", val); 1364 return -EIO; 1365 } 1366 1367 int netxen_init_firmware(struct netxen_adapter *adapter) 1368 { 1369 int err; 1370 1371 err = netxen_receive_peg_ready(adapter); 1372 if (err) 1373 return err; 1374 1375 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT); 1376 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE); 1377 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK); 1378 1379 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1380 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC); 1381 1382 return err; 1383 } 1384 1385 static void 1386 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg) 1387 { 1388 u32 cable_OUI; 1389 u16 cable_len; 1390 u16 link_speed; 1391 u8 link_status, module, duplex, autoneg; 1392 struct net_device *netdev = adapter->netdev; 1393 1394 adapter->has_link_events = 1; 1395 1396 cable_OUI = msg->body[1] & 0xffffffff; 1397 cable_len = (msg->body[1] >> 32) & 0xffff; 1398 link_speed = (msg->body[1] >> 48) & 0xffff; 1399 1400 link_status = msg->body[2] & 0xff; 1401 duplex = (msg->body[2] >> 16) & 0xff; 1402 autoneg = (msg->body[2] >> 24) & 0xff; 1403 1404 module = (msg->body[2] >> 8) & 0xff; 1405 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) { 1406 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n", 1407 netdev->name, cable_OUI, cable_len); 1408 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) { 1409 printk(KERN_INFO "%s: unsupported cable length %d\n", 1410 netdev->name, cable_len); 1411 } 1412 1413 /* update link parameters */ 1414 if (duplex == LINKEVENT_FULL_DUPLEX) 1415 adapter->link_duplex = DUPLEX_FULL; 1416 else 1417 adapter->link_duplex = DUPLEX_HALF; 1418 adapter->module_type = module; 1419 adapter->link_autoneg = autoneg; 1420 adapter->link_speed = link_speed; 1421 1422 netxen_advert_link_change(adapter, link_status); 1423 } 1424 1425 static void 1426 netxen_handle_fw_message(int desc_cnt, int index, 1427 struct nx_host_sds_ring *sds_ring) 1428 { 1429 nx_fw_msg_t msg; 1430 struct status_desc *desc; 1431 int i = 0, opcode; 1432 1433 while (desc_cnt > 0 && i < 8) { 1434 desc = &sds_ring->desc_head[index]; 1435 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]); 1436 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]); 1437 1438 index = get_next_index(index, sds_ring->num_desc); 1439 desc_cnt--; 1440 } 1441 1442 opcode = netxen_get_nic_msg_opcode(msg.body[0]); 1443 switch (opcode) { 1444 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE: 1445 netxen_handle_linkevent(sds_ring->adapter, &msg); 1446 break; 1447 default: 1448 break; 1449 } 1450 } 1451 1452 static int 1453 netxen_alloc_rx_skb(struct netxen_adapter *adapter, 1454 struct nx_host_rds_ring *rds_ring, 1455 struct netxen_rx_buffer *buffer) 1456 { 1457 struct sk_buff *skb; 1458 dma_addr_t dma; 1459 struct pci_dev *pdev = adapter->pdev; 1460 1461 buffer->skb = netdev_alloc_skb(adapter->netdev, rds_ring->skb_size); 1462 if (!buffer->skb) 1463 return 1; 1464 1465 skb = buffer->skb; 1466 1467 if (!adapter->ahw.cut_through) 1468 skb_reserve(skb, 2); 1469 1470 dma = pci_map_single(pdev, skb->data, 1471 rds_ring->dma_size, PCI_DMA_FROMDEVICE); 1472 1473 if (pci_dma_mapping_error(pdev, dma)) { 1474 dev_kfree_skb_any(skb); 1475 buffer->skb = NULL; 1476 return 1; 1477 } 1478 1479 buffer->skb = skb; 1480 buffer->dma = dma; 1481 buffer->state = NETXEN_BUFFER_BUSY; 1482 1483 return 0; 1484 } 1485 1486 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter, 1487 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum) 1488 { 1489 struct netxen_rx_buffer *buffer; 1490 struct sk_buff *skb; 1491 1492 buffer = &rds_ring->rx_buf_arr[index]; 1493 1494 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size, 1495 PCI_DMA_FROMDEVICE); 1496 1497 skb = buffer->skb; 1498 if (!skb) 1499 goto no_skb; 1500 1501 if (likely((adapter->netdev->features & NETIF_F_RXCSUM) 1502 && cksum == STATUS_CKSUM_OK)) { 1503 adapter->stats.csummed++; 1504 skb->ip_summed = CHECKSUM_UNNECESSARY; 1505 } else 1506 skb->ip_summed = CHECKSUM_NONE; 1507 1508 buffer->skb = NULL; 1509 no_skb: 1510 buffer->state = NETXEN_BUFFER_FREE; 1511 return skb; 1512 } 1513 1514 static struct netxen_rx_buffer * 1515 netxen_process_rcv(struct netxen_adapter *adapter, 1516 struct nx_host_sds_ring *sds_ring, 1517 int ring, u64 sts_data0) 1518 { 1519 struct net_device *netdev = adapter->netdev; 1520 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1521 struct netxen_rx_buffer *buffer; 1522 struct sk_buff *skb; 1523 struct nx_host_rds_ring *rds_ring; 1524 int index, length, cksum, pkt_offset; 1525 1526 if (unlikely(ring >= adapter->max_rds_rings)) 1527 return NULL; 1528 1529 rds_ring = &recv_ctx->rds_rings[ring]; 1530 1531 index = netxen_get_sts_refhandle(sts_data0); 1532 if (unlikely(index >= rds_ring->num_desc)) 1533 return NULL; 1534 1535 buffer = &rds_ring->rx_buf_arr[index]; 1536 1537 length = netxen_get_sts_totallength(sts_data0); 1538 cksum = netxen_get_sts_status(sts_data0); 1539 pkt_offset = netxen_get_sts_pkt_offset(sts_data0); 1540 1541 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum); 1542 if (!skb) 1543 return buffer; 1544 1545 if (length > rds_ring->skb_size) 1546 skb_put(skb, rds_ring->skb_size); 1547 else 1548 skb_put(skb, length); 1549 1550 1551 if (pkt_offset) 1552 skb_pull(skb, pkt_offset); 1553 1554 skb->protocol = eth_type_trans(skb, netdev); 1555 1556 napi_gro_receive(&sds_ring->napi, skb); 1557 1558 adapter->stats.rx_pkts++; 1559 adapter->stats.rxbytes += length; 1560 1561 return buffer; 1562 } 1563 1564 #define TCP_HDR_SIZE 20 1565 #define TCP_TS_OPTION_SIZE 12 1566 #define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE) 1567 1568 static struct netxen_rx_buffer * 1569 netxen_process_lro(struct netxen_adapter *adapter, 1570 struct nx_host_sds_ring *sds_ring, 1571 int ring, u64 sts_data0, u64 sts_data1) 1572 { 1573 struct net_device *netdev = adapter->netdev; 1574 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1575 struct netxen_rx_buffer *buffer; 1576 struct sk_buff *skb; 1577 struct nx_host_rds_ring *rds_ring; 1578 struct iphdr *iph; 1579 struct tcphdr *th; 1580 bool push, timestamp; 1581 int l2_hdr_offset, l4_hdr_offset; 1582 int index; 1583 u16 lro_length, length, data_offset; 1584 u32 seq_number; 1585 u8 vhdr_len = 0; 1586 1587 if (unlikely(ring >= adapter->max_rds_rings)) 1588 return NULL; 1589 1590 rds_ring = &recv_ctx->rds_rings[ring]; 1591 1592 index = netxen_get_lro_sts_refhandle(sts_data0); 1593 if (unlikely(index >= rds_ring->num_desc)) 1594 return NULL; 1595 1596 buffer = &rds_ring->rx_buf_arr[index]; 1597 1598 timestamp = netxen_get_lro_sts_timestamp(sts_data0); 1599 lro_length = netxen_get_lro_sts_length(sts_data0); 1600 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0); 1601 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0); 1602 push = netxen_get_lro_sts_push_flag(sts_data0); 1603 seq_number = netxen_get_lro_sts_seq_number(sts_data1); 1604 1605 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK); 1606 if (!skb) 1607 return buffer; 1608 1609 if (timestamp) 1610 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE; 1611 else 1612 data_offset = l4_hdr_offset + TCP_HDR_SIZE; 1613 1614 skb_put(skb, lro_length + data_offset); 1615 1616 skb_pull(skb, l2_hdr_offset); 1617 skb->protocol = eth_type_trans(skb, netdev); 1618 1619 if (skb->protocol == htons(ETH_P_8021Q)) 1620 vhdr_len = VLAN_HLEN; 1621 iph = (struct iphdr *)(skb->data + vhdr_len); 1622 th = (struct tcphdr *)((skb->data + vhdr_len) + (iph->ihl << 2)); 1623 1624 length = (iph->ihl << 2) + (th->doff << 2) + lro_length; 1625 csum_replace2(&iph->check, iph->tot_len, htons(length)); 1626 iph->tot_len = htons(length); 1627 th->psh = push; 1628 th->seq = htonl(seq_number); 1629 1630 length = skb->len; 1631 1632 if (adapter->flags & NETXEN_FW_MSS_CAP) 1633 skb_shinfo(skb)->gso_size = netxen_get_lro_sts_mss(sts_data1); 1634 1635 netif_receive_skb(skb); 1636 1637 adapter->stats.lro_pkts++; 1638 adapter->stats.rxbytes += length; 1639 1640 return buffer; 1641 } 1642 1643 #define netxen_merge_rx_buffers(list, head) \ 1644 do { list_splice_tail_init(list, head); } while (0); 1645 1646 int 1647 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max) 1648 { 1649 struct netxen_adapter *adapter = sds_ring->adapter; 1650 1651 struct list_head *cur; 1652 1653 struct status_desc *desc; 1654 struct netxen_rx_buffer *rxbuf; 1655 1656 u32 consumer = sds_ring->consumer; 1657 1658 int count = 0; 1659 u64 sts_data0, sts_data1; 1660 int opcode, ring = 0, desc_cnt; 1661 1662 while (count < max) { 1663 desc = &sds_ring->desc_head[consumer]; 1664 sts_data0 = le64_to_cpu(desc->status_desc_data[0]); 1665 1666 if (!(sts_data0 & STATUS_OWNER_HOST)) 1667 break; 1668 1669 desc_cnt = netxen_get_sts_desc_cnt(sts_data0); 1670 1671 opcode = netxen_get_sts_opcode(sts_data0); 1672 1673 switch (opcode) { 1674 case NETXEN_NIC_RXPKT_DESC: 1675 case NETXEN_OLD_RXPKT_DESC: 1676 case NETXEN_NIC_SYN_OFFLOAD: 1677 ring = netxen_get_sts_type(sts_data0); 1678 rxbuf = netxen_process_rcv(adapter, sds_ring, 1679 ring, sts_data0); 1680 break; 1681 case NETXEN_NIC_LRO_DESC: 1682 ring = netxen_get_lro_sts_type(sts_data0); 1683 sts_data1 = le64_to_cpu(desc->status_desc_data[1]); 1684 rxbuf = netxen_process_lro(adapter, sds_ring, 1685 ring, sts_data0, sts_data1); 1686 break; 1687 case NETXEN_NIC_RESPONSE_DESC: 1688 netxen_handle_fw_message(desc_cnt, consumer, sds_ring); 1689 default: 1690 goto skip; 1691 } 1692 1693 WARN_ON(desc_cnt > 1); 1694 1695 if (rxbuf) 1696 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]); 1697 1698 skip: 1699 for (; desc_cnt > 0; desc_cnt--) { 1700 desc = &sds_ring->desc_head[consumer]; 1701 desc->status_desc_data[0] = 1702 cpu_to_le64(STATUS_OWNER_PHANTOM); 1703 consumer = get_next_index(consumer, sds_ring->num_desc); 1704 } 1705 count++; 1706 } 1707 1708 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 1709 struct nx_host_rds_ring *rds_ring = 1710 &adapter->recv_ctx.rds_rings[ring]; 1711 1712 if (!list_empty(&sds_ring->free_list[ring])) { 1713 list_for_each(cur, &sds_ring->free_list[ring]) { 1714 rxbuf = list_entry(cur, 1715 struct netxen_rx_buffer, list); 1716 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf); 1717 } 1718 spin_lock(&rds_ring->lock); 1719 netxen_merge_rx_buffers(&sds_ring->free_list[ring], 1720 &rds_ring->free_list); 1721 spin_unlock(&rds_ring->lock); 1722 } 1723 1724 netxen_post_rx_buffers_nodb(adapter, rds_ring); 1725 } 1726 1727 if (count) { 1728 sds_ring->consumer = consumer; 1729 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer); 1730 } 1731 1732 return count; 1733 } 1734 1735 /* Process Command status ring */ 1736 int netxen_process_cmd_ring(struct netxen_adapter *adapter) 1737 { 1738 u32 sw_consumer, hw_consumer; 1739 int count = 0, i; 1740 struct netxen_cmd_buffer *buffer; 1741 struct pci_dev *pdev = adapter->pdev; 1742 struct net_device *netdev = adapter->netdev; 1743 struct netxen_skb_frag *frag; 1744 int done = 0; 1745 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 1746 1747 if (!spin_trylock_bh(&adapter->tx_clean_lock)) 1748 return 1; 1749 1750 sw_consumer = tx_ring->sw_consumer; 1751 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1752 1753 while (sw_consumer != hw_consumer) { 1754 buffer = &tx_ring->cmd_buf_arr[sw_consumer]; 1755 if (buffer->skb) { 1756 frag = &buffer->frag_array[0]; 1757 pci_unmap_single(pdev, frag->dma, frag->length, 1758 PCI_DMA_TODEVICE); 1759 frag->dma = 0ULL; 1760 for (i = 1; i < buffer->frag_count; i++) { 1761 frag++; /* Get the next frag */ 1762 pci_unmap_page(pdev, frag->dma, frag->length, 1763 PCI_DMA_TODEVICE); 1764 frag->dma = 0ULL; 1765 } 1766 1767 adapter->stats.xmitfinished++; 1768 dev_kfree_skb_any(buffer->skb); 1769 buffer->skb = NULL; 1770 } 1771 1772 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc); 1773 if (++count >= MAX_STATUS_HANDLE) 1774 break; 1775 } 1776 1777 tx_ring->sw_consumer = sw_consumer; 1778 1779 if (count && netif_running(netdev)) { 1780 smp_mb(); 1781 1782 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) 1783 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH) 1784 netif_wake_queue(netdev); 1785 adapter->tx_timeo_cnt = 0; 1786 } 1787 /* 1788 * If everything is freed up to consumer then check if the ring is full 1789 * If the ring is full then check if more needs to be freed and 1790 * schedule the call back again. 1791 * 1792 * This happens when there are 2 CPUs. One could be freeing and the 1793 * other filling it. If the ring is full when we get out of here and 1794 * the card has already interrupted the host then the host can miss the 1795 * interrupt. 1796 * 1797 * There is still a possible race condition and the host could miss an 1798 * interrupt. The card has to take care of this. 1799 */ 1800 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1801 done = (sw_consumer == hw_consumer); 1802 spin_unlock_bh(&adapter->tx_clean_lock); 1803 1804 return done; 1805 } 1806 1807 void 1808 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid, 1809 struct nx_host_rds_ring *rds_ring) 1810 { 1811 struct rcv_desc *pdesc; 1812 struct netxen_rx_buffer *buffer; 1813 int producer, count = 0; 1814 netxen_ctx_msg msg = 0; 1815 struct list_head *head; 1816 1817 producer = rds_ring->producer; 1818 1819 head = &rds_ring->free_list; 1820 while (!list_empty(head)) { 1821 1822 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1823 1824 if (!buffer->skb) { 1825 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1826 break; 1827 } 1828 1829 count++; 1830 list_del(&buffer->list); 1831 1832 /* make a rcv descriptor */ 1833 pdesc = &rds_ring->desc_head[producer]; 1834 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1835 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1836 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1837 1838 producer = get_next_index(producer, rds_ring->num_desc); 1839 } 1840 1841 if (count) { 1842 rds_ring->producer = producer; 1843 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1844 (producer-1) & (rds_ring->num_desc-1)); 1845 1846 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1847 /* 1848 * Write a doorbell msg to tell phanmon of change in 1849 * receive ring producer 1850 * Only for firmware version < 4.0.0 1851 */ 1852 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID); 1853 netxen_set_msg_privid(msg); 1854 netxen_set_msg_count(msg, 1855 ((producer - 1) & 1856 (rds_ring->num_desc - 1))); 1857 netxen_set_msg_ctxid(msg, adapter->portnum); 1858 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid)); 1859 NXWRIO(adapter, DB_NORMALIZE(adapter, 1860 NETXEN_RCV_PRODUCER_OFFSET), msg); 1861 } 1862 } 1863 } 1864 1865 static void 1866 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 1867 struct nx_host_rds_ring *rds_ring) 1868 { 1869 struct rcv_desc *pdesc; 1870 struct netxen_rx_buffer *buffer; 1871 int producer, count = 0; 1872 struct list_head *head; 1873 1874 if (!spin_trylock(&rds_ring->lock)) 1875 return; 1876 1877 producer = rds_ring->producer; 1878 1879 head = &rds_ring->free_list; 1880 while (!list_empty(head)) { 1881 1882 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1883 1884 if (!buffer->skb) { 1885 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1886 break; 1887 } 1888 1889 count++; 1890 list_del(&buffer->list); 1891 1892 /* make a rcv descriptor */ 1893 pdesc = &rds_ring->desc_head[producer]; 1894 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1895 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1896 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1897 1898 producer = get_next_index(producer, rds_ring->num_desc); 1899 } 1900 1901 if (count) { 1902 rds_ring->producer = producer; 1903 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1904 (producer - 1) & (rds_ring->num_desc - 1)); 1905 } 1906 spin_unlock(&rds_ring->lock); 1907 } 1908 1909 void netxen_nic_clear_stats(struct netxen_adapter *adapter) 1910 { 1911 memset(&adapter->stats, 0, sizeof(adapter->stats)); 1912 } 1913 1914