1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3 
4 #include <linux/printk.h>
5 #include <linux/dynamic_debug.h>
6 #include <linux/module.h>
7 #include <linux/netdevice.h>
8 #include <linux/utsname.h>
9 
10 #include "ionic.h"
11 #include "ionic_bus.h"
12 #include "ionic_lif.h"
13 #include "ionic_debugfs.h"
14 
15 MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION);
16 MODULE_AUTHOR("Pensando Systems, Inc");
17 MODULE_LICENSE("GPL");
18 MODULE_VERSION(IONIC_DRV_VERSION);
19 
20 static const char *ionic_error_to_str(enum ionic_status_code code)
21 {
22 	switch (code) {
23 	case IONIC_RC_SUCCESS:
24 		return "IONIC_RC_SUCCESS";
25 	case IONIC_RC_EVERSION:
26 		return "IONIC_RC_EVERSION";
27 	case IONIC_RC_EOPCODE:
28 		return "IONIC_RC_EOPCODE";
29 	case IONIC_RC_EIO:
30 		return "IONIC_RC_EIO";
31 	case IONIC_RC_EPERM:
32 		return "IONIC_RC_EPERM";
33 	case IONIC_RC_EQID:
34 		return "IONIC_RC_EQID";
35 	case IONIC_RC_EQTYPE:
36 		return "IONIC_RC_EQTYPE";
37 	case IONIC_RC_ENOENT:
38 		return "IONIC_RC_ENOENT";
39 	case IONIC_RC_EINTR:
40 		return "IONIC_RC_EINTR";
41 	case IONIC_RC_EAGAIN:
42 		return "IONIC_RC_EAGAIN";
43 	case IONIC_RC_ENOMEM:
44 		return "IONIC_RC_ENOMEM";
45 	case IONIC_RC_EFAULT:
46 		return "IONIC_RC_EFAULT";
47 	case IONIC_RC_EBUSY:
48 		return "IONIC_RC_EBUSY";
49 	case IONIC_RC_EEXIST:
50 		return "IONIC_RC_EEXIST";
51 	case IONIC_RC_EINVAL:
52 		return "IONIC_RC_EINVAL";
53 	case IONIC_RC_ENOSPC:
54 		return "IONIC_RC_ENOSPC";
55 	case IONIC_RC_ERANGE:
56 		return "IONIC_RC_ERANGE";
57 	case IONIC_RC_BAD_ADDR:
58 		return "IONIC_RC_BAD_ADDR";
59 	case IONIC_RC_DEV_CMD:
60 		return "IONIC_RC_DEV_CMD";
61 	case IONIC_RC_ERROR:
62 		return "IONIC_RC_ERROR";
63 	case IONIC_RC_ERDMA:
64 		return "IONIC_RC_ERDMA";
65 	default:
66 		return "IONIC_RC_UNKNOWN";
67 	}
68 }
69 
70 static int ionic_error_to_errno(enum ionic_status_code code)
71 {
72 	switch (code) {
73 	case IONIC_RC_SUCCESS:
74 		return 0;
75 	case IONIC_RC_EVERSION:
76 	case IONIC_RC_EQTYPE:
77 	case IONIC_RC_EQID:
78 	case IONIC_RC_EINVAL:
79 		return -EINVAL;
80 	case IONIC_RC_EPERM:
81 		return -EPERM;
82 	case IONIC_RC_ENOENT:
83 		return -ENOENT;
84 	case IONIC_RC_EAGAIN:
85 		return -EAGAIN;
86 	case IONIC_RC_ENOMEM:
87 		return -ENOMEM;
88 	case IONIC_RC_EFAULT:
89 		return -EFAULT;
90 	case IONIC_RC_EBUSY:
91 		return -EBUSY;
92 	case IONIC_RC_EEXIST:
93 		return -EEXIST;
94 	case IONIC_RC_ENOSPC:
95 		return -ENOSPC;
96 	case IONIC_RC_ERANGE:
97 		return -ERANGE;
98 	case IONIC_RC_BAD_ADDR:
99 		return -EFAULT;
100 	case IONIC_RC_EOPCODE:
101 	case IONIC_RC_EINTR:
102 	case IONIC_RC_DEV_CMD:
103 	case IONIC_RC_ERROR:
104 	case IONIC_RC_ERDMA:
105 	case IONIC_RC_EIO:
106 	default:
107 		return -EIO;
108 	}
109 }
110 
111 static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
112 {
113 	switch (opcode) {
114 	case IONIC_CMD_NOP:
115 		return "IONIC_CMD_NOP";
116 	case IONIC_CMD_INIT:
117 		return "IONIC_CMD_INIT";
118 	case IONIC_CMD_RESET:
119 		return "IONIC_CMD_RESET";
120 	case IONIC_CMD_IDENTIFY:
121 		return "IONIC_CMD_IDENTIFY";
122 	case IONIC_CMD_GETATTR:
123 		return "IONIC_CMD_GETATTR";
124 	case IONIC_CMD_SETATTR:
125 		return "IONIC_CMD_SETATTR";
126 	case IONIC_CMD_PORT_IDENTIFY:
127 		return "IONIC_CMD_PORT_IDENTIFY";
128 	case IONIC_CMD_PORT_INIT:
129 		return "IONIC_CMD_PORT_INIT";
130 	case IONIC_CMD_PORT_RESET:
131 		return "IONIC_CMD_PORT_RESET";
132 	case IONIC_CMD_PORT_GETATTR:
133 		return "IONIC_CMD_PORT_GETATTR";
134 	case IONIC_CMD_PORT_SETATTR:
135 		return "IONIC_CMD_PORT_SETATTR";
136 	case IONIC_CMD_LIF_INIT:
137 		return "IONIC_CMD_LIF_INIT";
138 	case IONIC_CMD_LIF_RESET:
139 		return "IONIC_CMD_LIF_RESET";
140 	case IONIC_CMD_LIF_IDENTIFY:
141 		return "IONIC_CMD_LIF_IDENTIFY";
142 	case IONIC_CMD_LIF_SETATTR:
143 		return "IONIC_CMD_LIF_SETATTR";
144 	case IONIC_CMD_LIF_GETATTR:
145 		return "IONIC_CMD_LIF_GETATTR";
146 	case IONIC_CMD_RX_MODE_SET:
147 		return "IONIC_CMD_RX_MODE_SET";
148 	case IONIC_CMD_RX_FILTER_ADD:
149 		return "IONIC_CMD_RX_FILTER_ADD";
150 	case IONIC_CMD_RX_FILTER_DEL:
151 		return "IONIC_CMD_RX_FILTER_DEL";
152 	case IONIC_CMD_Q_INIT:
153 		return "IONIC_CMD_Q_INIT";
154 	case IONIC_CMD_Q_CONTROL:
155 		return "IONIC_CMD_Q_CONTROL";
156 	case IONIC_CMD_RDMA_RESET_LIF:
157 		return "IONIC_CMD_RDMA_RESET_LIF";
158 	case IONIC_CMD_RDMA_CREATE_EQ:
159 		return "IONIC_CMD_RDMA_CREATE_EQ";
160 	case IONIC_CMD_RDMA_CREATE_CQ:
161 		return "IONIC_CMD_RDMA_CREATE_CQ";
162 	case IONIC_CMD_RDMA_CREATE_ADMINQ:
163 		return "IONIC_CMD_RDMA_CREATE_ADMINQ";
164 	case IONIC_CMD_FW_DOWNLOAD:
165 		return "IONIC_CMD_FW_DOWNLOAD";
166 	case IONIC_CMD_FW_CONTROL:
167 		return "IONIC_CMD_FW_CONTROL";
168 	default:
169 		return "DEVCMD_UNKNOWN";
170 	}
171 }
172 
173 static void ionic_adminq_flush(struct ionic_lif *lif)
174 {
175 	struct ionic_queue *adminq = &lif->adminqcq->q;
176 
177 	spin_lock(&lif->adminq_lock);
178 
179 	while (adminq->tail != adminq->head) {
180 		memset(adminq->tail->desc, 0, sizeof(union ionic_adminq_cmd));
181 		adminq->tail->cb = NULL;
182 		adminq->tail->cb_arg = NULL;
183 		adminq->tail = adminq->tail->next;
184 	}
185 	spin_unlock(&lif->adminq_lock);
186 }
187 
188 static int ionic_adminq_check_err(struct ionic_lif *lif,
189 				  struct ionic_admin_ctx *ctx,
190 				  bool timeout)
191 {
192 	struct net_device *netdev = lif->netdev;
193 	const char *opcode_str;
194 	const char *status_str;
195 	int err = 0;
196 
197 	if (ctx->comp.comp.status || timeout) {
198 		opcode_str = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
199 		status_str = ionic_error_to_str(ctx->comp.comp.status);
200 		err = timeout ? -ETIMEDOUT :
201 				ionic_error_to_errno(ctx->comp.comp.status);
202 
203 		netdev_err(netdev, "%s (%d) failed: %s (%d)\n",
204 			   opcode_str, ctx->cmd.cmd.opcode,
205 			   timeout ? "TIMEOUT" : status_str, err);
206 
207 		if (timeout)
208 			ionic_adminq_flush(lif);
209 	}
210 
211 	return err;
212 }
213 
214 static void ionic_adminq_cb(struct ionic_queue *q,
215 			    struct ionic_desc_info *desc_info,
216 			    struct ionic_cq_info *cq_info, void *cb_arg)
217 {
218 	struct ionic_admin_ctx *ctx = cb_arg;
219 	struct ionic_admin_comp *comp;
220 	struct device *dev;
221 
222 	if (!ctx)
223 		return;
224 
225 	comp = cq_info->cq_desc;
226 	dev = &q->lif->netdev->dev;
227 
228 	memcpy(&ctx->comp, comp, sizeof(*comp));
229 
230 	dev_dbg(dev, "comp admin queue command:\n");
231 	dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1,
232 			 &ctx->comp, sizeof(ctx->comp), true);
233 
234 	complete_all(&ctx->work);
235 }
236 
237 static int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
238 {
239 	struct ionic_queue *adminq = &lif->adminqcq->q;
240 	int err = 0;
241 
242 	WARN_ON(in_interrupt());
243 
244 	spin_lock(&lif->adminq_lock);
245 	if (!ionic_q_has_space(adminq, 1)) {
246 		err = -ENOSPC;
247 		goto err_out;
248 	}
249 
250 	memcpy(adminq->head->desc, &ctx->cmd, sizeof(ctx->cmd));
251 
252 	dev_dbg(&lif->netdev->dev, "post admin queue command:\n");
253 	dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1,
254 			 &ctx->cmd, sizeof(ctx->cmd), true);
255 
256 	ionic_q_post(adminq, true, ionic_adminq_cb, ctx);
257 
258 err_out:
259 	spin_unlock(&lif->adminq_lock);
260 
261 	return err;
262 }
263 
264 int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
265 {
266 	struct net_device *netdev = lif->netdev;
267 	unsigned long remaining;
268 	const char *name;
269 	int err;
270 
271 	err = ionic_adminq_post(lif, ctx);
272 	if (err) {
273 		name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
274 		netdev_err(netdev, "Posting of %s (%d) failed: %d\n",
275 			   name, ctx->cmd.cmd.opcode, err);
276 		return err;
277 	}
278 
279 	remaining = wait_for_completion_timeout(&ctx->work,
280 						HZ * (ulong)DEVCMD_TIMEOUT);
281 	return ionic_adminq_check_err(lif, ctx, (remaining == 0));
282 }
283 
284 int ionic_napi(struct napi_struct *napi, int budget, ionic_cq_cb cb,
285 	       ionic_cq_done_cb done_cb, void *done_arg)
286 {
287 	struct ionic_qcq *qcq = napi_to_qcq(napi);
288 	struct ionic_cq *cq = &qcq->cq;
289 	u32 work_done, flags = 0;
290 
291 	work_done = ionic_cq_service(cq, budget, cb, done_cb, done_arg);
292 
293 	if (work_done < budget && napi_complete_done(napi, work_done)) {
294 		flags |= IONIC_INTR_CRED_UNMASK;
295 		DEBUG_STATS_INTR_REARM(cq->bound_intr);
296 	}
297 
298 	if (work_done || flags) {
299 		flags |= IONIC_INTR_CRED_RESET_COALESCE;
300 		ionic_intr_credits(cq->lif->ionic->idev.intr_ctrl,
301 				   cq->bound_intr->index,
302 				   work_done, flags);
303 	}
304 
305 	DEBUG_STATS_NAPI_POLL(qcq, work_done);
306 
307 	return work_done;
308 }
309 
310 int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds)
311 {
312 	struct ionic_dev *idev = &ionic->idev;
313 	unsigned long start_time;
314 	unsigned long max_wait;
315 	unsigned long duration;
316 	int opcode;
317 	int done;
318 	int err;
319 
320 	WARN_ON(in_interrupt());
321 
322 	/* Wait for dev cmd to complete, retrying if we get EAGAIN,
323 	 * but don't wait any longer than max_seconds.
324 	 */
325 	max_wait = jiffies + (max_seconds * HZ);
326 try_again:
327 	start_time = jiffies;
328 	do {
329 		done = ionic_dev_cmd_done(idev);
330 		if (done)
331 			break;
332 		msleep(20);
333 	} while (!done && time_before(jiffies, max_wait));
334 	duration = jiffies - start_time;
335 
336 	opcode = idev->dev_cmd_regs->cmd.cmd.opcode;
337 	dev_dbg(ionic->dev, "DEVCMD %s (%d) done=%d took %ld secs (%ld jiffies)\n",
338 		ionic_opcode_to_str(opcode), opcode,
339 		done, duration / HZ, duration);
340 
341 	if (!done && !time_before(jiffies, max_wait)) {
342 		dev_warn(ionic->dev, "DEVCMD %s (%d) timeout after %ld secs\n",
343 			 ionic_opcode_to_str(opcode), opcode, max_seconds);
344 		return -ETIMEDOUT;
345 	}
346 
347 	err = ionic_dev_cmd_status(&ionic->idev);
348 	if (err) {
349 		if (err == IONIC_RC_EAGAIN && !time_after(jiffies, max_wait)) {
350 			dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) retrying...\n",
351 				ionic_opcode_to_str(opcode), opcode,
352 				ionic_error_to_str(err), err);
353 
354 			msleep(1000);
355 			iowrite32(0, &idev->dev_cmd_regs->done);
356 			iowrite32(1, &idev->dev_cmd_regs->doorbell);
357 			goto try_again;
358 		}
359 
360 		dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) failed\n",
361 			ionic_opcode_to_str(opcode), opcode,
362 			ionic_error_to_str(err), err);
363 
364 		return ionic_error_to_errno(err);
365 	}
366 
367 	return 0;
368 }
369 
370 int ionic_setup(struct ionic *ionic)
371 {
372 	int err;
373 
374 	err = ionic_dev_setup(ionic);
375 	if (err)
376 		return err;
377 
378 	return 0;
379 }
380 
381 int ionic_identify(struct ionic *ionic)
382 {
383 	struct ionic_identity *ident = &ionic->ident;
384 	struct ionic_dev *idev = &ionic->idev;
385 	size_t sz;
386 	int err;
387 
388 	memset(ident, 0, sizeof(*ident));
389 
390 	ident->drv.os_type = cpu_to_le32(IONIC_OS_TYPE_LINUX);
391 	strncpy(ident->drv.driver_ver_str, IONIC_DRV_VERSION,
392 		sizeof(ident->drv.driver_ver_str) - 1);
393 
394 	mutex_lock(&ionic->dev_cmd_lock);
395 
396 	sz = min(sizeof(ident->drv), sizeof(idev->dev_cmd_regs->data));
397 	memcpy_toio(&idev->dev_cmd_regs->data, &ident->drv, sz);
398 
399 	ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1);
400 	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
401 	if (!err) {
402 		sz = min(sizeof(ident->dev), sizeof(idev->dev_cmd_regs->data));
403 		memcpy_fromio(&ident->dev, &idev->dev_cmd_regs->data, sz);
404 	}
405 
406 	mutex_unlock(&ionic->dev_cmd_lock);
407 
408 	if (err)
409 		goto err_out_unmap;
410 
411 	ionic_debugfs_add_ident(ionic);
412 
413 	return 0;
414 
415 err_out_unmap:
416 	return err;
417 }
418 
419 int ionic_init(struct ionic *ionic)
420 {
421 	struct ionic_dev *idev = &ionic->idev;
422 	int err;
423 
424 	mutex_lock(&ionic->dev_cmd_lock);
425 	ionic_dev_cmd_init(idev);
426 	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
427 	mutex_unlock(&ionic->dev_cmd_lock);
428 
429 	return err;
430 }
431 
432 int ionic_reset(struct ionic *ionic)
433 {
434 	struct ionic_dev *idev = &ionic->idev;
435 	int err;
436 
437 	mutex_lock(&ionic->dev_cmd_lock);
438 	ionic_dev_cmd_reset(idev);
439 	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
440 	mutex_unlock(&ionic->dev_cmd_lock);
441 
442 	return err;
443 }
444 
445 int ionic_port_identify(struct ionic *ionic)
446 {
447 	struct ionic_identity *ident = &ionic->ident;
448 	struct ionic_dev *idev = &ionic->idev;
449 	size_t sz;
450 	int err;
451 
452 	mutex_lock(&ionic->dev_cmd_lock);
453 
454 	ionic_dev_cmd_port_identify(idev);
455 	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
456 	if (!err) {
457 		sz = min(sizeof(ident->port), sizeof(idev->dev_cmd_regs->data));
458 		memcpy_fromio(&ident->port, &idev->dev_cmd_regs->data, sz);
459 	}
460 
461 	mutex_unlock(&ionic->dev_cmd_lock);
462 
463 	return err;
464 }
465 
466 int ionic_port_init(struct ionic *ionic)
467 {
468 	struct ionic_identity *ident = &ionic->ident;
469 	struct ionic_dev *idev = &ionic->idev;
470 	size_t sz;
471 	int err;
472 
473 	if (idev->port_info)
474 		return 0;
475 
476 	idev->port_info_sz = ALIGN(sizeof(*idev->port_info), PAGE_SIZE);
477 	idev->port_info = dma_alloc_coherent(ionic->dev, idev->port_info_sz,
478 					     &idev->port_info_pa,
479 					     GFP_KERNEL);
480 	if (!idev->port_info) {
481 		dev_err(ionic->dev, "Failed to allocate port info, aborting\n");
482 		return -ENOMEM;
483 	}
484 
485 	sz = min(sizeof(ident->port.config), sizeof(idev->dev_cmd_regs->data));
486 
487 	mutex_lock(&ionic->dev_cmd_lock);
488 
489 	memcpy_toio(&idev->dev_cmd_regs->data, &ident->port.config, sz);
490 	ionic_dev_cmd_port_init(idev);
491 	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
492 
493 	ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
494 	(void)ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
495 
496 	mutex_unlock(&ionic->dev_cmd_lock);
497 	if (err) {
498 		dev_err(ionic->dev, "Failed to init port\n");
499 		dma_free_coherent(ionic->dev, idev->port_info_sz,
500 				  idev->port_info, idev->port_info_pa);
501 		idev->port_info = NULL;
502 		idev->port_info_pa = 0;
503 	}
504 
505 	return err;
506 }
507 
508 int ionic_port_reset(struct ionic *ionic)
509 {
510 	struct ionic_dev *idev = &ionic->idev;
511 	int err;
512 
513 	if (!idev->port_info)
514 		return 0;
515 
516 	mutex_lock(&ionic->dev_cmd_lock);
517 	ionic_dev_cmd_port_reset(idev);
518 	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
519 	mutex_unlock(&ionic->dev_cmd_lock);
520 
521 	dma_free_coherent(ionic->dev, idev->port_info_sz,
522 			  idev->port_info, idev->port_info_pa);
523 
524 	idev->port_info = NULL;
525 	idev->port_info_pa = 0;
526 
527 	if (err)
528 		dev_err(ionic->dev, "Failed to reset port\n");
529 
530 	return err;
531 }
532 
533 static int __init ionic_init_module(void)
534 {
535 	pr_info("%s %s, ver %s\n",
536 		IONIC_DRV_NAME, IONIC_DRV_DESCRIPTION, IONIC_DRV_VERSION);
537 	ionic_debugfs_create();
538 	return ionic_bus_register_driver();
539 }
540 
541 static void __exit ionic_cleanup_module(void)
542 {
543 	ionic_bus_unregister_driver();
544 	ionic_debugfs_destroy();
545 
546 	pr_info("%s removed\n", IONIC_DRV_NAME);
547 }
548 
549 module_init(ionic_init_module);
550 module_exit(ionic_cleanup_module);
551