1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #include <linux/printk.h> 5 #include <linux/dynamic_debug.h> 6 #include <linux/module.h> 7 #include <linux/netdevice.h> 8 #include <linux/utsname.h> 9 #include <generated/utsrelease.h> 10 11 #include "ionic.h" 12 #include "ionic_bus.h" 13 #include "ionic_lif.h" 14 #include "ionic_debugfs.h" 15 16 MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION); 17 MODULE_AUTHOR("Pensando Systems, Inc"); 18 MODULE_LICENSE("GPL"); 19 20 static const char *ionic_error_to_str(enum ionic_status_code code) 21 { 22 switch (code) { 23 case IONIC_RC_SUCCESS: 24 return "IONIC_RC_SUCCESS"; 25 case IONIC_RC_EVERSION: 26 return "IONIC_RC_EVERSION"; 27 case IONIC_RC_EOPCODE: 28 return "IONIC_RC_EOPCODE"; 29 case IONIC_RC_EIO: 30 return "IONIC_RC_EIO"; 31 case IONIC_RC_EPERM: 32 return "IONIC_RC_EPERM"; 33 case IONIC_RC_EQID: 34 return "IONIC_RC_EQID"; 35 case IONIC_RC_EQTYPE: 36 return "IONIC_RC_EQTYPE"; 37 case IONIC_RC_ENOENT: 38 return "IONIC_RC_ENOENT"; 39 case IONIC_RC_EINTR: 40 return "IONIC_RC_EINTR"; 41 case IONIC_RC_EAGAIN: 42 return "IONIC_RC_EAGAIN"; 43 case IONIC_RC_ENOMEM: 44 return "IONIC_RC_ENOMEM"; 45 case IONIC_RC_EFAULT: 46 return "IONIC_RC_EFAULT"; 47 case IONIC_RC_EBUSY: 48 return "IONIC_RC_EBUSY"; 49 case IONIC_RC_EEXIST: 50 return "IONIC_RC_EEXIST"; 51 case IONIC_RC_EINVAL: 52 return "IONIC_RC_EINVAL"; 53 case IONIC_RC_ENOSPC: 54 return "IONIC_RC_ENOSPC"; 55 case IONIC_RC_ERANGE: 56 return "IONIC_RC_ERANGE"; 57 case IONIC_RC_BAD_ADDR: 58 return "IONIC_RC_BAD_ADDR"; 59 case IONIC_RC_DEV_CMD: 60 return "IONIC_RC_DEV_CMD"; 61 case IONIC_RC_ENOSUPP: 62 return "IONIC_RC_ENOSUPP"; 63 case IONIC_RC_ERROR: 64 return "IONIC_RC_ERROR"; 65 case IONIC_RC_ERDMA: 66 return "IONIC_RC_ERDMA"; 67 case IONIC_RC_EBAD_FW: 68 return "IONIC_RC_EBAD_FW"; 69 default: 70 return "IONIC_RC_UNKNOWN"; 71 } 72 } 73 74 static int ionic_error_to_errno(enum ionic_status_code code) 75 { 76 switch (code) { 77 case IONIC_RC_SUCCESS: 78 return 0; 79 case IONIC_RC_EVERSION: 80 case IONIC_RC_EQTYPE: 81 case IONIC_RC_EQID: 82 case IONIC_RC_EINVAL: 83 case IONIC_RC_ENOSUPP: 84 return -EINVAL; 85 case IONIC_RC_EPERM: 86 return -EPERM; 87 case IONIC_RC_ENOENT: 88 return -ENOENT; 89 case IONIC_RC_EAGAIN: 90 return -EAGAIN; 91 case IONIC_RC_ENOMEM: 92 return -ENOMEM; 93 case IONIC_RC_EFAULT: 94 return -EFAULT; 95 case IONIC_RC_EBUSY: 96 return -EBUSY; 97 case IONIC_RC_EEXIST: 98 return -EEXIST; 99 case IONIC_RC_ENOSPC: 100 return -ENOSPC; 101 case IONIC_RC_ERANGE: 102 return -ERANGE; 103 case IONIC_RC_BAD_ADDR: 104 return -EFAULT; 105 case IONIC_RC_EOPCODE: 106 case IONIC_RC_EINTR: 107 case IONIC_RC_DEV_CMD: 108 case IONIC_RC_ERROR: 109 case IONIC_RC_ERDMA: 110 case IONIC_RC_EIO: 111 default: 112 return -EIO; 113 } 114 } 115 116 static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode) 117 { 118 switch (opcode) { 119 case IONIC_CMD_NOP: 120 return "IONIC_CMD_NOP"; 121 case IONIC_CMD_INIT: 122 return "IONIC_CMD_INIT"; 123 case IONIC_CMD_RESET: 124 return "IONIC_CMD_RESET"; 125 case IONIC_CMD_IDENTIFY: 126 return "IONIC_CMD_IDENTIFY"; 127 case IONIC_CMD_GETATTR: 128 return "IONIC_CMD_GETATTR"; 129 case IONIC_CMD_SETATTR: 130 return "IONIC_CMD_SETATTR"; 131 case IONIC_CMD_PORT_IDENTIFY: 132 return "IONIC_CMD_PORT_IDENTIFY"; 133 case IONIC_CMD_PORT_INIT: 134 return "IONIC_CMD_PORT_INIT"; 135 case IONIC_CMD_PORT_RESET: 136 return "IONIC_CMD_PORT_RESET"; 137 case IONIC_CMD_PORT_GETATTR: 138 return "IONIC_CMD_PORT_GETATTR"; 139 case IONIC_CMD_PORT_SETATTR: 140 return "IONIC_CMD_PORT_SETATTR"; 141 case IONIC_CMD_LIF_INIT: 142 return "IONIC_CMD_LIF_INIT"; 143 case IONIC_CMD_LIF_RESET: 144 return "IONIC_CMD_LIF_RESET"; 145 case IONIC_CMD_LIF_IDENTIFY: 146 return "IONIC_CMD_LIF_IDENTIFY"; 147 case IONIC_CMD_LIF_SETATTR: 148 return "IONIC_CMD_LIF_SETATTR"; 149 case IONIC_CMD_LIF_GETATTR: 150 return "IONIC_CMD_LIF_GETATTR"; 151 case IONIC_CMD_LIF_SETPHC: 152 return "IONIC_CMD_LIF_SETPHC"; 153 case IONIC_CMD_RX_MODE_SET: 154 return "IONIC_CMD_RX_MODE_SET"; 155 case IONIC_CMD_RX_FILTER_ADD: 156 return "IONIC_CMD_RX_FILTER_ADD"; 157 case IONIC_CMD_RX_FILTER_DEL: 158 return "IONIC_CMD_RX_FILTER_DEL"; 159 case IONIC_CMD_Q_IDENTIFY: 160 return "IONIC_CMD_Q_IDENTIFY"; 161 case IONIC_CMD_Q_INIT: 162 return "IONIC_CMD_Q_INIT"; 163 case IONIC_CMD_Q_CONTROL: 164 return "IONIC_CMD_Q_CONTROL"; 165 case IONIC_CMD_RDMA_RESET_LIF: 166 return "IONIC_CMD_RDMA_RESET_LIF"; 167 case IONIC_CMD_RDMA_CREATE_EQ: 168 return "IONIC_CMD_RDMA_CREATE_EQ"; 169 case IONIC_CMD_RDMA_CREATE_CQ: 170 return "IONIC_CMD_RDMA_CREATE_CQ"; 171 case IONIC_CMD_RDMA_CREATE_ADMINQ: 172 return "IONIC_CMD_RDMA_CREATE_ADMINQ"; 173 case IONIC_CMD_FW_DOWNLOAD: 174 return "IONIC_CMD_FW_DOWNLOAD"; 175 case IONIC_CMD_FW_CONTROL: 176 return "IONIC_CMD_FW_CONTROL"; 177 case IONIC_CMD_FW_DOWNLOAD_V1: 178 return "IONIC_CMD_FW_DOWNLOAD_V1"; 179 case IONIC_CMD_FW_CONTROL_V1: 180 return "IONIC_CMD_FW_CONTROL_V1"; 181 case IONIC_CMD_VF_GETATTR: 182 return "IONIC_CMD_VF_GETATTR"; 183 case IONIC_CMD_VF_SETATTR: 184 return "IONIC_CMD_VF_SETATTR"; 185 default: 186 return "DEVCMD_UNKNOWN"; 187 } 188 } 189 190 static void ionic_adminq_flush(struct ionic_lif *lif) 191 { 192 struct ionic_desc_info *desc_info; 193 unsigned long irqflags; 194 struct ionic_queue *q; 195 196 spin_lock_irqsave(&lif->adminq_lock, irqflags); 197 if (!lif->adminqcq) { 198 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 199 return; 200 } 201 202 q = &lif->adminqcq->q; 203 204 while (q->tail_idx != q->head_idx) { 205 desc_info = &q->info[q->tail_idx]; 206 memset(desc_info->desc, 0, sizeof(union ionic_adminq_cmd)); 207 desc_info->cb = NULL; 208 desc_info->cb_arg = NULL; 209 q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1); 210 } 211 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 212 } 213 214 static int ionic_adminq_check_err(struct ionic_lif *lif, 215 struct ionic_admin_ctx *ctx, 216 bool timeout) 217 { 218 struct net_device *netdev = lif->netdev; 219 const char *opcode_str; 220 const char *status_str; 221 int err = 0; 222 223 if (ctx->comp.comp.status || timeout) { 224 opcode_str = ionic_opcode_to_str(ctx->cmd.cmd.opcode); 225 status_str = ionic_error_to_str(ctx->comp.comp.status); 226 err = timeout ? -ETIMEDOUT : 227 ionic_error_to_errno(ctx->comp.comp.status); 228 229 netdev_err(netdev, "%s (%d) failed: %s (%d)\n", 230 opcode_str, ctx->cmd.cmd.opcode, 231 timeout ? "TIMEOUT" : status_str, err); 232 233 if (timeout) 234 ionic_adminq_flush(lif); 235 } 236 237 return err; 238 } 239 240 static void ionic_adminq_cb(struct ionic_queue *q, 241 struct ionic_desc_info *desc_info, 242 struct ionic_cq_info *cq_info, void *cb_arg) 243 { 244 struct ionic_admin_ctx *ctx = cb_arg; 245 struct ionic_admin_comp *comp; 246 247 if (!ctx) 248 return; 249 250 comp = cq_info->cq_desc; 251 252 memcpy(&ctx->comp, comp, sizeof(*comp)); 253 254 dev_dbg(q->dev, "comp admin queue command:\n"); 255 dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1, 256 &ctx->comp, sizeof(ctx->comp), true); 257 258 complete_all(&ctx->work); 259 } 260 261 int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 262 { 263 struct ionic_desc_info *desc_info; 264 unsigned long irqflags; 265 struct ionic_queue *q; 266 int err = 0; 267 268 spin_lock_irqsave(&lif->adminq_lock, irqflags); 269 if (!lif->adminqcq) { 270 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 271 return -EIO; 272 } 273 274 q = &lif->adminqcq->q; 275 276 if (!ionic_q_has_space(q, 1)) { 277 err = -ENOSPC; 278 goto err_out; 279 } 280 281 err = ionic_heartbeat_check(lif->ionic); 282 if (err) 283 goto err_out; 284 285 desc_info = &q->info[q->head_idx]; 286 memcpy(desc_info->desc, &ctx->cmd, sizeof(ctx->cmd)); 287 288 dev_dbg(&lif->netdev->dev, "post admin queue command:\n"); 289 dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1, 290 &ctx->cmd, sizeof(ctx->cmd), true); 291 292 ionic_q_post(q, true, ionic_adminq_cb, ctx); 293 294 err_out: 295 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 296 297 return err; 298 } 299 300 int ionic_adminq_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx, int err) 301 { 302 struct net_device *netdev = lif->netdev; 303 unsigned long remaining; 304 const char *name; 305 306 if (err) { 307 if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) { 308 name = ionic_opcode_to_str(ctx->cmd.cmd.opcode); 309 netdev_err(netdev, "Posting of %s (%d) failed: %d\n", 310 name, ctx->cmd.cmd.opcode, err); 311 } 312 return err; 313 } 314 315 remaining = wait_for_completion_timeout(&ctx->work, 316 HZ * (ulong)DEVCMD_TIMEOUT); 317 return ionic_adminq_check_err(lif, ctx, (remaining == 0)); 318 } 319 320 int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 321 { 322 int err; 323 324 err = ionic_adminq_post(lif, ctx); 325 326 return ionic_adminq_wait(lif, ctx, err); 327 } 328 329 static void ionic_dev_cmd_clean(struct ionic *ionic) 330 { 331 union __iomem ionic_dev_cmd_regs *regs = ionic->idev.dev_cmd_regs; 332 333 iowrite32(0, ®s->doorbell); 334 memset_io(®s->cmd, 0, sizeof(regs->cmd)); 335 } 336 337 int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds) 338 { 339 struct ionic_dev *idev = &ionic->idev; 340 unsigned long start_time; 341 unsigned long max_wait; 342 unsigned long duration; 343 int opcode; 344 int hb = 0; 345 int done; 346 int err; 347 348 /* Wait for dev cmd to complete, retrying if we get EAGAIN, 349 * but don't wait any longer than max_seconds. 350 */ 351 max_wait = jiffies + (max_seconds * HZ); 352 try_again: 353 opcode = readb(&idev->dev_cmd_regs->cmd.cmd.opcode); 354 start_time = jiffies; 355 do { 356 done = ionic_dev_cmd_done(idev); 357 if (done) 358 break; 359 usleep_range(100, 200); 360 361 /* Don't check the heartbeat on FW_CONTROL commands as they are 362 * notorious for interrupting the firmware's heartbeat update. 363 */ 364 if (opcode != IONIC_CMD_FW_CONTROL) 365 hb = ionic_heartbeat_check(ionic); 366 } while (!done && !hb && time_before(jiffies, max_wait)); 367 duration = jiffies - start_time; 368 369 dev_dbg(ionic->dev, "DEVCMD %s (%d) done=%d took %ld secs (%ld jiffies)\n", 370 ionic_opcode_to_str(opcode), opcode, 371 done, duration / HZ, duration); 372 373 if (!done && hb) { 374 /* It is possible (but unlikely) that FW was busy and missed a 375 * heartbeat check but is still alive and will process this 376 * request, so don't clean the dev_cmd in this case. 377 */ 378 dev_dbg(ionic->dev, "DEVCMD %s (%d) failed - FW halted\n", 379 ionic_opcode_to_str(opcode), opcode); 380 return -ENXIO; 381 } 382 383 if (!done && !time_before(jiffies, max_wait)) { 384 ionic_dev_cmd_clean(ionic); 385 dev_warn(ionic->dev, "DEVCMD %s (%d) timeout after %ld secs\n", 386 ionic_opcode_to_str(opcode), opcode, max_seconds); 387 return -ETIMEDOUT; 388 } 389 390 err = ionic_dev_cmd_status(&ionic->idev); 391 if (err) { 392 if (err == IONIC_RC_EAGAIN && 393 time_before(jiffies, (max_wait - HZ))) { 394 dev_dbg(ionic->dev, "DEV_CMD %s (%d), %s (%d) retrying...\n", 395 ionic_opcode_to_str(opcode), opcode, 396 ionic_error_to_str(err), err); 397 398 msleep(1000); 399 iowrite32(0, &idev->dev_cmd_regs->done); 400 iowrite32(1, &idev->dev_cmd_regs->doorbell); 401 goto try_again; 402 } 403 404 if (!(opcode == IONIC_CMD_FW_CONTROL && err == IONIC_RC_EAGAIN)) 405 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) failed\n", 406 ionic_opcode_to_str(opcode), opcode, 407 ionic_error_to_str(err), err); 408 409 return ionic_error_to_errno(err); 410 } 411 412 return 0; 413 } 414 415 int ionic_setup(struct ionic *ionic) 416 { 417 int err; 418 419 err = ionic_dev_setup(ionic); 420 if (err) 421 return err; 422 ionic_reset(ionic); 423 424 return 0; 425 } 426 427 int ionic_identify(struct ionic *ionic) 428 { 429 struct ionic_identity *ident = &ionic->ident; 430 struct ionic_dev *idev = &ionic->idev; 431 size_t sz; 432 int err; 433 434 memset(ident, 0, sizeof(*ident)); 435 436 ident->drv.os_type = cpu_to_le32(IONIC_OS_TYPE_LINUX); 437 strncpy(ident->drv.driver_ver_str, UTS_RELEASE, 438 sizeof(ident->drv.driver_ver_str) - 1); 439 440 mutex_lock(&ionic->dev_cmd_lock); 441 442 sz = min(sizeof(ident->drv), sizeof(idev->dev_cmd_regs->data)); 443 memcpy_toio(&idev->dev_cmd_regs->data, &ident->drv, sz); 444 445 ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1); 446 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 447 if (!err) { 448 sz = min(sizeof(ident->dev), sizeof(idev->dev_cmd_regs->data)); 449 memcpy_fromio(&ident->dev, &idev->dev_cmd_regs->data, sz); 450 } 451 mutex_unlock(&ionic->dev_cmd_lock); 452 453 dev_info(ionic->dev, "FW: %s\n", idev->dev_info.fw_version); 454 455 if (err) { 456 dev_err(ionic->dev, "Cannot identify ionic: %dn", err); 457 goto err_out; 458 } 459 460 err = ionic_lif_identify(ionic, IONIC_LIF_TYPE_CLASSIC, 461 &ionic->ident.lif); 462 if (err) { 463 dev_err(ionic->dev, "Cannot identify LIFs: %d\n", err); 464 goto err_out; 465 } 466 467 return 0; 468 469 err_out: 470 return err; 471 } 472 473 int ionic_init(struct ionic *ionic) 474 { 475 struct ionic_dev *idev = &ionic->idev; 476 int err; 477 478 mutex_lock(&ionic->dev_cmd_lock); 479 ionic_dev_cmd_init(idev); 480 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 481 mutex_unlock(&ionic->dev_cmd_lock); 482 483 return err; 484 } 485 486 int ionic_reset(struct ionic *ionic) 487 { 488 struct ionic_dev *idev = &ionic->idev; 489 int err; 490 491 mutex_lock(&ionic->dev_cmd_lock); 492 ionic_dev_cmd_reset(idev); 493 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 494 mutex_unlock(&ionic->dev_cmd_lock); 495 496 return err; 497 } 498 499 int ionic_port_identify(struct ionic *ionic) 500 { 501 struct ionic_identity *ident = &ionic->ident; 502 struct ionic_dev *idev = &ionic->idev; 503 size_t sz; 504 int err; 505 506 mutex_lock(&ionic->dev_cmd_lock); 507 508 ionic_dev_cmd_port_identify(idev); 509 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 510 if (!err) { 511 sz = min(sizeof(ident->port), sizeof(idev->dev_cmd_regs->data)); 512 memcpy_fromio(&ident->port, &idev->dev_cmd_regs->data, sz); 513 } 514 515 mutex_unlock(&ionic->dev_cmd_lock); 516 517 return err; 518 } 519 520 int ionic_port_init(struct ionic *ionic) 521 { 522 struct ionic_identity *ident = &ionic->ident; 523 struct ionic_dev *idev = &ionic->idev; 524 size_t sz; 525 int err; 526 527 if (!idev->port_info) { 528 idev->port_info_sz = ALIGN(sizeof(*idev->port_info), PAGE_SIZE); 529 idev->port_info = dma_alloc_coherent(ionic->dev, 530 idev->port_info_sz, 531 &idev->port_info_pa, 532 GFP_KERNEL); 533 if (!idev->port_info) 534 return -ENOMEM; 535 } 536 537 sz = min(sizeof(ident->port.config), sizeof(idev->dev_cmd_regs->data)); 538 539 mutex_lock(&ionic->dev_cmd_lock); 540 541 memcpy_toio(&idev->dev_cmd_regs->data, &ident->port.config, sz); 542 ionic_dev_cmd_port_init(idev); 543 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 544 545 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP); 546 (void)ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 547 548 mutex_unlock(&ionic->dev_cmd_lock); 549 if (err) { 550 dev_err(ionic->dev, "Failed to init port\n"); 551 dma_free_coherent(ionic->dev, idev->port_info_sz, 552 idev->port_info, idev->port_info_pa); 553 idev->port_info = NULL; 554 idev->port_info_pa = 0; 555 } 556 557 return err; 558 } 559 560 int ionic_port_reset(struct ionic *ionic) 561 { 562 struct ionic_dev *idev = &ionic->idev; 563 int err; 564 565 if (!idev->port_info) 566 return 0; 567 568 mutex_lock(&ionic->dev_cmd_lock); 569 ionic_dev_cmd_port_reset(idev); 570 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 571 mutex_unlock(&ionic->dev_cmd_lock); 572 573 dma_free_coherent(ionic->dev, idev->port_info_sz, 574 idev->port_info, idev->port_info_pa); 575 576 idev->port_info = NULL; 577 idev->port_info_pa = 0; 578 579 if (err) 580 dev_err(ionic->dev, "Failed to reset port\n"); 581 582 return err; 583 } 584 585 static int __init ionic_init_module(void) 586 { 587 ionic_debugfs_create(); 588 return ionic_bus_register_driver(); 589 } 590 591 static void __exit ionic_cleanup_module(void) 592 { 593 ionic_bus_unregister_driver(); 594 ionic_debugfs_destroy(); 595 596 pr_info("%s removed\n", IONIC_DRV_NAME); 597 } 598 599 module_init(ionic_init_module); 600 module_exit(ionic_cleanup_module); 601