1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #include <linux/printk.h> 5 #include <linux/dynamic_debug.h> 6 #include <linux/module.h> 7 #include <linux/netdevice.h> 8 #include <linux/utsname.h> 9 #include <generated/utsrelease.h> 10 #include <linux/ctype.h> 11 12 #include "ionic.h" 13 #include "ionic_bus.h" 14 #include "ionic_lif.h" 15 #include "ionic_debugfs.h" 16 17 MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION); 18 MODULE_AUTHOR("Pensando Systems, Inc"); 19 MODULE_LICENSE("GPL"); 20 21 static const char *ionic_error_to_str(enum ionic_status_code code) 22 { 23 switch (code) { 24 case IONIC_RC_SUCCESS: 25 return "IONIC_RC_SUCCESS"; 26 case IONIC_RC_EVERSION: 27 return "IONIC_RC_EVERSION"; 28 case IONIC_RC_EOPCODE: 29 return "IONIC_RC_EOPCODE"; 30 case IONIC_RC_EIO: 31 return "IONIC_RC_EIO"; 32 case IONIC_RC_EPERM: 33 return "IONIC_RC_EPERM"; 34 case IONIC_RC_EQID: 35 return "IONIC_RC_EQID"; 36 case IONIC_RC_EQTYPE: 37 return "IONIC_RC_EQTYPE"; 38 case IONIC_RC_ENOENT: 39 return "IONIC_RC_ENOENT"; 40 case IONIC_RC_EINTR: 41 return "IONIC_RC_EINTR"; 42 case IONIC_RC_EAGAIN: 43 return "IONIC_RC_EAGAIN"; 44 case IONIC_RC_ENOMEM: 45 return "IONIC_RC_ENOMEM"; 46 case IONIC_RC_EFAULT: 47 return "IONIC_RC_EFAULT"; 48 case IONIC_RC_EBUSY: 49 return "IONIC_RC_EBUSY"; 50 case IONIC_RC_EEXIST: 51 return "IONIC_RC_EEXIST"; 52 case IONIC_RC_EINVAL: 53 return "IONIC_RC_EINVAL"; 54 case IONIC_RC_ENOSPC: 55 return "IONIC_RC_ENOSPC"; 56 case IONIC_RC_ERANGE: 57 return "IONIC_RC_ERANGE"; 58 case IONIC_RC_BAD_ADDR: 59 return "IONIC_RC_BAD_ADDR"; 60 case IONIC_RC_DEV_CMD: 61 return "IONIC_RC_DEV_CMD"; 62 case IONIC_RC_ENOSUPP: 63 return "IONIC_RC_ENOSUPP"; 64 case IONIC_RC_ERROR: 65 return "IONIC_RC_ERROR"; 66 case IONIC_RC_ERDMA: 67 return "IONIC_RC_ERDMA"; 68 case IONIC_RC_EBAD_FW: 69 return "IONIC_RC_EBAD_FW"; 70 default: 71 return "IONIC_RC_UNKNOWN"; 72 } 73 } 74 75 static int ionic_error_to_errno(enum ionic_status_code code) 76 { 77 switch (code) { 78 case IONIC_RC_SUCCESS: 79 return 0; 80 case IONIC_RC_EVERSION: 81 case IONIC_RC_EQTYPE: 82 case IONIC_RC_EQID: 83 case IONIC_RC_EINVAL: 84 case IONIC_RC_ENOSUPP: 85 return -EINVAL; 86 case IONIC_RC_EPERM: 87 return -EPERM; 88 case IONIC_RC_ENOENT: 89 return -ENOENT; 90 case IONIC_RC_EAGAIN: 91 return -EAGAIN; 92 case IONIC_RC_ENOMEM: 93 return -ENOMEM; 94 case IONIC_RC_EFAULT: 95 return -EFAULT; 96 case IONIC_RC_EBUSY: 97 return -EBUSY; 98 case IONIC_RC_EEXIST: 99 return -EEXIST; 100 case IONIC_RC_ENOSPC: 101 return -ENOSPC; 102 case IONIC_RC_ERANGE: 103 return -ERANGE; 104 case IONIC_RC_BAD_ADDR: 105 return -EFAULT; 106 case IONIC_RC_EOPCODE: 107 case IONIC_RC_EINTR: 108 case IONIC_RC_DEV_CMD: 109 case IONIC_RC_ERROR: 110 case IONIC_RC_ERDMA: 111 case IONIC_RC_EIO: 112 default: 113 return -EIO; 114 } 115 } 116 117 static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode) 118 { 119 switch (opcode) { 120 case IONIC_CMD_NOP: 121 return "IONIC_CMD_NOP"; 122 case IONIC_CMD_INIT: 123 return "IONIC_CMD_INIT"; 124 case IONIC_CMD_RESET: 125 return "IONIC_CMD_RESET"; 126 case IONIC_CMD_IDENTIFY: 127 return "IONIC_CMD_IDENTIFY"; 128 case IONIC_CMD_GETATTR: 129 return "IONIC_CMD_GETATTR"; 130 case IONIC_CMD_SETATTR: 131 return "IONIC_CMD_SETATTR"; 132 case IONIC_CMD_PORT_IDENTIFY: 133 return "IONIC_CMD_PORT_IDENTIFY"; 134 case IONIC_CMD_PORT_INIT: 135 return "IONIC_CMD_PORT_INIT"; 136 case IONIC_CMD_PORT_RESET: 137 return "IONIC_CMD_PORT_RESET"; 138 case IONIC_CMD_PORT_GETATTR: 139 return "IONIC_CMD_PORT_GETATTR"; 140 case IONIC_CMD_PORT_SETATTR: 141 return "IONIC_CMD_PORT_SETATTR"; 142 case IONIC_CMD_LIF_INIT: 143 return "IONIC_CMD_LIF_INIT"; 144 case IONIC_CMD_LIF_RESET: 145 return "IONIC_CMD_LIF_RESET"; 146 case IONIC_CMD_LIF_IDENTIFY: 147 return "IONIC_CMD_LIF_IDENTIFY"; 148 case IONIC_CMD_LIF_SETATTR: 149 return "IONIC_CMD_LIF_SETATTR"; 150 case IONIC_CMD_LIF_GETATTR: 151 return "IONIC_CMD_LIF_GETATTR"; 152 case IONIC_CMD_LIF_SETPHC: 153 return "IONIC_CMD_LIF_SETPHC"; 154 case IONIC_CMD_RX_MODE_SET: 155 return "IONIC_CMD_RX_MODE_SET"; 156 case IONIC_CMD_RX_FILTER_ADD: 157 return "IONIC_CMD_RX_FILTER_ADD"; 158 case IONIC_CMD_RX_FILTER_DEL: 159 return "IONIC_CMD_RX_FILTER_DEL"; 160 case IONIC_CMD_Q_IDENTIFY: 161 return "IONIC_CMD_Q_IDENTIFY"; 162 case IONIC_CMD_Q_INIT: 163 return "IONIC_CMD_Q_INIT"; 164 case IONIC_CMD_Q_CONTROL: 165 return "IONIC_CMD_Q_CONTROL"; 166 case IONIC_CMD_RDMA_RESET_LIF: 167 return "IONIC_CMD_RDMA_RESET_LIF"; 168 case IONIC_CMD_RDMA_CREATE_EQ: 169 return "IONIC_CMD_RDMA_CREATE_EQ"; 170 case IONIC_CMD_RDMA_CREATE_CQ: 171 return "IONIC_CMD_RDMA_CREATE_CQ"; 172 case IONIC_CMD_RDMA_CREATE_ADMINQ: 173 return "IONIC_CMD_RDMA_CREATE_ADMINQ"; 174 case IONIC_CMD_FW_DOWNLOAD: 175 return "IONIC_CMD_FW_DOWNLOAD"; 176 case IONIC_CMD_FW_CONTROL: 177 return "IONIC_CMD_FW_CONTROL"; 178 case IONIC_CMD_FW_DOWNLOAD_V1: 179 return "IONIC_CMD_FW_DOWNLOAD_V1"; 180 case IONIC_CMD_FW_CONTROL_V1: 181 return "IONIC_CMD_FW_CONTROL_V1"; 182 case IONIC_CMD_VF_GETATTR: 183 return "IONIC_CMD_VF_GETATTR"; 184 case IONIC_CMD_VF_SETATTR: 185 return "IONIC_CMD_VF_SETATTR"; 186 default: 187 return "DEVCMD_UNKNOWN"; 188 } 189 } 190 191 static void ionic_adminq_flush(struct ionic_lif *lif) 192 { 193 struct ionic_desc_info *desc_info; 194 unsigned long irqflags; 195 struct ionic_queue *q; 196 197 spin_lock_irqsave(&lif->adminq_lock, irqflags); 198 if (!lif->adminqcq) { 199 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 200 return; 201 } 202 203 q = &lif->adminqcq->q; 204 205 while (q->tail_idx != q->head_idx) { 206 desc_info = &q->info[q->tail_idx]; 207 memset(desc_info->desc, 0, sizeof(union ionic_adminq_cmd)); 208 desc_info->cb = NULL; 209 desc_info->cb_arg = NULL; 210 q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1); 211 } 212 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 213 } 214 215 static int ionic_adminq_check_err(struct ionic_lif *lif, 216 struct ionic_admin_ctx *ctx, 217 bool timeout) 218 { 219 struct net_device *netdev = lif->netdev; 220 const char *opcode_str; 221 const char *status_str; 222 int err = 0; 223 224 if (ctx->comp.comp.status || timeout) { 225 opcode_str = ionic_opcode_to_str(ctx->cmd.cmd.opcode); 226 status_str = ionic_error_to_str(ctx->comp.comp.status); 227 err = timeout ? -ETIMEDOUT : 228 ionic_error_to_errno(ctx->comp.comp.status); 229 230 netdev_err(netdev, "%s (%d) failed: %s (%d)\n", 231 opcode_str, ctx->cmd.cmd.opcode, 232 timeout ? "TIMEOUT" : status_str, err); 233 234 if (timeout) 235 ionic_adminq_flush(lif); 236 } 237 238 return err; 239 } 240 241 static void ionic_adminq_cb(struct ionic_queue *q, 242 struct ionic_desc_info *desc_info, 243 struct ionic_cq_info *cq_info, void *cb_arg) 244 { 245 struct ionic_admin_ctx *ctx = cb_arg; 246 struct ionic_admin_comp *comp; 247 248 if (!ctx) 249 return; 250 251 comp = cq_info->cq_desc; 252 253 memcpy(&ctx->comp, comp, sizeof(*comp)); 254 255 dev_dbg(q->dev, "comp admin queue command:\n"); 256 dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1, 257 &ctx->comp, sizeof(ctx->comp), true); 258 259 complete_all(&ctx->work); 260 } 261 262 int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 263 { 264 struct ionic_desc_info *desc_info; 265 unsigned long irqflags; 266 struct ionic_queue *q; 267 int err = 0; 268 269 spin_lock_irqsave(&lif->adminq_lock, irqflags); 270 if (!lif->adminqcq) { 271 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 272 return -EIO; 273 } 274 275 q = &lif->adminqcq->q; 276 277 if (!ionic_q_has_space(q, 1)) { 278 err = -ENOSPC; 279 goto err_out; 280 } 281 282 err = ionic_heartbeat_check(lif->ionic); 283 if (err) 284 goto err_out; 285 286 desc_info = &q->info[q->head_idx]; 287 memcpy(desc_info->desc, &ctx->cmd, sizeof(ctx->cmd)); 288 289 dev_dbg(&lif->netdev->dev, "post admin queue command:\n"); 290 dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1, 291 &ctx->cmd, sizeof(ctx->cmd), true); 292 293 ionic_q_post(q, true, ionic_adminq_cb, ctx); 294 295 err_out: 296 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 297 298 return err; 299 } 300 301 int ionic_adminq_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx, int err) 302 { 303 struct net_device *netdev = lif->netdev; 304 unsigned long time_limit; 305 unsigned long time_start; 306 unsigned long time_done; 307 unsigned long remaining; 308 const char *name; 309 310 name = ionic_opcode_to_str(ctx->cmd.cmd.opcode); 311 312 if (err) { 313 if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) 314 netdev_err(netdev, "Posting of %s (%d) failed: %d\n", 315 name, ctx->cmd.cmd.opcode, err); 316 return err; 317 } 318 319 time_start = jiffies; 320 time_limit = time_start + HZ * (ulong)DEVCMD_TIMEOUT; 321 do { 322 remaining = wait_for_completion_timeout(&ctx->work, 323 IONIC_ADMINQ_TIME_SLICE); 324 325 /* check for done */ 326 if (remaining) 327 break; 328 329 /* interrupt the wait if FW stopped */ 330 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state)) { 331 netdev_err(netdev, "%s (%d) interrupted, FW in reset\n", 332 name, ctx->cmd.cmd.opcode); 333 return -ENXIO; 334 } 335 336 } while (time_before(jiffies, time_limit)); 337 time_done = jiffies; 338 339 dev_dbg(lif->ionic->dev, "%s: elapsed %d msecs\n", 340 __func__, jiffies_to_msecs(time_done - time_start)); 341 342 return ionic_adminq_check_err(lif, ctx, time_after_eq(time_done, time_limit)); 343 } 344 345 int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 346 { 347 int err; 348 349 err = ionic_adminq_post(lif, ctx); 350 351 return ionic_adminq_wait(lif, ctx, err); 352 } 353 354 static void ionic_dev_cmd_clean(struct ionic *ionic) 355 { 356 union __iomem ionic_dev_cmd_regs *regs = ionic->idev.dev_cmd_regs; 357 358 iowrite32(0, ®s->doorbell); 359 memset_io(®s->cmd, 0, sizeof(regs->cmd)); 360 } 361 362 int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds) 363 { 364 struct ionic_dev *idev = &ionic->idev; 365 unsigned long start_time; 366 unsigned long max_wait; 367 unsigned long duration; 368 int opcode; 369 int hb = 0; 370 int done; 371 int err; 372 373 /* Wait for dev cmd to complete, retrying if we get EAGAIN, 374 * but don't wait any longer than max_seconds. 375 */ 376 max_wait = jiffies + (max_seconds * HZ); 377 try_again: 378 opcode = readb(&idev->dev_cmd_regs->cmd.cmd.opcode); 379 start_time = jiffies; 380 do { 381 done = ionic_dev_cmd_done(idev); 382 if (done) 383 break; 384 usleep_range(100, 200); 385 386 /* Don't check the heartbeat on FW_CONTROL commands as they are 387 * notorious for interrupting the firmware's heartbeat update. 388 */ 389 if (opcode != IONIC_CMD_FW_CONTROL) 390 hb = ionic_heartbeat_check(ionic); 391 } while (!done && !hb && time_before(jiffies, max_wait)); 392 duration = jiffies - start_time; 393 394 dev_dbg(ionic->dev, "DEVCMD %s (%d) done=%d took %ld secs (%ld jiffies)\n", 395 ionic_opcode_to_str(opcode), opcode, 396 done, duration / HZ, duration); 397 398 if (!done && hb) { 399 /* It is possible (but unlikely) that FW was busy and missed a 400 * heartbeat check but is still alive and will process this 401 * request, so don't clean the dev_cmd in this case. 402 */ 403 dev_dbg(ionic->dev, "DEVCMD %s (%d) failed - FW halted\n", 404 ionic_opcode_to_str(opcode), opcode); 405 return -ENXIO; 406 } 407 408 if (!done && !time_before(jiffies, max_wait)) { 409 ionic_dev_cmd_clean(ionic); 410 dev_warn(ionic->dev, "DEVCMD %s (%d) timeout after %ld secs\n", 411 ionic_opcode_to_str(opcode), opcode, max_seconds); 412 return -ETIMEDOUT; 413 } 414 415 err = ionic_dev_cmd_status(&ionic->idev); 416 if (err) { 417 if (err == IONIC_RC_EAGAIN && 418 time_before(jiffies, (max_wait - HZ))) { 419 dev_dbg(ionic->dev, "DEV_CMD %s (%d), %s (%d) retrying...\n", 420 ionic_opcode_to_str(opcode), opcode, 421 ionic_error_to_str(err), err); 422 423 msleep(1000); 424 iowrite32(0, &idev->dev_cmd_regs->done); 425 iowrite32(1, &idev->dev_cmd_regs->doorbell); 426 goto try_again; 427 } 428 429 if (!(opcode == IONIC_CMD_FW_CONTROL && err == IONIC_RC_EAGAIN)) 430 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) failed\n", 431 ionic_opcode_to_str(opcode), opcode, 432 ionic_error_to_str(err), err); 433 434 return ionic_error_to_errno(err); 435 } 436 437 return 0; 438 } 439 440 int ionic_setup(struct ionic *ionic) 441 { 442 int err; 443 444 err = ionic_dev_setup(ionic); 445 if (err) 446 return err; 447 ionic_reset(ionic); 448 449 return 0; 450 } 451 452 int ionic_identify(struct ionic *ionic) 453 { 454 struct ionic_identity *ident = &ionic->ident; 455 struct ionic_dev *idev = &ionic->idev; 456 size_t sz; 457 int err; 458 459 memset(ident, 0, sizeof(*ident)); 460 461 ident->drv.os_type = cpu_to_le32(IONIC_OS_TYPE_LINUX); 462 strncpy(ident->drv.driver_ver_str, UTS_RELEASE, 463 sizeof(ident->drv.driver_ver_str) - 1); 464 465 mutex_lock(&ionic->dev_cmd_lock); 466 467 sz = min(sizeof(ident->drv), sizeof(idev->dev_cmd_regs->data)); 468 memcpy_toio(&idev->dev_cmd_regs->data, &ident->drv, sz); 469 470 ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1); 471 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 472 if (!err) { 473 sz = min(sizeof(ident->dev), sizeof(idev->dev_cmd_regs->data)); 474 memcpy_fromio(&ident->dev, &idev->dev_cmd_regs->data, sz); 475 } 476 mutex_unlock(&ionic->dev_cmd_lock); 477 478 if (err) { 479 dev_err(ionic->dev, "Cannot identify ionic: %d\n", err); 480 goto err_out; 481 } 482 483 if (isprint(idev->dev_info.fw_version[0]) && 484 isascii(idev->dev_info.fw_version[0])) 485 dev_info(ionic->dev, "FW: %.*s\n", 486 (int)(sizeof(idev->dev_info.fw_version) - 1), 487 idev->dev_info.fw_version); 488 else 489 dev_info(ionic->dev, "FW: (invalid string) 0x%02x 0x%02x 0x%02x 0x%02x ...\n", 490 (u8)idev->dev_info.fw_version[0], 491 (u8)idev->dev_info.fw_version[1], 492 (u8)idev->dev_info.fw_version[2], 493 (u8)idev->dev_info.fw_version[3]); 494 495 err = ionic_lif_identify(ionic, IONIC_LIF_TYPE_CLASSIC, 496 &ionic->ident.lif); 497 if (err) { 498 dev_err(ionic->dev, "Cannot identify LIFs: %d\n", err); 499 goto err_out; 500 } 501 502 return 0; 503 504 err_out: 505 return err; 506 } 507 508 int ionic_init(struct ionic *ionic) 509 { 510 struct ionic_dev *idev = &ionic->idev; 511 int err; 512 513 mutex_lock(&ionic->dev_cmd_lock); 514 ionic_dev_cmd_init(idev); 515 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 516 mutex_unlock(&ionic->dev_cmd_lock); 517 518 return err; 519 } 520 521 int ionic_reset(struct ionic *ionic) 522 { 523 struct ionic_dev *idev = &ionic->idev; 524 int err; 525 526 mutex_lock(&ionic->dev_cmd_lock); 527 ionic_dev_cmd_reset(idev); 528 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 529 mutex_unlock(&ionic->dev_cmd_lock); 530 531 return err; 532 } 533 534 int ionic_port_identify(struct ionic *ionic) 535 { 536 struct ionic_identity *ident = &ionic->ident; 537 struct ionic_dev *idev = &ionic->idev; 538 size_t sz; 539 int err; 540 541 mutex_lock(&ionic->dev_cmd_lock); 542 543 ionic_dev_cmd_port_identify(idev); 544 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 545 if (!err) { 546 sz = min(sizeof(ident->port), sizeof(idev->dev_cmd_regs->data)); 547 memcpy_fromio(&ident->port, &idev->dev_cmd_regs->data, sz); 548 } 549 550 mutex_unlock(&ionic->dev_cmd_lock); 551 552 return err; 553 } 554 555 int ionic_port_init(struct ionic *ionic) 556 { 557 struct ionic_identity *ident = &ionic->ident; 558 struct ionic_dev *idev = &ionic->idev; 559 size_t sz; 560 int err; 561 562 if (!idev->port_info) { 563 idev->port_info_sz = ALIGN(sizeof(*idev->port_info), PAGE_SIZE); 564 idev->port_info = dma_alloc_coherent(ionic->dev, 565 idev->port_info_sz, 566 &idev->port_info_pa, 567 GFP_KERNEL); 568 if (!idev->port_info) 569 return -ENOMEM; 570 } 571 572 sz = min(sizeof(ident->port.config), sizeof(idev->dev_cmd_regs->data)); 573 574 mutex_lock(&ionic->dev_cmd_lock); 575 576 memcpy_toio(&idev->dev_cmd_regs->data, &ident->port.config, sz); 577 ionic_dev_cmd_port_init(idev); 578 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 579 580 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP); 581 (void)ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 582 583 mutex_unlock(&ionic->dev_cmd_lock); 584 if (err) { 585 dev_err(ionic->dev, "Failed to init port\n"); 586 dma_free_coherent(ionic->dev, idev->port_info_sz, 587 idev->port_info, idev->port_info_pa); 588 idev->port_info = NULL; 589 idev->port_info_pa = 0; 590 } 591 592 return err; 593 } 594 595 int ionic_port_reset(struct ionic *ionic) 596 { 597 struct ionic_dev *idev = &ionic->idev; 598 int err; 599 600 if (!idev->port_info) 601 return 0; 602 603 mutex_lock(&ionic->dev_cmd_lock); 604 ionic_dev_cmd_port_reset(idev); 605 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 606 mutex_unlock(&ionic->dev_cmd_lock); 607 608 dma_free_coherent(ionic->dev, idev->port_info_sz, 609 idev->port_info, idev->port_info_pa); 610 611 idev->port_info = NULL; 612 idev->port_info_pa = 0; 613 614 if (err) 615 dev_err(ionic->dev, "Failed to reset port\n"); 616 617 return err; 618 } 619 620 static int __init ionic_init_module(void) 621 { 622 ionic_debugfs_create(); 623 return ionic_bus_register_driver(); 624 } 625 626 static void __exit ionic_cleanup_module(void) 627 { 628 ionic_bus_unregister_driver(); 629 ionic_debugfs_destroy(); 630 631 pr_info("%s removed\n", IONIC_DRV_NAME); 632 } 633 634 module_init(ionic_init_module); 635 module_exit(ionic_cleanup_module); 636