1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #include <linux/printk.h> 5 #include <linux/dynamic_debug.h> 6 #include <linux/module.h> 7 #include <linux/netdevice.h> 8 #include <linux/utsname.h> 9 10 #include "ionic.h" 11 #include "ionic_bus.h" 12 #include "ionic_lif.h" 13 #include "ionic_debugfs.h" 14 15 MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION); 16 MODULE_AUTHOR("Pensando Systems, Inc"); 17 MODULE_LICENSE("GPL"); 18 MODULE_VERSION(IONIC_DRV_VERSION); 19 20 static const char *ionic_error_to_str(enum ionic_status_code code) 21 { 22 switch (code) { 23 case IONIC_RC_SUCCESS: 24 return "IONIC_RC_SUCCESS"; 25 case IONIC_RC_EVERSION: 26 return "IONIC_RC_EVERSION"; 27 case IONIC_RC_EOPCODE: 28 return "IONIC_RC_EOPCODE"; 29 case IONIC_RC_EIO: 30 return "IONIC_RC_EIO"; 31 case IONIC_RC_EPERM: 32 return "IONIC_RC_EPERM"; 33 case IONIC_RC_EQID: 34 return "IONIC_RC_EQID"; 35 case IONIC_RC_EQTYPE: 36 return "IONIC_RC_EQTYPE"; 37 case IONIC_RC_ENOENT: 38 return "IONIC_RC_ENOENT"; 39 case IONIC_RC_EINTR: 40 return "IONIC_RC_EINTR"; 41 case IONIC_RC_EAGAIN: 42 return "IONIC_RC_EAGAIN"; 43 case IONIC_RC_ENOMEM: 44 return "IONIC_RC_ENOMEM"; 45 case IONIC_RC_EFAULT: 46 return "IONIC_RC_EFAULT"; 47 case IONIC_RC_EBUSY: 48 return "IONIC_RC_EBUSY"; 49 case IONIC_RC_EEXIST: 50 return "IONIC_RC_EEXIST"; 51 case IONIC_RC_EINVAL: 52 return "IONIC_RC_EINVAL"; 53 case IONIC_RC_ENOSPC: 54 return "IONIC_RC_ENOSPC"; 55 case IONIC_RC_ERANGE: 56 return "IONIC_RC_ERANGE"; 57 case IONIC_RC_BAD_ADDR: 58 return "IONIC_RC_BAD_ADDR"; 59 case IONIC_RC_DEV_CMD: 60 return "IONIC_RC_DEV_CMD"; 61 case IONIC_RC_ERROR: 62 return "IONIC_RC_ERROR"; 63 case IONIC_RC_ERDMA: 64 return "IONIC_RC_ERDMA"; 65 default: 66 return "IONIC_RC_UNKNOWN"; 67 } 68 } 69 70 static int ionic_error_to_errno(enum ionic_status_code code) 71 { 72 switch (code) { 73 case IONIC_RC_SUCCESS: 74 return 0; 75 case IONIC_RC_EVERSION: 76 case IONIC_RC_EQTYPE: 77 case IONIC_RC_EQID: 78 case IONIC_RC_EINVAL: 79 return -EINVAL; 80 case IONIC_RC_EPERM: 81 return -EPERM; 82 case IONIC_RC_ENOENT: 83 return -ENOENT; 84 case IONIC_RC_EAGAIN: 85 return -EAGAIN; 86 case IONIC_RC_ENOMEM: 87 return -ENOMEM; 88 case IONIC_RC_EFAULT: 89 return -EFAULT; 90 case IONIC_RC_EBUSY: 91 return -EBUSY; 92 case IONIC_RC_EEXIST: 93 return -EEXIST; 94 case IONIC_RC_ENOSPC: 95 return -ENOSPC; 96 case IONIC_RC_ERANGE: 97 return -ERANGE; 98 case IONIC_RC_BAD_ADDR: 99 return -EFAULT; 100 case IONIC_RC_EOPCODE: 101 case IONIC_RC_EINTR: 102 case IONIC_RC_DEV_CMD: 103 case IONIC_RC_ERROR: 104 case IONIC_RC_ERDMA: 105 case IONIC_RC_EIO: 106 default: 107 return -EIO; 108 } 109 } 110 111 static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode) 112 { 113 switch (opcode) { 114 case IONIC_CMD_NOP: 115 return "IONIC_CMD_NOP"; 116 case IONIC_CMD_INIT: 117 return "IONIC_CMD_INIT"; 118 case IONIC_CMD_RESET: 119 return "IONIC_CMD_RESET"; 120 case IONIC_CMD_IDENTIFY: 121 return "IONIC_CMD_IDENTIFY"; 122 case IONIC_CMD_GETATTR: 123 return "IONIC_CMD_GETATTR"; 124 case IONIC_CMD_SETATTR: 125 return "IONIC_CMD_SETATTR"; 126 case IONIC_CMD_PORT_IDENTIFY: 127 return "IONIC_CMD_PORT_IDENTIFY"; 128 case IONIC_CMD_PORT_INIT: 129 return "IONIC_CMD_PORT_INIT"; 130 case IONIC_CMD_PORT_RESET: 131 return "IONIC_CMD_PORT_RESET"; 132 case IONIC_CMD_PORT_GETATTR: 133 return "IONIC_CMD_PORT_GETATTR"; 134 case IONIC_CMD_PORT_SETATTR: 135 return "IONIC_CMD_PORT_SETATTR"; 136 case IONIC_CMD_LIF_INIT: 137 return "IONIC_CMD_LIF_INIT"; 138 case IONIC_CMD_LIF_RESET: 139 return "IONIC_CMD_LIF_RESET"; 140 case IONIC_CMD_LIF_IDENTIFY: 141 return "IONIC_CMD_LIF_IDENTIFY"; 142 case IONIC_CMD_LIF_SETATTR: 143 return "IONIC_CMD_LIF_SETATTR"; 144 case IONIC_CMD_LIF_GETATTR: 145 return "IONIC_CMD_LIF_GETATTR"; 146 case IONIC_CMD_RX_MODE_SET: 147 return "IONIC_CMD_RX_MODE_SET"; 148 case IONIC_CMD_RX_FILTER_ADD: 149 return "IONIC_CMD_RX_FILTER_ADD"; 150 case IONIC_CMD_RX_FILTER_DEL: 151 return "IONIC_CMD_RX_FILTER_DEL"; 152 case IONIC_CMD_Q_INIT: 153 return "IONIC_CMD_Q_INIT"; 154 case IONIC_CMD_Q_CONTROL: 155 return "IONIC_CMD_Q_CONTROL"; 156 case IONIC_CMD_RDMA_RESET_LIF: 157 return "IONIC_CMD_RDMA_RESET_LIF"; 158 case IONIC_CMD_RDMA_CREATE_EQ: 159 return "IONIC_CMD_RDMA_CREATE_EQ"; 160 case IONIC_CMD_RDMA_CREATE_CQ: 161 return "IONIC_CMD_RDMA_CREATE_CQ"; 162 case IONIC_CMD_RDMA_CREATE_ADMINQ: 163 return "IONIC_CMD_RDMA_CREATE_ADMINQ"; 164 case IONIC_CMD_FW_DOWNLOAD: 165 return "IONIC_CMD_FW_DOWNLOAD"; 166 case IONIC_CMD_FW_CONTROL: 167 return "IONIC_CMD_FW_CONTROL"; 168 case IONIC_CMD_VF_GETATTR: 169 return "IONIC_CMD_VF_GETATTR"; 170 case IONIC_CMD_VF_SETATTR: 171 return "IONIC_CMD_VF_SETATTR"; 172 default: 173 return "DEVCMD_UNKNOWN"; 174 } 175 } 176 177 static void ionic_adminq_flush(struct ionic_lif *lif) 178 { 179 struct ionic_queue *adminq = &lif->adminqcq->q; 180 181 spin_lock(&lif->adminq_lock); 182 183 while (adminq->tail != adminq->head) { 184 memset(adminq->tail->desc, 0, sizeof(union ionic_adminq_cmd)); 185 adminq->tail->cb = NULL; 186 adminq->tail->cb_arg = NULL; 187 adminq->tail = adminq->tail->next; 188 } 189 spin_unlock(&lif->adminq_lock); 190 } 191 192 static int ionic_adminq_check_err(struct ionic_lif *lif, 193 struct ionic_admin_ctx *ctx, 194 bool timeout) 195 { 196 struct net_device *netdev = lif->netdev; 197 const char *opcode_str; 198 const char *status_str; 199 int err = 0; 200 201 if (ctx->comp.comp.status || timeout) { 202 opcode_str = ionic_opcode_to_str(ctx->cmd.cmd.opcode); 203 status_str = ionic_error_to_str(ctx->comp.comp.status); 204 err = timeout ? -ETIMEDOUT : 205 ionic_error_to_errno(ctx->comp.comp.status); 206 207 netdev_err(netdev, "%s (%d) failed: %s (%d)\n", 208 opcode_str, ctx->cmd.cmd.opcode, 209 timeout ? "TIMEOUT" : status_str, err); 210 211 if (timeout) 212 ionic_adminq_flush(lif); 213 } 214 215 return err; 216 } 217 218 static void ionic_adminq_cb(struct ionic_queue *q, 219 struct ionic_desc_info *desc_info, 220 struct ionic_cq_info *cq_info, void *cb_arg) 221 { 222 struct ionic_admin_ctx *ctx = cb_arg; 223 struct ionic_admin_comp *comp; 224 struct device *dev; 225 226 if (!ctx) 227 return; 228 229 comp = cq_info->cq_desc; 230 dev = &q->lif->netdev->dev; 231 232 memcpy(&ctx->comp, comp, sizeof(*comp)); 233 234 dev_dbg(dev, "comp admin queue command:\n"); 235 dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1, 236 &ctx->comp, sizeof(ctx->comp), true); 237 238 complete_all(&ctx->work); 239 } 240 241 static int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 242 { 243 struct ionic_queue *adminq = &lif->adminqcq->q; 244 int err = 0; 245 246 WARN_ON(in_interrupt()); 247 248 spin_lock(&lif->adminq_lock); 249 if (!ionic_q_has_space(adminq, 1)) { 250 err = -ENOSPC; 251 goto err_out; 252 } 253 254 err = ionic_heartbeat_check(lif->ionic); 255 if (err) 256 goto err_out; 257 258 memcpy(adminq->head->desc, &ctx->cmd, sizeof(ctx->cmd)); 259 260 dev_dbg(&lif->netdev->dev, "post admin queue command:\n"); 261 dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1, 262 &ctx->cmd, sizeof(ctx->cmd), true); 263 264 ionic_q_post(adminq, true, ionic_adminq_cb, ctx); 265 266 err_out: 267 spin_unlock(&lif->adminq_lock); 268 269 return err; 270 } 271 272 int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 273 { 274 struct net_device *netdev = lif->netdev; 275 unsigned long remaining; 276 const char *name; 277 int err; 278 279 err = ionic_adminq_post(lif, ctx); 280 if (err) { 281 name = ionic_opcode_to_str(ctx->cmd.cmd.opcode); 282 netdev_err(netdev, "Posting of %s (%d) failed: %d\n", 283 name, ctx->cmd.cmd.opcode, err); 284 return err; 285 } 286 287 remaining = wait_for_completion_timeout(&ctx->work, 288 HZ * (ulong)DEVCMD_TIMEOUT); 289 return ionic_adminq_check_err(lif, ctx, (remaining == 0)); 290 } 291 292 int ionic_napi(struct napi_struct *napi, int budget, ionic_cq_cb cb, 293 ionic_cq_done_cb done_cb, void *done_arg) 294 { 295 struct ionic_qcq *qcq = napi_to_qcq(napi); 296 struct ionic_cq *cq = &qcq->cq; 297 u32 work_done, flags = 0; 298 299 work_done = ionic_cq_service(cq, budget, cb, done_cb, done_arg); 300 301 if (work_done < budget && napi_complete_done(napi, work_done)) { 302 flags |= IONIC_INTR_CRED_UNMASK; 303 DEBUG_STATS_INTR_REARM(cq->bound_intr); 304 } 305 306 if (work_done || flags) { 307 flags |= IONIC_INTR_CRED_RESET_COALESCE; 308 ionic_intr_credits(cq->lif->ionic->idev.intr_ctrl, 309 cq->bound_intr->index, 310 work_done, flags); 311 } 312 313 DEBUG_STATS_NAPI_POLL(qcq, work_done); 314 315 return work_done; 316 } 317 318 static void ionic_dev_cmd_clean(struct ionic *ionic) 319 { 320 union ionic_dev_cmd_regs *regs = ionic->idev.dev_cmd_regs; 321 322 iowrite32(0, ®s->doorbell); 323 memset_io(®s->cmd, 0, sizeof(regs->cmd)); 324 } 325 326 int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds) 327 { 328 struct ionic_dev *idev = &ionic->idev; 329 unsigned long start_time; 330 unsigned long max_wait; 331 unsigned long duration; 332 int opcode; 333 int hb = 0; 334 int done; 335 int err; 336 337 WARN_ON(in_interrupt()); 338 339 /* Wait for dev cmd to complete, retrying if we get EAGAIN, 340 * but don't wait any longer than max_seconds. 341 */ 342 max_wait = jiffies + (max_seconds * HZ); 343 try_again: 344 start_time = jiffies; 345 do { 346 done = ionic_dev_cmd_done(idev); 347 if (done) 348 break; 349 msleep(20); 350 hb = ionic_heartbeat_check(ionic); 351 } while (!done && !hb && time_before(jiffies, max_wait)); 352 duration = jiffies - start_time; 353 354 opcode = idev->dev_cmd_regs->cmd.cmd.opcode; 355 dev_dbg(ionic->dev, "DEVCMD %s (%d) done=%d took %ld secs (%ld jiffies)\n", 356 ionic_opcode_to_str(opcode), opcode, 357 done, duration / HZ, duration); 358 359 if (!done && hb) { 360 ionic_dev_cmd_clean(ionic); 361 dev_warn(ionic->dev, "DEVCMD %s (%d) failed - FW halted\n", 362 ionic_opcode_to_str(opcode), opcode); 363 return -ENXIO; 364 } 365 366 if (!done && !time_before(jiffies, max_wait)) { 367 ionic_dev_cmd_clean(ionic); 368 dev_warn(ionic->dev, "DEVCMD %s (%d) timeout after %ld secs\n", 369 ionic_opcode_to_str(opcode), opcode, max_seconds); 370 return -ETIMEDOUT; 371 } 372 373 err = ionic_dev_cmd_status(&ionic->idev); 374 if (err) { 375 if (err == IONIC_RC_EAGAIN && !time_after(jiffies, max_wait)) { 376 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) retrying...\n", 377 ionic_opcode_to_str(opcode), opcode, 378 ionic_error_to_str(err), err); 379 380 msleep(1000); 381 iowrite32(0, &idev->dev_cmd_regs->done); 382 iowrite32(1, &idev->dev_cmd_regs->doorbell); 383 goto try_again; 384 } 385 386 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) failed\n", 387 ionic_opcode_to_str(opcode), opcode, 388 ionic_error_to_str(err), err); 389 390 return ionic_error_to_errno(err); 391 } 392 393 return 0; 394 } 395 396 int ionic_setup(struct ionic *ionic) 397 { 398 int err; 399 400 err = ionic_dev_setup(ionic); 401 if (err) 402 return err; 403 404 return 0; 405 } 406 407 int ionic_identify(struct ionic *ionic) 408 { 409 struct ionic_identity *ident = &ionic->ident; 410 struct ionic_dev *idev = &ionic->idev; 411 size_t sz; 412 int err; 413 414 memset(ident, 0, sizeof(*ident)); 415 416 ident->drv.os_type = cpu_to_le32(IONIC_OS_TYPE_LINUX); 417 strncpy(ident->drv.driver_ver_str, IONIC_DRV_VERSION, 418 sizeof(ident->drv.driver_ver_str) - 1); 419 420 mutex_lock(&ionic->dev_cmd_lock); 421 422 sz = min(sizeof(ident->drv), sizeof(idev->dev_cmd_regs->data)); 423 memcpy_toio(&idev->dev_cmd_regs->data, &ident->drv, sz); 424 425 ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1); 426 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 427 if (!err) { 428 sz = min(sizeof(ident->dev), sizeof(idev->dev_cmd_regs->data)); 429 memcpy_fromio(&ident->dev, &idev->dev_cmd_regs->data, sz); 430 } 431 432 mutex_unlock(&ionic->dev_cmd_lock); 433 434 if (err) 435 goto err_out_unmap; 436 437 ionic_debugfs_add_ident(ionic); 438 439 return 0; 440 441 err_out_unmap: 442 return err; 443 } 444 445 int ionic_init(struct ionic *ionic) 446 { 447 struct ionic_dev *idev = &ionic->idev; 448 int err; 449 450 mutex_lock(&ionic->dev_cmd_lock); 451 ionic_dev_cmd_init(idev); 452 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 453 mutex_unlock(&ionic->dev_cmd_lock); 454 455 return err; 456 } 457 458 int ionic_reset(struct ionic *ionic) 459 { 460 struct ionic_dev *idev = &ionic->idev; 461 int err; 462 463 mutex_lock(&ionic->dev_cmd_lock); 464 ionic_dev_cmd_reset(idev); 465 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 466 mutex_unlock(&ionic->dev_cmd_lock); 467 468 return err; 469 } 470 471 int ionic_port_identify(struct ionic *ionic) 472 { 473 struct ionic_identity *ident = &ionic->ident; 474 struct ionic_dev *idev = &ionic->idev; 475 size_t sz; 476 int err; 477 478 mutex_lock(&ionic->dev_cmd_lock); 479 480 ionic_dev_cmd_port_identify(idev); 481 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 482 if (!err) { 483 sz = min(sizeof(ident->port), sizeof(idev->dev_cmd_regs->data)); 484 memcpy_fromio(&ident->port, &idev->dev_cmd_regs->data, sz); 485 } 486 487 mutex_unlock(&ionic->dev_cmd_lock); 488 489 return err; 490 } 491 492 int ionic_port_init(struct ionic *ionic) 493 { 494 struct ionic_identity *ident = &ionic->ident; 495 struct ionic_dev *idev = &ionic->idev; 496 size_t sz; 497 int err; 498 499 if (idev->port_info) 500 return 0; 501 502 idev->port_info_sz = ALIGN(sizeof(*idev->port_info), PAGE_SIZE); 503 idev->port_info = dma_alloc_coherent(ionic->dev, idev->port_info_sz, 504 &idev->port_info_pa, 505 GFP_KERNEL); 506 if (!idev->port_info) { 507 dev_err(ionic->dev, "Failed to allocate port info, aborting\n"); 508 return -ENOMEM; 509 } 510 511 sz = min(sizeof(ident->port.config), sizeof(idev->dev_cmd_regs->data)); 512 513 mutex_lock(&ionic->dev_cmd_lock); 514 515 memcpy_toio(&idev->dev_cmd_regs->data, &ident->port.config, sz); 516 ionic_dev_cmd_port_init(idev); 517 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 518 519 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP); 520 (void)ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 521 522 mutex_unlock(&ionic->dev_cmd_lock); 523 if (err) { 524 dev_err(ionic->dev, "Failed to init port\n"); 525 dma_free_coherent(ionic->dev, idev->port_info_sz, 526 idev->port_info, idev->port_info_pa); 527 idev->port_info = NULL; 528 idev->port_info_pa = 0; 529 } 530 531 return err; 532 } 533 534 int ionic_port_reset(struct ionic *ionic) 535 { 536 struct ionic_dev *idev = &ionic->idev; 537 int err; 538 539 if (!idev->port_info) 540 return 0; 541 542 mutex_lock(&ionic->dev_cmd_lock); 543 ionic_dev_cmd_port_reset(idev); 544 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 545 mutex_unlock(&ionic->dev_cmd_lock); 546 547 dma_free_coherent(ionic->dev, idev->port_info_sz, 548 idev->port_info, idev->port_info_pa); 549 550 idev->port_info = NULL; 551 idev->port_info_pa = 0; 552 553 if (err) 554 dev_err(ionic->dev, "Failed to reset port\n"); 555 556 return err; 557 } 558 559 static int __init ionic_init_module(void) 560 { 561 pr_info("%s %s, ver %s\n", 562 IONIC_DRV_NAME, IONIC_DRV_DESCRIPTION, IONIC_DRV_VERSION); 563 ionic_debugfs_create(); 564 return ionic_bus_register_driver(); 565 } 566 567 static void __exit ionic_cleanup_module(void) 568 { 569 ionic_bus_unregister_driver(); 570 ionic_debugfs_destroy(); 571 572 pr_info("%s removed\n", IONIC_DRV_NAME); 573 } 574 575 module_init(ionic_init_module); 576 module_exit(ionic_cleanup_module); 577