1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #include <linux/printk.h> 5 #include <linux/dynamic_debug.h> 6 #include <linux/module.h> 7 #include <linux/netdevice.h> 8 #include <linux/utsname.h> 9 #include <generated/utsrelease.h> 10 11 #include "ionic.h" 12 #include "ionic_bus.h" 13 #include "ionic_lif.h" 14 #include "ionic_debugfs.h" 15 16 MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION); 17 MODULE_AUTHOR("Pensando Systems, Inc"); 18 MODULE_LICENSE("GPL"); 19 20 static const char *ionic_error_to_str(enum ionic_status_code code) 21 { 22 switch (code) { 23 case IONIC_RC_SUCCESS: 24 return "IONIC_RC_SUCCESS"; 25 case IONIC_RC_EVERSION: 26 return "IONIC_RC_EVERSION"; 27 case IONIC_RC_EOPCODE: 28 return "IONIC_RC_EOPCODE"; 29 case IONIC_RC_EIO: 30 return "IONIC_RC_EIO"; 31 case IONIC_RC_EPERM: 32 return "IONIC_RC_EPERM"; 33 case IONIC_RC_EQID: 34 return "IONIC_RC_EQID"; 35 case IONIC_RC_EQTYPE: 36 return "IONIC_RC_EQTYPE"; 37 case IONIC_RC_ENOENT: 38 return "IONIC_RC_ENOENT"; 39 case IONIC_RC_EINTR: 40 return "IONIC_RC_EINTR"; 41 case IONIC_RC_EAGAIN: 42 return "IONIC_RC_EAGAIN"; 43 case IONIC_RC_ENOMEM: 44 return "IONIC_RC_ENOMEM"; 45 case IONIC_RC_EFAULT: 46 return "IONIC_RC_EFAULT"; 47 case IONIC_RC_EBUSY: 48 return "IONIC_RC_EBUSY"; 49 case IONIC_RC_EEXIST: 50 return "IONIC_RC_EEXIST"; 51 case IONIC_RC_EINVAL: 52 return "IONIC_RC_EINVAL"; 53 case IONIC_RC_ENOSPC: 54 return "IONIC_RC_ENOSPC"; 55 case IONIC_RC_ERANGE: 56 return "IONIC_RC_ERANGE"; 57 case IONIC_RC_BAD_ADDR: 58 return "IONIC_RC_BAD_ADDR"; 59 case IONIC_RC_DEV_CMD: 60 return "IONIC_RC_DEV_CMD"; 61 case IONIC_RC_ENOSUPP: 62 return "IONIC_RC_ENOSUPP"; 63 case IONIC_RC_ERROR: 64 return "IONIC_RC_ERROR"; 65 case IONIC_RC_ERDMA: 66 return "IONIC_RC_ERDMA"; 67 case IONIC_RC_EBAD_FW: 68 return "IONIC_RC_EBAD_FW"; 69 default: 70 return "IONIC_RC_UNKNOWN"; 71 } 72 } 73 74 static int ionic_error_to_errno(enum ionic_status_code code) 75 { 76 switch (code) { 77 case IONIC_RC_SUCCESS: 78 return 0; 79 case IONIC_RC_EVERSION: 80 case IONIC_RC_EQTYPE: 81 case IONIC_RC_EQID: 82 case IONIC_RC_EINVAL: 83 case IONIC_RC_ENOSUPP: 84 return -EINVAL; 85 case IONIC_RC_EPERM: 86 return -EPERM; 87 case IONIC_RC_ENOENT: 88 return -ENOENT; 89 case IONIC_RC_EAGAIN: 90 return -EAGAIN; 91 case IONIC_RC_ENOMEM: 92 return -ENOMEM; 93 case IONIC_RC_EFAULT: 94 return -EFAULT; 95 case IONIC_RC_EBUSY: 96 return -EBUSY; 97 case IONIC_RC_EEXIST: 98 return -EEXIST; 99 case IONIC_RC_ENOSPC: 100 return -ENOSPC; 101 case IONIC_RC_ERANGE: 102 return -ERANGE; 103 case IONIC_RC_BAD_ADDR: 104 return -EFAULT; 105 case IONIC_RC_EOPCODE: 106 case IONIC_RC_EINTR: 107 case IONIC_RC_DEV_CMD: 108 case IONIC_RC_ERROR: 109 case IONIC_RC_ERDMA: 110 case IONIC_RC_EIO: 111 default: 112 return -EIO; 113 } 114 } 115 116 static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode) 117 { 118 switch (opcode) { 119 case IONIC_CMD_NOP: 120 return "IONIC_CMD_NOP"; 121 case IONIC_CMD_INIT: 122 return "IONIC_CMD_INIT"; 123 case IONIC_CMD_RESET: 124 return "IONIC_CMD_RESET"; 125 case IONIC_CMD_IDENTIFY: 126 return "IONIC_CMD_IDENTIFY"; 127 case IONIC_CMD_GETATTR: 128 return "IONIC_CMD_GETATTR"; 129 case IONIC_CMD_SETATTR: 130 return "IONIC_CMD_SETATTR"; 131 case IONIC_CMD_PORT_IDENTIFY: 132 return "IONIC_CMD_PORT_IDENTIFY"; 133 case IONIC_CMD_PORT_INIT: 134 return "IONIC_CMD_PORT_INIT"; 135 case IONIC_CMD_PORT_RESET: 136 return "IONIC_CMD_PORT_RESET"; 137 case IONIC_CMD_PORT_GETATTR: 138 return "IONIC_CMD_PORT_GETATTR"; 139 case IONIC_CMD_PORT_SETATTR: 140 return "IONIC_CMD_PORT_SETATTR"; 141 case IONIC_CMD_LIF_INIT: 142 return "IONIC_CMD_LIF_INIT"; 143 case IONIC_CMD_LIF_RESET: 144 return "IONIC_CMD_LIF_RESET"; 145 case IONIC_CMD_LIF_IDENTIFY: 146 return "IONIC_CMD_LIF_IDENTIFY"; 147 case IONIC_CMD_LIF_SETATTR: 148 return "IONIC_CMD_LIF_SETATTR"; 149 case IONIC_CMD_LIF_GETATTR: 150 return "IONIC_CMD_LIF_GETATTR"; 151 case IONIC_CMD_RX_MODE_SET: 152 return "IONIC_CMD_RX_MODE_SET"; 153 case IONIC_CMD_RX_FILTER_ADD: 154 return "IONIC_CMD_RX_FILTER_ADD"; 155 case IONIC_CMD_RX_FILTER_DEL: 156 return "IONIC_CMD_RX_FILTER_DEL"; 157 case IONIC_CMD_Q_IDENTIFY: 158 return "IONIC_CMD_Q_IDENTIFY"; 159 case IONIC_CMD_Q_INIT: 160 return "IONIC_CMD_Q_INIT"; 161 case IONIC_CMD_Q_CONTROL: 162 return "IONIC_CMD_Q_CONTROL"; 163 case IONIC_CMD_RDMA_RESET_LIF: 164 return "IONIC_CMD_RDMA_RESET_LIF"; 165 case IONIC_CMD_RDMA_CREATE_EQ: 166 return "IONIC_CMD_RDMA_CREATE_EQ"; 167 case IONIC_CMD_RDMA_CREATE_CQ: 168 return "IONIC_CMD_RDMA_CREATE_CQ"; 169 case IONIC_CMD_RDMA_CREATE_ADMINQ: 170 return "IONIC_CMD_RDMA_CREATE_ADMINQ"; 171 case IONIC_CMD_FW_DOWNLOAD: 172 return "IONIC_CMD_FW_DOWNLOAD"; 173 case IONIC_CMD_FW_CONTROL: 174 return "IONIC_CMD_FW_CONTROL"; 175 case IONIC_CMD_FW_DOWNLOAD_V1: 176 return "IONIC_CMD_FW_DOWNLOAD_V1"; 177 case IONIC_CMD_FW_CONTROL_V1: 178 return "IONIC_CMD_FW_CONTROL_V1"; 179 case IONIC_CMD_VF_GETATTR: 180 return "IONIC_CMD_VF_GETATTR"; 181 case IONIC_CMD_VF_SETATTR: 182 return "IONIC_CMD_VF_SETATTR"; 183 default: 184 return "DEVCMD_UNKNOWN"; 185 } 186 } 187 188 static void ionic_adminq_flush(struct ionic_lif *lif) 189 { 190 struct ionic_desc_info *desc_info; 191 unsigned long irqflags; 192 struct ionic_queue *q; 193 194 spin_lock_irqsave(&lif->adminq_lock, irqflags); 195 if (!lif->adminqcq) { 196 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 197 return; 198 } 199 200 q = &lif->adminqcq->q; 201 202 while (q->tail_idx != q->head_idx) { 203 desc_info = &q->info[q->tail_idx]; 204 memset(desc_info->desc, 0, sizeof(union ionic_adminq_cmd)); 205 desc_info->cb = NULL; 206 desc_info->cb_arg = NULL; 207 q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1); 208 } 209 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 210 } 211 212 static int ionic_adminq_check_err(struct ionic_lif *lif, 213 struct ionic_admin_ctx *ctx, 214 bool timeout) 215 { 216 struct net_device *netdev = lif->netdev; 217 const char *opcode_str; 218 const char *status_str; 219 int err = 0; 220 221 if (ctx->comp.comp.status || timeout) { 222 opcode_str = ionic_opcode_to_str(ctx->cmd.cmd.opcode); 223 status_str = ionic_error_to_str(ctx->comp.comp.status); 224 err = timeout ? -ETIMEDOUT : 225 ionic_error_to_errno(ctx->comp.comp.status); 226 227 netdev_err(netdev, "%s (%d) failed: %s (%d)\n", 228 opcode_str, ctx->cmd.cmd.opcode, 229 timeout ? "TIMEOUT" : status_str, err); 230 231 if (timeout) 232 ionic_adminq_flush(lif); 233 } 234 235 return err; 236 } 237 238 static void ionic_adminq_cb(struct ionic_queue *q, 239 struct ionic_desc_info *desc_info, 240 struct ionic_cq_info *cq_info, void *cb_arg) 241 { 242 struct ionic_admin_ctx *ctx = cb_arg; 243 struct ionic_admin_comp *comp; 244 245 if (!ctx) 246 return; 247 248 comp = cq_info->cq_desc; 249 250 memcpy(&ctx->comp, comp, sizeof(*comp)); 251 252 dev_dbg(q->dev, "comp admin queue command:\n"); 253 dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1, 254 &ctx->comp, sizeof(ctx->comp), true); 255 256 complete_all(&ctx->work); 257 } 258 259 static int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 260 { 261 struct ionic_desc_info *desc_info; 262 unsigned long irqflags; 263 struct ionic_queue *q; 264 int err = 0; 265 266 spin_lock_irqsave(&lif->adminq_lock, irqflags); 267 if (!lif->adminqcq) { 268 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 269 return -EIO; 270 } 271 272 q = &lif->adminqcq->q; 273 274 if (!ionic_q_has_space(q, 1)) { 275 err = -ENOSPC; 276 goto err_out; 277 } 278 279 err = ionic_heartbeat_check(lif->ionic); 280 if (err) 281 goto err_out; 282 283 desc_info = &q->info[q->head_idx]; 284 memcpy(desc_info->desc, &ctx->cmd, sizeof(ctx->cmd)); 285 286 dev_dbg(&lif->netdev->dev, "post admin queue command:\n"); 287 dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1, 288 &ctx->cmd, sizeof(ctx->cmd), true); 289 290 ionic_q_post(q, true, ionic_adminq_cb, ctx); 291 292 err_out: 293 spin_unlock_irqrestore(&lif->adminq_lock, irqflags); 294 295 return err; 296 } 297 298 int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 299 { 300 struct net_device *netdev = lif->netdev; 301 unsigned long remaining; 302 const char *name; 303 int err; 304 305 err = ionic_adminq_post(lif, ctx); 306 if (err) { 307 if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) { 308 name = ionic_opcode_to_str(ctx->cmd.cmd.opcode); 309 netdev_err(netdev, "Posting of %s (%d) failed: %d\n", 310 name, ctx->cmd.cmd.opcode, err); 311 } 312 return err; 313 } 314 315 remaining = wait_for_completion_timeout(&ctx->work, 316 HZ * (ulong)DEVCMD_TIMEOUT); 317 return ionic_adminq_check_err(lif, ctx, (remaining == 0)); 318 } 319 320 static void ionic_dev_cmd_clean(struct ionic *ionic) 321 { 322 union __iomem ionic_dev_cmd_regs *regs = ionic->idev.dev_cmd_regs; 323 324 iowrite32(0, ®s->doorbell); 325 memset_io(®s->cmd, 0, sizeof(regs->cmd)); 326 } 327 328 int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds) 329 { 330 struct ionic_dev *idev = &ionic->idev; 331 unsigned long start_time; 332 unsigned long max_wait; 333 unsigned long duration; 334 int opcode; 335 int hb = 0; 336 int done; 337 int err; 338 339 /* Wait for dev cmd to complete, retrying if we get EAGAIN, 340 * but don't wait any longer than max_seconds. 341 */ 342 max_wait = jiffies + (max_seconds * HZ); 343 try_again: 344 opcode = readb(&idev->dev_cmd_regs->cmd.cmd.opcode); 345 start_time = jiffies; 346 do { 347 done = ionic_dev_cmd_done(idev); 348 if (done) 349 break; 350 usleep_range(100, 200); 351 352 /* Don't check the heartbeat on FW_CONTROL commands as they are 353 * notorious for interrupting the firmware's heartbeat update. 354 */ 355 if (opcode != IONIC_CMD_FW_CONTROL) 356 hb = ionic_heartbeat_check(ionic); 357 } while (!done && !hb && time_before(jiffies, max_wait)); 358 duration = jiffies - start_time; 359 360 dev_dbg(ionic->dev, "DEVCMD %s (%d) done=%d took %ld secs (%ld jiffies)\n", 361 ionic_opcode_to_str(opcode), opcode, 362 done, duration / HZ, duration); 363 364 if (!done && hb) { 365 /* It is possible (but unlikely) that FW was busy and missed a 366 * heartbeat check but is still alive and will process this 367 * request, so don't clean the dev_cmd in this case. 368 */ 369 dev_warn(ionic->dev, "DEVCMD %s (%d) failed - FW halted\n", 370 ionic_opcode_to_str(opcode), opcode); 371 return -ENXIO; 372 } 373 374 if (!done && !time_before(jiffies, max_wait)) { 375 ionic_dev_cmd_clean(ionic); 376 dev_warn(ionic->dev, "DEVCMD %s (%d) timeout after %ld secs\n", 377 ionic_opcode_to_str(opcode), opcode, max_seconds); 378 return -ETIMEDOUT; 379 } 380 381 err = ionic_dev_cmd_status(&ionic->idev); 382 if (err) { 383 if (err == IONIC_RC_EAGAIN && 384 time_before(jiffies, (max_wait - HZ))) { 385 dev_dbg(ionic->dev, "DEV_CMD %s (%d), %s (%d) retrying...\n", 386 ionic_opcode_to_str(opcode), opcode, 387 ionic_error_to_str(err), err); 388 389 msleep(1000); 390 iowrite32(0, &idev->dev_cmd_regs->done); 391 iowrite32(1, &idev->dev_cmd_regs->doorbell); 392 goto try_again; 393 } 394 395 if (!(opcode == IONIC_CMD_FW_CONTROL && err == IONIC_RC_EAGAIN)) 396 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) failed\n", 397 ionic_opcode_to_str(opcode), opcode, 398 ionic_error_to_str(err), err); 399 400 return ionic_error_to_errno(err); 401 } 402 403 return 0; 404 } 405 406 int ionic_setup(struct ionic *ionic) 407 { 408 int err; 409 410 err = ionic_dev_setup(ionic); 411 if (err) 412 return err; 413 ionic_reset(ionic); 414 415 return 0; 416 } 417 418 int ionic_identify(struct ionic *ionic) 419 { 420 struct ionic_identity *ident = &ionic->ident; 421 struct ionic_dev *idev = &ionic->idev; 422 size_t sz; 423 int err; 424 425 memset(ident, 0, sizeof(*ident)); 426 427 ident->drv.os_type = cpu_to_le32(IONIC_OS_TYPE_LINUX); 428 strncpy(ident->drv.driver_ver_str, UTS_RELEASE, 429 sizeof(ident->drv.driver_ver_str) - 1); 430 431 mutex_lock(&ionic->dev_cmd_lock); 432 433 sz = min(sizeof(ident->drv), sizeof(idev->dev_cmd_regs->data)); 434 memcpy_toio(&idev->dev_cmd_regs->data, &ident->drv, sz); 435 436 ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1); 437 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 438 if (!err) { 439 sz = min(sizeof(ident->dev), sizeof(idev->dev_cmd_regs->data)); 440 memcpy_fromio(&ident->dev, &idev->dev_cmd_regs->data, sz); 441 } 442 mutex_unlock(&ionic->dev_cmd_lock); 443 444 if (err) { 445 dev_err(ionic->dev, "Cannot identify ionic: %dn", err); 446 goto err_out; 447 } 448 449 err = ionic_lif_identify(ionic, IONIC_LIF_TYPE_CLASSIC, 450 &ionic->ident.lif); 451 if (err) { 452 dev_err(ionic->dev, "Cannot identify LIFs: %d\n", err); 453 goto err_out; 454 } 455 456 return 0; 457 458 err_out: 459 return err; 460 } 461 462 int ionic_init(struct ionic *ionic) 463 { 464 struct ionic_dev *idev = &ionic->idev; 465 int err; 466 467 mutex_lock(&ionic->dev_cmd_lock); 468 ionic_dev_cmd_init(idev); 469 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 470 mutex_unlock(&ionic->dev_cmd_lock); 471 472 return err; 473 } 474 475 int ionic_reset(struct ionic *ionic) 476 { 477 struct ionic_dev *idev = &ionic->idev; 478 int err; 479 480 mutex_lock(&ionic->dev_cmd_lock); 481 ionic_dev_cmd_reset(idev); 482 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 483 mutex_unlock(&ionic->dev_cmd_lock); 484 485 return err; 486 } 487 488 int ionic_port_identify(struct ionic *ionic) 489 { 490 struct ionic_identity *ident = &ionic->ident; 491 struct ionic_dev *idev = &ionic->idev; 492 size_t sz; 493 int err; 494 495 mutex_lock(&ionic->dev_cmd_lock); 496 497 ionic_dev_cmd_port_identify(idev); 498 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 499 if (!err) { 500 sz = min(sizeof(ident->port), sizeof(idev->dev_cmd_regs->data)); 501 memcpy_fromio(&ident->port, &idev->dev_cmd_regs->data, sz); 502 } 503 504 mutex_unlock(&ionic->dev_cmd_lock); 505 506 return err; 507 } 508 509 int ionic_port_init(struct ionic *ionic) 510 { 511 struct ionic_identity *ident = &ionic->ident; 512 struct ionic_dev *idev = &ionic->idev; 513 size_t sz; 514 int err; 515 516 if (!idev->port_info) { 517 idev->port_info_sz = ALIGN(sizeof(*idev->port_info), PAGE_SIZE); 518 idev->port_info = dma_alloc_coherent(ionic->dev, 519 idev->port_info_sz, 520 &idev->port_info_pa, 521 GFP_KERNEL); 522 if (!idev->port_info) 523 return -ENOMEM; 524 } 525 526 sz = min(sizeof(ident->port.config), sizeof(idev->dev_cmd_regs->data)); 527 528 mutex_lock(&ionic->dev_cmd_lock); 529 530 memcpy_toio(&idev->dev_cmd_regs->data, &ident->port.config, sz); 531 ionic_dev_cmd_port_init(idev); 532 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 533 534 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP); 535 (void)ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 536 537 mutex_unlock(&ionic->dev_cmd_lock); 538 if (err) { 539 dev_err(ionic->dev, "Failed to init port\n"); 540 dma_free_coherent(ionic->dev, idev->port_info_sz, 541 idev->port_info, idev->port_info_pa); 542 idev->port_info = NULL; 543 idev->port_info_pa = 0; 544 } 545 546 return err; 547 } 548 549 int ionic_port_reset(struct ionic *ionic) 550 { 551 struct ionic_dev *idev = &ionic->idev; 552 int err; 553 554 if (!idev->port_info) 555 return 0; 556 557 mutex_lock(&ionic->dev_cmd_lock); 558 ionic_dev_cmd_port_reset(idev); 559 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT); 560 mutex_unlock(&ionic->dev_cmd_lock); 561 562 dma_free_coherent(ionic->dev, idev->port_info_sz, 563 idev->port_info, idev->port_info_pa); 564 565 idev->port_info = NULL; 566 idev->port_info_pa = 0; 567 568 if (err) 569 dev_err(ionic->dev, "Failed to reset port\n"); 570 571 return err; 572 } 573 574 static int __init ionic_init_module(void) 575 { 576 ionic_debugfs_create(); 577 return ionic_bus_register_driver(); 578 } 579 580 static void __exit ionic_cleanup_module(void) 581 { 582 ionic_bus_unregister_driver(); 583 ionic_debugfs_destroy(); 584 585 pr_info("%s removed\n", IONIC_DRV_NAME); 586 } 587 588 module_init(ionic_init_module); 589 module_exit(ionic_cleanup_module); 590