1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #ifndef _IONIC_LIF_H_ 5 #define _IONIC_LIF_H_ 6 7 #include <linux/ptp_clock_kernel.h> 8 #include <linux/timecounter.h> 9 #include <uapi/linux/net_tstamp.h> 10 #include <linux/dim.h> 11 #include <linux/pci.h> 12 #include "ionic_rx_filter.h" 13 14 #define IONIC_ADMINQ_LENGTH 16 /* must be a power of two */ 15 #define IONIC_NOTIFYQ_LENGTH 64 /* must be a power of two */ 16 17 #define ADD_ADDR true 18 #define DEL_ADDR false 19 #define CAN_SLEEP true 20 #define CAN_NOT_SLEEP false 21 22 #define IONIC_RX_COPYBREAK_DEFAULT 256 23 #define IONIC_TX_BUDGET_DEFAULT 256 24 25 struct ionic_tx_stats { 26 u64 pkts; 27 u64 bytes; 28 u64 csum_none; 29 u64 csum; 30 u64 tso; 31 u64 tso_bytes; 32 u64 frags; 33 u64 vlan_inserted; 34 u64 clean; 35 u64 linearize; 36 u64 crc32_csum; 37 u64 dma_map_err; 38 u64 hwstamp_valid; 39 u64 hwstamp_invalid; 40 }; 41 42 struct ionic_rx_stats { 43 u64 pkts; 44 u64 bytes; 45 u64 csum_none; 46 u64 csum_complete; 47 u64 dropped; 48 u64 vlan_stripped; 49 u64 csum_error; 50 u64 dma_map_err; 51 u64 alloc_err; 52 u64 hwstamp_valid; 53 u64 hwstamp_invalid; 54 }; 55 56 #define IONIC_QCQ_F_INITED BIT(0) 57 #define IONIC_QCQ_F_SG BIT(1) 58 #define IONIC_QCQ_F_INTR BIT(2) 59 #define IONIC_QCQ_F_TX_STATS BIT(3) 60 #define IONIC_QCQ_F_RX_STATS BIT(4) 61 #define IONIC_QCQ_F_NOTIFYQ BIT(5) 62 63 struct ionic_qcq { 64 void *q_base; 65 dma_addr_t q_base_pa; 66 u32 q_size; 67 void *cq_base; 68 dma_addr_t cq_base_pa; 69 u32 cq_size; 70 void *sg_base; 71 dma_addr_t sg_base_pa; 72 u32 sg_size; 73 struct dim dim; 74 struct ionic_queue q; 75 struct ionic_cq cq; 76 struct ionic_intr_info intr; 77 struct timer_list napi_deadline; 78 struct napi_struct napi; 79 unsigned int flags; 80 struct ionic_qcq *napi_qcq; 81 struct dentry *dentry; 82 }; 83 84 #define q_to_qcq(q) container_of(q, struct ionic_qcq, q) 85 #define q_to_tx_stats(q) (&(q)->lif->txqstats[(q)->index]) 86 #define q_to_rx_stats(q) (&(q)->lif->rxqstats[(q)->index]) 87 #define napi_to_qcq(napi) container_of(napi, struct ionic_qcq, napi) 88 #define napi_to_cq(napi) (&napi_to_qcq(napi)->cq) 89 90 enum ionic_deferred_work_type { 91 IONIC_DW_TYPE_RX_MODE, 92 IONIC_DW_TYPE_LINK_STATUS, 93 IONIC_DW_TYPE_LIF_RESET, 94 }; 95 96 struct ionic_deferred_work { 97 struct list_head list; 98 enum ionic_deferred_work_type type; 99 union { 100 u8 addr[ETH_ALEN]; 101 u8 fw_status; 102 }; 103 }; 104 105 struct ionic_deferred { 106 spinlock_t lock; /* lock for deferred work list */ 107 struct list_head list; 108 struct work_struct work; 109 }; 110 111 struct ionic_lif_sw_stats { 112 u64 tx_packets; 113 u64 tx_bytes; 114 u64 rx_packets; 115 u64 rx_bytes; 116 u64 tx_tso; 117 u64 tx_tso_bytes; 118 u64 tx_csum_none; 119 u64 tx_csum; 120 u64 rx_csum_none; 121 u64 rx_csum_complete; 122 u64 rx_csum_error; 123 u64 tx_hwstamp_valid; 124 u64 tx_hwstamp_invalid; 125 u64 rx_hwstamp_valid; 126 u64 rx_hwstamp_invalid; 127 u64 hw_tx_dropped; 128 u64 hw_rx_dropped; 129 u64 hw_rx_over_errors; 130 u64 hw_rx_missed_errors; 131 u64 hw_tx_aborted_errors; 132 }; 133 134 enum ionic_lif_state_flags { 135 IONIC_LIF_F_INITED, 136 IONIC_LIF_F_UP, 137 IONIC_LIF_F_LINK_CHECK_REQUESTED, 138 IONIC_LIF_F_FILTER_SYNC_NEEDED, 139 IONIC_LIF_F_FW_RESET, 140 IONIC_LIF_F_FW_STOPPING, 141 IONIC_LIF_F_SPLIT_INTR, 142 IONIC_LIF_F_BROKEN, 143 IONIC_LIF_F_TX_DIM_INTR, 144 IONIC_LIF_F_RX_DIM_INTR, 145 146 /* leave this as last */ 147 IONIC_LIF_F_STATE_SIZE 148 }; 149 150 struct ionic_qtype_info { 151 u8 version; 152 u8 supported; 153 u64 features; 154 u16 desc_sz; 155 u16 comp_sz; 156 u16 sg_desc_sz; 157 u16 max_sg_elems; 158 u16 sg_desc_stride; 159 }; 160 161 struct ionic_phc; 162 163 #define IONIC_LIF_NAME_MAX_SZ 32 164 struct ionic_lif { 165 struct net_device *netdev; 166 DECLARE_BITMAP(state, IONIC_LIF_F_STATE_SIZE); 167 struct ionic *ionic; 168 unsigned int index; 169 unsigned int hw_index; 170 struct mutex queue_lock; /* lock for queue structures */ 171 struct mutex config_lock; /* lock for config actions */ 172 spinlock_t adminq_lock; /* lock for AdminQ operations */ 173 struct ionic_qcq *adminqcq; 174 struct ionic_qcq *notifyqcq; 175 struct ionic_qcq **txqcqs; 176 struct ionic_qcq *hwstamp_txq; 177 struct ionic_tx_stats *txqstats; 178 struct ionic_qcq **rxqcqs; 179 struct ionic_qcq *hwstamp_rxq; 180 struct ionic_rx_stats *rxqstats; 181 struct ionic_deferred deferred; 182 struct work_struct tx_timeout_work; 183 u64 last_eid; 184 unsigned int kern_pid; 185 u64 __iomem *kern_dbpage; 186 unsigned int neqs; 187 unsigned int nxqs; 188 unsigned int ntxq_descs; 189 unsigned int nrxq_descs; 190 u32 rx_copybreak; 191 u64 rxq_features; 192 u16 rx_mode; 193 u64 hw_features; 194 bool registered; 195 u16 lif_type; 196 unsigned int nmcast; 197 unsigned int nucast; 198 unsigned int nvlans; 199 unsigned int max_vlans; 200 char name[IONIC_LIF_NAME_MAX_SZ]; 201 202 union ionic_lif_identity *identity; 203 struct ionic_lif_info *info; 204 dma_addr_t info_pa; 205 u32 info_sz; 206 struct ionic_qtype_info qtype_info[IONIC_QTYPE_MAX]; 207 208 u16 rss_types; 209 u8 rss_hash_key[IONIC_RSS_HASH_KEY_SIZE]; 210 u8 *rss_ind_tbl; 211 dma_addr_t rss_ind_tbl_pa; 212 u32 rss_ind_tbl_sz; 213 214 struct ionic_rx_filters rx_filters; 215 u32 rx_coalesce_usecs; /* what the user asked for */ 216 u32 rx_coalesce_hw; /* what the hw is using */ 217 u32 tx_coalesce_usecs; /* what the user asked for */ 218 u32 tx_coalesce_hw; /* what the hw is using */ 219 unsigned int dbid_count; 220 221 struct ionic_phc *phc; 222 223 struct dentry *dentry; 224 }; 225 226 struct ionic_phc { 227 spinlock_t lock; /* lock for cc and tc */ 228 struct cyclecounter cc; 229 struct timecounter tc; 230 231 struct mutex config_lock; /* lock for ts_config */ 232 struct hwtstamp_config ts_config; 233 u64 ts_config_rx_filt; 234 u32 ts_config_tx_mode; 235 236 u32 init_cc_mult; 237 long aux_work_delay; 238 239 struct ptp_clock_info ptp_info; 240 struct ptp_clock *ptp; 241 struct ionic_lif *lif; 242 }; 243 244 struct ionic_queue_params { 245 unsigned int nxqs; 246 unsigned int ntxq_descs; 247 unsigned int nrxq_descs; 248 unsigned int intr_split; 249 u64 rxq_features; 250 }; 251 252 static inline void ionic_init_queue_params(struct ionic_lif *lif, 253 struct ionic_queue_params *qparam) 254 { 255 qparam->nxqs = lif->nxqs; 256 qparam->ntxq_descs = lif->ntxq_descs; 257 qparam->nrxq_descs = lif->nrxq_descs; 258 qparam->intr_split = test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 259 qparam->rxq_features = lif->rxq_features; 260 } 261 262 static inline u32 ionic_coal_usec_to_hw(struct ionic *ionic, u32 usecs) 263 { 264 u32 mult = le32_to_cpu(ionic->ident.dev.intr_coal_mult); 265 u32 div = le32_to_cpu(ionic->ident.dev.intr_coal_div); 266 267 /* Div-by-zero should never be an issue, but check anyway */ 268 if (!div || !mult) 269 return 0; 270 271 /* Round up in case usecs is close to the next hw unit */ 272 usecs += (div / mult) >> 1; 273 274 /* Convert from usecs to device units */ 275 return (usecs * mult) / div; 276 } 277 278 void ionic_link_status_check_request(struct ionic_lif *lif, bool can_sleep); 279 void ionic_get_stats64(struct net_device *netdev, 280 struct rtnl_link_stats64 *ns); 281 void ionic_lif_deferred_enqueue(struct ionic_deferred *def, 282 struct ionic_deferred_work *work); 283 int ionic_lif_alloc(struct ionic *ionic); 284 int ionic_lif_init(struct ionic_lif *lif); 285 void ionic_lif_free(struct ionic_lif *lif); 286 void ionic_lif_deinit(struct ionic_lif *lif); 287 288 int ionic_lif_addr_add(struct ionic_lif *lif, const u8 *addr); 289 int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr); 290 291 int ionic_lif_register(struct ionic_lif *lif); 292 void ionic_lif_unregister(struct ionic_lif *lif); 293 int ionic_lif_identify(struct ionic *ionic, u8 lif_type, 294 union ionic_lif_identity *lif_ident); 295 int ionic_lif_size(struct ionic *ionic); 296 297 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) 298 void ionic_lif_hwstamp_replay(struct ionic_lif *lif); 299 void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif); 300 int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr); 301 int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr); 302 ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter); 303 void ionic_lif_register_phc(struct ionic_lif *lif); 304 void ionic_lif_unregister_phc(struct ionic_lif *lif); 305 void ionic_lif_alloc_phc(struct ionic_lif *lif); 306 void ionic_lif_free_phc(struct ionic_lif *lif); 307 #else 308 static inline void ionic_lif_hwstamp_replay(struct ionic_lif *lif) {} 309 static inline void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif) {} 310 311 static inline int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr) 312 { 313 return -EOPNOTSUPP; 314 } 315 316 static inline int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr) 317 { 318 return -EOPNOTSUPP; 319 } 320 321 static inline ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter) 322 { 323 return ns_to_ktime(0); 324 } 325 326 static inline void ionic_lif_register_phc(struct ionic_lif *lif) {} 327 static inline void ionic_lif_unregister_phc(struct ionic_lif *lif) {} 328 static inline void ionic_lif_alloc_phc(struct ionic_lif *lif) {} 329 static inline void ionic_lif_free_phc(struct ionic_lif *lif) {} 330 #endif 331 332 int ionic_lif_create_hwstamp_txq(struct ionic_lif *lif); 333 int ionic_lif_create_hwstamp_rxq(struct ionic_lif *lif); 334 int ionic_lif_config_hwstamp_rxq_all(struct ionic_lif *lif, bool rx_all); 335 int ionic_lif_set_hwstamp_txmode(struct ionic_lif *lif, u16 txstamp_mode); 336 int ionic_lif_set_hwstamp_rxfilt(struct ionic_lif *lif, u64 pkt_class); 337 338 int ionic_lif_rss_config(struct ionic_lif *lif, u16 types, 339 const u8 *key, const u32 *indir); 340 void ionic_lif_rx_mode(struct ionic_lif *lif); 341 int ionic_reconfigure_queues(struct ionic_lif *lif, 342 struct ionic_queue_params *qparam); 343 #endif /* _IONIC_LIF_H_ */ 344