1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #ifndef _IONIC_DEV_H_ 5 #define _IONIC_DEV_H_ 6 7 #include <linux/mutex.h> 8 #include <linux/workqueue.h> 9 10 #include "ionic_if.h" 11 #include "ionic_regs.h" 12 13 #define IONIC_MAX_TX_DESC 8192 14 #define IONIC_MAX_RX_DESC 16384 15 #define IONIC_MIN_TXRX_DESC 64 16 #define IONIC_DEF_TXRX_DESC 4096 17 #define IONIC_RX_FILL_THRESHOLD 16 18 #define IONIC_RX_FILL_DIV 8 19 #define IONIC_LIFS_MAX 1024 20 #define IONIC_WATCHDOG_SECS 5 21 #define IONIC_ITR_COAL_USEC_DEFAULT 64 22 23 #define IONIC_DEV_CMD_REG_VERSION 1 24 #define IONIC_DEV_INFO_REG_COUNT 32 25 #define IONIC_DEV_CMD_REG_COUNT 32 26 27 struct ionic_dev_bar { 28 void __iomem *vaddr; 29 phys_addr_t bus_addr; 30 unsigned long len; 31 int res_index; 32 }; 33 34 #ifndef __CHECKER__ 35 /* Registers */ 36 static_assert(sizeof(struct ionic_intr) == 32); 37 38 static_assert(sizeof(struct ionic_doorbell) == 8); 39 static_assert(sizeof(struct ionic_intr_status) == 8); 40 static_assert(sizeof(union ionic_dev_regs) == 4096); 41 static_assert(sizeof(union ionic_dev_info_regs) == 2048); 42 static_assert(sizeof(union ionic_dev_cmd_regs) == 2048); 43 static_assert(sizeof(struct ionic_lif_stats) == 1024); 44 45 static_assert(sizeof(struct ionic_admin_cmd) == 64); 46 static_assert(sizeof(struct ionic_admin_comp) == 16); 47 static_assert(sizeof(struct ionic_nop_cmd) == 64); 48 static_assert(sizeof(struct ionic_nop_comp) == 16); 49 50 /* Device commands */ 51 static_assert(sizeof(struct ionic_dev_identify_cmd) == 64); 52 static_assert(sizeof(struct ionic_dev_identify_comp) == 16); 53 static_assert(sizeof(struct ionic_dev_init_cmd) == 64); 54 static_assert(sizeof(struct ionic_dev_init_comp) == 16); 55 static_assert(sizeof(struct ionic_dev_reset_cmd) == 64); 56 static_assert(sizeof(struct ionic_dev_reset_comp) == 16); 57 static_assert(sizeof(struct ionic_dev_getattr_cmd) == 64); 58 static_assert(sizeof(struct ionic_dev_getattr_comp) == 16); 59 static_assert(sizeof(struct ionic_dev_setattr_cmd) == 64); 60 static_assert(sizeof(struct ionic_dev_setattr_comp) == 16); 61 62 /* Port commands */ 63 static_assert(sizeof(struct ionic_port_identify_cmd) == 64); 64 static_assert(sizeof(struct ionic_port_identify_comp) == 16); 65 static_assert(sizeof(struct ionic_port_init_cmd) == 64); 66 static_assert(sizeof(struct ionic_port_init_comp) == 16); 67 static_assert(sizeof(struct ionic_port_reset_cmd) == 64); 68 static_assert(sizeof(struct ionic_port_reset_comp) == 16); 69 static_assert(sizeof(struct ionic_port_getattr_cmd) == 64); 70 static_assert(sizeof(struct ionic_port_getattr_comp) == 16); 71 static_assert(sizeof(struct ionic_port_setattr_cmd) == 64); 72 static_assert(sizeof(struct ionic_port_setattr_comp) == 16); 73 74 /* LIF commands */ 75 static_assert(sizeof(struct ionic_lif_init_cmd) == 64); 76 static_assert(sizeof(struct ionic_lif_init_comp) == 16); 77 static_assert(sizeof(struct ionic_lif_reset_cmd) == 64); 78 static_assert(sizeof(ionic_lif_reset_comp) == 16); 79 static_assert(sizeof(struct ionic_lif_getattr_cmd) == 64); 80 static_assert(sizeof(struct ionic_lif_getattr_comp) == 16); 81 static_assert(sizeof(struct ionic_lif_setattr_cmd) == 64); 82 static_assert(sizeof(struct ionic_lif_setattr_comp) == 16); 83 84 static_assert(sizeof(struct ionic_q_init_cmd) == 64); 85 static_assert(sizeof(struct ionic_q_init_comp) == 16); 86 static_assert(sizeof(struct ionic_q_control_cmd) == 64); 87 static_assert(sizeof(ionic_q_control_comp) == 16); 88 static_assert(sizeof(struct ionic_q_identify_cmd) == 64); 89 static_assert(sizeof(struct ionic_q_identify_comp) == 16); 90 91 static_assert(sizeof(struct ionic_rx_mode_set_cmd) == 64); 92 static_assert(sizeof(ionic_rx_mode_set_comp) == 16); 93 static_assert(sizeof(struct ionic_rx_filter_add_cmd) == 64); 94 static_assert(sizeof(struct ionic_rx_filter_add_comp) == 16); 95 static_assert(sizeof(struct ionic_rx_filter_del_cmd) == 64); 96 static_assert(sizeof(ionic_rx_filter_del_comp) == 16); 97 98 /* RDMA commands */ 99 static_assert(sizeof(struct ionic_rdma_reset_cmd) == 64); 100 static_assert(sizeof(struct ionic_rdma_queue_cmd) == 64); 101 102 /* Events */ 103 static_assert(sizeof(struct ionic_notifyq_cmd) == 4); 104 static_assert(sizeof(union ionic_notifyq_comp) == 64); 105 static_assert(sizeof(struct ionic_notifyq_event) == 64); 106 static_assert(sizeof(struct ionic_link_change_event) == 64); 107 static_assert(sizeof(struct ionic_reset_event) == 64); 108 static_assert(sizeof(struct ionic_heartbeat_event) == 64); 109 static_assert(sizeof(struct ionic_log_event) == 64); 110 111 /* I/O */ 112 static_assert(sizeof(struct ionic_txq_desc) == 16); 113 static_assert(sizeof(struct ionic_txq_sg_desc) == 128); 114 static_assert(sizeof(struct ionic_txq_comp) == 16); 115 116 static_assert(sizeof(struct ionic_rxq_desc) == 16); 117 static_assert(sizeof(struct ionic_rxq_sg_desc) == 128); 118 static_assert(sizeof(struct ionic_rxq_comp) == 16); 119 120 /* SR/IOV */ 121 static_assert(sizeof(struct ionic_vf_setattr_cmd) == 64); 122 static_assert(sizeof(struct ionic_vf_setattr_comp) == 16); 123 static_assert(sizeof(struct ionic_vf_getattr_cmd) == 64); 124 static_assert(sizeof(struct ionic_vf_getattr_comp) == 16); 125 #endif /* __CHECKER__ */ 126 127 struct ionic_devinfo { 128 u8 asic_type; 129 u8 asic_rev; 130 char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN + 1]; 131 char serial_num[IONIC_DEVINFO_SERIAL_BUFLEN + 1]; 132 }; 133 134 struct ionic_dev { 135 union ionic_dev_info_regs __iomem *dev_info_regs; 136 union ionic_dev_cmd_regs __iomem *dev_cmd_regs; 137 138 unsigned long last_hb_time; 139 u32 last_hb; 140 u8 last_fw_status; 141 142 u64 __iomem *db_pages; 143 dma_addr_t phy_db_pages; 144 145 struct ionic_intr __iomem *intr_ctrl; 146 u64 __iomem *intr_status; 147 148 u32 port_info_sz; 149 struct ionic_port_info *port_info; 150 dma_addr_t port_info_pa; 151 152 struct ionic_devinfo dev_info; 153 }; 154 155 struct ionic_cq_info { 156 union { 157 void *cq_desc; 158 struct ionic_txq_comp *txcq; 159 struct ionic_rxq_comp *rxcq; 160 struct ionic_admin_comp *admincq; 161 struct ionic_notifyq_event *notifyq; 162 }; 163 }; 164 165 struct ionic_queue; 166 struct ionic_qcq; 167 struct ionic_desc_info; 168 169 typedef void (*ionic_desc_cb)(struct ionic_queue *q, 170 struct ionic_desc_info *desc_info, 171 struct ionic_cq_info *cq_info, void *cb_arg); 172 173 struct ionic_page_info { 174 struct page *page; 175 dma_addr_t dma_addr; 176 }; 177 178 struct ionic_desc_info { 179 union { 180 void *desc; 181 struct ionic_txq_desc *txq_desc; 182 struct ionic_rxq_desc *rxq_desc; 183 struct ionic_admin_cmd *adminq_desc; 184 }; 185 union { 186 void *sg_desc; 187 struct ionic_txq_sg_desc *txq_sg_desc; 188 struct ionic_rxq_sg_desc *rxq_sgl_desc; 189 }; 190 unsigned int npages; 191 struct ionic_page_info pages[IONIC_RX_MAX_SG_ELEMS + 1]; 192 ionic_desc_cb cb; 193 void *cb_arg; 194 }; 195 196 #define IONIC_QUEUE_NAME_MAX_SZ 32 197 198 struct ionic_queue { 199 struct device *dev; 200 struct ionic_lif *lif; 201 struct ionic_desc_info *info; 202 u16 head_idx; 203 u16 tail_idx; 204 unsigned int index; 205 unsigned int num_descs; 206 u64 dbell_count; 207 u64 stop; 208 u64 wake; 209 u64 drop; 210 struct ionic_dev *idev; 211 unsigned int type; 212 unsigned int hw_index; 213 unsigned int hw_type; 214 u64 dbval; 215 union { 216 void *base; 217 struct ionic_txq_desc *txq; 218 struct ionic_rxq_desc *rxq; 219 struct ionic_admin_cmd *adminq; 220 }; 221 union { 222 void *sg_base; 223 struct ionic_txq_sg_desc *txq_sgl; 224 struct ionic_rxq_sg_desc *rxq_sgl; 225 }; 226 dma_addr_t base_pa; 227 dma_addr_t sg_base_pa; 228 unsigned int desc_size; 229 unsigned int sg_desc_size; 230 unsigned int pid; 231 char name[IONIC_QUEUE_NAME_MAX_SZ]; 232 }; 233 234 #define IONIC_INTR_INDEX_NOT_ASSIGNED -1 235 #define IONIC_INTR_NAME_MAX_SZ 32 236 237 struct ionic_intr_info { 238 char name[IONIC_INTR_NAME_MAX_SZ]; 239 unsigned int index; 240 unsigned int vector; 241 u64 rearm_count; 242 unsigned int cpu; 243 cpumask_t affinity_mask; 244 u32 dim_coal_hw; 245 }; 246 247 struct ionic_cq { 248 struct ionic_lif *lif; 249 struct ionic_cq_info *info; 250 struct ionic_queue *bound_q; 251 struct ionic_intr_info *bound_intr; 252 u16 tail_idx; 253 bool done_color; 254 unsigned int num_descs; 255 unsigned int desc_size; 256 u64 compl_count; 257 void *base; 258 dma_addr_t base_pa; 259 }; 260 261 struct ionic; 262 263 static inline void ionic_intr_init(struct ionic_dev *idev, 264 struct ionic_intr_info *intr, 265 unsigned long index) 266 { 267 ionic_intr_clean(idev->intr_ctrl, index); 268 intr->index = index; 269 } 270 271 static inline unsigned int ionic_q_space_avail(struct ionic_queue *q) 272 { 273 unsigned int avail = q->tail_idx; 274 275 if (q->head_idx >= avail) 276 avail += q->num_descs - q->head_idx - 1; 277 else 278 avail -= q->head_idx + 1; 279 280 return avail; 281 } 282 283 static inline bool ionic_q_has_space(struct ionic_queue *q, unsigned int want) 284 { 285 return ionic_q_space_avail(q) >= want; 286 } 287 288 void ionic_init_devinfo(struct ionic *ionic); 289 int ionic_dev_setup(struct ionic *ionic); 290 291 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd); 292 u8 ionic_dev_cmd_status(struct ionic_dev *idev); 293 bool ionic_dev_cmd_done(struct ionic_dev *idev); 294 void ionic_dev_cmd_comp(struct ionic_dev *idev, union ionic_dev_cmd_comp *comp); 295 296 void ionic_dev_cmd_identify(struct ionic_dev *idev, u8 ver); 297 void ionic_dev_cmd_init(struct ionic_dev *idev); 298 void ionic_dev_cmd_reset(struct ionic_dev *idev); 299 300 void ionic_dev_cmd_port_identify(struct ionic_dev *idev); 301 void ionic_dev_cmd_port_init(struct ionic_dev *idev); 302 void ionic_dev_cmd_port_reset(struct ionic_dev *idev); 303 void ionic_dev_cmd_port_state(struct ionic_dev *idev, u8 state); 304 void ionic_dev_cmd_port_speed(struct ionic_dev *idev, u32 speed); 305 void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable); 306 void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type); 307 void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type); 308 309 int ionic_set_vf_config(struct ionic *ionic, int vf, u8 attr, u8 *data); 310 void ionic_dev_cmd_queue_identify(struct ionic_dev *idev, 311 u16 lif_type, u8 qtype, u8 qver); 312 void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver); 313 void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index, 314 dma_addr_t addr); 315 void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index); 316 void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq, 317 u16 lif_index, u16 intr_index); 318 319 int ionic_db_page_num(struct ionic_lif *lif, int pid); 320 321 int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq, 322 struct ionic_intr_info *intr, 323 unsigned int num_descs, size_t desc_size); 324 void ionic_cq_map(struct ionic_cq *cq, void *base, dma_addr_t base_pa); 325 void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q); 326 typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, struct ionic_cq_info *cq_info); 327 typedef void (*ionic_cq_done_cb)(void *done_arg); 328 unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do, 329 ionic_cq_cb cb, ionic_cq_done_cb done_cb, 330 void *done_arg); 331 332 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev, 333 struct ionic_queue *q, unsigned int index, const char *name, 334 unsigned int num_descs, size_t desc_size, 335 size_t sg_desc_size, unsigned int pid); 336 void ionic_q_map(struct ionic_queue *q, void *base, dma_addr_t base_pa); 337 void ionic_q_sg_map(struct ionic_queue *q, void *base, dma_addr_t base_pa); 338 void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, ionic_desc_cb cb, 339 void *cb_arg); 340 void ionic_q_rewind(struct ionic_queue *q, struct ionic_desc_info *start); 341 void ionic_q_service(struct ionic_queue *q, struct ionic_cq_info *cq_info, 342 unsigned int stop_index); 343 int ionic_heartbeat_check(struct ionic *ionic); 344 345 #endif /* _IONIC_DEV_H_ */ 346