1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #ifndef _IONIC_DEV_H_ 5 #define _IONIC_DEV_H_ 6 7 #include <linux/mutex.h> 8 #include <linux/workqueue.h> 9 10 #include "ionic_if.h" 11 #include "ionic_regs.h" 12 13 #define IONIC_MAX_TX_DESC 8192 14 #define IONIC_MAX_RX_DESC 16384 15 #define IONIC_MIN_TXRX_DESC 16 16 #define IONIC_DEF_TXRX_DESC 4096 17 #define IONIC_LIFS_MAX 1024 18 #define IONIC_WATCHDOG_SECS 5 19 #define IONIC_ITR_COAL_USEC_DEFAULT 64 20 21 #define IONIC_DEV_CMD_REG_VERSION 1 22 #define IONIC_DEV_INFO_REG_COUNT 32 23 #define IONIC_DEV_CMD_REG_COUNT 32 24 25 struct ionic_dev_bar { 26 void __iomem *vaddr; 27 phys_addr_t bus_addr; 28 unsigned long len; 29 int res_index; 30 }; 31 32 #ifndef __CHECKER__ 33 /* Registers */ 34 static_assert(sizeof(struct ionic_intr) == 32); 35 36 static_assert(sizeof(struct ionic_doorbell) == 8); 37 static_assert(sizeof(struct ionic_intr_status) == 8); 38 static_assert(sizeof(union ionic_dev_regs) == 4096); 39 static_assert(sizeof(union ionic_dev_info_regs) == 2048); 40 static_assert(sizeof(union ionic_dev_cmd_regs) == 2048); 41 static_assert(sizeof(struct ionic_lif_stats) == 1024); 42 43 static_assert(sizeof(struct ionic_admin_cmd) == 64); 44 static_assert(sizeof(struct ionic_admin_comp) == 16); 45 static_assert(sizeof(struct ionic_nop_cmd) == 64); 46 static_assert(sizeof(struct ionic_nop_comp) == 16); 47 48 /* Device commands */ 49 static_assert(sizeof(struct ionic_dev_identify_cmd) == 64); 50 static_assert(sizeof(struct ionic_dev_identify_comp) == 16); 51 static_assert(sizeof(struct ionic_dev_init_cmd) == 64); 52 static_assert(sizeof(struct ionic_dev_init_comp) == 16); 53 static_assert(sizeof(struct ionic_dev_reset_cmd) == 64); 54 static_assert(sizeof(struct ionic_dev_reset_comp) == 16); 55 static_assert(sizeof(struct ionic_dev_getattr_cmd) == 64); 56 static_assert(sizeof(struct ionic_dev_getattr_comp) == 16); 57 static_assert(sizeof(struct ionic_dev_setattr_cmd) == 64); 58 static_assert(sizeof(struct ionic_dev_setattr_comp) == 16); 59 60 /* Port commands */ 61 static_assert(sizeof(struct ionic_port_identify_cmd) == 64); 62 static_assert(sizeof(struct ionic_port_identify_comp) == 16); 63 static_assert(sizeof(struct ionic_port_init_cmd) == 64); 64 static_assert(sizeof(struct ionic_port_init_comp) == 16); 65 static_assert(sizeof(struct ionic_port_reset_cmd) == 64); 66 static_assert(sizeof(struct ionic_port_reset_comp) == 16); 67 static_assert(sizeof(struct ionic_port_getattr_cmd) == 64); 68 static_assert(sizeof(struct ionic_port_getattr_comp) == 16); 69 static_assert(sizeof(struct ionic_port_setattr_cmd) == 64); 70 static_assert(sizeof(struct ionic_port_setattr_comp) == 16); 71 72 /* LIF commands */ 73 static_assert(sizeof(struct ionic_lif_init_cmd) == 64); 74 static_assert(sizeof(struct ionic_lif_init_comp) == 16); 75 static_assert(sizeof(struct ionic_lif_reset_cmd) == 64); 76 static_assert(sizeof(ionic_lif_reset_comp) == 16); 77 static_assert(sizeof(struct ionic_lif_getattr_cmd) == 64); 78 static_assert(sizeof(struct ionic_lif_getattr_comp) == 16); 79 static_assert(sizeof(struct ionic_lif_setattr_cmd) == 64); 80 static_assert(sizeof(struct ionic_lif_setattr_comp) == 16); 81 82 static_assert(sizeof(struct ionic_q_init_cmd) == 64); 83 static_assert(sizeof(struct ionic_q_init_comp) == 16); 84 static_assert(sizeof(struct ionic_q_control_cmd) == 64); 85 static_assert(sizeof(ionic_q_control_comp) == 16); 86 static_assert(sizeof(struct ionic_q_identify_cmd) == 64); 87 static_assert(sizeof(struct ionic_q_identify_comp) == 16); 88 89 static_assert(sizeof(struct ionic_rx_mode_set_cmd) == 64); 90 static_assert(sizeof(ionic_rx_mode_set_comp) == 16); 91 static_assert(sizeof(struct ionic_rx_filter_add_cmd) == 64); 92 static_assert(sizeof(struct ionic_rx_filter_add_comp) == 16); 93 static_assert(sizeof(struct ionic_rx_filter_del_cmd) == 64); 94 static_assert(sizeof(ionic_rx_filter_del_comp) == 16); 95 96 /* RDMA commands */ 97 static_assert(sizeof(struct ionic_rdma_reset_cmd) == 64); 98 static_assert(sizeof(struct ionic_rdma_queue_cmd) == 64); 99 100 /* Events */ 101 static_assert(sizeof(struct ionic_notifyq_cmd) == 4); 102 static_assert(sizeof(union ionic_notifyq_comp) == 64); 103 static_assert(sizeof(struct ionic_notifyq_event) == 64); 104 static_assert(sizeof(struct ionic_link_change_event) == 64); 105 static_assert(sizeof(struct ionic_reset_event) == 64); 106 static_assert(sizeof(struct ionic_heartbeat_event) == 64); 107 static_assert(sizeof(struct ionic_log_event) == 64); 108 109 /* I/O */ 110 static_assert(sizeof(struct ionic_txq_desc) == 16); 111 static_assert(sizeof(struct ionic_txq_sg_desc) == 128); 112 static_assert(sizeof(struct ionic_txq_comp) == 16); 113 114 static_assert(sizeof(struct ionic_rxq_desc) == 16); 115 static_assert(sizeof(struct ionic_rxq_sg_desc) == 128); 116 static_assert(sizeof(struct ionic_rxq_comp) == 16); 117 118 /* SR/IOV */ 119 static_assert(sizeof(struct ionic_vf_setattr_cmd) == 64); 120 static_assert(sizeof(struct ionic_vf_setattr_comp) == 16); 121 static_assert(sizeof(struct ionic_vf_getattr_cmd) == 64); 122 static_assert(sizeof(struct ionic_vf_getattr_comp) == 16); 123 #endif /* __CHECKER__ */ 124 125 struct ionic_devinfo { 126 u8 asic_type; 127 u8 asic_rev; 128 char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN + 1]; 129 char serial_num[IONIC_DEVINFO_SERIAL_BUFLEN + 1]; 130 }; 131 132 struct ionic_dev { 133 union ionic_dev_info_regs __iomem *dev_info_regs; 134 union ionic_dev_cmd_regs __iomem *dev_cmd_regs; 135 136 unsigned long last_hb_time; 137 u32 last_hb; 138 u8 last_fw_status; 139 140 u64 __iomem *db_pages; 141 dma_addr_t phy_db_pages; 142 143 struct ionic_intr __iomem *intr_ctrl; 144 u64 __iomem *intr_status; 145 146 u32 port_info_sz; 147 struct ionic_port_info *port_info; 148 dma_addr_t port_info_pa; 149 150 struct ionic_devinfo dev_info; 151 }; 152 153 struct ionic_cq_info { 154 union { 155 void *cq_desc; 156 struct ionic_txq_comp *txcq; 157 struct ionic_rxq_comp *rxcq; 158 struct ionic_admin_comp *admincq; 159 struct ionic_notifyq_event *notifyq; 160 }; 161 }; 162 163 struct ionic_queue; 164 struct ionic_qcq; 165 struct ionic_desc_info; 166 167 typedef void (*ionic_desc_cb)(struct ionic_queue *q, 168 struct ionic_desc_info *desc_info, 169 struct ionic_cq_info *cq_info, void *cb_arg); 170 171 struct ionic_page_info { 172 struct page *page; 173 dma_addr_t dma_addr; 174 }; 175 176 struct ionic_desc_info { 177 union { 178 void *desc; 179 struct ionic_txq_desc *txq_desc; 180 struct ionic_rxq_desc *rxq_desc; 181 struct ionic_admin_cmd *adminq_desc; 182 }; 183 union { 184 void *sg_desc; 185 struct ionic_txq_sg_desc *txq_sg_desc; 186 struct ionic_rxq_sg_desc *rxq_sgl_desc; 187 }; 188 unsigned int npages; 189 struct ionic_page_info pages[IONIC_RX_MAX_SG_ELEMS + 1]; 190 ionic_desc_cb cb; 191 void *cb_arg; 192 }; 193 194 #define IONIC_QUEUE_NAME_MAX_SZ 32 195 196 struct ionic_queue { 197 struct device *dev; 198 struct ionic_lif *lif; 199 struct ionic_desc_info *info; 200 u16 head_idx; 201 u16 tail_idx; 202 unsigned int index; 203 unsigned int num_descs; 204 u64 dbell_count; 205 u64 stop; 206 u64 wake; 207 u64 drop; 208 struct ionic_dev *idev; 209 unsigned int type; 210 unsigned int hw_index; 211 unsigned int hw_type; 212 u64 dbval; 213 union { 214 void *base; 215 struct ionic_txq_desc *txq; 216 struct ionic_rxq_desc *rxq; 217 struct ionic_admin_cmd *adminq; 218 }; 219 union { 220 void *sg_base; 221 struct ionic_txq_sg_desc *txq_sgl; 222 struct ionic_rxq_sg_desc *rxq_sgl; 223 }; 224 dma_addr_t base_pa; 225 dma_addr_t sg_base_pa; 226 unsigned int desc_size; 227 unsigned int sg_desc_size; 228 unsigned int pid; 229 char name[IONIC_QUEUE_NAME_MAX_SZ]; 230 }; 231 232 #define IONIC_INTR_INDEX_NOT_ASSIGNED -1 233 #define IONIC_INTR_NAME_MAX_SZ 32 234 235 struct ionic_intr_info { 236 char name[IONIC_INTR_NAME_MAX_SZ]; 237 unsigned int index; 238 unsigned int vector; 239 u64 rearm_count; 240 unsigned int cpu; 241 cpumask_t affinity_mask; 242 u32 dim_coal_hw; 243 }; 244 245 struct ionic_cq { 246 struct ionic_lif *lif; 247 struct ionic_cq_info *info; 248 struct ionic_queue *bound_q; 249 struct ionic_intr_info *bound_intr; 250 u16 tail_idx; 251 bool done_color; 252 unsigned int num_descs; 253 unsigned int desc_size; 254 u64 compl_count; 255 void *base; 256 dma_addr_t base_pa; 257 }; 258 259 struct ionic; 260 261 static inline void ionic_intr_init(struct ionic_dev *idev, 262 struct ionic_intr_info *intr, 263 unsigned long index) 264 { 265 ionic_intr_clean(idev->intr_ctrl, index); 266 intr->index = index; 267 } 268 269 static inline unsigned int ionic_q_space_avail(struct ionic_queue *q) 270 { 271 unsigned int avail = q->tail_idx; 272 273 if (q->head_idx >= avail) 274 avail += q->num_descs - q->head_idx - 1; 275 else 276 avail -= q->head_idx + 1; 277 278 return avail; 279 } 280 281 static inline bool ionic_q_has_space(struct ionic_queue *q, unsigned int want) 282 { 283 return ionic_q_space_avail(q) >= want; 284 } 285 286 void ionic_init_devinfo(struct ionic *ionic); 287 int ionic_dev_setup(struct ionic *ionic); 288 289 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd); 290 u8 ionic_dev_cmd_status(struct ionic_dev *idev); 291 bool ionic_dev_cmd_done(struct ionic_dev *idev); 292 void ionic_dev_cmd_comp(struct ionic_dev *idev, union ionic_dev_cmd_comp *comp); 293 294 void ionic_dev_cmd_identify(struct ionic_dev *idev, u8 ver); 295 void ionic_dev_cmd_init(struct ionic_dev *idev); 296 void ionic_dev_cmd_reset(struct ionic_dev *idev); 297 298 void ionic_dev_cmd_port_identify(struct ionic_dev *idev); 299 void ionic_dev_cmd_port_init(struct ionic_dev *idev); 300 void ionic_dev_cmd_port_reset(struct ionic_dev *idev); 301 void ionic_dev_cmd_port_state(struct ionic_dev *idev, u8 state); 302 void ionic_dev_cmd_port_speed(struct ionic_dev *idev, u32 speed); 303 void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable); 304 void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type); 305 void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type); 306 307 int ionic_set_vf_config(struct ionic *ionic, int vf, u8 attr, u8 *data); 308 void ionic_dev_cmd_queue_identify(struct ionic_dev *idev, 309 u16 lif_type, u8 qtype, u8 qver); 310 void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver); 311 void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index, 312 dma_addr_t addr); 313 void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index); 314 void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq, 315 u16 lif_index, u16 intr_index); 316 317 int ionic_db_page_num(struct ionic_lif *lif, int pid); 318 319 int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq, 320 struct ionic_intr_info *intr, 321 unsigned int num_descs, size_t desc_size); 322 void ionic_cq_map(struct ionic_cq *cq, void *base, dma_addr_t base_pa); 323 void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q); 324 typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, struct ionic_cq_info *cq_info); 325 typedef void (*ionic_cq_done_cb)(void *done_arg); 326 unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do, 327 ionic_cq_cb cb, ionic_cq_done_cb done_cb, 328 void *done_arg); 329 330 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev, 331 struct ionic_queue *q, unsigned int index, const char *name, 332 unsigned int num_descs, size_t desc_size, 333 size_t sg_desc_size, unsigned int pid); 334 void ionic_q_map(struct ionic_queue *q, void *base, dma_addr_t base_pa); 335 void ionic_q_sg_map(struct ionic_queue *q, void *base, dma_addr_t base_pa); 336 void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, ionic_desc_cb cb, 337 void *cb_arg); 338 void ionic_q_rewind(struct ionic_queue *q, struct ionic_desc_info *start); 339 void ionic_q_service(struct ionic_queue *q, struct ionic_cq_info *cq_info, 340 unsigned int stop_index); 341 int ionic_heartbeat_check(struct ionic *ionic); 342 343 #endif /* _IONIC_DEV_H_ */ 344