1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4 #include <linux/module.h> 5 #include <linux/netdevice.h> 6 #include <linux/etherdevice.h> 7 #include <linux/pci.h> 8 9 #include "ionic.h" 10 #include "ionic_bus.h" 11 #include "ionic_lif.h" 12 #include "ionic_debugfs.h" 13 14 /* Supported devices */ 15 static const struct pci_device_id ionic_id_table[] = { 16 { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF) }, 17 { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF) }, 18 { 0, } /* end of table */ 19 }; 20 MODULE_DEVICE_TABLE(pci, ionic_id_table); 21 22 int ionic_bus_get_irq(struct ionic *ionic, unsigned int num) 23 { 24 return pci_irq_vector(ionic->pdev, num); 25 } 26 27 const char *ionic_bus_info(struct ionic *ionic) 28 { 29 return pci_name(ionic->pdev); 30 } 31 32 int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs) 33 { 34 return pci_alloc_irq_vectors(ionic->pdev, nintrs, nintrs, 35 PCI_IRQ_MSIX); 36 } 37 38 void ionic_bus_free_irq_vectors(struct ionic *ionic) 39 { 40 if (!ionic->nintrs) 41 return; 42 43 pci_free_irq_vectors(ionic->pdev); 44 } 45 46 static int ionic_map_bars(struct ionic *ionic) 47 { 48 struct pci_dev *pdev = ionic->pdev; 49 struct device *dev = ionic->dev; 50 struct ionic_dev_bar *bars; 51 unsigned int i, j; 52 53 bars = ionic->bars; 54 ionic->num_bars = 0; 55 56 for (i = 0, j = 0; i < IONIC_BARS_MAX; i++) { 57 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM)) 58 continue; 59 bars[j].len = pci_resource_len(pdev, i); 60 61 /* only map the whole bar 0 */ 62 if (j > 0) { 63 bars[j].vaddr = NULL; 64 } else { 65 bars[j].vaddr = pci_iomap(pdev, i, bars[j].len); 66 if (!bars[j].vaddr) { 67 dev_err(dev, 68 "Cannot memory-map BAR %d, aborting\n", 69 i); 70 return -ENODEV; 71 } 72 } 73 74 bars[j].bus_addr = pci_resource_start(pdev, i); 75 bars[j].res_index = i; 76 ionic->num_bars++; 77 j++; 78 } 79 80 return 0; 81 } 82 83 static void ionic_unmap_bars(struct ionic *ionic) 84 { 85 struct ionic_dev_bar *bars = ionic->bars; 86 unsigned int i; 87 88 for (i = 0; i < IONIC_BARS_MAX; i++) { 89 if (bars[i].vaddr) { 90 iounmap(bars[i].vaddr); 91 bars[i].bus_addr = 0; 92 bars[i].vaddr = NULL; 93 bars[i].len = 0; 94 } 95 } 96 } 97 98 void __iomem *ionic_bus_map_dbpage(struct ionic *ionic, int page_num) 99 { 100 return pci_iomap_range(ionic->pdev, 101 ionic->bars[IONIC_PCI_BAR_DBELL].res_index, 102 (u64)page_num << PAGE_SHIFT, PAGE_SIZE); 103 } 104 105 void ionic_bus_unmap_dbpage(struct ionic *ionic, void __iomem *page) 106 { 107 iounmap(page); 108 } 109 110 static void ionic_vf_dealloc_locked(struct ionic *ionic) 111 { 112 struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_STATSADDR }; 113 struct ionic_vf *v; 114 int i; 115 116 if (!ionic->vfs) 117 return; 118 119 for (i = ionic->num_vfs - 1; i >= 0; i--) { 120 v = &ionic->vfs[i]; 121 122 if (v->stats_pa) { 123 vfc.stats_pa = 0; 124 ionic_set_vf_config(ionic, i, &vfc); 125 dma_unmap_single(ionic->dev, v->stats_pa, 126 sizeof(v->stats), DMA_FROM_DEVICE); 127 v->stats_pa = 0; 128 } 129 } 130 131 kfree(ionic->vfs); 132 ionic->vfs = NULL; 133 ionic->num_vfs = 0; 134 } 135 136 static void ionic_vf_dealloc(struct ionic *ionic) 137 { 138 down_write(&ionic->vf_op_lock); 139 ionic_vf_dealloc_locked(ionic); 140 up_write(&ionic->vf_op_lock); 141 } 142 143 static int ionic_vf_alloc(struct ionic *ionic, int num_vfs) 144 { 145 struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_STATSADDR }; 146 struct ionic_vf *v; 147 int err = 0; 148 int i; 149 150 down_write(&ionic->vf_op_lock); 151 152 ionic->vfs = kcalloc(num_vfs, sizeof(struct ionic_vf), GFP_KERNEL); 153 if (!ionic->vfs) { 154 err = -ENOMEM; 155 goto out; 156 } 157 158 for (i = 0; i < num_vfs; i++) { 159 v = &ionic->vfs[i]; 160 v->stats_pa = dma_map_single(ionic->dev, &v->stats, 161 sizeof(v->stats), DMA_FROM_DEVICE); 162 if (dma_mapping_error(ionic->dev, v->stats_pa)) { 163 v->stats_pa = 0; 164 err = -ENODEV; 165 goto out; 166 } 167 168 ionic->num_vfs++; 169 170 /* ignore failures from older FW, we just won't get stats */ 171 vfc.stats_pa = cpu_to_le64(v->stats_pa); 172 ionic_set_vf_config(ionic, i, &vfc); 173 } 174 175 out: 176 if (err) 177 ionic_vf_dealloc_locked(ionic); 178 up_write(&ionic->vf_op_lock); 179 return err; 180 } 181 182 static int ionic_sriov_configure(struct pci_dev *pdev, int num_vfs) 183 { 184 struct ionic *ionic = pci_get_drvdata(pdev); 185 struct device *dev = ionic->dev; 186 int ret = 0; 187 188 if (ionic->lif && 189 test_bit(IONIC_LIF_F_FW_RESET, ionic->lif->state)) 190 return -EBUSY; 191 192 if (num_vfs > 0) { 193 ret = pci_enable_sriov(pdev, num_vfs); 194 if (ret) { 195 dev_err(dev, "Cannot enable SRIOV: %d\n", ret); 196 goto out; 197 } 198 199 ret = ionic_vf_alloc(ionic, num_vfs); 200 if (ret) { 201 dev_err(dev, "Cannot alloc VFs: %d\n", ret); 202 pci_disable_sriov(pdev); 203 goto out; 204 } 205 206 ret = num_vfs; 207 } else { 208 pci_disable_sriov(pdev); 209 ionic_vf_dealloc(ionic); 210 } 211 212 out: 213 return ret; 214 } 215 216 static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 217 { 218 struct device *dev = &pdev->dev; 219 struct ionic *ionic; 220 int num_vfs; 221 int err; 222 223 ionic = ionic_devlink_alloc(dev); 224 if (!ionic) 225 return -ENOMEM; 226 227 ionic->pdev = pdev; 228 ionic->dev = dev; 229 pci_set_drvdata(pdev, ionic); 230 mutex_init(&ionic->dev_cmd_lock); 231 232 /* Query system for DMA addressing limitation for the device. */ 233 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(IONIC_ADDR_LEN)); 234 if (err) { 235 dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting. err=%d\n", 236 err); 237 goto err_out_clear_drvdata; 238 } 239 240 ionic_debugfs_add_dev(ionic); 241 242 /* Setup PCI device */ 243 err = pci_enable_device_mem(pdev); 244 if (err) { 245 dev_err(dev, "Cannot enable PCI device: %d, aborting\n", err); 246 goto err_out_debugfs_del_dev; 247 } 248 249 err = pci_request_regions(pdev, IONIC_DRV_NAME); 250 if (err) { 251 dev_err(dev, "Cannot request PCI regions: %d, aborting\n", err); 252 goto err_out_pci_disable_device; 253 } 254 255 pcie_print_link_status(pdev); 256 257 err = ionic_map_bars(ionic); 258 if (err) 259 goto err_out_pci_release_regions; 260 261 /* Configure the device */ 262 err = ionic_setup(ionic); 263 if (err) { 264 dev_err(dev, "Cannot setup device: %d, aborting\n", err); 265 goto err_out_unmap_bars; 266 } 267 pci_set_master(pdev); 268 269 err = ionic_identify(ionic); 270 if (err) { 271 dev_err(dev, "Cannot identify device: %d, aborting\n", err); 272 goto err_out_teardown; 273 } 274 ionic_debugfs_add_ident(ionic); 275 276 err = ionic_init(ionic); 277 if (err) { 278 dev_err(dev, "Cannot init device: %d, aborting\n", err); 279 goto err_out_teardown; 280 } 281 282 /* Configure the ports */ 283 err = ionic_port_identify(ionic); 284 if (err) { 285 dev_err(dev, "Cannot identify port: %d, aborting\n", err); 286 goto err_out_reset; 287 } 288 289 err = ionic_port_init(ionic); 290 if (err) { 291 dev_err(dev, "Cannot init port: %d, aborting\n", err); 292 goto err_out_reset; 293 } 294 295 /* Allocate and init the LIF */ 296 err = ionic_lif_size(ionic); 297 if (err) { 298 dev_err(dev, "Cannot size LIF: %d, aborting\n", err); 299 goto err_out_port_reset; 300 } 301 302 err = ionic_lif_alloc(ionic); 303 if (err) { 304 dev_err(dev, "Cannot allocate LIF: %d, aborting\n", err); 305 goto err_out_free_irqs; 306 } 307 308 err = ionic_lif_init(ionic->lif); 309 if (err) { 310 dev_err(dev, "Cannot init LIF: %d, aborting\n", err); 311 goto err_out_free_lifs; 312 } 313 314 init_rwsem(&ionic->vf_op_lock); 315 num_vfs = pci_num_vf(pdev); 316 if (num_vfs) { 317 dev_info(dev, "%d VFs found already enabled\n", num_vfs); 318 err = ionic_vf_alloc(ionic, num_vfs); 319 if (err) 320 dev_err(dev, "Cannot enable existing VFs: %d\n", err); 321 } 322 323 err = ionic_devlink_register(ionic); 324 if (err) { 325 dev_err(dev, "Cannot register devlink: %d\n", err); 326 goto err_out_deinit_lifs; 327 } 328 329 err = ionic_lif_register(ionic->lif); 330 if (err) { 331 dev_err(dev, "Cannot register LIF: %d, aborting\n", err); 332 goto err_out_deregister_devlink; 333 } 334 335 mod_timer(&ionic->watchdog_timer, 336 round_jiffies(jiffies + ionic->watchdog_period)); 337 338 return 0; 339 340 err_out_deregister_devlink: 341 ionic_devlink_unregister(ionic); 342 err_out_deinit_lifs: 343 ionic_vf_dealloc(ionic); 344 ionic_lif_deinit(ionic->lif); 345 err_out_free_lifs: 346 ionic_lif_free(ionic->lif); 347 ionic->lif = NULL; 348 err_out_free_irqs: 349 ionic_bus_free_irq_vectors(ionic); 350 err_out_port_reset: 351 ionic_port_reset(ionic); 352 err_out_reset: 353 ionic_reset(ionic); 354 err_out_teardown: 355 ionic_dev_teardown(ionic); 356 pci_clear_master(pdev); 357 /* Don't fail the probe for these errors, keep 358 * the hw interface around for inspection 359 */ 360 return 0; 361 362 err_out_unmap_bars: 363 ionic_unmap_bars(ionic); 364 err_out_pci_release_regions: 365 pci_release_regions(pdev); 366 err_out_pci_disable_device: 367 pci_disable_device(pdev); 368 err_out_debugfs_del_dev: 369 ionic_debugfs_del_dev(ionic); 370 err_out_clear_drvdata: 371 mutex_destroy(&ionic->dev_cmd_lock); 372 ionic_devlink_free(ionic); 373 374 return err; 375 } 376 377 static void ionic_remove(struct pci_dev *pdev) 378 { 379 struct ionic *ionic = pci_get_drvdata(pdev); 380 381 del_timer_sync(&ionic->watchdog_timer); 382 383 if (ionic->lif) { 384 ionic_lif_unregister(ionic->lif); 385 ionic_devlink_unregister(ionic); 386 ionic_lif_deinit(ionic->lif); 387 ionic_lif_free(ionic->lif); 388 ionic->lif = NULL; 389 ionic_bus_free_irq_vectors(ionic); 390 } 391 392 ionic_port_reset(ionic); 393 ionic_reset(ionic); 394 ionic_dev_teardown(ionic); 395 pci_clear_master(pdev); 396 ionic_unmap_bars(ionic); 397 pci_release_regions(pdev); 398 pci_disable_device(pdev); 399 ionic_debugfs_del_dev(ionic); 400 mutex_destroy(&ionic->dev_cmd_lock); 401 ionic_devlink_free(ionic); 402 } 403 404 static struct pci_driver ionic_driver = { 405 .name = IONIC_DRV_NAME, 406 .id_table = ionic_id_table, 407 .probe = ionic_probe, 408 .remove = ionic_remove, 409 .sriov_configure = ionic_sriov_configure, 410 }; 411 412 int ionic_bus_register_driver(void) 413 { 414 return pci_register_driver(&ionic_driver); 415 } 416 417 void ionic_bus_unregister_driver(void) 418 { 419 pci_unregister_driver(&ionic_driver); 420 } 421